From b403125d3bbf8046c1186e1a49cb17bb5551db14 Mon Sep 17 00:00:00 2001 From: Chris Zhong Date: Sun, 22 Mar 2015 00:04:51 +0800 Subject: ARM: rockchip: fix undefined instruction of reset_ctrl_regs Sometimes the debug module may not work well after resume, since it has not been correctly reset when wakeup from suspend. That cause system crash during reusme, and a 'undefined instruction' is displayed on the console. Set the GRF_FORCE_JTAG bit of RK3288_GRF_SOC_CON0 can ensure that debug modul is reset. And we can change the value of RK3288_GRF_SOC_CON0 back when system resume. Signed-off-by: Chris Zhong Tested-by: Caesar Wang Reviewed-by: Douglas Anderson According to discussions, there does not seem a better solution available. Please also see the potential security implication described in the comment inline in the code. Signed-off-by: Heiko Stuebner --- arch/arm/mach-rockchip/pm.h | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'arch/arm/mach-rockchip/pm.h') diff --git a/arch/arm/mach-rockchip/pm.h b/arch/arm/mach-rockchip/pm.h index 3e8d39c0c3d5..f8a747bc1437 100644 --- a/arch/arm/mach-rockchip/pm.h +++ b/arch/arm/mach-rockchip/pm.h @@ -48,6 +48,10 @@ static inline void rockchip_suspend_init(void) #define RK3288_PMU_WAKEUP_RST_CLR_CNT 0x44 #define RK3288_PMU_PWRMODE_CON1 0x90 +#define RK3288_GRF_SOC_CON0 0x244 +#define GRF_FORCE_JTAG BIT(12) +#define GRF_FORCE_JTAG_WRITE BIT(28) + #define RK3288_SGRF_SOC_CON0 (0x0000) #define RK3288_SGRF_FAST_BOOT_ADDR (0x0120) #define SGRF_PCLK_WDT_GATE BIT(6) -- cgit v1.2.3