From 92b913b08b18faa487b0c744282fafd944446ade Mon Sep 17 00:00:00 2001 From: Lennert Buytenhek Date: Fri, 25 Apr 2008 16:28:33 -0400 Subject: [ARM] Orion: fix ->map_irq() PCIe bus number check The current orion5x board ->map_irq() routines check whether a given bus number lives on the PCIe controller by comparing it with the PCIe controller's primary bus number. This doesn't work in case there are multiple buses in the PCIe domain, i.e. if there exists a PCIe bridge on the primary PCIe bus. This patch adds a helper function (orion5x_pci_map_irq()) that returns the IRQ number for the given PCI device if that device has a hard-wired IRQ, or -1 otherwise, and makes each board's ->map_irq() function use this helper function. Signed-off-by: Lennert Buytenhek Signed-off-by: Nicolas Pitre --- arch/arm/mach-orion5x/ts209-setup.c | 11 +++++++---- 1 file changed, 7 insertions(+), 4 deletions(-) (limited to 'arch/arm/mach-orion5x/ts209-setup.c') diff --git a/arch/arm/mach-orion5x/ts209-setup.c b/arch/arm/mach-orion5x/ts209-setup.c index fd43863a86f6..d3a892283dd0 100644 --- a/arch/arm/mach-orion5x/ts209-setup.c +++ b/arch/arm/mach-orion5x/ts209-setup.c @@ -141,14 +141,17 @@ void __init qnap_ts209_pci_preinit(void) static int __init qnap_ts209_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin) { + int irq; + /* - * PCIE IRQ is connected internally (not GPIO) + * Check for devices with hard-wired IRQs. */ - if (dev->bus->number == orion5x_pcie_local_bus_nr()) - return IRQ_ORION5X_PCIE0_INT; + irq = orion5x_pci_map_irq(dev, slot, pin); + if (irq != -1) + return irq; /* - * PCI IRQs are connected via GPIOs + * PCI IRQs are connected via GPIOs. */ switch (slot - QNAP_TS209_PCI_SLOT0_OFFS) { case 0: -- cgit v1.2.3 From b46926bb2d9977799c88aef17a4386ee02c326d8 Mon Sep 17 00:00:00 2001 From: Lennert Buytenhek Date: Fri, 25 Apr 2008 16:31:32 -0400 Subject: [ARM] Orion: catch a couple more alternative spellings of PCIe Unify a couple more spellings of "PCIe" ("PCI-E", "PCIE".) Signed-off-by: Lennert Buytenhek Signed-off-by: Nicolas Pitre --- arch/arm/mach-orion5x/addr-map.c | 4 ++-- arch/arm/mach-orion5x/common.c | 2 +- arch/arm/mach-orion5x/dns323-setup.c | 4 ++-- arch/arm/mach-orion5x/kurobox_pro-setup.c | 2 +- arch/arm/mach-orion5x/rd88f5182-setup.c | 2 +- arch/arm/mach-orion5x/ts209-setup.c | 2 +- 6 files changed, 8 insertions(+), 8 deletions(-) (limited to 'arch/arm/mach-orion5x/ts209-setup.c') diff --git a/arch/arm/mach-orion5x/addr-map.c b/arch/arm/mach-orion5x/addr-map.c index 6b179371e0a2..9608503d67f5 100644 --- a/arch/arm/mach-orion5x/addr-map.c +++ b/arch/arm/mach-orion5x/addr-map.c @@ -19,14 +19,14 @@ /* * The Orion has fully programable address map. There's a separate address - * map for each of the device _master_ interfaces, e.g. CPU, PCI, PCIE, USB, + * map for each of the device _master_ interfaces, e.g. CPU, PCI, PCIe, USB, * Gigabit Ethernet, DMA/XOR engines, etc. Each interface has its own * address decode windows that allow it to access any of the Orion resources. * * CPU address decoding -- * Linux assumes that it is the boot loader that already setup the access to * DDR and internal registers. - * Setup access to PCI and PCI-E IO/MEM space is issued by this file. + * Setup access to PCI and PCIe IO/MEM space is issued by this file. * Setup access to various devices located on the device bus interface (e.g. * flashes, RTC, etc) should be issued by machine-setup.c according to * specific board population (by using orion5x_setup_*_win()). diff --git a/arch/arm/mach-orion5x/common.c b/arch/arm/mach-orion5x/common.c index c13800b8e372..968deb58be01 100644 --- a/arch/arm/mach-orion5x/common.c +++ b/arch/arm/mach-orion5x/common.c @@ -317,7 +317,7 @@ struct sys_timer orion5x_timer = { ****************************************************************************/ /* - * Identify device ID and rev from PCIE configuration header space '0'. + * Identify device ID and rev from PCIe configuration header space '0'. */ static void __init orion5x_id(u32 *dev, u32 *rev, char **dev_name) { diff --git a/arch/arm/mach-orion5x/dns323-setup.c b/arch/arm/mach-orion5x/dns323-setup.c index 46181737fb75..5bc064b8bb44 100644 --- a/arch/arm/mach-orion5x/dns323-setup.c +++ b/arch/arm/mach-orion5x/dns323-setup.c @@ -258,9 +258,9 @@ static void __init dns323_init(void) */ orion5x_setup_dev_boot_win(DNS323_NOR_BOOT_BASE, DNS323_NOR_BOOT_SIZE); - /* DNS-323 has a Marvell 88X7042 SATA controller attached via PCIE + /* DNS-323 has a Marvell 88X7042 SATA controller attached via PCIe * - * Open a special address decode windows for the PCIE WA. + * Open a special address decode windows for the PCIe WA. */ orion5x_setup_pcie_wa_win(ORION5X_PCIE_WA_PHYS_BASE, ORION5X_PCIE_WA_SIZE); diff --git a/arch/arm/mach-orion5x/kurobox_pro-setup.c b/arch/arm/mach-orion5x/kurobox_pro-setup.c index 36cf76388693..36760c6e54c0 100644 --- a/arch/arm/mach-orion5x/kurobox_pro-setup.c +++ b/arch/arm/mach-orion5x/kurobox_pro-setup.c @@ -199,7 +199,7 @@ static void __init kurobox_pro_init(void) orion5x_setup_dev0_win(KUROBOX_PRO_NAND_BASE, KUROBOX_PRO_NAND_SIZE); /* - * Open a special address decode windows for the PCIE WA. + * Open a special address decode windows for the PCIe WA. */ orion5x_setup_pcie_wa_win(ORION5X_PCIE_WA_PHYS_BASE, ORION5X_PCIE_WA_SIZE); diff --git a/arch/arm/mach-orion5x/rd88f5182-setup.c b/arch/arm/mach-orion5x/rd88f5182-setup.c index b4315dfd4a35..aebe6b8e5059 100644 --- a/arch/arm/mach-orion5x/rd88f5182-setup.c +++ b/arch/arm/mach-orion5x/rd88f5182-setup.c @@ -262,7 +262,7 @@ static void __init rd88f5182_init(void) orion5x_setup_dev1_win(RD88F5182_NOR_BASE, RD88F5182_NOR_SIZE); /* - * Open a special address decode windows for the PCIE WA. + * Open a special address decode windows for the PCIe WA. */ orion5x_setup_pcie_wa_win(ORION5X_PCIE_WA_PHYS_BASE, ORION5X_PCIE_WA_SIZE); diff --git a/arch/arm/mach-orion5x/ts209-setup.c b/arch/arm/mach-orion5x/ts209-setup.c index d3a892283dd0..161c965f3906 100644 --- a/arch/arm/mach-orion5x/ts209-setup.c +++ b/arch/arm/mach-orion5x/ts209-setup.c @@ -376,7 +376,7 @@ static void __init qnap_ts209_init(void) QNAP_TS209_NOR_BOOT_SIZE); /* - * Open a special address decode windows for the PCIE WA. + * Open a special address decode windows for the PCIe WA. */ orion5x_setup_pcie_wa_win(ORION5X_PCIE_WA_PHYS_BASE, ORION5X_PCIE_WA_SIZE); -- cgit v1.2.3