From b0b6e42aa63fbd00a3b509e75702aca4be8618cd Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Mon, 13 Dec 2010 20:54:58 +0800 Subject: ARM: mxs: Add core definitions MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add core definitions for MXS-based SoC MX23 and MX28. Signed-off-by: Shawn Guo Signed-off-by: Uwe Kleine-König --- arch/arm/mach-mxs/include/mach/irqs.h | 32 ++++++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+) create mode 100644 arch/arm/mach-mxs/include/mach/irqs.h (limited to 'arch/arm/mach-mxs/include/mach/irqs.h') diff --git a/arch/arm/mach-mxs/include/mach/irqs.h b/arch/arm/mach-mxs/include/mach/irqs.h new file mode 100644 index 000000000000..f771039b814a --- /dev/null +++ b/arch/arm/mach-mxs/include/mach/irqs.h @@ -0,0 +1,32 @@ +/* + * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __MACH_MXS_IRQS_H__ +#define __MACH_MXS_IRQS_H__ + +#define MXS_INTERNAL_IRQS 128 + +#define MXS_GPIO_IRQ_START MXS_INTERNAL_IRQS + +/* the maximum for MXS-based */ +#define MXS_GPIO_IRQS (32 * 5) + +/* + * The next 16 interrupts are for board specific purposes. Since + * the kernel can only run on one machine at a time, we can re-use + * these. If you need more, increase MXS_BOARD_IRQS, but keep it + * within sensible limits. + */ +#define MXS_BOARD_IRQ_START (MXS_GPIO_IRQ_START + MXS_GPIO_IRQS) +#define MXS_BOARD_IRQS 16 + +#define NR_IRQS (MXS_BOARD_IRQ_START + MXS_BOARD_IRQS) + +#endif /* __MACH_MXS_IRQS_H__ */ -- cgit v1.2.3