From c0114709ed85a5693eb74acdfa03d94f7f12e5b8 Mon Sep 17 00:00:00 2001 From: Catalin Marinas Date: Mon, 14 Jan 2013 18:05:37 +0000 Subject: irqchip: gic: Perform the gic_secondary_init() call via CPU notifier All the calls to gic_secondary_init() pass 0 as the first argument. Since this function is called on each CPU when starting, it can be done in a platform-independent way via a CPU notifier registered by the GIC code. Signed-off-by: Catalin Marinas Acked-by: Stephen Warren Acked-by: Viresh Kumar Acked-by: Santosh Shilimkar Acked-by: Rob Herring Acked-by: Simon Horman Tested-by: Simon Horman Acked-by: Srinidhi Kasagar Tested-by: Dinh Nguyen Acked-by: Nicolas Pitre Tested-by: Marc Zyngier Cc: Russell King Cc: Thomas Gleixner Cc: Kukjin Kim Cc: Sascha Hauer Cc: David Brown Cc: Bryan Huntsman Cc: Tony Lindgren Cc: Magnus Damm Cc: Shiraz Hashim Cc: Linus Walleij Cc: Will Deacon Cc: Kukjin Kim Cc: Barry Song --- arch/arm/mach-exynos/platsmp.c | 8 -------- 1 file changed, 8 deletions(-) (limited to 'arch/arm/mach-exynos/platsmp.c') diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c index 60f7c5be057d..95e04bd5813f 100644 --- a/arch/arm/mach-exynos/platsmp.c +++ b/arch/arm/mach-exynos/platsmp.c @@ -20,7 +20,6 @@ #include #include #include -#include #include #include @@ -75,13 +74,6 @@ static DEFINE_SPINLOCK(boot_lock); static void __cpuinit exynos_secondary_init(unsigned int cpu) { - /* - * if any interrupts are already enabled for the primary - * core (e.g. timer irq), then they will not have been enabled - * for us: do so - */ - gic_secondary_init(0); - /* * let the primary processor know we're out of the * pen, then head off into the C entry point -- cgit v1.2.3 From beddf63fc8e01f06799bd6d7a2dd879885bbc9c6 Mon Sep 17 00:00:00 2001 From: Tomasz Figa Date: Tue, 11 Dec 2012 13:58:43 +0900 Subject: ARM: EXYNOS: Add secure firmware support to secondary CPU bring-up Boards using secure firmware must use different CPU boot registers and call secure firmware to boot the CPU. Signed-off-by: Kyungmin Park Signed-off-by: Tomasz Figa Signed-off-by: Kukjin Kim --- arch/arm/mach-exynos/platsmp.c | 32 +++++++++++++++++++++++++++----- 1 file changed, 27 insertions(+), 5 deletions(-) (limited to 'arch/arm/mach-exynos/platsmp.c') diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c index 60f7c5be057d..a083e0591a56 100644 --- a/arch/arm/mach-exynos/platsmp.c +++ b/arch/arm/mach-exynos/platsmp.c @@ -25,6 +25,7 @@ #include #include #include +#include #include #include @@ -145,10 +146,21 @@ static int __cpuinit exynos_boot_secondary(unsigned int cpu, struct task_struct timeout = jiffies + (1 * HZ); while (time_before(jiffies, timeout)) { + unsigned long boot_addr; + smp_rmb(); - __raw_writel(virt_to_phys(exynos4_secondary_startup), - cpu_boot_reg(phys_cpu)); + boot_addr = virt_to_phys(exynos4_secondary_startup); + + /* + * Try to set boot address using firmware first + * and fall back to boot register if it fails. + */ + if (call_firmware_op(set_cpu_boot_addr, phys_cpu, boot_addr)) + __raw_writel(boot_addr, cpu_boot_reg(phys_cpu)); + + call_firmware_op(cpu_boot, phys_cpu); + arch_send_wakeup_ipi_mask(cpumask_of(cpu)); if (pen_release == -1) @@ -204,10 +216,20 @@ static void __init exynos_smp_prepare_cpus(unsigned int max_cpus) * system-wide flags register. The boot monitor waits * until it receives a soft interrupt, and then the * secondary CPU branches to this address. + * + * Try using firmware operation first and fall back to + * boot register if it fails. */ - for (i = 1; i < max_cpus; ++i) - __raw_writel(virt_to_phys(exynos4_secondary_startup), - cpu_boot_reg(cpu_logical_map(i))); + for (i = 1; i < max_cpus; ++i) { + unsigned long phys_cpu; + unsigned long boot_addr; + + phys_cpu = cpu_logical_map(i); + boot_addr = virt_to_phys(exynos4_secondary_startup); + + if (call_firmware_op(set_cpu_boot_addr, phys_cpu, boot_addr)) + __raw_writel(boot_addr, cpu_boot_reg(phys_cpu)); + } } struct smp_operations exynos_smp_ops __initdata = { -- cgit v1.2.3