From b5241fb1ca7941fe7d4e2d446e8d753737761a84 Mon Sep 17 00:00:00 2001 From: Soren Brinkmann Date: Tue, 16 Sep 2014 08:08:38 -0700 Subject: ARM: zynq: DT: Fix GEM register area size The size of the GEM's register area is only 0x1000 bytes. Signed-off-by: Soren Brinkmann Signed-off-by: Michal Simek --- arch/arm/boot/dts/zynq-7000.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/arm/boot/dts/zynq-7000.dtsi') diff --git a/arch/arm/boot/dts/zynq-7000.dtsi b/arch/arm/boot/dts/zynq-7000.dtsi index 24036c440440..a5130541200a 100644 --- a/arch/arm/boot/dts/zynq-7000.dtsi +++ b/arch/arm/boot/dts/zynq-7000.dtsi @@ -195,7 +195,7 @@ gem0: ethernet@e000b000 { compatible = "cdns,gem"; - reg = <0xe000b000 0x4000>; + reg = <0xe000b000 0x1000>; status = "disabled"; interrupts = <0 22 4>; clocks = <&clkc 30>, <&clkc 30>, <&clkc 13>; @@ -206,7 +206,7 @@ gem1: ethernet@e000c000 { compatible = "cdns,gem"; - reg = <0xe000c000 0x4000>; + reg = <0xe000c000 0x1000>; status = "disabled"; interrupts = <0 45 4>; clocks = <&clkc 31>, <&clkc 31>, <&clkc 14>; -- cgit v1.2.3 From e8b397754a712f1b3c3fbf448ad836034ecc6643 Mon Sep 17 00:00:00 2001 From: Soren Brinkmann Date: Tue, 23 Sep 2014 11:55:20 -0700 Subject: ARM: zynq: DT: Remove 222 MHz OPP Due to dependencies between timer and CPU frequency, only changes by powers of two are allowed. The clocksource driver prevents other changes, but with cpufreq and its governors it can result in being spammed with error messages constantly. Hence, remove the 222 MHz OPP. Signed-off-by: Soren Brinkmann Signed-off-by: Michal Simek --- arch/arm/boot/dts/zynq-7000.dtsi | 1 - 1 file changed, 1 deletion(-) (limited to 'arch/arm/boot/dts/zynq-7000.dtsi') diff --git a/arch/arm/boot/dts/zynq-7000.dtsi b/arch/arm/boot/dts/zynq-7000.dtsi index a5130541200a..1836a60444fa 100644 --- a/arch/arm/boot/dts/zynq-7000.dtsi +++ b/arch/arm/boot/dts/zynq-7000.dtsi @@ -30,7 +30,6 @@ /* kHz uV */ 666667 1000000 333334 1000000 - 222223 1000000 >; }; -- cgit v1.2.3 From 8abef06b63e639b910d202319be9e8151ac3a1ed Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Wed, 24 Sep 2014 15:16:01 +0200 Subject: ARM: zynq: DT: Add missing address for L2 pl310 By in sync with others node and add also baseaddr to the node name. Signed-off-by: Michal Simek --- arch/arm/boot/dts/zynq-7000.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/boot/dts/zynq-7000.dtsi') diff --git a/arch/arm/boot/dts/zynq-7000.dtsi b/arch/arm/boot/dts/zynq-7000.dtsi index 1836a60444fa..772381fe07bb 100644 --- a/arch/arm/boot/dts/zynq-7000.dtsi +++ b/arch/arm/boot/dts/zynq-7000.dtsi @@ -136,7 +136,7 @@ <0xF8F00100 0x100>; }; - L2: cache-controller { + L2: cache-controller@f8f02000 { compatible = "arm,pl310-cache"; reg = <0xF8F02000 0x1000>; arm,data-latency = <3 2 2>; -- cgit v1.2.3 From 70472c432821f663ff6a404dfae7e8785f0259ea Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Wed, 24 Sep 2014 15:28:59 +0200 Subject: ARM: zynq: DT: Add missing reference for ADC Add missing reference for ADC node. Signed-off-by: Michal Simek --- arch/arm/boot/dts/zynq-7000.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/boot/dts/zynq-7000.dtsi') diff --git a/arch/arm/boot/dts/zynq-7000.dtsi b/arch/arm/boot/dts/zynq-7000.dtsi index 772381fe07bb..fc90f47f9c03 100644 --- a/arch/arm/boot/dts/zynq-7000.dtsi +++ b/arch/arm/boot/dts/zynq-7000.dtsi @@ -64,7 +64,7 @@ interrupt-parent = <&intc>; ranges; - adc@f8007100 { + adc: adc@f8007100 { compatible = "xlnx,zynq-xadc-1.00.a"; reg = <0xf8007100 0x20>; interrupts = <0 7 4>; -- cgit v1.2.3 From 6c7ba4157bfcec1d264c79095eeeae846527cd96 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Wed, 24 Sep 2014 15:53:39 +0200 Subject: ARM: zynq: DT: Add missing reference for memory-controller Add missing reference for memory-controller. Signed-off-by: Michal Simek --- arch/arm/boot/dts/zynq-7000.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/boot/dts/zynq-7000.dtsi') diff --git a/arch/arm/boot/dts/zynq-7000.dtsi b/arch/arm/boot/dts/zynq-7000.dtsi index fc90f47f9c03..2690e6d01f71 100644 --- a/arch/arm/boot/dts/zynq-7000.dtsi +++ b/arch/arm/boot/dts/zynq-7000.dtsi @@ -145,7 +145,7 @@ cache-level = <2>; }; - memory-controller@f8006000 { + mc: memory-controller@f8006000 { compatible = "xlnx,zynq-ddrc-a05"; reg = <0xf8006000 0x1000>; } ; -- cgit v1.2.3 From 6714297b1bb472d3b475af47ed0f91bbe012eea4 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Thu, 2 Oct 2014 15:09:15 +0200 Subject: ARM: zynq: DT: Add cadence watchdog node Add the cadence watchdog node to the Zynq devicetree. Signed-off-by: Michal Simek --- arch/arm/boot/dts/zynq-7000.dtsi | 11 +++++++++++ 1 file changed, 11 insertions(+) (limited to 'arch/arm/boot/dts/zynq-7000.dtsi') diff --git a/arch/arm/boot/dts/zynq-7000.dtsi b/arch/arm/boot/dts/zynq-7000.dtsi index 2690e6d01f71..ea2651cd92ec 100644 --- a/arch/arm/boot/dts/zynq-7000.dtsi +++ b/arch/arm/boot/dts/zynq-7000.dtsi @@ -314,5 +314,16 @@ reg = <0xf8f00600 0x20>; clocks = <&clkc 4>; }; + + watchdog0: watchdog@f8005000 { + clocks = <&clkc 45>; + compatible = "xlnx,zynq-wdt-r1p2"; + device_type = "watchdog"; + interrupt-parent = <&intc>; + interrupts = <0 9 1>; + reg = <0xf8005000 0x1000>; + reset = <0>; + timeout-sec = <10>; + }; }; }; -- cgit v1.2.3 From 2329efbbca2943f03fa1c7306ef2f6a053be0ae5 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Mon, 20 Oct 2014 15:15:47 +0200 Subject: ARM: zynq: DT: trivial: Fix mc node sed -i 's/}\ ;/};/g' Signed-off-by: Michal Simek --- arch/arm/boot/dts/zynq-7000.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/boot/dts/zynq-7000.dtsi') diff --git a/arch/arm/boot/dts/zynq-7000.dtsi b/arch/arm/boot/dts/zynq-7000.dtsi index ea2651cd92ec..ce2ef5bec4f2 100644 --- a/arch/arm/boot/dts/zynq-7000.dtsi +++ b/arch/arm/boot/dts/zynq-7000.dtsi @@ -148,7 +148,7 @@ mc: memory-controller@f8006000 { compatible = "xlnx,zynq-ddrc-a05"; reg = <0xf8006000 0x1000>; - } ; + }; uart0: serial@e0000000 { compatible = "xlnx,xuartps", "cdns,uart-r1p8"; -- cgit v1.2.3