From 9d07d414d4c33d862fc41e22c473a662996b0f4e Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Tue, 24 Feb 2015 06:38:14 +0900 Subject: ARM: shmobile: r8a73a4: ape6evm: Remove legacy platform This removes the remains of the legacy ape6evm platform. Signed-off-by: Ulrich Hecht Acked-by: Laurent Pinchart Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- MAINTAINERS | 1 - 1 file changed, 1 deletion(-) (limited to 'MAINTAINERS') diff --git a/MAINTAINERS b/MAINTAINERS index ddc5a8cf9a8a..5181e7a8d803 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1414,7 +1414,6 @@ F: arch/arm/boot/dts/emev2* F: arch/arm/boot/dts/r7s* F: arch/arm/boot/dts/r8a* F: arch/arm/boot/dts/sh* -F: arch/arm/configs/ape6evm_defconfig F: arch/arm/configs/armadillo800eva_defconfig F: arch/arm/configs/bockw_defconfig F: arch/arm/configs/kzm9g_defconfig -- cgit v1.2.3 From d1e068fd24c399d26880456eb5e117a188d4ce70 Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Mon, 26 Jan 2015 15:19:00 +0900 Subject: ARM: shmobile: mackerel: Remove from MAINTAINERS Remove the mackerel_defconfig from the MAINTAINERS file. Signed-off-by: Magnus Damm Acked-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- MAINTAINERS | 1 - 1 file changed, 1 deletion(-) (limited to 'MAINTAINERS') diff --git a/MAINTAINERS b/MAINTAINERS index ddc5a8cf9a8a..db7c0cf79230 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1418,7 +1418,6 @@ F: arch/arm/configs/ape6evm_defconfig F: arch/arm/configs/armadillo800eva_defconfig F: arch/arm/configs/bockw_defconfig F: arch/arm/configs/kzm9g_defconfig -F: arch/arm/configs/mackerel_defconfig F: arch/arm/configs/marzen_defconfig F: arch/arm/configs/shmobile_defconfig F: arch/arm/include/debug/renesas-scif.S -- cgit v1.2.3 From 28666d6dc3feca2b1983e6011df383299d8b6b64 Mon Sep 17 00:00:00 2001 From: Bob Peterson Date: Fri, 13 Feb 2015 11:23:11 -0600 Subject: Add myself (Bob Peterson) as a maintainer of GFS2 This patch adds Bob Peterson as a maintainer of the GFS2 file system. It also changes the development repository to a shared location rather than Steve Whitehouse's private location. Signed-off-by: Bob Peterson --- MAINTAINERS | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'MAINTAINERS') diff --git a/MAINTAINERS b/MAINTAINERS index ddc5a8cf9a8a..f705c6c1b105 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -4307,10 +4307,10 @@ F: scripts/get_maintainer.pl GFS2 FILE SYSTEM M: Steven Whitehouse +M: Bob Peterson L: cluster-devel@redhat.com W: http://sources.redhat.com/cluster/ -T: git git://git.kernel.org/pub/scm/linux/kernel/git/steve/gfs2-3.0-fixes.git -T: git git://git.kernel.org/pub/scm/linux/kernel/git/steve/gfs2-3.0-nmw.git +T: git git://git.kernel.org/pub/scm/linux/kernel/git/gfs2/linux-gfs2.git S: Supported F: Documentation/filesystems/gfs2*.txt F: fs/gfs2/ -- cgit v1.2.3 From 7be72c2c51de78e806a3d854d12c67d80c11a871 Mon Sep 17 00:00:00 2001 From: Adam Thomson Date: Wed, 18 Feb 2015 14:08:37 +0000 Subject: MAINTAINERS: Include DA9150 files in Dialog Semiconductor support list. Signed-off-by: Adam Thomson Acked-by: Lee Jones Signed-off-by: Sebastian Reichel --- MAINTAINERS | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'MAINTAINERS') diff --git a/MAINTAINERS b/MAINTAINERS index ddc5a8cf9a8a..ace4b8a9e66b 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -3126,12 +3126,15 @@ S: Supported F: Documentation/hwmon/da90?? F: drivers/gpio/gpio-da90??.c F: drivers/hwmon/da90??-hwmon.c +F: drivers/iio/adc/da91??-*.c F: drivers/input/misc/da90??_onkey.c F: drivers/input/touchscreen/da9052_tsi.c F: drivers/leds/leds-da90??.c F: drivers/mfd/da903x.c F: drivers/mfd/da90??-*.c +F: drivers/mfd/da91??-*.c F: drivers/power/da9052-battery.c +F: drivers/power/da91??-*.c F: drivers/regulator/da903x.c F: drivers/regulator/da9???-regulator.[ch] F: drivers/rtc/rtc-da90??.c @@ -3141,6 +3144,7 @@ F: include/linux/mfd/da903x.h F: include/linux/mfd/da9052/ F: include/linux/mfd/da9055/ F: include/linux/mfd/da9063/ +F: include/linux/mfd/da9150/ F: include/sound/da[79]*.h F: sound/soc/codecs/da[79]*.[ch] -- cgit v1.2.3 From 8b7ac017aa0f9b803e9da9caafa5fe9544ecf5c7 Mon Sep 17 00:00:00 2001 From: Ursula Braun Date: Fri, 27 Feb 2015 12:52:34 +0100 Subject: MAINTAINERS: update S390 NETWORK DRIVERS maintainer remove Frank Blaschka as S390 NETWORK DRIVERS maintainer Acked-by: Frank Blaschka Signed-off-by: Ursula Braun Signed-off-by: David S. Miller --- MAINTAINERS | 1 - 1 file changed, 1 deletion(-) (limited to 'MAINTAINERS') diff --git a/MAINTAINERS b/MAINTAINERS index 0597c5b3c4ee..274a0058f3f2 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -8328,7 +8328,6 @@ F: block/partitions/ibm.c S390 NETWORK DRIVERS M: Ursula Braun -M: Frank Blaschka M: linux390@de.ibm.com L: linux-s390@vger.kernel.org W: http://www.ibm.com/developerworks/linux/linux390/ -- cgit v1.2.3 From 2d800897e868ba561733ecffb30d840cbe5c86d4 Mon Sep 17 00:00:00 2001 From: Kenneth Westfield Date: Tue, 3 Mar 2015 16:21:50 -0800 Subject: MAINTAINERS: Add QCOM audio ASoC maintainer Add maintainers for the Qualcomm Technologies sound drivers. Signed-off-by: Kenneth Westfield Acked-by: Banajit Goswami Signed-off-by: Mark Brown --- MAINTAINERS | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'MAINTAINERS') diff --git a/MAINTAINERS b/MAINTAINERS index ddc5a8cf9a8a..9514b794b74d 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -5254,6 +5254,13 @@ F: drivers/char/ipmi/ F: include/linux/ipmi* F: include/uapi/linux/ipmi* +QCOM AUDIO (ASoC) DRIVERS +M: Patrick Lai +M: Banajit Goswami +L: alsa-devel@alsa-project.org (moderated for non-subscribers) +S: Supported +F: sound/soc/qcom/ + IPS SCSI RAID DRIVER M: Adaptec OEM Raid Solutions L: linux-scsi@vger.kernel.org -- cgit v1.2.3 From 980ac4d7db69a3d9970f8eb545f90057afb6785e Mon Sep 17 00:00:00 2001 From: Sudip Mukherjee Date: Tue, 3 Mar 2015 16:21:07 +0530 Subject: MAINTAINERS: update for sm750fb driver add myself and Teddy Wang as the Maintainer of the sm750 frame buffer driver. Signed-off-by: Sudip Mukherjee Signed-off-by: Greg Kroah-Hartman --- MAINTAINERS | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'MAINTAINERS') diff --git a/MAINTAINERS b/MAINTAINERS index ddc5a8cf9a8a..b20311947d97 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -9340,6 +9340,14 @@ L: linux-fbdev@vger.kernel.org S: Maintained F: drivers/staging/sm7xxfb/ +STAGING - SILICON MOTION SM750 FRAME BUFFER DRIVER +M: Sudip Mukherjee +M: Teddy Wang +M: Sudip Mukherjee +L: linux-fbdev@vger.kernel.org +S: Maintained +F: drivers/staging/sm750fb/ + STAGING - SLICOSS M: Lior Dotan M: Christopher Harrer -- cgit v1.2.3 From 31c889653c10ddaf1d2b4a47740e07fa4f10f375 Mon Sep 17 00:00:00 2001 From: "J. German Rivera" Date: Thu, 5 Mar 2015 19:29:09 -0600 Subject: staging: fsl-mc: Added Freescale Management Complex APIs APIs to access the Management Complex (MC) hardware module of Freescale LS2 SoCs. This patch includes APIs to check the MC firmware version and to manipulate DPRC objects in the MC. Signed-off-by: J. German Rivera Signed-off-by: Stuart Yoder Acked-by: Alexander Graf Signed-off-by: Greg Kroah-Hartman --- MAINTAINERS | 6 + drivers/staging/fsl-mc/TODO | 12 + drivers/staging/fsl-mc/bus/dpmng-cmd.h | 47 ++ drivers/staging/fsl-mc/bus/dpmng.c | 78 +++ drivers/staging/fsl-mc/bus/dprc-cmd.h | 84 +++ drivers/staging/fsl-mc/bus/dprc.c | 913 ++++++++++++++++++++++++++++++++ drivers/staging/fsl-mc/bus/mc-sys.c | 283 ++++++++++ drivers/staging/fsl-mc/include/dpmng.h | 80 +++ drivers/staging/fsl-mc/include/dprc.h | 801 ++++++++++++++++++++++++++++ drivers/staging/fsl-mc/include/mc-cmd.h | 113 ++++ drivers/staging/fsl-mc/include/mc-sys.h | 70 +++ 11 files changed, 2487 insertions(+) create mode 100644 drivers/staging/fsl-mc/TODO create mode 100644 drivers/staging/fsl-mc/bus/dpmng-cmd.h create mode 100644 drivers/staging/fsl-mc/bus/dpmng.c create mode 100644 drivers/staging/fsl-mc/bus/dprc-cmd.h create mode 100644 drivers/staging/fsl-mc/bus/dprc.c create mode 100644 drivers/staging/fsl-mc/bus/mc-sys.c create mode 100644 drivers/staging/fsl-mc/include/dpmng.h create mode 100644 drivers/staging/fsl-mc/include/dprc.h create mode 100644 drivers/staging/fsl-mc/include/mc-cmd.h create mode 100644 drivers/staging/fsl-mc/include/mc-sys.h (limited to 'MAINTAINERS') diff --git a/MAINTAINERS b/MAINTAINERS index b20311947d97..db15919dbf1c 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -4145,6 +4145,12 @@ F: sound/soc/fsl/fsl* F: sound/soc/fsl/imx* F: sound/soc/fsl/mpc8610_hpcd.c +FREESCALE QORIQ MANAGEMENT COMPLEX DRIVER +M: J. German Rivera +L: linux-kernel@vger.kernel.org +S: Maintained +F: drivers/staging/fsl-mc/ + FREEVXFS FILESYSTEM M: Christoph Hellwig W: ftp://ftp.openlinux.org/pub/people/hch/vxfs diff --git a/drivers/staging/fsl-mc/TODO b/drivers/staging/fsl-mc/TODO new file mode 100644 index 000000000000..49ebfd90438f --- /dev/null +++ b/drivers/staging/fsl-mc/TODO @@ -0,0 +1,12 @@ +* Add README file (with ASCII art) describing relationships between + DPAA2 objects and how combine them to make a NIC, an LS2 switch, etc. + Also, define all acronyms used. + +* Decide if multiple root fsl-mc buses will be supported per Linux instance, + and if so add support for this. + +* Add at least one device driver for a DPAA2 object (child device of the + fsl-mc bus). + +Please send any patches to Greg Kroah-Hartman , +devel@driverdev.osuosl.org, linux-kernel@vger.kernel.org diff --git a/drivers/staging/fsl-mc/bus/dpmng-cmd.h b/drivers/staging/fsl-mc/bus/dpmng-cmd.h new file mode 100644 index 000000000000..ba8cfa9635dd --- /dev/null +++ b/drivers/staging/fsl-mc/bus/dpmng-cmd.h @@ -0,0 +1,47 @@ +/* Copyright 2013-2014 Freescale Semiconductor Inc. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of the above-listed copyright holders nor the + * names of any contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * + * ALTERNATIVELY, this software may be distributed under the terms of the + * GNU General Public License ("GPL") as published by the Free Software + * Foundation, either version 2 of that License or (at your option) any + * later version. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +/*************************************************************************//* + dpmng-cmd.h + + defines portal commands + + *//**************************************************************************/ + +#ifndef __FSL_DPMNG_CMD_H +#define __FSL_DPMNG_CMD_H + +/* Command IDs */ +#define DPMNG_CMDID_GET_CONT_ID 0x830 +#define DPMNG_CMDID_GET_VERSION 0x831 + +#endif /* __FSL_DPMNG_CMD_H */ diff --git a/drivers/staging/fsl-mc/bus/dpmng.c b/drivers/staging/fsl-mc/bus/dpmng.c new file mode 100644 index 000000000000..58328e8118e9 --- /dev/null +++ b/drivers/staging/fsl-mc/bus/dpmng.c @@ -0,0 +1,78 @@ +/* Copyright 2013-2014 Freescale Semiconductor Inc. +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions are met: +* * Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* * Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in the +* documentation and/or other materials provided with the distribution. +* * Neither the name of the above-listed copyright holders nor the +* names of any contributors may be used to endorse or promote products +* derived from this software without specific prior written permission. +* +* +* ALTERNATIVELY, this software may be distributed under the terms of the +* GNU General Public License ("GPL") as published by the Free Software +* Foundation, either version 2 of that License or (at your option) any +* later version. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE +* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF +* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS +* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +* POSSIBILITY OF SUCH DAMAGE. +*/ +#include "../include/mc-sys.h" +#include "../include/mc-cmd.h" +#include "../include/dpmng.h" +#include "dpmng-cmd.h" + +int mc_get_version(struct fsl_mc_io *mc_io, struct mc_version *mc_ver_info) +{ + struct mc_command cmd = { 0 }; + int err; + + /* prepare command */ + cmd.header = mc_encode_cmd_header(DPMNG_CMDID_GET_VERSION, + MC_CMD_PRI_LOW, 0); + + /* send command to mc*/ + err = mc_send_command(mc_io, &cmd); + if (err) + return err; + + /* retrieve response parameters */ + mc_ver_info->revision = mc_dec(cmd.params[0], 0, 32); + mc_ver_info->major = mc_dec(cmd.params[0], 32, 32); + mc_ver_info->minor = mc_dec(cmd.params[1], 0, 32); + + return 0; +} + +int dpmng_get_container_id(struct fsl_mc_io *mc_io, int *container_id) +{ + struct mc_command cmd = { 0 }; + int err; + + /* prepare command */ + cmd.header = mc_encode_cmd_header(DPMNG_CMDID_GET_CONT_ID, + MC_CMD_PRI_LOW, 0); + + /* send command to mc*/ + err = mc_send_command(mc_io, &cmd); + if (err) + return err; + + /* retrieve response parameters */ + *container_id = mc_dec(cmd.params[0], 0, 32); + + return 0; +} + diff --git a/drivers/staging/fsl-mc/bus/dprc-cmd.h b/drivers/staging/fsl-mc/bus/dprc-cmd.h new file mode 100644 index 000000000000..09202489c2b2 --- /dev/null +++ b/drivers/staging/fsl-mc/bus/dprc-cmd.h @@ -0,0 +1,84 @@ +/* Copyright 2013-2014 Freescale Semiconductor Inc. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of the above-listed copyright holders nor the + * names of any contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * + * ALTERNATIVELY, this software may be distributed under the terms of the + * GNU General Public License ("GPL") as published by the Free Software + * Foundation, either version 2 of that License or (at your option) any + * later version. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +/*************************************************************************//* + dprc-cmd.h + + defines dprc portal commands + + *//**************************************************************************/ + +#ifndef _FSL_DPRC_CMD_H +#define _FSL_DPRC_CMD_H + +/* DPRC Version */ +#define DPRC_VER_MAJOR 3 +#define DPRC_VER_MINOR 0 + +/* Command IDs */ +#define DPRC_CMDID_CLOSE 0x800 +#define DPRC_CMDID_OPEN 0x805 +#define DPRC_CMDID_CREATE 0x905 + +#define DPRC_CMDID_GET_ATTR 0x004 +#define DPRC_CMDID_RESET_CONT 0x005 + +#define DPRC_CMDID_SET_IRQ 0x010 +#define DPRC_CMDID_GET_IRQ 0x011 +#define DPRC_CMDID_SET_IRQ_ENABLE 0x012 +#define DPRC_CMDID_GET_IRQ_ENABLE 0x013 +#define DPRC_CMDID_SET_IRQ_MASK 0x014 +#define DPRC_CMDID_GET_IRQ_MASK 0x015 +#define DPRC_CMDID_GET_IRQ_STATUS 0x016 +#define DPRC_CMDID_CLEAR_IRQ_STATUS 0x017 + +#define DPRC_CMDID_CREATE_CONT 0x151 +#define DPRC_CMDID_DESTROY_CONT 0x152 +#define DPRC_CMDID_SET_RES_QUOTA 0x155 +#define DPRC_CMDID_GET_RES_QUOTA 0x156 +#define DPRC_CMDID_ASSIGN 0x157 +#define DPRC_CMDID_UNASSIGN 0x158 +#define DPRC_CMDID_GET_OBJ_COUNT 0x159 +#define DPRC_CMDID_GET_OBJ 0x15A +#define DPRC_CMDID_GET_RES_COUNT 0x15B +#define DPRC_CMDID_GET_RES_IDS 0x15C +#define DPRC_CMDID_GET_OBJ_REG 0x15E + +#define DPRC_CMDID_CONNECT 0x167 +#define DPRC_CMDID_DISCONNECT 0x168 +#define DPRC_CMDID_GET_POOL 0x169 +#define DPRC_CMDID_GET_POOL_COUNT 0x16A +#define DPRC_CMDID_GET_PORTAL_PADDR 0x16B + +#define DPRC_CMDID_GET_CONNECTION 0x16C + +#endif /* _FSL_DPRC_CMD_H */ diff --git a/drivers/staging/fsl-mc/bus/dprc.c b/drivers/staging/fsl-mc/bus/dprc.c new file mode 100644 index 000000000000..19b26e630b62 --- /dev/null +++ b/drivers/staging/fsl-mc/bus/dprc.c @@ -0,0 +1,913 @@ +/* Copyright 2013-2014 Freescale Semiconductor Inc. +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions are met: +* * Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* * Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in the +* documentation and/or other materials provided with the distribution. +* * Neither the name of the above-listed copyright holders nor the +* names of any contributors may be used to endorse or promote products +* derived from this software without specific prior written permission. +* +* +* ALTERNATIVELY, this software may be distributed under the terms of the +* GNU General Public License ("GPL") as published by the Free Software +* Foundation, either version 2 of that License or (at your option) any +* later version. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE +* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF +* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS +* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +* POSSIBILITY OF SUCH DAMAGE. +*/ +#include "../include/mc-sys.h" +#include "../include/mc-cmd.h" +#include "../include/dprc.h" +#include "dprc-cmd.h" + +int dprc_open(struct fsl_mc_io *mc_io, int container_id, uint16_t *token) +{ + struct mc_command cmd = { 0 }; + int err; + + /* prepare command */ + cmd.header = mc_encode_cmd_header(DPRC_CMDID_OPEN, MC_CMD_PRI_LOW, + 0); + cmd.params[0] |= mc_enc(0, 32, container_id); + + /* send command to mc*/ + err = mc_send_command(mc_io, &cmd); + if (err) + return err; + + /* retrieve response parameters */ + *token = MC_CMD_HDR_READ_TOKEN(cmd.header); + + return 0; +} +EXPORT_SYMBOL(dprc_open); + +int dprc_close(struct fsl_mc_io *mc_io, uint16_t token) +{ + struct mc_command cmd = { 0 }; + + /* prepare command */ + cmd.header = mc_encode_cmd_header(DPRC_CMDID_CLOSE, MC_CMD_PRI_HIGH, + token); + + /* send command to mc*/ + return mc_send_command(mc_io, &cmd); +} +EXPORT_SYMBOL(dprc_close); + +int dprc_create_container(struct fsl_mc_io *mc_io, + uint16_t token, + struct dprc_cfg *cfg, + int *child_container_id, + uint64_t *child_portal_paddr) +{ + struct mc_command cmd = { 0 }; + int err; + + /* prepare command */ + cmd.params[0] |= mc_enc(32, 16, cfg->icid); + cmd.params[0] |= mc_enc(0, 32, cfg->options); + cmd.params[1] |= mc_enc(32, 32, cfg->portal_id); + + cmd.header = mc_encode_cmd_header(DPRC_CMDID_CREATE_CONT, + MC_CMD_PRI_LOW, token); + + /* send command to mc*/ + err = mc_send_command(mc_io, &cmd); + if (err) + return err; + + /* retrieve response parameters */ + *child_container_id = mc_dec(cmd.params[1], 0, 32); + *child_portal_paddr = mc_dec(cmd.params[2], 0, 64); + + return 0; +} + +int dprc_destroy_container(struct fsl_mc_io *mc_io, + uint16_t token, + int child_container_id) +{ + struct mc_command cmd = { 0 }; + + /* prepare command */ + cmd.header = mc_encode_cmd_header(DPRC_CMDID_DESTROY_CONT, + MC_CMD_PRI_LOW, token); + cmd.params[0] |= mc_enc(0, 32, child_container_id); + + /* send command to mc*/ + return mc_send_command(mc_io, &cmd); +} + +int dprc_reset_container(struct fsl_mc_io *mc_io, + uint16_t token, + int child_container_id) +{ + struct mc_command cmd = { 0 }; + + /* prepare command */ + cmd.header = mc_encode_cmd_header(DPRC_CMDID_RESET_CONT, + MC_CMD_PRI_LOW, token); + cmd.params[0] |= mc_enc(0, 32, child_container_id); + + /* send command to mc*/ + return mc_send_command(mc_io, &cmd); +} + +int dprc_get_irq(struct fsl_mc_io *mc_io, + uint16_t token, + uint8_t irq_index, + int *type, + uint64_t *irq_paddr, + uint32_t *irq_val, + int *user_irq_id) +{ + struct mc_command cmd = { 0 }; + int err; + + /* prepare command */ + cmd.header = mc_encode_cmd_header(DPRC_CMDID_GET_IRQ, + MC_CMD_PRI_LOW, + token); + cmd.params[0] |= mc_enc(32, 8, irq_index); + + /* send command to mc*/ + err = mc_send_command(mc_io, &cmd); + if (err) + return err; + + /* retrieve response parameters */ + *irq_val = mc_dec(cmd.params[0], 0, 32); + *irq_paddr = mc_dec(cmd.params[1], 0, 64); + *user_irq_id = mc_dec(cmd.params[2], 0, 32); + *type = mc_dec(cmd.params[2], 32, 32); + + return 0; +} + +int dprc_set_irq(struct fsl_mc_io *mc_io, + uint16_t token, + uint8_t irq_index, + uint64_t irq_paddr, + uint32_t irq_val, + int user_irq_id) +{ + struct mc_command cmd = { 0 }; + + /* prepare command */ + cmd.header = mc_encode_cmd_header(DPRC_CMDID_SET_IRQ, + MC_CMD_PRI_LOW, + token); + cmd.params[0] |= mc_enc(32, 8, irq_index); + cmd.params[0] |= mc_enc(0, 32, irq_val); + cmd.params[1] |= mc_enc(0, 64, irq_paddr); + cmd.params[2] |= mc_enc(0, 32, user_irq_id); + + /* send command to mc*/ + return mc_send_command(mc_io, &cmd); +} + +int dprc_get_irq_enable(struct fsl_mc_io *mc_io, + uint16_t token, + uint8_t irq_index, + uint8_t *en) +{ + struct mc_command cmd = { 0 }; + int err; + + /* prepare command */ + cmd.header = mc_encode_cmd_header(DPRC_CMDID_GET_IRQ_ENABLE, + MC_CMD_PRI_LOW, token); + cmd.params[0] |= mc_enc(32, 8, irq_index); + + /* send command to mc*/ + err = mc_send_command(mc_io, &cmd); + if (err) + return err; + + /* retrieve response parameters */ + *en = mc_dec(cmd.params[0], 0, 8); + + return 0; +} + +int dprc_set_irq_enable(struct fsl_mc_io *mc_io, + uint16_t token, + uint8_t irq_index, + uint8_t en) +{ + struct mc_command cmd = { 0 }; + + /* prepare command */ + cmd.header = mc_encode_cmd_header(DPRC_CMDID_SET_IRQ_ENABLE, + MC_CMD_PRI_LOW, token); + cmd.params[0] |= mc_enc(0, 8, en); + cmd.params[0] |= mc_enc(32, 8, irq_index); + + /* send command to mc*/ + return mc_send_command(mc_io, &cmd); +} + +int dprc_get_irq_mask(struct fsl_mc_io *mc_io, + uint16_t token, + uint8_t irq_index, + uint32_t *mask) +{ + struct mc_command cmd = { 0 }; + int err; + + /* prepare command */ + cmd.header = mc_encode_cmd_header(DPRC_CMDID_GET_IRQ_MASK, + MC_CMD_PRI_LOW, token); + cmd.params[0] |= mc_enc(32, 8, irq_index); + + /* send command to mc*/ + err = mc_send_command(mc_io, &cmd); + if (err) + return err; + + /* retrieve response parameters */ + *mask = mc_dec(cmd.params[0], 0, 32); + + return 0; +} + +int dprc_set_irq_mask(struct fsl_mc_io *mc_io, + uint16_t token, + uint8_t irq_index, + uint32_t mask) +{ + struct mc_command cmd = { 0 }; + + /* prepare command */ + cmd.header = mc_encode_cmd_header(DPRC_CMDID_SET_IRQ_MASK, + MC_CMD_PRI_LOW, token); + cmd.params[0] |= mc_enc(0, 32, mask); + cmd.params[0] |= mc_enc(32, 8, irq_index); + + /* send command to mc*/ + return mc_send_command(mc_io, &cmd); +} + +int dprc_get_irq_status(struct fsl_mc_io *mc_io, + uint16_t token, + uint8_t irq_index, + uint32_t *status) +{ + struct mc_command cmd = { 0 }; + int err; + + /* prepare command */ + cmd.header = mc_encode_cmd_header(DPRC_CMDID_GET_IRQ_STATUS, + MC_CMD_PRI_LOW, token); + cmd.params[0] |= mc_enc(32, 8, irq_index); + + /* send command to mc*/ + err = mc_send_command(mc_io, &cmd); + if (err) + return err; + + /* retrieve response parameters */ + *status = mc_dec(cmd.params[0], 0, 32); + + return 0; +} + +int dprc_clear_irq_status(struct fsl_mc_io *mc_io, + uint16_t token, + uint8_t irq_index, + uint32_t status) +{ + struct mc_command cmd = { 0 }; + + /* prepare command */ + cmd.header = mc_encode_cmd_header(DPRC_CMDID_CLEAR_IRQ_STATUS, + MC_CMD_PRI_LOW, token); + cmd.params[0] |= mc_enc(0, 32, status); + cmd.params[0] |= mc_enc(32, 8, irq_index); + + /* send command to mc*/ + return mc_send_command(mc_io, &cmd); +} + +int dprc_get_attributes(struct fsl_mc_io *mc_io, + uint16_t token, + struct dprc_attributes *attr) +{ + struct mc_command cmd = { 0 }; + int err; + + /* prepare command */ + cmd.header = mc_encode_cmd_header(DPRC_CMDID_GET_ATTR, + MC_CMD_PRI_LOW, + token); + + /* send command to mc*/ + err = mc_send_command(mc_io, &cmd); + if (err) + return err; + + /* retrieve response parameters */ + attr->container_id = mc_dec(cmd.params[0], 0, 32); + attr->icid = mc_dec(cmd.params[0], 32, 16); + attr->options = mc_dec(cmd.params[1], 0, 32); + attr->portal_id = mc_dec(cmd.params[1], 32, 32); + attr->version.major = mc_dec(cmd.params[2], 0, 16); + attr->version.minor = mc_dec(cmd.params[2], 16, 16); + + return 0; +} + +int dprc_set_res_quota(struct fsl_mc_io *mc_io, + uint16_t token, + int child_container_id, + char *type, + uint16_t quota) +{ + struct mc_command cmd = { 0 }; + + /* prepare command */ + cmd.header = mc_encode_cmd_header(DPRC_CMDID_SET_RES_QUOTA, + MC_CMD_PRI_LOW, token); + cmd.params[0] |= mc_enc(0, 32, child_container_id); + cmd.params[0] |= mc_enc(32, 16, quota); + cmd.params[1] |= mc_enc(0, 8, type[0]); + cmd.params[1] |= mc_enc(8, 8, type[1]); + cmd.params[1] |= mc_enc(16, 8, type[2]); + cmd.params[1] |= mc_enc(24, 8, type[3]); + cmd.params[1] |= mc_enc(32, 8, type[4]); + cmd.params[1] |= mc_enc(40, 8, type[5]); + cmd.params[1] |= mc_enc(48, 8, type[6]); + cmd.params[1] |= mc_enc(56, 8, type[7]); + cmd.params[2] |= mc_enc(0, 8, type[8]); + cmd.params[2] |= mc_enc(8, 8, type[9]); + cmd.params[2] |= mc_enc(16, 8, type[10]); + cmd.params[2] |= mc_enc(24, 8, type[11]); + cmd.params[2] |= mc_enc(32, 8, type[12]); + cmd.params[2] |= mc_enc(40, 8, type[13]); + cmd.params[2] |= mc_enc(48, 8, type[14]); + cmd.params[2] |= mc_enc(56, 8, '\0'); + + /* send command to mc*/ + return mc_send_command(mc_io, &cmd); +} + +int dprc_get_res_quota(struct fsl_mc_io *mc_io, + uint16_t token, + int child_container_id, + char *type, + uint16_t *quota) +{ + struct mc_command cmd = { 0 }; + int err; + + /* prepare command */ + cmd.header = mc_encode_cmd_header(DPRC_CMDID_GET_RES_QUOTA, + MC_CMD_PRI_LOW, token); + cmd.params[0] |= mc_enc(0, 32, child_container_id); + cmd.params[1] |= mc_enc(0, 8, type[0]); + cmd.params[1] |= mc_enc(8, 8, type[1]); + cmd.params[1] |= mc_enc(16, 8, type[2]); + cmd.params[1] |= mc_enc(24, 8, type[3]); + cmd.params[1] |= mc_enc(32, 8, type[4]); + cmd.params[1] |= mc_enc(40, 8, type[5]); + cmd.params[1] |= mc_enc(48, 8, type[6]); + cmd.params[1] |= mc_enc(56, 8, type[7]); + cmd.params[2] |= mc_enc(0, 8, type[8]); + cmd.params[2] |= mc_enc(8, 8, type[9]); + cmd.params[2] |= mc_enc(16, 8, type[10]); + cmd.params[2] |= mc_enc(24, 8, type[11]); + cmd.params[2] |= mc_enc(32, 8, type[12]); + cmd.params[2] |= mc_enc(40, 8, type[13]); + cmd.params[2] |= mc_enc(48, 8, type[14]); + cmd.params[2] |= mc_enc(56, 8, '\0'); + + /* send command to mc*/ + err = mc_send_command(mc_io, &cmd); + if (err) + return err; + + /* retrieve response parameters */ + *quota = mc_dec(cmd.params[0], 32, 16); + + return 0; +} + +int dprc_assign(struct fsl_mc_io *mc_io, + uint16_t token, + int container_id, + struct dprc_res_req *res_req) +{ + struct mc_command cmd = { 0 }; + + /* prepare command */ + cmd.header = mc_encode_cmd_header(DPRC_CMDID_ASSIGN, + MC_CMD_PRI_LOW, token); + cmd.params[0] |= mc_enc(0, 32, container_id); + cmd.params[0] |= mc_enc(32, 32, res_req->options); + cmd.params[1] |= mc_enc(0, 32, res_req->num); + cmd.params[1] |= mc_enc(32, 32, res_req->id_base_align); + cmd.params[2] |= mc_enc(0, 8, res_req->type[0]); + cmd.params[2] |= mc_enc(8, 8, res_req->type[1]); + cmd.params[2] |= mc_enc(16, 8, res_req->type[2]); + cmd.params[2] |= mc_enc(24, 8, res_req->type[3]); + cmd.params[2] |= mc_enc(32, 8, res_req->type[4]); + cmd.params[2] |= mc_enc(40, 8, res_req->type[5]); + cmd.params[2] |= mc_enc(48, 8, res_req->type[6]); + cmd.params[2] |= mc_enc(56, 8, res_req->type[7]); + cmd.params[3] |= mc_enc(0, 8, res_req->type[8]); + cmd.params[3] |= mc_enc(8, 8, res_req->type[9]); + cmd.params[3] |= mc_enc(16, 8, res_req->type[10]); + cmd.params[3] |= mc_enc(24, 8, res_req->type[11]); + cmd.params[3] |= mc_enc(32, 8, res_req->type[12]); + cmd.params[3] |= mc_enc(40, 8, res_req->type[13]); + cmd.params[3] |= mc_enc(48, 8, res_req->type[14]); + cmd.params[3] |= mc_enc(56, 8, res_req->type[15]); + + /* send command to mc*/ + return mc_send_command(mc_io, &cmd); +} + +int dprc_unassign(struct fsl_mc_io *mc_io, + uint16_t token, + int child_container_id, + struct dprc_res_req *res_req) +{ + struct mc_command cmd = { 0 }; + + /* prepare command */ + cmd.header = mc_encode_cmd_header(DPRC_CMDID_UNASSIGN, + MC_CMD_PRI_LOW, + token); + cmd.params[0] |= mc_enc(0, 32, child_container_id); + cmd.params[0] |= mc_enc(32, 32, res_req->options); + cmd.params[1] |= mc_enc(0, 32, res_req->num); + cmd.params[1] |= mc_enc(32, 32, res_req->id_base_align); + cmd.params[2] |= mc_enc(0, 8, res_req->type[0]); + cmd.params[2] |= mc_enc(8, 8, res_req->type[1]); + cmd.params[2] |= mc_enc(16, 8, res_req->type[2]); + cmd.params[2] |= mc_enc(24, 8, res_req->type[3]); + cmd.params[2] |= mc_enc(32, 8, res_req->type[4]); + cmd.params[2] |= mc_enc(40, 8, res_req->type[5]); + cmd.params[2] |= mc_enc(48, 8, res_req->type[6]); + cmd.params[2] |= mc_enc(56, 8, res_req->type[7]); + cmd.params[3] |= mc_enc(0, 8, res_req->type[8]); + cmd.params[3] |= mc_enc(8, 8, res_req->type[9]); + cmd.params[3] |= mc_enc(16, 8, res_req->type[10]); + cmd.params[3] |= mc_enc(24, 8, res_req->type[11]); + cmd.params[3] |= mc_enc(32, 8, res_req->type[12]); + cmd.params[3] |= mc_enc(40, 8, res_req->type[13]); + cmd.params[3] |= mc_enc(48, 8, res_req->type[14]); + cmd.params[3] |= mc_enc(56, 8, res_req->type[15]); + + /* send command to mc*/ + return mc_send_command(mc_io, &cmd); +} + +int dprc_get_pool_count(struct fsl_mc_io *mc_io, + uint16_t token, + int *pool_count) +{ + struct mc_command cmd = { 0 }; + int err; + + /* prepare command */ + cmd.header = mc_encode_cmd_header(DPRC_CMDID_GET_POOL_COUNT, + MC_CMD_PRI_LOW, token); + + /* send command to mc*/ + err = mc_send_command(mc_io, &cmd); + if (err) + return err; + + /* retrieve response parameters */ + *pool_count = mc_dec(cmd.params[0], 0, 32); + + return 0; +} + +int dprc_get_pool(struct fsl_mc_io *mc_io, + uint16_t token, + int pool_index, + char *type) +{ + struct mc_command cmd = { 0 }; + int err; + + /* prepare command */ + cmd.header = mc_encode_cmd_header(DPRC_CMDID_GET_POOL, + MC_CMD_PRI_LOW, + token); + cmd.params[0] |= mc_enc(0, 32, pool_index); + + /* send command to mc*/ + err = mc_send_command(mc_io, &cmd); + if (err) + return err; + + /* retrieve response parameters */ + type[0] = mc_dec(cmd.params[1], 0, 8); + type[1] = mc_dec(cmd.params[1], 8, 8); + type[2] = mc_dec(cmd.params[1], 16, 8); + type[3] = mc_dec(cmd.params[1], 24, 8); + type[4] = mc_dec(cmd.params[1], 32, 8); + type[5] = mc_dec(cmd.params[1], 40, 8); + type[6] = mc_dec(cmd.params[1], 48, 8); + type[7] = mc_dec(cmd.params[1], 56, 8); + type[8] = mc_dec(cmd.params[2], 0, 8); + type[9] = mc_dec(cmd.params[2], 8, 8); + type[10] = mc_dec(cmd.params[2], 16, 8); + type[11] = mc_dec(cmd.params[2], 24, 8); + type[12] = mc_dec(cmd.params[2], 32, 8); + type[13] = mc_dec(cmd.params[2], 40, 8); + type[14] = mc_dec(cmd.params[2], 48, 8); + type[15] = '\0'; + + return 0; +} + +int dprc_get_obj_count(struct fsl_mc_io *mc_io, uint16_t token, int *obj_count) +{ + struct mc_command cmd = { 0 }; + int err; + + /* prepare command */ + cmd.header = mc_encode_cmd_header(DPRC_CMDID_GET_OBJ_COUNT, + MC_CMD_PRI_LOW, token); + + /* send command to mc*/ + err = mc_send_command(mc_io, &cmd); + if (err) + return err; + + /* retrieve response parameters */ + *obj_count = mc_dec(cmd.params[0], 32, 32); + + return 0; +} +EXPORT_SYMBOL(dprc_get_obj_count); + +int dprc_get_obj(struct fsl_mc_io *mc_io, + uint16_t token, + int obj_index, + struct dprc_obj_desc *obj_desc) +{ + struct mc_command cmd = { 0 }; + int err; + + /* prepare command */ + cmd.header = mc_encode_cmd_header(DPRC_CMDID_GET_OBJ, + MC_CMD_PRI_LOW, + token); + cmd.params[0] |= mc_enc(0, 32, obj_index); + + /* send command to mc*/ + err = mc_send_command(mc_io, &cmd); + if (err) + return err; + + /* retrieve response parameters */ + obj_desc->id = mc_dec(cmd.params[0], 32, 32); + obj_desc->vendor = mc_dec(cmd.params[1], 0, 16); + obj_desc->irq_count = mc_dec(cmd.params[1], 16, 8); + obj_desc->region_count = mc_dec(cmd.params[1], 24, 8); + obj_desc->state = mc_dec(cmd.params[1], 32, 32); + obj_desc->ver_major = mc_dec(cmd.params[2], 0, 16); + obj_desc->ver_minor = mc_dec(cmd.params[2], 16, 16); + obj_desc->type[0] = mc_dec(cmd.params[3], 0, 8); + obj_desc->type[1] = mc_dec(cmd.params[3], 8, 8); + obj_desc->type[2] = mc_dec(cmd.params[3], 16, 8); + obj_desc->type[3] = mc_dec(cmd.params[3], 24, 8); + obj_desc->type[4] = mc_dec(cmd.params[3], 32, 8); + obj_desc->type[5] = mc_dec(cmd.params[3], 40, 8); + obj_desc->type[6] = mc_dec(cmd.params[3], 48, 8); + obj_desc->type[7] = mc_dec(cmd.params[3], 56, 8); + obj_desc->type[8] = mc_dec(cmd.params[4], 0, 8); + obj_desc->type[9] = mc_dec(cmd.params[4], 8, 8); + obj_desc->type[10] = mc_dec(cmd.params[4], 16, 8); + obj_desc->type[11] = mc_dec(cmd.params[4], 24, 8); + obj_desc->type[12] = mc_dec(cmd.params[4], 32, 8); + obj_desc->type[13] = mc_dec(cmd.params[4], 40, 8); + obj_desc->type[14] = mc_dec(cmd.params[4], 48, 8); + obj_desc->type[15] = '\0'; + + return 0; +} +EXPORT_SYMBOL(dprc_get_obj); + +int dprc_get_res_count(struct fsl_mc_io *mc_io, + uint16_t token, + char *type, + int *res_count) +{ + struct mc_command cmd = { 0 }; + int err; + + *res_count = 0; + + /* prepare command */ + cmd.header = mc_encode_cmd_header(DPRC_CMDID_GET_RES_COUNT, + MC_CMD_PRI_LOW, token); + cmd.params[1] |= mc_enc(0, 8, type[0]); + cmd.params[1] |= mc_enc(8, 8, type[1]); + cmd.params[1] |= mc_enc(16, 8, type[2]); + cmd.params[1] |= mc_enc(24, 8, type[3]); + cmd.params[1] |= mc_enc(32, 8, type[4]); + cmd.params[1] |= mc_enc(40, 8, type[5]); + cmd.params[1] |= mc_enc(48, 8, type[6]); + cmd.params[1] |= mc_enc(56, 8, type[7]); + cmd.params[2] |= mc_enc(0, 8, type[8]); + cmd.params[2] |= mc_enc(8, 8, type[9]); + cmd.params[2] |= mc_enc(16, 8, type[10]); + cmd.params[2] |= mc_enc(24, 8, type[11]); + cmd.params[2] |= mc_enc(32, 8, type[12]); + cmd.params[2] |= mc_enc(40, 8, type[13]); + cmd.params[2] |= mc_enc(48, 8, type[14]); + cmd.params[2] |= mc_enc(56, 8, '\0'); + + /* send command to mc*/ + err = mc_send_command(mc_io, &cmd); + if (err) + return err; + + /* retrieve response parameters */ + *res_count = mc_dec(cmd.params[0], 0, 32); + + return 0; +} +EXPORT_SYMBOL(dprc_get_res_count); + +int dprc_get_res_ids(struct fsl_mc_io *mc_io, + uint16_t token, + char *type, + struct dprc_res_ids_range_desc *range_desc) +{ + struct mc_command cmd = { 0 }; + int err; + + /* prepare command */ + cmd.header = mc_encode_cmd_header(DPRC_CMDID_GET_RES_IDS, + MC_CMD_PRI_LOW, token); + cmd.params[0] |= mc_enc(42, 7, range_desc->iter_status); + cmd.params[1] |= mc_enc(0, 32, range_desc->base_id); + cmd.params[1] |= mc_enc(32, 32, range_desc->last_id); + cmd.params[2] |= mc_enc(0, 8, type[0]); + cmd.params[2] |= mc_enc(8, 8, type[1]); + cmd.params[2] |= mc_enc(16, 8, type[2]); + cmd.params[2] |= mc_enc(24, 8, type[3]); + cmd.params[2] |= mc_enc(32, 8, type[4]); + cmd.params[2] |= mc_enc(40, 8, type[5]); + cmd.params[2] |= mc_enc(48, 8, type[6]); + cmd.params[2] |= mc_enc(56, 8, type[7]); + cmd.params[3] |= mc_enc(0, 8, type[8]); + cmd.params[3] |= mc_enc(8, 8, type[9]); + cmd.params[3] |= mc_enc(16, 8, type[10]); + cmd.params[3] |= mc_enc(24, 8, type[11]); + cmd.params[3] |= mc_enc(32, 8, type[12]); + cmd.params[3] |= mc_enc(40, 8, type[13]); + cmd.params[3] |= mc_enc(48, 8, type[14]); + cmd.params[3] |= mc_enc(56, 8, '\0'); + + /* send command to mc*/ + err = mc_send_command(mc_io, &cmd); + if (err) + return err; + + /* retrieve response parameters */ + range_desc->iter_status = mc_dec(cmd.params[0], 42, 7); + range_desc->base_id = mc_dec(cmd.params[1], 0, 32); + range_desc->last_id = mc_dec(cmd.params[1], 32, 32); + + return 0; +} +EXPORT_SYMBOL(dprc_get_res_ids); + +int dprc_get_portal_paddr(struct fsl_mc_io *mc_io, + uint16_t token, + int portal_id, + uint64_t *portal_addr) +{ + struct mc_command cmd = { 0 }; + int err; + + /* prepare command */ + cmd.header = mc_encode_cmd_header(DPRC_CMDID_GET_PORTAL_PADDR, + MC_CMD_PRI_LOW, token); + cmd.params[0] |= mc_enc(0, 32, portal_id); + + /* send command to mc*/ + err = mc_send_command(mc_io, &cmd); + if (err) + return err; + + /* retrieve response parameters */ + *portal_addr = mc_dec(cmd.params[1], 0, 64); + + return 0; +} +EXPORT_SYMBOL(dprc_get_portal_paddr); + +int dprc_get_obj_region(struct fsl_mc_io *mc_io, + uint16_t token, + char *obj_type, + int obj_id, + uint8_t region_index, + struct dprc_region_desc *region_desc) +{ + struct mc_command cmd = { 0 }; + int err; + + /* prepare command */ + cmd.header = mc_encode_cmd_header(DPRC_CMDID_GET_OBJ_REG, + MC_CMD_PRI_LOW, token); + cmd.params[0] |= mc_enc(0, 32, obj_id); + cmd.params[0] |= mc_enc(48, 8, region_index); + cmd.params[3] |= mc_enc(0, 8, obj_type[0]); + cmd.params[3] |= mc_enc(8, 8, obj_type[1]); + cmd.params[3] |= mc_enc(16, 8, obj_type[2]); + cmd.params[3] |= mc_enc(24, 8, obj_type[3]); + cmd.params[3] |= mc_enc(32, 8, obj_type[4]); + cmd.params[3] |= mc_enc(40, 8, obj_type[5]); + cmd.params[3] |= mc_enc(48, 8, obj_type[6]); + cmd.params[3] |= mc_enc(56, 8, obj_type[7]); + cmd.params[4] |= mc_enc(0, 8, obj_type[8]); + cmd.params[4] |= mc_enc(8, 8, obj_type[9]); + cmd.params[4] |= mc_enc(16, 8, obj_type[10]); + cmd.params[4] |= mc_enc(24, 8, obj_type[11]); + cmd.params[4] |= mc_enc(32, 8, obj_type[12]); + cmd.params[4] |= mc_enc(40, 8, obj_type[13]); + cmd.params[4] |= mc_enc(48, 8, obj_type[14]); + cmd.params[4] |= mc_enc(56, 8, '\0'); + + /* send command to mc*/ + err = mc_send_command(mc_io, &cmd); + if (err) + return err; + + /* retrieve response parameters */ + region_desc->base_paddr = mc_dec(cmd.params[1], 0, 64); + region_desc->size = mc_dec(cmd.params[2], 0, 32); + + return 0; +} +EXPORT_SYMBOL(dprc_get_obj_region); + +int dprc_connect(struct fsl_mc_io *mc_io, + uint16_t token, + const struct dprc_endpoint *endpoint1, + const struct dprc_endpoint *endpoint2) +{ + struct mc_command cmd = { 0 }; + + /* prepare command */ + cmd.header = mc_encode_cmd_header(DPRC_CMDID_CONNECT, + MC_CMD_PRI_LOW, + token); + cmd.params[0] |= mc_enc(0, 32, endpoint1->id); + cmd.params[0] |= mc_enc(32, 32, endpoint1->interface_id); + cmd.params[1] |= mc_enc(0, 32, endpoint2->id); + cmd.params[1] |= mc_enc(32, 32, endpoint2->interface_id); + cmd.params[2] |= mc_enc(0, 8, endpoint1->type[0]); + cmd.params[2] |= mc_enc(8, 8, endpoint1->type[1]); + cmd.params[2] |= mc_enc(16, 8, endpoint1->type[2]); + cmd.params[2] |= mc_enc(24, 8, endpoint1->type[3]); + cmd.params[2] |= mc_enc(32, 8, endpoint1->type[4]); + cmd.params[2] |= mc_enc(40, 8, endpoint1->type[5]); + cmd.params[2] |= mc_enc(48, 8, endpoint1->type[6]); + cmd.params[2] |= mc_enc(56, 8, endpoint1->type[7]); + cmd.params[3] |= mc_enc(0, 8, endpoint1->type[8]); + cmd.params[3] |= mc_enc(8, 8, endpoint1->type[9]); + cmd.params[3] |= mc_enc(16, 8, endpoint1->type[10]); + cmd.params[3] |= mc_enc(24, 8, endpoint1->type[11]); + cmd.params[3] |= mc_enc(32, 8, endpoint1->type[12]); + cmd.params[3] |= mc_enc(40, 8, endpoint1->type[13]); + cmd.params[3] |= mc_enc(48, 8, endpoint1->type[14]); + cmd.params[3] |= mc_enc(56, 8, endpoint1->type[15]); + cmd.params[5] |= mc_enc(0, 8, endpoint2->type[0]); + cmd.params[5] |= mc_enc(8, 8, endpoint2->type[1]); + cmd.params[5] |= mc_enc(16, 8, endpoint2->type[2]); + cmd.params[5] |= mc_enc(24, 8, endpoint2->type[3]); + cmd.params[5] |= mc_enc(32, 8, endpoint2->type[4]); + cmd.params[5] |= mc_enc(40, 8, endpoint2->type[5]); + cmd.params[5] |= mc_enc(48, 8, endpoint2->type[6]); + cmd.params[5] |= mc_enc(56, 8, endpoint2->type[7]); + cmd.params[6] |= mc_enc(0, 8, endpoint2->type[8]); + cmd.params[6] |= mc_enc(8, 8, endpoint2->type[9]); + cmd.params[6] |= mc_enc(16, 8, endpoint2->type[10]); + cmd.params[6] |= mc_enc(24, 8, endpoint2->type[11]); + cmd.params[6] |= mc_enc(32, 8, endpoint2->type[12]); + cmd.params[6] |= mc_enc(40, 8, endpoint2->type[13]); + cmd.params[6] |= mc_enc(48, 8, endpoint2->type[14]); + cmd.params[6] |= mc_enc(56, 8, endpoint2->type[15]); + + /* send command to mc*/ + return mc_send_command(mc_io, &cmd); +} + +int dprc_disconnect(struct fsl_mc_io *mc_io, + uint16_t token, + const struct dprc_endpoint *endpoint) +{ + struct mc_command cmd = { 0 }; + + /* prepare command */ + cmd.header = mc_encode_cmd_header(DPRC_CMDID_DISCONNECT, + MC_CMD_PRI_LOW, + token); + cmd.params[0] |= mc_enc(0, 32, endpoint->id); + cmd.params[0] |= mc_enc(32, 32, endpoint->interface_id); + cmd.params[1] |= mc_enc(0, 8, endpoint->type[0]); + cmd.params[1] |= mc_enc(8, 8, endpoint->type[1]); + cmd.params[1] |= mc_enc(16, 8, endpoint->type[2]); + cmd.params[1] |= mc_enc(24, 8, endpoint->type[3]); + cmd.params[1] |= mc_enc(32, 8, endpoint->type[4]); + cmd.params[1] |= mc_enc(40, 8, endpoint->type[5]); + cmd.params[1] |= mc_enc(48, 8, endpoint->type[6]); + cmd.params[1] |= mc_enc(56, 8, endpoint->type[7]); + cmd.params[2] |= mc_enc(0, 8, endpoint->type[8]); + cmd.params[2] |= mc_enc(8, 8, endpoint->type[9]); + cmd.params[2] |= mc_enc(16, 8, endpoint->type[10]); + cmd.params[2] |= mc_enc(24, 8, endpoint->type[11]); + cmd.params[2] |= mc_enc(32, 8, endpoint->type[12]); + cmd.params[2] |= mc_enc(40, 8, endpoint->type[13]); + cmd.params[2] |= mc_enc(48, 8, endpoint->type[14]); + cmd.params[2] |= mc_enc(56, 8, endpoint->type[15]); + + /* send command to mc*/ + return mc_send_command(mc_io, &cmd); +} + +int dprc_get_connection(struct fsl_mc_io *mc_io, + uint16_t token, + const struct dprc_endpoint *endpoint1, + struct dprc_endpoint *endpoint2, + int *state) +{ + struct mc_command cmd = { 0 }; + int err; + + /* prepare command */ + cmd.header = mc_encode_cmd_header(DPRC_CMDID_GET_CONNECTION, + MC_CMD_PRI_LOW, + token); + cmd.params[0] |= mc_enc(0, 32, endpoint1->id); + cmd.params[0] |= mc_enc(32, 32, endpoint1->interface_id); + cmd.params[1] |= mc_enc(0, 8, endpoint1->type[0]); + cmd.params[1] |= mc_enc(8, 8, endpoint1->type[1]); + cmd.params[1] |= mc_enc(16, 8, endpoint1->type[2]); + cmd.params[1] |= mc_enc(24, 8, endpoint1->type[3]); + cmd.params[1] |= mc_enc(32, 8, endpoint1->type[4]); + cmd.params[1] |= mc_enc(40, 8, endpoint1->type[5]); + cmd.params[1] |= mc_enc(48, 8, endpoint1->type[6]); + cmd.params[1] |= mc_enc(56, 8, endpoint1->type[7]); + cmd.params[2] |= mc_enc(0, 8, endpoint1->type[8]); + cmd.params[2] |= mc_enc(8, 8, endpoint1->type[9]); + cmd.params[2] |= mc_enc(16, 8, endpoint1->type[10]); + cmd.params[2] |= mc_enc(24, 8, endpoint1->type[11]); + cmd.params[2] |= mc_enc(32, 8, endpoint1->type[12]); + cmd.params[2] |= mc_enc(40, 8, endpoint1->type[13]); + cmd.params[2] |= mc_enc(48, 8, endpoint1->type[14]); + cmd.params[2] |= mc_enc(56, 8, endpoint1->type[15]); + + /* send command to mc*/ + err = mc_send_command(mc_io, &cmd); + if (err) + return err; + + /* retrieve response parameters */ + endpoint2->id = mc_dec(cmd.params[3], 0, 32); + endpoint2->interface_id = mc_dec(cmd.params[3], 32, 32); + endpoint2->type[0] = mc_dec(cmd.params[4], 0, 8); + endpoint2->type[1] = mc_dec(cmd.params[4], 8, 8); + endpoint2->type[2] = mc_dec(cmd.params[4], 16, 8); + endpoint2->type[3] = mc_dec(cmd.params[4], 24, 8); + endpoint2->type[4] = mc_dec(cmd.params[4], 32, 8); + endpoint2->type[5] = mc_dec(cmd.params[4], 40, 8); + endpoint2->type[6] = mc_dec(cmd.params[4], 48, 8); + endpoint2->type[7] = mc_dec(cmd.params[4], 56, 8); + endpoint2->type[8] = mc_dec(cmd.params[5], 0, 8); + endpoint2->type[9] = mc_dec(cmd.params[5], 8, 8); + endpoint2->type[10] = mc_dec(cmd.params[5], 16, 8); + endpoint2->type[11] = mc_dec(cmd.params[5], 24, 8); + endpoint2->type[12] = mc_dec(cmd.params[5], 32, 8); + endpoint2->type[13] = mc_dec(cmd.params[5], 40, 8); + endpoint2->type[14] = mc_dec(cmd.params[5], 48, 8); + endpoint2->type[15] = mc_dec(cmd.params[5], 56, 8); + *state = mc_dec(cmd.params[6], 0, 32); + + return 0; +} diff --git a/drivers/staging/fsl-mc/bus/mc-sys.c b/drivers/staging/fsl-mc/bus/mc-sys.c new file mode 100644 index 000000000000..a07064a9bc9a --- /dev/null +++ b/drivers/staging/fsl-mc/bus/mc-sys.c @@ -0,0 +1,283 @@ +/* Copyright 2013-2014 Freescale Semiconductor Inc. + * + * I/O services to send MC commands to the MC hardware + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of the above-listed copyright holders nor the + * names of any contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * + * ALTERNATIVELY, this software may be distributed under the terms of the + * GNU General Public License ("GPL") as published by the Free Software + * Foundation, either version 2 of that License or (at your option) any + * later version. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#include "../include/mc-sys.h" +#include "../include/mc-cmd.h" +#include +#include +#include +#include + +/** + * Timeout in jiffies to wait for the completion of an MC command + */ +#define MC_CMD_COMPLETION_TIMEOUT_JIFFIES (HZ / 2) /* 500 ms */ + +/* + * usleep_range() min and max values used to throttle down polling + * iterations while waiting for MC command completion + */ +#define MC_CMD_COMPLETION_POLLING_MIN_SLEEP_USECS 10 +#define MC_CMD_COMPLETION_POLLING_MAX_SLEEP_USECS 500 + +#define MC_CMD_HDR_READ_CMDID(_hdr) \ + ((uint16_t)mc_dec((_hdr), MC_CMD_HDR_CMDID_O, MC_CMD_HDR_CMDID_S)) + +/** + * Creates an MC I/O object + * + * @dev: device to be associated with the MC I/O object + * @mc_portal_phys_addr: physical address of the MC portal to use + * @mc_portal_size: size in bytes of the MC portal + * @flags: flags for the new MC I/O object + * @new_mc_io: Area to return pointer to newly created MC I/O object + * + * Returns '0' on Success; Error code otherwise. + */ +int __must_check fsl_create_mc_io(struct device *dev, + phys_addr_t mc_portal_phys_addr, + uint32_t mc_portal_size, + uint32_t flags, struct fsl_mc_io **new_mc_io) +{ + struct fsl_mc_io *mc_io; + void __iomem *mc_portal_virt_addr; + struct resource *res; + + mc_io = devm_kzalloc(dev, sizeof(*mc_io), GFP_KERNEL); + if (!mc_io) + return -ENOMEM; + + mc_io->dev = dev; + mc_io->flags = flags; + mc_io->portal_phys_addr = mc_portal_phys_addr; + mc_io->portal_size = mc_portal_size; + res = devm_request_mem_region(dev, + mc_portal_phys_addr, + mc_portal_size, + "mc_portal"); + if (!res) { + dev_err(dev, + "devm_request_mem_region failed for MC portal %#llx\n", + mc_portal_phys_addr); + return -EBUSY; + } + + mc_portal_virt_addr = devm_ioremap_nocache(dev, + mc_portal_phys_addr, + mc_portal_size); + if (!mc_portal_virt_addr) { + dev_err(dev, + "devm_ioremap_nocache failed for MC portal %#llx\n", + mc_portal_phys_addr); + return -ENXIO; + } + + mc_io->portal_virt_addr = mc_portal_virt_addr; + *new_mc_io = mc_io; + return 0; +} +EXPORT_SYMBOL_GPL(fsl_create_mc_io); + +/** + * Destroys an MC I/O object + * + * @mc_io: MC I/O object to destroy + */ +void fsl_destroy_mc_io(struct fsl_mc_io *mc_io) +{ + devm_iounmap(mc_io->dev, mc_io->portal_virt_addr); + devm_release_mem_region(mc_io->dev, + mc_io->portal_phys_addr, + mc_io->portal_size); + + mc_io->portal_virt_addr = NULL; + devm_kfree(mc_io->dev, mc_io); +} +EXPORT_SYMBOL_GPL(fsl_destroy_mc_io); + +static int mc_status_to_error(enum mc_cmd_status status) +{ + static const int mc_status_to_error_map[] = { + [MC_CMD_STATUS_OK] = 0, + [MC_CMD_STATUS_AUTH_ERR] = -EACCES, + [MC_CMD_STATUS_NO_PRIVILEGE] = -EPERM, + [MC_CMD_STATUS_DMA_ERR] = -EIO, + [MC_CMD_STATUS_CONFIG_ERR] = -ENXIO, + [MC_CMD_STATUS_TIMEOUT] = -ETIMEDOUT, + [MC_CMD_STATUS_NO_RESOURCE] = -ENAVAIL, + [MC_CMD_STATUS_NO_MEMORY] = -ENOMEM, + [MC_CMD_STATUS_BUSY] = -EBUSY, + [MC_CMD_STATUS_UNSUPPORTED_OP] = -ENOTSUPP, + [MC_CMD_STATUS_INVALID_STATE] = -ENODEV, + }; + + if (WARN_ON((u32)status >= ARRAY_SIZE(mc_status_to_error_map))) + return -EINVAL; + + return mc_status_to_error_map[status]; +} + +static const char *mc_status_to_string(enum mc_cmd_status status) +{ + static const char *const status_strings[] = { + [MC_CMD_STATUS_OK] = "Command completed successfully", + [MC_CMD_STATUS_READY] = "Command ready to be processed", + [MC_CMD_STATUS_AUTH_ERR] = "Authentication error", + [MC_CMD_STATUS_NO_PRIVILEGE] = "No privilege", + [MC_CMD_STATUS_DMA_ERR] = "DMA or I/O error", + [MC_CMD_STATUS_CONFIG_ERR] = "Configuration error", + [MC_CMD_STATUS_TIMEOUT] = "Operation timed out", + [MC_CMD_STATUS_NO_RESOURCE] = "No resources", + [MC_CMD_STATUS_NO_MEMORY] = "No memory available", + [MC_CMD_STATUS_BUSY] = "Device is busy", + [MC_CMD_STATUS_UNSUPPORTED_OP] = "Unsupported operation", + [MC_CMD_STATUS_INVALID_STATE] = "Invalid state" + }; + + if ((unsigned int)status >= ARRAY_SIZE(status_strings)) + return "Unknown MC error"; + + return status_strings[status]; +} + +/** + * mc_write_command - writes a command to a Management Complex (MC) portal + * + * @portal: pointer to an MC portal + * @cmd: pointer to a filled command + */ +static inline void mc_write_command(struct mc_command __iomem *portal, + struct mc_command *cmd) +{ + int i; + + /* copy command parameters into the portal */ + for (i = 0; i < MC_CMD_NUM_OF_PARAMS; i++) + writeq(cmd->params[i], &portal->params[i]); + + /* submit the command by writing the header */ + writeq(cmd->header, &portal->header); +} + +/** + * mc_read_response - reads the response for the last MC command from a + * Management Complex (MC) portal + * + * @portal: pointer to an MC portal + * @resp: pointer to command response buffer + * + * Returns MC_CMD_STATUS_OK on Success; Error code otherwise. + */ +static inline enum mc_cmd_status mc_read_response(struct mc_command __iomem * + portal, + struct mc_command *resp) +{ + int i; + enum mc_cmd_status status; + + /* Copy command response header from MC portal: */ + resp->header = readq(&portal->header); + status = MC_CMD_HDR_READ_STATUS(resp->header); + if (status != MC_CMD_STATUS_OK) + return status; + + /* Copy command response data from MC portal: */ + for (i = 0; i < MC_CMD_NUM_OF_PARAMS; i++) + resp->params[i] = readq(&portal->params[i]); + + return status; +} + +/** + * Sends an command to the MC device using the given MC I/O object + * + * @mc_io: MC I/O object to be used + * @cmd: command to be sent + * + * Returns '0' on Success; Error code otherwise. + * + * NOTE: This function cannot be invoked from from atomic contexts. + */ +int mc_send_command(struct fsl_mc_io *mc_io, struct mc_command *cmd) +{ + enum mc_cmd_status status; + unsigned long jiffies_until_timeout = + jiffies + MC_CMD_COMPLETION_TIMEOUT_JIFFIES; + + /* + * Send command to the MC hardware: + */ + mc_write_command(mc_io->portal_virt_addr, cmd); + + /* + * Wait for response from the MC hardware: + */ + for (;;) { + status = mc_read_response(mc_io->portal_virt_addr, cmd); + if (status != MC_CMD_STATUS_READY) + break; + + /* + * TODO: When MC command completion interrupts are supported + * call wait function here instead of usleep_range() + */ + usleep_range(MC_CMD_COMPLETION_POLLING_MIN_SLEEP_USECS, + MC_CMD_COMPLETION_POLLING_MAX_SLEEP_USECS); + + if (time_after_eq(jiffies, jiffies_until_timeout)) { + pr_debug("MC command timed out (portal: %#llx, obj handle: %#x, command: %#x)\n", + mc_io->portal_phys_addr, + (unsigned int) + MC_CMD_HDR_READ_TOKEN(cmd->header), + (unsigned int) + MC_CMD_HDR_READ_CMDID(cmd->header)); + + return -ETIMEDOUT; + } + } + + if (status != MC_CMD_STATUS_OK) { + pr_debug("MC command failed: portal: %#llx, obj handle: %#x, command: %#x, status: %s (%#x)\n", + mc_io->portal_phys_addr, + (unsigned int)MC_CMD_HDR_READ_TOKEN(cmd->header), + (unsigned int)MC_CMD_HDR_READ_CMDID(cmd->header), + mc_status_to_string(status), + (unsigned int)status); + + return mc_status_to_error(status); + } + + return 0; +} +EXPORT_SYMBOL(mc_send_command); diff --git a/drivers/staging/fsl-mc/include/dpmng.h b/drivers/staging/fsl-mc/include/dpmng.h new file mode 100644 index 000000000000..0fc0a57490bb --- /dev/null +++ b/drivers/staging/fsl-mc/include/dpmng.h @@ -0,0 +1,80 @@ +/* Copyright 2013-2015 Freescale Semiconductor Inc. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of the above-listed copyright holders nor the + * names of any contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * + * ALTERNATIVELY, this software may be distributed under the terms of the + * GNU General Public License ("GPL") as published by the Free Software + * Foundation, either version 2 of that License or (at your option) any + * later version. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ +#ifndef __FSL_DPMNG_H +#define __FSL_DPMNG_H + +/* Management Complex General API + * Contains general API for the Management Complex firmware + */ + +struct fsl_mc_io; + +/** + * Management Complex firmware version information + */ +#define MC_VER_MAJOR 5 +#define MC_VER_MINOR 0 + +/** + * struct mc_versoin + * @major: Major version number: incremented on API compatibility changes + * @minor: Minor version number: incremented on API additions (that are + * backward compatible); reset when major version is incremented + * @revision: Internal revision number: incremented on implementation changes + * and/or bug fixes that have no impact on API + */ +struct mc_version { + uint32_t major; + uint32_t minor; + uint32_t revision; +}; + +/** + * mc_get_version() - Retrieves the Management Complex firmware + * version information + * @mc_io: Pointer to opaque I/O object + * @mc_ver_info: Returned version information structure + * + * Return: '0' on Success; Error code otherwise. + */ +int mc_get_version(struct fsl_mc_io *mc_io, struct mc_version *mc_ver_info); + +/** + * dpmng_get_container_id() - Get container ID associated with a given portal. + * @mc_io: Pointer to MC portal's I/O object + * @container_id: Requested container ID + * + * Return: '0' on Success; Error code otherwise. + */ +int dpmng_get_container_id(struct fsl_mc_io *mc_io, int *container_id); + +#endif /* __FSL_DPMNG_H */ diff --git a/drivers/staging/fsl-mc/include/dprc.h b/drivers/staging/fsl-mc/include/dprc.h new file mode 100644 index 000000000000..f1862a78a409 --- /dev/null +++ b/drivers/staging/fsl-mc/include/dprc.h @@ -0,0 +1,801 @@ +/* Copyright 2013-2015 Freescale Semiconductor Inc. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of the above-listed copyright holders nor the + * names of any contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * + * ALTERNATIVELY, this software may be distributed under the terms of the + * GNU General Public License ("GPL") as published by the Free Software + * Foundation, either version 2 of that License or (at your option) any + * later version. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ +#ifndef _FSL_DPRC_H +#define _FSL_DPRC_H + +/* Data Path Resource Container API + * Contains DPRC API for managing and querying DPAA resources + */ + +struct fsl_mc_io; + +/** + * Set this value as the icid value in dprc_cfg structure when creating a + * container, in case the ICID is not selected by the user and should be + * allocated by the DPRC from the pool of ICIDs. + */ +#define DPRC_GET_ICID_FROM_POOL (uint16_t)(~(0)) + +/** + * Set this value as the portal_id value in dprc_cfg structure when creating a + * container, in case the portal ID is not specifically selected by the + * user and should be allocated by the DPRC from the pool of portal ids. + */ +#define DPRC_GET_PORTAL_ID_FROM_POOL (int)(~(0)) + +/** + * dprc_open() - Open DPRC object for use + * @mc_io: Pointer to MC portal's I/O object + * @container_id: Container ID to open + * @token: Returned token of DPRC object + * + * Return: '0' on Success; Error code otherwise. + * + * @warning Required before any operation on the object. + */ +int dprc_open(struct fsl_mc_io *mc_io, int container_id, uint16_t *token); + +/** + * dprc_close() - Close the control session of the object + * @mc_io: Pointer to MC portal's I/O object + * @token: Token of DPRC object + * + * After this function is called, no further operations are + * allowed on the object without opening a new control session. + * + * Return: '0' on Success; Error code otherwise. + */ +int dprc_close(struct fsl_mc_io *mc_io, uint16_t token); + +/** + * Container general options + * + * These options may be selected at container creation by the container creator + * and can be retrieved using dprc_get_attributes() + */ + +/* Spawn Policy Option allowed - Indicates that the new container is allowed + * to spawn and have its own child containers. + */ +#define DPRC_CFG_OPT_SPAWN_ALLOWED 0x00000001 + +/* General Container allocation policy - Indicates that the new container is + * allowed to allocate requested resources from its parent container; if not + * set, the container is only allowed to use resources in its own pools; Note + * that this is a container's global policy, but the parent container may + * override it and set specific quota per resource type. + */ +#define DPRC_CFG_OPT_ALLOC_ALLOWED 0x00000002 + +/* Object initialization allowed - software context associated with this + * container is allowed to invoke object initialization operations. + */ +#define DPRC_CFG_OPT_OBJ_CREATE_ALLOWED 0x00000004 + +/* Topology change allowed - software context associated with this + * container is allowed to invoke topology operations, such as attach/detach + * of network objects. + */ +#define DPRC_CFG_OPT_TOPOLOGY_CHANGES_ALLOWED 0x00000008 + +/* IOMMU bypass - indicates whether objects of this container are permitted + * to bypass the IOMMU. + */ +#define DPRC_CFG_OPT_IOMMU_BYPASS 0x00000010 + +/* AIOP - Indicates that container belongs to AIOP. */ +#define DPRC_CFG_OPT_AIOP 0x00000020 + +/** + * struct dprc_cfg - Container configuration options + * @icid: Container's ICID; if set to 'DPRC_GET_ICID_FROM_POOL', a free + * ICID value is allocated by the DPRC + * @portal_id: Portal ID; if set to 'DPRC_GET_PORTAL_ID_FROM_POOL', a free + * portal ID is allocated by the DPRC + * @options: Combination of 'DPRC_CFG_OPT_' options + */ +struct dprc_cfg { + uint16_t icid; + int portal_id; + uint64_t options; +}; + +/** + * dprc_create_container() - Create child container + * @mc_io: Pointer to MC portal's I/O object + * @token: Token of DPRC object + * @cfg: Child container configuration + * @child_container_id: Returned child container ID + * @child_portal_paddr: Returned base physical address of the + * child portal + * + * Return: '0' on Success; Error code otherwise. + */ +int dprc_create_container(struct fsl_mc_io *mc_io, + uint16_t token, + struct dprc_cfg *cfg, + int *child_container_id, + uint64_t *child_portal_paddr); + +/** + * dprc_destroy_container() - Destroy child container. + * @mc_io: Pointer to MC portal's I/O object + * @token: Token of DPRC object + * @child_container_id: ID of the container to destroy + * + * This function terminates the child container, so following this call the + * child container ID becomes invalid. + * + * Notes: + * - All resources and objects of the destroyed container are returned to the + * parent container or destroyed if were created be the destroyed container. + * - This function destroy all the child containers of the specified + * container prior to destroying the container itself. + * + * warning: Only the parent container is allowed to destroy a child policy + * Container 0 can't be destroyed + * + * Return: '0' on Success; Error code otherwise. + * + */ +int dprc_destroy_container(struct fsl_mc_io *mc_io, + uint16_t token, + int child_container_id); + +/** + * dprc_reset_container - Reset child container. + * @mc_io: Pointer to MC portal's I/O object + * @token: Token of DPRC object + * @child_container_id: ID of the container to reset + * + * In case a software context crashes or becomes non-responsive, the parent + * may wish to reset its resources container before the software context is + * restarted. + * + * This routine informs all objects assigned to the child container that the + * container is being reset, so they may perform any cleanup operations that are + * needed. All objects handles that were owned by the child container shall be + * closed. + * + * Note that such request may be submitted even if the child software context + * has not crashed, but the resulting object cleanup operations will not be + * aware of that. + * + * Return: '0' on Success; Error code otherwise. + */ +int dprc_reset_container(struct fsl_mc_io *mc_io, + uint16_t token, + int child_container_id); + +/* IRQ */ + +/* Number of dprc's IRQs */ +#define DPRC_NUM_OF_IRQS 1 + +/* Object irq events */ + +/* IRQ event - Indicates that a new object assigned to the container */ +#define DPRC_IRQ_EVENT_OBJ_ADDED 0x00000001 +/* IRQ event - Indicates that an object was unassigned from the container */ +#define DPRC_IRQ_EVENT_OBJ_REMOVED 0x00000002 +/* IRQ event - Indicates that resources assigned to the container */ +#define DPRC_IRQ_EVENT_RES_ADDED 0x00000004 +/* IRQ event - Indicates that resources unassigned from the container */ +#define DPRC_IRQ_EVENT_RES_REMOVED 0x00000008 +/* IRQ event - Indicates that one of the descendant containers that opened by + * this container is destroyed + */ +#define DPRC_IRQ_EVENT_CONTAINER_DESTROYED 0x00000010 + +/* IRQ event - Indicates that on one of the container's opened object is + * destroyed + */ +#define DPRC_IRQ_EVENT_OBJ_DESTROYED 0x00000020 + +/* Irq event - Indicates that object is created at the container */ +#define DPRC_IRQ_EVENT_OBJ_CREATED 0x00000040 + +/** + * dprc_set_irq() - Set IRQ information for the DPRC to trigger an interrupt. + * @mc_io: Pointer to MC portal's I/O object + * @token: Token of DPRC object + * @irq_index: Identifies the interrupt index to configure + * @irq_addr: Address that must be written to + * signal a message-based interrupt + * @irq_val: Value to write into irq_addr address + * @user_irq_id: Returned a user defined number associated with this IRQ + * + * Return: '0' on Success; Error code otherwise. + */ +int dprc_set_irq(struct fsl_mc_io *mc_io, + uint16_t token, + uint8_t irq_index, + uint64_t irq_addr, + uint32_t irq_val, + int user_irq_id); + +/** + * dprc_get_irq() - Get IRQ information from the DPRC. + * @mc_io: Pointer to MC portal's I/O object + * @token: Token of DPRC object + * @irq_index: The interrupt index to configure + * @type: Returned interrupt type: 0 represents message interrupt + * type (both irq_addr and irq_val are valid) + * @irq_addr: Returned address that must be written to + * signal the message-based interrupt + * @irq_val: Value to write into irq_addr address + * @user_irq_id: A user defined number associated with this IRQ + * + * Return: '0' on Success; Error code otherwise. + */ +int dprc_get_irq(struct fsl_mc_io *mc_io, + uint16_t token, + uint8_t irq_index, + int *type, + uint64_t *irq_addr, + uint32_t *irq_val, + int *user_irq_id); + +/** + * dprc_set_irq_enable() - Set overall interrupt state. + * @mc_io: Pointer to MC portal's I/O object + * @token: Token of DPRC object + * @irq_index: The interrupt index to configure + * @en: Interrupt state - enable = 1, disable = 0 + * + * Allows GPP software to control when interrupts are generated. + * Each interrupt can have up to 32 causes. The enable/disable control's the + * overall interrupt state. if the interrupt is disabled no causes will cause + * an interrupt. + * + * Return: '0' on Success; Error code otherwise. + */ +int dprc_set_irq_enable(struct fsl_mc_io *mc_io, + uint16_t token, + uint8_t irq_index, + uint8_t en); + +/** + * dprc_get_irq_enable() - Get overall interrupt state. + * @mc_io: Pointer to MC portal's I/O object + * @token: Token of DPRC object + * @irq_index: The interrupt index to configure + * @en: Returned interrupt state - enable = 1, disable = 0 + * + * Return: '0' on Success; Error code otherwise. + */ +int dprc_get_irq_enable(struct fsl_mc_io *mc_io, + uint16_t token, + uint8_t irq_index, + uint8_t *en); + +/** + * dprc_set_irq_mask() - Set interrupt mask. + * @mc_io: Pointer to MC portal's I/O object + * @token: Token of DPRC object + * @irq_index: The interrupt index to configure + * @mask: event mask to trigger interrupt; + * each bit: + * 0 = ignore event + * 1 = consider event for asserting irq + * + * Every interrupt can have up to 32 causes and the interrupt model supports + * masking/unmasking each cause independently + * + * Return: '0' on Success; Error code otherwise. + */ +int dprc_set_irq_mask(struct fsl_mc_io *mc_io, + uint16_t token, + uint8_t irq_index, + uint32_t mask); + +/** + * dprc_get_irq_mask() - Get interrupt mask. + * @mc_io: Pointer to MC portal's I/O object + * @token: Token of DPRC object + * @irq_index: The interrupt index to configure + * @mask: Returned event mask to trigger interrupt + * + * Every interrupt can have up to 32 causes and the interrupt model supports + * masking/unmasking each cause independently + * + * Return: '0' on Success; Error code otherwise. + */ +int dprc_get_irq_mask(struct fsl_mc_io *mc_io, + uint16_t token, + uint8_t irq_index, + uint32_t *mask); + +/** + * dprc_get_irq_status() - Get the current status of any pending interrupts. + * @mc_io: Pointer to MC portal's I/O object + * @token: Token of DPRC object + * @irq_index: The interrupt index to configure + * @status: Returned interrupts status - one bit per cause: + * 0 = no interrupt pending + * 1 = interrupt pending + * + * Return: '0' on Success; Error code otherwise. + */ +int dprc_get_irq_status(struct fsl_mc_io *mc_io, + uint16_t token, + uint8_t irq_index, + uint32_t *status); + +/** + * dprc_clear_irq_status() - Clear a pending interrupt's status + * @mc_io: Pointer to MC portal's I/O object + * @token: Token of DPRC object + * @irq_index: The interrupt index to configure + * @status: bits to clear (W1C) - one bit per cause: + * 0 = don't change + * 1 = clear status bit + * + * Return: '0' on Success; Error code otherwise. + */ +int dprc_clear_irq_status(struct fsl_mc_io *mc_io, + uint16_t token, + uint8_t irq_index, + uint32_t status); + +/** + * struct dprc_attributes - Container attributes + * @container_id: Container's ID + * @icid: Container's ICID + * @portal_id: Container's portal ID + * @options: Container's options as set at container's creation + * @version: DPRC version + */ +struct dprc_attributes { + int container_id; + uint16_t icid; + int portal_id; + uint64_t options; + /** + * struct version - DPRC version + * @major: DPRC major version + * @minor: DPRC minor version + */ + struct { + uint16_t major; + uint16_t minor; + } version; +}; + +/** + * dprc_get_attributes() - Obtains container attributes + * @mc_io: Pointer to MC portal's I/O object + * @token: Token of DPRC object + * @attributes Returned container attributes + * + * Return: '0' on Success; Error code otherwise. + */ +int dprc_get_attributes(struct fsl_mc_io *mc_io, + uint16_t token, + struct dprc_attributes *attributes); + +/** + * dprc_set_res_quota() - Set allocation policy for a specific resource/object + * type in a child container + * @mc_io: Pointer to MC portal's I/O object + * @token: Token of DPRC object + * @child_container_id: ID of the child container + * @type: Resource/object type + * @quota: Sets the maximum number of resources of the selected type + * that the child container is allowed to allocate from its parent; + * when quota is set to -1, the policy is the same as container's + * general policy. + * + * Allocation policy determines whether or not a container may allocate + * resources from its parent. Each container has a 'global' allocation policy + * that is set when the container is created. + * + * This function sets allocation policy for a specific resource type. + * The default policy for all resource types matches the container's 'global' + * allocation policy. + * + * Return: '0' on Success; Error code otherwise. + * + * @warning Only the parent container is allowed to change a child policy. + */ +int dprc_set_res_quota(struct fsl_mc_io *mc_io, + uint16_t token, + int child_container_id, + char *type, + uint16_t quota); + +/** + * dprc_get_res_quota() - Gets the allocation policy of a specific + * resource/object type in a child container + * @mc_io: Pointer to MC portal's I/O object + * @token: Token of DPRC object + * @child_container_id; ID of the child container + * @type: resource/object type + * @quota: Returnes the maximum number of resources of the selected type + * that the child container is allowed to allocate from the parent; + * when quota is set to -1, the policy is the same as container's + * general policy. + * + * Return: '0' on Success; Error code otherwise. + */ +int dprc_get_res_quota(struct fsl_mc_io *mc_io, + uint16_t token, + int child_container_id, + char *type, + uint16_t *quota); + +/* Resource request options */ + +/* Explicit resource ID request - The requested objects/resources + * are explicit and sequential (in case of resources). + * The base ID is given at res_req at base_align field + */ +#define DPRC_RES_REQ_OPT_EXPLICIT 0x00000001 + +/* Aligned resources request - Relevant only for resources + * request (and not objects). Indicates that resources base ID should be + * sequential and aligned to the value given at dprc_res_req base_align field + */ +#define DPRC_RES_REQ_OPT_ALIGNED 0x00000002 + +/* Plugged Flag - Relevant only for object assignment request. + * Indicates that after all objects assigned. An interrupt will be invoked at + * the relevant GPP. The assigned object will be marked as plugged. + * plugged objects can't be assigned from their container + */ +#define DPRC_RES_REQ_OPT_PLUGGED 0x00000004 + +/** + * struct dprc_res_req - Resource request descriptor, to be used in assignment + * or un-assignment of resources and objects. + * @type: Resource/object type: Represent as a NULL terminated string. + * This string may received by using dprc_get_pool() to get resource + * type and dprc_get_obj() to get object type; + * Note: it is not possible to assign/un-assign DPRC objects + * @num: Number of resources + * @options: Request options: combination of DPRC_RES_REQ_OPT_ options + * @id_base_align: In case of explicit assignment (DPRC_RES_REQ_OPT_EXPLICIT + * is set at option), this field represents the required base ID + * for resource allocation; In case of aligned assignment + * (DPRC_RES_REQ_OPT_ALIGNED is set at option), this field + * indicates the required alignment for the resource ID(s) - + * use 0 if there is no alignment or explicit ID requirements + */ +struct dprc_res_req { + char type[16]; + uint32_t num; + uint32_t options; + int id_base_align; +}; + +/** + * dprc_assign() - Assigns objects or resource to a child container. + * @mc_io: Pointer to MC portal's I/O object + * @token: Token of DPRC object + * @container_id: ID of the child container + * @res_req: Describes the type and amount of resources to + * assign to the given container + * + * Assignment is usually done by a parent (this DPRC) to one of its child + * containers. + * + * According to the DPRC allocation policy, the assigned resources may be taken + * (allocated) from the container's ancestors, if not enough resources are + * available in the container itself. + * + * The type of assignment depends on the dprc_res_req options, as follows: + * - DPRC_RES_REQ_OPT_EXPLICIT: indicates that assigned resources should have + * the explicit base ID specified at the id_base_align field of res_req. + * - DPRC_RES_REQ_OPT_ALIGNED: indicates that the assigned resources should be + * aligned to the value given at id_base_align field of res_req. + * - DPRC_RES_REQ_OPT_PLUGGED: Relevant only for object assignment, + * and indicates that the object must be set to the plugged state. + * + * A container may use this function with its own ID in order to change a + * object state to plugged or unplugged. + * + * If IRQ information has been set in the child DPRC, it will signal an + * interrupt following every change in its object assignment. + * + * Return: '0' on Success; Error code otherwise. + */ +int dprc_assign(struct fsl_mc_io *mc_io, + uint16_t token, + int container_id, + struct dprc_res_req *res_req); + +/** + * dprc_unassign() - Un-assigns objects or resources from a child container + * and moves them into this (parent) DPRC. + * @mc_io: Pointer to MC portal's I/O object + * @token: Token of DPRC object + * @child_container_id: ID of the child container + * @res_req: Describes the type and amount of resources to un-assign from + * the child container + * + * Un-assignment of objects can succeed only if the object is not in the + * plugged or opened state. + * + * Return: '0' on Success; Error code otherwise. + */ +int dprc_unassign(struct fsl_mc_io *mc_io, + uint16_t token, + int child_container_id, + struct dprc_res_req *res_req); + +/** + * dprc_get_pool_count() - Get the number of dprc's pools + * @mc_io: Pointer to MC portal's I/O object + * @token: Token of DPRC object + * @pool_count: Returned number of resource pools in the dprc + * + * Return: '0' on Success; Error code otherwise. + */ +int dprc_get_pool_count(struct fsl_mc_io *mc_io, + uint16_t token, + int *pool_count); + +/** + * dprc_get_pool() - Get the type (string) of a certain dprc's pool + * @mc_io: Pointer to MC portal's I/O object + * @token: Token of DPRC object + * @pool_index; Index of the pool to be queried (< pool_count) + * @type: The type of the pool + * + * The pool types retrieved one by one by incrementing + * pool_index up to (not including) the value of pool_count returned + * from dprc_get_pool_count(). dprc_get_pool_count() must + * be called prior to dprc_get_pool(). + * + * Return: '0' on Success; Error code otherwise. + */ +int dprc_get_pool(struct fsl_mc_io *mc_io, + uint16_t token, + int pool_index, + char *type); + +/** + * dprc_get_obj_count() - Obtains the number of objects in the DPRC + * @mc_io: Pointer to MC portal's I/O object + * @token: Token of DPRC object + * @obj_count: Number of objects assigned to the DPRC + * + * Return: '0' on Success; Error code otherwise. + */ +int dprc_get_obj_count(struct fsl_mc_io *mc_io, uint16_t token, int *obj_count); + +/* Objects Attributes Flags */ + +/* Opened state - Indicates that an object is open by at least one owner */ +#define DPRC_OBJ_STATE_OPEN 0x00000001 +/* Plugged state - Indicates that the object is plugged */ +#define DPRC_OBJ_STATE_PLUGGED 0x00000002 + +/** + * struct dprc_obj_desc - Object descriptor, returned from dprc_get_obj() + * @type: Type of object: NULL terminated string + * @id: ID of logical object resource + * @vendor: Object vendor identifier + * @ver_major: Major version number + * @ver_minor: Minor version number + * @irq_count: Number of interrupts supported by the object + * @region_count: Number of mappable regions supported by the object + * @state: Object state: combination of DPRC_OBJ_STATE_ states + */ +struct dprc_obj_desc { + char type[16]; + int id; + uint16_t vendor; + uint16_t ver_major; + uint16_t ver_minor; + uint8_t irq_count; + uint8_t region_count; + uint32_t state; +}; + +/** + * dprc_get_obj() - Get general information on an object + * @mc_io: Pointer to MC portal's I/O object + * @token: Token of DPRC object + * @obj_index: Index of the object to be queried (< obj_count) + * @obj_desc: Returns the requested object descriptor + * + * The object descriptors are retrieved one by one by incrementing + * obj_index up to (not including) the value of obj_count returned + * from dprc_get_obj_count(). dprc_get_obj_count() must + * be called prior to dprc_get_obj(). + * + * Return: '0' on Success; Error code otherwise. + */ +int dprc_get_obj(struct fsl_mc_io *mc_io, + uint16_t token, + int obj_index, + struct dprc_obj_desc *obj_desc); + +/** + * dprc_get_res_count() - Obtains the number of free resources that are assigned + * to this container, by pool type + * @mc_io: Pointer to MC portal's I/O object + * @token: Token of DPRC object + * @type: pool type + * @res_count: Returned number of free resources of the given + * resource type that are assigned to this DPRC + * + * Return: '0' on Success; Error code otherwise. + */ +int dprc_get_res_count(struct fsl_mc_io *mc_io, + uint16_t token, + char *type, + int *res_count); + +/** + * enum dprc_iter_status - Iteration status + * @DPRC_ITER_STATUS_FIRST: Perform first iteration + * @DPRC_ITER_STATUS_MORE: Indicates more/next iteration is needed + * @DPRC_ITER_STATUS_LAST: Indicates last iteration + */ +enum dprc_iter_status { + DPRC_ITER_STATUS_FIRST = 0, + DPRC_ITER_STATUS_MORE = 1, + DPRC_ITER_STATUS_LAST = 2 +}; + +/** + * struct dprc_res_ids_range_desc - Resource ID range descriptor + * @base_id: Base resource ID of this range + * @last_id: Last resource ID of this range + * @iter_status: Iteration status - should be set to DPRC_ITER_STATUS_FIRST at + * first iteration; while the returned marker is DPRC_ITER_STATUS_MORE, + * additional iterations are needed, until the returned marker is + * DPRC_ITER_STATUS_LAST + */ +struct dprc_res_ids_range_desc { + int base_id; + int last_id; + enum dprc_iter_status iter_status; +}; + +/** + * dprc_get_res_ids() - Obtains IDs of free resources in the container + * @mc_io: Pointer to MC portal's I/O object + * @token: Token of DPRC object + * @type: pool type + * @range_desc: range descriptor + * + * Return: '0' on Success; Error code otherwise. + */ +int dprc_get_res_ids(struct fsl_mc_io *mc_io, + uint16_t token, + char *type, + struct dprc_res_ids_range_desc *range_desc); + +/** + * dprc_get_portal_paddr() - Get the physical address of MC portals + * @mc_io: Pointer to MC portal's I/O object + * @token: Token of DPRC object + * @portal_id: MC portal ID + * @portal_addr: The physical address of the MC portal ID + * + * Return: '0' on Success; Error code otherwise. + */ +int dprc_get_portal_paddr(struct fsl_mc_io *mc_io, + uint16_t token, + int portal_id, + uint64_t *portal_addr); + +/** + * struct dprc_region_desc - Mappable region descriptor + * @base_paddr: Region base physical address + * @size: Region size (in bytes) + */ +struct dprc_region_desc { + uint64_t base_paddr; + uint32_t size; +}; + +/** + * dprc_get_obj_region() - Get region information for a specified object. + * @mc_io: Pointer to MC portal's I/O object + * @token: Token of DPRC object + * @obj_type; Object type as returned in dprc_get_obj() + * @obj_id: Unique object instance as returned in dprc_get_obj() + * @region_index: The specific region to query + * @region_desc: Returns the requested region descriptor + * + * Return: '0' on Success; Error code otherwise. + */ +int dprc_get_obj_region(struct fsl_mc_io *mc_io, + uint16_t token, + char *obj_type, + int obj_id, + uint8_t region_index, + struct dprc_region_desc *region_desc); + +/** + * struct dprc_endpoint - Endpoint description for link connect/disconnect + * operations + * @type: Endpoint object type: NULL terminated string + * @id: Endpoint object ID + * @interface_id: Interface ID; should be set for endpoints with multiple + * interfaces ("dpsw", "dpdmux"); for others, always set to 0 + */ +struct dprc_endpoint { + char type[16]; + int id; + int interface_id; +}; + +/** + * dprc_connect() - Connect two endpoints to create a network link between them + * @mc_io: Pointer to MC portal's I/O object + * @token: Token of DPRC object + * @endpoint1: Endpoint 1 configuration parameters + * @endpoint2: Endpoint 2 configuration parameters + * + * Return: '0' on Success; Error code otherwise. + */ +int dprc_connect(struct fsl_mc_io *mc_io, + uint16_t token, + const struct dprc_endpoint *endpoint1, + const struct dprc_endpoint *endpoint2); + +/** + * dprc_disconnect() - Disconnect one endpoint to remove its network connection + * @mc_io: Pointer to MC portal's I/O object + * @token: Token of DPRC object + * @endpoint: Endpoint configuration parameters + * + * Return: '0' on Success; Error code otherwise. + */ +int dprc_disconnect(struct fsl_mc_io *mc_io, + uint16_t token, + const struct dprc_endpoint *endpoint); + +/** +* dprc_get_connection() - Get connected endpoint and link status if connection +* exists. +* @mc_io Pointer to MC portal's I/O object +* @token Token of DPRC object +* @endpoint1 Endpoint 1 configuration parameters +* @endpoint2 Returned endpoint 2 configuration parameters +* @state: Returned link state: 1 - link is up, 0 - link is down +* +* Return: '0' on Success; -ENAVAIL if connection does not exist. +*/ +int dprc_get_connection(struct fsl_mc_io *mc_io, + uint16_t token, + const struct dprc_endpoint *endpoint1, + struct dprc_endpoint *endpoint2, + int *state); + +#endif /* _FSL_DPRC_H */ + diff --git a/drivers/staging/fsl-mc/include/mc-cmd.h b/drivers/staging/fsl-mc/include/mc-cmd.h new file mode 100644 index 000000000000..32501e020054 --- /dev/null +++ b/drivers/staging/fsl-mc/include/mc-cmd.h @@ -0,0 +1,113 @@ +/* Copyright 2013-2015 Freescale Semiconductor Inc. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of the above-listed copyright holders nor the + * names of any contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * + * ALTERNATIVELY, this software may be distributed under the terms of the + * GNU General Public License ("GPL") as published by the Free Software + * Foundation, either version 2 of that License or (at your option) any + * later version. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ +#ifndef __FSL_MC_CMD_H +#define __FSL_MC_CMD_H + +#define MC_CMD_NUM_OF_PARAMS 7 + +#define MAKE_UMASK64(_width) \ + ((uint64_t)((_width) < 64 ? ((uint64_t)1 << (_width)) - 1 : -1)) + +static inline uint64_t mc_enc(int lsoffset, int width, uint64_t val) +{ + return (uint64_t)(((uint64_t)val & MAKE_UMASK64(width)) << lsoffset); +} + +static inline uint64_t mc_dec(uint64_t val, int lsoffset, int width) +{ + return (uint64_t)((val >> lsoffset) & MAKE_UMASK64(width)); +} + +struct mc_command { + uint64_t header; + uint64_t params[MC_CMD_NUM_OF_PARAMS]; +}; + +enum mc_cmd_status { + MC_CMD_STATUS_OK = 0x0, /* Completed successfully */ + MC_CMD_STATUS_READY = 0x1, /* Ready to be processed */ + MC_CMD_STATUS_AUTH_ERR = 0x3, /* Authentication error */ + MC_CMD_STATUS_NO_PRIVILEGE = 0x4, /* No privilege */ + MC_CMD_STATUS_DMA_ERR = 0x5, /* DMA or I/O error */ + MC_CMD_STATUS_CONFIG_ERR = 0x6, /* Configuration error */ + MC_CMD_STATUS_TIMEOUT = 0x7, /* Operation timed out */ + MC_CMD_STATUS_NO_RESOURCE = 0x8, /* No resources */ + MC_CMD_STATUS_NO_MEMORY = 0x9, /* No memory available */ + MC_CMD_STATUS_BUSY = 0xA, /* Device is busy */ + MC_CMD_STATUS_UNSUPPORTED_OP = 0xB, /* Unsupported operation */ + MC_CMD_STATUS_INVALID_STATE = 0xC /* Invalid state */ +}; + +#define MC_CMD_HDR_CMDID_O 52 /* Command ID field offset */ +#define MC_CMD_HDR_CMDID_S 12 /* Command ID field size */ +#define MC_CMD_HDR_TOKEN_O 38 /* Token field offset */ +#define MC_CMD_HDR_TOKEN_S 10 /* Token field size */ +#define MC_CMD_HDR_STATUS_O 16 /* Status field offset */ +#define MC_CMD_HDR_STATUS_S 8 /* Status field size*/ +#define MC_CMD_HDR_PRI_O 15 /* Priority field offset */ +#define MC_CMD_HDR_PRI_S 1 /* Priority field size */ + +#define MC_CMD_HDR_READ_STATUS(_hdr) \ + ((enum mc_cmd_status)mc_dec((_hdr), \ + MC_CMD_HDR_STATUS_O, MC_CMD_HDR_STATUS_S)) + +#define MC_CMD_HDR_READ_TOKEN(_hdr) \ + ((uint16_t)mc_dec((_hdr), MC_CMD_HDR_TOKEN_O, MC_CMD_HDR_TOKEN_S)) + +#define MC_CMD_PRI_LOW 0 /* Low Priority command indication */ +#define MC_CMD_PRI_HIGH 1 /* High Priority command indication */ + +#define MC_EXT_OP(_ext, _param, _offset, _width, _type, _arg) \ + ((_ext)[_param] |= mc_enc((_offset), (_width), _arg)) + +#define MC_CMD_OP(_cmd, _param, _offset, _width, _type, _arg) \ + ((_cmd).params[_param] |= mc_enc((_offset), (_width), _arg)) + +#define MC_RSP_OP(_cmd, _param, _offset, _width, _type, _arg) \ + (_arg = (_type)mc_dec(_cmd.params[_param], (_offset), (_width))) + +static inline uint64_t mc_encode_cmd_header(uint16_t cmd_id, + uint8_t priority, + uint16_t token) +{ + uint64_t hdr; + + hdr = mc_enc(MC_CMD_HDR_CMDID_O, MC_CMD_HDR_CMDID_S, cmd_id); + hdr |= mc_enc(MC_CMD_HDR_TOKEN_O, MC_CMD_HDR_TOKEN_S, token); + hdr |= mc_enc(MC_CMD_HDR_PRI_O, MC_CMD_HDR_PRI_S, priority); + hdr |= mc_enc(MC_CMD_HDR_STATUS_O, MC_CMD_HDR_STATUS_S, + MC_CMD_STATUS_READY); + + return hdr; +} + +#endif /* __FSL_MC_CMD_H */ diff --git a/drivers/staging/fsl-mc/include/mc-sys.h b/drivers/staging/fsl-mc/include/mc-sys.h new file mode 100644 index 000000000000..abfd6a233ada --- /dev/null +++ b/drivers/staging/fsl-mc/include/mc-sys.h @@ -0,0 +1,70 @@ +/* Copyright 2013-2014 Freescale Semiconductor Inc. + * + * Interface of the I/O services to send MC commands to the MC hardware + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of the above-listed copyright holders nor the + * names of any contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * + * ALTERNATIVELY, this software may be distributed under the terms of the + * GNU General Public License ("GPL") as published by the Free Software + * Foundation, either version 2 of that License or (at your option) any + * later version. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _FSL_MC_SYS_H +#define _FSL_MC_SYS_H + +#include +#include +#include +#include + +struct mc_command; + +/** + * struct fsl_mc_io - MC I/O object to be passed-in to mc_send_command() + * @dev: device associated with this Mc I/O object + * @flags: flags for mc_send_command() + * @portal_size: MC command portal size in bytes + * @portal_phys_addr: MC command portal physical address + * @portal_virt_addr: MC command portal virtual address + */ +struct fsl_mc_io { + struct device *dev; + uint32_t flags; + uint32_t portal_size; + phys_addr_t portal_phys_addr; + void __iomem *portal_virt_addr; +}; + +int __must_check fsl_create_mc_io(struct device *dev, + phys_addr_t mc_portal_phys_addr, + uint32_t mc_portal_size, + uint32_t flags, struct fsl_mc_io **new_mc_io); + +void fsl_destroy_mc_io(struct fsl_mc_io *mc_io); + +int mc_send_command(struct fsl_mc_io *mc_io, struct mc_command *cmd); + +#endif /* _FSL_MC_SYS_H */ -- cgit v1.2.3 From c5abbba932a4afd82cb35f3d6e691a2b4a0613be Mon Sep 17 00:00:00 2001 From: Tien Hock Loh Date: Tue, 24 Feb 2015 01:53:03 -0800 Subject: drivers/gpio: Altera soft IP GPIO driver Adds a new driver for Altera soft GPIO IP. The driver is able to do read/write and allows GPIO to be a interrupt controller. Tested on Altera GHRD on interrupt handling and IO. v10: - Updated conflicting device tree parameters - Removed unused headers - Used macro instead of magic numbers for ngpio - Code readability cleanup using ?: and temporal variables - Removed leftover garbage and unnecessary function calls - Checked bgpio_init but unusable because Altera GPIO may not be a multiple of 8 bits v9: - Removed duplicated initialization on set_type using temporals to improve code readability in calling generic_handle_irq - Using ?: ternary to reduce code size v8: - Using for_each_set_bit - Added const for struct definition - Removed naggy pr_err - Sort alpha header - Remove unused macros - Use fixed width data types instead of unsigned long - Whitespace issue fixes - Removed _relaxed function for better compatibility across different CPU - Changed irq_create_mapping to platform_get_irq updated implementation to use gpiochip_irqchip_add - Reserve interrupt-cells number 2 in device tree binding for future use - Remove confusing sections on devicetree bindings - Added tristate Kconfig help text v7: - Used dev_warn instead of pr_warn - Clean up unnecesarry if else indentation v6: - Added irq_startup and irq_shutdown - Changed bitwise clamping style - Cleanup bitwise operation to improve readability change naming of mapped irqs from virq to mapped_irq v5: - Dispose irq_domain mapping correctly - Update optional binding description in binding docs v4: - Added vendor prefix to devicetree binding for IP specific properties using MMIO GPIO helper library instead of manually map PIO to memory - altera_gpio_chip inline struct documentation to kerneldoc - Using dev_ print to print a better failure message v2, v3: - Do not reference NO_IRQ - Updated irq_set_type to only allow the hardware configured irq type Signed-off-by: Tien Hock Loh Signed-off-by: Linus Walleij --- MAINTAINERS | 6 + drivers/gpio/Kconfig | 10 ++ drivers/gpio/Makefile | 1 + drivers/gpio/gpio-altera.c | 374 +++++++++++++++++++++++++++++++++++++++++++++ 4 files changed, 391 insertions(+) create mode 100644 drivers/gpio/gpio-altera.c (limited to 'MAINTAINERS') diff --git a/MAINTAINERS b/MAINTAINERS index ddc5a8cf9a8a..38fdfd134750 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -569,6 +569,12 @@ L: nios2-dev@lists.rocketboards.org (moderated for non-subscribers) S: Maintained F: drivers/mailbox/mailbox-altera.c +ALTERA PIO DRIVER +M: Tien Hock Loh +L: linux-gpio@vger.kernel.org +S: Maintained +F: drivers/gpio/gpio-altera.c + ALTERA TRIPLE SPEED ETHERNET DRIVER M: Vince Bridgers L: netdev@vger.kernel.org diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index 249845a47624..e07b63d37b7b 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -156,6 +156,16 @@ config GPIO_DWAPB Say Y or M here to build support for the Synopsys DesignWare APB GPIO block. +config GPIO_ALTERA + tristate "Altera GPIO" + depends on OF_GPIO + select GPIO_GENERIC + select GPIOLIB_IRQCHIP + help + Say Y or M here to build support for the Altera PIO device. + + If driver is built as a module it will be called gpio-altera. + config GPIO_IT8761E tristate "IT8761E GPIO support" depends on X86 # unconditional access to IO space. diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile index bdda6a94d2cd..a452b14130cc 100644 --- a/drivers/gpio/Makefile +++ b/drivers/gpio/Makefile @@ -17,6 +17,7 @@ obj-$(CONFIG_GPIO_74XX_MMIO) += gpio-74xx-mmio.o obj-$(CONFIG_GPIO_ADNP) += gpio-adnp.o obj-$(CONFIG_GPIO_ADP5520) += gpio-adp5520.o obj-$(CONFIG_GPIO_ADP5588) += gpio-adp5588.o +obj-$(CONFIG_GPIO_ALTERA) += gpio-altera.o obj-$(CONFIG_GPIO_AMD8111) += gpio-amd8111.o obj-$(CONFIG_GPIO_ARIZONA) += gpio-arizona.o obj-$(CONFIG_GPIO_BCM_KONA) += gpio-bcm-kona.o diff --git a/drivers/gpio/gpio-altera.c b/drivers/gpio/gpio-altera.c new file mode 100644 index 000000000000..4d41196b3f13 --- /dev/null +++ b/drivers/gpio/gpio-altera.c @@ -0,0 +1,374 @@ +/* + * Copyright (C) 2013 Altera Corporation + * Based on gpio-mpc8xxx.c + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ + +#include +#include +#include + +#define ALTERA_GPIO_MAX_NGPIO 32 +#define ALTERA_GPIO_DATA 0x0 +#define ALTERA_GPIO_DIR 0x4 +#define ALTERA_GPIO_IRQ_MASK 0x8 +#define ALTERA_GPIO_EDGE_CAP 0xc + +/** +* struct altera_gpio_chip +* @mmchip : memory mapped chip structure. +* @gpio_lock : synchronization lock so that new irq/set/get requests + will be blocked until the current one completes. +* @interrupt_trigger : specifies the hardware configured IRQ trigger type + (rising, falling, both, high) +* @mapped_irq : kernel mapped irq number. +*/ +struct altera_gpio_chip { + struct of_mm_gpio_chip mmchip; + spinlock_t gpio_lock; + int interrupt_trigger; + int mapped_irq; +}; + +static void altera_gpio_irq_unmask(struct irq_data *d) +{ + struct altera_gpio_chip *altera_gc; + struct of_mm_gpio_chip *mm_gc; + unsigned long flags; + u32 intmask; + + altera_gc = irq_data_get_irq_chip_data(d); + mm_gc = &altera_gc->mmchip; + + spin_lock_irqsave(&altera_gc->gpio_lock, flags); + intmask = readl(mm_gc->regs + ALTERA_GPIO_IRQ_MASK); + /* Set ALTERA_GPIO_IRQ_MASK bit to unmask */ + intmask |= BIT(irqd_to_hwirq(d)); + writel(intmask, mm_gc->regs + ALTERA_GPIO_IRQ_MASK); + spin_unlock_irqrestore(&altera_gc->gpio_lock, flags); +} + +static void altera_gpio_irq_mask(struct irq_data *d) +{ + struct altera_gpio_chip *altera_gc; + struct of_mm_gpio_chip *mm_gc; + unsigned long flags; + u32 intmask; + + altera_gc = irq_data_get_irq_chip_data(d); + mm_gc = &altera_gc->mmchip; + + spin_lock_irqsave(&altera_gc->gpio_lock, flags); + intmask = readl(mm_gc->regs + ALTERA_GPIO_IRQ_MASK); + /* Clear ALTERA_GPIO_IRQ_MASK bit to mask */ + intmask &= ~BIT(irqd_to_hwirq(d)); + writel(intmask, mm_gc->regs + ALTERA_GPIO_IRQ_MASK); + spin_unlock_irqrestore(&altera_gc->gpio_lock, flags); +} + +/** + * This controller's IRQ type is synthesized in hardware, so this function + * just checks if the requested set_type matches the synthesized IRQ type + */ +static int altera_gpio_irq_set_type(struct irq_data *d, + unsigned int type) +{ + struct altera_gpio_chip *altera_gc; + + altera_gc = irq_data_get_irq_chip_data(d); + + if (type == IRQ_TYPE_NONE) + return 0; + if (type == IRQ_TYPE_LEVEL_HIGH && + altera_gc->interrupt_trigger == IRQ_TYPE_LEVEL_HIGH) + return 0; + if (type == IRQ_TYPE_EDGE_RISING && + altera_gc->interrupt_trigger == IRQ_TYPE_EDGE_RISING) + return 0; + if (type == IRQ_TYPE_EDGE_FALLING && + altera_gc->interrupt_trigger == IRQ_TYPE_EDGE_FALLING) + return 0; + if (type == IRQ_TYPE_EDGE_BOTH && + altera_gc->interrupt_trigger == IRQ_TYPE_EDGE_BOTH) + return 0; + + return -EINVAL; +} + +static unsigned int altera_gpio_irq_startup(struct irq_data *d) { + altera_gpio_irq_unmask(d); + + return 0; +} + +static struct irq_chip altera_irq_chip = { + .name = "altera-gpio", + .irq_mask = altera_gpio_irq_mask, + .irq_unmask = altera_gpio_irq_unmask, + .irq_set_type = altera_gpio_irq_set_type, + .irq_startup = altera_gpio_irq_startup, + .irq_shutdown = altera_gpio_irq_mask, +}; + +static int altera_gpio_get(struct gpio_chip *gc, unsigned offset) +{ + struct of_mm_gpio_chip *mm_gc; + + mm_gc = to_of_mm_gpio_chip(gc); + + return !!(readl(mm_gc->regs + ALTERA_GPIO_DATA) & BIT(offset)); +} + +static void altera_gpio_set(struct gpio_chip *gc, unsigned offset, int value) +{ + struct of_mm_gpio_chip *mm_gc; + struct altera_gpio_chip *chip; + unsigned long flags; + unsigned int data_reg; + + mm_gc = to_of_mm_gpio_chip(gc); + chip = container_of(mm_gc, struct altera_gpio_chip, mmchip); + + spin_lock_irqsave(&chip->gpio_lock, flags); + data_reg = readl(mm_gc->regs + ALTERA_GPIO_DATA); + if (value) + data_reg |= BIT(offset); + else + data_reg &= ~BIT(offset); + writel(data_reg, mm_gc->regs + ALTERA_GPIO_DATA); + spin_unlock_irqrestore(&chip->gpio_lock, flags); +} + +static int altera_gpio_direction_input(struct gpio_chip *gc, unsigned offset) +{ + struct of_mm_gpio_chip *mm_gc; + struct altera_gpio_chip *chip; + unsigned long flags; + unsigned int gpio_ddr; + + mm_gc = to_of_mm_gpio_chip(gc); + chip = container_of(mm_gc, struct altera_gpio_chip, mmchip); + + spin_lock_irqsave(&chip->gpio_lock, flags); + /* Set pin as input, assumes software controlled IP */ + gpio_ddr = readl(mm_gc->regs + ALTERA_GPIO_DIR); + gpio_ddr &= ~BIT(offset); + writel(gpio_ddr, mm_gc->regs + ALTERA_GPIO_DIR); + spin_unlock_irqrestore(&chip->gpio_lock, flags); + + return 0; +} + +static int altera_gpio_direction_output(struct gpio_chip *gc, + unsigned offset, int value) +{ + struct of_mm_gpio_chip *mm_gc; + struct altera_gpio_chip *chip; + unsigned long flags; + unsigned int data_reg, gpio_ddr; + + mm_gc = to_of_mm_gpio_chip(gc); + chip = container_of(mm_gc, struct altera_gpio_chip, mmchip); + + spin_lock_irqsave(&chip->gpio_lock, flags); + /* Sets the GPIO value */ + data_reg = readl(mm_gc->regs + ALTERA_GPIO_DATA); + if (value) + data_reg |= BIT(offset); + else + data_reg &= ~BIT(offset); + writel(data_reg, mm_gc->regs + ALTERA_GPIO_DATA); + + /* Set pin as output, assumes software controlled IP */ + gpio_ddr = readl(mm_gc->regs + ALTERA_GPIO_DIR); + gpio_ddr |= BIT(offset); + writel(gpio_ddr, mm_gc->regs + ALTERA_GPIO_DIR); + spin_unlock_irqrestore(&chip->gpio_lock, flags); + + return 0; +} + +static void altera_gpio_irq_edge_handler(unsigned int irq, + struct irq_desc *desc) +{ + struct altera_gpio_chip *altera_gc; + struct irq_chip *chip; + struct of_mm_gpio_chip *mm_gc; + struct irq_domain *irqdomain; + unsigned long status; + int i; + + altera_gc = irq_desc_get_handler_data(desc); + chip = irq_desc_get_chip(desc); + mm_gc = &altera_gc->mmchip; + irqdomain = altera_gc->mmchip.gc.irqdomain; + + chained_irq_enter(chip, desc); + + while ((status = + (readl(mm_gc->regs + ALTERA_GPIO_EDGE_CAP) & + readl(mm_gc->regs + ALTERA_GPIO_IRQ_MASK)))) { + writel(status, mm_gc->regs + ALTERA_GPIO_EDGE_CAP); + for_each_set_bit(i, &status, mm_gc->gc.ngpio) { + generic_handle_irq(irq_find_mapping(irqdomain, i)); + } + } + + chained_irq_exit(chip, desc); +} + + +static void altera_gpio_irq_leveL_high_handler(unsigned int irq, + struct irq_desc *desc) +{ + struct altera_gpio_chip *altera_gc; + struct irq_chip *chip; + struct of_mm_gpio_chip *mm_gc; + struct irq_domain *irqdomain; + unsigned long status; + int i; + + altera_gc = irq_desc_get_handler_data(desc); + chip = irq_desc_get_chip(desc); + mm_gc = &altera_gc->mmchip; + irqdomain = altera_gc->mmchip.gc.irqdomain; + + chained_irq_enter(chip, desc); + + status = readl(mm_gc->regs + ALTERA_GPIO_DATA); + status &= readl(mm_gc->regs + ALTERA_GPIO_IRQ_MASK); + + for_each_set_bit(i, &status, mm_gc->gc.ngpio) { + generic_handle_irq(irq_find_mapping(irqdomain, i)); + } + chained_irq_exit(chip, desc); +} + +int altera_gpio_probe(struct platform_device *pdev) +{ + struct device_node *node = pdev->dev.of_node; + int reg, ret; + struct altera_gpio_chip *altera_gc; + + altera_gc = devm_kzalloc(&pdev->dev, sizeof(*altera_gc), GFP_KERNEL); + if (!altera_gc) + return -ENOMEM; + + spin_lock_init(&altera_gc->gpio_lock); + + if (of_property_read_u32(node, "altr,ngpio", ®)) + /* By default assume maximum ngpio */ + altera_gc->mmchip.gc.ngpio = ALTERA_GPIO_MAX_NGPIO; + else + altera_gc->mmchip.gc.ngpio = reg; + + if (altera_gc->mmchip.gc.ngpio > ALTERA_GPIO_MAX_NGPIO) { + dev_warn(&pdev->dev, + "ngpio is greater than %d, defaulting to %d\n", + ALTERA_GPIO_MAX_NGPIO, ALTERA_GPIO_MAX_NGPIO); + altera_gc->mmchip.gc.ngpio = ALTERA_GPIO_MAX_NGPIO; + } + + altera_gc->mmchip.gc.direction_input = altera_gpio_direction_input; + altera_gc->mmchip.gc.direction_output = altera_gpio_direction_output; + altera_gc->mmchip.gc.get = altera_gpio_get; + altera_gc->mmchip.gc.set = altera_gpio_set; + altera_gc->mmchip.gc.owner = THIS_MODULE; + altera_gc->mmchip.gc.dev = &pdev->dev; + + ret = of_mm_gpiochip_add(node, &altera_gc->mmchip); + if (ret) { + dev_err(&pdev->dev, "Failed adding memory mapped gpiochip\n"); + return ret; + } + + platform_set_drvdata(pdev, altera_gc); + + altera_gc->mapped_irq = platform_get_irq(pdev, 0); + + if (altera_gc->mapped_irq < 0) + goto skip_irq; + + if (of_property_read_u32(node, "altr,interrupt-type", ®)) { + ret = -EINVAL; + dev_err(&pdev->dev, + "altr,interrupt-type value not set in device tree\n"); + goto teardown; + } + altera_gc->interrupt_trigger = reg; + + ret = gpiochip_irqchip_add(&altera_gc->mmchip.gc, &altera_irq_chip, 0, + handle_simple_irq, IRQ_TYPE_NONE); + + if (ret) { + dev_info(&pdev->dev, "could not add irqchip\n"); + return ret; + } + + gpiochip_set_chained_irqchip(&altera_gc->mmchip.gc, + &altera_irq_chip, + altera_gc->mapped_irq, + altera_gc->interrupt_trigger == IRQ_TYPE_LEVEL_HIGH ? + altera_gpio_irq_leveL_high_handler : + altera_gpio_irq_edge_handler); + +skip_irq: + return 0; +teardown: + pr_err("%s: registration failed with status %d\n", + node->full_name, ret); + + return ret; +} + +static int altera_gpio_remove(struct platform_device *pdev) +{ + struct altera_gpio_chip *altera_gc = platform_get_drvdata(pdev); + + gpiochip_remove(&altera_gc->mmchip.gc); + + return -EIO; +} + +static const struct of_device_id altera_gpio_of_match[] = { + { .compatible = "altr,pio-1.0", }, + {}, +}; +MODULE_DEVICE_TABLE(of, altera_gpio_of_match); + +static struct platform_driver altera_gpio_driver = { + .driver = { + .name = "altera_gpio", + .of_match_table = of_match_ptr(altera_gpio_of_match), + }, + .probe = altera_gpio_probe, + .remove = altera_gpio_remove, +}; + +static int __init altera_gpio_init(void) +{ + return platform_driver_register(&altera_gpio_driver); +} +subsys_initcall(altera_gpio_init); + +static void __exit altera_gpio_exit(void) +{ + platform_driver_unregister(&altera_gpio_driver); +} +module_exit(altera_gpio_exit); + +MODULE_AUTHOR("Tien Hock Loh "); +MODULE_DESCRIPTION("Altera GPIO driver"); +MODULE_LICENSE("GPL"); -- cgit v1.2.3 From 2ca87a17045194638c69be87e2430842f743b00b Mon Sep 17 00:00:00 2001 From: Stephan Mueller Date: Fri, 6 Mar 2015 21:36:21 +0100 Subject: MAINTAINERS: add crypto-API.tmpl The file Documentation/DocBook/crypto-API.tmpl documents the kernel crypto API and is maintained. Signed-off-by: Stephan Mueller Signed-off-by: Herbert Xu --- MAINTAINERS | 1 + 1 file changed, 1 insertion(+) (limited to 'MAINTAINERS') diff --git a/MAINTAINERS b/MAINTAINERS index ddc5a8cf9a8a..c10814e53858 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -2805,6 +2805,7 @@ L: linux-crypto@vger.kernel.org T: git git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6.git S: Maintained F: Documentation/crypto/ +F: Documentation/DocBook/crypto-API.tmpl F: arch/*/crypto/ F: crypto/ F: drivers/crypto/ -- cgit v1.2.3 From 817020cfb3a2649064a1e14e083934234e2c208d Mon Sep 17 00:00:00 2001 From: Roberta Dobrescu Date: Thu, 26 Feb 2015 10:49:25 +0200 Subject: iio: Move iio userspace applications out of staging This patch moves iio userspace applications out of staging, to tools/iio/ and adds a Makefile in order to compile them easily. It also adds tools/iio/ to MAINTAINERS file. Signed-off-by: Roberta Dobrescu Signed-off-by: Jonathan Cameron --- MAINTAINERS | 1 + drivers/staging/iio/Documentation/generic_buffer.c | 361 ------------ .../staging/iio/Documentation/iio_event_monitor.c | 310 ---------- drivers/staging/iio/Documentation/iio_utils.c | 651 --------------------- drivers/staging/iio/Documentation/iio_utils.h | 71 --- drivers/staging/iio/Documentation/lsiio.c | 163 ------ tools/iio/Makefile | 16 + tools/iio/generic_buffer.c | 361 ++++++++++++ tools/iio/iio_event_monitor.c | 310 ++++++++++ tools/iio/iio_utils.c | 651 +++++++++++++++++++++ tools/iio/iio_utils.h | 71 +++ tools/iio/lsiio.c | 163 ++++++ 12 files changed, 1573 insertions(+), 1556 deletions(-) delete mode 100644 drivers/staging/iio/Documentation/generic_buffer.c delete mode 100644 drivers/staging/iio/Documentation/iio_event_monitor.c delete mode 100644 drivers/staging/iio/Documentation/iio_utils.c delete mode 100644 drivers/staging/iio/Documentation/iio_utils.h delete mode 100644 drivers/staging/iio/Documentation/lsiio.c create mode 100644 tools/iio/Makefile create mode 100644 tools/iio/generic_buffer.c create mode 100644 tools/iio/iio_event_monitor.c create mode 100644 tools/iio/iio_utils.c create mode 100644 tools/iio/iio_utils.h create mode 100644 tools/iio/lsiio.c (limited to 'MAINTAINERS') diff --git a/MAINTAINERS b/MAINTAINERS index 873f496c6364..6fb6bdc2eb3f 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -4871,6 +4871,7 @@ S: Maintained F: drivers/iio/ F: drivers/staging/iio/ F: include/linux/iio/ +F: tools/iio/ IKANOS/ADI EAGLE ADSL USB DRIVER M: Matthieu Castet diff --git a/drivers/staging/iio/Documentation/generic_buffer.c b/drivers/staging/iio/Documentation/generic_buffer.c deleted file mode 100644 index 01266c2556da..000000000000 --- a/drivers/staging/iio/Documentation/generic_buffer.c +++ /dev/null @@ -1,361 +0,0 @@ -/* Industrialio buffer test code. - * - * Copyright (c) 2008 Jonathan Cameron - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published by - * the Free Software Foundation. - * - * This program is primarily intended as an example application. - * Reads the current buffer setup from sysfs and starts a short capture - * from the specified device, pretty printing the result after appropriate - * conversion. - * - * Command line parameters - * generic_buffer -n -t - * If trigger name is not specified the program assumes you want a dataready - * trigger associated with the device and goes looking for it. - * - */ - -#define _GNU_SOURCE - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include "iio_utils.h" - -/** - * size_from_channelarray() - calculate the storage size of a scan - * @channels: the channel info array - * @num_channels: number of channels - * - * Has the side effect of filling the channels[i].location values used - * in processing the buffer output. - **/ -int size_from_channelarray(struct iio_channel_info *channels, int num_channels) -{ - int bytes = 0; - int i = 0; - - while (i < num_channels) { - if (bytes % channels[i].bytes == 0) - channels[i].location = bytes; - else - channels[i].location = bytes - bytes%channels[i].bytes - + channels[i].bytes; - bytes = channels[i].location + channels[i].bytes; - i++; - } - return bytes; -} - -void print2byte(int input, struct iio_channel_info *info) -{ - /* First swap if incorrect endian */ - if (info->be) - input = be16toh((uint16_t)input); - else - input = le16toh((uint16_t)input); - - /* - * Shift before conversion to avoid sign extension - * of left aligned data - */ - input = input >> info->shift; - if (info->is_signed) { - int16_t val = input; - - val &= (1 << info->bits_used) - 1; - val = (int16_t)(val << (16 - info->bits_used)) >> - (16 - info->bits_used); - printf("%05f ", ((float)val + info->offset)*info->scale); - } else { - uint16_t val = input; - - val &= (1 << info->bits_used) - 1; - printf("%05f ", ((float)val + info->offset)*info->scale); - } -} -/** - * process_scan() - print out the values in SI units - * @data: pointer to the start of the scan - * @channels: information about the channels. Note - * size_from_channelarray must have been called first to fill the - * location offsets. - * @num_channels: number of channels - **/ -void process_scan(char *data, - struct iio_channel_info *channels, - int num_channels) -{ - int k; - - for (k = 0; k < num_channels; k++) - switch (channels[k].bytes) { - /* only a few cases implemented so far */ - case 2: - print2byte(*(uint16_t *)(data + channels[k].location), - &channels[k]); - break; - case 4: - if (!channels[k].is_signed) { - uint32_t val = *(uint32_t *) - (data + channels[k].location); - printf("%05f ", ((float)val + - channels[k].offset)* - channels[k].scale); - - } - break; - case 8: - if (channels[k].is_signed) { - int64_t val = *(int64_t *) - (data + - channels[k].location); - if ((val >> channels[k].bits_used) & 1) - val = (val & channels[k].mask) | - ~channels[k].mask; - /* special case for timestamp */ - if (channels[k].scale == 1.0f && - channels[k].offset == 0.0f) - printf("%" PRId64 " ", val); - else - printf("%05f ", ((float)val + - channels[k].offset)* - channels[k].scale); - } - break; - default: - break; - } - printf("\n"); -} - -int main(int argc, char **argv) -{ - unsigned long num_loops = 2; - unsigned long timedelay = 1000000; - unsigned long buf_len = 128; - - int ret, c, i, j, toread; - int fp; - - int num_channels; - char *trigger_name = NULL, *device_name = NULL; - char *dev_dir_name, *buf_dir_name; - - int datardytrigger = 1; - char *data; - ssize_t read_size; - int dev_num, trig_num; - char *buffer_access; - int scan_size; - int noevents = 0; - int notrigger = 0; - char *dummy; - - struct iio_channel_info *channels; - - while ((c = getopt(argc, argv, "l:w:c:et:n:g")) != -1) { - switch (c) { - case 'n': - device_name = optarg; - break; - case 't': - trigger_name = optarg; - datardytrigger = 0; - break; - case 'e': - noevents = 1; - break; - case 'c': - num_loops = strtoul(optarg, &dummy, 10); - break; - case 'w': - timedelay = strtoul(optarg, &dummy, 10); - break; - case 'l': - buf_len = strtoul(optarg, &dummy, 10); - break; - case 'g': - notrigger = 1; - break; - case '?': - return -1; - } - } - - if (device_name == NULL) - return -1; - - /* Find the device requested */ - dev_num = find_type_by_name(device_name, "iio:device"); - if (dev_num < 0) { - printf("Failed to find the %s\n", device_name); - ret = -ENODEV; - goto error_ret; - } - printf("iio device number being used is %d\n", dev_num); - - asprintf(&dev_dir_name, "%siio:device%d", iio_dir, dev_num); - - if (!notrigger) { - if (trigger_name == NULL) { - /* - * Build the trigger name. If it is device associated - * its name is _dev[n] where n matches - * the device number found above. - */ - ret = asprintf(&trigger_name, - "%s-dev%d", device_name, dev_num); - if (ret < 0) { - ret = -ENOMEM; - goto error_ret; - } - } - - /* Verify the trigger exists */ - trig_num = find_type_by_name(trigger_name, "trigger"); - if (trig_num < 0) { - printf("Failed to find the trigger %s\n", trigger_name); - ret = -ENODEV; - goto error_free_triggername; - } - printf("iio trigger number being used is %d\n", trig_num); - } else - printf("trigger-less mode selected\n"); - - /* - * Parse the files in scan_elements to identify what channels are - * present - */ - ret = build_channel_array(dev_dir_name, &channels, &num_channels); - if (ret) { - printf("Problem reading scan element information\n"); - printf("diag %s\n", dev_dir_name); - goto error_free_triggername; - } - - /* - * Construct the directory name for the associated buffer. - * As we know that the lis3l02dq has only one buffer this may - * be built rather than found. - */ - ret = asprintf(&buf_dir_name, - "%siio:device%d/buffer", iio_dir, dev_num); - if (ret < 0) { - ret = -ENOMEM; - goto error_free_triggername; - } - - if (!notrigger) { - printf("%s %s\n", dev_dir_name, trigger_name); - /* Set the device trigger to be the data ready trigger found - * above */ - ret = write_sysfs_string_and_verify("trigger/current_trigger", - dev_dir_name, - trigger_name); - if (ret < 0) { - printf("Failed to write current_trigger file\n"); - goto error_free_buf_dir_name; - } - } - - /* Setup ring buffer parameters */ - ret = write_sysfs_int("length", buf_dir_name, buf_len); - if (ret < 0) - goto error_free_buf_dir_name; - - /* Enable the buffer */ - ret = write_sysfs_int("enable", buf_dir_name, 1); - if (ret < 0) - goto error_free_buf_dir_name; - scan_size = size_from_channelarray(channels, num_channels); - data = malloc(scan_size*buf_len); - if (!data) { - ret = -ENOMEM; - goto error_free_buf_dir_name; - } - - ret = asprintf(&buffer_access, "/dev/iio:device%d", dev_num); - if (ret < 0) { - ret = -ENOMEM; - goto error_free_data; - } - - /* Attempt to open non blocking the access dev */ - fp = open(buffer_access, O_RDONLY | O_NONBLOCK); - if (fp == -1) { /* If it isn't there make the node */ - printf("Failed to open %s\n", buffer_access); - ret = -errno; - goto error_free_buffer_access; - } - - /* Wait for events 10 times */ - for (j = 0; j < num_loops; j++) { - if (!noevents) { - struct pollfd pfd = { - .fd = fp, - .events = POLLIN, - }; - - poll(&pfd, 1, -1); - toread = buf_len; - - } else { - usleep(timedelay); - toread = 64; - } - - read_size = read(fp, - data, - toread*scan_size); - if (read_size < 0) { - if (errno == -EAGAIN) { - printf("nothing available\n"); - continue; - } else - break; - } - for (i = 0; i < read_size/scan_size; i++) - process_scan(data + scan_size*i, - channels, - num_channels); - } - - /* Stop the buffer */ - ret = write_sysfs_int("enable", buf_dir_name, 0); - if (ret < 0) - goto error_close_buffer_access; - - if (!notrigger) - /* Disconnect the trigger - just write a dummy name. */ - write_sysfs_string("trigger/current_trigger", - dev_dir_name, "NULL"); - -error_close_buffer_access: - close(fp); -error_free_data: - free(data); -error_free_buffer_access: - free(buffer_access); -error_free_buf_dir_name: - free(buf_dir_name); -error_free_triggername: - if (datardytrigger) - free(trigger_name); -error_ret: - return ret; -} diff --git a/drivers/staging/iio/Documentation/iio_event_monitor.c b/drivers/staging/iio/Documentation/iio_event_monitor.c deleted file mode 100644 index f19cff19900e..000000000000 --- a/drivers/staging/iio/Documentation/iio_event_monitor.c +++ /dev/null @@ -1,310 +0,0 @@ -/* Industrialio event test code. - * - * Copyright (c) 2011-2012 Lars-Peter Clausen - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published by - * the Free Software Foundation. - * - * This program is primarily intended as an example application. - * Reads the current buffer setup from sysfs and starts a short capture - * from the specified device, pretty printing the result after appropriate - * conversion. - * - * Usage: - * iio_event_monitor - * - */ - -#define _GNU_SOURCE - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include "iio_utils.h" -#include -#include - -static const char * const iio_chan_type_name_spec[] = { - [IIO_VOLTAGE] = "voltage", - [IIO_CURRENT] = "current", - [IIO_POWER] = "power", - [IIO_ACCEL] = "accel", - [IIO_ANGL_VEL] = "anglvel", - [IIO_MAGN] = "magn", - [IIO_LIGHT] = "illuminance", - [IIO_INTENSITY] = "intensity", - [IIO_PROXIMITY] = "proximity", - [IIO_TEMP] = "temp", - [IIO_INCLI] = "incli", - [IIO_ROT] = "rot", - [IIO_ANGL] = "angl", - [IIO_TIMESTAMP] = "timestamp", - [IIO_CAPACITANCE] = "capacitance", - [IIO_ALTVOLTAGE] = "altvoltage", - [IIO_CCT] = "cct", - [IIO_PRESSURE] = "pressure", - [IIO_HUMIDITYRELATIVE] = "humidityrelative", - [IIO_ACTIVITY] = "activity", - [IIO_STEPS] = "steps", -}; - -static const char * const iio_ev_type_text[] = { - [IIO_EV_TYPE_THRESH] = "thresh", - [IIO_EV_TYPE_MAG] = "mag", - [IIO_EV_TYPE_ROC] = "roc", - [IIO_EV_TYPE_THRESH_ADAPTIVE] = "thresh_adaptive", - [IIO_EV_TYPE_MAG_ADAPTIVE] = "mag_adaptive", - [IIO_EV_TYPE_CHANGE] = "change", -}; - -static const char * const iio_ev_dir_text[] = { - [IIO_EV_DIR_EITHER] = "either", - [IIO_EV_DIR_RISING] = "rising", - [IIO_EV_DIR_FALLING] = "falling" -}; - -static const char * const iio_modifier_names[] = { - [IIO_MOD_X] = "x", - [IIO_MOD_Y] = "y", - [IIO_MOD_Z] = "z", - [IIO_MOD_X_AND_Y] = "x&y", - [IIO_MOD_X_AND_Z] = "x&z", - [IIO_MOD_Y_AND_Z] = "y&z", - [IIO_MOD_X_AND_Y_AND_Z] = "x&y&z", - [IIO_MOD_X_OR_Y] = "x|y", - [IIO_MOD_X_OR_Z] = "x|z", - [IIO_MOD_Y_OR_Z] = "y|z", - [IIO_MOD_X_OR_Y_OR_Z] = "x|y|z", - [IIO_MOD_LIGHT_BOTH] = "both", - [IIO_MOD_LIGHT_IR] = "ir", - [IIO_MOD_ROOT_SUM_SQUARED_X_Y] = "sqrt(x^2+y^2)", - [IIO_MOD_SUM_SQUARED_X_Y_Z] = "x^2+y^2+z^2", - [IIO_MOD_LIGHT_CLEAR] = "clear", - [IIO_MOD_LIGHT_RED] = "red", - [IIO_MOD_LIGHT_GREEN] = "green", - [IIO_MOD_LIGHT_BLUE] = "blue", - [IIO_MOD_QUATERNION] = "quaternion", - [IIO_MOD_TEMP_AMBIENT] = "ambient", - [IIO_MOD_TEMP_OBJECT] = "object", - [IIO_MOD_NORTH_MAGN] = "from_north_magnetic", - [IIO_MOD_NORTH_TRUE] = "from_north_true", - [IIO_MOD_NORTH_MAGN_TILT_COMP] = "from_north_magnetic_tilt_comp", - [IIO_MOD_NORTH_TRUE_TILT_COMP] = "from_north_true_tilt_comp", - [IIO_MOD_RUNNING] = "running", - [IIO_MOD_JOGGING] = "jogging", - [IIO_MOD_WALKING] = "walking", - [IIO_MOD_STILL] = "still", -}; - -static bool event_is_known(struct iio_event_data *event) -{ - enum iio_chan_type type = IIO_EVENT_CODE_EXTRACT_CHAN_TYPE(event->id); - enum iio_modifier mod = IIO_EVENT_CODE_EXTRACT_MODIFIER(event->id); - enum iio_event_type ev_type = IIO_EVENT_CODE_EXTRACT_TYPE(event->id); - enum iio_event_direction dir = IIO_EVENT_CODE_EXTRACT_DIR(event->id); - - switch (type) { - case IIO_VOLTAGE: - case IIO_CURRENT: - case IIO_POWER: - case IIO_ACCEL: - case IIO_ANGL_VEL: - case IIO_MAGN: - case IIO_LIGHT: - case IIO_INTENSITY: - case IIO_PROXIMITY: - case IIO_TEMP: - case IIO_INCLI: - case IIO_ROT: - case IIO_ANGL: - case IIO_TIMESTAMP: - case IIO_CAPACITANCE: - case IIO_ALTVOLTAGE: - case IIO_CCT: - case IIO_PRESSURE: - case IIO_HUMIDITYRELATIVE: - case IIO_ACTIVITY: - case IIO_STEPS: - break; - default: - return false; - } - - switch (mod) { - case IIO_NO_MOD: - case IIO_MOD_X: - case IIO_MOD_Y: - case IIO_MOD_Z: - case IIO_MOD_X_AND_Y: - case IIO_MOD_X_AND_Z: - case IIO_MOD_Y_AND_Z: - case IIO_MOD_X_AND_Y_AND_Z: - case IIO_MOD_X_OR_Y: - case IIO_MOD_X_OR_Z: - case IIO_MOD_Y_OR_Z: - case IIO_MOD_X_OR_Y_OR_Z: - case IIO_MOD_LIGHT_BOTH: - case IIO_MOD_LIGHT_IR: - case IIO_MOD_ROOT_SUM_SQUARED_X_Y: - case IIO_MOD_SUM_SQUARED_X_Y_Z: - case IIO_MOD_LIGHT_CLEAR: - case IIO_MOD_LIGHT_RED: - case IIO_MOD_LIGHT_GREEN: - case IIO_MOD_LIGHT_BLUE: - case IIO_MOD_QUATERNION: - case IIO_MOD_TEMP_AMBIENT: - case IIO_MOD_TEMP_OBJECT: - case IIO_MOD_NORTH_MAGN: - case IIO_MOD_NORTH_TRUE: - case IIO_MOD_NORTH_MAGN_TILT_COMP: - case IIO_MOD_NORTH_TRUE_TILT_COMP: - case IIO_MOD_RUNNING: - case IIO_MOD_JOGGING: - case IIO_MOD_WALKING: - case IIO_MOD_STILL: - break; - default: - return false; - } - - switch (ev_type) { - case IIO_EV_TYPE_THRESH: - case IIO_EV_TYPE_MAG: - case IIO_EV_TYPE_ROC: - case IIO_EV_TYPE_THRESH_ADAPTIVE: - case IIO_EV_TYPE_MAG_ADAPTIVE: - case IIO_EV_TYPE_CHANGE: - break; - default: - return false; - } - - switch (dir) { - case IIO_EV_DIR_EITHER: - case IIO_EV_DIR_RISING: - case IIO_EV_DIR_FALLING: - case IIO_EV_DIR_NONE: - break; - default: - return false; - } - - return true; -} - -static void print_event(struct iio_event_data *event) -{ - enum iio_chan_type type = IIO_EVENT_CODE_EXTRACT_CHAN_TYPE(event->id); - enum iio_modifier mod = IIO_EVENT_CODE_EXTRACT_MODIFIER(event->id); - enum iio_event_type ev_type = IIO_EVENT_CODE_EXTRACT_TYPE(event->id); - enum iio_event_direction dir = IIO_EVENT_CODE_EXTRACT_DIR(event->id); - int chan = IIO_EVENT_CODE_EXTRACT_CHAN(event->id); - int chan2 = IIO_EVENT_CODE_EXTRACT_CHAN2(event->id); - bool diff = IIO_EVENT_CODE_EXTRACT_DIFF(event->id); - - if (!event_is_known(event)) { - printf("Unknown event: time: %lld, id: %llx\n", - event->timestamp, event->id); - return; - } - - printf("Event: time: %lld, ", event->timestamp); - - if (mod != IIO_NO_MOD) { - printf("type: %s(%s), ", - iio_chan_type_name_spec[type], - iio_modifier_names[mod]); - } else { - printf("type: %s, ", - iio_chan_type_name_spec[type]); - } - - if (diff && chan >= 0 && chan2 >= 0) - printf("channel: %d-%d, ", chan, chan2); - else if (chan >= 0) - printf("channel: %d, ", chan); - - printf("evtype: %s", iio_ev_type_text[ev_type]); - - if (dir != IIO_EV_DIR_NONE) - printf(", direction: %s", iio_ev_dir_text[dir]); - printf("\n"); -} - -int main(int argc, char **argv) -{ - struct iio_event_data event; - const char *device_name; - char *chrdev_name; - int ret; - int dev_num; - int fd, event_fd; - - if (argc <= 1) { - printf("Usage: %s \n", argv[0]); - return -1; - } - - device_name = argv[1]; - - dev_num = find_type_by_name(device_name, "iio:device"); - if (dev_num >= 0) { - printf("Found IIO device with name %s with device number %d\n", - device_name, dev_num); - ret = asprintf(&chrdev_name, "/dev/iio:device%d", dev_num); - if (ret < 0) { - ret = -ENOMEM; - goto error_ret; - } - } else { - /* If we can't find a IIO device by name assume device_name is a - IIO chrdev */ - chrdev_name = strdup(device_name); - } - - fd = open(chrdev_name, 0); - if (fd == -1) { - fprintf(stdout, "Failed to open %s\n", chrdev_name); - ret = -errno; - goto error_free_chrdev_name; - } - - ret = ioctl(fd, IIO_GET_EVENT_FD_IOCTL, &event_fd); - - close(fd); - - if (ret == -1 || event_fd == -1) { - fprintf(stdout, "Failed to retrieve event fd\n"); - ret = -errno; - goto error_free_chrdev_name; - } - - while (true) { - ret = read(event_fd, &event, sizeof(event)); - if (ret == -1) { - if (errno == EAGAIN) { - printf("nothing available\n"); - continue; - } else { - perror("Failed to read event from device"); - ret = -errno; - break; - } - } - - print_event(&event); - } - - close(event_fd); -error_free_chrdev_name: - free(chrdev_name); -error_ret: - return ret; -} diff --git a/drivers/staging/iio/Documentation/iio_utils.c b/drivers/staging/iio/Documentation/iio_utils.c deleted file mode 100644 index aea928210187..000000000000 --- a/drivers/staging/iio/Documentation/iio_utils.c +++ /dev/null @@ -1,651 +0,0 @@ -/* IIO - useful set of util functionality - * - * Copyright (c) 2008 Jonathan Cameron - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published by - * the Free Software Foundation. - */ - -#include -#include -#include -#include -#include -#include -#include -#include "iio_utils.h" - -const char *iio_dir = "/sys/bus/iio/devices/"; - -/** - * iioutils_break_up_name() - extract generic name from full channel name - * @full_name: the full channel name - * @generic_name: the output generic channel name - **/ -int iioutils_break_up_name(const char *full_name, - char **generic_name) -{ - char *current; - char *w, *r; - char *working; - - current = strdup(full_name); - working = strtok(current, "_\0"); - w = working; - r = working; - - while (*r != '\0') { - if (!isdigit(*r)) { - *w = *r; - w++; - } - r++; - } - *w = '\0'; - *generic_name = strdup(working); - free(current); - - return 0; -} - -/** - * iioutils_get_type() - find and process _type attribute data - * @is_signed: output whether channel is signed - * @bytes: output how many bytes the channel storage occupies - * @mask: output a bit mask for the raw data - * @be: big endian - * @device_dir: the iio device directory - * @name: the channel name - * @generic_name: the channel type name - **/ -int iioutils_get_type(unsigned *is_signed, - unsigned *bytes, - unsigned *bits_used, - unsigned *shift, - uint64_t *mask, - unsigned *be, - const char *device_dir, - const char *name, - const char *generic_name) -{ - FILE *sysfsfp; - int ret; - DIR *dp; - char *scan_el_dir, *builtname, *builtname_generic, *filename = 0; - char signchar, endianchar; - unsigned padint; - const struct dirent *ent; - - ret = asprintf(&scan_el_dir, FORMAT_SCAN_ELEMENTS_DIR, device_dir); - if (ret < 0) { - ret = -ENOMEM; - goto error_ret; - } - ret = asprintf(&builtname, FORMAT_TYPE_FILE, name); - if (ret < 0) { - ret = -ENOMEM; - goto error_free_scan_el_dir; - } - ret = asprintf(&builtname_generic, FORMAT_TYPE_FILE, generic_name); - if (ret < 0) { - ret = -ENOMEM; - goto error_free_builtname; - } - - dp = opendir(scan_el_dir); - if (dp == NULL) { - ret = -errno; - goto error_free_builtname_generic; - } - while (ent = readdir(dp), ent != NULL) - /* - * Do we allow devices to override a generic name with - * a specific one? - */ - if ((strcmp(builtname, ent->d_name) == 0) || - (strcmp(builtname_generic, ent->d_name) == 0)) { - ret = asprintf(&filename, - "%s/%s", scan_el_dir, ent->d_name); - if (ret < 0) { - ret = -ENOMEM; - goto error_closedir; - } - sysfsfp = fopen(filename, "r"); - if (sysfsfp == NULL) { - printf("failed to open %s\n", filename); - ret = -errno; - goto error_free_filename; - } - - ret = fscanf(sysfsfp, - "%ce:%c%u/%u>>%u", - &endianchar, - &signchar, - bits_used, - &padint, shift); - if (ret < 0) { - printf("failed to pass scan type description\n"); - ret = -errno; - goto error_close_sysfsfp; - } - *be = (endianchar == 'b'); - *bytes = padint / 8; - if (*bits_used == 64) - *mask = ~0; - else - *mask = (1 << *bits_used) - 1; - if (signchar == 's') - *is_signed = 1; - else - *is_signed = 0; - fclose(sysfsfp); - free(filename); - - filename = 0; - sysfsfp = 0; - } -error_close_sysfsfp: - if (sysfsfp) - fclose(sysfsfp); -error_free_filename: - if (filename) - free(filename); -error_closedir: - closedir(dp); -error_free_builtname_generic: - free(builtname_generic); -error_free_builtname: - free(builtname); -error_free_scan_el_dir: - free(scan_el_dir); -error_ret: - return ret; -} - -int iioutils_get_param_float(float *output, - const char *param_name, - const char *device_dir, - const char *name, - const char *generic_name) -{ - FILE *sysfsfp; - int ret; - DIR *dp; - char *builtname, *builtname_generic; - char *filename = NULL; - const struct dirent *ent; - - ret = asprintf(&builtname, "%s_%s", name, param_name); - if (ret < 0) { - ret = -ENOMEM; - goto error_ret; - } - ret = asprintf(&builtname_generic, - "%s_%s", generic_name, param_name); - if (ret < 0) { - ret = -ENOMEM; - goto error_free_builtname; - } - dp = opendir(device_dir); - if (dp == NULL) { - ret = -errno; - goto error_free_builtname_generic; - } - while (ent = readdir(dp), ent != NULL) - if ((strcmp(builtname, ent->d_name) == 0) || - (strcmp(builtname_generic, ent->d_name) == 0)) { - ret = asprintf(&filename, - "%s/%s", device_dir, ent->d_name); - if (ret < 0) { - ret = -ENOMEM; - goto error_closedir; - } - sysfsfp = fopen(filename, "r"); - if (!sysfsfp) { - ret = -errno; - goto error_free_filename; - } - fscanf(sysfsfp, "%f", output); - break; - } -error_free_filename: - if (filename) - free(filename); -error_closedir: - closedir(dp); -error_free_builtname_generic: - free(builtname_generic); -error_free_builtname: - free(builtname); -error_ret: - return ret; -} - -/** - * bsort_channel_array_by_index() - reorder so that the array is in index order - * - **/ - -void bsort_channel_array_by_index(struct iio_channel_info **ci_array, - int cnt) -{ - - struct iio_channel_info temp; - int x, y; - - for (x = 0; x < cnt; x++) - for (y = 0; y < (cnt - 1); y++) - if ((*ci_array)[y].index > (*ci_array)[y+1].index) { - temp = (*ci_array)[y + 1]; - (*ci_array)[y + 1] = (*ci_array)[y]; - (*ci_array)[y] = temp; - } -} - -/** - * build_channel_array() - function to figure out what channels are present - * @device_dir: the IIO device directory in sysfs - * @ - **/ -int build_channel_array(const char *device_dir, - struct iio_channel_info **ci_array, - int *counter) -{ - DIR *dp; - FILE *sysfsfp; - int count, i; - struct iio_channel_info *current; - int ret; - const struct dirent *ent; - char *scan_el_dir; - char *filename; - - *counter = 0; - ret = asprintf(&scan_el_dir, FORMAT_SCAN_ELEMENTS_DIR, device_dir); - if (ret < 0) { - ret = -ENOMEM; - goto error_ret; - } - dp = opendir(scan_el_dir); - if (dp == NULL) { - ret = -errno; - goto error_free_name; - } - while (ent = readdir(dp), ent != NULL) - if (strcmp(ent->d_name + strlen(ent->d_name) - strlen("_en"), - "_en") == 0) { - ret = asprintf(&filename, - "%s/%s", scan_el_dir, ent->d_name); - if (ret < 0) { - ret = -ENOMEM; - goto error_close_dir; - } - sysfsfp = fopen(filename, "r"); - if (sysfsfp == NULL) { - ret = -errno; - free(filename); - goto error_close_dir; - } - fscanf(sysfsfp, "%i", &ret); - if (ret == 1) - (*counter)++; - fclose(sysfsfp); - free(filename); - } - *ci_array = malloc(sizeof(**ci_array) * (*counter)); - if (*ci_array == NULL) { - ret = -ENOMEM; - goto error_close_dir; - } - seekdir(dp, 0); - count = 0; - while (ent = readdir(dp), ent != NULL) { - if (strcmp(ent->d_name + strlen(ent->d_name) - strlen("_en"), - "_en") == 0) { - int current_enabled = 0; - - current = &(*ci_array)[count++]; - ret = asprintf(&filename, - "%s/%s", scan_el_dir, ent->d_name); - if (ret < 0) { - ret = -ENOMEM; - /* decrement count to avoid freeing name */ - count--; - goto error_cleanup_array; - } - sysfsfp = fopen(filename, "r"); - if (sysfsfp == NULL) { - free(filename); - ret = -errno; - goto error_cleanup_array; - } - fscanf(sysfsfp, "%i", ¤t_enabled); - fclose(sysfsfp); - - if (!current_enabled) { - free(filename); - count--; - continue; - } - - current->scale = 1.0; - current->offset = 0; - current->name = strndup(ent->d_name, - strlen(ent->d_name) - - strlen("_en")); - if (current->name == NULL) { - free(filename); - ret = -ENOMEM; - goto error_cleanup_array; - } - /* Get the generic and specific name elements */ - ret = iioutils_break_up_name(current->name, - ¤t->generic_name); - if (ret) { - free(filename); - goto error_cleanup_array; - } - ret = asprintf(&filename, - "%s/%s_index", - scan_el_dir, - current->name); - if (ret < 0) { - free(filename); - ret = -ENOMEM; - goto error_cleanup_array; - } - sysfsfp = fopen(filename, "r"); - fscanf(sysfsfp, "%u", ¤t->index); - fclose(sysfsfp); - free(filename); - /* Find the scale */ - ret = iioutils_get_param_float(¤t->scale, - "scale", - device_dir, - current->name, - current->generic_name); - if (ret < 0) - goto error_cleanup_array; - ret = iioutils_get_param_float(¤t->offset, - "offset", - device_dir, - current->name, - current->generic_name); - if (ret < 0) - goto error_cleanup_array; - ret = iioutils_get_type(¤t->is_signed, - ¤t->bytes, - ¤t->bits_used, - ¤t->shift, - ¤t->mask, - ¤t->be, - device_dir, - current->name, - current->generic_name); - } - } - - closedir(dp); - /* reorder so that the array is in index order */ - bsort_channel_array_by_index(ci_array, *counter); - - return 0; - -error_cleanup_array: - for (i = count - 1; i >= 0; i--) - free((*ci_array)[i].name); - free(*ci_array); -error_close_dir: - closedir(dp); -error_free_name: - free(scan_el_dir); -error_ret: - return ret; -} - -/** - * find_type_by_name() - function to match top level types by name - * @name: top level type instance name - * @type: the type of top level instance being sort - * - * Typical types this is used for are device and trigger. - **/ -int find_type_by_name(const char *name, const char *type) -{ - const struct dirent *ent; - int number, numstrlen; - - FILE *nameFile; - DIR *dp; - char thisname[IIO_MAX_NAME_LENGTH]; - char *filename; - - dp = opendir(iio_dir); - if (dp == NULL) { - printf("No industrialio devices available\n"); - return -ENODEV; - } - - while (ent = readdir(dp), ent != NULL) { - if (strcmp(ent->d_name, ".") != 0 && - strcmp(ent->d_name, "..") != 0 && - strlen(ent->d_name) > strlen(type) && - strncmp(ent->d_name, type, strlen(type)) == 0) { - numstrlen = sscanf(ent->d_name + strlen(type), - "%d", - &number); - /* verify the next character is not a colon */ - if (strncmp(ent->d_name + strlen(type) + numstrlen, - ":", - 1) != 0) { - filename = malloc(strlen(iio_dir) - + strlen(type) - + numstrlen - + 6); - if (filename == NULL) { - closedir(dp); - return -ENOMEM; - } - sprintf(filename, "%s%s%d/name", - iio_dir, - type, - number); - nameFile = fopen(filename, "r"); - if (!nameFile) { - free(filename); - continue; - } - free(filename); - fscanf(nameFile, "%s", thisname); - fclose(nameFile); - if (strcmp(name, thisname) == 0) { - closedir(dp); - return number; - } - } - } - } - closedir(dp); - return -ENODEV; -} - -int _write_sysfs_int(char *filename, char *basedir, int val, int verify) -{ - int ret = 0; - FILE *sysfsfp; - int test; - char *temp = malloc(strlen(basedir) + strlen(filename) + 2); - - if (temp == NULL) - return -ENOMEM; - sprintf(temp, "%s/%s", basedir, filename); - sysfsfp = fopen(temp, "w"); - if (sysfsfp == NULL) { - printf("failed to open %s\n", temp); - ret = -errno; - goto error_free; - } - fprintf(sysfsfp, "%d", val); - fclose(sysfsfp); - if (verify) { - sysfsfp = fopen(temp, "r"); - if (sysfsfp == NULL) { - printf("failed to open %s\n", temp); - ret = -errno; - goto error_free; - } - fscanf(sysfsfp, "%d", &test); - fclose(sysfsfp); - if (test != val) { - printf("Possible failure in int write %d to %s%s\n", - val, - basedir, - filename); - ret = -1; - } - } -error_free: - free(temp); - return ret; -} - -int write_sysfs_int(char *filename, char *basedir, int val) -{ - return _write_sysfs_int(filename, basedir, val, 0); -} - -int write_sysfs_int_and_verify(char *filename, char *basedir, int val) -{ - return _write_sysfs_int(filename, basedir, val, 1); -} - -int _write_sysfs_string(char *filename, char *basedir, char *val, int verify) -{ - int ret = 0; - FILE *sysfsfp; - char *temp = malloc(strlen(basedir) + strlen(filename) + 2); - - if (temp == NULL) { - printf("Memory allocation failed\n"); - return -ENOMEM; - } - sprintf(temp, "%s/%s", basedir, filename); - sysfsfp = fopen(temp, "w"); - if (sysfsfp == NULL) { - printf("Could not open %s\n", temp); - ret = -errno; - goto error_free; - } - fprintf(sysfsfp, "%s", val); - fclose(sysfsfp); - if (verify) { - sysfsfp = fopen(temp, "r"); - if (sysfsfp == NULL) { - printf("could not open file to verify\n"); - ret = -errno; - goto error_free; - } - fscanf(sysfsfp, "%s", temp); - fclose(sysfsfp); - if (strcmp(temp, val) != 0) { - printf("Possible failure in string write of %s " - "Should be %s " - "written to %s\%s\n", - temp, - val, - basedir, - filename); - ret = -1; - } - } -error_free: - free(temp); - - return ret; -} - -/** - * write_sysfs_string_and_verify() - string write, readback and verify - * @filename: name of file to write to - * @basedir: the sysfs directory in which the file is to be found - * @val: the string to write - **/ -int write_sysfs_string_and_verify(char *filename, char *basedir, char *val) -{ - return _write_sysfs_string(filename, basedir, val, 1); -} - -int write_sysfs_string(char *filename, char *basedir, char *val) -{ - return _write_sysfs_string(filename, basedir, val, 0); -} - -int read_sysfs_posint(char *filename, char *basedir) -{ - int ret; - FILE *sysfsfp; - char *temp = malloc(strlen(basedir) + strlen(filename) + 2); - - if (temp == NULL) { - printf("Memory allocation failed"); - return -ENOMEM; - } - sprintf(temp, "%s/%s", basedir, filename); - sysfsfp = fopen(temp, "r"); - if (sysfsfp == NULL) { - ret = -errno; - goto error_free; - } - fscanf(sysfsfp, "%d\n", &ret); - fclose(sysfsfp); -error_free: - free(temp); - return ret; -} - -int read_sysfs_float(char *filename, char *basedir, float *val) -{ - int ret = 0; - FILE *sysfsfp; - char *temp = malloc(strlen(basedir) + strlen(filename) + 2); - - if (temp == NULL) { - printf("Memory allocation failed"); - return -ENOMEM; - } - sprintf(temp, "%s/%s", basedir, filename); - sysfsfp = fopen(temp, "r"); - if (sysfsfp == NULL) { - ret = -errno; - goto error_free; - } - fscanf(sysfsfp, "%f\n", val); - fclose(sysfsfp); -error_free: - free(temp); - return ret; -} - -int read_sysfs_string(const char *filename, const char *basedir, char *str) -{ - int ret = 0; - FILE *sysfsfp; - char *temp = malloc(strlen(basedir) + strlen(filename) + 2); - - if (temp == NULL) { - printf("Memory allocation failed"); - return -ENOMEM; - } - sprintf(temp, "%s/%s", basedir, filename); - sysfsfp = fopen(temp, "r"); - if (sysfsfp == NULL) { - ret = -errno; - goto error_free; - } - fscanf(sysfsfp, "%s\n", str); - fclose(sysfsfp); -error_free: - free(temp); - return ret; -} diff --git a/drivers/staging/iio/Documentation/iio_utils.h b/drivers/staging/iio/Documentation/iio_utils.h deleted file mode 100644 index 1bc837b2d769..000000000000 --- a/drivers/staging/iio/Documentation/iio_utils.h +++ /dev/null @@ -1,71 +0,0 @@ -#ifndef _IIO_UTILS_H_ -#define _IIO_UTILS_H_ - -/* IIO - useful set of util functionality - * - * Copyright (c) 2008 Jonathan Cameron - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published by - * the Free Software Foundation. - */ - -#include - -/* Made up value to limit allocation sizes */ -#define IIO_MAX_NAME_LENGTH 30 - -#define FORMAT_SCAN_ELEMENTS_DIR "%s/scan_elements" -#define FORMAT_TYPE_FILE "%s_type" - -extern const char *iio_dir; - -/** - * struct iio_channel_info - information about a given channel - * @name: channel name - * @generic_name: general name for channel type - * @scale: scale factor to be applied for conversion to si units - * @offset: offset to be applied for conversion to si units - * @index: the channel index in the buffer output - * @bytes: number of bytes occupied in buffer output - * @mask: a bit mask for the raw output - * @is_signed: is the raw value stored signed - * @enabled: is this channel enabled - **/ -struct iio_channel_info { - char *name; - char *generic_name; - float scale; - float offset; - unsigned index; - unsigned bytes; - unsigned bits_used; - unsigned shift; - uint64_t mask; - unsigned be; - unsigned is_signed; - unsigned location; -}; - -int iioutils_break_up_name(const char *full_name, char **generic_name); -int iioutils_get_type(unsigned *is_signed, unsigned *bytes, - unsigned *bits_used, unsigned *shift, - uint64_t *mask, unsigned *be, - const char *device_dir, const char *name, - const char *generic_name); -int iioutils_get_param_float(float *output, const char *param_name, - const char *device_dir, const char *name, - const char *generic_name); -void bsort_channel_array_by_index(struct iio_channel_info **ci_array, int cnt); -int build_channel_array(const char *device_dir, - struct iio_channel_info **ci_array, int *counter); -int find_type_by_name(const char *name, const char *type); -int write_sysfs_int(char *filename, char *basedir, int val); -int write_sysfs_int_and_verify(char *filename, char *basedir, int val); -int write_sysfs_string_and_verify(char *filename, char *basedir, char *val); -int write_sysfs_string(char *filename, char *basedir, char *val); -int read_sysfs_posint(char *filename, char *basedir); -int read_sysfs_float(char *filename, char *basedir, float *val); -int read_sysfs_string(const char *filename, const char *basedir, char *str); - -#endif /* _IIO_UTILS_H_ */ diff --git a/drivers/staging/iio/Documentation/lsiio.c b/drivers/staging/iio/Documentation/lsiio.c deleted file mode 100644 index 98a0de098130..000000000000 --- a/drivers/staging/iio/Documentation/lsiio.c +++ /dev/null @@ -1,163 +0,0 @@ -/* - * Industrial I/O utilities - lsiio.c - * - * Copyright (c) 2010 Manuel Stahl - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published by - * the Free Software Foundation. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include "iio_utils.h" - - -static enum verbosity { - VERBLEVEL_DEFAULT, /* 0 gives lspci behaviour */ - VERBLEVEL_SENSORS, /* 1 lists sensors */ -} verblevel = VERBLEVEL_DEFAULT; - -const char *type_device = "iio:device"; -const char *type_trigger = "trigger"; - - -static inline int check_prefix(const char *str, const char *prefix) -{ - return strlen(str) > strlen(prefix) && - strncmp(str, prefix, strlen(prefix)) == 0; -} - -static inline int check_postfix(const char *str, const char *postfix) -{ - return strlen(str) > strlen(postfix) && - strcmp(str + strlen(str) - strlen(postfix), postfix) == 0; -} - -static int dump_channels(const char *dev_dir_name) -{ - DIR *dp; - const struct dirent *ent; - - dp = opendir(dev_dir_name); - if (dp == NULL) - return -errno; - while (ent = readdir(dp), ent != NULL) - if (check_prefix(ent->d_name, "in_") && - check_postfix(ent->d_name, "_raw")) { - printf(" %-10s\n", ent->d_name); - } - - return 0; -} - -static int dump_one_device(const char *dev_dir_name) -{ - char name[IIO_MAX_NAME_LENGTH]; - int dev_idx; - int retval; - - retval = sscanf(dev_dir_name + strlen(iio_dir) + strlen(type_device), - "%i", &dev_idx); - if (retval != 1) - return -EINVAL; - read_sysfs_string("name", dev_dir_name, name); - printf("Device %03d: %s\n", dev_idx, name); - - if (verblevel >= VERBLEVEL_SENSORS) - return dump_channels(dev_dir_name); - return 0; -} - -static int dump_one_trigger(const char *dev_dir_name) -{ - char name[IIO_MAX_NAME_LENGTH]; - int dev_idx; - int retval; - - retval = sscanf(dev_dir_name + strlen(iio_dir) + strlen(type_trigger), - "%i", &dev_idx); - if (retval != 1) - return -EINVAL; - read_sysfs_string("name", dev_dir_name, name); - printf("Trigger %03d: %s\n", dev_idx, name); - return 0; -} - -static void dump_devices(void) -{ - const struct dirent *ent; - int number, numstrlen; - - FILE *nameFile; - DIR *dp; - char thisname[IIO_MAX_NAME_LENGTH]; - char *filename; - - dp = opendir(iio_dir); - if (dp == NULL) { - printf("No industrial I/O devices available\n"); - return; - } - - while (ent = readdir(dp), ent != NULL) { - if (check_prefix(ent->d_name, type_device)) { - char *dev_dir_name; - - asprintf(&dev_dir_name, "%s%s", iio_dir, ent->d_name); - dump_one_device(dev_dir_name); - free(dev_dir_name); - if (verblevel >= VERBLEVEL_SENSORS) - printf("\n"); - } - } - rewinddir(dp); - while (ent = readdir(dp), ent != NULL) { - if (check_prefix(ent->d_name, type_trigger)) { - char *dev_dir_name; - - asprintf(&dev_dir_name, "%s%s", iio_dir, ent->d_name); - dump_one_trigger(dev_dir_name); - free(dev_dir_name); - } - } - closedir(dp); -} - -int main(int argc, char **argv) -{ - int c, err = 0; - - while ((c = getopt(argc, argv, "d:D:v")) != EOF) { - switch (c) { - case 'v': - verblevel++; - break; - - case '?': - default: - err++; - break; - } - } - if (err || argc > optind) { - fprintf(stderr, "Usage: lsiio [options]...\n" - "List industrial I/O devices\n" - " -v, --verbose\n" - " Increase verbosity (may be given multiple times)\n" - ); - exit(1); - } - - dump_devices(); - - return 0; -} diff --git a/tools/iio/Makefile b/tools/iio/Makefile new file mode 100644 index 000000000000..83813ad379f9 --- /dev/null +++ b/tools/iio/Makefile @@ -0,0 +1,16 @@ +CC = gcc +CFLAGS = -Wall -g + +all: iio_event_monitor lsiio generic_buffer + +iio_event_monitor: iio_event_monitor.o iio_utils.o + +lsiio: lsiio.o iio_utils.o + +generic_buffer: generic_buffer.o iio_utils.o + +%.o: %.c iio_utils.h + +.PHONY: clean +clean: + rm -f *.o iio_event_monitor lsiio generic_buffer diff --git a/tools/iio/generic_buffer.c b/tools/iio/generic_buffer.c new file mode 100644 index 000000000000..01266c2556da --- /dev/null +++ b/tools/iio/generic_buffer.c @@ -0,0 +1,361 @@ +/* Industrialio buffer test code. + * + * Copyright (c) 2008 Jonathan Cameron + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published by + * the Free Software Foundation. + * + * This program is primarily intended as an example application. + * Reads the current buffer setup from sysfs and starts a short capture + * from the specified device, pretty printing the result after appropriate + * conversion. + * + * Command line parameters + * generic_buffer -n -t + * If trigger name is not specified the program assumes you want a dataready + * trigger associated with the device and goes looking for it. + * + */ + +#define _GNU_SOURCE + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "iio_utils.h" + +/** + * size_from_channelarray() - calculate the storage size of a scan + * @channels: the channel info array + * @num_channels: number of channels + * + * Has the side effect of filling the channels[i].location values used + * in processing the buffer output. + **/ +int size_from_channelarray(struct iio_channel_info *channels, int num_channels) +{ + int bytes = 0; + int i = 0; + + while (i < num_channels) { + if (bytes % channels[i].bytes == 0) + channels[i].location = bytes; + else + channels[i].location = bytes - bytes%channels[i].bytes + + channels[i].bytes; + bytes = channels[i].location + channels[i].bytes; + i++; + } + return bytes; +} + +void print2byte(int input, struct iio_channel_info *info) +{ + /* First swap if incorrect endian */ + if (info->be) + input = be16toh((uint16_t)input); + else + input = le16toh((uint16_t)input); + + /* + * Shift before conversion to avoid sign extension + * of left aligned data + */ + input = input >> info->shift; + if (info->is_signed) { + int16_t val = input; + + val &= (1 << info->bits_used) - 1; + val = (int16_t)(val << (16 - info->bits_used)) >> + (16 - info->bits_used); + printf("%05f ", ((float)val + info->offset)*info->scale); + } else { + uint16_t val = input; + + val &= (1 << info->bits_used) - 1; + printf("%05f ", ((float)val + info->offset)*info->scale); + } +} +/** + * process_scan() - print out the values in SI units + * @data: pointer to the start of the scan + * @channels: information about the channels. Note + * size_from_channelarray must have been called first to fill the + * location offsets. + * @num_channels: number of channels + **/ +void process_scan(char *data, + struct iio_channel_info *channels, + int num_channels) +{ + int k; + + for (k = 0; k < num_channels; k++) + switch (channels[k].bytes) { + /* only a few cases implemented so far */ + case 2: + print2byte(*(uint16_t *)(data + channels[k].location), + &channels[k]); + break; + case 4: + if (!channels[k].is_signed) { + uint32_t val = *(uint32_t *) + (data + channels[k].location); + printf("%05f ", ((float)val + + channels[k].offset)* + channels[k].scale); + + } + break; + case 8: + if (channels[k].is_signed) { + int64_t val = *(int64_t *) + (data + + channels[k].location); + if ((val >> channels[k].bits_used) & 1) + val = (val & channels[k].mask) | + ~channels[k].mask; + /* special case for timestamp */ + if (channels[k].scale == 1.0f && + channels[k].offset == 0.0f) + printf("%" PRId64 " ", val); + else + printf("%05f ", ((float)val + + channels[k].offset)* + channels[k].scale); + } + break; + default: + break; + } + printf("\n"); +} + +int main(int argc, char **argv) +{ + unsigned long num_loops = 2; + unsigned long timedelay = 1000000; + unsigned long buf_len = 128; + + int ret, c, i, j, toread; + int fp; + + int num_channels; + char *trigger_name = NULL, *device_name = NULL; + char *dev_dir_name, *buf_dir_name; + + int datardytrigger = 1; + char *data; + ssize_t read_size; + int dev_num, trig_num; + char *buffer_access; + int scan_size; + int noevents = 0; + int notrigger = 0; + char *dummy; + + struct iio_channel_info *channels; + + while ((c = getopt(argc, argv, "l:w:c:et:n:g")) != -1) { + switch (c) { + case 'n': + device_name = optarg; + break; + case 't': + trigger_name = optarg; + datardytrigger = 0; + break; + case 'e': + noevents = 1; + break; + case 'c': + num_loops = strtoul(optarg, &dummy, 10); + break; + case 'w': + timedelay = strtoul(optarg, &dummy, 10); + break; + case 'l': + buf_len = strtoul(optarg, &dummy, 10); + break; + case 'g': + notrigger = 1; + break; + case '?': + return -1; + } + } + + if (device_name == NULL) + return -1; + + /* Find the device requested */ + dev_num = find_type_by_name(device_name, "iio:device"); + if (dev_num < 0) { + printf("Failed to find the %s\n", device_name); + ret = -ENODEV; + goto error_ret; + } + printf("iio device number being used is %d\n", dev_num); + + asprintf(&dev_dir_name, "%siio:device%d", iio_dir, dev_num); + + if (!notrigger) { + if (trigger_name == NULL) { + /* + * Build the trigger name. If it is device associated + * its name is _dev[n] where n matches + * the device number found above. + */ + ret = asprintf(&trigger_name, + "%s-dev%d", device_name, dev_num); + if (ret < 0) { + ret = -ENOMEM; + goto error_ret; + } + } + + /* Verify the trigger exists */ + trig_num = find_type_by_name(trigger_name, "trigger"); + if (trig_num < 0) { + printf("Failed to find the trigger %s\n", trigger_name); + ret = -ENODEV; + goto error_free_triggername; + } + printf("iio trigger number being used is %d\n", trig_num); + } else + printf("trigger-less mode selected\n"); + + /* + * Parse the files in scan_elements to identify what channels are + * present + */ + ret = build_channel_array(dev_dir_name, &channels, &num_channels); + if (ret) { + printf("Problem reading scan element information\n"); + printf("diag %s\n", dev_dir_name); + goto error_free_triggername; + } + + /* + * Construct the directory name for the associated buffer. + * As we know that the lis3l02dq has only one buffer this may + * be built rather than found. + */ + ret = asprintf(&buf_dir_name, + "%siio:device%d/buffer", iio_dir, dev_num); + if (ret < 0) { + ret = -ENOMEM; + goto error_free_triggername; + } + + if (!notrigger) { + printf("%s %s\n", dev_dir_name, trigger_name); + /* Set the device trigger to be the data ready trigger found + * above */ + ret = write_sysfs_string_and_verify("trigger/current_trigger", + dev_dir_name, + trigger_name); + if (ret < 0) { + printf("Failed to write current_trigger file\n"); + goto error_free_buf_dir_name; + } + } + + /* Setup ring buffer parameters */ + ret = write_sysfs_int("length", buf_dir_name, buf_len); + if (ret < 0) + goto error_free_buf_dir_name; + + /* Enable the buffer */ + ret = write_sysfs_int("enable", buf_dir_name, 1); + if (ret < 0) + goto error_free_buf_dir_name; + scan_size = size_from_channelarray(channels, num_channels); + data = malloc(scan_size*buf_len); + if (!data) { + ret = -ENOMEM; + goto error_free_buf_dir_name; + } + + ret = asprintf(&buffer_access, "/dev/iio:device%d", dev_num); + if (ret < 0) { + ret = -ENOMEM; + goto error_free_data; + } + + /* Attempt to open non blocking the access dev */ + fp = open(buffer_access, O_RDONLY | O_NONBLOCK); + if (fp == -1) { /* If it isn't there make the node */ + printf("Failed to open %s\n", buffer_access); + ret = -errno; + goto error_free_buffer_access; + } + + /* Wait for events 10 times */ + for (j = 0; j < num_loops; j++) { + if (!noevents) { + struct pollfd pfd = { + .fd = fp, + .events = POLLIN, + }; + + poll(&pfd, 1, -1); + toread = buf_len; + + } else { + usleep(timedelay); + toread = 64; + } + + read_size = read(fp, + data, + toread*scan_size); + if (read_size < 0) { + if (errno == -EAGAIN) { + printf("nothing available\n"); + continue; + } else + break; + } + for (i = 0; i < read_size/scan_size; i++) + process_scan(data + scan_size*i, + channels, + num_channels); + } + + /* Stop the buffer */ + ret = write_sysfs_int("enable", buf_dir_name, 0); + if (ret < 0) + goto error_close_buffer_access; + + if (!notrigger) + /* Disconnect the trigger - just write a dummy name. */ + write_sysfs_string("trigger/current_trigger", + dev_dir_name, "NULL"); + +error_close_buffer_access: + close(fp); +error_free_data: + free(data); +error_free_buffer_access: + free(buffer_access); +error_free_buf_dir_name: + free(buf_dir_name); +error_free_triggername: + if (datardytrigger) + free(trigger_name); +error_ret: + return ret; +} diff --git a/tools/iio/iio_event_monitor.c b/tools/iio/iio_event_monitor.c new file mode 100644 index 000000000000..f19cff19900e --- /dev/null +++ b/tools/iio/iio_event_monitor.c @@ -0,0 +1,310 @@ +/* Industrialio event test code. + * + * Copyright (c) 2011-2012 Lars-Peter Clausen + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published by + * the Free Software Foundation. + * + * This program is primarily intended as an example application. + * Reads the current buffer setup from sysfs and starts a short capture + * from the specified device, pretty printing the result after appropriate + * conversion. + * + * Usage: + * iio_event_monitor + * + */ + +#define _GNU_SOURCE + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "iio_utils.h" +#include +#include + +static const char * const iio_chan_type_name_spec[] = { + [IIO_VOLTAGE] = "voltage", + [IIO_CURRENT] = "current", + [IIO_POWER] = "power", + [IIO_ACCEL] = "accel", + [IIO_ANGL_VEL] = "anglvel", + [IIO_MAGN] = "magn", + [IIO_LIGHT] = "illuminance", + [IIO_INTENSITY] = "intensity", + [IIO_PROXIMITY] = "proximity", + [IIO_TEMP] = "temp", + [IIO_INCLI] = "incli", + [IIO_ROT] = "rot", + [IIO_ANGL] = "angl", + [IIO_TIMESTAMP] = "timestamp", + [IIO_CAPACITANCE] = "capacitance", + [IIO_ALTVOLTAGE] = "altvoltage", + [IIO_CCT] = "cct", + [IIO_PRESSURE] = "pressure", + [IIO_HUMIDITYRELATIVE] = "humidityrelative", + [IIO_ACTIVITY] = "activity", + [IIO_STEPS] = "steps", +}; + +static const char * const iio_ev_type_text[] = { + [IIO_EV_TYPE_THRESH] = "thresh", + [IIO_EV_TYPE_MAG] = "mag", + [IIO_EV_TYPE_ROC] = "roc", + [IIO_EV_TYPE_THRESH_ADAPTIVE] = "thresh_adaptive", + [IIO_EV_TYPE_MAG_ADAPTIVE] = "mag_adaptive", + [IIO_EV_TYPE_CHANGE] = "change", +}; + +static const char * const iio_ev_dir_text[] = { + [IIO_EV_DIR_EITHER] = "either", + [IIO_EV_DIR_RISING] = "rising", + [IIO_EV_DIR_FALLING] = "falling" +}; + +static const char * const iio_modifier_names[] = { + [IIO_MOD_X] = "x", + [IIO_MOD_Y] = "y", + [IIO_MOD_Z] = "z", + [IIO_MOD_X_AND_Y] = "x&y", + [IIO_MOD_X_AND_Z] = "x&z", + [IIO_MOD_Y_AND_Z] = "y&z", + [IIO_MOD_X_AND_Y_AND_Z] = "x&y&z", + [IIO_MOD_X_OR_Y] = "x|y", + [IIO_MOD_X_OR_Z] = "x|z", + [IIO_MOD_Y_OR_Z] = "y|z", + [IIO_MOD_X_OR_Y_OR_Z] = "x|y|z", + [IIO_MOD_LIGHT_BOTH] = "both", + [IIO_MOD_LIGHT_IR] = "ir", + [IIO_MOD_ROOT_SUM_SQUARED_X_Y] = "sqrt(x^2+y^2)", + [IIO_MOD_SUM_SQUARED_X_Y_Z] = "x^2+y^2+z^2", + [IIO_MOD_LIGHT_CLEAR] = "clear", + [IIO_MOD_LIGHT_RED] = "red", + [IIO_MOD_LIGHT_GREEN] = "green", + [IIO_MOD_LIGHT_BLUE] = "blue", + [IIO_MOD_QUATERNION] = "quaternion", + [IIO_MOD_TEMP_AMBIENT] = "ambient", + [IIO_MOD_TEMP_OBJECT] = "object", + [IIO_MOD_NORTH_MAGN] = "from_north_magnetic", + [IIO_MOD_NORTH_TRUE] = "from_north_true", + [IIO_MOD_NORTH_MAGN_TILT_COMP] = "from_north_magnetic_tilt_comp", + [IIO_MOD_NORTH_TRUE_TILT_COMP] = "from_north_true_tilt_comp", + [IIO_MOD_RUNNING] = "running", + [IIO_MOD_JOGGING] = "jogging", + [IIO_MOD_WALKING] = "walking", + [IIO_MOD_STILL] = "still", +}; + +static bool event_is_known(struct iio_event_data *event) +{ + enum iio_chan_type type = IIO_EVENT_CODE_EXTRACT_CHAN_TYPE(event->id); + enum iio_modifier mod = IIO_EVENT_CODE_EXTRACT_MODIFIER(event->id); + enum iio_event_type ev_type = IIO_EVENT_CODE_EXTRACT_TYPE(event->id); + enum iio_event_direction dir = IIO_EVENT_CODE_EXTRACT_DIR(event->id); + + switch (type) { + case IIO_VOLTAGE: + case IIO_CURRENT: + case IIO_POWER: + case IIO_ACCEL: + case IIO_ANGL_VEL: + case IIO_MAGN: + case IIO_LIGHT: + case IIO_INTENSITY: + case IIO_PROXIMITY: + case IIO_TEMP: + case IIO_INCLI: + case IIO_ROT: + case IIO_ANGL: + case IIO_TIMESTAMP: + case IIO_CAPACITANCE: + case IIO_ALTVOLTAGE: + case IIO_CCT: + case IIO_PRESSURE: + case IIO_HUMIDITYRELATIVE: + case IIO_ACTIVITY: + case IIO_STEPS: + break; + default: + return false; + } + + switch (mod) { + case IIO_NO_MOD: + case IIO_MOD_X: + case IIO_MOD_Y: + case IIO_MOD_Z: + case IIO_MOD_X_AND_Y: + case IIO_MOD_X_AND_Z: + case IIO_MOD_Y_AND_Z: + case IIO_MOD_X_AND_Y_AND_Z: + case IIO_MOD_X_OR_Y: + case IIO_MOD_X_OR_Z: + case IIO_MOD_Y_OR_Z: + case IIO_MOD_X_OR_Y_OR_Z: + case IIO_MOD_LIGHT_BOTH: + case IIO_MOD_LIGHT_IR: + case IIO_MOD_ROOT_SUM_SQUARED_X_Y: + case IIO_MOD_SUM_SQUARED_X_Y_Z: + case IIO_MOD_LIGHT_CLEAR: + case IIO_MOD_LIGHT_RED: + case IIO_MOD_LIGHT_GREEN: + case IIO_MOD_LIGHT_BLUE: + case IIO_MOD_QUATERNION: + case IIO_MOD_TEMP_AMBIENT: + case IIO_MOD_TEMP_OBJECT: + case IIO_MOD_NORTH_MAGN: + case IIO_MOD_NORTH_TRUE: + case IIO_MOD_NORTH_MAGN_TILT_COMP: + case IIO_MOD_NORTH_TRUE_TILT_COMP: + case IIO_MOD_RUNNING: + case IIO_MOD_JOGGING: + case IIO_MOD_WALKING: + case IIO_MOD_STILL: + break; + default: + return false; + } + + switch (ev_type) { + case IIO_EV_TYPE_THRESH: + case IIO_EV_TYPE_MAG: + case IIO_EV_TYPE_ROC: + case IIO_EV_TYPE_THRESH_ADAPTIVE: + case IIO_EV_TYPE_MAG_ADAPTIVE: + case IIO_EV_TYPE_CHANGE: + break; + default: + return false; + } + + switch (dir) { + case IIO_EV_DIR_EITHER: + case IIO_EV_DIR_RISING: + case IIO_EV_DIR_FALLING: + case IIO_EV_DIR_NONE: + break; + default: + return false; + } + + return true; +} + +static void print_event(struct iio_event_data *event) +{ + enum iio_chan_type type = IIO_EVENT_CODE_EXTRACT_CHAN_TYPE(event->id); + enum iio_modifier mod = IIO_EVENT_CODE_EXTRACT_MODIFIER(event->id); + enum iio_event_type ev_type = IIO_EVENT_CODE_EXTRACT_TYPE(event->id); + enum iio_event_direction dir = IIO_EVENT_CODE_EXTRACT_DIR(event->id); + int chan = IIO_EVENT_CODE_EXTRACT_CHAN(event->id); + int chan2 = IIO_EVENT_CODE_EXTRACT_CHAN2(event->id); + bool diff = IIO_EVENT_CODE_EXTRACT_DIFF(event->id); + + if (!event_is_known(event)) { + printf("Unknown event: time: %lld, id: %llx\n", + event->timestamp, event->id); + return; + } + + printf("Event: time: %lld, ", event->timestamp); + + if (mod != IIO_NO_MOD) { + printf("type: %s(%s), ", + iio_chan_type_name_spec[type], + iio_modifier_names[mod]); + } else { + printf("type: %s, ", + iio_chan_type_name_spec[type]); + } + + if (diff && chan >= 0 && chan2 >= 0) + printf("channel: %d-%d, ", chan, chan2); + else if (chan >= 0) + printf("channel: %d, ", chan); + + printf("evtype: %s", iio_ev_type_text[ev_type]); + + if (dir != IIO_EV_DIR_NONE) + printf(", direction: %s", iio_ev_dir_text[dir]); + printf("\n"); +} + +int main(int argc, char **argv) +{ + struct iio_event_data event; + const char *device_name; + char *chrdev_name; + int ret; + int dev_num; + int fd, event_fd; + + if (argc <= 1) { + printf("Usage: %s \n", argv[0]); + return -1; + } + + device_name = argv[1]; + + dev_num = find_type_by_name(device_name, "iio:device"); + if (dev_num >= 0) { + printf("Found IIO device with name %s with device number %d\n", + device_name, dev_num); + ret = asprintf(&chrdev_name, "/dev/iio:device%d", dev_num); + if (ret < 0) { + ret = -ENOMEM; + goto error_ret; + } + } else { + /* If we can't find a IIO device by name assume device_name is a + IIO chrdev */ + chrdev_name = strdup(device_name); + } + + fd = open(chrdev_name, 0); + if (fd == -1) { + fprintf(stdout, "Failed to open %s\n", chrdev_name); + ret = -errno; + goto error_free_chrdev_name; + } + + ret = ioctl(fd, IIO_GET_EVENT_FD_IOCTL, &event_fd); + + close(fd); + + if (ret == -1 || event_fd == -1) { + fprintf(stdout, "Failed to retrieve event fd\n"); + ret = -errno; + goto error_free_chrdev_name; + } + + while (true) { + ret = read(event_fd, &event, sizeof(event)); + if (ret == -1) { + if (errno == EAGAIN) { + printf("nothing available\n"); + continue; + } else { + perror("Failed to read event from device"); + ret = -errno; + break; + } + } + + print_event(&event); + } + + close(event_fd); +error_free_chrdev_name: + free(chrdev_name); +error_ret: + return ret; +} diff --git a/tools/iio/iio_utils.c b/tools/iio/iio_utils.c new file mode 100644 index 000000000000..aea928210187 --- /dev/null +++ b/tools/iio/iio_utils.c @@ -0,0 +1,651 @@ +/* IIO - useful set of util functionality + * + * Copyright (c) 2008 Jonathan Cameron + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published by + * the Free Software Foundation. + */ + +#include +#include +#include +#include +#include +#include +#include +#include "iio_utils.h" + +const char *iio_dir = "/sys/bus/iio/devices/"; + +/** + * iioutils_break_up_name() - extract generic name from full channel name + * @full_name: the full channel name + * @generic_name: the output generic channel name + **/ +int iioutils_break_up_name(const char *full_name, + char **generic_name) +{ + char *current; + char *w, *r; + char *working; + + current = strdup(full_name); + working = strtok(current, "_\0"); + w = working; + r = working; + + while (*r != '\0') { + if (!isdigit(*r)) { + *w = *r; + w++; + } + r++; + } + *w = '\0'; + *generic_name = strdup(working); + free(current); + + return 0; +} + +/** + * iioutils_get_type() - find and process _type attribute data + * @is_signed: output whether channel is signed + * @bytes: output how many bytes the channel storage occupies + * @mask: output a bit mask for the raw data + * @be: big endian + * @device_dir: the iio device directory + * @name: the channel name + * @generic_name: the channel type name + **/ +int iioutils_get_type(unsigned *is_signed, + unsigned *bytes, + unsigned *bits_used, + unsigned *shift, + uint64_t *mask, + unsigned *be, + const char *device_dir, + const char *name, + const char *generic_name) +{ + FILE *sysfsfp; + int ret; + DIR *dp; + char *scan_el_dir, *builtname, *builtname_generic, *filename = 0; + char signchar, endianchar; + unsigned padint; + const struct dirent *ent; + + ret = asprintf(&scan_el_dir, FORMAT_SCAN_ELEMENTS_DIR, device_dir); + if (ret < 0) { + ret = -ENOMEM; + goto error_ret; + } + ret = asprintf(&builtname, FORMAT_TYPE_FILE, name); + if (ret < 0) { + ret = -ENOMEM; + goto error_free_scan_el_dir; + } + ret = asprintf(&builtname_generic, FORMAT_TYPE_FILE, generic_name); + if (ret < 0) { + ret = -ENOMEM; + goto error_free_builtname; + } + + dp = opendir(scan_el_dir); + if (dp == NULL) { + ret = -errno; + goto error_free_builtname_generic; + } + while (ent = readdir(dp), ent != NULL) + /* + * Do we allow devices to override a generic name with + * a specific one? + */ + if ((strcmp(builtname, ent->d_name) == 0) || + (strcmp(builtname_generic, ent->d_name) == 0)) { + ret = asprintf(&filename, + "%s/%s", scan_el_dir, ent->d_name); + if (ret < 0) { + ret = -ENOMEM; + goto error_closedir; + } + sysfsfp = fopen(filename, "r"); + if (sysfsfp == NULL) { + printf("failed to open %s\n", filename); + ret = -errno; + goto error_free_filename; + } + + ret = fscanf(sysfsfp, + "%ce:%c%u/%u>>%u", + &endianchar, + &signchar, + bits_used, + &padint, shift); + if (ret < 0) { + printf("failed to pass scan type description\n"); + ret = -errno; + goto error_close_sysfsfp; + } + *be = (endianchar == 'b'); + *bytes = padint / 8; + if (*bits_used == 64) + *mask = ~0; + else + *mask = (1 << *bits_used) - 1; + if (signchar == 's') + *is_signed = 1; + else + *is_signed = 0; + fclose(sysfsfp); + free(filename); + + filename = 0; + sysfsfp = 0; + } +error_close_sysfsfp: + if (sysfsfp) + fclose(sysfsfp); +error_free_filename: + if (filename) + free(filename); +error_closedir: + closedir(dp); +error_free_builtname_generic: + free(builtname_generic); +error_free_builtname: + free(builtname); +error_free_scan_el_dir: + free(scan_el_dir); +error_ret: + return ret; +} + +int iioutils_get_param_float(float *output, + const char *param_name, + const char *device_dir, + const char *name, + const char *generic_name) +{ + FILE *sysfsfp; + int ret; + DIR *dp; + char *builtname, *builtname_generic; + char *filename = NULL; + const struct dirent *ent; + + ret = asprintf(&builtname, "%s_%s", name, param_name); + if (ret < 0) { + ret = -ENOMEM; + goto error_ret; + } + ret = asprintf(&builtname_generic, + "%s_%s", generic_name, param_name); + if (ret < 0) { + ret = -ENOMEM; + goto error_free_builtname; + } + dp = opendir(device_dir); + if (dp == NULL) { + ret = -errno; + goto error_free_builtname_generic; + } + while (ent = readdir(dp), ent != NULL) + if ((strcmp(builtname, ent->d_name) == 0) || + (strcmp(builtname_generic, ent->d_name) == 0)) { + ret = asprintf(&filename, + "%s/%s", device_dir, ent->d_name); + if (ret < 0) { + ret = -ENOMEM; + goto error_closedir; + } + sysfsfp = fopen(filename, "r"); + if (!sysfsfp) { + ret = -errno; + goto error_free_filename; + } + fscanf(sysfsfp, "%f", output); + break; + } +error_free_filename: + if (filename) + free(filename); +error_closedir: + closedir(dp); +error_free_builtname_generic: + free(builtname_generic); +error_free_builtname: + free(builtname); +error_ret: + return ret; +} + +/** + * bsort_channel_array_by_index() - reorder so that the array is in index order + * + **/ + +void bsort_channel_array_by_index(struct iio_channel_info **ci_array, + int cnt) +{ + + struct iio_channel_info temp; + int x, y; + + for (x = 0; x < cnt; x++) + for (y = 0; y < (cnt - 1); y++) + if ((*ci_array)[y].index > (*ci_array)[y+1].index) { + temp = (*ci_array)[y + 1]; + (*ci_array)[y + 1] = (*ci_array)[y]; + (*ci_array)[y] = temp; + } +} + +/** + * build_channel_array() - function to figure out what channels are present + * @device_dir: the IIO device directory in sysfs + * @ + **/ +int build_channel_array(const char *device_dir, + struct iio_channel_info **ci_array, + int *counter) +{ + DIR *dp; + FILE *sysfsfp; + int count, i; + struct iio_channel_info *current; + int ret; + const struct dirent *ent; + char *scan_el_dir; + char *filename; + + *counter = 0; + ret = asprintf(&scan_el_dir, FORMAT_SCAN_ELEMENTS_DIR, device_dir); + if (ret < 0) { + ret = -ENOMEM; + goto error_ret; + } + dp = opendir(scan_el_dir); + if (dp == NULL) { + ret = -errno; + goto error_free_name; + } + while (ent = readdir(dp), ent != NULL) + if (strcmp(ent->d_name + strlen(ent->d_name) - strlen("_en"), + "_en") == 0) { + ret = asprintf(&filename, + "%s/%s", scan_el_dir, ent->d_name); + if (ret < 0) { + ret = -ENOMEM; + goto error_close_dir; + } + sysfsfp = fopen(filename, "r"); + if (sysfsfp == NULL) { + ret = -errno; + free(filename); + goto error_close_dir; + } + fscanf(sysfsfp, "%i", &ret); + if (ret == 1) + (*counter)++; + fclose(sysfsfp); + free(filename); + } + *ci_array = malloc(sizeof(**ci_array) * (*counter)); + if (*ci_array == NULL) { + ret = -ENOMEM; + goto error_close_dir; + } + seekdir(dp, 0); + count = 0; + while (ent = readdir(dp), ent != NULL) { + if (strcmp(ent->d_name + strlen(ent->d_name) - strlen("_en"), + "_en") == 0) { + int current_enabled = 0; + + current = &(*ci_array)[count++]; + ret = asprintf(&filename, + "%s/%s", scan_el_dir, ent->d_name); + if (ret < 0) { + ret = -ENOMEM; + /* decrement count to avoid freeing name */ + count--; + goto error_cleanup_array; + } + sysfsfp = fopen(filename, "r"); + if (sysfsfp == NULL) { + free(filename); + ret = -errno; + goto error_cleanup_array; + } + fscanf(sysfsfp, "%i", ¤t_enabled); + fclose(sysfsfp); + + if (!current_enabled) { + free(filename); + count--; + continue; + } + + current->scale = 1.0; + current->offset = 0; + current->name = strndup(ent->d_name, + strlen(ent->d_name) - + strlen("_en")); + if (current->name == NULL) { + free(filename); + ret = -ENOMEM; + goto error_cleanup_array; + } + /* Get the generic and specific name elements */ + ret = iioutils_break_up_name(current->name, + ¤t->generic_name); + if (ret) { + free(filename); + goto error_cleanup_array; + } + ret = asprintf(&filename, + "%s/%s_index", + scan_el_dir, + current->name); + if (ret < 0) { + free(filename); + ret = -ENOMEM; + goto error_cleanup_array; + } + sysfsfp = fopen(filename, "r"); + fscanf(sysfsfp, "%u", ¤t->index); + fclose(sysfsfp); + free(filename); + /* Find the scale */ + ret = iioutils_get_param_float(¤t->scale, + "scale", + device_dir, + current->name, + current->generic_name); + if (ret < 0) + goto error_cleanup_array; + ret = iioutils_get_param_float(¤t->offset, + "offset", + device_dir, + current->name, + current->generic_name); + if (ret < 0) + goto error_cleanup_array; + ret = iioutils_get_type(¤t->is_signed, + ¤t->bytes, + ¤t->bits_used, + ¤t->shift, + ¤t->mask, + ¤t->be, + device_dir, + current->name, + current->generic_name); + } + } + + closedir(dp); + /* reorder so that the array is in index order */ + bsort_channel_array_by_index(ci_array, *counter); + + return 0; + +error_cleanup_array: + for (i = count - 1; i >= 0; i--) + free((*ci_array)[i].name); + free(*ci_array); +error_close_dir: + closedir(dp); +error_free_name: + free(scan_el_dir); +error_ret: + return ret; +} + +/** + * find_type_by_name() - function to match top level types by name + * @name: top level type instance name + * @type: the type of top level instance being sort + * + * Typical types this is used for are device and trigger. + **/ +int find_type_by_name(const char *name, const char *type) +{ + const struct dirent *ent; + int number, numstrlen; + + FILE *nameFile; + DIR *dp; + char thisname[IIO_MAX_NAME_LENGTH]; + char *filename; + + dp = opendir(iio_dir); + if (dp == NULL) { + printf("No industrialio devices available\n"); + return -ENODEV; + } + + while (ent = readdir(dp), ent != NULL) { + if (strcmp(ent->d_name, ".") != 0 && + strcmp(ent->d_name, "..") != 0 && + strlen(ent->d_name) > strlen(type) && + strncmp(ent->d_name, type, strlen(type)) == 0) { + numstrlen = sscanf(ent->d_name + strlen(type), + "%d", + &number); + /* verify the next character is not a colon */ + if (strncmp(ent->d_name + strlen(type) + numstrlen, + ":", + 1) != 0) { + filename = malloc(strlen(iio_dir) + + strlen(type) + + numstrlen + + 6); + if (filename == NULL) { + closedir(dp); + return -ENOMEM; + } + sprintf(filename, "%s%s%d/name", + iio_dir, + type, + number); + nameFile = fopen(filename, "r"); + if (!nameFile) { + free(filename); + continue; + } + free(filename); + fscanf(nameFile, "%s", thisname); + fclose(nameFile); + if (strcmp(name, thisname) == 0) { + closedir(dp); + return number; + } + } + } + } + closedir(dp); + return -ENODEV; +} + +int _write_sysfs_int(char *filename, char *basedir, int val, int verify) +{ + int ret = 0; + FILE *sysfsfp; + int test; + char *temp = malloc(strlen(basedir) + strlen(filename) + 2); + + if (temp == NULL) + return -ENOMEM; + sprintf(temp, "%s/%s", basedir, filename); + sysfsfp = fopen(temp, "w"); + if (sysfsfp == NULL) { + printf("failed to open %s\n", temp); + ret = -errno; + goto error_free; + } + fprintf(sysfsfp, "%d", val); + fclose(sysfsfp); + if (verify) { + sysfsfp = fopen(temp, "r"); + if (sysfsfp == NULL) { + printf("failed to open %s\n", temp); + ret = -errno; + goto error_free; + } + fscanf(sysfsfp, "%d", &test); + fclose(sysfsfp); + if (test != val) { + printf("Possible failure in int write %d to %s%s\n", + val, + basedir, + filename); + ret = -1; + } + } +error_free: + free(temp); + return ret; +} + +int write_sysfs_int(char *filename, char *basedir, int val) +{ + return _write_sysfs_int(filename, basedir, val, 0); +} + +int write_sysfs_int_and_verify(char *filename, char *basedir, int val) +{ + return _write_sysfs_int(filename, basedir, val, 1); +} + +int _write_sysfs_string(char *filename, char *basedir, char *val, int verify) +{ + int ret = 0; + FILE *sysfsfp; + char *temp = malloc(strlen(basedir) + strlen(filename) + 2); + + if (temp == NULL) { + printf("Memory allocation failed\n"); + return -ENOMEM; + } + sprintf(temp, "%s/%s", basedir, filename); + sysfsfp = fopen(temp, "w"); + if (sysfsfp == NULL) { + printf("Could not open %s\n", temp); + ret = -errno; + goto error_free; + } + fprintf(sysfsfp, "%s", val); + fclose(sysfsfp); + if (verify) { + sysfsfp = fopen(temp, "r"); + if (sysfsfp == NULL) { + printf("could not open file to verify\n"); + ret = -errno; + goto error_free; + } + fscanf(sysfsfp, "%s", temp); + fclose(sysfsfp); + if (strcmp(temp, val) != 0) { + printf("Possible failure in string write of %s " + "Should be %s " + "written to %s\%s\n", + temp, + val, + basedir, + filename); + ret = -1; + } + } +error_free: + free(temp); + + return ret; +} + +/** + * write_sysfs_string_and_verify() - string write, readback and verify + * @filename: name of file to write to + * @basedir: the sysfs directory in which the file is to be found + * @val: the string to write + **/ +int write_sysfs_string_and_verify(char *filename, char *basedir, char *val) +{ + return _write_sysfs_string(filename, basedir, val, 1); +} + +int write_sysfs_string(char *filename, char *basedir, char *val) +{ + return _write_sysfs_string(filename, basedir, val, 0); +} + +int read_sysfs_posint(char *filename, char *basedir) +{ + int ret; + FILE *sysfsfp; + char *temp = malloc(strlen(basedir) + strlen(filename) + 2); + + if (temp == NULL) { + printf("Memory allocation failed"); + return -ENOMEM; + } + sprintf(temp, "%s/%s", basedir, filename); + sysfsfp = fopen(temp, "r"); + if (sysfsfp == NULL) { + ret = -errno; + goto error_free; + } + fscanf(sysfsfp, "%d\n", &ret); + fclose(sysfsfp); +error_free: + free(temp); + return ret; +} + +int read_sysfs_float(char *filename, char *basedir, float *val) +{ + int ret = 0; + FILE *sysfsfp; + char *temp = malloc(strlen(basedir) + strlen(filename) + 2); + + if (temp == NULL) { + printf("Memory allocation failed"); + return -ENOMEM; + } + sprintf(temp, "%s/%s", basedir, filename); + sysfsfp = fopen(temp, "r"); + if (sysfsfp == NULL) { + ret = -errno; + goto error_free; + } + fscanf(sysfsfp, "%f\n", val); + fclose(sysfsfp); +error_free: + free(temp); + return ret; +} + +int read_sysfs_string(const char *filename, const char *basedir, char *str) +{ + int ret = 0; + FILE *sysfsfp; + char *temp = malloc(strlen(basedir) + strlen(filename) + 2); + + if (temp == NULL) { + printf("Memory allocation failed"); + return -ENOMEM; + } + sprintf(temp, "%s/%s", basedir, filename); + sysfsfp = fopen(temp, "r"); + if (sysfsfp == NULL) { + ret = -errno; + goto error_free; + } + fscanf(sysfsfp, "%s\n", str); + fclose(sysfsfp); +error_free: + free(temp); + return ret; +} diff --git a/tools/iio/iio_utils.h b/tools/iio/iio_utils.h new file mode 100644 index 000000000000..1bc837b2d769 --- /dev/null +++ b/tools/iio/iio_utils.h @@ -0,0 +1,71 @@ +#ifndef _IIO_UTILS_H_ +#define _IIO_UTILS_H_ + +/* IIO - useful set of util functionality + * + * Copyright (c) 2008 Jonathan Cameron + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published by + * the Free Software Foundation. + */ + +#include + +/* Made up value to limit allocation sizes */ +#define IIO_MAX_NAME_LENGTH 30 + +#define FORMAT_SCAN_ELEMENTS_DIR "%s/scan_elements" +#define FORMAT_TYPE_FILE "%s_type" + +extern const char *iio_dir; + +/** + * struct iio_channel_info - information about a given channel + * @name: channel name + * @generic_name: general name for channel type + * @scale: scale factor to be applied for conversion to si units + * @offset: offset to be applied for conversion to si units + * @index: the channel index in the buffer output + * @bytes: number of bytes occupied in buffer output + * @mask: a bit mask for the raw output + * @is_signed: is the raw value stored signed + * @enabled: is this channel enabled + **/ +struct iio_channel_info { + char *name; + char *generic_name; + float scale; + float offset; + unsigned index; + unsigned bytes; + unsigned bits_used; + unsigned shift; + uint64_t mask; + unsigned be; + unsigned is_signed; + unsigned location; +}; + +int iioutils_break_up_name(const char *full_name, char **generic_name); +int iioutils_get_type(unsigned *is_signed, unsigned *bytes, + unsigned *bits_used, unsigned *shift, + uint64_t *mask, unsigned *be, + const char *device_dir, const char *name, + const char *generic_name); +int iioutils_get_param_float(float *output, const char *param_name, + const char *device_dir, const char *name, + const char *generic_name); +void bsort_channel_array_by_index(struct iio_channel_info **ci_array, int cnt); +int build_channel_array(const char *device_dir, + struct iio_channel_info **ci_array, int *counter); +int find_type_by_name(const char *name, const char *type); +int write_sysfs_int(char *filename, char *basedir, int val); +int write_sysfs_int_and_verify(char *filename, char *basedir, int val); +int write_sysfs_string_and_verify(char *filename, char *basedir, char *val); +int write_sysfs_string(char *filename, char *basedir, char *val); +int read_sysfs_posint(char *filename, char *basedir); +int read_sysfs_float(char *filename, char *basedir, float *val); +int read_sysfs_string(const char *filename, const char *basedir, char *str); + +#endif /* _IIO_UTILS_H_ */ diff --git a/tools/iio/lsiio.c b/tools/iio/lsiio.c new file mode 100644 index 000000000000..98a0de098130 --- /dev/null +++ b/tools/iio/lsiio.c @@ -0,0 +1,163 @@ +/* + * Industrial I/O utilities - lsiio.c + * + * Copyright (c) 2010 Manuel Stahl + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published by + * the Free Software Foundation. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "iio_utils.h" + + +static enum verbosity { + VERBLEVEL_DEFAULT, /* 0 gives lspci behaviour */ + VERBLEVEL_SENSORS, /* 1 lists sensors */ +} verblevel = VERBLEVEL_DEFAULT; + +const char *type_device = "iio:device"; +const char *type_trigger = "trigger"; + + +static inline int check_prefix(const char *str, const char *prefix) +{ + return strlen(str) > strlen(prefix) && + strncmp(str, prefix, strlen(prefix)) == 0; +} + +static inline int check_postfix(const char *str, const char *postfix) +{ + return strlen(str) > strlen(postfix) && + strcmp(str + strlen(str) - strlen(postfix), postfix) == 0; +} + +static int dump_channels(const char *dev_dir_name) +{ + DIR *dp; + const struct dirent *ent; + + dp = opendir(dev_dir_name); + if (dp == NULL) + return -errno; + while (ent = readdir(dp), ent != NULL) + if (check_prefix(ent->d_name, "in_") && + check_postfix(ent->d_name, "_raw")) { + printf(" %-10s\n", ent->d_name); + } + + return 0; +} + +static int dump_one_device(const char *dev_dir_name) +{ + char name[IIO_MAX_NAME_LENGTH]; + int dev_idx; + int retval; + + retval = sscanf(dev_dir_name + strlen(iio_dir) + strlen(type_device), + "%i", &dev_idx); + if (retval != 1) + return -EINVAL; + read_sysfs_string("name", dev_dir_name, name); + printf("Device %03d: %s\n", dev_idx, name); + + if (verblevel >= VERBLEVEL_SENSORS) + return dump_channels(dev_dir_name); + return 0; +} + +static int dump_one_trigger(const char *dev_dir_name) +{ + char name[IIO_MAX_NAME_LENGTH]; + int dev_idx; + int retval; + + retval = sscanf(dev_dir_name + strlen(iio_dir) + strlen(type_trigger), + "%i", &dev_idx); + if (retval != 1) + return -EINVAL; + read_sysfs_string("name", dev_dir_name, name); + printf("Trigger %03d: %s\n", dev_idx, name); + return 0; +} + +static void dump_devices(void) +{ + const struct dirent *ent; + int number, numstrlen; + + FILE *nameFile; + DIR *dp; + char thisname[IIO_MAX_NAME_LENGTH]; + char *filename; + + dp = opendir(iio_dir); + if (dp == NULL) { + printf("No industrial I/O devices available\n"); + return; + } + + while (ent = readdir(dp), ent != NULL) { + if (check_prefix(ent->d_name, type_device)) { + char *dev_dir_name; + + asprintf(&dev_dir_name, "%s%s", iio_dir, ent->d_name); + dump_one_device(dev_dir_name); + free(dev_dir_name); + if (verblevel >= VERBLEVEL_SENSORS) + printf("\n"); + } + } + rewinddir(dp); + while (ent = readdir(dp), ent != NULL) { + if (check_prefix(ent->d_name, type_trigger)) { + char *dev_dir_name; + + asprintf(&dev_dir_name, "%s%s", iio_dir, ent->d_name); + dump_one_trigger(dev_dir_name); + free(dev_dir_name); + } + } + closedir(dp); +} + +int main(int argc, char **argv) +{ + int c, err = 0; + + while ((c = getopt(argc, argv, "d:D:v")) != EOF) { + switch (c) { + case 'v': + verblevel++; + break; + + case '?': + default: + err++; + break; + } + } + if (err || argc > optind) { + fprintf(stderr, "Usage: lsiio [options]...\n" + "List industrial I/O devices\n" + " -v, --verbose\n" + " Increase verbosity (may be given multiple times)\n" + ); + exit(1); + } + + dump_devices(); + + return 0; +} -- cgit v1.2.3 From 115403df818abf1e84c3554b14c8e0f8746bf3a6 Mon Sep 17 00:00:00 2001 From: Jon Paul Maloy Date: Mon, 9 Mar 2015 14:44:13 -0400 Subject: tipc: Add Ying Xue to TIPC maintainers list We remove Allan Stephens, who has moved on to other tasks, from the TIPC maintainers list. He is replaced by Ying Xue, who has been doing the maintenance on behalf of WindRiver since almost three years. Acked-by: Ying Xue Acked-by: Allan Stephens Signed-off-by: Jon Maloy Signed-off-by: David S. Miller --- MAINTAINERS | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'MAINTAINERS') diff --git a/MAINTAINERS b/MAINTAINERS index a6ae6eb0c545..89425367bf09 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -9800,7 +9800,7 @@ F: include/linux/wl12xx.h TIPC NETWORK LAYER M: Jon Maloy -M: Allan Stephens +M: Ying Xue L: netdev@vger.kernel.org (core kernel code) L: tipc-discussion@lists.sourceforge.net (user apps, general discussion) W: http://tipc.sourceforge.net/ -- cgit v1.2.3 From 916f743da3546c28a2f350d197e3bea95d97ba15 Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Thu, 26 Feb 2015 15:49:09 -0600 Subject: firmware: qcom: scm: Move the scm driver to drivers/firmware Architectural changes in the ARM Linux kernel tree mandate the eventual removal of the mach-* directories. Move the scm driver to drivers/firmware and the scm header to include/linux to support that removal. Signed-off-by: Kumar Gala --- MAINTAINERS | 1 + arch/arm/Kconfig | 2 + arch/arm/mach-qcom/Kconfig | 3 - arch/arm/mach-qcom/Makefile | 3 - arch/arm/mach-qcom/platsmp.c | 2 +- arch/arm/mach-qcom/scm.c | 344 ------------------------------------------- arch/arm/mach-qcom/scm.h | 29 ---- drivers/firmware/Kconfig | 4 + drivers/firmware/Makefile | 2 + drivers/firmware/qcom_scm.c | 344 +++++++++++++++++++++++++++++++++++++++++++ include/linux/qcom_scm.h | 29 ++++ 11 files changed, 383 insertions(+), 380 deletions(-) delete mode 100644 arch/arm/mach-qcom/scm.c delete mode 100644 arch/arm/mach-qcom/scm.h create mode 100644 drivers/firmware/qcom_scm.c create mode 100644 include/linux/qcom_scm.h (limited to 'MAINTAINERS') diff --git a/MAINTAINERS b/MAINTAINERS index ddc5a8cf9a8a..beb8aa4840e4 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1317,6 +1317,7 @@ L: linux-soc@vger.kernel.org S: Maintained F: arch/arm/mach-qcom/ F: drivers/soc/qcom/ +F: drivers/firmware/qcom_scm.c T: git git://git.kernel.org/pub/scm/linux/kernel/git/galak/linux-qcom.git ARM/RADISYS ENP2611 MACHINE SUPPORT diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 9f1f09a2bc9b..7ffd1518d2aa 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -2160,6 +2160,8 @@ source "net/Kconfig" source "drivers/Kconfig" +source "drivers/firmware/Kconfig" + source "fs/Kconfig" source "arch/arm/Kconfig.debug" diff --git a/arch/arm/mach-qcom/Kconfig b/arch/arm/mach-qcom/Kconfig index 48003ea652b9..2256cd1e25d1 100644 --- a/arch/arm/mach-qcom/Kconfig +++ b/arch/arm/mach-qcom/Kconfig @@ -22,7 +22,4 @@ config ARCH_MSM8974 bool "Enable support for MSM8974" select HAVE_ARM_ARCH_TIMER -config QCOM_SCM - bool - endif diff --git a/arch/arm/mach-qcom/Makefile b/arch/arm/mach-qcom/Makefile index 10b684140aa1..e324375fa919 100644 --- a/arch/arm/mach-qcom/Makefile +++ b/arch/arm/mach-qcom/Makefile @@ -1,5 +1,2 @@ obj-y := board.o obj-$(CONFIG_SMP) += platsmp.o -obj-$(CONFIG_QCOM_SCM) += scm.o - -CFLAGS_scm.o :=$(call as-instr,.arch_extension sec,-DREQUIRES_SEC=1) diff --git a/arch/arm/mach-qcom/platsmp.c b/arch/arm/mach-qcom/platsmp.c index 596e6237dc7e..4b67e56911d3 100644 --- a/arch/arm/mach-qcom/platsmp.c +++ b/arch/arm/mach-qcom/platsmp.c @@ -17,10 +17,10 @@ #include #include #include +#include #include -#include "scm.h" #define VDD_SC1_ARRAY_CLAMP_GFS_CTL 0x35a0 #define SCSS_CPU1CORE_RESET 0x2d80 diff --git a/arch/arm/mach-qcom/scm.c b/arch/arm/mach-qcom/scm.c deleted file mode 100644 index 3e0e334374de..000000000000 --- a/arch/arm/mach-qcom/scm.c +++ /dev/null @@ -1,344 +0,0 @@ -/* Copyright (c) 2010, Code Aurora Forum. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA - * 02110-1301, USA. - */ - -#include -#include -#include -#include -#include -#include - -#include -#include - -#include "scm.h" - -#define QCOM_SCM_ENOMEM -5 -#define QCOM_SCM_EOPNOTSUPP -4 -#define QCOM_SCM_EINVAL_ADDR -3 -#define QCOM_SCM_EINVAL_ARG -2 -#define QCOM_SCM_ERROR -1 -#define QCOM_SCM_INTERRUPTED 1 - -static DEFINE_MUTEX(qcom_scm_lock); - -/** - * struct qcom_scm_command - one SCM command buffer - * @len: total available memory for command and response - * @buf_offset: start of command buffer - * @resp_hdr_offset: start of response buffer - * @id: command to be executed - * @buf: buffer returned from qcom_scm_get_command_buffer() - * - * An SCM command is laid out in memory as follows: - * - * ------------------- <--- struct qcom_scm_command - * | command header | - * ------------------- <--- qcom_scm_get_command_buffer() - * | command buffer | - * ------------------- <--- struct qcom_scm_response and - * | response header | qcom_scm_command_to_response() - * ------------------- <--- qcom_scm_get_response_buffer() - * | response buffer | - * ------------------- - * - * There can be arbitrary padding between the headers and buffers so - * you should always use the appropriate qcom_scm_get_*_buffer() routines - * to access the buffers in a safe manner. - */ -struct qcom_scm_command { - __le32 len; - __le32 buf_offset; - __le32 resp_hdr_offset; - __le32 id; - __le32 buf[0]; -}; - -/** - * struct qcom_scm_response - one SCM response buffer - * @len: total available memory for response - * @buf_offset: start of response data relative to start of qcom_scm_response - * @is_complete: indicates if the command has finished processing - */ -struct qcom_scm_response { - __le32 len; - __le32 buf_offset; - __le32 is_complete; -}; - -/** - * alloc_qcom_scm_command() - Allocate an SCM command - * @cmd_size: size of the command buffer - * @resp_size: size of the response buffer - * - * Allocate an SCM command, including enough room for the command - * and response headers as well as the command and response buffers. - * - * Returns a valid &qcom_scm_command on success or %NULL if the allocation fails. - */ -static struct qcom_scm_command *alloc_qcom_scm_command(size_t cmd_size, size_t resp_size) -{ - struct qcom_scm_command *cmd; - size_t len = sizeof(*cmd) + sizeof(struct qcom_scm_response) + cmd_size + - resp_size; - u32 offset; - - cmd = kzalloc(PAGE_ALIGN(len), GFP_KERNEL); - if (cmd) { - cmd->len = cpu_to_le32(len); - offset = offsetof(struct qcom_scm_command, buf); - cmd->buf_offset = cpu_to_le32(offset); - cmd->resp_hdr_offset = cpu_to_le32(offset + cmd_size); - } - return cmd; -} - -/** - * free_qcom_scm_command() - Free an SCM command - * @cmd: command to free - * - * Free an SCM command. - */ -static inline void free_qcom_scm_command(struct qcom_scm_command *cmd) -{ - kfree(cmd); -} - -/** - * qcom_scm_command_to_response() - Get a pointer to a qcom_scm_response - * @cmd: command - * - * Returns a pointer to a response for a command. - */ -static inline struct qcom_scm_response *qcom_scm_command_to_response( - const struct qcom_scm_command *cmd) -{ - return (void *)cmd + le32_to_cpu(cmd->resp_hdr_offset); -} - -/** - * qcom_scm_get_command_buffer() - Get a pointer to a command buffer - * @cmd: command - * - * Returns a pointer to the command buffer of a command. - */ -static inline void *qcom_scm_get_command_buffer(const struct qcom_scm_command *cmd) -{ - return (void *)cmd->buf; -} - -/** - * qcom_scm_get_response_buffer() - Get a pointer to a response buffer - * @rsp: response - * - * Returns a pointer to a response buffer of a response. - */ -static inline void *qcom_scm_get_response_buffer(const struct qcom_scm_response *rsp) -{ - return (void *)rsp + le32_to_cpu(rsp->buf_offset); -} - -static int qcom_scm_remap_error(int err) -{ - pr_err("qcom_scm_call failed with error code %d\n", err); - switch (err) { - case QCOM_SCM_ERROR: - return -EIO; - case QCOM_SCM_EINVAL_ADDR: - case QCOM_SCM_EINVAL_ARG: - return -EINVAL; - case QCOM_SCM_EOPNOTSUPP: - return -EOPNOTSUPP; - case QCOM_SCM_ENOMEM: - return -ENOMEM; - } - return -EINVAL; -} - -static u32 smc(u32 cmd_addr) -{ - int context_id; - register u32 r0 asm("r0") = 1; - register u32 r1 asm("r1") = (u32)&context_id; - register u32 r2 asm("r2") = cmd_addr; - do { - asm volatile( - __asmeq("%0", "r0") - __asmeq("%1", "r0") - __asmeq("%2", "r1") - __asmeq("%3", "r2") -#ifdef REQUIRES_SEC - ".arch_extension sec\n" -#endif - "smc #0 @ switch to secure world\n" - : "=r" (r0) - : "r" (r0), "r" (r1), "r" (r2) - : "r3"); - } while (r0 == QCOM_SCM_INTERRUPTED); - - return r0; -} - -static int __qcom_scm_call(const struct qcom_scm_command *cmd) -{ - int ret; - u32 cmd_addr = virt_to_phys(cmd); - - /* - * Flush the command buffer so that the secure world sees - * the correct data. - */ - __cpuc_flush_dcache_area((void *)cmd, cmd->len); - outer_flush_range(cmd_addr, cmd_addr + cmd->len); - - ret = smc(cmd_addr); - if (ret < 0) - ret = qcom_scm_remap_error(ret); - - return ret; -} - -static void qcom_scm_inv_range(unsigned long start, unsigned long end) -{ - u32 cacheline_size, ctr; - - asm volatile("mrc p15, 0, %0, c0, c0, 1" : "=r" (ctr)); - cacheline_size = 4 << ((ctr >> 16) & 0xf); - - start = round_down(start, cacheline_size); - end = round_up(end, cacheline_size); - outer_inv_range(start, end); - while (start < end) { - asm ("mcr p15, 0, %0, c7, c6, 1" : : "r" (start) - : "memory"); - start += cacheline_size; - } - dsb(); - isb(); -} - -/** - * qcom_scm_call() - Send an SCM command - * @svc_id: service identifier - * @cmd_id: command identifier - * @cmd_buf: command buffer - * @cmd_len: length of the command buffer - * @resp_buf: response buffer - * @resp_len: length of the response buffer - * - * Sends a command to the SCM and waits for the command to finish processing. - * - * A note on cache maintenance: - * Note that any buffers that are expected to be accessed by the secure world - * must be flushed before invoking qcom_scm_call and invalidated in the cache - * immediately after qcom_scm_call returns. Cache maintenance on the command - * and response buffers is taken care of by qcom_scm_call; however, callers are - * responsible for any other cached buffers passed over to the secure world. - */ -static int qcom_scm_call(u32 svc_id, u32 cmd_id, const void *cmd_buf, - size_t cmd_len, void *resp_buf, size_t resp_len) -{ - int ret; - struct qcom_scm_command *cmd; - struct qcom_scm_response *rsp; - unsigned long start, end; - - cmd = alloc_qcom_scm_command(cmd_len, resp_len); - if (!cmd) - return -ENOMEM; - - cmd->id = cpu_to_le32((svc_id << 10) | cmd_id); - if (cmd_buf) - memcpy(qcom_scm_get_command_buffer(cmd), cmd_buf, cmd_len); - - mutex_lock(&qcom_scm_lock); - ret = __qcom_scm_call(cmd); - mutex_unlock(&qcom_scm_lock); - if (ret) - goto out; - - rsp = qcom_scm_command_to_response(cmd); - start = (unsigned long)rsp; - - do { - qcom_scm_inv_range(start, start + sizeof(*rsp)); - } while (!rsp->is_complete); - - end = (unsigned long)qcom_scm_get_response_buffer(rsp) + resp_len; - qcom_scm_inv_range(start, end); - - if (resp_buf) - memcpy(resp_buf, qcom_scm_get_response_buffer(rsp), resp_len); -out: - free_qcom_scm_command(cmd); - return ret; -} - -u32 qcom_scm_get_version(void) -{ - int context_id; - static u32 version = -1; - register u32 r0 asm("r0"); - register u32 r1 asm("r1"); - - if (version != -1) - return version; - - mutex_lock(&qcom_scm_lock); - - r0 = 0x1 << 8; - r1 = (u32)&context_id; - do { - asm volatile( - __asmeq("%0", "r0") - __asmeq("%1", "r1") - __asmeq("%2", "r0") - __asmeq("%3", "r1") -#ifdef REQUIRES_SEC - ".arch_extension sec\n" -#endif - "smc #0 @ switch to secure world\n" - : "=r" (r0), "=r" (r1) - : "r" (r0), "r" (r1) - : "r2", "r3"); - } while (r0 == QCOM_SCM_INTERRUPTED); - - version = r1; - mutex_unlock(&qcom_scm_lock); - - return version; -} -EXPORT_SYMBOL(qcom_scm_get_version); - -#define QCOM_SCM_SVC_BOOT 0x1 -#define QCOM_SCM_BOOT_ADDR 0x1 -/* - * Set the cold/warm boot address for one of the CPU cores. - */ -int qcom_scm_set_boot_addr(u32 addr, int flags) -{ - struct { - __le32 flags; - __le32 addr; - } cmd; - - cmd.addr = cpu_to_le32(addr); - cmd.flags = cpu_to_le32(flags); - return qcom_scm_call(QCOM_SCM_SVC_BOOT, QCOM_SCM_BOOT_ADDR, - &cmd, sizeof(cmd), NULL, 0); -} -EXPORT_SYMBOL(qcom_scm_set_boot_addr); diff --git a/arch/arm/mach-qcom/scm.h b/arch/arm/mach-qcom/scm.h deleted file mode 100644 index 6bb84cffb396..000000000000 --- a/arch/arm/mach-qcom/scm.h +++ /dev/null @@ -1,29 +0,0 @@ -/* Copyright (c) 2010, Code Aurora Forum. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ -#ifndef __QCOM_SCM_H -#define __QCOM_SCM_H - -#define QCOM_SCM_FLAG_COLDBOOT_CPU1 0x01 -#define QCOM_SCM_FLAG_COLDBOOT_CPU2 0x08 -#define QCOM_SCM_FLAG_COLDBOOT_CPU3 0x20 -#define QCOM_SCM_FLAG_WARMBOOT_CPU0 0x04 -#define QCOM_SCM_FLAG_WARMBOOT_CPU1 0x02 -#define QCOM_SCM_FLAG_WARMBOOT_CPU2 0x10 -#define QCOM_SCM_FLAG_WARMBOOT_CPU3 0x40 - -extern int qcom_scm_set_boot_addr(u32 addr, int flags); - -#define QCOM_SCM_VERSION(major, minor) (((major) << 16) | ((minor) & 0xFF)) - -extern u32 qcom_scm_get_version(void); - -#endif diff --git a/drivers/firmware/Kconfig b/drivers/firmware/Kconfig index 41983883cef4..6517132e5d8b 100644 --- a/drivers/firmware/Kconfig +++ b/drivers/firmware/Kconfig @@ -132,6 +132,10 @@ config ISCSI_IBFT detect iSCSI boot parameters dynamically during system boot, say Y. Otherwise, say N. +config QCOM_SCM + bool + depends on ARM || ARM64 + source "drivers/firmware/google/Kconfig" source "drivers/firmware/efi/Kconfig" diff --git a/drivers/firmware/Makefile b/drivers/firmware/Makefile index 5373dc5b6011..3fdd3912709a 100644 --- a/drivers/firmware/Makefile +++ b/drivers/firmware/Makefile @@ -11,6 +11,8 @@ obj-$(CONFIG_DMIID) += dmi-id.o obj-$(CONFIG_ISCSI_IBFT_FIND) += iscsi_ibft_find.o obj-$(CONFIG_ISCSI_IBFT) += iscsi_ibft.o obj-$(CONFIG_FIRMWARE_MEMMAP) += memmap.o +obj-$(CONFIG_QCOM_SCM) += qcom_scm.o +CFLAGS_qcom_scm.o :=$(call as-instr,.arch_extension sec,-DREQUIRES_SEC=1) obj-$(CONFIG_GOOGLE_FIRMWARE) += google/ obj-$(CONFIG_EFI) += efi/ diff --git a/drivers/firmware/qcom_scm.c b/drivers/firmware/qcom_scm.c new file mode 100644 index 000000000000..6e7a72bdb176 --- /dev/null +++ b/drivers/firmware/qcom_scm.c @@ -0,0 +1,344 @@ +/* Copyright (c) 2010, Code Aurora Forum. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA + * 02110-1301, USA. + */ + +#include +#include +#include +#include +#include +#include +#include + +#include +#include + + +#define QCOM_SCM_ENOMEM -5 +#define QCOM_SCM_EOPNOTSUPP -4 +#define QCOM_SCM_EINVAL_ADDR -3 +#define QCOM_SCM_EINVAL_ARG -2 +#define QCOM_SCM_ERROR -1 +#define QCOM_SCM_INTERRUPTED 1 + +static DEFINE_MUTEX(qcom_scm_lock); + +/** + * struct qcom_scm_command - one SCM command buffer + * @len: total available memory for command and response + * @buf_offset: start of command buffer + * @resp_hdr_offset: start of response buffer + * @id: command to be executed + * @buf: buffer returned from qcom_scm_get_command_buffer() + * + * An SCM command is laid out in memory as follows: + * + * ------------------- <--- struct qcom_scm_command + * | command header | + * ------------------- <--- qcom_scm_get_command_buffer() + * | command buffer | + * ------------------- <--- struct qcom_scm_response and + * | response header | qcom_scm_command_to_response() + * ------------------- <--- qcom_scm_get_response_buffer() + * | response buffer | + * ------------------- + * + * There can be arbitrary padding between the headers and buffers so + * you should always use the appropriate qcom_scm_get_*_buffer() routines + * to access the buffers in a safe manner. + */ +struct qcom_scm_command { + __le32 len; + __le32 buf_offset; + __le32 resp_hdr_offset; + __le32 id; + __le32 buf[0]; +}; + +/** + * struct qcom_scm_response - one SCM response buffer + * @len: total available memory for response + * @buf_offset: start of response data relative to start of qcom_scm_response + * @is_complete: indicates if the command has finished processing + */ +struct qcom_scm_response { + __le32 len; + __le32 buf_offset; + __le32 is_complete; +}; + +/** + * alloc_qcom_scm_command() - Allocate an SCM command + * @cmd_size: size of the command buffer + * @resp_size: size of the response buffer + * + * Allocate an SCM command, including enough room for the command + * and response headers as well as the command and response buffers. + * + * Returns a valid &qcom_scm_command on success or %NULL if the allocation fails. + */ +static struct qcom_scm_command *alloc_qcom_scm_command(size_t cmd_size, size_t resp_size) +{ + struct qcom_scm_command *cmd; + size_t len = sizeof(*cmd) + sizeof(struct qcom_scm_response) + cmd_size + + resp_size; + u32 offset; + + cmd = kzalloc(PAGE_ALIGN(len), GFP_KERNEL); + if (cmd) { + cmd->len = cpu_to_le32(len); + offset = offsetof(struct qcom_scm_command, buf); + cmd->buf_offset = cpu_to_le32(offset); + cmd->resp_hdr_offset = cpu_to_le32(offset + cmd_size); + } + return cmd; +} + +/** + * free_qcom_scm_command() - Free an SCM command + * @cmd: command to free + * + * Free an SCM command. + */ +static inline void free_qcom_scm_command(struct qcom_scm_command *cmd) +{ + kfree(cmd); +} + +/** + * qcom_scm_command_to_response() - Get a pointer to a qcom_scm_response + * @cmd: command + * + * Returns a pointer to a response for a command. + */ +static inline struct qcom_scm_response *qcom_scm_command_to_response( + const struct qcom_scm_command *cmd) +{ + return (void *)cmd + le32_to_cpu(cmd->resp_hdr_offset); +} + +/** + * qcom_scm_get_command_buffer() - Get a pointer to a command buffer + * @cmd: command + * + * Returns a pointer to the command buffer of a command. + */ +static inline void *qcom_scm_get_command_buffer(const struct qcom_scm_command *cmd) +{ + return (void *)cmd->buf; +} + +/** + * qcom_scm_get_response_buffer() - Get a pointer to a response buffer + * @rsp: response + * + * Returns a pointer to a response buffer of a response. + */ +static inline void *qcom_scm_get_response_buffer(const struct qcom_scm_response *rsp) +{ + return (void *)rsp + le32_to_cpu(rsp->buf_offset); +} + +static int qcom_scm_remap_error(int err) +{ + pr_err("qcom_scm_call failed with error code %d\n", err); + switch (err) { + case QCOM_SCM_ERROR: + return -EIO; + case QCOM_SCM_EINVAL_ADDR: + case QCOM_SCM_EINVAL_ARG: + return -EINVAL; + case QCOM_SCM_EOPNOTSUPP: + return -EOPNOTSUPP; + case QCOM_SCM_ENOMEM: + return -ENOMEM; + } + return -EINVAL; +} + +static u32 smc(u32 cmd_addr) +{ + int context_id; + register u32 r0 asm("r0") = 1; + register u32 r1 asm("r1") = (u32)&context_id; + register u32 r2 asm("r2") = cmd_addr; + do { + asm volatile( + __asmeq("%0", "r0") + __asmeq("%1", "r0") + __asmeq("%2", "r1") + __asmeq("%3", "r2") +#ifdef REQUIRES_SEC + ".arch_extension sec\n" +#endif + "smc #0 @ switch to secure world\n" + : "=r" (r0) + : "r" (r0), "r" (r1), "r" (r2) + : "r3"); + } while (r0 == QCOM_SCM_INTERRUPTED); + + return r0; +} + +static int __qcom_scm_call(const struct qcom_scm_command *cmd) +{ + int ret; + u32 cmd_addr = virt_to_phys(cmd); + + /* + * Flush the command buffer so that the secure world sees + * the correct data. + */ + __cpuc_flush_dcache_area((void *)cmd, cmd->len); + outer_flush_range(cmd_addr, cmd_addr + cmd->len); + + ret = smc(cmd_addr); + if (ret < 0) + ret = qcom_scm_remap_error(ret); + + return ret; +} + +static void qcom_scm_inv_range(unsigned long start, unsigned long end) +{ + u32 cacheline_size, ctr; + + asm volatile("mrc p15, 0, %0, c0, c0, 1" : "=r" (ctr)); + cacheline_size = 4 << ((ctr >> 16) & 0xf); + + start = round_down(start, cacheline_size); + end = round_up(end, cacheline_size); + outer_inv_range(start, end); + while (start < end) { + asm ("mcr p15, 0, %0, c7, c6, 1" : : "r" (start) + : "memory"); + start += cacheline_size; + } + dsb(); + isb(); +} + +/** + * qcom_scm_call() - Send an SCM command + * @svc_id: service identifier + * @cmd_id: command identifier + * @cmd_buf: command buffer + * @cmd_len: length of the command buffer + * @resp_buf: response buffer + * @resp_len: length of the response buffer + * + * Sends a command to the SCM and waits for the command to finish processing. + * + * A note on cache maintenance: + * Note that any buffers that are expected to be accessed by the secure world + * must be flushed before invoking qcom_scm_call and invalidated in the cache + * immediately after qcom_scm_call returns. Cache maintenance on the command + * and response buffers is taken care of by qcom_scm_call; however, callers are + * responsible for any other cached buffers passed over to the secure world. + */ +static int qcom_scm_call(u32 svc_id, u32 cmd_id, const void *cmd_buf, + size_t cmd_len, void *resp_buf, size_t resp_len) +{ + int ret; + struct qcom_scm_command *cmd; + struct qcom_scm_response *rsp; + unsigned long start, end; + + cmd = alloc_qcom_scm_command(cmd_len, resp_len); + if (!cmd) + return -ENOMEM; + + cmd->id = cpu_to_le32((svc_id << 10) | cmd_id); + if (cmd_buf) + memcpy(qcom_scm_get_command_buffer(cmd), cmd_buf, cmd_len); + + mutex_lock(&qcom_scm_lock); + ret = __qcom_scm_call(cmd); + mutex_unlock(&qcom_scm_lock); + if (ret) + goto out; + + rsp = qcom_scm_command_to_response(cmd); + start = (unsigned long)rsp; + + do { + qcom_scm_inv_range(start, start + sizeof(*rsp)); + } while (!rsp->is_complete); + + end = (unsigned long)qcom_scm_get_response_buffer(rsp) + resp_len; + qcom_scm_inv_range(start, end); + + if (resp_buf) + memcpy(resp_buf, qcom_scm_get_response_buffer(rsp), resp_len); +out: + free_qcom_scm_command(cmd); + return ret; +} + +u32 qcom_scm_get_version(void) +{ + int context_id; + static u32 version = -1; + register u32 r0 asm("r0"); + register u32 r1 asm("r1"); + + if (version != -1) + return version; + + mutex_lock(&qcom_scm_lock); + + r0 = 0x1 << 8; + r1 = (u32)&context_id; + do { + asm volatile( + __asmeq("%0", "r0") + __asmeq("%1", "r1") + __asmeq("%2", "r0") + __asmeq("%3", "r1") +#ifdef REQUIRES_SEC + ".arch_extension sec\n" +#endif + "smc #0 @ switch to secure world\n" + : "=r" (r0), "=r" (r1) + : "r" (r0), "r" (r1) + : "r2", "r3"); + } while (r0 == QCOM_SCM_INTERRUPTED); + + version = r1; + mutex_unlock(&qcom_scm_lock); + + return version; +} +EXPORT_SYMBOL(qcom_scm_get_version); + +#define QCOM_SCM_SVC_BOOT 0x1 +#define QCOM_SCM_BOOT_ADDR 0x1 +/* + * Set the cold/warm boot address for one of the CPU cores. + */ +int qcom_scm_set_boot_addr(u32 addr, int flags) +{ + struct { + __le32 flags; + __le32 addr; + } cmd; + + cmd.addr = cpu_to_le32(addr); + cmd.flags = cpu_to_le32(flags); + return qcom_scm_call(QCOM_SCM_SVC_BOOT, QCOM_SCM_BOOT_ADDR, + &cmd, sizeof(cmd), NULL, 0); +} +EXPORT_SYMBOL(qcom_scm_set_boot_addr); diff --git a/include/linux/qcom_scm.h b/include/linux/qcom_scm.h new file mode 100644 index 000000000000..6bb84cffb396 --- /dev/null +++ b/include/linux/qcom_scm.h @@ -0,0 +1,29 @@ +/* Copyright (c) 2010, Code Aurora Forum. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ +#ifndef __QCOM_SCM_H +#define __QCOM_SCM_H + +#define QCOM_SCM_FLAG_COLDBOOT_CPU1 0x01 +#define QCOM_SCM_FLAG_COLDBOOT_CPU2 0x08 +#define QCOM_SCM_FLAG_COLDBOOT_CPU3 0x20 +#define QCOM_SCM_FLAG_WARMBOOT_CPU0 0x04 +#define QCOM_SCM_FLAG_WARMBOOT_CPU1 0x02 +#define QCOM_SCM_FLAG_WARMBOOT_CPU2 0x10 +#define QCOM_SCM_FLAG_WARMBOOT_CPU3 0x40 + +extern int qcom_scm_set_boot_addr(u32 addr, int flags); + +#define QCOM_SCM_VERSION(major, minor) (((major) << 16) | ((minor) & 0xFF)) + +extern u32 qcom_scm_get_version(void); + +#endif -- cgit v1.2.3 From 7fe5f1c16c2c7904c7b8fcfb93e691893f21e8d3 Mon Sep 17 00:00:00 2001 From: John Stultz Date: Wed, 11 Mar 2015 17:40:15 -0700 Subject: MAINTAINERS: Add selftests/timers to the timekeeping maintainance list Since I'm adding a bunch of tests to selftests/timers, put me on the hook in the maintainers file. Cc: Shuah Khan Cc: Prarit Bhargava Cc: Thomas Gleixner Cc: Richard Cochran Signed-off-by: John Stultz Tested-by: Prarit Bhargava Signed-off-by: Shuah Khan --- MAINTAINERS | 1 + 1 file changed, 1 insertion(+) (limited to 'MAINTAINERS') diff --git a/MAINTAINERS b/MAINTAINERS index 6239a305dff0..8454a3cf49ab 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -8542,6 +8542,7 @@ F: include/uapi/linux/timex.h F: kernel/time/clocksource.c F: kernel/time/time*.c F: kernel/time/ntp.c +F: tools/testing/selftests/timers/ SC1200 WDT DRIVER M: Zwane Mwaikambo -- cgit v1.2.3 From eea97aed815ac25b9435a556fce345d257f47405 Mon Sep 17 00:00:00 2001 From: Kevin Hilman Date: Thu, 12 Mar 2015 10:33:46 -0700 Subject: MAINTAINERS: add entry for Generic PM domains (genpd) Add entry for genpd with Rafael, myself and Ulf as co-maintainers. Signed-off-by: Kevin Hilman Acked-by: Geert Uytterhoeven Signed-off-by: Rafael J. Wysocki --- MAINTAINERS | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'MAINTAINERS') diff --git a/MAINTAINERS b/MAINTAINERS index 6239a305dff0..4c4a03f230f3 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -4294,6 +4294,15 @@ S: Supported F: drivers/phy/ F: include/linux/phy/ +GENERIC PM DOMAINS +M: "Rafael J. Wysocki" +M: Kevin Hilman +M: Ulf Hansson +L: linux-pm@vger.kernel.org +S: Supported +F: drivers/base/power/domain*.c +F: include/linux/pm_domain.h + GENERIC UIO DRIVER FOR PCI DEVICES M: "Michael S. Tsirkin" L: kvm@vger.kernel.org -- cgit v1.2.3 From 1662e862a87110f742a144210c59dc0e8a112bc9 Mon Sep 17 00:00:00 2001 From: Christian Borntraeger Date: Thu, 12 Mar 2015 14:59:26 +0100 Subject: KVM: MAINTAINERS: add file arch/x86/kernel/kvm.c|kvmclock.c The KVM list should be CCed on changes for arch/x86/kernel/kvm.c and arch/x86/kernel/kvmclock.c Signed-off-by: Christian Borntraeger Acked-by: Paolo Bonzini Signed-off-by: Marcelo Tosatti --- MAINTAINERS | 2 ++ 1 file changed, 2 insertions(+) (limited to 'MAINTAINERS') diff --git a/MAINTAINERS b/MAINTAINERS index 69cc89f7a9c9..15e4015c5a2f 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -5575,6 +5575,8 @@ S: Supported F: Documentation/*/kvm*.txt F: Documentation/virtual/kvm/ F: arch/*/kvm/ +F: arch/x86/kernel/kvm.c +F: arch/x86/kernel/kvmclock.c F: arch/*/include/asm/kvm* F: include/linux/kvm* F: include/uapi/linux/kvm* -- cgit v1.2.3 From 0a63ca11b42b4fc9ece395f611679d0d3985cd4d Mon Sep 17 00:00:00 2001 From: Azael Avalos Date: Fri, 6 Mar 2015 18:14:42 -0700 Subject: MAINTAINERS: Add missing Toshiba devices and add myself as maintainer Add the missing toshiba_bluetooth and toshiba_haps entries and add myself as their maintainer. Also add the Maintainers entry for toshiba_acpi driver and change its status to maintained. Signed-off-by: Azael Avalos Signed-off-by: Darren Hart --- MAINTAINERS | 15 ++++++++++++++- 1 file changed, 14 insertions(+), 1 deletion(-) (limited to 'MAINTAINERS') diff --git a/MAINTAINERS b/MAINTAINERS index ddc5a8cf9a8a..507c0e3c36a8 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -9851,10 +9851,23 @@ S: Maintained F: drivers/platform/x86/topstar-laptop.c TOSHIBA ACPI EXTRAS DRIVER +M: Azael Avalos L: platform-driver-x86@vger.kernel.org -S: Orphan +S: Maintained F: drivers/platform/x86/toshiba_acpi.c +TOSHIBA BLUETOOTH DRIVER +M: Azael Avalos +L: platform-driver-x86@vger.kernel.org +S: Maintained +F: drivers/platform/x86/toshiba_bluetooth.c + +TOSHIBA HDD ACTIVE PROTECTION SENSOR DRIVER +M: Azael Avalos +L: platform-driver-x86@vger.kernel.org +S: Maintained +F: drivers/platform/x86/toshiba_haps.c + TOSHIBA SMM DRIVER M: Jonathan Buzzard L: tlinux-users@tce.toshiba-dme.co.jp -- cgit v1.2.3 From eff506faec227e763d3cb45d3c4c456efe4823b7 Mon Sep 17 00:00:00 2001 From: Tsahee Zidenberg Date: Thu, 12 Mar 2015 13:53:25 +0200 Subject: MAINTAINERS: add maintainer for Alpine Arm machine Add myself as a maintainer for arch/arm/mach-alpine/ Signed-off-by: Tsahee Zidenberg Signed-off-by: Arnd Bergmann --- MAINTAINERS | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'MAINTAINERS') diff --git a/MAINTAINERS b/MAINTAINERS index eaf999638a65..a6491d765a2f 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -881,6 +881,11 @@ S: Maintained F: drivers/media/rc/meson-ir.c N: meson[x68] +ARM/Annapurna Labs ALPINE ARCHITECTURE +M: Tsahee Zidenberg +S: Maintained +F: arch/arm/mach-alpine/ + ARM/ATMEL AT91RM9200 AND AT91SAM ARM ARCHITECTURES M: Andrew Victor M: Nicolas Ferre -- cgit v1.2.3 From 026da812a075e1c3cc99f8bec757206b7068b779 Mon Sep 17 00:00:00 2001 From: Felipe Balbi Date: Mon, 19 Jan 2015 16:13:53 -0600 Subject: MAINTAINERS: add OMAP defconfigs under OMAP SUPPORT omap2plus_defconfig and omap1_defconfig are also part of the OMAP Support maintained, because of that it's best to list them under OMAP SUPPORT on MAINTAINERS so people know to Cc linux-omap when patching them. Reported-by: Sjoerd Simons Signed-off-by: Felipe Balbi Signed-off-by: Tony Lindgren --- MAINTAINERS | 2 ++ 1 file changed, 2 insertions(+) (limited to 'MAINTAINERS') diff --git a/MAINTAINERS b/MAINTAINERS index ddc5a8cf9a8a..085614010f1d 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -6947,6 +6947,8 @@ Q: http://patchwork.kernel.org/project/linux-omap/list/ T: git git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap.git S: Maintained F: arch/arm/*omap*/ +F: arch/arm/configs/omap1_defconfig +F: arch/arm/configs/omap2plus_defconfig F: drivers/i2c/busses/i2c-omap.c F: drivers/irqchip/irq-omap-intc.c F: drivers/mfd/*omap*.c -- cgit v1.2.3 From ea7618ecb244b36bf6e1ba00b7de801dc1e9a951 Mon Sep 17 00:00:00 2001 From: Ross Zwisler Date: Tue, 17 Mar 2015 12:56:30 -0600 Subject: brd: update maintainer to be Jens Axboe Nick Piggin is currently listed as the maintainer of BRD in MAINTAINERS, but the mails sent to the listed address are returned as undeliverable. Update the maintainer for BRD to be Jens Axboe, since patches for BRD flow up through him. Signed-off-by: Ross Zwisler Signed-off-by: Jens Axboe --- MAINTAINERS | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'MAINTAINERS') diff --git a/MAINTAINERS b/MAINTAINERS index 69cc89f7a9c9..83922ebab5a4 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -8048,7 +8048,7 @@ S: Maintained F: drivers/net/wireless/rt2x00/ RAMDISK RAM BLOCK DEVICE DRIVER -M: Nick Piggin +M: Jens Axboe S: Maintained F: Documentation/blockdev/ramdisk.txt F: drivers/block/brd.c -- cgit v1.2.3 From ce93b4b086b6497bb5809ba706dd9caa39cadbbe Mon Sep 17 00:00:00 2001 From: Peter Huewe Date: Sun, 15 Mar 2015 01:05:31 +0100 Subject: MAINTAINERS: Add Jason as designated reviewer for TPM Jason does an excellent job reviewing the TPM stuff, so we add him to the designated reviewer list (with his consent :) Signed-off-by: Jason Gunthorpe Signed-off-by: Peter Huewe --- MAINTAINERS | 1 + 1 file changed, 1 insertion(+) (limited to 'MAINTAINERS') diff --git a/MAINTAINERS b/MAINTAINERS index ddc5a8cf9a8a..55b762ebe523 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -9906,6 +9906,7 @@ F: drivers/media/pci/tw68/ TPM DEVICE DRIVER M: Peter Huewe M: Marcel Selhorst +R: Jason Gunthorpe W: http://tpmdd.sourceforge.net L: tpmdd-devel@lists.sourceforge.net (moderated for non-subscribers) Q: git git://github.com/PeterHuewe/linux-tpmdd.git -- cgit v1.2.3 From 343e0d2b58117f58afd3718e863addcc357c01de Mon Sep 17 00:00:00 2001 From: Joe Perches Date: Sun, 8 Mar 2015 12:15:56 -0700 Subject: MAINTAINERS: Remove rcar-du.h entry commit 2378ad1228d2 ("drm: rcar-du: Remove platform data support") removed the file, remove the pattern. Signed-off-by: Joe Perches Signed-off-by: Laurent Pinchart --- MAINTAINERS | 1 - 1 file changed, 1 deletion(-) (limited to 'MAINTAINERS') diff --git a/MAINTAINERS b/MAINTAINERS index 6239a305dff0..ab44a48d53bb 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -3378,7 +3378,6 @@ T: git git://people.freedesktop.org/~airlied/linux S: Supported F: drivers/gpu/drm/rcar-du/ F: drivers/gpu/drm/shmobile/ -F: include/linux/platform_data/rcar-du.h F: include/linux/platform_data/shmob_drm.h DSBR100 USB FM RADIO DRIVER -- cgit v1.2.3 From 7eec52db361a6ae6fbbd86c2299718586866b664 Mon Sep 17 00:00:00 2001 From: Sakari Ailus Date: Thu, 19 Mar 2015 01:50:22 +0200 Subject: Documentation: DT: Add bindings for omap3isp Signed-off-by: Sakari Ailus Acked-by: Laurent Pinchart Signed-off-by: Tony Lindgren --- .../devicetree/bindings/media/ti,omap3isp.txt | 71 ++++++++++++++++++++++ MAINTAINERS | 1 + include/dt-bindings/media/omap3-isp.h | 22 +++++++ 3 files changed, 94 insertions(+) create mode 100644 Documentation/devicetree/bindings/media/ti,omap3isp.txt create mode 100644 include/dt-bindings/media/omap3-isp.h (limited to 'MAINTAINERS') diff --git a/Documentation/devicetree/bindings/media/ti,omap3isp.txt b/Documentation/devicetree/bindings/media/ti,omap3isp.txt new file mode 100644 index 000000000000..ac23de855641 --- /dev/null +++ b/Documentation/devicetree/bindings/media/ti,omap3isp.txt @@ -0,0 +1,71 @@ +OMAP 3 ISP Device Tree bindings +=============================== + +The DT definitions can be found in include/dt-bindings/media/omap3-isp.h. + +Required properties +=================== + +compatible : must contain "ti,omap3-isp" + +reg : the two registers sets (physical address and length) for the + ISP. The first set contains the core ISP registers up to + the end of the SBL block. The second set contains the + CSI PHYs and receivers registers. +interrupts : the ISP interrupt specifier +iommus : phandle and IOMMU specifier for the IOMMU that serves the ISP +syscon : the phandle and register offset to the Complex I/O or CSI-PHY + register +ti,phy-type : 0 -- OMAP3ISP_PHY_TYPE_COMPLEX_IO (e.g. 3430) + 1 -- OMAP3ISP_PHY_TYPE_CSIPHY (e.g. 3630) +#clock-cells : Must be 1 --- the ISP provides two external clocks, + cam_xclka and cam_xclkb, at indices 0 and 1, + respectively. Please find more information on common + clock bindings in ../clock/clock-bindings.txt. + +Port nodes (optional) +--------------------- + +More documentation on these bindings is available in +video-interfaces.txt in the same directory. + +reg : The interface: + 0 - parallel (CCDC) + 1 - CSIPHY1 -- CSI2C / CCP2B on 3630; + CSI1 -- CSIb on 3430 + 2 - CSIPHY2 -- CSI2A / CCP2B on 3630; + CSI2 -- CSIa on 3430 + +Optional properties +=================== + +vdd-csiphy1-supply : voltage supply of the CSI-2 PHY 1 +vdd-csiphy2-supply : voltage supply of the CSI-2 PHY 2 + +Endpoint nodes +-------------- + +lane-polarities : lane polarity (required on CSI-2) + 0 -- not inverted; 1 -- inverted +data-lanes : an array of data lanes from 1 to 3. The length can + be either 1 or 2. (required on CSI-2) +clock-lanes : the clock lane (from 1 to 3). (required on CSI-2) + + +Example +======= + + isp@480bc000 { + compatible = "ti,omap3-isp"; + reg = <0x480bc000 0x12fc + 0x480bd800 0x0600>; + interrupts = <24>; + iommus = <&mmu_isp>; + syscon = <&scm_conf 0x2f0>; + ti,phy-type = ; + #clock-cells = <1>; + ports { + #address-cells = <1>; + #size-cells = <0>; + }; + }; diff --git a/MAINTAINERS b/MAINTAINERS index eaf999638a65..6a271a6ff903 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -7077,6 +7077,7 @@ OMAP IMAGING SUBSYSTEM (OMAP3 ISP and OMAP4 ISS) M: Laurent Pinchart L: linux-media@vger.kernel.org S: Maintained +F: Documentation/devicetree/bindings/media/ti,omap3isp.txt F: drivers/media/platform/omap3isp/ F: drivers/staging/media/omap4iss/ diff --git a/include/dt-bindings/media/omap3-isp.h b/include/dt-bindings/media/omap3-isp.h new file mode 100644 index 000000000000..b18c60e468c7 --- /dev/null +++ b/include/dt-bindings/media/omap3-isp.h @@ -0,0 +1,22 @@ +/* + * include/dt-bindings/media/omap3-isp.h + * + * Copyright (C) 2015 Sakari Ailus + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + */ + +#ifndef __DT_BINDINGS_OMAP3_ISP_H__ +#define __DT_BINDINGS_OMAP3_ISP_H__ + +#define OMAP3ISP_PHY_TYPE_COMPLEX_IO 0 +#define OMAP3ISP_PHY_TYPE_CSIPHY 1 + +#endif /* __DT_BINDINGS_OMAP3_ISP_H__ */ -- cgit v1.2.3 From 27682407cc573ea3bd5fd195528a69c901f16b64 Mon Sep 17 00:00:00 2001 From: Baruch Siach Date: Wed, 18 Mar 2015 21:29:10 +0200 Subject: MAINTAINERS: change Arve's last name encoding to UTF-8 All other non ASCII names in this file are also UTF-8 encoded. Signed-off-by: Baruch Siach Signed-off-by: Greg Kroah-Hartman --- MAINTAINERS | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'MAINTAINERS') diff --git a/MAINTAINERS b/MAINTAINERS index 65f16e4be9d1..650ded3909a8 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -725,7 +725,7 @@ F: staging/iio/trigger/iio-trig-bfin-timer.c ANDROID DRIVERS M: Greg Kroah-Hartman -M: Arve Hjønnevåg +M: Arve HjønnevÃ¥g M: Riley Andrews T: git git://git.kernel.org/pub/scm/linux/kernel/gregkh/staging.git L: devel@driverdev.osuosl.org -- cgit v1.2.3 From 2b6f9b81539a8a462e96f2bb22e804ecd5ee5ca0 Mon Sep 17 00:00:00 2001 From: Ulf Hansson Date: Fri, 13 Mar 2015 13:25:25 +0100 Subject: MAINTAINERS: mmc: Remove the SDHCI-OF section Anton told me that he isn't maintaing the SDHCI-OF parts anymore, so let's remove him from this section to avoid confusion. Morover, since the SDHCI-OF section overlaps with the SDHCI DRIVER section, let's just remove it completely. Cc: Anton Vorontsov Signed-off-by: Ulf Hansson --- MAINTAINERS | 7 ------- 1 file changed, 7 deletions(-) (limited to 'MAINTAINERS') diff --git a/MAINTAINERS b/MAINTAINERS index 358eb0105e00..e344c76a8de9 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -8680,13 +8680,6 @@ F: include/linux/seccomp.h K: \bsecure_computing K: \bTIF_SECCOMP\b -SECURE DIGITAL HOST CONTROLLER INTERFACE, OPEN FIRMWARE BINDINGS (SDHCI-OF) -M: Anton Vorontsov -L: linuxppc-dev@lists.ozlabs.org -L: linux-mmc@vger.kernel.org -S: Maintained -F: drivers/mmc/host/sdhci-pltfm.[ch] - SECURE DIGITAL HOST CONTROLLER INTERFACE (SDHCI) SAMSUNG DRIVER M: Ben Dooks L: linux-mmc@vger.kernel.org -- cgit v1.2.3 From a1cb1d1114d3258487321f822457f74ed897068c Mon Sep 17 00:00:00 2001 From: Ulf Hansson Date: Fri, 13 Mar 2015 13:39:03 +0100 Subject: MAINTAINERS: mmc: Cleanup MMC/SD/SDIO section and SDHCI driver section As Chris Ball has moved on to other assignments, he's no longer able to help me maintain MMC. Let's remove him from the MMC sections in MAINTAINERS and add him to CREDIT file. This also affects the SDHCI DRIVER section, since its state now becomes orphan. Cc: Chris Ball Signed-off-by: Ulf Hansson Acked-by: Chris Ball --- CREDITS | 4 ++++ MAINTAINERS | 6 +----- 2 files changed, 5 insertions(+), 5 deletions(-) (limited to 'MAINTAINERS') diff --git a/CREDITS b/CREDITS index 96935df0b6fe..843e17647f3b 100644 --- a/CREDITS +++ b/CREDITS @@ -187,6 +187,10 @@ N: Krishna Balasubramanian E: balasub@cis.ohio-state.edu D: Wrote SYS V IPC (part of standard kernel since 0.99.10) +N: Chris Ball +E: chris@printf.net +D: Former maintainer of the MMC/SD/SDIO subsystem. + N: Dario Ballabio E: ballabio_dario@emc.com E: dario.ballabio@tiscalinet.it diff --git a/MAINTAINERS b/MAINTAINERS index e344c76a8de9..f68082216847 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -6558,10 +6558,8 @@ F: drivers/mfd/ F: include/linux/mfd/ MULTIMEDIA CARD (MMC), SECURE DIGITAL (SD) AND SDIO SUBSYSTEM -M: Chris Ball M: Ulf Hansson L: linux-mmc@vger.kernel.org -T: git git://git.kernel.org/pub/scm/linux/kernel/git/cjb/mmc.git T: git git://git.linaro.org/people/ulf.hansson/mmc.git S: Maintained F: drivers/mmc/ @@ -8661,10 +8659,8 @@ S: Maintained F: drivers/mmc/host/sdricoh_cs.c SECURE DIGITAL HOST CONTROLLER INTERFACE (SDHCI) DRIVER -M: Chris Ball L: linux-mmc@vger.kernel.org -T: git git://git.kernel.org/pub/scm/linux/kernel/git/cjb/mmc.git -S: Maintained +S: Orphan F: drivers/mmc/host/sdhci.* F: drivers/mmc/host/sdhci-pltfm.[ch] -- cgit v1.2.3 From 2bb65f56480a927d4ca77173e2eb44db18f33b84 Mon Sep 17 00:00:00 2001 From: Pantelis Antoniou Date: Tue, 17 Mar 2015 22:30:57 +0200 Subject: MAINTAINERS: Pantelis Antoniou device tree overlay maintainer Add me as the device tree overlays maintainer. Signed-off-by: Pantelis Antoniou Signed-off-by: Rob Herring --- MAINTAINERS | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'MAINTAINERS') diff --git a/MAINTAINERS b/MAINTAINERS index 358eb0105e00..433ac85e8b7e 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -7187,6 +7187,15 @@ F: Documentation/devicetree/ F: arch/*/boot/dts/ F: include/dt-bindings/ +OPEN FIRMWARE AND DEVICE TREE OVERLAYS +M: Pantelis Antoniou +L: devicetree@vger.kernel.org +S: Maintained +F: Documentation/devicetree/dynamic-resolution-notes.txt +F: Documentation/devicetree/overlay-notes.txt +F: drivers/of/overlay.c +F: drivers/of/resolver.c + OPENRISC ARCHITECTURE M: Jonas Bonn W: http://openrisc.net -- cgit v1.2.3 From dc5248820d0b766155fb542e060131a979594b56 Mon Sep 17 00:00:00 2001 From: Ulf Hansson Date: Fri, 20 Mar 2015 10:15:29 +0100 Subject: MAINTAINERS: mmc: Add Jaehoon as co-maintainer for SDHCI SAMSUNG DRIVER Jaehoon has volunteered in maintaining the SDHCI SAMSUNG DRIVER so add him. Since we are updating this section let's also correct file path to cover all files for sdhci-s3c. Cc: Ben Dooks Cc: Jaehoon Chung Signed-off-by: Ulf Hansson --- MAINTAINERS | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'MAINTAINERS') diff --git a/MAINTAINERS b/MAINTAINERS index f68082216847..ac4e6dd1f9c7 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -8678,9 +8678,10 @@ K: \bTIF_SECCOMP\b SECURE DIGITAL HOST CONTROLLER INTERFACE (SDHCI) SAMSUNG DRIVER M: Ben Dooks +M: Jaehoon Chung L: linux-mmc@vger.kernel.org S: Maintained -F: drivers/mmc/host/sdhci-s3c.c +F: drivers/mmc/host/sdhci-s3c* SECURE DIGITAL HOST CONTROLLER INTERFACE (SDHCI) ST SPEAR DRIVER M: Viresh Kumar -- cgit v1.2.3 From 66e3e591891da9899a8990792da080432531ffd4 Mon Sep 17 00:00:00 2001 From: Keith Packard Date: Thu, 19 Mar 2015 20:36:49 -0700 Subject: usb: Add driver for Altus Metrum ChaosKey device (v2) This is a hardware random number generator. The driver provides both a /dev/chaoskeyX entry and hooks the entropy source up to the kernel hwrng interface. More information about the device can be found at http://chaoskey.org The USB ID for ChaosKey was allocated from the OpenMoko USB vendor space and is visible as 'USBtrng' here: http://wiki.openmoko.org/wiki/USB_Product_IDs v2: Respond to review from Oliver Neukum * Delete extensive debug infrastructure and replace it with calls to dev_dbg. * Allocate I/O buffer separately from device structure to obey requirements for non-coherant architectures. * Initialize mutexes before registering device to ensure that open cannot be invoked before the device is ready to proceed. * Return number of bytes read instead of -EINTR when partial read operation is aborted due to a signal. * Make sure device mutex is unlocked in read error paths. * Add MAINTAINERS entry for the driver Signed-off-by: Keith Packard Cc: Oliver Neukum Signed-off-by: Greg Kroah-Hartman --- MAINTAINERS | 6 + drivers/usb/misc/Kconfig | 12 + drivers/usb/misc/Makefile | 1 + drivers/usb/misc/chaoskey.c | 530 ++++++++++++++++++++++++++++++++++++++++++++ 4 files changed, 549 insertions(+) create mode 100644 drivers/usb/misc/chaoskey.c (limited to 'MAINTAINERS') diff --git a/MAINTAINERS b/MAINTAINERS index 358eb0105e00..059a9d4e8a51 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -10129,6 +10129,12 @@ S: Maintained F: drivers/net/usb/cdc_*.c F: include/uapi/linux/usb/cdc.h +USB CHAOSKEY DRIVER +M: Keith Packard +L: linux-usb@vger.kernel.org +S: Maintained +F: drivers/usb/misc/chaoskey.c + USB CYPRESS C67X00 DRIVER M: Peter Korsgaard L: linux-usb@vger.kernel.org diff --git a/drivers/usb/misc/Kconfig b/drivers/usb/misc/Kconfig index 76d77206e011..8c331f1dfd23 100644 --- a/drivers/usb/misc/Kconfig +++ b/drivers/usb/misc/Kconfig @@ -255,3 +255,15 @@ config USB_LINK_LAYER_TEST This driver is for generating specific traffic for Super Speed Link Layer Test Device. Say Y only when you want to conduct USB Super Speed Link Layer Test for host controllers. + +config USB_CHAOSKEY + tristate "ChaosKey random number generator driver support" + help + Say Y here if you want to connect an AltusMetrum ChaosKey to + your computer's USB port. The ChaosKey is a hardware random + number generator which hooks into the kernel entropy pool to + ensure a large supply of entropy for /dev/random and + /dev/urandom and also provides direct access via /dev/chaoskeyX + + To compile this driver as a module, choose M here: the + module will be called chaoskey. diff --git a/drivers/usb/misc/Makefile b/drivers/usb/misc/Makefile index 65b0402c1ca1..45fd4ac39d3e 100644 --- a/drivers/usb/misc/Makefile +++ b/drivers/usb/misc/Makefile @@ -25,6 +25,7 @@ obj-$(CONFIG_USB_USS720) += uss720.o obj-$(CONFIG_USB_SEVSEG) += usbsevseg.o obj-$(CONFIG_USB_YUREX) += yurex.o obj-$(CONFIG_USB_HSIC_USB3503) += usb3503.o +obj-$(CONFIG_USB_CHAOSKEY) += chaoskey.o obj-$(CONFIG_USB_SISUSBVGA) += sisusbvga/ obj-$(CONFIG_USB_LINK_LAYER_TEST) += lvstest.o diff --git a/drivers/usb/misc/chaoskey.c b/drivers/usb/misc/chaoskey.c new file mode 100644 index 000000000000..ef80ce9452a4 --- /dev/null +++ b/drivers/usb/misc/chaoskey.c @@ -0,0 +1,530 @@ +/* + * chaoskey - driver for ChaosKey device from Altus Metrum. + * + * This device provides true random numbers using a noise source based + * on a reverse-biased p-n junction in avalanche breakdown. More + * details can be found at http://chaoskey.org + * + * The driver connects to the kernel hardware RNG interface to provide + * entropy for /dev/random and other kernel activities. It also offers + * a separate /dev/ entry to allow for direct access to the random + * bit stream. + * + * Copyright © 2015 Keith Packard + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + */ + +#include +#include +#include +#include +#include + +static struct usb_driver chaoskey_driver; +static struct usb_class_driver chaoskey_class; +static int chaoskey_rng_read(struct hwrng *rng, void *data, + size_t max, bool wait); + +#define usb_dbg(usb_if, format, arg...) \ + dev_dbg(&(usb_if)->dev, format, ## arg) + +#define usb_err(usb_if, format, arg...) \ + dev_err(&(usb_if)->dev, format, ## arg) + +/* Version Information */ +#define DRIVER_VERSION "v0.1" +#define DRIVER_AUTHOR "Keith Packard, keithp@keithp.com" +#define DRIVER_DESC "Altus Metrum ChaosKey driver" +#define DRIVER_SHORT "chaoskey" + +MODULE_VERSION(DRIVER_VERSION); +MODULE_AUTHOR(DRIVER_AUTHOR); +MODULE_DESCRIPTION(DRIVER_DESC); +MODULE_LICENSE("GPL"); + +#define CHAOSKEY_VENDOR_ID 0x1d50 /* OpenMoko */ +#define CHAOSKEY_PRODUCT_ID 0x60c6 /* ChaosKey */ + +#define CHAOSKEY_BUF_LEN 64 /* max size of USB full speed packet */ + +#define NAK_TIMEOUT (HZ) /* stall/wait timeout for device */ + +#ifdef CONFIG_USB_DYNAMIC_MINORS +#define USB_CHAOSKEY_MINOR_BASE 0 +#else + +/* IOWARRIOR_MINOR_BASE + 16, not official yet */ +#define USB_CHAOSKEY_MINOR_BASE 224 +#endif + +static const struct usb_device_id chaoskey_table[] = { + { USB_DEVICE(CHAOSKEY_VENDOR_ID, CHAOSKEY_PRODUCT_ID) }, + { }, +}; +MODULE_DEVICE_TABLE(usb, chaoskey_table); + +/* Driver-local specific stuff */ +struct chaoskey { + struct usb_interface *interface; + char in_ep; + struct mutex lock; + struct mutex rng_lock; + int open; /* open count */ + int present; /* device not disconnected */ + int size; /* size of buf */ + int valid; /* bytes of buf read */ + int used; /* bytes of buf consumed */ + char *name; /* product + serial */ + struct hwrng hwrng; /* Embedded struct for hwrng */ + int hwrng_registered; /* registered with hwrng API */ + wait_queue_head_t wait_q; /* for timeouts */ + char *buf; +}; + +static void chaoskey_free(struct chaoskey *dev) +{ + usb_dbg(dev->interface, "free"); + kfree(dev->name); + kfree(dev->buf); + kfree(dev); +} + +static int chaoskey_probe(struct usb_interface *interface, + const struct usb_device_id *id) +{ + struct usb_device *udev = interface_to_usbdev(interface); + struct usb_host_interface *altsetting = interface->cur_altsetting; + int i; + int in_ep = -1; + struct chaoskey *dev; + int result; + int size; + + usb_dbg(interface, "probe %s-%s", udev->product, udev->serial); + + /* Find the first bulk IN endpoint and its packet size */ + for (i = 0; i < altsetting->desc.bNumEndpoints; i++) { + if (usb_endpoint_is_bulk_in(&altsetting->endpoint[i].desc)) { + in_ep = altsetting->endpoint[i].desc.bEndpointAddress; + size = altsetting->endpoint[i].desc.wMaxPacketSize; + break; + } + } + + /* Validate endpoint and size */ + if (in_ep == -1) { + usb_dbg(interface, "no IN endpoint found"); + return -ENODEV; + } + if (size <= 0) { + usb_dbg(interface, "invalid size (%d)", size); + return -ENODEV; + } + + if (size > CHAOSKEY_BUF_LEN) { + usb_dbg(interface, "size reduced from %d to %d\n", + size, CHAOSKEY_BUF_LEN); + size = CHAOSKEY_BUF_LEN; + } + + /* Looks good, allocate and initialize */ + + dev = kzalloc(sizeof(struct chaoskey), GFP_KERNEL); + + if (dev == NULL) + return -ENOMEM; + + dev->buf = kmalloc(size, GFP_KERNEL); + + if (dev->buf == NULL) { + kfree(dev); + return -ENOMEM; + } + + /* Construct a name using the product and serial values. Each + * device needs a unique name for the hwrng code + */ + + if (udev->product && udev->serial) { + dev->name = kmalloc(strlen(udev->product) + 1 + + strlen(udev->serial) + 1, GFP_KERNEL); + if (dev->name == NULL) { + kfree(dev->buf); + kfree(dev); + return -ENOMEM; + } + + strcpy(dev->name, udev->product); + strcat(dev->name, "-"); + strcat(dev->name, udev->serial); + } + + dev->interface = interface; + + dev->in_ep = in_ep; + + dev->size = size; + dev->present = 1; + + init_waitqueue_head(&dev->wait_q); + + mutex_init(&dev->lock); + mutex_init(&dev->rng_lock); + + usb_set_intfdata(interface, dev); + + result = usb_register_dev(interface, &chaoskey_class); + if (result) { + usb_err(interface, "Unable to allocate minor number."); + usb_set_intfdata(interface, NULL); + chaoskey_free(dev); + return result; + } + + dev->hwrng.name = dev->name ? dev->name : chaoskey_driver.name; + dev->hwrng.read = chaoskey_rng_read; + + /* Set the 'quality' metric. Quality is measured in units of + * 1/1024's of a bit ("mills"). This should be set to 1024, + * but there is a bug in the hwrng core which masks it with + * 1023. + * + * The patch that has been merged to the crypto development + * tree for that bug limits the value to 1024 at most, so by + * setting this to 1024 + 1023, we get 1023 before the fix is + * merged and 1024 afterwards. We'll patch this driver once + * both bits of code are in the same tree. + */ + dev->hwrng.quality = 1024 + 1023; + + dev->hwrng_registered = (hwrng_register(&dev->hwrng) == 0); + if (!dev->hwrng_registered) + usb_err(interface, "Unable to register with hwrng"); + + usb_enable_autosuspend(udev); + + usb_dbg(interface, "chaoskey probe success, size %d", dev->size); + return 0; +} + +static void chaoskey_disconnect(struct usb_interface *interface) +{ + struct chaoskey *dev; + + usb_dbg(interface, "disconnect"); + dev = usb_get_intfdata(interface); + if (!dev) { + usb_dbg(interface, "disconnect failed - no dev"); + return; + } + + if (dev->hwrng_registered) + hwrng_unregister(&dev->hwrng); + + usb_deregister_dev(interface, &chaoskey_class); + + usb_set_intfdata(interface, NULL); + mutex_lock(&dev->lock); + + dev->present = 0; + + if (!dev->open) { + mutex_unlock(&dev->lock); + chaoskey_free(dev); + } else + mutex_unlock(&dev->lock); + + usb_dbg(interface, "disconnect done"); +} + +static int chaoskey_open(struct inode *inode, struct file *file) +{ + struct chaoskey *dev; + struct usb_interface *interface; + + /* get the interface from minor number and driver information */ + interface = usb_find_interface(&chaoskey_driver, iminor(inode)); + if (!interface) + return -ENODEV; + + usb_dbg(interface, "open"); + + dev = usb_get_intfdata(interface); + if (!dev) { + usb_dbg(interface, "open (dev)"); + return -ENODEV; + } + + file->private_data = dev; + mutex_lock(&dev->lock); + ++dev->open; + mutex_unlock(&dev->lock); + + usb_dbg(interface, "open success"); + return 0; +} + +static int chaoskey_release(struct inode *inode, struct file *file) +{ + struct chaoskey *dev = file->private_data; + struct usb_interface *interface; + + if (dev == NULL) + return -ENODEV; + + interface = dev->interface; + + usb_dbg(interface, "release"); + + mutex_lock(&dev->lock); + + usb_dbg(interface, "open count at release is %d", dev->open); + + if (dev->open <= 0) { + usb_dbg(interface, "invalid open count (%d)", dev->open); + mutex_unlock(&dev->lock); + return -ENODEV; + } + + --dev->open; + + if (!dev->present) { + if (dev->open == 0) { + mutex_unlock(&dev->lock); + chaoskey_free(dev); + } else + mutex_unlock(&dev->lock); + } else + mutex_unlock(&dev->lock); + + usb_dbg(interface, "release success"); + return 0; +} + +/* Fill the buffer. Called with dev->lock held + */ +static int _chaoskey_fill(struct chaoskey *dev) +{ + DEFINE_WAIT(wait); + int result; + int this_read; + struct usb_device *udev = interface_to_usbdev(dev->interface); + + usb_dbg(dev->interface, "fill"); + + /* Return immediately if someone called before the buffer was + * empty */ + if (dev->valid != dev->used) { + usb_dbg(dev->interface, "not empty yet (valid %d used %d)", + dev->valid, dev->used); + return 0; + } + + /* Bail if the device has been removed */ + if (!dev->present) { + usb_dbg(dev->interface, "device not present"); + return -ENODEV; + } + + /* Make sure the device is awake */ + result = usb_autopm_get_interface(dev->interface); + if (result) { + usb_dbg(dev->interface, "wakeup failed (result %d)", result); + return result; + } + + result = usb_bulk_msg(udev, + usb_rcvbulkpipe(udev, dev->in_ep), + dev->buf, dev->size, &this_read, + NAK_TIMEOUT); + + /* Let the device go back to sleep eventually */ + usb_autopm_put_interface(dev->interface); + + if (result == 0) { + dev->valid = this_read; + dev->used = 0; + } + + usb_dbg(dev->interface, "bulk_msg result %d this_read %d", + result, this_read); + + return result; +} + +static ssize_t chaoskey_read(struct file *file, + char __user *buffer, + size_t count, + loff_t *ppos) +{ + struct chaoskey *dev; + ssize_t read_count = 0; + int this_time; + int result = 0; + unsigned long remain; + + dev = file->private_data; + + if (dev == NULL || !dev->present) + return -ENODEV; + + usb_dbg(dev->interface, "read %zu", count); + + while (count > 0) { + + /* Grab the rng_lock briefly to ensure that the hwrng interface + * gets priority over other user access + */ + result = mutex_lock_interruptible(&dev->rng_lock); + if (result) + goto bail; + mutex_unlock(&dev->rng_lock); + + result = mutex_lock_interruptible(&dev->lock); + if (result) + goto bail; + if (dev->valid == dev->used) { + result = _chaoskey_fill(dev); + if (result) { + mutex_unlock(&dev->lock); + goto bail; + } + + /* Read returned zero bytes */ + if (dev->used == dev->valid) { + mutex_unlock(&dev->lock); + goto bail; + } + } + + this_time = dev->valid - dev->used; + if (this_time > count) + this_time = count; + + remain = copy_to_user(buffer, dev->buf + dev->used, this_time); + if (remain) { + result = -EFAULT; + + /* Consume the bytes that were copied so we don't leak + * data to user space + */ + dev->used += this_time - remain; + mutex_unlock(&dev->lock); + goto bail; + } + + count -= this_time; + read_count += this_time; + buffer += this_time; + dev->used += this_time; + mutex_unlock(&dev->lock); + } +bail: + if (read_count) { + usb_dbg(dev->interface, "read %zu bytes", read_count); + return read_count; + } + usb_dbg(dev->interface, "empty read, result %d", result); + return result; +} + +static int chaoskey_rng_read(struct hwrng *rng, void *data, + size_t max, bool wait) +{ + struct chaoskey *dev = container_of(rng, struct chaoskey, hwrng); + int this_time; + + usb_dbg(dev->interface, "rng_read max %zu wait %d", max, wait); + + if (!dev->present) { + usb_dbg(dev->interface, "device not present"); + return 0; + } + + /* Hold the rng_lock until we acquire the device lock so that + * this operation gets priority over other user access to the + * device + */ + mutex_lock(&dev->rng_lock); + + mutex_lock(&dev->lock); + + mutex_unlock(&dev->rng_lock); + + /* Try to fill the buffer if empty. It doesn't actually matter + * if _chaoskey_fill works; we'll just return zero bytes as + * the buffer will still be empty + */ + if (dev->valid == dev->used) + (void) _chaoskey_fill(dev); + + this_time = dev->valid - dev->used; + if (this_time > max) + this_time = max; + + memcpy(data, dev->buf, this_time); + + dev->used += this_time; + + mutex_unlock(&dev->lock); + + usb_dbg(dev->interface, "rng_read this_time %d\n", this_time); + return this_time; +} + +#ifdef CONFIG_PM +static int chaoskey_suspend(struct usb_interface *interface, + pm_message_t message) +{ + usb_dbg(interface, "suspend"); + return 0; +} + +static int chaoskey_resume(struct usb_interface *interface) +{ + usb_dbg(interface, "resume"); + return 0; +} +#else +#define chaoskey_suspend NULL +#define chaoskey_resume NULL +#endif + +/* file operation pointers */ +static const struct file_operations chaoskey_fops = { + .owner = THIS_MODULE, + .read = chaoskey_read, + .open = chaoskey_open, + .release = chaoskey_release, + .llseek = default_llseek, +}; + +/* class driver information */ +static struct usb_class_driver chaoskey_class = { + .name = "chaoskey%d", + .fops = &chaoskey_fops, + .minor_base = USB_CHAOSKEY_MINOR_BASE, +}; + +/* usb specific object needed to register this driver with the usb subsystem */ +static struct usb_driver chaoskey_driver = { + .name = DRIVER_SHORT, + .probe = chaoskey_probe, + .disconnect = chaoskey_disconnect, + .suspend = chaoskey_suspend, + .resume = chaoskey_resume, + .reset_resume = chaoskey_resume, + .id_table = chaoskey_table, + .supports_autosuspend = 1, +}; + +module_usb_driver(chaoskey_driver); + -- cgit v1.2.3 From 8373856d94aae5adf25f9e3388747c53867f1ab0 Mon Sep 17 00:00:00 2001 From: Peter Chen Date: Mon, 23 Mar 2015 19:57:36 +0800 Subject: MAINTAINERS: change my git address to kernel.org Signed-off-by: Peter Chen Signed-off-by: Greg Kroah-Hartman --- MAINTAINERS | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'MAINTAINERS') diff --git a/MAINTAINERS b/MAINTAINERS index 059a9d4e8a51..6700a98674dd 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -2518,7 +2518,7 @@ F: Documentation/zh_CN/ CHIPIDEA USB HIGH SPEED DUAL ROLE CONTROLLER M: Peter Chen -T: git git://github.com/hzpeterchen/linux-usb.git +T: git git://git.kernel.org/pub/scm/linux/kernel/git/peter.chen/usb.git L: linux-usb@vger.kernel.org S: Maintained F: drivers/usb/chipidea/ @@ -10215,7 +10215,7 @@ F: drivers/usb/host/ohci* USB OTG FSM (Finite State Machine) M: Peter Chen -T: git git://github.com/hzpeterchen/linux-usb.git +T: git git://git.kernel.org/pub/scm/linux/kernel/git/peter.chen/usb.git L: linux-usb@vger.kernel.org S: Maintained F: drivers/usb/common/usb-otg-fsm.c -- cgit v1.2.3 From dece45855a8b0d1dcf48eb01d0822070ded6a4c8 Mon Sep 17 00:00:00 2001 From: Clément Perrochaud Date: Mon, 9 Mar 2015 11:12:04 +0100 Subject: NFC: nxp-nci: Add support for NXP NCI chips MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add support for NXP NCI NFC controllers such as the NPC100 or PN7150 families. Signed-off-by: Clément Perrochaud Signed-off-by: Samuel Ortiz --- MAINTAINERS | 7 + drivers/nfc/Kconfig | 1 + drivers/nfc/Makefile | 1 + drivers/nfc/nxp-nci/Kconfig | 13 ++ drivers/nfc/nxp-nci/Makefile | 9 + drivers/nfc/nxp-nci/core.c | 186 +++++++++++++++++++ drivers/nfc/nxp-nci/firmware.c | 324 ++++++++++++++++++++++++++++++++++ drivers/nfc/nxp-nci/nxp-nci.h | 89 ++++++++++ include/linux/platform_data/nxp-nci.h | 27 +++ 9 files changed, 657 insertions(+) create mode 100644 drivers/nfc/nxp-nci/Kconfig create mode 100644 drivers/nfc/nxp-nci/Makefile create mode 100644 drivers/nfc/nxp-nci/core.c create mode 100644 drivers/nfc/nxp-nci/firmware.c create mode 100644 drivers/nfc/nxp-nci/nxp-nci.h create mode 100644 include/linux/platform_data/nxp-nci.h (limited to 'MAINTAINERS') diff --git a/MAINTAINERS b/MAINTAINERS index c2016557b294..12fdf22a77b0 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -6937,6 +6937,13 @@ S: Supported F: drivers/block/nvme* F: include/linux/nvme.h +NXP-NCI NFC DRIVER +M: Clément Perrochaud +R: Charles Gorand +L: linux-nfc@lists.01.org (moderated for non-subscribers) +S: Supported +F: drivers/nfc/nxp-nci + NXP TDA998X DRM DRIVER M: Russell King S: Supported diff --git a/drivers/nfc/Kconfig b/drivers/nfc/Kconfig index 7929fac13e1c..107714e4405f 100644 --- a/drivers/nfc/Kconfig +++ b/drivers/nfc/Kconfig @@ -73,4 +73,5 @@ source "drivers/nfc/microread/Kconfig" source "drivers/nfc/nfcmrvl/Kconfig" source "drivers/nfc/st21nfca/Kconfig" source "drivers/nfc/st21nfcb/Kconfig" +source "drivers/nfc/nxp-nci/Kconfig" endmenu diff --git a/drivers/nfc/Makefile b/drivers/nfc/Makefile index 6b23a2c6e34a..a4292d790f9b 100644 --- a/drivers/nfc/Makefile +++ b/drivers/nfc/Makefile @@ -13,5 +13,6 @@ obj-$(CONFIG_NFC_MRVL) += nfcmrvl/ obj-$(CONFIG_NFC_TRF7970A) += trf7970a.o obj-$(CONFIG_NFC_ST21NFCA) += st21nfca/ obj-$(CONFIG_NFC_ST21NFCB) += st21nfcb/ +obj-$(CONFIG_NFC_NXP_NCI) += nxp-nci/ ccflags-$(CONFIG_NFC_DEBUG) := -DDEBUG diff --git a/drivers/nfc/nxp-nci/Kconfig b/drivers/nfc/nxp-nci/Kconfig new file mode 100644 index 000000000000..5f60c7cf02e8 --- /dev/null +++ b/drivers/nfc/nxp-nci/Kconfig @@ -0,0 +1,13 @@ +config NFC_NXP_NCI + tristate "NXP-NCI NFC driver" + depends on NFC_NCI + default n + ---help--- + Generic core driver for NXP NCI chips such as the NPC100 + or PN7150 families. + This is a driver based on the NCI NFC kernel layers and + will thus not work with NXP libnfc library. + + To compile this driver as a module, choose m here. The module will + be called nxp_nci. + Say N if unsure. diff --git a/drivers/nfc/nxp-nci/Makefile b/drivers/nfc/nxp-nci/Makefile new file mode 100644 index 000000000000..8f1e32826961 --- /dev/null +++ b/drivers/nfc/nxp-nci/Makefile @@ -0,0 +1,9 @@ +# +# Makefile for NXP-NCI NFC driver +# + +nxp-nci-objs = core.o firmware.o + +obj-$(CONFIG_NFC_NXP_NCI) += nxp-nci.o + +ccflags-$(CONFIG_NFC_DEBUG) := -DDEBUG diff --git a/drivers/nfc/nxp-nci/core.c b/drivers/nfc/nxp-nci/core.c new file mode 100644 index 000000000000..8979636d48ea --- /dev/null +++ b/drivers/nfc/nxp-nci/core.c @@ -0,0 +1,186 @@ +/* + * Generic driver for NXP NCI NFC chips + * + * Copyright (C) 2014 NXP Semiconductors All rights reserved. + * + * Authors: Clément Perrochaud + * + * Derived from PN544 device driver: + * Copyright (C) 2012 Intel Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, see . + */ + +#include +#include +#include +#include +#include + +#include + +#include "nxp-nci.h" + +#define NXP_NCI_HDR_LEN 4 + +#define NXP_NCI_NFC_PROTOCOLS (NFC_PROTO_JEWEL_MASK | \ + NFC_PROTO_MIFARE_MASK | \ + NFC_PROTO_FELICA_MASK | \ + NFC_PROTO_ISO14443_MASK | \ + NFC_PROTO_ISO14443_B_MASK | \ + NFC_PROTO_NFC_DEP_MASK) + +static int nxp_nci_open(struct nci_dev *ndev) +{ + struct nxp_nci_info *info = nci_get_drvdata(ndev); + int r = 0; + + mutex_lock(&info->info_lock); + + if (info->mode != NXP_NCI_MODE_COLD) { + r = -EBUSY; + goto open_exit; + } + + if (info->phy_ops->set_mode) + r = info->phy_ops->set_mode(info->phy_id, NXP_NCI_MODE_NCI); + + info->mode = NXP_NCI_MODE_NCI; + +open_exit: + mutex_unlock(&info->info_lock); + return r; +} + +static int nxp_nci_close(struct nci_dev *ndev) +{ + struct nxp_nci_info *info = nci_get_drvdata(ndev); + int r = 0; + + mutex_lock(&info->info_lock); + + if (info->phy_ops->set_mode) + r = info->phy_ops->set_mode(info->phy_id, NXP_NCI_MODE_COLD); + + info->mode = NXP_NCI_MODE_COLD; + + mutex_unlock(&info->info_lock); + return r; +} + +static int nxp_nci_send(struct nci_dev *ndev, struct sk_buff *skb) +{ + struct nxp_nci_info *info = nci_get_drvdata(ndev); + int r; + + if (!info->phy_ops->write) { + r = -ENOTSUPP; + goto send_exit; + } + + if (info->mode != NXP_NCI_MODE_NCI) { + r = -EINVAL; + goto send_exit; + } + + r = info->phy_ops->write(info->phy_id, skb); + if (r < 0) + kfree_skb(skb); + +send_exit: + return r; +} + +static struct nci_ops nxp_nci_ops = { + .open = nxp_nci_open, + .close = nxp_nci_close, + .send = nxp_nci_send, + .fw_download = nxp_nci_fw_download, +}; + +int nxp_nci_probe(void *phy_id, struct device *pdev, + struct nxp_nci_phy_ops *phy_ops, unsigned int max_payload, + struct nci_dev **ndev) +{ + struct nxp_nci_info *info; + int r; + + info = devm_kzalloc(pdev, sizeof(struct nxp_nci_info), GFP_KERNEL); + if (!info) { + r = -ENOMEM; + goto probe_exit; + } + + info->phy_id = phy_id; + info->pdev = pdev; + info->phy_ops = phy_ops; + info->max_payload = max_payload; + INIT_WORK(&info->fw_info.work, nxp_nci_fw_work); + init_completion(&info->fw_info.cmd_completion); + mutex_init(&info->info_lock); + + if (info->phy_ops->set_mode) { + r = info->phy_ops->set_mode(info->phy_id, NXP_NCI_MODE_COLD); + if (r < 0) + goto probe_exit; + } + + info->mode = NXP_NCI_MODE_COLD; + + info->ndev = nci_allocate_device(&nxp_nci_ops, NXP_NCI_NFC_PROTOCOLS, + NXP_NCI_HDR_LEN, 0); + if (!info->ndev) { + r = -ENOMEM; + goto probe_exit; + } + + nci_set_parent_dev(info->ndev, pdev); + nci_set_drvdata(info->ndev, info); + r = nci_register_device(info->ndev); + if (r < 0) + goto probe_exit_free_nci; + + *ndev = info->ndev; + + goto probe_exit; + +probe_exit_free_nci: + nci_free_device(info->ndev); +probe_exit: + return r; +} +EXPORT_SYMBOL(nxp_nci_probe); + +void nxp_nci_remove(struct nci_dev *ndev) +{ + struct nxp_nci_info *info = nci_get_drvdata(ndev); + + if (info->mode == NXP_NCI_MODE_FW) + nxp_nci_fw_work_complete(info, -ESHUTDOWN); + cancel_work_sync(&info->fw_info.work); + + mutex_lock(&info->info_lock); + + if (info->phy_ops->set_mode) + info->phy_ops->set_mode(info->phy_id, NXP_NCI_MODE_COLD); + + nci_unregister_device(ndev); + nci_free_device(ndev); + + mutex_unlock(&info->info_lock); +} +EXPORT_SYMBOL(nxp_nci_remove); + +MODULE_LICENSE("GPL"); +MODULE_DESCRIPTION("NXP NCI NFC driver"); +MODULE_AUTHOR("Clément Perrochaud "); diff --git a/drivers/nfc/nxp-nci/firmware.c b/drivers/nfc/nxp-nci/firmware.c new file mode 100644 index 000000000000..08573f97975f --- /dev/null +++ b/drivers/nfc/nxp-nci/firmware.c @@ -0,0 +1,324 @@ +/* + * Generic driver for NXP NCI NFC chips + * + * Copyright (C) 2014 NXP Semiconductors All rights reserved. + * + * Author: Clément Perrochaud + * + * Derived from PN544 device driver: + * Copyright (C) 2012 Intel Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, see . + */ + +#include +#include +#include +#include + +#include "nxp-nci.h" + +/* Crypto operations can take up to 30 seconds */ +#define NXP_NCI_FW_ANSWER_TIMEOUT msecs_to_jiffies(30000) + +#define NXP_NCI_FW_CMD_RESET 0xF0 +#define NXP_NCI_FW_CMD_GETVERSION 0xF1 +#define NXP_NCI_FW_CMD_CHECKINTEGRITY 0xE0 +#define NXP_NCI_FW_CMD_WRITE 0xC0 +#define NXP_NCI_FW_CMD_READ 0xA2 +#define NXP_NCI_FW_CMD_GETSESSIONSTATE 0xF2 +#define NXP_NCI_FW_CMD_LOG 0xA7 +#define NXP_NCI_FW_CMD_FORCE 0xD0 +#define NXP_NCI_FW_CMD_GET_DIE_ID 0xF4 + +#define NXP_NCI_FW_CHUNK_FLAG 0x0400 + +#define NXP_NCI_FW_RESULT_OK 0x00 +#define NXP_NCI_FW_RESULT_INVALID_ADDR 0x01 +#define NXP_NCI_FW_RESULT_GENERIC_ERROR 0x02 +#define NXP_NCI_FW_RESULT_UNKNOWN_CMD 0x0B +#define NXP_NCI_FW_RESULT_ABORTED_CMD 0x0C +#define NXP_NCI_FW_RESULT_PLL_ERROR 0x0D +#define NXP_NCI_FW_RESULT_ADDR_RANGE_OFL_ERROR 0x1E +#define NXP_NCI_FW_RESULT_BUFFER_OFL_ERROR 0x1F +#define NXP_NCI_FW_RESULT_MEM_BSY 0x20 +#define NXP_NCI_FW_RESULT_SIGNATURE_ERROR 0x21 +#define NXP_NCI_FW_RESULT_FIRMWARE_VERSION_ERROR 0x24 +#define NXP_NCI_FW_RESULT_PROTOCOL_ERROR 0x28 +#define NXP_NCI_FW_RESULT_SFWU_DEGRADED 0x2A +#define NXP_NCI_FW_RESULT_PH_STATUS_FIRST_CHUNK 0x2D +#define NXP_NCI_FW_RESULT_PH_STATUS_NEXT_CHUNK 0x2E +#define NXP_NCI_FW_RESULT_PH_STATUS_INTERNAL_ERROR_5 0xC5 + +void nxp_nci_fw_work_complete(struct nxp_nci_info *info, int result) +{ + struct nxp_nci_fw_info *fw_info = &info->fw_info; + int r; + + if (info->phy_ops->set_mode) { + r = info->phy_ops->set_mode(info->phy_id, NXP_NCI_MODE_COLD); + if (r < 0 && result == 0) + result = -r; + } + + info->mode = NXP_NCI_MODE_COLD; + + if (fw_info->fw) { + release_firmware(fw_info->fw); + fw_info->fw = NULL; + } + + nfc_fw_download_done(info->ndev->nfc_dev, fw_info->name, (u32) -result); +} + +/* crc_ccitt cannot be used since it is computed MSB first and not LSB first */ +static u16 nxp_nci_fw_crc(u8 const *buffer, size_t len) +{ + u16 crc = 0xffff; + + while (len--) { + crc = ((crc >> 8) | (crc << 8)) ^ *buffer++; + crc ^= (crc & 0xff) >> 4; + crc ^= (crc & 0xff) << 12; + crc ^= (crc & 0xff) << 5; + } + + return crc; +} + +static int nxp_nci_fw_send_chunk(struct nxp_nci_info *info) +{ + struct nxp_nci_fw_info *fw_info = &info->fw_info; + u16 header, crc; + struct sk_buff *skb; + size_t chunk_len; + size_t remaining_len; + int r; + + skb = nci_skb_alloc(info->ndev, info->max_payload, GFP_KERNEL); + if (!skb) { + r = -ENOMEM; + goto chunk_exit; + } + + chunk_len = info->max_payload - NXP_NCI_FW_HDR_LEN - NXP_NCI_FW_CRC_LEN; + remaining_len = fw_info->frame_size - fw_info->written; + + if (remaining_len > chunk_len) { + header = NXP_NCI_FW_CHUNK_FLAG; + } else { + chunk_len = remaining_len; + header = 0x0000; + } + + header |= chunk_len & NXP_NCI_FW_FRAME_LEN_MASK; + put_unaligned_be16(header, skb_put(skb, NXP_NCI_FW_HDR_LEN)); + + memcpy(skb_put(skb, chunk_len), fw_info->data + fw_info->written, + chunk_len); + + crc = nxp_nci_fw_crc(skb->data, chunk_len + NXP_NCI_FW_HDR_LEN); + put_unaligned_be16(crc, skb_put(skb, NXP_NCI_FW_CRC_LEN)); + + r = info->phy_ops->write(info->phy_id, skb); + if (r >= 0) + r = chunk_len; + + kfree_skb(skb); + +chunk_exit: + return r; +} + +static int nxp_nci_fw_send(struct nxp_nci_info *info) +{ + struct nxp_nci_fw_info *fw_info = &info->fw_info; + long completion_rc; + int r; + + reinit_completion(&fw_info->cmd_completion); + + if (fw_info->written == 0) { + fw_info->frame_size = get_unaligned_be16(fw_info->data) & + NXP_NCI_FW_FRAME_LEN_MASK; + fw_info->data += NXP_NCI_FW_HDR_LEN; + fw_info->size -= NXP_NCI_FW_HDR_LEN; + } + + if (fw_info->frame_size > fw_info->size) + return -EMSGSIZE; + + r = nxp_nci_fw_send_chunk(info); + if (r < 0) + return r; + + fw_info->written += r; + + if (*fw_info->data == NXP_NCI_FW_CMD_RESET) { + fw_info->cmd_result = 0; + if (fw_info->fw) + schedule_work(&fw_info->work); + } else { + completion_rc = wait_for_completion_interruptible_timeout( + &fw_info->cmd_completion, NXP_NCI_FW_ANSWER_TIMEOUT); + if (completion_rc == 0) + return -ETIMEDOUT; + } + + return 0; +} + +void nxp_nci_fw_work(struct work_struct *work) +{ + struct nxp_nci_info *info; + struct nxp_nci_fw_info *fw_info; + int r; + + fw_info = container_of(work, struct nxp_nci_fw_info, work); + info = container_of(fw_info, struct nxp_nci_info, fw_info); + + mutex_lock(&info->info_lock); + + r = fw_info->cmd_result; + if (r < 0) + goto exit_work; + + if (fw_info->written == fw_info->frame_size) { + fw_info->data += fw_info->frame_size; + fw_info->size -= fw_info->frame_size; + fw_info->written = 0; + } + + if (fw_info->size > 0) + r = nxp_nci_fw_send(info); + +exit_work: + if (r < 0 || fw_info->size == 0) + nxp_nci_fw_work_complete(info, r); + mutex_unlock(&info->info_lock); +} + +int nxp_nci_fw_download(struct nci_dev *ndev, const char *firmware_name) +{ + struct nxp_nci_info *info = nci_get_drvdata(ndev); + struct nxp_nci_fw_info *fw_info = &info->fw_info; + int r; + + mutex_lock(&info->info_lock); + + if (!info->phy_ops->set_mode || !info->phy_ops->write) { + r = -ENOTSUPP; + goto fw_download_exit; + } + + if (!firmware_name || firmware_name[0] == '\0') { + r = -EINVAL; + goto fw_download_exit; + } + + strcpy(fw_info->name, firmware_name); + + r = request_firmware(&fw_info->fw, firmware_name, + ndev->nfc_dev->dev.parent); + if (r < 0) + goto fw_download_exit; + + r = info->phy_ops->set_mode(info->phy_id, NXP_NCI_MODE_FW); + if (r < 0) + goto fw_download_exit; + + info->mode = NXP_NCI_MODE_FW; + + fw_info->data = fw_info->fw->data; + fw_info->size = fw_info->fw->size; + fw_info->written = 0; + fw_info->frame_size = 0; + fw_info->cmd_result = 0; + + if (fw_info->fw) + schedule_work(&fw_info->work); + +fw_download_exit: + mutex_unlock(&info->info_lock); + return r; +} + +static int nxp_nci_fw_read_status(u8 stat) +{ + switch (stat) { + case NXP_NCI_FW_RESULT_OK: + return 0; + case NXP_NCI_FW_RESULT_INVALID_ADDR: + return -EINVAL; + case NXP_NCI_FW_RESULT_UNKNOWN_CMD: + return -EINVAL; + case NXP_NCI_FW_RESULT_ABORTED_CMD: + return -EMSGSIZE; + case NXP_NCI_FW_RESULT_ADDR_RANGE_OFL_ERROR: + return -EADDRNOTAVAIL; + case NXP_NCI_FW_RESULT_BUFFER_OFL_ERROR: + return -ENOBUFS; + case NXP_NCI_FW_RESULT_MEM_BSY: + return -ENOKEY; + case NXP_NCI_FW_RESULT_SIGNATURE_ERROR: + return -EKEYREJECTED; + case NXP_NCI_FW_RESULT_FIRMWARE_VERSION_ERROR: + return -EALREADY; + case NXP_NCI_FW_RESULT_PROTOCOL_ERROR: + return -EPROTO; + case NXP_NCI_FW_RESULT_SFWU_DEGRADED: + return -EHWPOISON; + case NXP_NCI_FW_RESULT_PH_STATUS_FIRST_CHUNK: + return 0; + case NXP_NCI_FW_RESULT_PH_STATUS_NEXT_CHUNK: + return 0; + case NXP_NCI_FW_RESULT_PH_STATUS_INTERNAL_ERROR_5: + return -EINVAL; + default: + return -EIO; + } +} + +static u16 nxp_nci_fw_check_crc(struct sk_buff *skb) +{ + u16 crc, frame_crc; + size_t len = skb->len - NXP_NCI_FW_CRC_LEN; + + crc = nxp_nci_fw_crc(skb->data, len); + frame_crc = get_unaligned_be16(skb->data + len); + + return (crc ^ frame_crc); +} + +void nxp_nci_fw_recv_frame(struct nci_dev *ndev, struct sk_buff *skb) +{ + struct nxp_nci_info *info = nci_get_drvdata(ndev); + struct nxp_nci_fw_info *fw_info = &info->fw_info; + + complete(&fw_info->cmd_completion); + + if (skb) { + if (nxp_nci_fw_check_crc(skb) != 0x00) + fw_info->cmd_result = -EBADMSG; + else + fw_info->cmd_result = nxp_nci_fw_read_status( + *skb_pull(skb, NXP_NCI_FW_HDR_LEN)); + kfree_skb(skb); + } else { + fw_info->cmd_result = -EIO; + } + + if (fw_info->fw) + schedule_work(&fw_info->work); +} +EXPORT_SYMBOL(nxp_nci_fw_recv_frame); diff --git a/drivers/nfc/nxp-nci/nxp-nci.h b/drivers/nfc/nxp-nci/nxp-nci.h new file mode 100644 index 000000000000..f1fecc4e2457 --- /dev/null +++ b/drivers/nfc/nxp-nci/nxp-nci.h @@ -0,0 +1,89 @@ +/* + * Copyright (C) 2014 NXP Semiconductors All rights reserved. + * + * Authors: Clément Perrochaud + * + * Derived from PN544 device driver: + * Copyright (C) 2012 Intel Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, see . +*/ + +#ifndef __LOCAL_NXP_NCI_H_ +#define __LOCAL_NXP_NCI_H_ + +#include +#include +#include +#include + +#include + +#define NXP_NCI_FW_HDR_LEN 2 +#define NXP_NCI_FW_CRC_LEN 2 + +#define NXP_NCI_FW_FRAME_LEN_MASK 0x03FF + +enum nxp_nci_mode { + NXP_NCI_MODE_COLD, + NXP_NCI_MODE_NCI, + NXP_NCI_MODE_FW +}; + +struct nxp_nci_phy_ops { + int (*set_mode)(void *id, enum nxp_nci_mode mode); + int (*write)(void *id, struct sk_buff *skb); +}; + +struct nxp_nci_fw_info { + char name[NFC_FIRMWARE_NAME_MAXSIZE + 1]; + const struct firmware *fw; + + size_t size; + size_t written; + + const u8 *data; + size_t frame_size; + + struct work_struct work; + struct completion cmd_completion; + + int cmd_result; +}; + +struct nxp_nci_info { + struct nci_dev *ndev; + void *phy_id; + struct device *pdev; + + enum nxp_nci_mode mode; + + struct nxp_nci_phy_ops *phy_ops; + unsigned int max_payload; + + struct mutex info_lock; + + struct nxp_nci_fw_info fw_info; +}; + +int nxp_nci_fw_download(struct nci_dev *ndev, const char *firmware_name); +void nxp_nci_fw_work(struct work_struct *work); +void nxp_nci_fw_recv_frame(struct nci_dev *ndev, struct sk_buff *skb); +void nxp_nci_fw_work_complete(struct nxp_nci_info *info, int result); + +int nxp_nci_probe(void *phy_id, struct device *pdev, + struct nxp_nci_phy_ops *phy_ops, unsigned int max_payload, + struct nci_dev **ndev); +void nxp_nci_remove(struct nci_dev *ndev); + +#endif /* __LOCAL_NXP_NCI_H_ */ diff --git a/include/linux/platform_data/nxp-nci.h b/include/linux/platform_data/nxp-nci.h new file mode 100644 index 000000000000..d6ed28679bb2 --- /dev/null +++ b/include/linux/platform_data/nxp-nci.h @@ -0,0 +1,27 @@ +/* + * Generic platform data for the NXP NCI NFC chips. + * + * Copyright (C) 2014 NXP Semiconductors All rights reserved. + * + * Authors: Clément Perrochaud + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef _NXP_NCI_H_ +#define _NXP_NCI_H_ + +struct nxp_nci_nfc_platform_data { + unsigned int gpio_en; + unsigned int gpio_fw; + unsigned int irq; +}; + +#endif /* _NXP_NCI_H_ */ -- cgit v1.2.3 From 933a46b8df02caa1bd16a6dc4ddf13091c970ef5 Mon Sep 17 00:00:00 2001 From: Jonathan Corbet Date: Thu, 26 Mar 2015 10:25:17 -0600 Subject: Documentation: tweak the maintainers entry The previous maintainer didn't want translation patches, but I'll happily take them. Also note a few subdirectories where the subsystem maintainers would prefer to handle docs patches themselves. Signed-off-by: Jonathan Corbet --- MAINTAINERS | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'MAINTAINERS') diff --git a/MAINTAINERS b/MAINTAINERS index ddc5a8cf9a8a..9e6a292b5825 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -3254,7 +3254,9 @@ S: Maintained F: Documentation/ X: Documentation/ABI/ X: Documentation/devicetree/ -X: Documentation/[a-z][a-z]_[A-Z][A-Z]/ +X: Documentation/acpi +X: Documentation/power +X: Documentation/spi T: git git://git.lwn.net/linux-2.6.git docs-next DOUBLETALK DRIVER -- cgit v1.2.3 From 03515f323c3766f0a69b62743794577bbd9f87c9 Mon Sep 17 00:00:00 2001 From: Nicolas Ferre Date: Thu, 19 Mar 2015 10:49:42 +0100 Subject: MAINTAINERS: change Atmel ssc driver entry I take over the maintainship from Voice. Signed-off-by: Nicolas Ferre Cc: Mark Brown Cc: Arnd Bergmann Acked-by: Bo Shen Signed-off-by: Greg Kroah-Hartman --- MAINTAINERS | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'MAINTAINERS') diff --git a/MAINTAINERS b/MAINTAINERS index 358eb0105e00..d7490020c0f3 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1819,7 +1819,7 @@ S: Supported F: drivers/spi/spi-atmel.* ATMEL SSC DRIVER -M: Bo Shen +M: Nicolas Ferre L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) S: Supported F: drivers/misc/atmel-ssc.c -- cgit v1.2.3 From c0c89fafa289ea241ba3fb22d6f583f8089a719e Mon Sep 17 00:00:00 2001 From: Stephen Boyd Date: Fri, 13 Mar 2015 11:09:34 -0700 Subject: ARM: Remove mach-msm and associated ARM architecture code The maintainers for mach-msm no longer have any plans to support or test the platforms supported by this architecture[1]. Most likely there aren't any active users of this code anyway, so let's delete it. [1] http://lkml.kernel.org/r/20150307031212.GA8434@fifo99.com Cc: David Brown Cc: Bryan Huntsman Cc: Daniel Walker Signed-off-by: Stephen Boyd Signed-off-by: Kumar Gala --- Documentation/arm/00-INDEX | 2 - Documentation/arm/msm/gpiomux.txt | 176 ---- MAINTAINERS | 20 +- arch/arm/Kconfig | 14 - arch/arm/Kconfig.debug | 29 +- arch/arm/Makefile | 2 - arch/arm/configs/msm_defconfig | 121 --- arch/arm/include/debug/msm.S | 14 - arch/arm/mach-msm/Kconfig | 109 --- arch/arm/mach-msm/Makefile | 23 - arch/arm/mach-msm/Makefile.boot | 3 - arch/arm/mach-msm/board-halibut.c | 110 --- arch/arm/mach-msm/board-msm7x30.c | 191 ----- arch/arm/mach-msm/board-qsd8x50.c | 254 ------ arch/arm/mach-msm/board-sapphire.c | 114 --- arch/arm/mach-msm/board-trout-gpio.c | 233 ----- arch/arm/mach-msm/board-trout-mmc.c | 185 ---- arch/arm/mach-msm/board-trout-panel.c | 292 ------- arch/arm/mach-msm/board-trout.c | 111 --- arch/arm/mach-msm/board-trout.h | 162 ---- arch/arm/mach-msm/clock-pcom.c | 176 ---- arch/arm/mach-msm/clock-pcom.h | 145 ---- arch/arm/mach-msm/clock.c | 28 - arch/arm/mach-msm/clock.h | 43 - arch/arm/mach-msm/common.h | 41 - arch/arm/mach-msm/devices-msm7x00.c | 480 ----------- arch/arm/mach-msm/devices-msm7x30.c | 246 ------ arch/arm/mach-msm/devices-qsd8x50.c | 388 --------- arch/arm/mach-msm/devices.h | 53 -- arch/arm/mach-msm/dma.c | 298 ------- arch/arm/mach-msm/gpiomux-8x50.c | 51 -- arch/arm/mach-msm/gpiomux-v1.h | 67 -- arch/arm/mach-msm/gpiomux.c | 111 --- arch/arm/mach-msm/gpiomux.h | 84 -- arch/arm/mach-msm/include/mach/clk.h | 31 - arch/arm/mach-msm/include/mach/dma.h | 151 ---- arch/arm/mach-msm/include/mach/entry-macro.S | 36 - arch/arm/mach-msm/include/mach/hardware.h | 18 - arch/arm/mach-msm/include/mach/irqs-7x00.h | 75 -- arch/arm/mach-msm/include/mach/irqs-7x30.h | 153 ---- arch/arm/mach-msm/include/mach/irqs-8x50.h | 88 -- arch/arm/mach-msm/include/mach/irqs.h | 37 - arch/arm/mach-msm/include/mach/msm_gpiomux.h | 38 - arch/arm/mach-msm/include/mach/msm_iomap-7x00.h | 108 --- arch/arm/mach-msm/include/mach/msm_iomap-7x30.h | 103 --- arch/arm/mach-msm/include/mach/msm_iomap-8x50.h | 125 --- arch/arm/mach-msm/include/mach/msm_iomap.h | 53 -- arch/arm/mach-msm/include/mach/msm_smd.h | 109 --- arch/arm/mach-msm/include/mach/sirc.h | 98 --- arch/arm/mach-msm/include/mach/vreg.h | 29 - arch/arm/mach-msm/io.c | 161 ---- arch/arm/mach-msm/irq-vic.c | 363 -------- arch/arm/mach-msm/irq.c | 151 ---- arch/arm/mach-msm/last_radio_log.c | 71 -- arch/arm/mach-msm/proc_comm.c | 129 --- arch/arm/mach-msm/proc_comm.h | 258 ------ arch/arm/mach-msm/sirc.c | 172 ---- arch/arm/mach-msm/smd.c | 1034 ----------------------- arch/arm/mach-msm/smd_debug.c | 311 ------- arch/arm/mach-msm/smd_private.h | 403 --------- arch/arm/mach-msm/vreg.c | 220 ----- 61 files changed, 8 insertions(+), 8893 deletions(-) delete mode 100644 Documentation/arm/msm/gpiomux.txt delete mode 100644 arch/arm/configs/msm_defconfig delete mode 100644 arch/arm/mach-msm/Kconfig delete mode 100644 arch/arm/mach-msm/Makefile delete mode 100644 arch/arm/mach-msm/Makefile.boot delete mode 100644 arch/arm/mach-msm/board-halibut.c delete mode 100644 arch/arm/mach-msm/board-msm7x30.c delete mode 100644 arch/arm/mach-msm/board-qsd8x50.c delete mode 100644 arch/arm/mach-msm/board-sapphire.c delete mode 100644 arch/arm/mach-msm/board-trout-gpio.c delete mode 100644 arch/arm/mach-msm/board-trout-mmc.c delete mode 100644 arch/arm/mach-msm/board-trout-panel.c delete mode 100644 arch/arm/mach-msm/board-trout.c delete mode 100644 arch/arm/mach-msm/board-trout.h delete mode 100644 arch/arm/mach-msm/clock-pcom.c delete mode 100644 arch/arm/mach-msm/clock-pcom.h delete mode 100644 arch/arm/mach-msm/clock.c delete mode 100644 arch/arm/mach-msm/clock.h delete mode 100644 arch/arm/mach-msm/common.h delete mode 100644 arch/arm/mach-msm/devices-msm7x00.c delete mode 100644 arch/arm/mach-msm/devices-msm7x30.c delete mode 100644 arch/arm/mach-msm/devices-qsd8x50.c delete mode 100644 arch/arm/mach-msm/devices.h delete mode 100644 arch/arm/mach-msm/dma.c delete mode 100644 arch/arm/mach-msm/gpiomux-8x50.c delete mode 100644 arch/arm/mach-msm/gpiomux-v1.h delete mode 100644 arch/arm/mach-msm/gpiomux.c delete mode 100644 arch/arm/mach-msm/gpiomux.h delete mode 100644 arch/arm/mach-msm/include/mach/clk.h delete mode 100644 arch/arm/mach-msm/include/mach/dma.h delete mode 100644 arch/arm/mach-msm/include/mach/entry-macro.S delete mode 100644 arch/arm/mach-msm/include/mach/hardware.h delete mode 100644 arch/arm/mach-msm/include/mach/irqs-7x00.h delete mode 100644 arch/arm/mach-msm/include/mach/irqs-7x30.h delete mode 100644 arch/arm/mach-msm/include/mach/irqs-8x50.h delete mode 100644 arch/arm/mach-msm/include/mach/irqs.h delete mode 100644 arch/arm/mach-msm/include/mach/msm_gpiomux.h delete mode 100644 arch/arm/mach-msm/include/mach/msm_iomap-7x00.h delete mode 100644 arch/arm/mach-msm/include/mach/msm_iomap-7x30.h delete mode 100644 arch/arm/mach-msm/include/mach/msm_iomap-8x50.h delete mode 100644 arch/arm/mach-msm/include/mach/msm_iomap.h delete mode 100644 arch/arm/mach-msm/include/mach/msm_smd.h delete mode 100644 arch/arm/mach-msm/include/mach/sirc.h delete mode 100644 arch/arm/mach-msm/include/mach/vreg.h delete mode 100644 arch/arm/mach-msm/io.c delete mode 100644 arch/arm/mach-msm/irq-vic.c delete mode 100644 arch/arm/mach-msm/irq.c delete mode 100644 arch/arm/mach-msm/last_radio_log.c delete mode 100644 arch/arm/mach-msm/proc_comm.c delete mode 100644 arch/arm/mach-msm/proc_comm.h delete mode 100644 arch/arm/mach-msm/sirc.c delete mode 100644 arch/arm/mach-msm/smd.c delete mode 100644 arch/arm/mach-msm/smd_debug.c delete mode 100644 arch/arm/mach-msm/smd_private.h delete mode 100644 arch/arm/mach-msm/vreg.c (limited to 'MAINTAINERS') diff --git a/Documentation/arm/00-INDEX b/Documentation/arm/00-INDEX index 8edb9007844e..dea011c8d7c7 100644 --- a/Documentation/arm/00-INDEX +++ b/Documentation/arm/00-INDEX @@ -10,8 +10,6 @@ IXP4xx - Intel IXP4xx Network processor. Makefile - Build sourcefiles as part of the Documentation-build for arm -msm/ - - MSM specific documentation Netwinder - Netwinder specific documentation Porting diff --git a/Documentation/arm/msm/gpiomux.txt b/Documentation/arm/msm/gpiomux.txt deleted file mode 100644 index 67a81620adf6..000000000000 --- a/Documentation/arm/msm/gpiomux.txt +++ /dev/null @@ -1,176 +0,0 @@ -This document provides an overview of the msm_gpiomux interface, which -is used to provide gpio pin multiplexing and configuration on mach-msm -targets. - -History -======= - -The first-generation API for gpio configuration & multiplexing on msm -is the function gpio_tlmm_config(). This function has a few notable -shortcomings, which led to its deprecation and replacement by gpiomux: - -The 'disable' parameter: Setting the second parameter to -gpio_tlmm_config to GPIO_CFG_DISABLE tells the peripheral -processor in charge of the subsystem to perform a look-up into a -low-power table and apply the low-power/sleep setting for the pin. -As the msm family evolved this became problematic. Not all pins -have sleep settings, not all peripheral processors will accept requests -to apply said sleep settings, and not all msm targets have their gpio -subsystems managed by a peripheral processor. In order to get consistent -behavior on all targets, drivers are forced to ignore this parameter, -rendering it useless. - -The 'direction' flag: for all mux-settings other than raw-gpio (0), -the output-enable bit of a gpio is hard-wired to a known -input (usually VDD or ground). For those settings, the direction flag -is meaningless at best, and deceptive at worst. In addition, using the -direction flag to change output-enable (OE) directly can cause trouble in -gpiolib, which has no visibility into gpio direction changes made -in this way. Direction control in gpio mode should be made through gpiolib. - -Key Features of gpiomux -======================= - -- A consistent interface across all generations of msm. Drivers can expect -the same results on every target. -- gpiomux plays nicely with gpiolib. Functions that should belong to gpiolib -are left to gpiolib and not duplicated here. gpiomux is written with the -intent that gpio_chips will call gpiomux reference-counting methods -from their request() and free() hooks, providing full integration. -- Tabular configuration. Instead of having to call gpio_tlmm_config -hundreds of times, gpio configuration is placed in a single table. -- Per-gpio sleep. Each gpio is individually reference counted, allowing only -those lines which are in use to be put in high-power states. -- 0 means 'do nothing': all flags are designed so that the default memset-zero -equates to a sensible default of 'no configuration', preventing users -from having to provide hundreds of 'no-op' configs for unused or -unwanted lines. - -Usage -===== - -To use gpiomux, provide configuration information for relevant gpio lines -in the msm_gpiomux_configs table. Since a 0 equates to "unconfigured", -only those lines to be managed by gpiomux need to be specified. Here -is a completely fictional example: - -struct msm_gpiomux_config msm_gpiomux_configs[GPIOMUX_NGPIOS] = { - [12] = { - .active = GPIOMUX_VALID | GPIOMUX_DRV_8MA | GPIOMUX_FUNC_1, - .suspended = GPIOMUX_VALID | GPIOMUX_PULL_DOWN, - }, - [34] = { - .suspended = GPIOMUX_VALID | GPIOMUX_PULL_DOWN, - }, -}; - -To indicate that a gpio is in use, call msm_gpiomux_get() to increase -its reference count. To decrease the reference count, call msm_gpiomux_put(). - -The effect of this configuration is as follows: - -When the system boots, gpios 12 and 34 will be initialized with their -'suspended' configurations. All other gpios, which were left unconfigured, -will not be touched. - -When msm_gpiomux_get() is called on gpio 12 to raise its reference count -above 0, its active configuration will be applied. Since no other gpio -line has a valid active configuration, msm_gpiomux_get() will have no -effect on any other line. - -When msm_gpiomux_put() is called on gpio 12 or 34 to drop their reference -count to 0, their suspended configurations will be applied. -Since no other gpio line has a valid suspended configuration, no other -gpio line will be effected by msm_gpiomux_put(). Since gpio 34 has no valid -active configuration, this is effectively a no-op for gpio 34 as well, -with one small caveat, see the section "About Output-Enable Settings". - -All of the GPIOMUX_VALID flags may seem like unnecessary overhead, but -they address some important issues. As unused entries (all those -except 12 and 34) are zero-filled, gpiomux needs a way to distinguish -the used fields from the unused. In addition, the all-zero pattern -is a valid configuration! Therefore, gpiomux defines an additional bit -which is used to indicate when a field is used. This has the pleasant -side-effect of allowing calls to msm_gpiomux_write to use '0' to indicate -that a value should not be changed: - - msm_gpiomux_write(0, GPIOMUX_VALID, 0); - -replaces the active configuration of gpio 0 with an all-zero configuration, -but leaves the suspended configuration as it was. - -Static Configurations -===================== - -To install a static configuration, which is applied at boot and does -not change after that, install a configuration with a suspended component -but no active component, as in the previous example: - - [34] = { - .suspended = GPIOMUX_VALID | GPIOMUX_PULL_DOWN, - }, - -The suspended setting is applied during boot, and the lack of any valid -active setting prevents any other setting from being applied at runtime. -If other subsystems attempting to access the line is a concern, one could -*really* anchor the configuration down by calling msm_gpiomux_get on the -line at initialization to move the line into active mode. With the line -held, it will never be re-suspended, and with no valid active configuration, -no new configurations will be applied. - -But then, if having other subsystems grabbing for the line is truly a concern, -it should be reserved with gpio_request instead, which carries an implicit -msm_gpiomux_get. - -gpiomux and gpiolib -=================== - -It is expected that msm gpio_chips will call msm_gpiomux_get() and -msm_gpiomux_put() from their request and free hooks, like this fictional -example: - -static int request(struct gpio_chip *chip, unsigned offset) -{ - return msm_gpiomux_get(chip->base + offset); -} - -static void free(struct gpio_chip *chip, unsigned offset) -{ - msm_gpiomux_put(chip->base + offset); -} - - ...somewhere in a gpio_chip declaration... - .request = request, - .free = free, - -This provides important functionality: -- It guarantees that a gpio line will have its 'active' config applied - when the line is requested, and will not be suspended while the line - remains requested; and -- It guarantees that gpio-direction settings from gpiolib behave sensibly. - See "About Output-Enable Settings." - -This mechanism allows for "auto-request" of gpiomux lines via gpiolib -when it is suitable. Drivers wishing more exact control are, of course, -free to also use msm_gpiomux_set and msm_gpiomux_get. - -About Output-Enable Settings -============================ - -Some msm targets do not have the ability to query the current gpio -configuration setting. This means that changes made to the output-enable -(OE) bit by gpiolib cannot be consistently detected and preserved by gpiomux. -Therefore, when gpiomux applies a configuration setting, any direction -settings which may have been applied by gpiolib are lost and the default -input settings are re-applied. - -For this reason, drivers should not assume that gpio direction settings -continue to hold if they free and then re-request a gpio. This seems like -common sense - after all, anybody could have obtained the line in the -meantime - but it needs saying. - -This also means that calls to msm_gpiomux_write will reset the OE bit, -which means that if the gpio line is held by a client of gpiolib and -msm_gpiomux_write is called, the direction setting has been lost and -gpiolib's internal state has been broken. -Release gpio lines before reconfiguring them. diff --git a/MAINTAINERS b/MAINTAINERS index 6239a305dff0..0f847a931027 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1244,22 +1244,6 @@ L: openmoko-kernel@lists.openmoko.org (subscribers-only) W: http://wiki.openmoko.org/wiki/Neo_FreeRunner S: Supported -ARM/QUALCOMM MSM MACHINE SUPPORT -M: David Brown -M: Daniel Walker -M: Bryan Huntsman -L: linux-arm-msm@vger.kernel.org -F: arch/arm/mach-msm/ -F: drivers/video/fbdev/msm/ -F: drivers/mmc/host/msm_sdcc.c -F: drivers/mmc/host/msm_sdcc.h -F: drivers/tty/serial/msm_serial.h -F: drivers/tty/serial/msm_serial.c -F: drivers/*/pm8???-* -F: drivers/mfd/ssbi.c -T: git git://git.kernel.org/pub/scm/linux/kernel/git/davidb/linux-msm.git -S: Maintained - ARM/TOSA MACHINE SUPPORT M: Dmitry Eremin-Solenikov M: Dirk Opfer @@ -1317,6 +1301,10 @@ L: linux-soc@vger.kernel.org S: Maintained F: arch/arm/mach-qcom/ F: drivers/soc/qcom/ +F: drivers/tty/serial/msm_serial.h +F: drivers/tty/serial/msm_serial.c +F: drivers/*/pm8???-* +F: drivers/mfd/ssbi.c T: git git://git.kernel.org/pub/scm/linux/kernel/git/galak/linux-qcom.git ARM/RADISYS ENP2611 MACHINE SUPPORT diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 9f1f09a2bc9b..adc85072bd29 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -625,18 +625,6 @@ config ARCH_PXA help Support for Intel/Marvell's PXA2xx/PXA3xx processor line. -config ARCH_MSM - bool "Qualcomm MSM (non-multiplatform)" - select ARCH_REQUIRE_GPIOLIB - select COMMON_CLK - select GENERIC_CLOCKEVENTS - help - Support for Qualcomm MSM/QSD based systems. This runs on the - apps processor of the MSM/QSD and depends on a shared memory - interface to the modem processor which runs the baseband - stack and controls some vital subsystems - (clock and power control, etc). - config ARCH_SHMOBILE_LEGACY bool "Renesas ARM SoCs (non-multiplatform)" select ARCH_SHMOBILE @@ -890,8 +878,6 @@ source "arch/arm/mach-ks8695/Kconfig" source "arch/arm/mach-meson/Kconfig" -source "arch/arm/mach-msm/Kconfig" - source "arch/arm/mach-moxart/Kconfig" source "arch/arm/mach-mv78xx0/Kconfig" diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug index 970de7518341..b010202043c5 100644 --- a/arch/arm/Kconfig.debug +++ b/arch/arm/Kconfig.debug @@ -448,25 +448,6 @@ choice Say Y here if you want kernel low-level debugging support on MMP UART3. - config DEBUG_MSM_UART - bool "Kernel low-level debugging messages via MSM UART" - depends on ARCH_MSM - help - Say Y here if you want the debug print routines to direct - their output to the serial port on MSM devices. - - ARCH DEBUG_UART_PHYS DEBUG_UART_VIRT # - MSM7X00A, QSD8X50 0xa9a00000 0xe1000000 UART1 - MSM7X00A, QSD8X50 0xa9b00000 0xe1000000 UART2 - MSM7X00A, QSD8X50 0xa9c00000 0xe1000000 UART3 - - MSM7X30 0xaca00000 0xe1000000 UART1 - MSM7X30 0xacb00000 0xe1000000 UART2 - MSM7X30 0xacc00000 0xe1000000 UART3 - - Please adjust DEBUG_UART_PHYS and DEBUG_UART_BASE configuration - options based on your needs. - config DEBUG_QCOM_UARTDM bool "Kernel low-level debugging messages via QCOM UARTDM" depends on ARCH_QCOM @@ -1295,7 +1276,7 @@ config DEBUG_LL_INCLUDE DEBUG_IMX6SL_UART || \ DEBUG_IMX6SX_UART default "debug/ks8695.S" if DEBUG_KS8695_UART - default "debug/msm.S" if DEBUG_MSM_UART || DEBUG_QCOM_UARTDM + default "debug/msm.S" if DEBUG_QCOM_UARTDM default "debug/netx.S" if DEBUG_NETX_UART default "debug/omap2plus.S" if DEBUG_OMAP2PLUS_UART default "debug/renesas-scif.S" if DEBUG_R7S72100_SCIF2 @@ -1388,7 +1369,6 @@ config DEBUG_UART_PHYS default 0x80230000 if DEBUG_PICOXCELL_UART default 0x808c0000 if ARCH_EP93XX default 0x90020000 if DEBUG_NSPIRE_CLASSIC_UART || DEBUG_NSPIRE_CX_UART - default 0xa9a00000 if DEBUG_MSM_UART default 0xb0060000 if DEBUG_SIRFPRIMA2_UART1 default 0xb0090000 if DEBUG_VEXPRESS_UART0_CRX default 0xc0013000 if DEBUG_U300_UART @@ -1433,7 +1413,7 @@ config DEBUG_UART_PHYS DEBUG_LL_UART_8250 || DEBUG_LL_UART_PL01X || \ DEBUG_LL_UART_EFM32 || \ DEBUG_UART_8250 || DEBUG_UART_PL01X || DEBUG_MESON_UARTAO || \ - DEBUG_MSM_UART || DEBUG_NETX_UART || \ + DEBUG_NETX_UART || \ DEBUG_QCOM_UARTDM || DEBUG_R7S72100_SCIF2 || \ DEBUG_RCAR_GEN1_SCIF0 || DEBUG_RCAR_GEN1_SCIF2 || \ DEBUG_RCAR_GEN2_SCIF0 || DEBUG_RCAR_GEN2_SCIF2 || \ @@ -1446,7 +1426,6 @@ config DEBUG_UART_VIRT hex "Virtual base address of debug UART" default 0xe0000a00 if DEBUG_NETX_UART default 0xe0010fe0 if ARCH_RPC - default 0xe1000000 if DEBUG_MSM_UART default 0xf0000be0 if ARCH_EBSA110 default 0xf0010000 if DEBUG_ASM9260_UART default 0xf01fb000 if DEBUG_NOMADIK_UART @@ -1526,7 +1505,7 @@ config DEBUG_UART_VIRT default DEBUG_UART_PHYS if !MMU depends on DEBUG_LL_UART_8250 || DEBUG_LL_UART_PL01X || \ DEBUG_UART_8250 || DEBUG_UART_PL01X || DEBUG_MESON_UARTAO || \ - DEBUG_MSM_UART || DEBUG_NETX_UART || \ + DEBUG_NETX_UART || \ DEBUG_QCOM_UARTDM || DEBUG_S3C24XX_UART || \ DEBUG_UART_BCM63XX || DEBUG_ASM9260_UART || \ DEBUG_SIRFSOC_UART || DEBUG_DIGICOLOR_UA0 @@ -1556,7 +1535,7 @@ config DEBUG_UART_8250_FLOW_CONTROL config DEBUG_UNCOMPRESS bool - depends on ARCH_MULTIPLATFORM || ARCH_MSM || PLAT_SAMSUNG + depends on ARCH_MULTIPLATFORM || PLAT_SAMSUNG default y if DEBUG_LL && !DEBUG_OMAP2PLUS_UART && \ (!DEBUG_TEGRA_UART || !ZBOOT_ROM) help diff --git a/arch/arm/Makefile b/arch/arm/Makefile index 7f99cd652203..fa03c13ddfec 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -136,7 +136,6 @@ textofs-$(CONFIG_PM_H1940) := 0x00108000 ifeq ($(CONFIG_ARCH_SA1100),y) textofs-$(CONFIG_SA1111) := 0x00208000 endif -textofs-$(CONFIG_ARCH_MSM7X30) := 0x00208000 textofs-$(CONFIG_ARCH_MSM8X60) := 0x00208000 textofs-$(CONFIG_ARCH_MSM8960) := 0x00208000 textofs-$(CONFIG_ARCH_AXXIA) := 0x00308000 @@ -170,7 +169,6 @@ machine-$(CONFIG_ARCH_LPC32XX) += lpc32xx machine-$(CONFIG_ARCH_MESON) += meson machine-$(CONFIG_ARCH_MMP) += mmp machine-$(CONFIG_ARCH_MOXART) += moxart -machine-$(CONFIG_ARCH_MSM) += msm machine-$(CONFIG_ARCH_MV78XX0) += mv78xx0 machine-$(CONFIG_ARCH_MVEBU) += mvebu machine-$(CONFIG_ARCH_MXC) += imx diff --git a/arch/arm/configs/msm_defconfig b/arch/arm/configs/msm_defconfig deleted file mode 100644 index dd18c9e527d6..000000000000 --- a/arch/arm/configs/msm_defconfig +++ /dev/null @@ -1,121 +0,0 @@ -CONFIG_SYSVIPC=y -CONFIG_NO_HZ=y -CONFIG_HIGH_RES_TIMERS=y -CONFIG_IKCONFIG=y -CONFIG_IKCONFIG_PROC=y -CONFIG_BLK_DEV_INITRD=y -CONFIG_SYSCTL_SYSCALL=y -CONFIG_KALLSYMS_ALL=y -CONFIG_EMBEDDED=y -# CONFIG_SLUB_DEBUG is not set -# CONFIG_COMPAT_BRK is not set -CONFIG_PROFILING=y -CONFIG_OPROFILE=y -CONFIG_KPROBES=y -CONFIG_MODULES=y -CONFIG_MODULE_UNLOAD=y -CONFIG_MODULE_FORCE_UNLOAD=y -CONFIG_MODVERSIONS=y -CONFIG_PARTITION_ADVANCED=y -CONFIG_ARCH_MSM=y -CONFIG_PREEMPT=y -CONFIG_AEABI=y -CONFIG_HIGHMEM=y -CONFIG_HIGHPTE=y -CONFIG_CLEANCACHE=y -CONFIG_AUTO_ZRELADDR=y -CONFIG_VFP=y -# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set -CONFIG_NET=y -CONFIG_PACKET=y -CONFIG_UNIX=y -CONFIG_INET=y -CONFIG_IP_ADVANCED_ROUTER=y -CONFIG_IP_MULTIPLE_TABLES=y -CONFIG_IP_ROUTE_VERBOSE=y -CONFIG_IP_PNP=y -CONFIG_IP_PNP_DHCP=y -# CONFIG_INET_XFRM_MODE_TRANSPORT is not set -# CONFIG_INET_XFRM_MODE_TUNNEL is not set -# CONFIG_INET_XFRM_MODE_BEET is not set -# CONFIG_INET_LRO is not set -# CONFIG_IPV6 is not set -CONFIG_CFG80211=y -CONFIG_RFKILL=y -CONFIG_BLK_DEV_LOOP=y -CONFIG_BLK_DEV_RAM=y -CONFIG_SCSI=y -CONFIG_BLK_DEV_SD=y -CONFIG_CHR_DEV_SG=y -CONFIG_CHR_DEV_SCH=y -CONFIG_SCSI_MULTI_LUN=y -CONFIG_SCSI_CONSTANTS=y -CONFIG_SCSI_LOGGING=y -CONFIG_SCSI_SCAN_ASYNC=y -CONFIG_NETDEVICES=y -CONFIG_DUMMY=y -CONFIG_SLIP=y -CONFIG_SLIP_COMPRESSED=y -CONFIG_SLIP_MODE_SLIP6=y -CONFIG_USB_USBNET=y -# CONFIG_USB_NET_AX8817X is not set -# CONFIG_USB_NET_ZAURUS is not set -CONFIG_INPUT_EVDEV=y -# CONFIG_KEYBOARD_ATKBD is not set -# CONFIG_MOUSE_PS2 is not set -CONFIG_INPUT_JOYSTICK=y -CONFIG_INPUT_TOUCHSCREEN=y -CONFIG_INPUT_MISC=y -CONFIG_INPUT_UINPUT=y -CONFIG_SERIO_LIBPS2=y -# CONFIG_LEGACY_PTYS is not set -CONFIG_SERIAL_MSM=y -CONFIG_SERIAL_MSM_CONSOLE=y -# CONFIG_HW_RANDOM is not set -CONFIG_I2C=y -CONFIG_I2C_CHARDEV=y -CONFIG_SPI=y -CONFIG_DEBUG_GPIO=y -CONFIG_GPIO_SYSFS=y -CONFIG_THERMAL=y -CONFIG_REGULATOR=y -CONFIG_MEDIA_SUPPORT=y -CONFIG_FB=y -CONFIG_SOUND=y -CONFIG_SND=y -CONFIG_SND_DYNAMIC_MINORS=y -# CONFIG_SND_ARM is not set -# CONFIG_SND_SPI is not set -# CONFIG_SND_USB is not set -CONFIG_SND_SOC=y -CONFIG_USB=y -CONFIG_USB_ANNOUNCE_NEW_DEVICES=y -CONFIG_USB_MON=y -CONFIG_USB_EHCI_HCD=y -CONFIG_USB_ACM=y -CONFIG_USB_SERIAL=y -CONFIG_USB_GADGET=y -CONFIG_USB_GADGET_DEBUG_FILES=y -CONFIG_USB_GADGET_VBUS_DRAW=500 -CONFIG_RTC_CLASS=y -CONFIG_STAGING=y -CONFIG_EXT2_FS=y -CONFIG_EXT2_FS_XATTR=y -CONFIG_EXT3_FS=y -# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set -CONFIG_EXT4_FS=y -CONFIG_FUSE_FS=y -CONFIG_VFAT_FS=y -CONFIG_TMPFS=y -CONFIG_NFS_FS=y -CONFIG_NFS_V3_ACL=y -CONFIG_NFS_V4=y -CONFIG_CIFS=y -CONFIG_PRINTK_TIME=y -CONFIG_DYNAMIC_DEBUG=y -CONFIG_DEBUG_INFO=y -CONFIG_MAGIC_SYSRQ=y -CONFIG_LOCKUP_DETECTOR=y -# CONFIG_DETECT_HUNG_TASK is not set -# CONFIG_SCHED_DEBUG is not set -CONFIG_TIMER_STATS=y diff --git a/arch/arm/include/debug/msm.S b/arch/arm/include/debug/msm.S index e55a9426b496..b03024fa671f 100644 --- a/arch/arm/include/debug/msm.S +++ b/arch/arm/include/debug/msm.S @@ -16,24 +16,17 @@ */ .macro addruart, rp, rv, tmp -#ifdef CONFIG_DEBUG_UART_PHYS ldr \rp, =CONFIG_DEBUG_UART_PHYS ldr \rv, =CONFIG_DEBUG_UART_VIRT -#endif .endm .macro senduart, rd, rx ARM_BE8(rev \rd, \rd ) -#ifdef CONFIG_DEBUG_QCOM_UARTDM @ Write the 1 character to UARTDM_TF str \rd, [\rx, #0x70] -#else - str \rd, [\rx, #0x0C] -#endif .endm .macro waituart, rd, rx -#ifdef CONFIG_DEBUG_QCOM_UARTDM @ check for TX_EMT in UARTDM_SR ldr \rd, [\rx, #0x08] ARM_BE8(rev \rd, \rd ) @@ -55,13 +48,6 @@ ARM_BE8(rev \rd, \rd ) str \rd, [\rx, #0x40] @ UARTDM reg. Read to induce delay ldr \rd, [\rx, #0x08] -#else - @ wait for TX_READY -1001: ldr \rd, [\rx, #0x08] -ARM_BE8(rev \rd, \rd ) - tst \rd, #0x04 - beq 1001b -#endif .endm .macro busyuart, rd, rx diff --git a/arch/arm/mach-msm/Kconfig b/arch/arm/mach-msm/Kconfig deleted file mode 100644 index a6b50e62a495..000000000000 --- a/arch/arm/mach-msm/Kconfig +++ /dev/null @@ -1,109 +0,0 @@ -if ARCH_MSM - -choice - prompt "Qualcomm MSM SoC Type" - default ARCH_MSM7X00A - depends on ARCH_MSM - -config ARCH_MSM7X00A - bool "MSM7x00A / MSM7x01A" - select ARCH_MSM_ARM11 - select CPU_V6 - select GPIO_MSM_V1 - select MACH_TROUT if !MACH_HALIBUT - select MSM_PROC_COMM - select MSM_SMD - select CLKSRC_QCOM - select MSM_SMD_PKG3 - -config ARCH_MSM7X30 - bool "MSM7x30" - select ARCH_MSM_SCORPION - select CPU_V7 - select GPIO_MSM_V1 - select MACH_MSM7X30_SURF # if ! - select MSM_GPIOMUX - select MSM_PROC_COMM - select MSM_SMD - select CLKSRC_QCOM - select MSM_VIC - -config ARCH_QSD8X50 - bool "QSD8X50" - select ARCH_MSM_SCORPION - select CPU_V7 - select GPIO_MSM_V1 - select MACH_QSD8X50_SURF if !MACH_QSD8X50A_ST1_5 - select MSM_GPIOMUX - select MSM_PROC_COMM - select MSM_SMD - select CLKSRC_QCOM - select MSM_VIC - -endchoice - -config MSM_SOC_REV_A - bool - -config ARCH_MSM_ARM11 - bool - -config ARCH_MSM_SCORPION - bool - -config MSM_VIC - bool - -menu "Qualcomm MSM Board Type" - depends on ARCH_MSM - -config MACH_HALIBUT - depends on ARCH_MSM - depends on ARCH_MSM7X00A - bool "Halibut Board (QCT SURF7201A)" - help - Support for the Qualcomm SURF7201A eval board. - -config MACH_TROUT - depends on ARCH_MSM - depends on ARCH_MSM7X00A - bool "HTC Dream (aka trout)" - help - Support for the HTC Dream, T-Mobile G1, Android ADP1 devices. - -config MACH_MSM7X30_SURF - depends on ARCH_MSM7X30 - bool "MSM7x30 SURF" - help - Support for the Qualcomm MSM7x30 SURF eval board. - -config MACH_QSD8X50_SURF - depends on ARCH_QSD8X50 - bool "QSD8x50 SURF" - help - Support for the Qualcomm QSD8x50 SURF eval board. - -config MACH_QSD8X50A_ST1_5 - depends on ARCH_QSD8X50 - bool "QSD8x50A ST1.5" - select MSM_SOC_REV_A - help - Support for the Qualcomm ST1.5. - -endmenu - -config MSM_SMD_PKG3 - bool - -config MSM_PROC_COMM - bool - -config MSM_SMD - bool - -config MSM_GPIOMUX - bool - help - Support for MSM V1 TLMM GPIOMUX architecture. - -endif diff --git a/arch/arm/mach-msm/Makefile b/arch/arm/mach-msm/Makefile deleted file mode 100644 index 27c078a568df..000000000000 --- a/arch/arm/mach-msm/Makefile +++ /dev/null @@ -1,23 +0,0 @@ -obj-$(CONFIG_MSM_PROC_COMM) += clock.o - -obj-$(CONFIG_MSM_VIC) += irq-vic.o - -obj-$(CONFIG_ARCH_MSM7X00A) += irq.o -obj-$(CONFIG_ARCH_QSD8X50) += sirc.o - -obj-$(CONFIG_MSM_PROC_COMM) += proc_comm.o clock-pcom.o vreg.o - -obj-$(CONFIG_ARCH_MSM7X00A) += dma.o io.o -obj-$(CONFIG_ARCH_MSM7X30) += dma.o io.o -obj-$(CONFIG_ARCH_QSD8X50) += dma.o io.o - -obj-$(CONFIG_MSM_SMD) += smd.o smd_debug.o -obj-$(CONFIG_MSM_SMD) += last_radio_log.o - -obj-$(CONFIG_MACH_TROUT) += board-trout.o board-trout-gpio.o board-trout-mmc.o devices-msm7x00.o -obj-$(CONFIG_MACH_TROUT) += board-trout.o board-trout-gpio.o board-trout-mmc.o board-trout-panel.o devices-msm7x00.o -obj-$(CONFIG_MACH_HALIBUT) += board-halibut.o devices-msm7x00.o -obj-$(CONFIG_ARCH_MSM7X30) += board-msm7x30.o devices-msm7x30.o -obj-$(CONFIG_ARCH_QSD8X50) += board-qsd8x50.o devices-qsd8x50.o -obj-$(CONFIG_MSM_GPIOMUX) += gpiomux.o -obj-$(CONFIG_ARCH_QSD8X50) += gpiomux-8x50.o diff --git a/arch/arm/mach-msm/Makefile.boot b/arch/arm/mach-msm/Makefile.boot deleted file mode 100644 index 9b803a578b4d..000000000000 --- a/arch/arm/mach-msm/Makefile.boot +++ /dev/null @@ -1,3 +0,0 @@ - zreladdr-y += 0x10008000 -params_phys-y := 0x10000100 -initrd_phys-y := 0x10800000 diff --git a/arch/arm/mach-msm/board-halibut.c b/arch/arm/mach-msm/board-halibut.c deleted file mode 100644 index fc832040c6e9..000000000000 --- a/arch/arm/mach-msm/board-halibut.c +++ /dev/null @@ -1,110 +0,0 @@ -/* linux/arch/arm/mach-msm/board-halibut.c - * - * Copyright (C) 2007 Google, Inc. - * Author: Brian Swetland - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include - -#include -#include - -#include -#include - -#include "devices.h" -#include "common.h" - -static struct resource smc91x_resources[] = { - [0] = { - .start = 0x9C004300, - .end = 0x9C004400, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = MSM_GPIO_TO_INT(49), - .end = MSM_GPIO_TO_INT(49), - .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, - }, -}; - -static struct smc91x_platdata smc91x_platdata = { - .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT, -}; - -static struct platform_device smc91x_device = { - .name = "smc91x", - .id = 0, - .num_resources = ARRAY_SIZE(smc91x_resources), - .resource = smc91x_resources, - .dev.platform_data = &smc91x_platdata, -}; - -static struct platform_device *devices[] __initdata = { - &msm_clock_7x01a, - &msm_device_gpio_7201, - &msm_device_uart3, - &msm_device_smd, - &msm_device_nand, - &msm_device_hsusb, - &msm_device_i2c, - &smc91x_device, -}; - -static void __init halibut_init_early(void) -{ - arch_ioremap_caller = __msm_ioremap_caller; -} - -static void __init halibut_init_irq(void) -{ - msm_init_irq(); -} - -static void __init halibut_init(void) -{ - platform_add_devices(devices, ARRAY_SIZE(devices)); -} - -static void __init halibut_map_io(void) -{ - msm_map_common_io(); -} - -static void __init halibut_init_late(void) -{ - smd_debugfs_init(); -} - -MACHINE_START(HALIBUT, "Halibut Board (QCT SURF7200A)") - .atag_offset = 0x100, - .map_io = halibut_map_io, - .init_early = halibut_init_early, - .init_irq = halibut_init_irq, - .init_machine = halibut_init, - .init_late = halibut_init_late, - .init_time = msm7x01_timer_init, -MACHINE_END diff --git a/arch/arm/mach-msm/board-msm7x30.c b/arch/arm/mach-msm/board-msm7x30.c deleted file mode 100644 index 8f5ecdc4f3ce..000000000000 --- a/arch/arm/mach-msm/board-msm7x30.c +++ /dev/null @@ -1,191 +0,0 @@ -/* Copyright (c) 2009-2010, Code Aurora Forum. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA - * 02110-1301, USA. - */ -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include - -#include -#include -#include - -#include -#include "devices.h" -#include "gpiomux.h" -#include "proc_comm.h" -#include "common.h" - -static void __init msm7x30_fixup(struct tag *tag, char **cmdline) -{ - for (; tag->hdr.size; tag = tag_next(tag)) - if (tag->hdr.tag == ATAG_MEM && tag->u.mem.start == 0x200000) { - tag->u.mem.start = 0; - tag->u.mem.size += SZ_2M; - } -} - -static void __init msm7x30_reserve(void) -{ - memblock_remove(0x0, SZ_2M); -} - -static int hsusb_phy_init_seq[] = { - 0x30, 0x32, /* Enable and set Pre-Emphasis Depth to 20% */ - 0x02, 0x36, /* Disable CDR Auto Reset feature */ - -1 -}; - -static int hsusb_link_clk_reset(struct clk *link_clk, bool assert) -{ - int ret; - - if (assert) { - ret = clk_reset(link_clk, CLK_RESET_ASSERT); - if (ret) - pr_err("usb hs_clk assert failed\n"); - } else { - ret = clk_reset(link_clk, CLK_RESET_DEASSERT); - if (ret) - pr_err("usb hs_clk deassert failed\n"); - } - return ret; -} - -static int hsusb_phy_clk_reset(struct clk *phy_clk) -{ - int ret; - - ret = clk_reset(phy_clk, CLK_RESET_ASSERT); - if (ret) { - pr_err("usb phy clk assert failed\n"); - return ret; - } - usleep_range(10000, 12000); - ret = clk_reset(phy_clk, CLK_RESET_DEASSERT); - if (ret) - pr_err("usb phy clk deassert failed\n"); - return ret; -} - -static struct msm_otg_platform_data msm_otg_pdata = { - .phy_init_seq = hsusb_phy_init_seq, - .mode = USB_DR_MODE_PERIPHERAL, - .otg_control = OTG_PHY_CONTROL, - .link_clk_reset = hsusb_link_clk_reset, - .phy_clk_reset = hsusb_phy_clk_reset, -}; - -struct msm_gpiomux_config msm_gpiomux_configs[GPIOMUX_NGPIOS] = { -#ifdef CONFIG_SERIAL_MSM_CONSOLE - [49] = { /* UART2 RFR */ - .suspended = GPIOMUX_DRV_2MA | GPIOMUX_PULL_DOWN | - GPIOMUX_FUNC_2 | GPIOMUX_VALID, - }, - [50] = { /* UART2 CTS */ - .suspended = GPIOMUX_DRV_2MA | GPIOMUX_PULL_DOWN | - GPIOMUX_FUNC_2 | GPIOMUX_VALID, - }, - [51] = { /* UART2 RX */ - .suspended = GPIOMUX_DRV_2MA | GPIOMUX_PULL_DOWN | - GPIOMUX_FUNC_2 | GPIOMUX_VALID, - }, - [52] = { /* UART2 TX */ - .suspended = GPIOMUX_DRV_2MA | GPIOMUX_PULL_DOWN | - GPIOMUX_FUNC_2 | GPIOMUX_VALID, - }, -#endif -}; - -static struct platform_device *devices[] __initdata = { - &msm_clock_7x30, - &msm_device_gpio_7x30, -#if defined(CONFIG_SERIAL_MSM) - &msm_device_uart2, -#endif - &msm_device_smd, - &msm_device_otg, - &msm_device_hsusb, - &msm_device_hsusb_host, -}; - -static void __init msm7x30_init_irq(void) -{ - msm_init_irq(); -} - -static void __init msm7x30_init(void) -{ - msm_device_otg.dev.platform_data = &msm_otg_pdata; - msm_device_hsusb.dev.parent = &msm_device_otg.dev; - msm_device_hsusb_host.dev.parent = &msm_device_otg.dev; - - platform_add_devices(devices, ARRAY_SIZE(devices)); -} - -static void __init msm7x30_map_io(void) -{ - msm_map_msm7x30_io(); -} - -static void __init msm7x30_init_late(void) -{ - smd_debugfs_init(); -} - -MACHINE_START(MSM7X30_SURF, "QCT MSM7X30 SURF") - .atag_offset = 0x100, - .fixup = msm7x30_fixup, - .reserve = msm7x30_reserve, - .map_io = msm7x30_map_io, - .init_irq = msm7x30_init_irq, - .init_machine = msm7x30_init, - .init_late = msm7x30_init_late, - .init_time = msm7x30_timer_init, -MACHINE_END - -MACHINE_START(MSM7X30_FFA, "QCT MSM7X30 FFA") - .atag_offset = 0x100, - .fixup = msm7x30_fixup, - .reserve = msm7x30_reserve, - .map_io = msm7x30_map_io, - .init_irq = msm7x30_init_irq, - .init_machine = msm7x30_init, - .init_late = msm7x30_init_late, - .init_time = msm7x30_timer_init, -MACHINE_END - -MACHINE_START(MSM7X30_FLUID, "QCT MSM7X30 FLUID") - .atag_offset = 0x100, - .fixup = msm7x30_fixup, - .reserve = msm7x30_reserve, - .map_io = msm7x30_map_io, - .init_irq = msm7x30_init_irq, - .init_machine = msm7x30_init, - .init_late = msm7x30_init_late, - .init_time = msm7x30_timer_init, -MACHINE_END diff --git a/arch/arm/mach-msm/board-qsd8x50.c b/arch/arm/mach-msm/board-qsd8x50.c deleted file mode 100644 index 10016a3bc698..000000000000 --- a/arch/arm/mach-msm/board-qsd8x50.c +++ /dev/null @@ -1,254 +0,0 @@ -/* Copyright (c) 2009-2011, Code Aurora Forum. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA - * 02110-1301, USA. - */ -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include - -#include -#include -#include -#include -#include - -#include "devices.h" -#include "common.h" - -static const resource_size_t qsd8x50_surf_smc91x_base __initconst = 0x70000300; -static const unsigned qsd8x50_surf_smc91x_gpio __initconst = 156; - -/* Leave smc91x resources empty here, as we'll fill them in - * at run-time: they vary from board to board, and the true - * configuration won't be known until boot. - */ -static struct resource smc91x_resources[] = { - [0] = { - .flags = IORESOURCE_MEM, - }, - [1] = { - .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, - }, -}; - -static struct smc91x_platdata smc91x_platdata = { - .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT, -}; - -static struct platform_device smc91x_device = { - .name = "smc91x", - .id = 0, - .num_resources = ARRAY_SIZE(smc91x_resources), - .resource = smc91x_resources, - .dev.platform_data = &smc91x_platdata, -}; - -static int __init msm_init_smc91x(void) -{ - if (machine_is_qsd8x50_surf()) { - smc91x_resources[0].start = qsd8x50_surf_smc91x_base; - smc91x_resources[0].end = qsd8x50_surf_smc91x_base + 0xff; - smc91x_resources[1].start = - gpio_to_irq(qsd8x50_surf_smc91x_gpio); - smc91x_resources[1].end = - gpio_to_irq(qsd8x50_surf_smc91x_gpio); - platform_device_register(&smc91x_device); - } - - return 0; -} -module_init(msm_init_smc91x); - -static int hsusb_phy_init_seq[] = { - 0x08, 0x31, /* Increase HS Driver Amplitude */ - 0x20, 0x32, /* Enable and set Pre-Emphasis Depth to 10% */ - -1 -}; - -static int hsusb_link_clk_reset(struct clk *link_clk, bool assert) -{ - int ret; - - if (assert) { - ret = clk_reset(link_clk, CLK_RESET_ASSERT); - if (ret) - pr_err("usb hs_clk assert failed\n"); - } else { - ret = clk_reset(link_clk, CLK_RESET_DEASSERT); - if (ret) - pr_err("usb hs_clk deassert failed\n"); - } - return ret; -} - -static int hsusb_phy_clk_reset(struct clk *phy_clk) -{ - int ret; - - ret = clk_reset(phy_clk, CLK_RESET_ASSERT); - if (ret) { - pr_err("usb phy clk assert failed\n"); - return ret; - } - usleep_range(10000, 12000); - ret = clk_reset(phy_clk, CLK_RESET_DEASSERT); - if (ret) - pr_err("usb phy clk deassert failed\n"); - return ret; -} - -static struct msm_otg_platform_data msm_otg_pdata = { - .phy_init_seq = hsusb_phy_init_seq, - .mode = USB_DR_MODE_PERIPHERAL, - .otg_control = OTG_PHY_CONTROL, - .link_clk_reset = hsusb_link_clk_reset, - .phy_clk_reset = hsusb_phy_clk_reset, -}; - -static struct platform_device *devices[] __initdata = { - &msm_clock_8x50, - &msm_device_gpio_8x50, - &msm_device_uart3, - &msm_device_smd, - &msm_device_otg, - &msm_device_hsusb, - &msm_device_hsusb_host, -}; - -static struct msm_mmc_gpio sdc1_gpio_cfg[] = { - {51, "sdc1_dat_3"}, - {52, "sdc1_dat_2"}, - {53, "sdc1_dat_1"}, - {54, "sdc1_dat_0"}, - {55, "sdc1_cmd"}, - {56, "sdc1_clk"} -}; - -static struct vreg *vreg_mmc; -static unsigned long vreg_sts; - -static uint32_t msm_sdcc_setup_power(struct device *dv, unsigned int vdd) -{ - int rc = 0; - struct platform_device *pdev; - - pdev = container_of(dv, struct platform_device, dev); - - if (vdd == 0) { - if (!vreg_sts) - return 0; - - clear_bit(pdev->id, &vreg_sts); - - if (!vreg_sts) { - rc = vreg_disable(vreg_mmc); - if (rc) - pr_err("vreg_mmc disable failed for slot " - "%d: %d\n", pdev->id, rc); - } - return 0; - } - - if (!vreg_sts) { - rc = vreg_set_level(vreg_mmc, 2900); - if (rc) - pr_err("vreg_mmc set level failed for slot %d: %d\n", - pdev->id, rc); - rc = vreg_enable(vreg_mmc); - if (rc) - pr_err("vreg_mmc enable failed for slot %d: %d\n", - pdev->id, rc); - } - set_bit(pdev->id, &vreg_sts); - return 0; -} - -static struct msm_mmc_gpio_data sdc1_gpio = { - .gpio = sdc1_gpio_cfg, - .size = ARRAY_SIZE(sdc1_gpio_cfg), -}; - -static struct msm_mmc_platform_data qsd8x50_sdc1_data = { - .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29, - .translate_vdd = msm_sdcc_setup_power, - .gpio_data = &sdc1_gpio, -}; - -static void __init qsd8x50_init_mmc(void) -{ - vreg_mmc = vreg_get(NULL, "gp5"); - - if (IS_ERR(vreg_mmc)) { - pr_err("vreg get for vreg_mmc failed (%ld)\n", - PTR_ERR(vreg_mmc)); - return; - } - - msm_add_sdcc(1, &qsd8x50_sdc1_data, 0, 0); -} - -static void __init qsd8x50_map_io(void) -{ - msm_map_qsd8x50_io(); -} - -static void __init qsd8x50_init_irq(void) -{ - msm_init_irq(); - msm_init_sirc(); -} - -static void __init qsd8x50_init(void) -{ - msm_device_otg.dev.platform_data = &msm_otg_pdata; - msm_device_hsusb.dev.parent = &msm_device_otg.dev; - msm_device_hsusb_host.dev.parent = &msm_device_otg.dev; - platform_add_devices(devices, ARRAY_SIZE(devices)); - qsd8x50_init_mmc(); -} - -static void __init qsd8x50_init_late(void) -{ - smd_debugfs_init(); -} - -MACHINE_START(QSD8X50_SURF, "QCT QSD8X50 SURF") - .atag_offset = 0x100, - .map_io = qsd8x50_map_io, - .init_irq = qsd8x50_init_irq, - .init_machine = qsd8x50_init, - .init_late = qsd8x50_init_late, - .init_time = qsd8x50_timer_init, -MACHINE_END - -MACHINE_START(QSD8X50A_ST1_5, "QCT QSD8X50A ST1.5") - .atag_offset = 0x100, - .map_io = qsd8x50_map_io, - .init_irq = qsd8x50_init_irq, - .init_machine = qsd8x50_init, - .init_late = qsd8x50_init_late, - .init_time = qsd8x50_timer_init, -MACHINE_END diff --git a/arch/arm/mach-msm/board-sapphire.c b/arch/arm/mach-msm/board-sapphire.c deleted file mode 100644 index e50967926dcd..000000000000 --- a/arch/arm/mach-msm/board-sapphire.c +++ /dev/null @@ -1,114 +0,0 @@ -/* linux/arch/arm/mach-msm/board-sapphire.c - * Copyright (C) 2007-2009 HTC Corporation. - * Author: Thomas Tsai - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. -*/ -#include -#include -#include -#include -#include -#include -#include -#include - -#include - -#include -#include -#include -#include -#include -#include - -#include -#include -#include - -#include -#include -#include - -#include "gpio_chip.h" -#include "board-sapphire.h" -#include "proc_comm.h" -#include "devices.h" -#include "common.h" - -void msm_init_irq(void); -void msm_init_gpio(void); - -static struct platform_device *devices[] __initdata = { - &msm_device_smd, - &msm_device_dmov, - &msm_device_nand, - &msm_device_uart1, - &msm_device_uart3, -}; - -void msm_timer_init(void); - -static void __init sapphire_init_irq(void) -{ - msm_init_irq(); -} - -static void __init sapphire_init(void) -{ - platform_add_devices(devices, ARRAY_SIZE(devices)); -} - -static struct map_desc sapphire_io_desc[] __initdata = { - { - .virtual = SAPPHIRE_CPLD_BASE, - .pfn = __phys_to_pfn(SAPPHIRE_CPLD_START), - .length = SAPPHIRE_CPLD_SIZE, - .type = MT_DEVICE_NONSHARED - } -}; - -static void __init sapphire_fixup(struct tag *tags, char **cmdline) -{ - int smi_sz = parse_tag_smi((const struct tag *)tags); - - if (smi_sz == 32) { - memblock_add(PHYS_OFFSET, 84*SZ_1M); - } else if (smi_sz == 64) { - memblock_add(PHYS_OFFSET, 101*SZ_1M); - } else { - memblock_add(PHYS_OFFSET, 101*SZ_1M); - /* Give a default value when not get smi size */ - smi_sz = 64; - } -} - -static void __init sapphire_map_io(void) -{ - msm_map_common_io(); - iotable_init(sapphire_io_desc, ARRAY_SIZE(sapphire_io_desc)); - msm_clock_init(); -} - -static void __init sapphire_init_late(void) -{ - smd_debugfs_init(); -} - -MACHINE_START(SAPPHIRE, "sapphire") -/* Maintainer: Brian Swetland */ - .atag_offset = 0x100, - .fixup = sapphire_fixup, - .map_io = sapphire_map_io, - .init_irq = sapphire_init_irq, - .init_machine = sapphire_init, - .init_late = sapphire_init_late, - .init_time = msm_timer_init, -MACHINE_END diff --git a/arch/arm/mach-msm/board-trout-gpio.c b/arch/arm/mach-msm/board-trout-gpio.c deleted file mode 100644 index 722ad63b7edc..000000000000 --- a/arch/arm/mach-msm/board-trout-gpio.c +++ /dev/null @@ -1,233 +0,0 @@ -/* - * linux/arch/arm/mach-msm/gpio.c - * - * Copyright (C) 2005 HP Labs - * Copyright (C) 2008 Google, Inc. - * Copyright (C) 2009 Pavel Machek - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ - -#include -#include -#include -#include -#include -#include - -#include "board-trout.h" - -static uint8_t trout_int_mask[2] = { - [0] = 0xff, /* mask all interrupts */ - [1] = 0xff, -}; -static uint8_t trout_sleep_int_mask[] = { - [0] = 0xff, - [1] = 0xff, -}; - -struct msm_gpio_chip { - struct gpio_chip chip; - void __iomem *reg; /* Base of register bank */ - u8 shadow; -}; - -#define to_msm_gpio_chip(c) container_of(c, struct msm_gpio_chip, chip) - -static int msm_gpiolib_get(struct gpio_chip *chip, unsigned offset) -{ - struct msm_gpio_chip *msm_gpio = to_msm_gpio_chip(chip); - unsigned mask = 1 << offset; - - return !!(readb(msm_gpio->reg) & mask); -} - -static void msm_gpiolib_set(struct gpio_chip *chip, unsigned offset, int val) -{ - struct msm_gpio_chip *msm_gpio = to_msm_gpio_chip(chip); - unsigned mask = 1 << offset; - - if (val) - msm_gpio->shadow |= mask; - else - msm_gpio->shadow &= ~mask; - - writeb(msm_gpio->shadow, msm_gpio->reg); -} - -static int msm_gpiolib_direction_input(struct gpio_chip *chip, - unsigned offset) -{ - msm_gpiolib_set(chip, offset, 0); - return 0; -} - -static int msm_gpiolib_direction_output(struct gpio_chip *chip, - unsigned offset, int val) -{ - msm_gpiolib_set(chip, offset, val); - return 0; -} - -static int trout_gpio_to_irq(struct gpio_chip *chip, unsigned offset) -{ - return TROUT_GPIO_TO_INT(offset + chip->base); -} - -#define TROUT_GPIO_BANK(name, reg_num, base_gpio, shadow_val) \ - { \ - .chip = { \ - .label = name, \ - .direction_input = msm_gpiolib_direction_input,\ - .direction_output = msm_gpiolib_direction_output, \ - .get = msm_gpiolib_get, \ - .set = msm_gpiolib_set, \ - .to_irq = trout_gpio_to_irq, \ - .base = base_gpio, \ - .ngpio = 8, \ - }, \ - .reg = reg_num + TROUT_CPLD_BASE, \ - .shadow = shadow_val, \ - } - -static struct msm_gpio_chip msm_gpio_banks[] = { -#if defined(CONFIG_DEBUG_MSM_UART) && (CONFIG_DEBUG_UART_PHYS == 0xa9a00000) - /* H2W pins <-> UART1 */ - TROUT_GPIO_BANK("MISC2", 0x00, TROUT_GPIO_MISC2_BASE, 0x40), -#else - /* H2W pins <-> UART3, Bluetooth <-> UART1 */ - TROUT_GPIO_BANK("MISC2", 0x00, TROUT_GPIO_MISC2_BASE, 0x80), -#endif - /* I2C pull */ - TROUT_GPIO_BANK("MISC3", 0x02, TROUT_GPIO_MISC3_BASE, 0x04), - TROUT_GPIO_BANK("MISC4", 0x04, TROUT_GPIO_MISC4_BASE, 0), - /* mmdi 32k en */ - TROUT_GPIO_BANK("MISC5", 0x06, TROUT_GPIO_MISC5_BASE, 0x04), - TROUT_GPIO_BANK("INT2", 0x08, TROUT_GPIO_INT2_BASE, 0), - TROUT_GPIO_BANK("MISC1", 0x0a, TROUT_GPIO_MISC1_BASE, 0), - TROUT_GPIO_BANK("VIRTUAL", 0x12, TROUT_GPIO_VIRTUAL_BASE, 0), -}; - -static void trout_gpio_irq_ack(struct irq_data *d) -{ - int bank = TROUT_INT_TO_BANK(d->irq); - uint8_t mask = TROUT_INT_TO_MASK(d->irq); - int reg = TROUT_BANK_TO_STAT_REG(bank); - /*printk(KERN_INFO "trout_gpio_irq_ack irq %d\n", d->irq);*/ - writeb(mask, TROUT_CPLD_BASE + reg); -} - -static void trout_gpio_irq_mask(struct irq_data *d) -{ - unsigned long flags; - uint8_t reg_val; - int bank = TROUT_INT_TO_BANK(d->irq); - uint8_t mask = TROUT_INT_TO_MASK(d->irq); - int reg = TROUT_BANK_TO_MASK_REG(bank); - - local_irq_save(flags); - reg_val = trout_int_mask[bank] |= mask; - /*printk(KERN_INFO "trout_gpio_irq_mask irq %d => %d:%02x\n", - d->irq, bank, reg_val);*/ - writeb(reg_val, TROUT_CPLD_BASE + reg); - local_irq_restore(flags); -} - -static void trout_gpio_irq_unmask(struct irq_data *d) -{ - unsigned long flags; - uint8_t reg_val; - int bank = TROUT_INT_TO_BANK(d->irq); - uint8_t mask = TROUT_INT_TO_MASK(d->irq); - int reg = TROUT_BANK_TO_MASK_REG(bank); - - local_irq_save(flags); - reg_val = trout_int_mask[bank] &= ~mask; - /*printk(KERN_INFO "trout_gpio_irq_unmask irq %d => %d:%02x\n", - d->irq, bank, reg_val);*/ - writeb(reg_val, TROUT_CPLD_BASE + reg); - local_irq_restore(flags); -} - -int trout_gpio_irq_set_wake(struct irq_data *d, unsigned int on) -{ - unsigned long flags; - int bank = TROUT_INT_TO_BANK(d->irq); - uint8_t mask = TROUT_INT_TO_MASK(d->irq); - - local_irq_save(flags); - if(on) - trout_sleep_int_mask[bank] &= ~mask; - else - trout_sleep_int_mask[bank] |= mask; - local_irq_restore(flags); - return 0; -} - -static void trout_gpio_irq_handler(unsigned int irq, struct irq_desc *desc) -{ - int j, m; - unsigned v; - int bank; - int stat_reg; - int int_base = TROUT_INT_START; - uint8_t int_mask; - - for (bank = 0; bank < 2; bank++) { - stat_reg = TROUT_BANK_TO_STAT_REG(bank); - v = readb(TROUT_CPLD_BASE + stat_reg); - int_mask = trout_int_mask[bank]; - if (v & int_mask) { - writeb(v & int_mask, TROUT_CPLD_BASE + stat_reg); - printk(KERN_ERR "trout_gpio_irq_handler: got masked " - "interrupt: %d:%02x\n", bank, v & int_mask); - } - v &= ~int_mask; - while (v) { - m = v & -v; - j = fls(m) - 1; - /*printk(KERN_INFO "msm_gpio_irq_handler %d:%02x %02x b" - "it %d irq %d\n", bank, v, m, j, int_base + j);*/ - v &= ~m; - generic_handle_irq(int_base + j); - } - int_base += TROUT_INT_BANK0_COUNT; - } - desc->irq_data.chip->irq_ack(&desc->irq_data); -} - -static struct irq_chip trout_gpio_irq_chip = { - .name = "troutgpio", - .irq_ack = trout_gpio_irq_ack, - .irq_mask = trout_gpio_irq_mask, - .irq_unmask = trout_gpio_irq_unmask, - .irq_set_wake = trout_gpio_irq_set_wake, -}; - -/* - * Called from the processor-specific init to enable GPIO pin support. - */ -int __init trout_init_gpio(void) -{ - int i; - for(i = TROUT_INT_START; i <= TROUT_INT_END; i++) { - irq_set_chip_and_handler(i, &trout_gpio_irq_chip, - handle_edge_irq); - set_irq_flags(i, IRQF_VALID); - } - - for (i = 0; i < ARRAY_SIZE(msm_gpio_banks); i++) - gpiochip_add(&msm_gpio_banks[i].chip); - - irq_set_irq_type(MSM_GPIO_TO_INT(17), IRQF_TRIGGER_HIGH); - irq_set_chained_handler(MSM_GPIO_TO_INT(17), trout_gpio_irq_handler); - irq_set_irq_wake(MSM_GPIO_TO_INT(17), 1); - - return 0; -} - -postcore_initcall(trout_init_gpio); - diff --git a/arch/arm/mach-msm/board-trout-mmc.c b/arch/arm/mach-msm/board-trout-mmc.c deleted file mode 100644 index 3723e55819d6..000000000000 --- a/arch/arm/mach-msm/board-trout-mmc.c +++ /dev/null @@ -1,185 +0,0 @@ -/* linux/arch/arm/mach-msm/board-trout-mmc.c -** Author: Brian Swetland -*/ -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include - -#include - -#include - -#include "devices.h" - -#include "board-trout.h" - -#include "proc_comm.h" - -#define DEBUG_SDSLOT_VDD 1 - -/* ---- COMMON ---- */ -static void config_gpio_table(uint32_t *table, int len) -{ - int n; - unsigned id; - for(n = 0; n < len; n++) { - id = table[n]; - msm_proc_comm(PCOM_RPC_GPIO_TLMM_CONFIG_EX, &id, 0); - } -} - -/* ---- SDCARD ---- */ - -static uint32_t sdcard_on_gpio_table[] = { - PCOM_GPIO_CFG(62, 2, GPIO_OUTPUT, GPIO_NO_PULL, GPIO_8MA), /* CLK */ - PCOM_GPIO_CFG(63, 2, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_8MA), /* CMD */ - PCOM_GPIO_CFG(64, 2, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_8MA), /* DAT3 */ - PCOM_GPIO_CFG(65, 2, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_8MA), /* DAT2 */ - PCOM_GPIO_CFG(66, 2, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_4MA), /* DAT1 */ - PCOM_GPIO_CFG(67, 2, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_4MA), /* DAT0 */ -}; - -static uint32_t sdcard_off_gpio_table[] = { - PCOM_GPIO_CFG(62, 0, GPIO_OUTPUT, GPIO_NO_PULL, GPIO_4MA), /* CLK */ - PCOM_GPIO_CFG(63, 0, GPIO_OUTPUT, GPIO_NO_PULL, GPIO_4MA), /* CMD */ - PCOM_GPIO_CFG(64, 0, GPIO_OUTPUT, GPIO_NO_PULL, GPIO_4MA), /* DAT3 */ - PCOM_GPIO_CFG(65, 0, GPIO_OUTPUT, GPIO_NO_PULL, GPIO_4MA), /* DAT2 */ - PCOM_GPIO_CFG(66, 0, GPIO_OUTPUT, GPIO_NO_PULL, GPIO_4MA), /* DAT1 */ - PCOM_GPIO_CFG(67, 0, GPIO_OUTPUT, GPIO_NO_PULL, GPIO_4MA), /* DAT0 */ -}; - -static uint opt_disable_sdcard; - -static int __init trout_disablesdcard_setup(char *str) -{ - int cal = simple_strtol(str, NULL, 0); - - opt_disable_sdcard = cal; - return 1; -} - -__setup("board_trout.disable_sdcard=", trout_disablesdcard_setup); - -static struct vreg *vreg_sdslot; /* SD slot power */ - -struct mmc_vdd_xlat { - int mask; - int level; -}; - -static struct mmc_vdd_xlat mmc_vdd_table[] = { - { MMC_VDD_165_195, 1800 }, - { MMC_VDD_20_21, 2050 }, - { MMC_VDD_21_22, 2150 }, - { MMC_VDD_22_23, 2250 }, - { MMC_VDD_23_24, 2350 }, - { MMC_VDD_24_25, 2450 }, - { MMC_VDD_25_26, 2550 }, - { MMC_VDD_26_27, 2650 }, - { MMC_VDD_27_28, 2750 }, - { MMC_VDD_28_29, 2850 }, - { MMC_VDD_29_30, 2950 }, -}; - -static unsigned int sdslot_vdd = 0xffffffff; -static unsigned int sdslot_vreg_enabled; - -static uint32_t trout_sdslot_switchvdd(struct device *dev, unsigned int vdd) -{ - int i, rc; - - BUG_ON(!vreg_sdslot); - - if (vdd == sdslot_vdd) - return 0; - - sdslot_vdd = vdd; - - if (vdd == 0) { -#if DEBUG_SDSLOT_VDD - printk("%s: Disabling SD slot power\n", __func__); -#endif - config_gpio_table(sdcard_off_gpio_table, - ARRAY_SIZE(sdcard_off_gpio_table)); - vreg_disable(vreg_sdslot); - sdslot_vreg_enabled = 0; - return 0; - } - - if (!sdslot_vreg_enabled) { - rc = vreg_enable(vreg_sdslot); - if (rc) { - printk(KERN_ERR "%s: Error enabling vreg (%d)\n", - __func__, rc); - } - config_gpio_table(sdcard_on_gpio_table, - ARRAY_SIZE(sdcard_on_gpio_table)); - sdslot_vreg_enabled = 1; - } - - for (i = 0; i < ARRAY_SIZE(mmc_vdd_table); i++) { - if (mmc_vdd_table[i].mask == (1 << vdd)) { -#if DEBUG_SDSLOT_VDD - printk("%s: Setting level to %u\n", - __func__, mmc_vdd_table[i].level); -#endif - rc = vreg_set_level(vreg_sdslot, - mmc_vdd_table[i].level); - if (rc) { - printk(KERN_ERR - "%s: Error setting vreg level (%d)\n", - __func__, rc); - } - return 0; - } - } - - printk(KERN_ERR "%s: Invalid VDD %d specified\n", __func__, vdd); - return 0; -} - -static unsigned int trout_sdslot_status(struct device *dev) -{ - unsigned int status; - - status = (unsigned int) gpio_get_value(TROUT_GPIO_SDMC_CD_N); - return (!status); -} - -#define TROUT_MMC_VDD MMC_VDD_165_195 | MMC_VDD_20_21 | MMC_VDD_21_22 \ - | MMC_VDD_22_23 | MMC_VDD_23_24 | MMC_VDD_24_25 \ - | MMC_VDD_25_26 | MMC_VDD_26_27 | MMC_VDD_27_28 \ - | MMC_VDD_28_29 | MMC_VDD_29_30 - -static struct msm_mmc_platform_data trout_sdslot_data = { - .ocr_mask = TROUT_MMC_VDD, - .status = trout_sdslot_status, - .translate_vdd = trout_sdslot_switchvdd, -}; - -int __init trout_init_mmc(unsigned int sys_rev) -{ - sdslot_vreg_enabled = 0; - - vreg_sdslot = vreg_get(0, "gp6"); - if (IS_ERR(vreg_sdslot)) - return PTR_ERR(vreg_sdslot); - - irq_set_irq_wake(TROUT_GPIO_TO_INT(TROUT_GPIO_SDMC_CD_N), 1); - - if (!opt_disable_sdcard) - msm_add_sdcc(2, &trout_sdslot_data, - TROUT_GPIO_TO_INT(TROUT_GPIO_SDMC_CD_N), 0); - else - printk(KERN_INFO "trout: SD-Card interface disabled\n"); - return 0; -} - diff --git a/arch/arm/mach-msm/board-trout-panel.c b/arch/arm/mach-msm/board-trout-panel.c deleted file mode 100644 index 77b0a26f897f..000000000000 --- a/arch/arm/mach-msm/board-trout-panel.c +++ /dev/null @@ -1,292 +0,0 @@ -/* linux/arch/arm/mach-msm/board-trout-mddi.c -** Author: Brian Swetland -*/ -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include - -#include -#include - -#include "board-trout.h" -#include "proc_comm.h" -#include "clock-pcom.h" -#include "devices.h" - -#define TROUT_DEFAULT_BACKLIGHT_BRIGHTNESS 255 - -#define MDDI_CLIENT_CORE_BASE 0x108000 -#define LCD_CONTROL_BLOCK_BASE 0x110000 -#define SPI_BLOCK_BASE 0x120000 -#define I2C_BLOCK_BASE 0x130000 -#define PWM_BLOCK_BASE 0x140000 -#define GPIO_BLOCK_BASE 0x150000 -#define SYSTEM_BLOCK1_BASE 0x160000 -#define SYSTEM_BLOCK2_BASE 0x170000 - - -#define DPSUS (MDDI_CLIENT_CORE_BASE|0x24) -#define SYSCLKENA (MDDI_CLIENT_CORE_BASE|0x2C) -#define PWM0OFF (PWM_BLOCK_BASE|0x1C) - -#define V_VDDE2E_VDD2_GPIO 0 -#define MDDI_RST_N 82 - -#define MDDICAP0 (MDDI_CLIENT_CORE_BASE|0x00) -#define MDDICAP1 (MDDI_CLIENT_CORE_BASE|0x04) -#define MDDICAP2 (MDDI_CLIENT_CORE_BASE|0x08) -#define MDDICAP3 (MDDI_CLIENT_CORE_BASE|0x0C) -#define MDCAPCHG (MDDI_CLIENT_CORE_BASE|0x10) -#define MDCRCERC (MDDI_CLIENT_CORE_BASE|0x14) -#define TTBUSSEL (MDDI_CLIENT_CORE_BASE|0x18) -#define DPSET0 (MDDI_CLIENT_CORE_BASE|0x1C) -#define DPSET1 (MDDI_CLIENT_CORE_BASE|0x20) -#define DPSUS (MDDI_CLIENT_CORE_BASE|0x24) -#define DPRUN (MDDI_CLIENT_CORE_BASE|0x28) -#define SYSCKENA (MDDI_CLIENT_CORE_BASE|0x2C) -#define TESTMODE (MDDI_CLIENT_CORE_BASE|0x30) -#define FIFOMONI (MDDI_CLIENT_CORE_BASE|0x34) -#define INTMONI (MDDI_CLIENT_CORE_BASE|0x38) -#define MDIOBIST (MDDI_CLIENT_CORE_BASE|0x3C) -#define MDIOPSET (MDDI_CLIENT_CORE_BASE|0x40) -#define BITMAP0 (MDDI_CLIENT_CORE_BASE|0x44) -#define BITMAP1 (MDDI_CLIENT_CORE_BASE|0x48) -#define BITMAP2 (MDDI_CLIENT_CORE_BASE|0x4C) -#define BITMAP3 (MDDI_CLIENT_CORE_BASE|0x50) -#define BITMAP4 (MDDI_CLIENT_CORE_BASE|0x54) - -#define SRST (LCD_CONTROL_BLOCK_BASE|0x00) -#define PORT_ENB (LCD_CONTROL_BLOCK_BASE|0x04) -#define START (LCD_CONTROL_BLOCK_BASE|0x08) -#define PORT (LCD_CONTROL_BLOCK_BASE|0x0C) -#define CMN (LCD_CONTROL_BLOCK_BASE|0x10) -#define GAMMA (LCD_CONTROL_BLOCK_BASE|0x14) -#define INTFLG (LCD_CONTROL_BLOCK_BASE|0x18) -#define INTMSK (LCD_CONTROL_BLOCK_BASE|0x1C) -#define MPLFBUF (LCD_CONTROL_BLOCK_BASE|0x20) -#define HDE_LEFT (LCD_CONTROL_BLOCK_BASE|0x24) -#define VDE_TOP (LCD_CONTROL_BLOCK_BASE|0x28) -#define PXL (LCD_CONTROL_BLOCK_BASE|0x30) -#define HCYCLE (LCD_CONTROL_BLOCK_BASE|0x34) -#define HSW (LCD_CONTROL_BLOCK_BASE|0x38) -#define HDE_START (LCD_CONTROL_BLOCK_BASE|0x3C) -#define HDE_SIZE (LCD_CONTROL_BLOCK_BASE|0x40) -#define VCYCLE (LCD_CONTROL_BLOCK_BASE|0x44) -#define VSW (LCD_CONTROL_BLOCK_BASE|0x48) -#define VDE_START (LCD_CONTROL_BLOCK_BASE|0x4C) -#define VDE_SIZE (LCD_CONTROL_BLOCK_BASE|0x50) -#define WAKEUP (LCD_CONTROL_BLOCK_BASE|0x54) -#define WSYN_DLY (LCD_CONTROL_BLOCK_BASE|0x58) -#define REGENB (LCD_CONTROL_BLOCK_BASE|0x5C) -#define VSYNIF (LCD_CONTROL_BLOCK_BASE|0x60) -#define WRSTB (LCD_CONTROL_BLOCK_BASE|0x64) -#define RDSTB (LCD_CONTROL_BLOCK_BASE|0x68) -#define ASY_DATA (LCD_CONTROL_BLOCK_BASE|0x6C) -#define ASY_DATB (LCD_CONTROL_BLOCK_BASE|0x70) -#define ASY_DATC (LCD_CONTROL_BLOCK_BASE|0x74) -#define ASY_DATD (LCD_CONTROL_BLOCK_BASE|0x78) -#define ASY_DATE (LCD_CONTROL_BLOCK_BASE|0x7C) -#define ASY_DATF (LCD_CONTROL_BLOCK_BASE|0x80) -#define ASY_DATG (LCD_CONTROL_BLOCK_BASE|0x84) -#define ASY_DATH (LCD_CONTROL_BLOCK_BASE|0x88) -#define ASY_CMDSET (LCD_CONTROL_BLOCK_BASE|0x8C) - -#define SSICTL (SPI_BLOCK_BASE|0x00) -#define SSITIME (SPI_BLOCK_BASE|0x04) -#define SSITX (SPI_BLOCK_BASE|0x08) -#define SSIRX (SPI_BLOCK_BASE|0x0C) -#define SSIINTC (SPI_BLOCK_BASE|0x10) -#define SSIINTS (SPI_BLOCK_BASE|0x14) -#define SSIDBG1 (SPI_BLOCK_BASE|0x18) -#define SSIDBG2 (SPI_BLOCK_BASE|0x1C) -#define SSIID (SPI_BLOCK_BASE|0x20) - -#define WKREQ (SYSTEM_BLOCK1_BASE|0x00) -#define CLKENB (SYSTEM_BLOCK1_BASE|0x04) -#define DRAMPWR (SYSTEM_BLOCK1_BASE|0x08) -#define INTMASK (SYSTEM_BLOCK1_BASE|0x0C) -#define GPIOSEL (SYSTEM_BLOCK2_BASE|0x00) - -#define GPIODATA (GPIO_BLOCK_BASE|0x00) -#define GPIODIR (GPIO_BLOCK_BASE|0x04) -#define GPIOIS (GPIO_BLOCK_BASE|0x08) -#define GPIOIBE (GPIO_BLOCK_BASE|0x0C) -#define GPIOIEV (GPIO_BLOCK_BASE|0x10) -#define GPIOIE (GPIO_BLOCK_BASE|0x14) -#define GPIORIS (GPIO_BLOCK_BASE|0x18) -#define GPIOMIS (GPIO_BLOCK_BASE|0x1C) -#define GPIOIC (GPIO_BLOCK_BASE|0x20) -#define GPIOOMS (GPIO_BLOCK_BASE|0x24) -#define GPIOPC (GPIO_BLOCK_BASE|0x28) -#define GPIOID (GPIO_BLOCK_BASE|0x30) - -#define SPI_WRITE(reg, val) \ - { SSITX, 0x00010000 | (((reg) & 0xff) << 8) | ((val) & 0xff) }, \ - { 0, 5 }, - -#define SPI_WRITE1(reg) \ - { SSITX, (reg) & 0xff }, \ - { 0, 5 }, - -struct mddi_table { - uint32_t reg; - uint32_t value; -}; -static struct mddi_table mddi_toshiba_init_table[] = { - { DPSET0, 0x09e90046 }, - { DPSET1, 0x00000118 }, - { DPSUS, 0x00000000 }, - { DPRUN, 0x00000001 }, - { 1, 14 }, /* msleep 14 */ - { SYSCKENA, 0x00000001 }, - { CLKENB, 0x0000A1EF }, /* # SYS.CLKENB # Enable clocks for each module (without DCLK , i2cCLK) */ - - { GPIODATA, 0x02000200 }, /* # GPI .GPIODATA # GPIO2(RESET_LCD_N) set to 0 , GPIO3(eDRAM_Power) set to 0 */ - { GPIODIR, 0x000030D }, /* 24D # GPI .GPIODIR # Select direction of GPIO port (0,2,3,6,9 output) */ - { GPIOSEL, 0/*0x00000173*/}, /* # SYS.GPIOSEL # GPIO port multiplexing control */ - { GPIOPC, 0x03C300C0 }, /* # GPI .GPIOPC # GPIO2,3 PD cut */ - { WKREQ, 0x00000000 }, /* # SYS.WKREQ # Wake-up request event is VSYNC alignment */ - - { GPIOIBE, 0x000003FF }, - { GPIOIS, 0x00000000 }, - { GPIOIC, 0x000003FF }, - { GPIOIE, 0x00000000 }, - - { GPIODATA, 0x00040004 }, /* # GPI .GPIODATA # eDRAM VD supply */ - { 1, 1 }, /* msleep 1 */ - { GPIODATA, 0x02040004 }, /* # GPI .GPIODATA # eDRAM VD supply */ - { DRAMPWR, 0x00000001 }, /* eDRAM power */ -}; - -#define GPIOSEL_VWAKEINT (1U << 0) -#define INTMASK_VWAKEOUT (1U << 0) - - -static int trout_new_backlight = 1; -static struct vreg *vreg_mddi_1v5; -static struct vreg *vreg_lcm_2v85; - -static void trout_process_mddi_table(struct msm_mddi_client_data *client_data, - struct mddi_table *table, size_t count) -{ - int i; - for (i = 0; i < count; i++) { - uint32_t reg = table[i].reg; - uint32_t value = table[i].value; - - if (reg == 0) - udelay(value); - else if (reg == 1) - msleep(value); - else - client_data->remote_write(client_data, value, reg); - } -} - -static int trout_mddi_toshiba_client_init( - struct msm_mddi_bridge_platform_data *bridge_data, - struct msm_mddi_client_data *client_data) -{ - int panel_id; - - client_data->auto_hibernate(client_data, 0); - trout_process_mddi_table(client_data, mddi_toshiba_init_table, - ARRAY_SIZE(mddi_toshiba_init_table)); - client_data->auto_hibernate(client_data, 1); - panel_id = (client_data->remote_read(client_data, GPIODATA) >> 4) & 3; - if (panel_id > 1) { - printk(KERN_WARNING "unknown panel id at mddi_enable\n"); - return -1; - } - return 0; -} - -static int trout_mddi_toshiba_client_uninit( - struct msm_mddi_bridge_platform_data *bridge_data, - struct msm_mddi_client_data *client_data) -{ - return 0; -} - -static struct resource resources_msm_fb[] = { - { - .start = MSM_FB_BASE, - .end = MSM_FB_BASE + MSM_FB_SIZE, - .flags = IORESOURCE_MEM, - }, -}; - -struct msm_mddi_bridge_platform_data toshiba_client_data = { - .init = trout_mddi_toshiba_client_init, - .uninit = trout_mddi_toshiba_client_uninit, - .fb_data = { - .xres = 320, - .yres = 480, - .width = 45, - .height = 67, - .output_format = 0, - }, -}; - -static struct msm_mddi_platform_data mddi_pdata = { - .clk_rate = 122880000, - .fb_resource = resources_msm_fb, - .num_clients = 1, - .client_platform_data = { - { - .product_id = (0xd263 << 16 | 0), - .name = "mddi_c_d263_0000", - .id = 0, - .client_data = &toshiba_client_data, - .clk_rate = 0, - }, - }, -}; - -int __init trout_init_panel(void) -{ - int rc; - - if (!machine_is_trout()) - return 0; - vreg_mddi_1v5 = vreg_get(0, "gp2"); - if (IS_ERR(vreg_mddi_1v5)) - return PTR_ERR(vreg_mddi_1v5); - vreg_lcm_2v85 = vreg_get(0, "gp4"); - if (IS_ERR(vreg_lcm_2v85)) - return PTR_ERR(vreg_lcm_2v85); - - trout_new_backlight = system_rev >= 5; - if (trout_new_backlight) { - uint32_t config = PCOM_GPIO_CFG(27, 0, GPIO_OUTPUT, - GPIO_NO_PULL, GPIO_8MA); - msm_proc_comm(PCOM_RPC_GPIO_TLMM_CONFIG_EX, &config, 0); - } else { - uint32_t config = PCOM_GPIO_CFG(27, 1, GPIO_OUTPUT, - GPIO_NO_PULL, GPIO_8MA); - uint32_t id = P_GP_CLK; - uint32_t rate = 19200000; - - msm_proc_comm(PCOM_RPC_GPIO_TLMM_CONFIG_EX, &config, 0); - - msm_proc_comm(PCOM_CLKCTL_RPC_SET_RATE, &id, &rate); - if (id < 0) - pr_err("trout_init_panel: set clock rate failed\n"); - } - - rc = platform_device_register(&msm_device_mdp); - if (rc) - return rc; - msm_device_mddi0.dev.platform_data = &mddi_pdata; - return platform_device_register(&msm_device_mddi0); -} - -device_initcall(trout_init_panel); diff --git a/arch/arm/mach-msm/board-trout.c b/arch/arm/mach-msm/board-trout.c deleted file mode 100644 index ba3edd3a46cb..000000000000 --- a/arch/arm/mach-msm/board-trout.c +++ /dev/null @@ -1,111 +0,0 @@ -/* linux/arch/arm/mach-msm/board-trout.c - * - * Copyright (C) 2009 Google, Inc. - * Author: Brian Swetland - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ -#define pr_fmt(fmt) "%s: " fmt, __func__ - -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include - -#include -#include - -#include "devices.h" -#include "board-trout.h" -#include "common.h" - -extern int trout_init_mmc(unsigned int); - -static struct platform_device *devices[] __initdata = { - &msm_clock_7x01a, - &msm_device_gpio_7201, - &msm_device_uart3, - &msm_device_smd, - &msm_device_nand, - &msm_device_hsusb, - &msm_device_i2c, -}; - -static void __init trout_init_early(void) -{ - arch_ioremap_caller = __msm_ioremap_caller; -} - -static void __init trout_init_irq(void) -{ - msm_init_irq(); -} - -static void __init trout_fixup(struct tag *tags, char **cmdline) -{ - memblock_add(PHYS_OFFSET, 101*SZ_1M); -} - -static void __init trout_init(void) -{ - int rc; - - platform_add_devices(devices, ARRAY_SIZE(devices)); - - if (IS_ENABLED(CONFIG_MMC)) { - rc = trout_init_mmc(system_rev); - if (rc) - pr_crit("MMC init failure (%d)\n", rc); - } -} - -static struct map_desc trout_io_desc[] __initdata = { - { - .virtual = (unsigned long)TROUT_CPLD_BASE, - .pfn = __phys_to_pfn(TROUT_CPLD_START), - .length = TROUT_CPLD_SIZE, - .type = MT_DEVICE_NONSHARED - } -}; - -static void __init trout_map_io(void) -{ - msm_map_common_io(); - iotable_init(trout_io_desc, ARRAY_SIZE(trout_io_desc)); - -#if defined(CONFIG_DEBUG_MSM_UART) && (CONFIG_DEBUG_UART_PHYS == 0xa9c00000) - /* route UART3 to the "H2W" extended usb connector */ - writeb(0x80, TROUT_CPLD_BASE + 0x00); -#endif -} - -static void __init trout_init_late(void) -{ - smd_debugfs_init(); -} - -MACHINE_START(TROUT, "HTC Dream") - .atag_offset = 0x100, - .fixup = trout_fixup, - .map_io = trout_map_io, - .init_early = trout_init_early, - .init_irq = trout_init_irq, - .init_machine = trout_init, - .init_late = trout_init_late, - .init_time = msm7x01_timer_init, -MACHINE_END diff --git a/arch/arm/mach-msm/board-trout.h b/arch/arm/mach-msm/board-trout.h deleted file mode 100644 index adb757abbb92..000000000000 --- a/arch/arm/mach-msm/board-trout.h +++ /dev/null @@ -1,162 +0,0 @@ -/* linux/arch/arm/mach-msm/board-trout.h -** Author: Brian Swetland -*/ -#ifndef __ARCH_ARM_MACH_MSM_BOARD_TROUT_H -#define __ARCH_ARM_MACH_MSM_BOARD_TROUT_H - -#include "common.h" - -#define MSM_SMI_BASE 0x00000000 -#define MSM_SMI_SIZE 0x00800000 - -#define MSM_EBI_BASE 0x10000000 -#define MSM_EBI_SIZE 0x06e00000 - -#define MSM_PMEM_GPU0_BASE 0x00000000 -#define MSM_PMEM_GPU0_SIZE 0x00700000 - -#define MSM_PMEM_MDP_BASE 0x02000000 -#define MSM_PMEM_MDP_SIZE 0x00800000 - -#define MSM_PMEM_ADSP_BASE 0x02800000 -#define MSM_PMEM_ADSP_SIZE 0x00800000 - -#define MSM_PMEM_CAMERA_BASE 0x03000000 -#define MSM_PMEM_CAMERA_SIZE 0x00800000 - -#define MSM_FB_BASE 0x03800000 -#define MSM_FB_SIZE 0x00100000 - -#define MSM_LINUX_BASE MSM_EBI_BASE -#define MSM_LINUX_SIZE 0x06500000 - -#define MSM_PMEM_GPU1_SIZE 0x800000 -#define MSM_PMEM_GPU1_BASE (MSM_RAM_CONSOLE_BASE - MSM_PMEM_GPU1_SIZE) - -#define MSM_RAM_CONSOLE_BASE (MSM_EBI_BASE + 0x6d00000) -#define MSM_RAM_CONSOLE_SIZE (128 * SZ_1K) - -#if (MSM_FB_BASE + MSM_FB_SIZE) >= (MSM_PMEM_GPU1_BASE) -#error invalid memory map -#endif - -#define DECLARE_MSM_IOMAP -#include - -#define TROUT_4_BALL_UP_0 1 -#define TROUT_4_BALL_LEFT_0 18 -#define TROUT_4_BALL_DOWN_0 57 -#define TROUT_4_BALL_RIGHT_0 91 - -#define TROUT_5_BALL_UP_0 94 -#define TROUT_5_BALL_LEFT_0 18 -#define TROUT_5_BALL_DOWN_0 90 -#define TROUT_5_BALL_RIGHT_0 19 - -#define TROUT_POWER_KEY 20 - -#define TROUT_4_TP_LS_EN 19 -#define TROUT_5_TP_LS_EN 1 - -#define TROUT_CPLD_BASE IOMEM(0xE8100000) -#define TROUT_CPLD_START 0x98000000 -#define TROUT_CPLD_SIZE SZ_4K - -#define TROUT_GPIO_CABLE_IN1 (83) -#define TROUT_GPIO_CABLE_IN2 (49) - -#define TROUT_GPIO_START (128) - -#define TROUT_GPIO_INT_MASK0_REG (0x0c) -#define TROUT_GPIO_INT_STAT0_REG (0x0e) -#define TROUT_GPIO_INT_MASK1_REG (0x14) -#define TROUT_GPIO_INT_STAT1_REG (0x10) - -#define TROUT_GPIO_HAPTIC_PWM (28) -#define TROUT_GPIO_PS_HOLD (25) - -#define TROUT_GPIO_MISC2_BASE (TROUT_GPIO_START + 0x00) -#define TROUT_GPIO_MISC3_BASE (TROUT_GPIO_START + 0x08) -#define TROUT_GPIO_MISC4_BASE (TROUT_GPIO_START + 0x10) -#define TROUT_GPIO_MISC5_BASE (TROUT_GPIO_START + 0x18) -#define TROUT_GPIO_INT2_BASE (TROUT_GPIO_START + 0x20) -#define TROUT_GPIO_MISC1_BASE (TROUT_GPIO_START + 0x28) -#define TROUT_GPIO_VIRTUAL_BASE (TROUT_GPIO_START + 0x30) -#define TROUT_GPIO_INT5_BASE (TROUT_GPIO_START + 0x48) - -#define TROUT_GPIO_CHARGER_EN (TROUT_GPIO_MISC2_BASE + 0) -#define TROUT_GPIO_ISET (TROUT_GPIO_MISC2_BASE + 1) -#define TROUT_GPIO_H2W_DAT_DIR (TROUT_GPIO_MISC2_BASE + 2) -#define TROUT_GPIO_H2W_CLK_DIR (TROUT_GPIO_MISC2_BASE + 3) -#define TROUT_GPIO_H2W_DAT_GPO (TROUT_GPIO_MISC2_BASE + 4) -#define TROUT_GPIO_H2W_CLK_GPO (TROUT_GPIO_MISC2_BASE + 5) -#define TROUT_GPIO_H2W_SEL0 (TROUT_GPIO_MISC2_BASE + 6) -#define TROUT_GPIO_H2W_SEL1 (TROUT_GPIO_MISC2_BASE + 7) - -#define TROUT_GPIO_SPOTLIGHT_EN (TROUT_GPIO_MISC3_BASE + 0) -#define TROUT_GPIO_FLASH_EN (TROUT_GPIO_MISC3_BASE + 1) -#define TROUT_GPIO_I2C_PULL (TROUT_GPIO_MISC3_BASE + 2) -#define TROUT_GPIO_TP_I2C_PULL (TROUT_GPIO_MISC3_BASE + 3) -#define TROUT_GPIO_TP_EN (TROUT_GPIO_MISC3_BASE + 4) -#define TROUT_GPIO_JOG_EN (TROUT_GPIO_MISC3_BASE + 5) -#define TROUT_GPIO_UI_LED_EN (TROUT_GPIO_MISC3_BASE + 6) -#define TROUT_GPIO_QTKEY_LED_EN (TROUT_GPIO_MISC3_BASE + 7) - -#define TROUT_GPIO_VCM_PWDN (TROUT_GPIO_MISC4_BASE + 0) -#define TROUT_GPIO_USB_H2W_SW (TROUT_GPIO_MISC4_BASE + 1) -#define TROUT_GPIO_COMPASS_RST_N (TROUT_GPIO_MISC4_BASE + 2) -#define TROUT_GPIO_HAPTIC_EN_UP (TROUT_GPIO_MISC4_BASE + 3) -#define TROUT_GPIO_HAPTIC_EN_MAIN (TROUT_GPIO_MISC4_BASE + 4) -#define TROUT_GPIO_USB_PHY_RST_N (TROUT_GPIO_MISC4_BASE + 5) -#define TROUT_GPIO_WIFI_PA_RESETX (TROUT_GPIO_MISC4_BASE + 6) -#define TROUT_GPIO_WIFI_EN (TROUT_GPIO_MISC4_BASE + 7) - -#define TROUT_GPIO_BT_32K_EN (TROUT_GPIO_MISC5_BASE + 0) -#define TROUT_GPIO_MAC_32K_EN (TROUT_GPIO_MISC5_BASE + 1) -#define TROUT_GPIO_MDDI_32K_EN (TROUT_GPIO_MISC5_BASE + 2) -#define TROUT_GPIO_COMPASS_32K_EN (TROUT_GPIO_MISC5_BASE + 3) - -#define TROUT_GPIO_NAVI_ACT_N (TROUT_GPIO_INT2_BASE + 0) -#define TROUT_GPIO_COMPASS_IRQ (TROUT_GPIO_INT2_BASE + 1) -#define TROUT_GPIO_SLIDING_DET (TROUT_GPIO_INT2_BASE + 2) -#define TROUT_GPIO_AUD_HSMIC_DET_N (TROUT_GPIO_INT2_BASE + 3) -#define TROUT_GPIO_SD_DOOR_N (TROUT_GPIO_INT2_BASE + 4) -#define TROUT_GPIO_CAM_BTN_STEP1_N (TROUT_GPIO_INT2_BASE + 5) -#define TROUT_GPIO_CAM_BTN_STEP2_N (TROUT_GPIO_INT2_BASE + 6) -#define TROUT_GPIO_TP_ATT_N (TROUT_GPIO_INT2_BASE + 7) -#define TROUT_GPIO_BANK0_FIRST_INT_SOURCE (TROUT_GPIO_NAVI_ACT_N) -#define TROUT_GPIO_BANK0_LAST_INT_SOURCE (TROUT_GPIO_TP_ATT_N) - -#define TROUT_GPIO_H2W_DAT_GPI (TROUT_GPIO_MISC1_BASE + 0) -#define TROUT_GPIO_H2W_CLK_GPI (TROUT_GPIO_MISC1_BASE + 1) -#define TROUT_GPIO_CPLD128_VER_0 (TROUT_GPIO_MISC1_BASE + 4) -#define TROUT_GPIO_CPLD128_VER_1 (TROUT_GPIO_MISC1_BASE + 5) -#define TROUT_GPIO_CPLD128_VER_2 (TROUT_GPIO_MISC1_BASE + 6) -#define TROUT_GPIO_CPLD128_VER_3 (TROUT_GPIO_MISC1_BASE + 7) - -#define TROUT_GPIO_SDMC_CD_N (TROUT_GPIO_VIRTUAL_BASE + 0) -#define TROUT_GPIO_END (TROUT_GPIO_SDMC_CD_N) -#define TROUT_GPIO_BANK1_FIRST_INT_SOURCE (TROUT_GPIO_SDMC_CD_N) -#define TROUT_GPIO_BANK1_LAST_INT_SOURCE (TROUT_GPIO_SDMC_CD_N) - -#define TROUT_GPIO_VIRTUAL_TO_REAL_OFFSET \ - (TROUT_GPIO_INT5_BASE - TROUT_GPIO_VIRTUAL_BASE) - -#define TROUT_INT_START (NR_MSM_IRQS + NR_GPIO_IRQS) -#define TROUT_INT_BANK0_COUNT (8) -#define TROUT_INT_BANK1_START (TROUT_INT_START + TROUT_INT_BANK0_COUNT) -#define TROUT_INT_BANK1_COUNT (1) -#define TROUT_INT_END (TROUT_INT_START + TROUT_INT_BANK0_COUNT + \ - TROUT_INT_BANK1_COUNT - 1) -#define TROUT_GPIO_TO_INT(n) (((n) <= TROUT_GPIO_BANK0_LAST_INT_SOURCE) ? \ - (TROUT_INT_START - TROUT_GPIO_BANK0_FIRST_INT_SOURCE + (n)) : \ - (TROUT_INT_BANK1_START - TROUT_GPIO_BANK1_FIRST_INT_SOURCE + (n))) - -#define TROUT_INT_TO_BANK(n) ((n - TROUT_INT_START) / TROUT_INT_BANK0_COUNT) -#define TROUT_INT_TO_MASK(n) (1U << ((n - TROUT_INT_START) & 7)) -#define TROUT_BANK_TO_MASK_REG(bank) \ - (bank ? TROUT_GPIO_INT_MASK1_REG : TROUT_GPIO_INT_MASK0_REG) -#define TROUT_BANK_TO_STAT_REG(bank) \ - (bank ? TROUT_GPIO_INT_STAT1_REG : TROUT_GPIO_INT_STAT0_REG) - -#endif /* GUARD */ diff --git a/arch/arm/mach-msm/clock-pcom.c b/arch/arm/mach-msm/clock-pcom.c deleted file mode 100644 index f5b69d736ee5..000000000000 --- a/arch/arm/mach-msm/clock-pcom.c +++ /dev/null @@ -1,176 +0,0 @@ -/* - * Copyright (C) 2007 Google, Inc. - * Copyright (c) 2007-2012, The Linux Foundation. All rights reserved. - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#include -#include -#include -#include -#include -#include - -#include - -#include "proc_comm.h" -#include "clock.h" -#include "clock-pcom.h" - -struct clk_pcom { - unsigned id; - unsigned long flags; - struct msm_clk msm_clk; -}; - -static inline struct clk_pcom *to_clk_pcom(struct clk_hw *hw) -{ - return container_of(to_msm_clk(hw), struct clk_pcom, msm_clk); -} - -static int pc_clk_enable(struct clk_hw *hw) -{ - unsigned id = to_clk_pcom(hw)->id; - int rc = msm_proc_comm(PCOM_CLKCTL_RPC_ENABLE, &id, NULL); - if (rc < 0) - return rc; - else - return (int)id < 0 ? -EINVAL : 0; -} - -static void pc_clk_disable(struct clk_hw *hw) -{ - unsigned id = to_clk_pcom(hw)->id; - msm_proc_comm(PCOM_CLKCTL_RPC_DISABLE, &id, NULL); -} - -static int pc_clk_reset(struct clk_hw *hw, enum clk_reset_action action) -{ - int rc; - unsigned id = to_clk_pcom(hw)->id; - - if (action == CLK_RESET_ASSERT) - rc = msm_proc_comm(PCOM_CLKCTL_RPC_RESET_ASSERT, &id, NULL); - else - rc = msm_proc_comm(PCOM_CLKCTL_RPC_RESET_DEASSERT, &id, NULL); - - if (rc < 0) - return rc; - else - return (int)id < 0 ? -EINVAL : 0; -} - -static int pc_clk_set_rate(struct clk_hw *hw, unsigned long new_rate, - unsigned long p_rate) -{ - struct clk_pcom *p = to_clk_pcom(hw); - unsigned id = p->id, rate = new_rate; - int rc; - - /* - * The rate _might_ be rounded off to the nearest KHz value by the - * remote function. So a return value of 0 doesn't necessarily mean - * that the exact rate was set successfully. - */ - if (p->flags & CLKFLAG_MIN) - rc = msm_proc_comm(PCOM_CLKCTL_RPC_MIN_RATE, &id, &rate); - else - rc = msm_proc_comm(PCOM_CLKCTL_RPC_SET_RATE, &id, &rate); - if (rc < 0) - return rc; - else - return (int)id < 0 ? -EINVAL : 0; -} - -static unsigned long pc_clk_recalc_rate(struct clk_hw *hw, unsigned long p_rate) -{ - unsigned id = to_clk_pcom(hw)->id; - if (msm_proc_comm(PCOM_CLKCTL_RPC_RATE, &id, NULL)) - return 0; - else - return id; -} - -static int pc_clk_is_enabled(struct clk_hw *hw) -{ - unsigned id = to_clk_pcom(hw)->id; - if (msm_proc_comm(PCOM_CLKCTL_RPC_ENABLED, &id, NULL)) - return 0; - else - return id; -} - -static long pc_clk_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *p_rate) -{ - /* Not really supported; pc_clk_set_rate() does rounding on it's own. */ - return rate; -} - -static struct clk_ops clk_ops_pcom = { - .enable = pc_clk_enable, - .disable = pc_clk_disable, - .set_rate = pc_clk_set_rate, - .recalc_rate = pc_clk_recalc_rate, - .is_enabled = pc_clk_is_enabled, - .round_rate = pc_clk_round_rate, -}; - -static int msm_clock_pcom_probe(struct platform_device *pdev) -{ - const struct pcom_clk_pdata *pdata = pdev->dev.platform_data; - int i, ret; - - for (i = 0; i < pdata->num_lookups; i++) { - const struct clk_pcom_desc *desc = &pdata->lookup[i]; - struct clk *c; - struct clk_pcom *p; - struct clk_hw *hw; - struct clk_init_data init; - - p = devm_kzalloc(&pdev->dev, sizeof(*p), GFP_KERNEL); - if (!p) - return -ENOMEM; - - p->id = desc->id; - p->flags = desc->flags; - p->msm_clk.reset = pc_clk_reset; - - hw = &p->msm_clk.hw; - hw->init = &init; - - init.name = desc->name; - init.ops = &clk_ops_pcom; - init.num_parents = 0; - init.flags = CLK_IS_ROOT; - - if (!(p->flags & CLKFLAG_AUTO_OFF)) - init.flags |= CLK_IGNORE_UNUSED; - - c = devm_clk_register(&pdev->dev, hw); - ret = clk_register_clkdev(c, desc->con, desc->dev); - if (ret) - return ret; - } - - return 0; -} - -static struct platform_driver msm_clock_pcom_driver = { - .probe = msm_clock_pcom_probe, - .driver = { - .name = "msm-clock-pcom", - }, -}; -module_platform_driver(msm_clock_pcom_driver); - -MODULE_LICENSE("GPL v2"); diff --git a/arch/arm/mach-msm/clock-pcom.h b/arch/arm/mach-msm/clock-pcom.h deleted file mode 100644 index 5bb164fd46a8..000000000000 --- a/arch/arm/mach-msm/clock-pcom.h +++ /dev/null @@ -1,145 +0,0 @@ -/* - * Copyright (c) 2009-2012, The Linux Foundation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef __ARCH_ARM_MACH_MSM_CLOCK_PCOM_H -#define __ARCH_ARM_MACH_MSM_CLOCK_PCOM_H - -/* clock IDs used by the modem processor */ - -#define P_ACPU_CLK 0 /* Applications processor clock */ -#define P_ADM_CLK 1 /* Applications data mover clock */ -#define P_ADSP_CLK 2 /* ADSP clock */ -#define P_EBI1_CLK 3 /* External bus interface 1 clock */ -#define P_EBI2_CLK 4 /* External bus interface 2 clock */ -#define P_ECODEC_CLK 5 /* External CODEC clock */ -#define P_EMDH_CLK 6 /* External MDDI host clock */ -#define P_GP_CLK 7 /* General purpose clock */ -#define P_GRP_3D_CLK 8 /* Graphics clock */ -#define P_I2C_CLK 9 /* I2C clock */ -#define P_ICODEC_RX_CLK 10 /* Internal CODEX RX clock */ -#define P_ICODEC_TX_CLK 11 /* Internal CODEX TX clock */ -#define P_IMEM_CLK 12 /* Internal graphics memory clock */ -#define P_MDC_CLK 13 /* MDDI client clock */ -#define P_MDP_CLK 14 /* Mobile display processor clock */ -#define P_PBUS_CLK 15 /* Peripheral bus clock */ -#define P_PCM_CLK 16 /* PCM clock */ -#define P_PMDH_CLK 17 /* Primary MDDI host clock */ -#define P_SDAC_CLK 18 /* Stereo DAC clock */ -#define P_SDC1_CLK 19 /* Secure Digital Card clocks */ -#define P_SDC1_P_CLK 20 -#define P_SDC2_CLK 21 -#define P_SDC2_P_CLK 22 -#define P_SDC3_CLK 23 -#define P_SDC3_P_CLK 24 -#define P_SDC4_CLK 25 -#define P_SDC4_P_CLK 26 -#define P_TSIF_CLK 27 /* Transport Stream Interface clocks */ -#define P_TSIF_REF_CLK 28 -#define P_TV_DAC_CLK 29 /* TV clocks */ -#define P_TV_ENC_CLK 30 -#define P_UART1_CLK 31 /* UART clocks */ -#define P_UART2_CLK 32 -#define P_UART3_CLK 33 -#define P_UART1DM_CLK 34 -#define P_UART2DM_CLK 35 -#define P_USB_HS_CLK 36 /* High speed USB core clock */ -#define P_USB_HS_P_CLK 37 /* High speed USB pbus clock */ -#define P_USB_OTG_CLK 38 /* Full speed USB clock */ -#define P_VDC_CLK 39 /* Video controller clock */ -#define P_VFE_MDC_CLK 40 /* Camera / Video Front End clock */ -#define P_VFE_CLK 41 /* VFE MDDI client clock */ -#define P_MDP_LCDC_PCLK_CLK 42 -#define P_MDP_LCDC_PAD_PCLK_CLK 43 -#define P_MDP_VSYNC_CLK 44 -#define P_SPI_CLK 45 -#define P_VFE_AXI_CLK 46 -#define P_USB_HS2_CLK 47 /* High speed USB 2 core clock */ -#define P_USB_HS2_P_CLK 48 /* High speed USB 2 pbus clock */ -#define P_USB_HS3_CLK 49 /* High speed USB 3 core clock */ -#define P_USB_HS3_P_CLK 50 /* High speed USB 3 pbus clock */ -#define P_GRP_3D_P_CLK 51 /* Graphics pbus clock */ -#define P_USB_PHY_CLK 52 /* USB PHY clock */ -#define P_USB_HS_CORE_CLK 53 /* High speed USB 1 core clock */ -#define P_USB_HS2_CORE_CLK 54 /* High speed USB 2 core clock */ -#define P_USB_HS3_CORE_CLK 55 /* High speed USB 3 core clock */ -#define P_CAM_M_CLK 56 -#define P_CAMIF_PAD_P_CLK 57 -#define P_GRP_2D_CLK 58 -#define P_GRP_2D_P_CLK 59 -#define P_I2S_CLK 60 -#define P_JPEG_CLK 61 -#define P_JPEG_P_CLK 62 -#define P_LPA_CODEC_CLK 63 -#define P_LPA_CORE_CLK 64 -#define P_LPA_P_CLK 65 -#define P_MDC_IO_CLK 66 -#define P_MDC_P_CLK 67 -#define P_MFC_CLK 68 -#define P_MFC_DIV2_CLK 69 -#define P_MFC_P_CLK 70 -#define P_QUP_I2C_CLK 71 -#define P_ROTATOR_IMEM_CLK 72 -#define P_ROTATOR_P_CLK 73 -#define P_VFE_CAMIF_CLK 74 -#define P_VFE_P_CLK 75 -#define P_VPE_CLK 76 -#define P_I2C_2_CLK 77 -#define P_MI2S_CODEC_RX_S_CLK 78 -#define P_MI2S_CODEC_RX_M_CLK 79 -#define P_MI2S_CODEC_TX_S_CLK 80 -#define P_MI2S_CODEC_TX_M_CLK 81 -#define P_PMDH_P_CLK 82 -#define P_EMDH_P_CLK 83 -#define P_SPI_P_CLK 84 -#define P_TSIF_P_CLK 85 -#define P_MDP_P_CLK 86 -#define P_SDAC_M_CLK 87 -#define P_MI2S_S_CLK 88 -#define P_MI2S_M_CLK 89 -#define P_AXI_ROTATOR_CLK 90 -#define P_HDMI_CLK 91 -#define P_CSI0_CLK 92 -#define P_CSI0_VFE_CLK 93 -#define P_CSI0_P_CLK 94 -#define P_CSI1_CLK 95 -#define P_CSI1_VFE_CLK 96 -#define P_CSI1_P_CLK 97 -#define P_GSBI_CLK 98 -#define P_GSBI_P_CLK 99 -#define P_CE_CLK 100 /* Crypto engine */ -#define P_CODEC_SSBI_CLK 101 - -#define P_NR_CLKS 102 - -struct clk_pcom_desc { - unsigned id; - const char *name; - const char *con; - const char *dev; - unsigned long flags; -}; - -struct pcom_clk_pdata { - struct clk_pcom_desc *lookup; - u32 num_lookups; -}; - -#define CLK_PCOM(clk_name, clk_id, clk_dev, clk_flags) { \ - .id = P_##clk_id, \ - .name = #clk_id, \ - .con = clk_name, \ - .dev = clk_dev, \ - .flags = clk_flags, \ - } - -#endif diff --git a/arch/arm/mach-msm/clock.c b/arch/arm/mach-msm/clock.c deleted file mode 100644 index 35ea02b52483..000000000000 --- a/arch/arm/mach-msm/clock.c +++ /dev/null @@ -1,28 +0,0 @@ -/* arch/arm/mach-msm/clock.c - * - * Copyright (C) 2007 Google, Inc. - * Copyright (c) 2007-2012, The Linux Foundation. All rights reserved. - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#include -#include - -#include "clock.h" - -int clk_reset(struct clk *clk, enum clk_reset_action action) -{ - struct clk_hw *hw = __clk_get_hw(clk); - struct msm_clk *m = to_msm_clk(hw); - return m->reset(hw, action); -} -EXPORT_SYMBOL(clk_reset); diff --git a/arch/arm/mach-msm/clock.h b/arch/arm/mach-msm/clock.h deleted file mode 100644 index 42d29dd7aafc..000000000000 --- a/arch/arm/mach-msm/clock.h +++ /dev/null @@ -1,43 +0,0 @@ -/* arch/arm/mach-msm/clock.h - * - * Copyright (C) 2007 Google, Inc. - * Copyright (c) 2007-2012, The Linux Foundation. All rights reserved. - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#ifndef __ARCH_ARM_MACH_MSM_CLOCK_H -#define __ARCH_ARM_MACH_MSM_CLOCK_H - -#include -#include - -#define CLK_FIRST_AVAILABLE_FLAG 0x00000100 -#define CLKFLAG_AUTO_OFF 0x00000200 -#define CLKFLAG_MIN 0x00000400 -#define CLKFLAG_MAX 0x00000800 - -#define OFF CLKFLAG_AUTO_OFF -#define CLK_MIN CLKFLAG_MIN -#define CLK_MAX CLKFLAG_MAX -#define CLK_MINMAX (CLK_MIN | CLK_MAX) - -struct msm_clk { - int (*reset)(struct clk_hw *hw, enum clk_reset_action action); - struct clk_hw hw; -}; - -static inline struct msm_clk *to_msm_clk(struct clk_hw *hw) -{ - return container_of(hw, struct msm_clk, hw); -} - -#endif diff --git a/arch/arm/mach-msm/common.h b/arch/arm/mach-msm/common.h deleted file mode 100644 index 572479a3c7be..000000000000 --- a/arch/arm/mach-msm/common.h +++ /dev/null @@ -1,41 +0,0 @@ -/* Copyright (c) 2012, The Linux Foundation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ -#ifndef __MACH_COMMON_H -#define __MACH_COMMON_H - -extern void msm7x01_timer_init(void); -extern void msm7x30_timer_init(void); -extern void qsd8x50_timer_init(void); - -extern void msm_map_common_io(void); -extern void msm_map_msm7x30_io(void); -extern void msm_map_qsd8x50_io(void); - -extern void __iomem *__msm_ioremap_caller(phys_addr_t phys_addr, size_t size, - unsigned int mtype, void *caller); - -struct msm_mmc_platform_data; - -extern void msm_add_devices(void); -extern void msm_init_irq(void); -extern void msm_init_gpio(void); -extern int msm_add_sdcc(unsigned int controller, - struct msm_mmc_platform_data *plat, - unsigned int stat_irq, unsigned long stat_irq_flags); - -#if defined(CONFIG_MSM_SMD) && defined(CONFIG_DEBUG_FS) -extern int smd_debugfs_init(void); -#else -static inline int smd_debugfs_init(void) { return 0; } -#endif - -#endif diff --git a/arch/arm/mach-msm/devices-msm7x00.c b/arch/arm/mach-msm/devices-msm7x00.c deleted file mode 100644 index d83404d4b328..000000000000 --- a/arch/arm/mach-msm/devices-msm7x00.c +++ /dev/null @@ -1,480 +0,0 @@ -/* linux/arch/arm/mach-msm/devices.c - * - * Copyright (C) 2008 Google, Inc. - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#include -#include -#include - -#include -#include -#include "devices.h" - -#include -#include -#include - -#include "clock.h" -#include "clock-pcom.h" -#include - -static struct resource msm_gpio_resources[] = { - { - .start = 32 + 0, - .end = 32 + 0, - .flags = IORESOURCE_IRQ, - }, - { - .start = 32 + 1, - .end = 32 + 1, - .flags = IORESOURCE_IRQ, - }, - { - .start = 0xa9200800, - .end = 0xa9200800 + SZ_4K - 1, - .flags = IORESOURCE_MEM, - .name = "gpio1" - }, - { - .start = 0xa9300C00, - .end = 0xa9300C00 + SZ_4K - 1, - .flags = IORESOURCE_MEM, - .name = "gpio2" - }, -}; - -struct platform_device msm_device_gpio_7201 = { - .name = "gpio-msm-7201", - .num_resources = ARRAY_SIZE(msm_gpio_resources), - .resource = msm_gpio_resources, -}; - -static struct resource resources_uart1[] = { - { - .start = INT_UART1, - .end = INT_UART1, - .flags = IORESOURCE_IRQ, - }, - { - .start = MSM_UART1_PHYS, - .end = MSM_UART1_PHYS + MSM_UART1_SIZE - 1, - .flags = IORESOURCE_MEM, - .name = "uart_resource" - }, -}; - -static struct resource resources_uart2[] = { - { - .start = INT_UART2, - .end = INT_UART2, - .flags = IORESOURCE_IRQ, - }, - { - .start = MSM_UART2_PHYS, - .end = MSM_UART2_PHYS + MSM_UART2_SIZE - 1, - .flags = IORESOURCE_MEM, - .name = "uart_resource" - }, -}; - -static struct resource resources_uart3[] = { - { - .start = INT_UART3, - .end = INT_UART3, - .flags = IORESOURCE_IRQ, - }, - { - .start = MSM_UART3_PHYS, - .end = MSM_UART3_PHYS + MSM_UART3_SIZE - 1, - .flags = IORESOURCE_MEM, - .name = "uart_resource" - }, -}; - -struct platform_device msm_device_uart1 = { - .name = "msm_serial", - .id = 0, - .num_resources = ARRAY_SIZE(resources_uart1), - .resource = resources_uart1, -}; - -struct platform_device msm_device_uart2 = { - .name = "msm_serial", - .id = 1, - .num_resources = ARRAY_SIZE(resources_uart2), - .resource = resources_uart2, -}; - -struct platform_device msm_device_uart3 = { - .name = "msm_serial", - .id = 2, - .num_resources = ARRAY_SIZE(resources_uart3), - .resource = resources_uart3, -}; - -static struct resource resources_i2c[] = { - { - .start = MSM_I2C_PHYS, - .end = MSM_I2C_PHYS + MSM_I2C_SIZE - 1, - .flags = IORESOURCE_MEM, - }, - { - .start = INT_PWB_I2C, - .end = INT_PWB_I2C, - .flags = IORESOURCE_IRQ, - }, -}; - -struct platform_device msm_device_i2c = { - .name = "msm_i2c", - .id = 0, - .num_resources = ARRAY_SIZE(resources_i2c), - .resource = resources_i2c, -}; - -static struct resource resources_hsusb[] = { - { - .start = MSM_HSUSB_PHYS, - .end = MSM_HSUSB_PHYS + MSM_HSUSB_SIZE, - .flags = IORESOURCE_MEM, - }, - { - .start = INT_USB_HS, - .end = INT_USB_HS, - .flags = IORESOURCE_IRQ, - }, -}; - -struct platform_device msm_device_hsusb = { - .name = "msm_hsusb", - .id = -1, - .num_resources = ARRAY_SIZE(resources_hsusb), - .resource = resources_hsusb, - .dev = { - .coherent_dma_mask = 0xffffffff, - }, -}; - -struct flash_platform_data msm_nand_data = { - .parts = NULL, - .nr_parts = 0, -}; - -static struct resource resources_nand[] = { - [0] = { - .start = 7, - .end = 7, - .flags = IORESOURCE_DMA, - }, -}; - -struct platform_device msm_device_nand = { - .name = "msm_nand", - .id = -1, - .num_resources = ARRAY_SIZE(resources_nand), - .resource = resources_nand, - .dev = { - .platform_data = &msm_nand_data, - }, -}; - -struct platform_device msm_device_smd = { - .name = "msm_smd", - .id = -1, -}; - -static struct resource resources_sdc1[] = { - { - .start = MSM_SDC1_PHYS, - .end = MSM_SDC1_PHYS + MSM_SDC1_SIZE - 1, - .flags = IORESOURCE_MEM, - }, - { - .start = INT_SDC1_0, - .end = INT_SDC1_0, - .flags = IORESOURCE_IRQ, - .name = "cmd_irq", - }, - { - .flags = IORESOURCE_IRQ | IORESOURCE_DISABLED, - .name = "status_irq" - }, - { - .start = 8, - .end = 8, - .flags = IORESOURCE_DMA, - }, -}; - -static struct resource resources_sdc2[] = { - { - .start = MSM_SDC2_PHYS, - .end = MSM_SDC2_PHYS + MSM_SDC2_SIZE - 1, - .flags = IORESOURCE_MEM, - }, - { - .start = INT_SDC2_0, - .end = INT_SDC2_0, - .flags = IORESOURCE_IRQ, - .name = "cmd_irq", - }, - { - .flags = IORESOURCE_IRQ | IORESOURCE_DISABLED, - .name = "status_irq" - }, - { - .start = 8, - .end = 8, - .flags = IORESOURCE_DMA, - }, -}; - -static struct resource resources_sdc3[] = { - { - .start = MSM_SDC3_PHYS, - .end = MSM_SDC3_PHYS + MSM_SDC3_SIZE - 1, - .flags = IORESOURCE_MEM, - }, - { - .start = INT_SDC3_0, - .end = INT_SDC3_0, - .flags = IORESOURCE_IRQ, - .name = "cmd_irq", - }, - { - .flags = IORESOURCE_IRQ | IORESOURCE_DISABLED, - .name = "status_irq" - }, - { - .start = 8, - .end = 8, - .flags = IORESOURCE_DMA, - }, -}; - -static struct resource resources_sdc4[] = { - { - .start = MSM_SDC4_PHYS, - .end = MSM_SDC4_PHYS + MSM_SDC4_SIZE - 1, - .flags = IORESOURCE_MEM, - }, - { - .start = INT_SDC4_0, - .end = INT_SDC4_0, - .flags = IORESOURCE_IRQ, - .name = "cmd_irq", - }, - { - .flags = IORESOURCE_IRQ | IORESOURCE_DISABLED, - .name = "status_irq" - }, - { - .start = 8, - .end = 8, - .flags = IORESOURCE_DMA, - }, -}; - -struct platform_device msm_device_sdc1 = { - .name = "msm_sdcc", - .id = 1, - .num_resources = ARRAY_SIZE(resources_sdc1), - .resource = resources_sdc1, - .dev = { - .coherent_dma_mask = 0xffffffff, - }, -}; - -struct platform_device msm_device_sdc2 = { - .name = "msm_sdcc", - .id = 2, - .num_resources = ARRAY_SIZE(resources_sdc2), - .resource = resources_sdc2, - .dev = { - .coherent_dma_mask = 0xffffffff, - }, -}; - -struct platform_device msm_device_sdc3 = { - .name = "msm_sdcc", - .id = 3, - .num_resources = ARRAY_SIZE(resources_sdc3), - .resource = resources_sdc3, - .dev = { - .coherent_dma_mask = 0xffffffff, - }, -}; - -struct platform_device msm_device_sdc4 = { - .name = "msm_sdcc", - .id = 4, - .num_resources = ARRAY_SIZE(resources_sdc4), - .resource = resources_sdc4, - .dev = { - .coherent_dma_mask = 0xffffffff, - }, -}; - -static struct platform_device *msm_sdcc_devices[] __initdata = { - &msm_device_sdc1, - &msm_device_sdc2, - &msm_device_sdc3, - &msm_device_sdc4, -}; - -int __init msm_add_sdcc(unsigned int controller, - struct msm_mmc_platform_data *plat, - unsigned int stat_irq, unsigned long stat_irq_flags) -{ - struct platform_device *pdev; - struct resource *res; - - if (controller < 1 || controller > 4) - return -EINVAL; - - pdev = msm_sdcc_devices[controller-1]; - pdev->dev.platform_data = plat; - - res = platform_get_resource_byname(pdev, IORESOURCE_IRQ, "status_irq"); - if (!res) - return -EINVAL; - else if (stat_irq) { - res->start = res->end = stat_irq; - res->flags &= ~IORESOURCE_DISABLED; - res->flags |= stat_irq_flags; - } - - return platform_device_register(pdev); -} - -static struct resource resources_mddi0[] = { - { - .start = MSM_PMDH_PHYS, - .end = MSM_PMDH_PHYS + MSM_PMDH_SIZE - 1, - .flags = IORESOURCE_MEM, - }, - { - .start = INT_MDDI_PRI, - .end = INT_MDDI_PRI, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct resource resources_mddi1[] = { - { - .start = MSM_EMDH_PHYS, - .end = MSM_EMDH_PHYS + MSM_EMDH_SIZE - 1, - .flags = IORESOURCE_MEM, - }, - { - .start = INT_MDDI_EXT, - .end = INT_MDDI_EXT, - .flags = IORESOURCE_IRQ, - }, -}; - -struct platform_device msm_device_mddi0 = { - .name = "msm_mddi", - .id = 0, - .num_resources = ARRAY_SIZE(resources_mddi0), - .resource = resources_mddi0, - .dev = { - .coherent_dma_mask = 0xffffffff, - }, -}; - -struct platform_device msm_device_mddi1 = { - .name = "msm_mddi", - .id = 1, - .num_resources = ARRAY_SIZE(resources_mddi1), - .resource = resources_mddi1, - .dev = { - .coherent_dma_mask = 0xffffffff, - }, -}; - -static struct resource resources_mdp[] = { - { - .start = MSM_MDP_PHYS, - .end = MSM_MDP_PHYS + MSM_MDP_SIZE - 1, - .name = "mdp", - .flags = IORESOURCE_MEM - }, - { - .start = INT_MDP, - .end = INT_MDP, - .flags = IORESOURCE_IRQ, - }, -}; - -struct platform_device msm_device_mdp = { - .name = "msm_mdp", - .id = 0, - .num_resources = ARRAY_SIZE(resources_mdp), - .resource = resources_mdp, -}; - -static struct clk_pcom_desc msm_clocks_7x01a[] = { - CLK_PCOM("adm_clk", ADM_CLK, NULL, 0), - CLK_PCOM("adsp_clk", ADSP_CLK, NULL, 0), - CLK_PCOM("ebi1_clk", EBI1_CLK, NULL, 0), - CLK_PCOM("ebi2_clk", EBI2_CLK, NULL, 0), - CLK_PCOM("ecodec_clk", ECODEC_CLK, NULL, 0), - CLK_PCOM("emdh_clk", EMDH_CLK, NULL, OFF), - CLK_PCOM("gp_clk", GP_CLK, NULL, 0), - CLK_PCOM("grp_clk", GRP_3D_CLK, NULL, OFF), - CLK_PCOM("i2c_clk", I2C_CLK, "msm_i2c.0", 0), - CLK_PCOM("icodec_rx_clk", ICODEC_RX_CLK, NULL, 0), - CLK_PCOM("icodec_tx_clk", ICODEC_TX_CLK, NULL, 0), - CLK_PCOM("imem_clk", IMEM_CLK, NULL, OFF), - CLK_PCOM("mdc_clk", MDC_CLK, NULL, 0), - CLK_PCOM("mdp_clk", MDP_CLK, NULL, OFF), - CLK_PCOM("pbus_clk", PBUS_CLK, NULL, 0), - CLK_PCOM("pcm_clk", PCM_CLK, NULL, 0), - CLK_PCOM("mddi_clk", PMDH_CLK, NULL, OFF | CLK_MINMAX), - CLK_PCOM("sdac_clk", SDAC_CLK, NULL, OFF), - CLK_PCOM("sdc_clk", SDC1_CLK, "msm_sdcc.1", OFF), - CLK_PCOM("sdc_pclk", SDC1_P_CLK, "msm_sdcc.1", OFF), - CLK_PCOM("sdc_clk", SDC2_CLK, "msm_sdcc.2", OFF), - CLK_PCOM("sdc_pclk", SDC2_P_CLK, "msm_sdcc.2", OFF), - CLK_PCOM("sdc_clk", SDC3_CLK, "msm_sdcc.3", OFF), - CLK_PCOM("sdc_pclk", SDC3_P_CLK, "msm_sdcc.3", OFF), - CLK_PCOM("sdc_clk", SDC4_CLK, "msm_sdcc.4", OFF), - CLK_PCOM("sdc_pclk", SDC4_P_CLK, "msm_sdcc.4", OFF), - CLK_PCOM("tsif_clk", TSIF_CLK, NULL, 0), - CLK_PCOM("tsif_ref_clk", TSIF_REF_CLK, NULL, 0), - CLK_PCOM("tv_dac_clk", TV_DAC_CLK, NULL, 0), - CLK_PCOM("tv_enc_clk", TV_ENC_CLK, NULL, 0), - CLK_PCOM("core", UART1_CLK, "msm_serial.0", OFF), - CLK_PCOM("core", UART2_CLK, "msm_serial.1", 0), - CLK_PCOM("core", UART3_CLK, "msm_serial.2", OFF), - CLK_PCOM("uart1dm_clk", UART1DM_CLK, NULL, OFF), - CLK_PCOM("uart2dm_clk", UART2DM_CLK, NULL, 0), - CLK_PCOM("usb_hs_clk", USB_HS_CLK, "msm_hsusb", OFF), - CLK_PCOM("usb_hs_pclk", USB_HS_P_CLK, "msm_hsusb", OFF), - CLK_PCOM("usb_otg_clk", USB_OTG_CLK, NULL, 0), - CLK_PCOM("vdc_clk", VDC_CLK, NULL, OFF ), - CLK_PCOM("vfe_clk", VFE_CLK, NULL, OFF), - CLK_PCOM("vfe_mdc_clk", VFE_MDC_CLK, NULL, OFF), -}; - -static struct pcom_clk_pdata msm_clock_7x01a_pdata = { - .lookup = msm_clocks_7x01a, - .num_lookups = ARRAY_SIZE(msm_clocks_7x01a), -}; - -struct platform_device msm_clock_7x01a = { - .name = "msm-clock-pcom", - .dev.platform_data = &msm_clock_7x01a_pdata, -}; diff --git a/arch/arm/mach-msm/devices-msm7x30.c b/arch/arm/mach-msm/devices-msm7x30.c deleted file mode 100644 index c15ea8ab20a7..000000000000 --- a/arch/arm/mach-msm/devices-msm7x30.c +++ /dev/null @@ -1,246 +0,0 @@ -/* - * Copyright (C) 2008 Google, Inc. - * Copyright (c) 2008-2011, Code Aurora Forum. All rights reserved. - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#include -#include - -#include -#include -#include -#include -#include - -#include "devices.h" -#include "smd_private.h" -#include "common.h" - -#include - -#include "clock.h" -#include "clock-pcom.h" - -#include - -static struct resource msm_gpio_resources[] = { - { - .start = 32 + 18, - .end = 32 + 18, - .flags = IORESOURCE_IRQ, - }, - { - .start = 32 + 19, - .end = 32 + 19, - .flags = IORESOURCE_IRQ, - }, - { - .start = 0xac001000, - .end = 0xac001000 + SZ_4K - 1, - .flags = IORESOURCE_MEM, - .name = "gpio1" - }, - { - .start = 0xac101400, - .end = 0xac101400 + SZ_4K - 1, - .flags = IORESOURCE_MEM, - .name = "gpio2" - }, -}; - -struct platform_device msm_device_gpio_7x30 = { - .name = "gpio-msm-7x30", - .num_resources = ARRAY_SIZE(msm_gpio_resources), - .resource = msm_gpio_resources, -}; - -static struct resource resources_uart2[] = { - { - .start = INT_UART2, - .end = INT_UART2, - .flags = IORESOURCE_IRQ, - }, - { - .start = MSM_UART2_PHYS, - .end = MSM_UART2_PHYS + MSM_UART2_SIZE - 1, - .flags = IORESOURCE_MEM, - .name = "uart_resource" - }, -}; - -struct platform_device msm_device_uart2 = { - .name = "msm_serial", - .id = 1, - .num_resources = ARRAY_SIZE(resources_uart2), - .resource = resources_uart2, -}; - -struct platform_device msm_device_smd = { - .name = "msm_smd", - .id = -1, -}; - -static struct resource resources_otg[] = { - { - .start = MSM_HSUSB_PHYS, - .end = MSM_HSUSB_PHYS + MSM_HSUSB_SIZE, - .flags = IORESOURCE_MEM, - }, - { - .start = INT_USB_HS, - .end = INT_USB_HS, - .flags = IORESOURCE_IRQ, - }, -}; - -struct platform_device msm_device_otg = { - .name = "msm_otg", - .id = -1, - .num_resources = ARRAY_SIZE(resources_otg), - .resource = resources_otg, - .dev = { - .coherent_dma_mask = 0xffffffff, - }, -}; - -static struct resource resources_hsusb[] = { - { - .start = MSM_HSUSB_PHYS, - .end = MSM_HSUSB_PHYS + MSM_HSUSB_SIZE, - .flags = IORESOURCE_MEM, - }, - { - .start = INT_USB_HS, - .end = INT_USB_HS, - .flags = IORESOURCE_IRQ, - }, -}; - -struct platform_device msm_device_hsusb = { - .name = "msm_hsusb", - .id = -1, - .num_resources = ARRAY_SIZE(resources_hsusb), - .resource = resources_hsusb, - .dev = { - .coherent_dma_mask = 0xffffffff, - }, -}; - -static u64 dma_mask = 0xffffffffULL; -static struct resource resources_hsusb_host[] = { - { - .start = MSM_HSUSB_PHYS, - .end = MSM_HSUSB_PHYS + MSM_HSUSB_SIZE, - .flags = IORESOURCE_MEM, - }, - { - .start = INT_USB_HS, - .end = INT_USB_HS, - .flags = IORESOURCE_IRQ, - }, -}; - -struct platform_device msm_device_hsusb_host = { - .name = "msm_hsusb_host", - .id = -1, - .num_resources = ARRAY_SIZE(resources_hsusb_host), - .resource = resources_hsusb_host, - .dev = { - .dma_mask = &dma_mask, - .coherent_dma_mask = 0xffffffffULL, - }, -}; - -static struct clk_pcom_desc msm_clocks_7x30[] = { - CLK_PCOM("adm_clk", ADM_CLK, NULL, 0), - CLK_PCOM("adsp_clk", ADSP_CLK, NULL, 0), - CLK_PCOM("cam_m_clk", CAM_M_CLK, NULL, 0), - CLK_PCOM("camif_pad_pclk", CAMIF_PAD_P_CLK, NULL, OFF), - CLK_PCOM("ce_clk", CE_CLK, NULL, 0), - CLK_PCOM("codec_ssbi_clk", CODEC_SSBI_CLK, NULL, 0), - CLK_PCOM("ebi1_clk", EBI1_CLK, NULL, CLK_MIN), - CLK_PCOM("ecodec_clk", ECODEC_CLK, NULL, 0), - CLK_PCOM("emdh_clk", EMDH_CLK, NULL, OFF | CLK_MINMAX), - CLK_PCOM("emdh_pclk", EMDH_P_CLK, NULL, OFF), - CLK_PCOM("gp_clk", GP_CLK, NULL, 0), - CLK_PCOM("grp_2d_clk", GRP_2D_CLK, NULL, 0), - CLK_PCOM("grp_2d_pclk", GRP_2D_P_CLK, NULL, 0), - CLK_PCOM("grp_clk", GRP_3D_CLK, NULL, 0), - CLK_PCOM("grp_pclk", GRP_3D_P_CLK, NULL, 0), - CLK_PCOM("hdmi_clk", HDMI_CLK, NULL, 0), - CLK_PCOM("imem_clk", IMEM_CLK, NULL, OFF), - CLK_PCOM("jpeg_clk", JPEG_CLK, NULL, OFF), - CLK_PCOM("jpeg_pclk", JPEG_P_CLK, NULL, OFF), - CLK_PCOM("lpa_codec_clk", LPA_CODEC_CLK, NULL, 0), - CLK_PCOM("lpa_core_clk", LPA_CORE_CLK, NULL, 0), - CLK_PCOM("lpa_pclk", LPA_P_CLK, NULL, 0), - CLK_PCOM("mdc_clk", MDC_CLK, NULL, 0), - CLK_PCOM("mddi_clk", PMDH_CLK, NULL, OFF | CLK_MINMAX), - CLK_PCOM("mddi_pclk", PMDH_P_CLK, NULL, 0), - CLK_PCOM("mdp_clk", MDP_CLK, NULL, OFF), - CLK_PCOM("mdp_pclk", MDP_P_CLK, NULL, 0), - CLK_PCOM("mdp_lcdc_pclk_clk", MDP_LCDC_PCLK_CLK, NULL, 0), - CLK_PCOM("mdp_lcdc_pad_pclk_clk", MDP_LCDC_PAD_PCLK_CLK, NULL, 0), - CLK_PCOM("mdp_vsync_clk", MDP_VSYNC_CLK, NULL, 0), - CLK_PCOM("mfc_clk", MFC_CLK, NULL, 0), - CLK_PCOM("mfc_div2_clk", MFC_DIV2_CLK, NULL, 0), - CLK_PCOM("mfc_pclk", MFC_P_CLK, NULL, 0), - CLK_PCOM("mi2s_m_clk", MI2S_M_CLK, NULL, 0), - CLK_PCOM("mi2s_s_clk", MI2S_S_CLK, NULL, 0), - CLK_PCOM("mi2s_codec_rx_m_clk", MI2S_CODEC_RX_M_CLK, NULL, 0), - CLK_PCOM("mi2s_codec_rx_s_clk", MI2S_CODEC_RX_S_CLK, NULL, 0), - CLK_PCOM("mi2s_codec_tx_m_clk", MI2S_CODEC_TX_M_CLK, NULL, 0), - CLK_PCOM("mi2s_codec_tx_s_clk", MI2S_CODEC_TX_S_CLK, NULL, 0), - CLK_PCOM("pbus_clk", PBUS_CLK, NULL, CLK_MIN), - CLK_PCOM("pcm_clk", PCM_CLK, NULL, 0), - CLK_PCOM("rotator_clk", AXI_ROTATOR_CLK, NULL, 0), - CLK_PCOM("rotator_imem_clk", ROTATOR_IMEM_CLK, NULL, OFF), - CLK_PCOM("rotator_pclk", ROTATOR_P_CLK, NULL, OFF), - CLK_PCOM("sdac_clk", SDAC_CLK, NULL, OFF), - CLK_PCOM("spi_clk", SPI_CLK, NULL, 0), - CLK_PCOM("spi_pclk", SPI_P_CLK, NULL, 0), - CLK_PCOM("tv_dac_clk", TV_DAC_CLK, NULL, 0), - CLK_PCOM("tv_enc_clk", TV_ENC_CLK, NULL, 0), - CLK_PCOM("core", UART2_CLK, "msm_serial.1", 0), - CLK_PCOM("usb_phy_clk", USB_PHY_CLK, NULL, 0), - CLK_PCOM("usb_hs_clk", USB_HS_CLK, NULL, OFF), - CLK_PCOM("usb_hs_pclk", USB_HS_P_CLK, NULL, OFF), - CLK_PCOM("usb_hs_core_clk", USB_HS_CORE_CLK, NULL, OFF), - CLK_PCOM("usb_hs2_clk", USB_HS2_CLK, NULL, OFF), - CLK_PCOM("usb_hs2_pclk", USB_HS2_P_CLK, NULL, OFF), - CLK_PCOM("usb_hs2_core_clk", USB_HS2_CORE_CLK, NULL, OFF), - CLK_PCOM("usb_hs3_clk", USB_HS3_CLK, NULL, OFF), - CLK_PCOM("usb_hs3_pclk", USB_HS3_P_CLK, NULL, OFF), - CLK_PCOM("usb_hs3_core_clk", USB_HS3_CORE_CLK, NULL, OFF), - CLK_PCOM("vdc_clk", VDC_CLK, NULL, OFF | CLK_MIN), - CLK_PCOM("vfe_camif_clk", VFE_CAMIF_CLK, NULL, 0), - CLK_PCOM("vfe_clk", VFE_CLK, NULL, 0), - CLK_PCOM("vfe_mdc_clk", VFE_MDC_CLK, NULL, 0), - CLK_PCOM("vfe_pclk", VFE_P_CLK, NULL, OFF), - CLK_PCOM("vpe_clk", VPE_CLK, NULL, 0), - - /* 7x30 v2 hardware only. */ - CLK_PCOM("csi_clk", CSI0_CLK, NULL, 0), - CLK_PCOM("csi_pclk", CSI0_P_CLK, NULL, 0), - CLK_PCOM("csi_vfe_clk", CSI0_VFE_CLK, NULL, 0), -}; - -static struct pcom_clk_pdata msm_clock_7x30_pdata = { - .lookup = msm_clocks_7x30, - .num_lookups = ARRAY_SIZE(msm_clocks_7x30), -}; - -struct platform_device msm_clock_7x30 = { - .name = "msm-clock-pcom", - .dev.platform_data = &msm_clock_7x30_pdata, -}; diff --git a/arch/arm/mach-msm/devices-qsd8x50.c b/arch/arm/mach-msm/devices-qsd8x50.c deleted file mode 100644 index 9e1e9ce07b1a..000000000000 --- a/arch/arm/mach-msm/devices-qsd8x50.c +++ /dev/null @@ -1,388 +0,0 @@ -/* - * Copyright (C) 2008 Google, Inc. - * Copyright (c) 2008-2011, Code Aurora Forum. All rights reserved. - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#include -#include -#include -#include - -#include -#include -#include - -#include "devices.h" -#include "common.h" - -#include - -#include -#include "clock.h" -#include "clock-pcom.h" - -static struct resource msm_gpio_resources[] = { - { - .start = 64 + 165 + 9, - .end = 64 + 165 + 9, - .flags = IORESOURCE_IRQ, - }, - { - .start = 64 + 165 + 10, - .end = 64 + 165 + 10, - .flags = IORESOURCE_IRQ, - }, - { - .start = 0xa9000800, - .end = 0xa9000800 + SZ_4K - 1, - .flags = IORESOURCE_MEM, - .name = "gpio1" - }, - { - .start = 0xa9100C00, - .end = 0xa9100C00 + SZ_4K - 1, - .flags = IORESOURCE_MEM, - .name = "gpio2" - }, -}; - -struct platform_device msm_device_gpio_8x50 = { - .name = "gpio-msm-8x50", - .num_resources = ARRAY_SIZE(msm_gpio_resources), - .resource = msm_gpio_resources, -}; - -static struct resource resources_uart3[] = { - { - .start = INT_UART3, - .end = INT_UART3, - .flags = IORESOURCE_IRQ, - }, - { - .start = MSM_UART3_PHYS, - .end = MSM_UART3_PHYS + MSM_UART3_SIZE - 1, - .flags = IORESOURCE_MEM, - .name = "uart_resource" - }, -}; - -struct platform_device msm_device_uart3 = { - .name = "msm_serial", - .id = 2, - .num_resources = ARRAY_SIZE(resources_uart3), - .resource = resources_uart3, -}; - -struct platform_device msm_device_smd = { - .name = "msm_smd", - .id = -1, -}; - -static struct resource resources_otg[] = { - { - .start = MSM_HSUSB_PHYS, - .end = MSM_HSUSB_PHYS + MSM_HSUSB_SIZE, - .flags = IORESOURCE_MEM, - }, - { - .start = INT_USB_HS, - .end = INT_USB_HS, - .flags = IORESOURCE_IRQ, - }, -}; - -struct platform_device msm_device_otg = { - .name = "msm_otg", - .id = -1, - .num_resources = ARRAY_SIZE(resources_otg), - .resource = resources_otg, - .dev = { - .coherent_dma_mask = 0xffffffff, - }, -}; - -static struct resource resources_hsusb[] = { - { - .start = MSM_HSUSB_PHYS, - .end = MSM_HSUSB_PHYS + MSM_HSUSB_SIZE, - .flags = IORESOURCE_MEM, - }, - { - .start = INT_USB_HS, - .end = INT_USB_HS, - .flags = IORESOURCE_IRQ, - }, -}; - -struct platform_device msm_device_hsusb = { - .name = "msm_hsusb", - .id = -1, - .num_resources = ARRAY_SIZE(resources_hsusb), - .resource = resources_hsusb, - .dev = { - .coherent_dma_mask = 0xffffffff, - }, -}; - -static u64 dma_mask = 0xffffffffULL; -static struct resource resources_hsusb_host[] = { - { - .start = MSM_HSUSB_PHYS, - .end = MSM_HSUSB_PHYS + MSM_HSUSB_SIZE, - .flags = IORESOURCE_MEM, - }, - { - .start = INT_USB_HS, - .end = INT_USB_HS, - .flags = IORESOURCE_IRQ, - }, -}; - -struct platform_device msm_device_hsusb_host = { - .name = "msm_hsusb_host", - .id = -1, - .num_resources = ARRAY_SIZE(resources_hsusb_host), - .resource = resources_hsusb_host, - .dev = { - .dma_mask = &dma_mask, - .coherent_dma_mask = 0xffffffffULL, - }, -}; - -static struct resource resources_sdc1[] = { - { - .start = MSM_SDC1_PHYS, - .end = MSM_SDC1_PHYS + MSM_SDC1_SIZE - 1, - .flags = IORESOURCE_MEM, - }, - { - .start = INT_SDC1_0, - .end = INT_SDC1_0, - .flags = IORESOURCE_IRQ, - .name = "cmd_irq", - }, - { - .flags = IORESOURCE_IRQ | IORESOURCE_DISABLED, - .name = "status_irq" - }, - { - .start = 8, - .end = 8, - .flags = IORESOURCE_DMA, - }, -}; - -static struct resource resources_sdc2[] = { - { - .start = MSM_SDC2_PHYS, - .end = MSM_SDC2_PHYS + MSM_SDC2_SIZE - 1, - .flags = IORESOURCE_MEM, - }, - { - .start = INT_SDC2_0, - .end = INT_SDC2_0, - .flags = IORESOURCE_IRQ, - .name = "cmd_irq", - }, - { - .flags = IORESOURCE_IRQ | IORESOURCE_DISABLED, - .name = "status_irq" - }, - { - .start = 8, - .end = 8, - .flags = IORESOURCE_DMA, - }, -}; - -static struct resource resources_sdc3[] = { - { - .start = MSM_SDC3_PHYS, - .end = MSM_SDC3_PHYS + MSM_SDC3_SIZE - 1, - .flags = IORESOURCE_MEM, - }, - { - .start = INT_SDC3_0, - .end = INT_SDC3_0, - .flags = IORESOURCE_IRQ, - .name = "cmd_irq", - }, - { - .flags = IORESOURCE_IRQ | IORESOURCE_DISABLED, - .name = "status_irq" - }, - { - .start = 8, - .end = 8, - .flags = IORESOURCE_DMA, - }, -}; - -static struct resource resources_sdc4[] = { - { - .start = MSM_SDC4_PHYS, - .end = MSM_SDC4_PHYS + MSM_SDC4_SIZE - 1, - .flags = IORESOURCE_MEM, - }, - { - .start = INT_SDC4_0, - .end = INT_SDC4_0, - .flags = IORESOURCE_IRQ, - .name = "cmd_irq", - }, - { - .flags = IORESOURCE_IRQ | IORESOURCE_DISABLED, - .name = "status_irq" - }, - { - .start = 8, - .end = 8, - .flags = IORESOURCE_DMA, - }, -}; - -struct platform_device msm_device_sdc1 = { - .name = "msm_sdcc", - .id = 1, - .num_resources = ARRAY_SIZE(resources_sdc1), - .resource = resources_sdc1, - .dev = { - .coherent_dma_mask = 0xffffffff, - }, -}; - -struct platform_device msm_device_sdc2 = { - .name = "msm_sdcc", - .id = 2, - .num_resources = ARRAY_SIZE(resources_sdc2), - .resource = resources_sdc2, - .dev = { - .coherent_dma_mask = 0xffffffff, - }, -}; - -struct platform_device msm_device_sdc3 = { - .name = "msm_sdcc", - .id = 3, - .num_resources = ARRAY_SIZE(resources_sdc3), - .resource = resources_sdc3, - .dev = { - .coherent_dma_mask = 0xffffffff, - }, -}; - -struct platform_device msm_device_sdc4 = { - .name = "msm_sdcc", - .id = 4, - .num_resources = ARRAY_SIZE(resources_sdc4), - .resource = resources_sdc4, - .dev = { - .coherent_dma_mask = 0xffffffff, - }, -}; - -static struct platform_device *msm_sdcc_devices[] __initdata = { - &msm_device_sdc1, - &msm_device_sdc2, - &msm_device_sdc3, - &msm_device_sdc4, -}; - -int __init msm_add_sdcc(unsigned int controller, - struct msm_mmc_platform_data *plat, - unsigned int stat_irq, unsigned long stat_irq_flags) -{ - struct platform_device *pdev; - struct resource *res; - - if (controller < 1 || controller > 4) - return -EINVAL; - - pdev = msm_sdcc_devices[controller-1]; - pdev->dev.platform_data = plat; - - res = platform_get_resource_byname(pdev, IORESOURCE_IRQ, "status_irq"); - if (!res) - return -EINVAL; - else if (stat_irq) { - res->start = res->end = stat_irq; - res->flags &= ~IORESOURCE_DISABLED; - res->flags |= stat_irq_flags; - } - - return platform_device_register(pdev); -} - -static struct clk_pcom_desc msm_clocks_8x50[] = { - CLK_PCOM("adm_clk", ADM_CLK, NULL, 0), - CLK_PCOM("ce_clk", CE_CLK, NULL, 0), - CLK_PCOM("ebi1_clk", EBI1_CLK, NULL, CLK_MIN), - CLK_PCOM("ebi2_clk", EBI2_CLK, NULL, 0), - CLK_PCOM("ecodec_clk", ECODEC_CLK, NULL, 0), - CLK_PCOM("emdh_clk", EMDH_CLK, NULL, OFF | CLK_MINMAX), - CLK_PCOM("gp_clk", GP_CLK, NULL, 0), - CLK_PCOM("grp_clk", GRP_3D_CLK, NULL, 0), - CLK_PCOM("i2c_clk", I2C_CLK, NULL, 0), - CLK_PCOM("icodec_rx_clk", ICODEC_RX_CLK, NULL, 0), - CLK_PCOM("icodec_tx_clk", ICODEC_TX_CLK, NULL, 0), - CLK_PCOM("imem_clk", IMEM_CLK, NULL, OFF), - CLK_PCOM("mdc_clk", MDC_CLK, NULL, 0), - CLK_PCOM("mddi_clk", PMDH_CLK, NULL, OFF | CLK_MINMAX), - CLK_PCOM("mdp_clk", MDP_CLK, NULL, OFF), - CLK_PCOM("mdp_lcdc_pclk_clk", MDP_LCDC_PCLK_CLK, NULL, 0), - CLK_PCOM("mdp_lcdc_pad_pclk_clk", MDP_LCDC_PAD_PCLK_CLK, NULL, 0), - CLK_PCOM("mdp_vsync_clk", MDP_VSYNC_CLK, NULL, 0), - CLK_PCOM("pbus_clk", PBUS_CLK, NULL, CLK_MIN), - CLK_PCOM("pcm_clk", PCM_CLK, NULL, 0), - CLK_PCOM("sdac_clk", SDAC_CLK, NULL, OFF), - CLK_PCOM("sdc_clk", SDC1_CLK, "msm_sdcc.1", OFF), - CLK_PCOM("sdc_pclk", SDC1_P_CLK, "msm_sdcc.1", OFF), - CLK_PCOM("sdc_clk", SDC2_CLK, "msm_sdcc.2", OFF), - CLK_PCOM("sdc_pclk", SDC2_P_CLK, "msm_sdcc.2", OFF), - CLK_PCOM("sdc_clk", SDC3_CLK, "msm_sdcc.3", OFF), - CLK_PCOM("sdc_pclk", SDC3_P_CLK, "msm_sdcc.3", OFF), - CLK_PCOM("sdc_clk", SDC4_CLK, "msm_sdcc.4", OFF), - CLK_PCOM("sdc_pclk", SDC4_P_CLK, "msm_sdcc.4", OFF), - CLK_PCOM("spi_clk", SPI_CLK, NULL, 0), - CLK_PCOM("tsif_clk", TSIF_CLK, NULL, 0), - CLK_PCOM("tsif_ref_clk", TSIF_REF_CLK, NULL, 0), - CLK_PCOM("tv_dac_clk", TV_DAC_CLK, NULL, 0), - CLK_PCOM("tv_enc_clk", TV_ENC_CLK, NULL, 0), - CLK_PCOM("core", UART1_CLK, NULL, OFF), - CLK_PCOM("core", UART2_CLK, NULL, 0), - CLK_PCOM("core", UART3_CLK, "msm_serial.2", OFF), - CLK_PCOM("uartdm_clk", UART1DM_CLK, NULL, OFF), - CLK_PCOM("uartdm_clk", UART2DM_CLK, NULL, 0), - CLK_PCOM("usb_hs_clk", USB_HS_CLK, NULL, OFF), - CLK_PCOM("usb_hs_pclk", USB_HS_P_CLK, NULL, OFF), - CLK_PCOM("usb_otg_clk", USB_OTG_CLK, NULL, 0), - CLK_PCOM("vdc_clk", VDC_CLK, NULL, OFF | CLK_MIN), - CLK_PCOM("vfe_clk", VFE_CLK, NULL, OFF), - CLK_PCOM("vfe_mdc_clk", VFE_MDC_CLK, NULL, OFF), - CLK_PCOM("vfe_axi_clk", VFE_AXI_CLK, NULL, OFF), - CLK_PCOM("usb_hs2_clk", USB_HS2_CLK, NULL, OFF), - CLK_PCOM("usb_hs2_pclk", USB_HS2_P_CLK, NULL, OFF), - CLK_PCOM("usb_hs3_clk", USB_HS3_CLK, NULL, OFF), - CLK_PCOM("usb_hs3_pclk", USB_HS3_P_CLK, NULL, OFF), - CLK_PCOM("usb_phy_clk", USB_PHY_CLK, NULL, 0), -}; - -static struct pcom_clk_pdata msm_clock_8x50_pdata = { - .lookup = msm_clocks_8x50, - .num_lookups = ARRAY_SIZE(msm_clocks_8x50), -}; - -struct platform_device msm_clock_8x50 = { - .name = "msm-clock-pcom", - .dev.platform_data = &msm_clock_8x50_pdata, -}; diff --git a/arch/arm/mach-msm/devices.h b/arch/arm/mach-msm/devices.h deleted file mode 100644 index dccefad9f9b9..000000000000 --- a/arch/arm/mach-msm/devices.h +++ /dev/null @@ -1,53 +0,0 @@ -/* linux/arch/arm/mach-msm/devices.h - * - * Copyright (C) 2008 Google, Inc. - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#ifndef __ARCH_ARM_MACH_MSM_DEVICES_H -#define __ARCH_ARM_MACH_MSM_DEVICES_H - -extern struct platform_device msm_device_gpio_7201; -extern struct platform_device msm_device_gpio_7x30; -extern struct platform_device msm_device_gpio_8x50; - -extern struct platform_device msm_device_uart1; -extern struct platform_device msm_device_uart2; -extern struct platform_device msm_device_uart3; - -extern struct platform_device msm8960_device_uart_gsbi2; -extern struct platform_device msm8960_device_uart_gsbi5; - -extern struct platform_device msm_device_sdc1; -extern struct platform_device msm_device_sdc2; -extern struct platform_device msm_device_sdc3; -extern struct platform_device msm_device_sdc4; - -extern struct platform_device msm_device_hsusb; -extern struct platform_device msm_device_otg; -extern struct platform_device msm_device_hsusb_host; - -extern struct platform_device msm_device_i2c; - -extern struct platform_device msm_device_smd; - -extern struct platform_device msm_device_nand; - -extern struct platform_device msm_device_mddi0; -extern struct platform_device msm_device_mddi1; -extern struct platform_device msm_device_mdp; - -extern struct platform_device msm_clock_7x01a; -extern struct platform_device msm_clock_7x30; -extern struct platform_device msm_clock_8x50; - -#endif diff --git a/arch/arm/mach-msm/dma.c b/arch/arm/mach-msm/dma.c deleted file mode 100644 index fb9762464718..000000000000 --- a/arch/arm/mach-msm/dma.c +++ /dev/null @@ -1,298 +0,0 @@ -/* linux/arch/arm/mach-msm/dma.c - * - * Copyright (C) 2007 Google, Inc. - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#include -#include -#include -#include -#include -#include -#include -#include - -#define MSM_DMOV_CHANNEL_COUNT 16 - -#define DMOV_SD0(off, ch) (MSM_DMOV_BASE + 0x0000 + (off) + ((ch) << 2)) -#define DMOV_SD1(off, ch) (MSM_DMOV_BASE + 0x0400 + (off) + ((ch) << 2)) -#define DMOV_SD2(off, ch) (MSM_DMOV_BASE + 0x0800 + (off) + ((ch) << 2)) -#define DMOV_SD3(off, ch) (MSM_DMOV_BASE + 0x0C00 + (off) + ((ch) << 2)) - -#if defined(CONFIG_ARCH_MSM7X30) -#define DMOV_SD_AARM DMOV_SD2 -#else -#define DMOV_SD_AARM DMOV_SD3 -#endif - -#define DMOV_CMD_PTR(ch) DMOV_SD_AARM(0x000, ch) -#define DMOV_RSLT(ch) DMOV_SD_AARM(0x040, ch) -#define DMOV_FLUSH0(ch) DMOV_SD_AARM(0x080, ch) -#define DMOV_FLUSH1(ch) DMOV_SD_AARM(0x0C0, ch) -#define DMOV_FLUSH2(ch) DMOV_SD_AARM(0x100, ch) -#define DMOV_FLUSH3(ch) DMOV_SD_AARM(0x140, ch) -#define DMOV_FLUSH4(ch) DMOV_SD_AARM(0x180, ch) -#define DMOV_FLUSH5(ch) DMOV_SD_AARM(0x1C0, ch) - -#define DMOV_STATUS(ch) DMOV_SD_AARM(0x200, ch) -#define DMOV_ISR DMOV_SD_AARM(0x380, 0) - -#define DMOV_CONFIG(ch) DMOV_SD_AARM(0x300, ch) - -enum { - MSM_DMOV_PRINT_ERRORS = 1, - MSM_DMOV_PRINT_IO = 2, - MSM_DMOV_PRINT_FLOW = 4 -}; - -static DEFINE_SPINLOCK(msm_dmov_lock); -static struct clk *msm_dmov_clk; -static unsigned int channel_active; -static struct list_head ready_commands[MSM_DMOV_CHANNEL_COUNT]; -static struct list_head active_commands[MSM_DMOV_CHANNEL_COUNT]; -unsigned int msm_dmov_print_mask = MSM_DMOV_PRINT_ERRORS; - -#define MSM_DMOV_DPRINTF(mask, format, args...) \ - do { \ - if ((mask) & msm_dmov_print_mask) \ - printk(KERN_ERR format, args); \ - } while (0) -#define PRINT_ERROR(format, args...) \ - MSM_DMOV_DPRINTF(MSM_DMOV_PRINT_ERRORS, format, args); -#define PRINT_IO(format, args...) \ - MSM_DMOV_DPRINTF(MSM_DMOV_PRINT_IO, format, args); -#define PRINT_FLOW(format, args...) \ - MSM_DMOV_DPRINTF(MSM_DMOV_PRINT_FLOW, format, args); - -void msm_dmov_stop_cmd(unsigned id, struct msm_dmov_cmd *cmd, int graceful) -{ - writel((graceful << 31), DMOV_FLUSH0(id)); -} -EXPORT_SYMBOL_GPL(msm_dmov_stop_cmd); - -void msm_dmov_enqueue_cmd(unsigned id, struct msm_dmov_cmd *cmd) -{ - unsigned long irq_flags; - unsigned int status; - - spin_lock_irqsave(&msm_dmov_lock, irq_flags); - if (!channel_active) - clk_enable(msm_dmov_clk); - dsb(); - status = readl(DMOV_STATUS(id)); - if (list_empty(&ready_commands[id]) && - (status & DMOV_STATUS_CMD_PTR_RDY)) { -#if 0 - if (list_empty(&active_commands[id])) { - PRINT_FLOW("msm_dmov_enqueue_cmd(%d), enable interrupt\n", id); - writel(DMOV_CONFIG_IRQ_EN, DMOV_CONFIG(id)); - } -#endif - if (cmd->execute_func) - cmd->execute_func(cmd); - PRINT_IO("msm_dmov_enqueue_cmd(%d), start command, status %x\n", id, status); - list_add_tail(&cmd->list, &active_commands[id]); - if (!channel_active) - enable_irq(INT_ADM_AARM); - channel_active |= 1U << id; - writel(cmd->cmdptr, DMOV_CMD_PTR(id)); - } else { - if (!channel_active) - clk_disable(msm_dmov_clk); - if (list_empty(&active_commands[id])) - PRINT_ERROR("msm_dmov_enqueue_cmd(%d), error datamover stalled, status %x\n", id, status); - - PRINT_IO("msm_dmov_enqueue_cmd(%d), enqueue command, status %x\n", id, status); - list_add_tail(&cmd->list, &ready_commands[id]); - } - spin_unlock_irqrestore(&msm_dmov_lock, irq_flags); -} -EXPORT_SYMBOL_GPL(msm_dmov_enqueue_cmd); - -struct msm_dmov_exec_cmdptr_cmd { - struct msm_dmov_cmd dmov_cmd; - struct completion complete; - unsigned id; - unsigned int result; - struct msm_dmov_errdata err; -}; - -static void -dmov_exec_cmdptr_complete_func(struct msm_dmov_cmd *_cmd, - unsigned int result, - struct msm_dmov_errdata *err) -{ - struct msm_dmov_exec_cmdptr_cmd *cmd = container_of(_cmd, struct msm_dmov_exec_cmdptr_cmd, dmov_cmd); - cmd->result = result; - if (result != 0x80000002 && err) - memcpy(&cmd->err, err, sizeof(struct msm_dmov_errdata)); - - complete(&cmd->complete); -} - -int msm_dmov_exec_cmd(unsigned id, unsigned int cmdptr) -{ - struct msm_dmov_exec_cmdptr_cmd cmd; - - PRINT_FLOW("dmov_exec_cmdptr(%d, %x)\n", id, cmdptr); - - cmd.dmov_cmd.cmdptr = cmdptr; - cmd.dmov_cmd.complete_func = dmov_exec_cmdptr_complete_func; - cmd.dmov_cmd.execute_func = NULL; - cmd.id = id; - init_completion(&cmd.complete); - - msm_dmov_enqueue_cmd(id, &cmd.dmov_cmd); - wait_for_completion(&cmd.complete); - - if (cmd.result != 0x80000002) { - PRINT_ERROR("dmov_exec_cmdptr(%d): ERROR, result: %x\n", id, cmd.result); - PRINT_ERROR("dmov_exec_cmdptr(%d): flush: %x %x %x %x\n", - id, cmd.err.flush[0], cmd.err.flush[1], cmd.err.flush[2], cmd.err.flush[3]); - return -EIO; - } - PRINT_FLOW("dmov_exec_cmdptr(%d, %x) done\n", id, cmdptr); - return 0; -} - - -static irqreturn_t msm_datamover_irq_handler(int irq, void *dev_id) -{ - unsigned int int_status, mask, id; - unsigned long irq_flags; - unsigned int ch_status; - unsigned int ch_result; - struct msm_dmov_cmd *cmd; - - spin_lock_irqsave(&msm_dmov_lock, irq_flags); - - int_status = readl(DMOV_ISR); /* read and clear interrupt */ - PRINT_FLOW("msm_datamover_irq_handler: DMOV_ISR %x\n", int_status); - - while (int_status) { - mask = int_status & -int_status; - id = fls(mask) - 1; - PRINT_FLOW("msm_datamover_irq_handler %08x %08x id %d\n", int_status, mask, id); - int_status &= ~mask; - ch_status = readl(DMOV_STATUS(id)); - if (!(ch_status & DMOV_STATUS_RSLT_VALID)) { - PRINT_FLOW("msm_datamover_irq_handler id %d, result not valid %x\n", id, ch_status); - continue; - } - do { - ch_result = readl(DMOV_RSLT(id)); - if (list_empty(&active_commands[id])) { - PRINT_ERROR("msm_datamover_irq_handler id %d, got result " - "with no active command, status %x, result %x\n", - id, ch_status, ch_result); - cmd = NULL; - } else - cmd = list_entry(active_commands[id].next, typeof(*cmd), list); - PRINT_FLOW("msm_datamover_irq_handler id %d, status %x, result %x\n", id, ch_status, ch_result); - if (ch_result & DMOV_RSLT_DONE) { - PRINT_FLOW("msm_datamover_irq_handler id %d, status %x\n", - id, ch_status); - PRINT_IO("msm_datamover_irq_handler id %d, got result " - "for %p, result %x\n", id, cmd, ch_result); - if (cmd) { - list_del(&cmd->list); - dsb(); - cmd->complete_func(cmd, ch_result, NULL); - } - } - if (ch_result & DMOV_RSLT_FLUSH) { - struct msm_dmov_errdata errdata; - - errdata.flush[0] = readl(DMOV_FLUSH0(id)); - errdata.flush[1] = readl(DMOV_FLUSH1(id)); - errdata.flush[2] = readl(DMOV_FLUSH2(id)); - errdata.flush[3] = readl(DMOV_FLUSH3(id)); - errdata.flush[4] = readl(DMOV_FLUSH4(id)); - errdata.flush[5] = readl(DMOV_FLUSH5(id)); - PRINT_FLOW("msm_datamover_irq_handler id %d, status %x\n", id, ch_status); - PRINT_FLOW("msm_datamover_irq_handler id %d, flush, result %x, flush0 %x\n", id, ch_result, errdata.flush[0]); - if (cmd) { - list_del(&cmd->list); - dsb(); - cmd->complete_func(cmd, ch_result, &errdata); - } - } - if (ch_result & DMOV_RSLT_ERROR) { - struct msm_dmov_errdata errdata; - - errdata.flush[0] = readl(DMOV_FLUSH0(id)); - errdata.flush[1] = readl(DMOV_FLUSH1(id)); - errdata.flush[2] = readl(DMOV_FLUSH2(id)); - errdata.flush[3] = readl(DMOV_FLUSH3(id)); - errdata.flush[4] = readl(DMOV_FLUSH4(id)); - errdata.flush[5] = readl(DMOV_FLUSH5(id)); - - PRINT_ERROR("msm_datamover_irq_handler id %d, status %x\n", id, ch_status); - PRINT_ERROR("msm_datamover_irq_handler id %d, error, result %x, flush0 %x\n", id, ch_result, errdata.flush[0]); - if (cmd) { - list_del(&cmd->list); - dsb(); - cmd->complete_func(cmd, ch_result, &errdata); - } - /* this does not seem to work, once we get an error */ - /* the datamover will no longer accept commands */ - writel(0, DMOV_FLUSH0(id)); - } - ch_status = readl(DMOV_STATUS(id)); - PRINT_FLOW("msm_datamover_irq_handler id %d, status %x\n", id, ch_status); - if ((ch_status & DMOV_STATUS_CMD_PTR_RDY) && !list_empty(&ready_commands[id])) { - cmd = list_entry(ready_commands[id].next, typeof(*cmd), list); - list_move_tail(&cmd->list, &active_commands[id]); - if (cmd->execute_func) - cmd->execute_func(cmd); - PRINT_FLOW("msm_datamover_irq_handler id %d, start command\n", id); - writel(cmd->cmdptr, DMOV_CMD_PTR(id)); - } - } while (ch_status & DMOV_STATUS_RSLT_VALID); - if (list_empty(&active_commands[id]) && list_empty(&ready_commands[id])) - channel_active &= ~(1U << id); - PRINT_FLOW("msm_datamover_irq_handler id %d, status %x\n", id, ch_status); - } - - if (!channel_active) { - disable_irq_nosync(INT_ADM_AARM); - clk_disable(msm_dmov_clk); - } - - spin_unlock_irqrestore(&msm_dmov_lock, irq_flags); - return IRQ_HANDLED; -} - -static int __init msm_init_datamover(void) -{ - int i; - int ret; - struct clk *clk; - - for (i = 0; i < MSM_DMOV_CHANNEL_COUNT; i++) { - INIT_LIST_HEAD(&ready_commands[i]); - INIT_LIST_HEAD(&active_commands[i]); - writel(DMOV_CONFIG_IRQ_EN | DMOV_CONFIG_FORCE_TOP_PTR_RSLT | DMOV_CONFIG_FORCE_FLUSH_RSLT, DMOV_CONFIG(i)); - } - clk = clk_get(NULL, "adm_clk"); - if (IS_ERR(clk)) - return PTR_ERR(clk); - clk_prepare(clk); - msm_dmov_clk = clk; - ret = request_irq(INT_ADM_AARM, msm_datamover_irq_handler, 0, "msmdatamover", NULL); - if (ret) - return ret; - disable_irq(INT_ADM_AARM); - return 0; -} -module_init(msm_init_datamover); diff --git a/arch/arm/mach-msm/gpiomux-8x50.c b/arch/arm/mach-msm/gpiomux-8x50.c deleted file mode 100644 index f7a4ea593c95..000000000000 --- a/arch/arm/mach-msm/gpiomux-8x50.c +++ /dev/null @@ -1,51 +0,0 @@ -/* Copyright (c) 2010, Code Aurora Forum. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA - * 02110-1301, USA. - */ -#include "gpiomux.h" - -#if defined(CONFIG_MMC_MSM) || defined(CONFIG_MMC_MSM_MODULE) - #define SDCC_DAT_0_3_CMD_ACTV_CFG (GPIOMUX_VALID | GPIOMUX_PULL_UP\ - | GPIOMUX_FUNC_1 | GPIOMUX_DRV_8MA) - #define SDCC_CLK_ACTV_CFG (GPIOMUX_VALID | GPIOMUX_PULL_NONE\ - | GPIOMUX_FUNC_1 | GPIOMUX_DRV_8MA) -#else - #define SDCC_DAT_0_3_CMD_ACTV_CFG 0 - #define SDCC_CLK_ACTV_CFG 0 -#endif - -#define SDC1_SUSPEND_CONFIG (GPIOMUX_VALID | GPIOMUX_PULL_DOWN\ - | GPIOMUX_FUNC_GPIO | GPIOMUX_DRV_2MA) - -struct msm_gpiomux_config msm_gpiomux_configs[GPIOMUX_NGPIOS] = { - [86] = { /* UART3 RX */ - .suspended = GPIOMUX_DRV_2MA | GPIOMUX_PULL_DOWN | - GPIOMUX_FUNC_1 | GPIOMUX_VALID, - }, - [87] = { /* UART3 TX */ - .suspended = GPIOMUX_DRV_2MA | GPIOMUX_PULL_DOWN | - GPIOMUX_FUNC_1 | GPIOMUX_VALID, - }, - /* SDC1 data[3:0] & CMD */ - [51 ... 55] = { - .active = SDCC_DAT_0_3_CMD_ACTV_CFG, - .suspended = SDC1_SUSPEND_CONFIG - }, - /* SDC1 CLK */ - [56] = { - .active = SDCC_CLK_ACTV_CFG, - .suspended = SDC1_SUSPEND_CONFIG - }, -}; diff --git a/arch/arm/mach-msm/gpiomux-v1.h b/arch/arm/mach-msm/gpiomux-v1.h deleted file mode 100644 index 71d86feba450..000000000000 --- a/arch/arm/mach-msm/gpiomux-v1.h +++ /dev/null @@ -1,67 +0,0 @@ -/* Copyright (c) 2010, Code Aurora Forum. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA - * 02110-1301, USA. - */ -#ifndef __ARCH_ARM_MACH_MSM_GPIOMUX_V1_H -#define __ARCH_ARM_MACH_MSM_GPIOMUX_V1_H - -#if defined(CONFIG_ARCH_MSM7X30) -#define GPIOMUX_NGPIOS 182 -#elif defined(CONFIG_ARCH_QSD8X50) -#define GPIOMUX_NGPIOS 165 -#else -#define GPIOMUX_NGPIOS 133 -#endif - -typedef u32 gpiomux_config_t; - -enum { - GPIOMUX_DRV_2MA = 0UL << 17, - GPIOMUX_DRV_4MA = 1UL << 17, - GPIOMUX_DRV_6MA = 2UL << 17, - GPIOMUX_DRV_8MA = 3UL << 17, - GPIOMUX_DRV_10MA = 4UL << 17, - GPIOMUX_DRV_12MA = 5UL << 17, - GPIOMUX_DRV_14MA = 6UL << 17, - GPIOMUX_DRV_16MA = 7UL << 17, -}; - -enum { - GPIOMUX_FUNC_GPIO = 0UL, - GPIOMUX_FUNC_1 = 1UL, - GPIOMUX_FUNC_2 = 2UL, - GPIOMUX_FUNC_3 = 3UL, - GPIOMUX_FUNC_4 = 4UL, - GPIOMUX_FUNC_5 = 5UL, - GPIOMUX_FUNC_6 = 6UL, - GPIOMUX_FUNC_7 = 7UL, - GPIOMUX_FUNC_8 = 8UL, - GPIOMUX_FUNC_9 = 9UL, - GPIOMUX_FUNC_A = 10UL, - GPIOMUX_FUNC_B = 11UL, - GPIOMUX_FUNC_C = 12UL, - GPIOMUX_FUNC_D = 13UL, - GPIOMUX_FUNC_E = 14UL, - GPIOMUX_FUNC_F = 15UL, -}; - -enum { - GPIOMUX_PULL_NONE = 0UL << 15, - GPIOMUX_PULL_DOWN = 1UL << 15, - GPIOMUX_PULL_KEEPER = 2UL << 15, - GPIOMUX_PULL_UP = 3UL << 15, -}; - -#endif diff --git a/arch/arm/mach-msm/gpiomux.c b/arch/arm/mach-msm/gpiomux.c deleted file mode 100644 index 2b8e2d217082..000000000000 --- a/arch/arm/mach-msm/gpiomux.c +++ /dev/null @@ -1,111 +0,0 @@ -/* Copyright (c) 2010, Code Aurora Forum. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA - * 02110-1301, USA. - */ -#include -#include -#include "gpiomux.h" -#include "proc_comm.h" - -static DEFINE_SPINLOCK(gpiomux_lock); - -static void __msm_gpiomux_write(unsigned gpio, gpiomux_config_t val) -{ - unsigned tlmm_config = (val & ~GPIOMUX_CTL_MASK) | - ((gpio & 0x3ff) << 4); - unsigned tlmm_disable = 0; - int rc; - - rc = msm_proc_comm(PCOM_RPC_GPIO_TLMM_CONFIG_EX, - &tlmm_config, &tlmm_disable); - if (rc) - pr_err("%s: unexpected proc_comm failure %d: %08x %08x\n", - __func__, rc, tlmm_config, tlmm_disable); -} - -int msm_gpiomux_write(unsigned gpio, - gpiomux_config_t active, - gpiomux_config_t suspended) -{ - struct msm_gpiomux_config *cfg = msm_gpiomux_configs + gpio; - unsigned long irq_flags; - gpiomux_config_t setting; - - if (gpio >= GPIOMUX_NGPIOS) - return -EINVAL; - - spin_lock_irqsave(&gpiomux_lock, irq_flags); - - if (active & GPIOMUX_VALID) - cfg->active = active; - - if (suspended & GPIOMUX_VALID) - cfg->suspended = suspended; - - setting = cfg->ref ? active : suspended; - if (setting & GPIOMUX_VALID) - __msm_gpiomux_write(gpio, setting); - - spin_unlock_irqrestore(&gpiomux_lock, irq_flags); - return 0; -} -EXPORT_SYMBOL(msm_gpiomux_write); - -int msm_gpiomux_get(unsigned gpio) -{ - struct msm_gpiomux_config *cfg = msm_gpiomux_configs + gpio; - unsigned long irq_flags; - - if (gpio >= GPIOMUX_NGPIOS) - return -EINVAL; - - spin_lock_irqsave(&gpiomux_lock, irq_flags); - if (cfg->ref++ == 0 && cfg->active & GPIOMUX_VALID) - __msm_gpiomux_write(gpio, cfg->active); - spin_unlock_irqrestore(&gpiomux_lock, irq_flags); - return 0; -} -EXPORT_SYMBOL(msm_gpiomux_get); - -int msm_gpiomux_put(unsigned gpio) -{ - struct msm_gpiomux_config *cfg = msm_gpiomux_configs + gpio; - unsigned long irq_flags; - - if (gpio >= GPIOMUX_NGPIOS) - return -EINVAL; - - spin_lock_irqsave(&gpiomux_lock, irq_flags); - BUG_ON(cfg->ref == 0); - if (--cfg->ref == 0 && cfg->suspended & GPIOMUX_VALID) - __msm_gpiomux_write(gpio, cfg->suspended); - spin_unlock_irqrestore(&gpiomux_lock, irq_flags); - return 0; -} -EXPORT_SYMBOL(msm_gpiomux_put); - -static int __init gpiomux_init(void) -{ - unsigned n; - - for (n = 0; n < GPIOMUX_NGPIOS; ++n) { - msm_gpiomux_configs[n].ref = 0; - if (!(msm_gpiomux_configs[n].suspended & GPIOMUX_VALID)) - continue; - __msm_gpiomux_write(n, msm_gpiomux_configs[n].suspended); - } - return 0; -} -postcore_initcall(gpiomux_init); diff --git a/arch/arm/mach-msm/gpiomux.h b/arch/arm/mach-msm/gpiomux.h deleted file mode 100644 index 4410d7766f93..000000000000 --- a/arch/arm/mach-msm/gpiomux.h +++ /dev/null @@ -1,84 +0,0 @@ -/* Copyright (c) 2010, Code Aurora Forum. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA - * 02110-1301, USA. - */ -#ifndef __ARCH_ARM_MACH_MSM_GPIOMUX_H -#define __ARCH_ARM_MACH_MSM_GPIOMUX_H - -#include -#include -#include -#include "gpiomux-v1.h" - -/** - * struct msm_gpiomux_config: gpiomux settings for one gpio line. - * - * A complete gpiomux config is the bitwise-or of a drive-strength, - * function, and pull. For functions other than GPIO, the OE - * is hard-wired according to the function. For GPIO mode, - * OE is controlled by gpiolib. - * - * Available settings differ by target; see the gpiomux header - * specific to your target arch for available configurations. - * - * @active: The configuration to be installed when the line is - * active, or its reference count is > 0. - * @suspended: The configuration to be installed when the line - * is suspended, or its reference count is 0. - * @ref: The reference count of the line. For internal use of - * the gpiomux framework only. - */ -struct msm_gpiomux_config { - gpiomux_config_t active; - gpiomux_config_t suspended; - unsigned ref; -}; - -/** - * @GPIOMUX_VALID: If set, the config field contains 'good data'. - * The absence of this bit will prevent the gpiomux - * system from applying the configuration under all - * circumstances. - */ -enum { - GPIOMUX_VALID = BIT(sizeof(gpiomux_config_t) * BITS_PER_BYTE - 1), - GPIOMUX_CTL_MASK = GPIOMUX_VALID, -}; - -#ifdef CONFIG_MSM_GPIOMUX - -/* Each architecture must provide its own instance of this table. - * To avoid having gpiomux manage any given gpio, one or both of - * the entries can avoid setting GPIOMUX_VALID - the absence - * of that flag will prevent the configuration from being applied - * during state transitions. - */ -extern struct msm_gpiomux_config msm_gpiomux_configs[GPIOMUX_NGPIOS]; - -/* Install a new configuration to the gpio line. To avoid overwriting - * a configuration, leave the VALID bit out. - */ -int msm_gpiomux_write(unsigned gpio, - gpiomux_config_t active, - gpiomux_config_t suspended); -#else -static inline int msm_gpiomux_write(unsigned gpio, - gpiomux_config_t active, - gpiomux_config_t suspended) -{ - return -ENOSYS; -} -#endif -#endif diff --git a/arch/arm/mach-msm/include/mach/clk.h b/arch/arm/mach-msm/include/mach/clk.h deleted file mode 100644 index fd4f4a7a83b3..000000000000 --- a/arch/arm/mach-msm/include/mach/clk.h +++ /dev/null @@ -1,31 +0,0 @@ -/* Copyright (c) 2009, Code Aurora Forum. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ -#ifndef __MACH_CLK_H -#define __MACH_CLK_H - -/* Magic rate value for use with PM QOS to request the board's maximum - * supported AXI rate. PM QOS will only pass positive s32 rate values - * through to the clock driver, so INT_MAX is used. - */ -#define MSM_AXI_MAX_FREQ LONG_MAX - -enum clk_reset_action { - CLK_RESET_DEASSERT = 0, - CLK_RESET_ASSERT = 1 -}; - -struct clk; - -/* Assert/Deassert reset to a hardware block associated with a clock */ -int clk_reset(struct clk *clk, enum clk_reset_action action); - -#endif diff --git a/arch/arm/mach-msm/include/mach/dma.h b/arch/arm/mach-msm/include/mach/dma.h deleted file mode 100644 index a72d48d42342..000000000000 --- a/arch/arm/mach-msm/include/mach/dma.h +++ /dev/null @@ -1,151 +0,0 @@ -/* linux/include/asm-arm/arch-msm/dma.h - * - * Copyright (C) 2007 Google, Inc. - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#ifndef __ASM_ARCH_MSM_DMA_H - -#include - -struct msm_dmov_errdata { - uint32_t flush[6]; -}; - -struct msm_dmov_cmd { - struct list_head list; - unsigned int cmdptr; - void (*complete_func)(struct msm_dmov_cmd *cmd, - unsigned int result, - struct msm_dmov_errdata *err); - void (*execute_func)(struct msm_dmov_cmd *cmd); - void *data; -}; - -#ifndef CONFIG_ARCH_MSM8X60 -void msm_dmov_enqueue_cmd(unsigned id, struct msm_dmov_cmd *cmd); -void msm_dmov_stop_cmd(unsigned id, struct msm_dmov_cmd *cmd, int graceful); -int msm_dmov_exec_cmd(unsigned id, unsigned int cmdptr); -#else -static inline -void msm_dmov_enqueue_cmd(unsigned id, struct msm_dmov_cmd *cmd) { } -static inline -void msm_dmov_stop_cmd(unsigned id, struct msm_dmov_cmd *cmd, int graceful) { } -static inline -int msm_dmov_exec_cmd(unsigned id, unsigned int cmdptr) { return -EIO; } -#endif - -#define DMOV_CMD_LIST (0 << 29) /* does not work */ -#define DMOV_CMD_PTR_LIST (1 << 29) /* works */ -#define DMOV_CMD_INPUT_CFG (2 << 29) /* untested */ -#define DMOV_CMD_OUTPUT_CFG (3 << 29) /* untested */ -#define DMOV_CMD_ADDR(addr) ((addr) >> 3) - -#define DMOV_RSLT_VALID (1 << 31) /* 0 == host has empties result fifo */ -#define DMOV_RSLT_ERROR (1 << 3) -#define DMOV_RSLT_FLUSH (1 << 2) -#define DMOV_RSLT_DONE (1 << 1) /* top pointer done */ -#define DMOV_RSLT_USER (1 << 0) /* command with FR force result */ - -#define DMOV_STATUS_RSLT_COUNT(n) (((n) >> 29)) -#define DMOV_STATUS_CMD_COUNT(n) (((n) >> 27) & 3) -#define DMOV_STATUS_RSLT_VALID (1 << 1) -#define DMOV_STATUS_CMD_PTR_RDY (1 << 0) - -#define DMOV_CONFIG_FORCE_TOP_PTR_RSLT (1 << 2) -#define DMOV_CONFIG_FORCE_FLUSH_RSLT (1 << 1) -#define DMOV_CONFIG_IRQ_EN (1 << 0) - -/* channel assignments */ - -#define DMOV_NAND_CHAN 7 -#define DMOV_NAND_CRCI_CMD 5 -#define DMOV_NAND_CRCI_DATA 4 - -#define DMOV_SDC1_CHAN 8 -#define DMOV_SDC1_CRCI 6 - -#define DMOV_SDC2_CHAN 8 -#define DMOV_SDC2_CRCI 7 - -#define DMOV_TSIF_CHAN 10 -#define DMOV_TSIF_CRCI 10 - -#define DMOV_USB_CHAN 11 - -/* no client rate control ifc (eg, ram) */ -#define DMOV_NONE_CRCI 0 - - -/* If the CMD_PTR register has CMD_PTR_LIST selected, the data mover - * is going to walk a list of 32bit pointers as described below. Each - * pointer points to a *array* of dmov_s, etc structs. The last pointer - * in the list is marked with CMD_PTR_LP. The last struct in each array - * is marked with CMD_LC (see below). - */ -#define CMD_PTR_ADDR(addr) ((addr) >> 3) -#define CMD_PTR_LP (1 << 31) /* last pointer */ -#define CMD_PTR_PT (3 << 29) /* ? */ - -/* Single Item Mode */ -typedef struct { - unsigned cmd; - unsigned src; - unsigned dst; - unsigned len; -} dmov_s; - -/* Scatter/Gather Mode */ -typedef struct { - unsigned cmd; - unsigned src_dscr; - unsigned dst_dscr; - unsigned _reserved; -} dmov_sg; - -/* Box mode */ -typedef struct { - uint32_t cmd; - uint32_t src_row_addr; - uint32_t dst_row_addr; - uint32_t src_dst_len; - uint32_t num_rows; - uint32_t row_offset; -} dmov_box; - -/* bits for the cmd field of the above structures */ - -#define CMD_LC (1 << 31) /* last command */ -#define CMD_FR (1 << 22) /* force result -- does not work? */ -#define CMD_OCU (1 << 21) /* other channel unblock */ -#define CMD_OCB (1 << 20) /* other channel block */ -#define CMD_TCB (1 << 19) /* ? */ -#define CMD_DAH (1 << 18) /* destination address hold -- does not work?*/ -#define CMD_SAH (1 << 17) /* source address hold -- does not work? */ - -#define CMD_MODE_SINGLE (0 << 0) /* dmov_s structure used */ -#define CMD_MODE_SG (1 << 0) /* untested */ -#define CMD_MODE_IND_SG (2 << 0) /* untested */ -#define CMD_MODE_BOX (3 << 0) /* untested */ - -#define CMD_DST_SWAP_BYTES (1 << 14) /* exchange each byte n with byte n+1 */ -#define CMD_DST_SWAP_SHORTS (1 << 15) /* exchange each short n with short n+1 */ -#define CMD_DST_SWAP_WORDS (1 << 16) /* exchange each word n with word n+1 */ - -#define CMD_SRC_SWAP_BYTES (1 << 11) /* exchange each byte n with byte n+1 */ -#define CMD_SRC_SWAP_SHORTS (1 << 12) /* exchange each short n with short n+1 */ -#define CMD_SRC_SWAP_WORDS (1 << 13) /* exchange each word n with word n+1 */ - -#define CMD_DST_CRCI(n) (((n) & 15) << 7) -#define CMD_SRC_CRCI(n) (((n) & 15) << 3) - -#endif diff --git a/arch/arm/mach-msm/include/mach/entry-macro.S b/arch/arm/mach-msm/include/mach/entry-macro.S deleted file mode 100644 index f2ae9087f654..000000000000 --- a/arch/arm/mach-msm/include/mach/entry-macro.S +++ /dev/null @@ -1,36 +0,0 @@ -/* Copyright (c) 2010, Code Aurora Forum. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA - * 02110-1301, USA. - * - */ - -#if !defined(CONFIG_ARM_GIC) -#include - - .macro get_irqnr_preamble, base, tmp - @ enable imprecise aborts - cpsie a - mov \base, #MSM_VIC_BASE - .endm - - .macro get_irqnr_and_base, irqnr, irqstat, base, tmp - @ 0xD0 has irq# or old irq# if the irq has been handled - @ 0xD4 has irq# or -1 if none pending *but* if you just - @ read 0xD4 you never get the first irq for some reason - ldr \irqnr, [\base, #0xD0] - ldr \irqnr, [\base, #0xD4] - cmp \irqnr, #0xffffffff - .endm -#endif diff --git a/arch/arm/mach-msm/include/mach/hardware.h b/arch/arm/mach-msm/include/mach/hardware.h deleted file mode 100644 index 2d126091ae41..000000000000 --- a/arch/arm/mach-msm/include/mach/hardware.h +++ /dev/null @@ -1,18 +0,0 @@ -/* arch/arm/mach-msm/include/mach/hardware.h - * - * Copyright (C) 2007 Google, Inc. - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#ifndef __ASM_ARCH_MSM_HARDWARE_H - -#endif diff --git a/arch/arm/mach-msm/include/mach/irqs-7x00.h b/arch/arm/mach-msm/include/mach/irqs-7x00.h deleted file mode 100644 index f1fe70612fe9..000000000000 --- a/arch/arm/mach-msm/include/mach/irqs-7x00.h +++ /dev/null @@ -1,75 +0,0 @@ -/* - * Copyright (C) 2007 Google, Inc. - * Copyright (c) 2009, Code Aurora Forum. All rights reserved. - * Author: Brian Swetland - */ - -#ifndef __ASM_ARCH_MSM_IRQS_7X00_H -#define __ASM_ARCH_MSM_IRQS_7X00_H - -/* MSM ARM11 Interrupt Numbers */ -/* See 80-VE113-1 A, pp219-221 */ - -#define INT_A9_M2A_0 0 -#define INT_A9_M2A_1 1 -#define INT_A9_M2A_2 2 -#define INT_A9_M2A_3 3 -#define INT_A9_M2A_4 4 -#define INT_A9_M2A_5 5 -#define INT_A9_M2A_6 6 -#define INT_GP_TIMER_EXP 7 -#define INT_DEBUG_TIMER_EXP 8 -#define INT_UART1 9 -#define INT_UART2 10 -#define INT_UART3 11 -#define INT_UART1_RX 12 -#define INT_UART2_RX 13 -#define INT_UART3_RX 14 -#define INT_USB_OTG 15 -#define INT_MDDI_PRI 16 -#define INT_MDDI_EXT 17 -#define INT_MDDI_CLIENT 18 -#define INT_MDP 19 -#define INT_GRAPHICS 20 -#define INT_ADM_AARM 21 -#define INT_ADSP_A11 22 -#define INT_ADSP_A9_A11 23 -#define INT_SDC1_0 24 -#define INT_SDC1_1 25 -#define INT_SDC2_0 26 -#define INT_SDC2_1 27 -#define INT_KEYSENSE 28 -#define INT_TCHSCRN_SSBI 29 -#define INT_TCHSCRN1 30 -#define INT_TCHSCRN2 31 - -#define INT_GPIO_GROUP1 (32 + 0) -#define INT_GPIO_GROUP2 (32 + 1) -#define INT_PWB_I2C (32 + 2) -#define INT_SOFTRESET (32 + 3) -#define INT_NAND_WR_ER_DONE (32 + 4) -#define INT_NAND_OP_DONE (32 + 5) -#define INT_PBUS_ARM11 (32 + 6) -#define INT_AXI_MPU_SMI (32 + 7) -#define INT_AXI_MPU_EBI1 (32 + 8) -#define INT_AD_HSSD (32 + 9) -#define INT_ARM11_PMU (32 + 10) -#define INT_ARM11_DMA (32 + 11) -#define INT_TSIF_IRQ (32 + 12) -#define INT_UART1DM_IRQ (32 + 13) -#define INT_UART1DM_RX (32 + 14) -#define INT_USB_HS (32 + 15) -#define INT_SDC3_0 (32 + 16) -#define INT_SDC3_1 (32 + 17) -#define INT_SDC4_0 (32 + 18) -#define INT_SDC4_1 (32 + 19) -#define INT_UART2DM_RX (32 + 20) -#define INT_UART2DM_IRQ (32 + 21) - -/* 22-31 are reserved */ - -#define NR_MSM_IRQS 64 -#define NR_GPIO_IRQS 122 -#define NR_BOARD_IRQS 64 - -#endif diff --git a/arch/arm/mach-msm/include/mach/irqs-7x30.h b/arch/arm/mach-msm/include/mach/irqs-7x30.h deleted file mode 100644 index 1f15902655fd..000000000000 --- a/arch/arm/mach-msm/include/mach/irqs-7x30.h +++ /dev/null @@ -1,153 +0,0 @@ -/* Copyright (c) 2009, Code Aurora Forum. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef __ASM_ARCH_MSM_IRQS_7X30_H -#define __ASM_ARCH_MSM_IRQS_7X30_H - -/* MSM ACPU Interrupt Numbers */ - -#define INT_DEBUG_TIMER_EXP 0 -#define INT_GPT0_TIMER_EXP 1 -#define INT_GPT1_TIMER_EXP 2 -#define INT_WDT0_ACCSCSSBARK 3 -#define INT_WDT1_ACCSCSSBARK 4 -#define INT_AVS_SVIC 5 -#define INT_AVS_SVIC_SW_DONE 6 -#define INT_SC_DBG_RX_FULL 7 -#define INT_SC_DBG_TX_EMPTY 8 -#define INT_ARM11_PM 9 -#define INT_AVS_REQ_DOWN 10 -#define INT_AVS_REQ_UP 11 -#define INT_SC_ACG 12 -/* SCSS_VICFIQSTS0[13:15] are RESERVED */ -#define INT_L2_SVICCPUIRPTREQ 16 -#define INT_L2_SVICDMANSIRPTREQ 17 -#define INT_L2_SVICDMASIRPTREQ 18 -#define INT_L2_SVICSLVIRPTREQ 19 -#define INT_AD5A_MPROC_APPS_0 20 -#define INT_AD5A_MPROC_APPS_1 21 -#define INT_A9_M2A_0 22 -#define INT_A9_M2A_1 23 -#define INT_A9_M2A_2 24 -#define INT_A9_M2A_3 25 -#define INT_A9_M2A_4 26 -#define INT_A9_M2A_5 27 -#define INT_A9_M2A_6 28 -#define INT_A9_M2A_7 29 -#define INT_A9_M2A_8 30 -#define INT_A9_M2A_9 31 - -#define INT_AXI_EBI1_SC (32 + 0) -#define INT_IMEM_ERR (32 + 1) -#define INT_AXI_EBI0_SC (32 + 2) -#define INT_PBUS_SC_IRQC (32 + 3) -#define INT_PERPH_BUS_BPM (32 + 4) -#define INT_CC_TEMP_SENSE (32 + 5) -#define INT_UXMC_EBI0 (32 + 6) -#define INT_UXMC_EBI1 (32 + 7) -#define INT_EBI2_OP_DONE (32 + 8) -#define INT_EBI2_WR_ER_DONE (32 + 9) -#define INT_TCSR_SPSS_CE (32 + 10) -#define INT_EMDH (32 + 11) -#define INT_PMDH (32 + 12) -#define INT_MDC (32 + 13) -#define INT_MIDI_TO_SUPSS (32 + 14) -#define INT_LPA_2 (32 + 15) -#define INT_GPIO_GROUP1_SECURE (32 + 16) -#define INT_GPIO_GROUP2_SECURE (32 + 17) -#define INT_GPIO_GROUP1 (32 + 18) -#define INT_GPIO_GROUP2 (32 + 19) -#define INT_MPRPH_SOFTRESET (32 + 20) -#define INT_PWB_I2C (32 + 21) -#define INT_PWB_I2C_2 (32 + 22) -#define INT_TSSC_SAMPLE (32 + 23) -#define INT_TSSC_PENUP (32 + 24) -#define INT_TCHSCRN_SSBI (32 + 25) -#define INT_FM_RDS (32 + 26) -#define INT_KEYSENSE (32 + 27) -#define INT_USB_OTG_HS (32 + 28) -#define INT_USB_OTG_HS2 (32 + 29) -#define INT_USB_OTG_HS3 (32 + 30) -#define INT_CSI (32 + 31) - -#define INT_SPI_OUTPUT (64 + 0) -#define INT_SPI_INPUT (64 + 1) -#define INT_SPI_ERROR (64 + 2) -#define INT_UART1 (64 + 3) -#define INT_UART1_RX (64 + 4) -#define INT_UART2 (64 + 5) -#define INT_UART2_RX (64 + 6) -#define INT_UART3 (64 + 7) -#define INT_UART3_RX (64 + 8) -#define INT_UART1DM_IRQ (64 + 9) -#define INT_UART1DM_RX (64 + 10) -#define INT_UART2DM_IRQ (64 + 11) -#define INT_UART2DM_RX (64 + 12) -#define INT_TSIF (64 + 13) -#define INT_ADM_SC1 (64 + 14) -#define INT_ADM_SC2 (64 + 15) -#define INT_MDP (64 + 16) -#define INT_VPE (64 + 17) -#define INT_GRP_2D (64 + 18) -#define INT_GRP_3D (64 + 19) -#define INT_ROTATOR (64 + 20) -#define INT_MFC720 (64 + 21) -#define INT_JPEG (64 + 22) -#define INT_VFE (64 + 23) -#define INT_TV_ENC (64 + 24) -#define INT_PMIC_SSBI (64 + 25) -#define INT_MPM_1 (64 + 26) -#define INT_TCSR_SPSS_SAMPLE (64 + 27) -#define INT_TCSR_SPSS_PENUP (64 + 28) -#define INT_MPM_2 (64 + 29) -#define INT_SDC1_0 (64 + 30) -#define INT_SDC1_1 (64 + 31) - -#define INT_SDC3_0 (96 + 0) -#define INT_SDC3_1 (96 + 1) -#define INT_SDC2_0 (96 + 2) -#define INT_SDC2_1 (96 + 3) -#define INT_SDC4_0 (96 + 4) -#define INT_SDC4_1 (96 + 5) -#define INT_PWB_QUP_IN (96 + 6) -#define INT_PWB_QUP_OUT (96 + 7) -#define INT_PWB_QUP_ERR (96 + 8) -#define INT_SCSS_WDT0_BITE (96 + 9) -/* SCSS_VICFIQSTS3[10:31] are RESERVED */ - -/* Retrofit universal macro names */ -#define INT_ADM_AARM INT_ADM_SC2 -#define INT_USB_HS INT_USB_OTG_HS -#define INT_USB_OTG INT_USB_OTG_HS -#define INT_TCHSCRN1 INT_TSSC_SAMPLE -#define INT_TCHSCRN2 INT_TSSC_PENUP -#define INT_GP_TIMER_EXP INT_GPT0_TIMER_EXP -#define INT_ADSP_A11 INT_AD5A_MPROC_APPS_0 -#define INT_ADSP_A9_A11 INT_AD5A_MPROC_APPS_1 -#define INT_MDDI_EXT INT_EMDH -#define INT_MDDI_PRI INT_PMDH -#define INT_MDDI_CLIENT INT_MDC -#define INT_NAND_WR_ER_DONE INT_EBI2_WR_ER_DONE -#define INT_NAND_OP_DONE INT_EBI2_OP_DONE - -#define NR_MSM_IRQS 128 -#define NR_GPIO_IRQS 182 -#define PMIC8058_IRQ_BASE (NR_MSM_IRQS + NR_GPIO_IRQS) -#define NR_PMIC8058_GPIO_IRQS 40 -#define NR_PMIC8058_MPP_IRQS 12 -#define NR_PMIC8058_MISC_IRQS 8 -#define NR_PMIC8058_IRQS (NR_PMIC8058_GPIO_IRQS +\ - NR_PMIC8058_MPP_IRQS +\ - NR_PMIC8058_MISC_IRQS) -#define NR_BOARD_IRQS NR_PMIC8058_IRQS - -#endif /* __ASM_ARCH_MSM_IRQS_7X30_H */ diff --git a/arch/arm/mach-msm/include/mach/irqs-8x50.h b/arch/arm/mach-msm/include/mach/irqs-8x50.h deleted file mode 100644 index 26adbe0e9406..000000000000 --- a/arch/arm/mach-msm/include/mach/irqs-8x50.h +++ /dev/null @@ -1,88 +0,0 @@ -/* Copyright (c) 2008-2009, Code Aurora Forum. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef __ASM_ARCH_MSM_IRQS_8XXX_H -#define __ASM_ARCH_MSM_IRQS_8XXX_H - -/* MSM ACPU Interrupt Numbers */ - -#define INT_A9_M2A_0 0 -#define INT_A9_M2A_1 1 -#define INT_A9_M2A_2 2 -#define INT_A9_M2A_3 3 -#define INT_A9_M2A_4 4 -#define INT_A9_M2A_5 5 -#define INT_A9_M2A_6 6 -#define INT_GP_TIMER_EXP 7 -#define INT_DEBUG_TIMER_EXP 8 -#define INT_SIRC_0 9 -#define INT_SDC3_0 10 -#define INT_SDC3_1 11 -#define INT_SDC4_0 12 -#define INT_SDC4_1 13 -#define INT_AD6_EXT_VFR 14 -#define INT_USB_OTG 15 -#define INT_MDDI_PRI 16 -#define INT_MDDI_EXT 17 -#define INT_MDDI_CLIENT 18 -#define INT_MDP 19 -#define INT_GRAPHICS 20 -#define INT_ADM_AARM 21 -#define INT_ADSP_A11 22 -#define INT_ADSP_A9_A11 23 -#define INT_SDC1_0 24 -#define INT_SDC1_1 25 -#define INT_SDC2_0 26 -#define INT_SDC2_1 27 -#define INT_KEYSENSE 28 -#define INT_TCHSCRN_SSBI 29 -#define INT_TCHSCRN1 30 -#define INT_TCHSCRN2 31 - -#define INT_TCSR_MPRPH_SC1 (32 + 0) -#define INT_USB_FS2 (32 + 1) -#define INT_PWB_I2C (32 + 2) -#define INT_SOFTRESET (32 + 3) -#define INT_NAND_WR_ER_DONE (32 + 4) -#define INT_NAND_OP_DONE (32 + 5) -#define INT_TCSR_MPRPH_SC2 (32 + 6) -#define INT_OP_PEN (32 + 7) -#define INT_AD_HSSD (32 + 8) -#define INT_ARM11_PM (32 + 9) -#define INT_SDMA_NON_SECURE (32 + 10) -#define INT_TSIF_IRQ (32 + 11) -#define INT_UART1DM_IRQ (32 + 12) -#define INT_UART1DM_RX (32 + 13) -#define INT_SDMA_SECURE (32 + 14) -#define INT_SI2S_SLAVE (32 + 15) -#define INT_SC_I2CPU (32 + 16) -#define INT_SC_DBG_RDTRFULL (32 + 17) -#define INT_SC_DBG_WDTRFULL (32 + 18) -#define INT_SCPLL_CTL_DONE (32 + 19) -#define INT_UART2DM_IRQ (32 + 20) -#define INT_UART2DM_RX (32 + 21) -#define INT_VDC_MEC (32 + 22) -#define INT_VDC_DB (32 + 23) -#define INT_VDC_AXI (32 + 24) -#define INT_VFE (32 + 25) -#define INT_USB_HS (32 + 26) -#define INT_AUDIO_OUT0 (32 + 27) -#define INT_AUDIO_OUT1 (32 + 28) -#define INT_CRYPTO (32 + 29) -#define INT_AD6M_IDLE (32 + 30) -#define INT_SIRC_1 (32 + 31) - -#define NR_GPIO_IRQS 165 -#define NR_MSM_IRQS 64 -#define NR_BOARD_IRQS 64 - -#endif diff --git a/arch/arm/mach-msm/include/mach/irqs.h b/arch/arm/mach-msm/include/mach/irqs.h deleted file mode 100644 index 164d355c96ea..000000000000 --- a/arch/arm/mach-msm/include/mach/irqs.h +++ /dev/null @@ -1,37 +0,0 @@ -/* - * Copyright (C) 2007 Google, Inc. - * Copyright (c) 2008-2010, Code Aurora Forum. All rights reserved. - * Author: Brian Swetland - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#ifndef __ASM_ARCH_MSM_IRQS_H -#define __ASM_ARCH_MSM_IRQS_H - -#define MSM_IRQ_BIT(irq) (1 << ((irq) & 31)) - -#if defined(CONFIG_ARCH_MSM7X30) -#include "irqs-7x30.h" -#elif defined(CONFIG_ARCH_QSD8X50) -#include "irqs-8x50.h" -#include "sirc.h" -#elif defined(CONFIG_ARCH_MSM_ARM11) -#include "irqs-7x00.h" -#else -#error "Unknown architecture specification" -#endif - -#define NR_IRQS (NR_MSM_IRQS + NR_GPIO_IRQS + NR_BOARD_IRQS) -#define MSM_GPIO_TO_INT(n) (NR_MSM_IRQS + (n)) -#define MSM_INT_TO_REG(base, irq) (base + irq / 32) - -#endif diff --git a/arch/arm/mach-msm/include/mach/msm_gpiomux.h b/arch/arm/mach-msm/include/mach/msm_gpiomux.h deleted file mode 100644 index 0c7d3936e02f..000000000000 --- a/arch/arm/mach-msm/include/mach/msm_gpiomux.h +++ /dev/null @@ -1,38 +0,0 @@ -/* Copyright (c) 2011, Code Aurora Forum. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef _LINUX_MSM_GPIOMUX_H -#define _LINUX_MSM_GPIOMUX_H - -#ifdef CONFIG_MSM_GPIOMUX - -/* Increment a gpio's reference count, possibly activating the line. */ -int __must_check msm_gpiomux_get(unsigned gpio); - -/* Decrement a gpio's reference count, possibly suspending the line. */ -int msm_gpiomux_put(unsigned gpio); - -#else - -static inline int __must_check msm_gpiomux_get(unsigned gpio) -{ - return -ENOSYS; -} - -static inline int msm_gpiomux_put(unsigned gpio) -{ - return -ENOSYS; -} - -#endif - -#endif /* _LINUX_MSM_GPIOMUX_H */ diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-7x00.h b/arch/arm/mach-msm/include/mach/msm_iomap-7x00.h deleted file mode 100644 index 67dc0e98b958..000000000000 --- a/arch/arm/mach-msm/include/mach/msm_iomap-7x00.h +++ /dev/null @@ -1,108 +0,0 @@ -/* arch/arm/mach-msm/include/mach/msm_iomap.h - * - * Copyright (C) 2007 Google, Inc. - * Copyright (c) 2011, Code Aurora Forum. All rights reserved. - * Author: Brian Swetland - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * - * The MSM peripherals are spread all over across 768MB of physical - * space, which makes just having a simple IO_ADDRESS macro to slide - * them into the right virtual location rough. Instead, we will - * provide a master phys->virt mapping for peripherals here. - * - */ - -#ifndef __ASM_ARCH_MSM_IOMAP_7X00_H -#define __ASM_ARCH_MSM_IOMAP_7X00_H - -#include - -/* Physical base address and size of peripherals. - * Ordered by the virtual base addresses they will be mapped at. - * - * MSM_VIC_BASE must be an value that can be loaded via a "mov" - * instruction, otherwise entry-macro.S will not compile. - * - * If you add or remove entries here, you'll want to edit the - * msm_io_desc array in arch/arm/mach-msm/io.c to reflect your - * changes. - * - */ - -#define MSM_VIC_BASE IOMEM(0xE0000000) -#define MSM_VIC_PHYS 0xC0000000 -#define MSM_VIC_SIZE SZ_4K - -#define MSM7X00_CSR_PHYS 0xC0100000 -#define MSM7X00_CSR_SIZE SZ_4K - -#define MSM_DMOV_BASE IOMEM(0xE0002000) -#define MSM_DMOV_PHYS 0xA9700000 -#define MSM_DMOV_SIZE SZ_4K - -#define MSM7X00_GPIO1_PHYS 0xA9200000 -#define MSM7X00_GPIO1_SIZE SZ_4K - -#define MSM7X00_GPIO2_PHYS 0xA9300000 -#define MSM7X00_GPIO2_SIZE SZ_4K - -#define MSM_CLK_CTL_BASE IOMEM(0xE0005000) -#define MSM_CLK_CTL_PHYS 0xA8600000 -#define MSM_CLK_CTL_SIZE SZ_4K - -#define MSM_SHARED_RAM_BASE IOMEM(0xE0100000) -#define MSM_SHARED_RAM_PHYS 0x01F00000 -#define MSM_SHARED_RAM_SIZE SZ_1M - -#define MSM_UART1_PHYS 0xA9A00000 -#define MSM_UART1_SIZE SZ_4K - -#define MSM_UART2_PHYS 0xA9B00000 -#define MSM_UART2_SIZE SZ_4K - -#define MSM_UART3_PHYS 0xA9C00000 -#define MSM_UART3_SIZE SZ_4K - -#define MSM_SDC1_PHYS 0xA0400000 -#define MSM_SDC1_SIZE SZ_4K - -#define MSM_SDC2_PHYS 0xA0500000 -#define MSM_SDC2_SIZE SZ_4K - -#define MSM_SDC3_PHYS 0xA0600000 -#define MSM_SDC3_SIZE SZ_4K - -#define MSM_SDC4_PHYS 0xA0700000 -#define MSM_SDC4_SIZE SZ_4K - -#define MSM_I2C_PHYS 0xA9900000 -#define MSM_I2C_SIZE SZ_4K - -#define MSM_HSUSB_PHYS 0xA0800000 -#define MSM_HSUSB_SIZE SZ_4K - -#define MSM_PMDH_PHYS 0xAA600000 -#define MSM_PMDH_SIZE SZ_4K - -#define MSM_EMDH_PHYS 0xAA700000 -#define MSM_EMDH_SIZE SZ_4K - -#define MSM_MDP_PHYS 0xAA200000 -#define MSM_MDP_SIZE 0x000F0000 - -#define MSM_MDC_PHYS 0xAA500000 -#define MSM_MDC_SIZE SZ_1M - -#define MSM_AD5_PHYS 0xAC000000 -#define MSM_AD5_SIZE (SZ_1M*13) - -#endif diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-7x30.h b/arch/arm/mach-msm/include/mach/msm_iomap-7x30.h deleted file mode 100644 index 198202c267c8..000000000000 --- a/arch/arm/mach-msm/include/mach/msm_iomap-7x30.h +++ /dev/null @@ -1,103 +0,0 @@ -/* - * Copyright (C) 2007 Google, Inc. - * Copyright (c) 2008-2011 Code Aurora Forum. All rights reserved. - * Author: Brian Swetland - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * - * The MSM peripherals are spread all over across 768MB of physical - * space, which makes just having a simple IO_ADDRESS macro to slide - * them into the right virtual location rough. Instead, we will - * provide a master phys->virt mapping for peripherals here. - * - */ - -#ifndef __ASM_ARCH_MSM_IOMAP_7X30_H -#define __ASM_ARCH_MSM_IOMAP_7X30_H - -/* Physical base address and size of peripherals. - * Ordered by the virtual base addresses they will be mapped at. - * - * MSM_VIC_BASE must be an value that can be loaded via a "mov" - * instruction, otherwise entry-macro.S will not compile. - * - * If you add or remove entries here, you'll want to edit the - * msm_io_desc array in arch/arm/mach-msm/io.c to reflect your - * changes. - * - */ - -#define MSM_VIC_BASE IOMEM(0xE0000000) -#define MSM_VIC_PHYS 0xC0080000 -#define MSM_VIC_SIZE SZ_4K - -#define MSM7X30_CSR_PHYS 0xC0100000 -#define MSM7X30_CSR_SIZE SZ_4K - -#define MSM_DMOV_BASE IOMEM(0xE0002000) -#define MSM_DMOV_PHYS 0xAC400000 -#define MSM_DMOV_SIZE SZ_4K - -#define MSM7X30_GPIO1_PHYS 0xAC001000 -#define MSM7X30_GPIO1_SIZE SZ_4K - -#define MSM7X30_GPIO2_PHYS 0xAC101000 -#define MSM7X30_GPIO2_SIZE SZ_4K - -#define MSM_CLK_CTL_BASE IOMEM(0xE0005000) -#define MSM_CLK_CTL_PHYS 0xAB800000 -#define MSM_CLK_CTL_SIZE SZ_4K - -#define MSM_CLK_CTL_SH2_BASE IOMEM(0xE0006000) -#define MSM_CLK_CTL_SH2_PHYS 0xABA01000 -#define MSM_CLK_CTL_SH2_SIZE SZ_4K - -#define MSM_ACC_BASE IOMEM(0xE0007000) -#define MSM_ACC_PHYS 0xC0101000 -#define MSM_ACC_SIZE SZ_4K - -#define MSM_SAW_BASE IOMEM(0xE0008000) -#define MSM_SAW_PHYS 0xC0102000 -#define MSM_SAW_SIZE SZ_4K - -#define MSM_GCC_BASE IOMEM(0xE0009000) -#define MSM_GCC_PHYS 0xC0182000 -#define MSM_GCC_SIZE SZ_4K - -#define MSM_TCSR_BASE IOMEM(0xE000A000) -#define MSM_TCSR_PHYS 0xAB600000 -#define MSM_TCSR_SIZE SZ_4K - -#define MSM_SHARED_RAM_BASE IOMEM(0xE0100000) -#define MSM_SHARED_RAM_PHYS 0x00100000 -#define MSM_SHARED_RAM_SIZE SZ_1M - -#define MSM_UART1_PHYS 0xACA00000 -#define MSM_UART1_SIZE SZ_4K - -#define MSM_UART2_PHYS 0xACB00000 -#define MSM_UART2_SIZE SZ_4K - -#define MSM_UART3_PHYS 0xACC00000 -#define MSM_UART3_SIZE SZ_4K - -#define MSM_MDC_BASE IOMEM(0xE0200000) -#define MSM_MDC_PHYS 0xAA500000 -#define MSM_MDC_SIZE SZ_1M - -#define MSM_AD5_BASE IOMEM(0xE0300000) -#define MSM_AD5_PHYS 0xA7000000 -#define MSM_AD5_SIZE (SZ_1M*13) - -#define MSM_HSUSB_PHYS 0xA3600000 -#define MSM_HSUSB_SIZE SZ_1K - -#endif diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-8x50.h b/arch/arm/mach-msm/include/mach/msm_iomap-8x50.h deleted file mode 100644 index 0faa894729b7..000000000000 --- a/arch/arm/mach-msm/include/mach/msm_iomap-8x50.h +++ /dev/null @@ -1,125 +0,0 @@ -/* - * Copyright (C) 2007 Google, Inc. - * Copyright (c) 2008-2011 Code Aurora Forum. All rights reserved. - * Author: Brian Swetland - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * - * The MSM peripherals are spread all over across 768MB of physical - * space, which makes just having a simple IO_ADDRESS macro to slide - * them into the right virtual location rough. Instead, we will - * provide a master phys->virt mapping for peripherals here. - * - */ - -#ifndef __ASM_ARCH_MSM_IOMAP_8X50_H -#define __ASM_ARCH_MSM_IOMAP_8X50_H - -/* Physical base address and size of peripherals. - * Ordered by the virtual base addresses they will be mapped at. - * - * MSM_VIC_BASE must be an value that can be loaded via a "mov" - * instruction, otherwise entry-macro.S will not compile. - * - * If you add or remove entries here, you'll want to edit the - * msm_io_desc array in arch/arm/mach-msm/io.c to reflect your - * changes. - * - */ - -#define MSM_VIC_BASE IOMEM(0xE0000000) -#define MSM_VIC_PHYS 0xAC000000 -#define MSM_VIC_SIZE SZ_4K - -#define QSD8X50_CSR_PHYS 0xAC100000 -#define QSD8X50_CSR_SIZE SZ_4K - -#define MSM_DMOV_BASE IOMEM(0xE0002000) -#define MSM_DMOV_PHYS 0xA9700000 -#define MSM_DMOV_SIZE SZ_4K - -#define QSD8X50_GPIO1_PHYS 0xA9000000 -#define QSD8X50_GPIO1_SIZE SZ_4K - -#define QSD8X50_GPIO2_PHYS 0xA9100000 -#define QSD8X50_GPIO2_SIZE SZ_4K - -#define MSM_CLK_CTL_BASE IOMEM(0xE0005000) -#define MSM_CLK_CTL_PHYS 0xA8600000 -#define MSM_CLK_CTL_SIZE SZ_4K - -#define MSM_SIRC_BASE IOMEM(0xE1006000) -#define MSM_SIRC_PHYS 0xAC200000 -#define MSM_SIRC_SIZE SZ_4K - -#define MSM_SCPLL_BASE IOMEM(0xE1007000) -#define MSM_SCPLL_PHYS 0xA8800000 -#define MSM_SCPLL_SIZE SZ_4K - -#ifdef CONFIG_MSM_SOC_REV_A -#define MSM_SMI_BASE 0xE0000000 -#else -#define MSM_SMI_BASE 0x00000000 -#endif - -#define MSM_SHARED_RAM_BASE IOMEM(0xE0100000) -#define MSM_SHARED_RAM_PHYS (MSM_SMI_BASE + 0x00100000) -#define MSM_SHARED_RAM_SIZE SZ_1M - -#define MSM_UART1_PHYS 0xA9A00000 -#define MSM_UART1_SIZE SZ_4K - -#define MSM_UART2_PHYS 0xA9B00000 -#define MSM_UART2_SIZE SZ_4K - -#define MSM_UART3_PHYS 0xA9C00000 -#define MSM_UART3_SIZE SZ_4K - -#define MSM_MDC_BASE IOMEM(0xE0200000) -#define MSM_MDC_PHYS 0xAA500000 -#define MSM_MDC_SIZE SZ_1M - -#define MSM_AD5_BASE IOMEM(0xE0300000) -#define MSM_AD5_PHYS 0xAC000000 -#define MSM_AD5_SIZE (SZ_1M*13) - - -#define MSM_I2C_SIZE SZ_4K -#define MSM_I2C_PHYS 0xA9900000 - -#define MSM_HSUSB_PHYS 0xA0800000 -#define MSM_HSUSB_SIZE SZ_1K - -#define MSM_NAND_PHYS 0xA0A00000 - - -#define MSM_TSIF_PHYS (0xa0100000) -#define MSM_TSIF_SIZE (0x200) - -#define MSM_TSSC_PHYS 0xAA300000 - -#define MSM_UART1DM_PHYS 0xA0200000 -#define MSM_UART2DM_PHYS 0xA0900000 - - -#define MSM_SDC1_PHYS 0xA0300000 -#define MSM_SDC1_SIZE SZ_4K - -#define MSM_SDC2_PHYS 0xA0400000 -#define MSM_SDC2_SIZE SZ_4K - -#define MSM_SDC3_PHYS 0xA0500000 -#define MSM_SDC3_SIZE SZ_4K - -#define MSM_SDC4_PHYS 0xA0600000 -#define MSM_SDC4_SIZE SZ_4K - -#endif diff --git a/arch/arm/mach-msm/include/mach/msm_iomap.h b/arch/arm/mach-msm/include/mach/msm_iomap.h deleted file mode 100644 index 0e4f49157684..000000000000 --- a/arch/arm/mach-msm/include/mach/msm_iomap.h +++ /dev/null @@ -1,53 +0,0 @@ -/* - * Copyright (C) 2007 Google, Inc. - * Copyright (c) 2008-2011, Code Aurora Forum. All rights reserved. - * Author: Brian Swetland - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * - * The MSM peripherals are spread all over across 768MB of physical - * space, which makes just having a simple IO_ADDRESS macro to slide - * them into the right virtual location rough. Instead, we will - * provide a master phys->virt mapping for peripherals here. - * - */ - -#ifndef __ASM_ARCH_MSM_IOMAP_H -#define __ASM_ARCH_MSM_IOMAP_H - -#include - -/* Physical base address and size of peripherals. - * Ordered by the virtual base addresses they will be mapped at. - * - * MSM_VIC_BASE must be an value that can be loaded via a "mov" - * instruction, otherwise entry-macro.S will not compile. - * - * If you add or remove entries here, you'll want to edit the - * msm_io_desc array in arch/arm/mach-msm/io.c to reflect your - * changes. - * - */ - -#if defined(CONFIG_ARCH_MSM7X30) -#include "msm_iomap-7x30.h" -#elif defined(CONFIG_ARCH_QSD8X50) -#include "msm_iomap-8x50.h" -#else -#include "msm_iomap-7x00.h" -#endif - -/* Virtual addresses shared across all MSM targets. */ -#define MSM_CSR_BASE IOMEM(0xE0001000) -#define MSM_GPIO1_BASE IOMEM(0xE0003000) -#define MSM_GPIO2_BASE IOMEM(0xE0004000) - -#endif diff --git a/arch/arm/mach-msm/include/mach/msm_smd.h b/arch/arm/mach-msm/include/mach/msm_smd.h deleted file mode 100644 index 029463ec8756..000000000000 --- a/arch/arm/mach-msm/include/mach/msm_smd.h +++ /dev/null @@ -1,109 +0,0 @@ -/* linux/include/asm-arm/arch-msm/msm_smd.h - * - * Copyright (C) 2007 Google, Inc. - * Author: Brian Swetland - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#ifndef __ASM_ARCH_MSM_SMD_H -#define __ASM_ARCH_MSM_SMD_H - -typedef struct smd_channel smd_channel_t; - -extern int (*msm_check_for_modem_crash)(void); - -/* warning: notify() may be called before open returns */ -int smd_open(const char *name, smd_channel_t **ch, void *priv, - void (*notify)(void *priv, unsigned event)); - -#define SMD_EVENT_DATA 1 -#define SMD_EVENT_OPEN 2 -#define SMD_EVENT_CLOSE 3 - -int smd_close(smd_channel_t *ch); - -/* passing a null pointer for data reads and discards */ -int smd_read(smd_channel_t *ch, void *data, int len); - -/* Write to stream channels may do a partial write and return -** the length actually written. -** Write to packet channels will never do a partial write -- -** it will return the requested length written or an error. -*/ -int smd_write(smd_channel_t *ch, const void *data, int len); -int smd_write_atomic(smd_channel_t *ch, const void *data, int len); - -int smd_write_avail(smd_channel_t *ch); -int smd_read_avail(smd_channel_t *ch); - -/* Returns the total size of the current packet being read. -** Returns 0 if no packets available or a stream channel. -*/ -int smd_cur_packet_size(smd_channel_t *ch); - -/* used for tty unthrottling and the like -- causes the notify() -** callback to be called from the same lock context as is used -** when it is called from channel updates -*/ -void smd_kick(smd_channel_t *ch); - - -#if 0 -/* these are interruptable waits which will block you until the specified -** number of bytes are readable or writable. -*/ -int smd_wait_until_readable(smd_channel_t *ch, int bytes); -int smd_wait_until_writable(smd_channel_t *ch, int bytes); -#endif - -typedef enum { - SMD_PORT_DS = 0, - SMD_PORT_DIAG, - SMD_PORT_RPC_CALL, - SMD_PORT_RPC_REPLY, - SMD_PORT_BT, - SMD_PORT_CONTROL, - SMD_PORT_MEMCPY_SPARE1, - SMD_PORT_DATA1, - SMD_PORT_DATA2, - SMD_PORT_DATA3, - SMD_PORT_DATA4, - SMD_PORT_DATA5, - SMD_PORT_DATA6, - SMD_PORT_DATA7, - SMD_PORT_DATA8, - SMD_PORT_DATA9, - SMD_PORT_DATA10, - SMD_PORT_DATA11, - SMD_PORT_DATA12, - SMD_PORT_DATA13, - SMD_PORT_DATA14, - SMD_PORT_DATA15, - SMD_PORT_DATA16, - SMD_PORT_DATA17, - SMD_PORT_DATA18, - SMD_PORT_DATA19, - SMD_PORT_DATA20, - SMD_PORT_GPS_NMEA, - SMD_PORT_BRIDGE_1, - SMD_PORT_BRIDGE_2, - SMD_PORT_BRIDGE_3, - SMD_PORT_BRIDGE_4, - SMD_PORT_BRIDGE_5, - SMD_PORT_LOOPBACK, - SMD_PORT_CS_APPS_MODEM, - SMD_PORT_CS_APPS_DSP, - SMD_PORT_CS_MODEM_DSP, - SMD_NUM_PORTS, -} smd_port_id_type; - -#endif diff --git a/arch/arm/mach-msm/include/mach/sirc.h b/arch/arm/mach-msm/include/mach/sirc.h deleted file mode 100644 index ef55868a5b8a..000000000000 --- a/arch/arm/mach-msm/include/mach/sirc.h +++ /dev/null @@ -1,98 +0,0 @@ -/* Copyright (c) 2008-2009, Code Aurora Forum. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef __ASM_ARCH_MSM_SIRC_H -#define __ASM_ARCH_MSM_SIRC_H - -struct sirc_regs_t { - void *int_enable; - void *int_enable_clear; - void *int_enable_set; - void *int_type; - void *int_polarity; - void *int_clear; -}; - -struct sirc_cascade_regs { - void *int_status; - unsigned int cascade_irq; -}; - -void msm_init_sirc(void); -void msm_sirc_enter_sleep(void); -void msm_sirc_exit_sleep(void); - -#if defined(CONFIG_ARCH_MSM_SCORPION) - -#include - -/* - * Secondary interrupt controller interrupts - */ - -#define FIRST_SIRC_IRQ (NR_MSM_IRQS + NR_GPIO_IRQS) - -#define INT_UART1 (FIRST_SIRC_IRQ + 0) -#define INT_UART2 (FIRST_SIRC_IRQ + 1) -#define INT_UART3 (FIRST_SIRC_IRQ + 2) -#define INT_UART1_RX (FIRST_SIRC_IRQ + 3) -#define INT_UART2_RX (FIRST_SIRC_IRQ + 4) -#define INT_UART3_RX (FIRST_SIRC_IRQ + 5) -#define INT_SPI_INPUT (FIRST_SIRC_IRQ + 6) -#define INT_SPI_OUTPUT (FIRST_SIRC_IRQ + 7) -#define INT_SPI_ERROR (FIRST_SIRC_IRQ + 8) -#define INT_GPIO_GROUP1 (FIRST_SIRC_IRQ + 9) -#define INT_GPIO_GROUP2 (FIRST_SIRC_IRQ + 10) -#define INT_GPIO_GROUP1_SECURE (FIRST_SIRC_IRQ + 11) -#define INT_GPIO_GROUP2_SECURE (FIRST_SIRC_IRQ + 12) -#define INT_AVS_SVIC (FIRST_SIRC_IRQ + 13) -#define INT_AVS_REQ_UP (FIRST_SIRC_IRQ + 14) -#define INT_AVS_REQ_DOWN (FIRST_SIRC_IRQ + 15) -#define INT_PBUS_ERR (FIRST_SIRC_IRQ + 16) -#define INT_AXI_ERR (FIRST_SIRC_IRQ + 17) -#define INT_SMI_ERR (FIRST_SIRC_IRQ + 18) -#define INT_EBI1_ERR (FIRST_SIRC_IRQ + 19) -#define INT_IMEM_ERR (FIRST_SIRC_IRQ + 20) -#define INT_TEMP_SENSOR (FIRST_SIRC_IRQ + 21) -#define INT_TV_ENC (FIRST_SIRC_IRQ + 22) -#define INT_GRP2D (FIRST_SIRC_IRQ + 23) -#define INT_GSBI_QUP (FIRST_SIRC_IRQ + 24) -#define INT_SC_ACG (FIRST_SIRC_IRQ + 25) -#define INT_WDT0 (FIRST_SIRC_IRQ + 26) -#define INT_WDT1 (FIRST_SIRC_IRQ + 27) - -#if defined(CONFIG_MSM_SOC_REV_A) -#define NR_SIRC_IRQS 28 -#define SIRC_MASK 0x0FFFFFFF -#else -#define NR_SIRC_IRQS 23 -#define SIRC_MASK 0x007FFFFF -#endif - -#define LAST_SIRC_IRQ (FIRST_SIRC_IRQ + NR_SIRC_IRQS - 1) - -#define SPSS_SIRC_INT_SELECT (MSM_SIRC_BASE + 0x00) -#define SPSS_SIRC_INT_ENABLE (MSM_SIRC_BASE + 0x04) -#define SPSS_SIRC_INT_ENABLE_CLEAR (MSM_SIRC_BASE + 0x08) -#define SPSS_SIRC_INT_ENABLE_SET (MSM_SIRC_BASE + 0x0C) -#define SPSS_SIRC_INT_TYPE (MSM_SIRC_BASE + 0x10) -#define SPSS_SIRC_INT_POLARITY (MSM_SIRC_BASE + 0x14) -#define SPSS_SIRC_SECURITY (MSM_SIRC_BASE + 0x18) -#define SPSS_SIRC_IRQ_STATUS (MSM_SIRC_BASE + 0x1C) -#define SPSS_SIRC_IRQ1_STATUS (MSM_SIRC_BASE + 0x20) -#define SPSS_SIRC_RAW_STATUS (MSM_SIRC_BASE + 0x24) -#define SPSS_SIRC_INT_CLEAR (MSM_SIRC_BASE + 0x28) -#define SPSS_SIRC_SOFT_INT (MSM_SIRC_BASE + 0x2C) - -#endif - -#endif diff --git a/arch/arm/mach-msm/include/mach/vreg.h b/arch/arm/mach-msm/include/mach/vreg.h deleted file mode 100644 index 6626e7864e28..000000000000 --- a/arch/arm/mach-msm/include/mach/vreg.h +++ /dev/null @@ -1,29 +0,0 @@ -/* linux/include/asm-arm/arch-msm/vreg.h - * - * Copyright (C) 2008 Google, Inc. - * Author: Brian Swetland - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#ifndef __ARCH_ARM_MACH_MSM_VREG_H -#define __ARCH_ARM_MACH_MSM_VREG_H - -struct vreg; - -struct vreg *vreg_get(struct device *dev, const char *id); -void vreg_put(struct vreg *vreg); - -int vreg_enable(struct vreg *vreg); -int vreg_disable(struct vreg *vreg); -int vreg_set_level(struct vreg *vreg, unsigned mv); - -#endif diff --git a/arch/arm/mach-msm/io.c b/arch/arm/mach-msm/io.c deleted file mode 100644 index b042dca1f633..000000000000 --- a/arch/arm/mach-msm/io.c +++ /dev/null @@ -1,161 +0,0 @@ -/* arch/arm/mach-msm/io.c - * - * MSM7K, QSD io support - * - * Copyright (C) 2007 Google, Inc. - * Copyright (c) 2008-2011, Code Aurora Forum. All rights reserved. - * Author: Brian Swetland - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#include -#include -#include -#include -#include - -#include -#include -#include -#include - -#include "common.h" - -#define MSM_CHIP_DEVICE_TYPE(name, chip, mem_type) { \ - .virtual = (unsigned long) MSM_##name##_BASE, \ - .pfn = __phys_to_pfn(chip##_##name##_PHYS), \ - .length = chip##_##name##_SIZE, \ - .type = mem_type, \ - } - -#define MSM_DEVICE_TYPE(name, mem_type) \ - MSM_CHIP_DEVICE_TYPE(name, MSM, mem_type) -#define MSM_CHIP_DEVICE(name, chip) \ - MSM_CHIP_DEVICE_TYPE(name, chip, MT_DEVICE) -#define MSM_DEVICE(name) MSM_CHIP_DEVICE(name, MSM) - -#if defined(CONFIG_ARCH_MSM7X00A) -static struct map_desc msm_io_desc[] __initdata = { - MSM_DEVICE_TYPE(VIC, MT_DEVICE_NONSHARED), - MSM_CHIP_DEVICE_TYPE(CSR, MSM7X00, MT_DEVICE_NONSHARED), - MSM_DEVICE_TYPE(DMOV, MT_DEVICE_NONSHARED), - MSM_CHIP_DEVICE_TYPE(GPIO1, MSM7X00, MT_DEVICE_NONSHARED), - MSM_CHIP_DEVICE_TYPE(GPIO2, MSM7X00, MT_DEVICE_NONSHARED), - MSM_DEVICE_TYPE(CLK_CTL, MT_DEVICE_NONSHARED), - { - .virtual = (unsigned long) MSM_SHARED_RAM_BASE, - .pfn = __phys_to_pfn(MSM_SHARED_RAM_PHYS), - .length = MSM_SHARED_RAM_SIZE, - .type = MT_DEVICE, - }, -#if defined(CONFIG_DEBUG_MSM_UART) - { - /* Must be last: virtual and pfn filled in by debug_ll_addr() */ - .length = SZ_4K, - .type = MT_DEVICE_NONSHARED, - } -#endif -}; - -void __init msm_map_common_io(void) -{ - size_t size = ARRAY_SIZE(msm_io_desc); - - /* Make sure the peripheral register window is closed, since - * we will use PTE flags (TEX[1]=1,B=0,C=1) to determine which - * pages are peripheral interface or not. - */ - asm("mcr p15, 0, %0, c15, c2, 4" : : "r" (0)); -#if defined(CONFIG_DEBUG_MSM_UART) -#ifdef CONFIG_MMU - debug_ll_addr(&msm_io_desc[size - 1].pfn, - &msm_io_desc[size - 1].virtual); -#endif - msm_io_desc[size - 1].pfn = __phys_to_pfn(msm_io_desc[size - 1].pfn); -#endif - iotable_init(msm_io_desc, size); -} -#endif - -#ifdef CONFIG_ARCH_QSD8X50 -static struct map_desc qsd8x50_io_desc[] __initdata = { - MSM_DEVICE(VIC), - MSM_CHIP_DEVICE(CSR, QSD8X50), - MSM_DEVICE(DMOV), - MSM_CHIP_DEVICE(GPIO1, QSD8X50), - MSM_CHIP_DEVICE(GPIO2, QSD8X50), - MSM_DEVICE(CLK_CTL), - MSM_DEVICE(SIRC), - MSM_DEVICE(SCPLL), - MSM_DEVICE(AD5), - MSM_DEVICE(MDC), - { - .virtual = (unsigned long) MSM_SHARED_RAM_BASE, - .pfn = __phys_to_pfn(MSM_SHARED_RAM_PHYS), - .length = MSM_SHARED_RAM_SIZE, - .type = MT_DEVICE, - }, -}; - -void __init msm_map_qsd8x50_io(void) -{ - debug_ll_io_init(); - iotable_init(qsd8x50_io_desc, ARRAY_SIZE(qsd8x50_io_desc)); -} -#endif /* CONFIG_ARCH_QSD8X50 */ - -#ifdef CONFIG_ARCH_MSM7X30 -static struct map_desc msm7x30_io_desc[] __initdata = { - MSM_DEVICE(VIC), - MSM_CHIP_DEVICE(CSR, MSM7X30), - MSM_DEVICE(DMOV), - MSM_CHIP_DEVICE(GPIO1, MSM7X30), - MSM_CHIP_DEVICE(GPIO2, MSM7X30), - MSM_DEVICE(CLK_CTL), - MSM_DEVICE(CLK_CTL_SH2), - MSM_DEVICE(AD5), - MSM_DEVICE(MDC), - MSM_DEVICE(ACC), - MSM_DEVICE(SAW), - MSM_DEVICE(GCC), - MSM_DEVICE(TCSR), - { - .virtual = (unsigned long) MSM_SHARED_RAM_BASE, - .pfn = __phys_to_pfn(MSM_SHARED_RAM_PHYS), - .length = MSM_SHARED_RAM_SIZE, - .type = MT_DEVICE, - }, -}; - -void __init msm_map_msm7x30_io(void) -{ - debug_ll_io_init(); - iotable_init(msm7x30_io_desc, ARRAY_SIZE(msm7x30_io_desc)); -} -#endif /* CONFIG_ARCH_MSM7X30 */ - -#ifdef CONFIG_ARCH_MSM7X00A -void __iomem *__msm_ioremap_caller(phys_addr_t phys_addr, size_t size, - unsigned int mtype, void *caller) -{ - if (mtype == MT_DEVICE) { - /* The peripherals in the 88000000 - D0000000 range - * are only accessible by type MT_DEVICE_NONSHARED. - * Adjust mtype as necessary to make this "just work." - */ - if ((phys_addr >= 0x88000000) && (phys_addr < 0xD0000000)) - mtype = MT_DEVICE_NONSHARED; - } - - return __arm_ioremap_caller(phys_addr, size, mtype, caller); -} -#endif diff --git a/arch/arm/mach-msm/irq-vic.c b/arch/arm/mach-msm/irq-vic.c deleted file mode 100644 index 1b54f807c2d0..000000000000 --- a/arch/arm/mach-msm/irq-vic.c +++ /dev/null @@ -1,363 +0,0 @@ -/* - * Copyright (C) 2007 Google, Inc. - * Copyright (c) 2009, Code Aurora Forum. All rights reserved. - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#include -#include -#include -#include -#include -#include -#include -#include - -#include - -#include - -#include - -#include "smd_private.h" - -enum { - IRQ_DEBUG_SLEEP_INT_TRIGGER = 1U << 0, - IRQ_DEBUG_SLEEP_INT = 1U << 1, - IRQ_DEBUG_SLEEP_ABORT = 1U << 2, - IRQ_DEBUG_SLEEP = 1U << 3, - IRQ_DEBUG_SLEEP_REQUEST = 1U << 4, -}; -static int msm_irq_debug_mask; -module_param_named(debug_mask, msm_irq_debug_mask, int, - S_IRUGO | S_IWUSR | S_IWGRP); - -#define VIC_REG(off) (MSM_VIC_BASE + (off)) -#define VIC_INT_TO_REG_ADDR(base, irq) (base + (irq / 32) * 4) -#define VIC_INT_TO_REG_INDEX(irq) ((irq >> 5) & 3) - -#define VIC_INT_SELECT0 VIC_REG(0x0000) /* 1: FIQ, 0: IRQ */ -#define VIC_INT_SELECT1 VIC_REG(0x0004) /* 1: FIQ, 0: IRQ */ -#define VIC_INT_SELECT2 VIC_REG(0x0008) /* 1: FIQ, 0: IRQ */ -#define VIC_INT_SELECT3 VIC_REG(0x000C) /* 1: FIQ, 0: IRQ */ -#define VIC_INT_EN0 VIC_REG(0x0010) -#define VIC_INT_EN1 VIC_REG(0x0014) -#define VIC_INT_EN2 VIC_REG(0x0018) -#define VIC_INT_EN3 VIC_REG(0x001C) -#define VIC_INT_ENCLEAR0 VIC_REG(0x0020) -#define VIC_INT_ENCLEAR1 VIC_REG(0x0024) -#define VIC_INT_ENCLEAR2 VIC_REG(0x0028) -#define VIC_INT_ENCLEAR3 VIC_REG(0x002C) -#define VIC_INT_ENSET0 VIC_REG(0x0030) -#define VIC_INT_ENSET1 VIC_REG(0x0034) -#define VIC_INT_ENSET2 VIC_REG(0x0038) -#define VIC_INT_ENSET3 VIC_REG(0x003C) -#define VIC_INT_TYPE0 VIC_REG(0x0040) /* 1: EDGE, 0: LEVEL */ -#define VIC_INT_TYPE1 VIC_REG(0x0044) /* 1: EDGE, 0: LEVEL */ -#define VIC_INT_TYPE2 VIC_REG(0x0048) /* 1: EDGE, 0: LEVEL */ -#define VIC_INT_TYPE3 VIC_REG(0x004C) /* 1: EDGE, 0: LEVEL */ -#define VIC_INT_POLARITY0 VIC_REG(0x0050) /* 1: NEG, 0: POS */ -#define VIC_INT_POLARITY1 VIC_REG(0x0054) /* 1: NEG, 0: POS */ -#define VIC_INT_POLARITY2 VIC_REG(0x0058) /* 1: NEG, 0: POS */ -#define VIC_INT_POLARITY3 VIC_REG(0x005C) /* 1: NEG, 0: POS */ -#define VIC_NO_PEND_VAL VIC_REG(0x0060) - -#if defined(CONFIG_ARCH_MSM_SCORPION) -#define VIC_NO_PEND_VAL_FIQ VIC_REG(0x0064) -#define VIC_INT_MASTEREN VIC_REG(0x0068) /* 1: IRQ, 2: FIQ */ -#define VIC_CONFIG VIC_REG(0x006C) /* 1: USE SC VIC */ -#else -#define VIC_INT_MASTEREN VIC_REG(0x0064) /* 1: IRQ, 2: FIQ */ -#define VIC_PROTECTION VIC_REG(0x006C) /* 1: ENABLE */ -#define VIC_CONFIG VIC_REG(0x0068) /* 1: USE ARM1136 VIC */ -#endif - -#define VIC_IRQ_STATUS0 VIC_REG(0x0080) -#define VIC_IRQ_STATUS1 VIC_REG(0x0084) -#define VIC_IRQ_STATUS2 VIC_REG(0x0088) -#define VIC_IRQ_STATUS3 VIC_REG(0x008C) -#define VIC_FIQ_STATUS0 VIC_REG(0x0090) -#define VIC_FIQ_STATUS1 VIC_REG(0x0094) -#define VIC_FIQ_STATUS2 VIC_REG(0x0098) -#define VIC_FIQ_STATUS3 VIC_REG(0x009C) -#define VIC_RAW_STATUS0 VIC_REG(0x00A0) -#define VIC_RAW_STATUS1 VIC_REG(0x00A4) -#define VIC_RAW_STATUS2 VIC_REG(0x00A8) -#define VIC_RAW_STATUS3 VIC_REG(0x00AC) -#define VIC_INT_CLEAR0 VIC_REG(0x00B0) -#define VIC_INT_CLEAR1 VIC_REG(0x00B4) -#define VIC_INT_CLEAR2 VIC_REG(0x00B8) -#define VIC_INT_CLEAR3 VIC_REG(0x00BC) -#define VIC_SOFTINT0 VIC_REG(0x00C0) -#define VIC_SOFTINT1 VIC_REG(0x00C4) -#define VIC_SOFTINT2 VIC_REG(0x00C8) -#define VIC_SOFTINT3 VIC_REG(0x00CC) -#define VIC_IRQ_VEC_RD VIC_REG(0x00D0) /* pending int # */ -#define VIC_IRQ_VEC_PEND_RD VIC_REG(0x00D4) /* pending vector addr */ -#define VIC_IRQ_VEC_WR VIC_REG(0x00D8) - -#if defined(CONFIG_ARCH_MSM_SCORPION) -#define VIC_FIQ_VEC_RD VIC_REG(0x00DC) -#define VIC_FIQ_VEC_PEND_RD VIC_REG(0x00E0) -#define VIC_FIQ_VEC_WR VIC_REG(0x00E4) -#define VIC_IRQ_IN_SERVICE VIC_REG(0x00E8) -#define VIC_IRQ_IN_STACK VIC_REG(0x00EC) -#define VIC_FIQ_IN_SERVICE VIC_REG(0x00F0) -#define VIC_FIQ_IN_STACK VIC_REG(0x00F4) -#define VIC_TEST_BUS_SEL VIC_REG(0x00F8) -#define VIC_IRQ_CTRL_CONFIG VIC_REG(0x00FC) -#else -#define VIC_IRQ_IN_SERVICE VIC_REG(0x00E0) -#define VIC_IRQ_IN_STACK VIC_REG(0x00E4) -#define VIC_TEST_BUS_SEL VIC_REG(0x00E8) -#endif - -#define VIC_VECTPRIORITY(n) VIC_REG(0x0200+((n) * 4)) -#define VIC_VECTADDR(n) VIC_REG(0x0400+((n) * 4)) - -#if defined(CONFIG_ARCH_MSM7X30) -#define VIC_NUM_REGS 4 -#else -#define VIC_NUM_REGS 2 -#endif - -#if VIC_NUM_REGS == 2 -#define DPRINT_REGS(base_reg, format, ...) \ - printk(KERN_INFO format " %x %x\n", ##__VA_ARGS__, \ - readl(base_reg ## 0), readl(base_reg ## 1)) -#define DPRINT_ARRAY(array, format, ...) \ - printk(KERN_INFO format " %x %x\n", ##__VA_ARGS__, \ - array[0], array[1]) -#elif VIC_NUM_REGS == 4 -#define DPRINT_REGS(base_reg, format, ...) \ - printk(KERN_INFO format " %x %x %x %x\n", ##__VA_ARGS__, \ - readl(base_reg ## 0), readl(base_reg ## 1), \ - readl(base_reg ## 2), readl(base_reg ## 3)) -#define DPRINT_ARRAY(array, format, ...) \ - printk(KERN_INFO format " %x %x %x %x\n", ##__VA_ARGS__, \ - array[0], array[1], \ - array[2], array[3]) -#else -#error "VIC_NUM_REGS set to illegal value" -#endif - -static uint32_t msm_irq_smsm_wake_enable[2]; -static struct { - uint32_t int_en[2]; - uint32_t int_type; - uint32_t int_polarity; - uint32_t int_select; -} msm_irq_shadow_reg[VIC_NUM_REGS]; -static uint32_t msm_irq_idle_disable[VIC_NUM_REGS]; - -#define SMSM_FAKE_IRQ (0xff) -static uint8_t msm_irq_to_smsm[NR_IRQS] = { - [INT_MDDI_EXT] = 1, - [INT_MDDI_PRI] = 2, - [INT_MDDI_CLIENT] = 3, - [INT_USB_OTG] = 4, - - [INT_PWB_I2C] = 5, - [INT_SDC1_0] = 6, - [INT_SDC1_1] = 7, - [INT_SDC2_0] = 8, - - [INT_SDC2_1] = 9, - [INT_ADSP_A9_A11] = 10, - [INT_UART1] = 11, - [INT_UART2] = 12, - - [INT_UART3] = 13, - [INT_UART1_RX] = 14, - [INT_UART2_RX] = 15, - [INT_UART3_RX] = 16, - - [INT_UART1DM_IRQ] = 17, - [INT_UART1DM_RX] = 18, - [INT_KEYSENSE] = 19, -#if !defined(CONFIG_ARCH_MSM7X30) - [INT_AD_HSSD] = 20, -#endif - - [INT_NAND_WR_ER_DONE] = 21, - [INT_NAND_OP_DONE] = 22, - [INT_TCHSCRN1] = 23, - [INT_TCHSCRN2] = 24, - - [INT_TCHSCRN_SSBI] = 25, - [INT_USB_HS] = 26, - [INT_UART2DM_RX] = 27, - [INT_UART2DM_IRQ] = 28, - - [INT_SDC4_1] = 29, - [INT_SDC4_0] = 30, - [INT_SDC3_1] = 31, - [INT_SDC3_0] = 32, - - /* fake wakeup interrupts */ - [INT_GPIO_GROUP1] = SMSM_FAKE_IRQ, - [INT_GPIO_GROUP2] = SMSM_FAKE_IRQ, - [INT_A9_M2A_0] = SMSM_FAKE_IRQ, - [INT_A9_M2A_1] = SMSM_FAKE_IRQ, - [INT_A9_M2A_5] = SMSM_FAKE_IRQ, - [INT_GP_TIMER_EXP] = SMSM_FAKE_IRQ, - [INT_DEBUG_TIMER_EXP] = SMSM_FAKE_IRQ, - [INT_ADSP_A11] = SMSM_FAKE_IRQ, -#ifdef CONFIG_ARCH_QSD8X50 - [INT_SIRC_0] = SMSM_FAKE_IRQ, - [INT_SIRC_1] = SMSM_FAKE_IRQ, -#endif -}; - -static inline void msm_irq_write_all_regs(void __iomem *base, unsigned int val) -{ - int i; - - for (i = 0; i < VIC_NUM_REGS; i++) - writel(val, base + (i * 4)); -} - -static void msm_irq_ack(struct irq_data *d) -{ - void __iomem *reg = VIC_INT_TO_REG_ADDR(VIC_INT_CLEAR0, d->irq); - writel(1 << (d->irq & 31), reg); -} - -static void msm_irq_mask(struct irq_data *d) -{ - void __iomem *reg = VIC_INT_TO_REG_ADDR(VIC_INT_ENCLEAR0, d->irq); - unsigned index = VIC_INT_TO_REG_INDEX(d->irq); - uint32_t mask = 1UL << (d->irq & 31); - int smsm_irq = msm_irq_to_smsm[d->irq]; - - msm_irq_shadow_reg[index].int_en[0] &= ~mask; - writel(mask, reg); - if (smsm_irq == 0) - msm_irq_idle_disable[index] &= ~mask; - else { - mask = 1UL << (smsm_irq - 1); - msm_irq_smsm_wake_enable[0] &= ~mask; - } -} - -static void msm_irq_unmask(struct irq_data *d) -{ - void __iomem *reg = VIC_INT_TO_REG_ADDR(VIC_INT_ENSET0, d->irq); - unsigned index = VIC_INT_TO_REG_INDEX(d->irq); - uint32_t mask = 1UL << (d->irq & 31); - int smsm_irq = msm_irq_to_smsm[d->irq]; - - msm_irq_shadow_reg[index].int_en[0] |= mask; - writel(mask, reg); - - if (smsm_irq == 0) - msm_irq_idle_disable[index] |= mask; - else { - mask = 1UL << (smsm_irq - 1); - msm_irq_smsm_wake_enable[0] |= mask; - } -} - -static int msm_irq_set_wake(struct irq_data *d, unsigned int on) -{ - unsigned index = VIC_INT_TO_REG_INDEX(d->irq); - uint32_t mask = 1UL << (d->irq & 31); - int smsm_irq = msm_irq_to_smsm[d->irq]; - - if (smsm_irq == 0) { - printk(KERN_ERR "msm_irq_set_wake: bad wakeup irq %d\n", d->irq); - return -EINVAL; - } - if (on) - msm_irq_shadow_reg[index].int_en[1] |= mask; - else - msm_irq_shadow_reg[index].int_en[1] &= ~mask; - - if (smsm_irq == SMSM_FAKE_IRQ) - return 0; - - mask = 1UL << (smsm_irq - 1); - if (on) - msm_irq_smsm_wake_enable[1] |= mask; - else - msm_irq_smsm_wake_enable[1] &= ~mask; - return 0; -} - -static int msm_irq_set_type(struct irq_data *d, unsigned int flow_type) -{ - void __iomem *treg = VIC_INT_TO_REG_ADDR(VIC_INT_TYPE0, d->irq); - void __iomem *preg = VIC_INT_TO_REG_ADDR(VIC_INT_POLARITY0, d->irq); - unsigned index = VIC_INT_TO_REG_INDEX(d->irq); - int b = 1 << (d->irq & 31); - uint32_t polarity; - uint32_t type; - - polarity = msm_irq_shadow_reg[index].int_polarity; - if (flow_type & (IRQF_TRIGGER_FALLING | IRQF_TRIGGER_LOW)) - polarity |= b; - if (flow_type & (IRQF_TRIGGER_RISING | IRQF_TRIGGER_HIGH)) - polarity &= ~b; - writel(polarity, preg); - msm_irq_shadow_reg[index].int_polarity = polarity; - - type = msm_irq_shadow_reg[index].int_type; - if (flow_type & (IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING)) { - type |= b; - __irq_set_handler_locked(d->irq, handle_edge_irq); - } - if (flow_type & (IRQF_TRIGGER_HIGH | IRQF_TRIGGER_LOW)) { - type &= ~b; - __irq_set_handler_locked(d->irq, handle_level_irq); - } - writel(type, treg); - msm_irq_shadow_reg[index].int_type = type; - return 0; -} - -static struct irq_chip msm_irq_chip = { - .name = "msm", - .irq_disable = msm_irq_mask, - .irq_ack = msm_irq_ack, - .irq_mask = msm_irq_mask, - .irq_unmask = msm_irq_unmask, - .irq_set_wake = msm_irq_set_wake, - .irq_set_type = msm_irq_set_type, -}; - -void __init msm_init_irq(void) -{ - unsigned n; - - /* select level interrupts */ - msm_irq_write_all_regs(VIC_INT_TYPE0, 0); - - /* select highlevel interrupts */ - msm_irq_write_all_regs(VIC_INT_POLARITY0, 0); - - /* select IRQ for all INTs */ - msm_irq_write_all_regs(VIC_INT_SELECT0, 0); - - /* disable all INTs */ - msm_irq_write_all_regs(VIC_INT_EN0, 0); - - /* don't use vic */ - writel(0, VIC_CONFIG); - - /* enable interrupt controller */ - writel(3, VIC_INT_MASTEREN); - - for (n = 0; n < NR_MSM_IRQS; n++) { - irq_set_chip_and_handler(n, &msm_irq_chip, handle_level_irq); - set_irq_flags(n, IRQF_VALID); - } -} diff --git a/arch/arm/mach-msm/irq.c b/arch/arm/mach-msm/irq.c deleted file mode 100644 index ea514be390c6..000000000000 --- a/arch/arm/mach-msm/irq.c +++ /dev/null @@ -1,151 +0,0 @@ -/* linux/arch/arm/mach-msm/irq.c - * - * Copyright (C) 2007 Google, Inc. - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#include -#include -#include -#include -#include -#include -#include -#include - -#include - -#include - -#define VIC_REG(off) (MSM_VIC_BASE + (off)) - -#define VIC_INT_SELECT0 VIC_REG(0x0000) /* 1: FIQ, 0: IRQ */ -#define VIC_INT_SELECT1 VIC_REG(0x0004) /* 1: FIQ, 0: IRQ */ -#define VIC_INT_EN0 VIC_REG(0x0010) -#define VIC_INT_EN1 VIC_REG(0x0014) -#define VIC_INT_ENCLEAR0 VIC_REG(0x0020) -#define VIC_INT_ENCLEAR1 VIC_REG(0x0024) -#define VIC_INT_ENSET0 VIC_REG(0x0030) -#define VIC_INT_ENSET1 VIC_REG(0x0034) -#define VIC_INT_TYPE0 VIC_REG(0x0040) /* 1: EDGE, 0: LEVEL */ -#define VIC_INT_TYPE1 VIC_REG(0x0044) /* 1: EDGE, 0: LEVEL */ -#define VIC_INT_POLARITY0 VIC_REG(0x0050) /* 1: NEG, 0: POS */ -#define VIC_INT_POLARITY1 VIC_REG(0x0054) /* 1: NEG, 0: POS */ -#define VIC_NO_PEND_VAL VIC_REG(0x0060) -#define VIC_INT_MASTEREN VIC_REG(0x0064) /* 1: IRQ, 2: FIQ */ -#define VIC_PROTECTION VIC_REG(0x006C) /* 1: ENABLE */ -#define VIC_CONFIG VIC_REG(0x0068) /* 1: USE ARM1136 VIC */ -#define VIC_IRQ_STATUS0 VIC_REG(0x0080) -#define VIC_IRQ_STATUS1 VIC_REG(0x0084) -#define VIC_FIQ_STATUS0 VIC_REG(0x0090) -#define VIC_FIQ_STATUS1 VIC_REG(0x0094) -#define VIC_RAW_STATUS0 VIC_REG(0x00A0) -#define VIC_RAW_STATUS1 VIC_REG(0x00A4) -#define VIC_INT_CLEAR0 VIC_REG(0x00B0) -#define VIC_INT_CLEAR1 VIC_REG(0x00B4) -#define VIC_SOFTINT0 VIC_REG(0x00C0) -#define VIC_SOFTINT1 VIC_REG(0x00C4) -#define VIC_IRQ_VEC_RD VIC_REG(0x00D0) /* pending int # */ -#define VIC_IRQ_VEC_PEND_RD VIC_REG(0x00D4) /* pending vector addr */ -#define VIC_IRQ_VEC_WR VIC_REG(0x00D8) -#define VIC_IRQ_IN_SERVICE VIC_REG(0x00E0) -#define VIC_IRQ_IN_STACK VIC_REG(0x00E4) -#define VIC_TEST_BUS_SEL VIC_REG(0x00E8) - -#define VIC_VECTPRIORITY(n) VIC_REG(0x0200+((n) * 4)) -#define VIC_VECTADDR(n) VIC_REG(0x0400+((n) * 4)) - -static void msm_irq_ack(struct irq_data *d) -{ - void __iomem *reg = VIC_INT_CLEAR0 + ((d->irq & 32) ? 4 : 0); - writel(1 << (d->irq & 31), reg); -} - -static void msm_irq_mask(struct irq_data *d) -{ - void __iomem *reg = VIC_INT_ENCLEAR0 + ((d->irq & 32) ? 4 : 0); - writel(1 << (d->irq & 31), reg); -} - -static void msm_irq_unmask(struct irq_data *d) -{ - void __iomem *reg = VIC_INT_ENSET0 + ((d->irq & 32) ? 4 : 0); - writel(1 << (d->irq & 31), reg); -} - -static int msm_irq_set_wake(struct irq_data *d, unsigned int on) -{ - return -EINVAL; -} - -static int msm_irq_set_type(struct irq_data *d, unsigned int flow_type) -{ - void __iomem *treg = VIC_INT_TYPE0 + ((d->irq & 32) ? 4 : 0); - void __iomem *preg = VIC_INT_POLARITY0 + ((d->irq & 32) ? 4 : 0); - int b = 1 << (d->irq & 31); - - if (flow_type & (IRQF_TRIGGER_FALLING | IRQF_TRIGGER_LOW)) - writel(readl(preg) | b, preg); - if (flow_type & (IRQF_TRIGGER_RISING | IRQF_TRIGGER_HIGH)) - writel(readl(preg) & (~b), preg); - - if (flow_type & (IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING)) { - writel(readl(treg) | b, treg); - __irq_set_handler_locked(d->irq, handle_edge_irq); - } - if (flow_type & (IRQF_TRIGGER_HIGH | IRQF_TRIGGER_LOW)) { - writel(readl(treg) & (~b), treg); - __irq_set_handler_locked(d->irq, handle_level_irq); - } - return 0; -} - -static struct irq_chip msm_irq_chip = { - .name = "msm", - .irq_ack = msm_irq_ack, - .irq_mask = msm_irq_mask, - .irq_unmask = msm_irq_unmask, - .irq_set_wake = msm_irq_set_wake, - .irq_set_type = msm_irq_set_type, -}; - -void __init msm_init_irq(void) -{ - unsigned n; - - /* select level interrupts */ - writel(0, VIC_INT_TYPE0); - writel(0, VIC_INT_TYPE1); - - /* select highlevel interrupts */ - writel(0, VIC_INT_POLARITY0); - writel(0, VIC_INT_POLARITY1); - - /* select IRQ for all INTs */ - writel(0, VIC_INT_SELECT0); - writel(0, VIC_INT_SELECT1); - - /* disable all INTs */ - writel(0, VIC_INT_EN0); - writel(0, VIC_INT_EN1); - - /* don't use 1136 vic */ - writel(0, VIC_CONFIG); - - /* enable interrupt controller */ - writel(1, VIC_INT_MASTEREN); - - for (n = 0; n < NR_MSM_IRQS; n++) { - irq_set_chip_and_handler(n, &msm_irq_chip, handle_level_irq); - set_irq_flags(n, IRQF_VALID); - } -} diff --git a/arch/arm/mach-msm/last_radio_log.c b/arch/arm/mach-msm/last_radio_log.c deleted file mode 100644 index 9c392a29fc7e..000000000000 --- a/arch/arm/mach-msm/last_radio_log.c +++ /dev/null @@ -1,71 +0,0 @@ -/* arch/arm/mach-msm/last_radio_log.c - * - * Extract the log from a modem crash though SMEM - * - * Copyright (C) 2007 Google, Inc. - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#include -#include -#include -#include -#include - -#include "smd_private.h" - -static void *radio_log_base; -static size_t radio_log_size; - -extern void *smem_item(unsigned id, unsigned *size); - -static ssize_t last_radio_log_read(struct file *file, char __user *buf, - size_t len, loff_t *offset) -{ - return simple_read_from_buffer(buf, len, offset, - radio_log_base, radio_log_size); -} - -static struct file_operations last_radio_log_fops = { - .read = last_radio_log_read, - .llseek = default_llseek, -}; - -void msm_init_last_radio_log(struct module *owner) -{ - struct proc_dir_entry *entry; - - if (last_radio_log_fops.owner) { - pr_err("%s: already claimed\n", __func__); - return; - } - - radio_log_base = smem_item(SMEM_CLKREGIM_BSP, &radio_log_size); - if (!radio_log_base) { - pr_err("%s: could not retrieve SMEM_CLKREGIM_BSP\n", __func__); - return; - } - - entry = proc_create("last_radio_log", S_IRUGO, NULL, - &last_radio_log_fops); - if (!entry) { - pr_err("%s: could not create proc entry for radio log\n", - __func__); - return; - } - - pr_err("%s: last radio log is %d bytes long\n", __func__, - radio_log_size); - last_radio_log_fops.owner = owner; - proc_set_size(entry, radio_log_size); -} -EXPORT_SYMBOL(msm_init_last_radio_log); diff --git a/arch/arm/mach-msm/proc_comm.c b/arch/arm/mach-msm/proc_comm.c deleted file mode 100644 index 507f5ca80697..000000000000 --- a/arch/arm/mach-msm/proc_comm.c +++ /dev/null @@ -1,129 +0,0 @@ -/* arch/arm/mach-msm/proc_comm.c - * - * Copyright (C) 2007-2008 Google, Inc. - * Author: Brian Swetland - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#include -#include -#include -#include -#include - -#include "proc_comm.h" - -static inline void msm_a2m_int(uint32_t irq) -{ -#if defined(CONFIG_ARCH_MSM7X30) - writel(1 << irq, MSM_GCC_BASE + 0x8); -#else - writel(1, MSM_CSR_BASE + 0x400 + (irq * 4)); -#endif -} - -static inline void notify_other_proc_comm(void) -{ - msm_a2m_int(6); -} - -#define APP_COMMAND 0x00 -#define APP_STATUS 0x04 -#define APP_DATA1 0x08 -#define APP_DATA2 0x0C - -#define MDM_COMMAND 0x10 -#define MDM_STATUS 0x14 -#define MDM_DATA1 0x18 -#define MDM_DATA2 0x1C - -static DEFINE_SPINLOCK(proc_comm_lock); - -/* The higher level SMD support will install this to - * provide a way to check for and handle modem restart. - */ -int (*msm_check_for_modem_crash)(void); - -/* Poll for a state change, checking for possible - * modem crashes along the way (so we don't wait - * forever while the ARM9 is blowing up). - * - * Return an error in the event of a modem crash and - * restart so the msm_proc_comm() routine can restart - * the operation from the beginning. - */ -static int proc_comm_wait_for(void __iomem *addr, unsigned value) -{ - for (;;) { - if (readl(addr) == value) - return 0; - - if (msm_check_for_modem_crash) - if (msm_check_for_modem_crash()) - return -EAGAIN; - } -} - -int msm_proc_comm(unsigned cmd, unsigned *data1, unsigned *data2) -{ - void __iomem *base = MSM_SHARED_RAM_BASE; - unsigned long flags; - int ret; - - spin_lock_irqsave(&proc_comm_lock, flags); - - for (;;) { - if (proc_comm_wait_for(base + MDM_STATUS, PCOM_READY)) - continue; - - writel(cmd, base + APP_COMMAND); - writel(data1 ? *data1 : 0, base + APP_DATA1); - writel(data2 ? *data2 : 0, base + APP_DATA2); - - notify_other_proc_comm(); - - if (proc_comm_wait_for(base + APP_COMMAND, PCOM_CMD_DONE)) - continue; - - if (readl(base + APP_STATUS) != PCOM_CMD_FAIL) { - if (data1) - *data1 = readl(base + APP_DATA1); - if (data2) - *data2 = readl(base + APP_DATA2); - ret = 0; - } else { - ret = -EIO; - } - break; - } - - writel(PCOM_CMD_IDLE, base + APP_COMMAND); - - spin_unlock_irqrestore(&proc_comm_lock, flags); - - return ret; -} - -/* - * We need to wait for the ARM9 to at least partially boot - * up before we can continue. Since the ARM9 does resource - * allocation, if we dont' wait we could end up crashing or in - * and unknown state. This function should be called early to - * wait on the ARM9. - */ -void proc_comm_boot_wait(void) -{ - void __iomem *base = MSM_SHARED_RAM_BASE; - - proc_comm_wait_for(base + MDM_STATUS, PCOM_READY); - -} diff --git a/arch/arm/mach-msm/proc_comm.h b/arch/arm/mach-msm/proc_comm.h deleted file mode 100644 index e8d043a0e990..000000000000 --- a/arch/arm/mach-msm/proc_comm.h +++ /dev/null @@ -1,258 +0,0 @@ -/* arch/arm/mach-msm/proc_comm.h - * - * Copyright (c) 2007 QUALCOMM Incorporated - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#ifndef _ARCH_ARM_MACH_MSM_PROC_COMM_H_ -#define _ARCH_ARM_MACH_MSM_PROC_COMM_H_ - -#include - -enum { - PCOM_CMD_IDLE = 0x0, - PCOM_CMD_DONE, - PCOM_RESET_APPS, - PCOM_RESET_CHIP, - PCOM_CONFIG_NAND_MPU, - PCOM_CONFIG_USB_CLKS, - PCOM_GET_POWER_ON_STATUS, - PCOM_GET_WAKE_UP_STATUS, - PCOM_GET_BATT_LEVEL, - PCOM_CHG_IS_CHARGING, - PCOM_POWER_DOWN, - PCOM_USB_PIN_CONFIG, - PCOM_USB_PIN_SEL, - PCOM_SET_RTC_ALARM, - PCOM_NV_READ, - PCOM_NV_WRITE, - PCOM_GET_UUID_HIGH, - PCOM_GET_UUID_LOW, - PCOM_GET_HW_ENTROPY, - PCOM_RPC_GPIO_TLMM_CONFIG_REMOTE, - PCOM_CLKCTL_RPC_ENABLE, - PCOM_CLKCTL_RPC_DISABLE, - PCOM_CLKCTL_RPC_RESET, - PCOM_CLKCTL_RPC_SET_FLAGS, - PCOM_CLKCTL_RPC_SET_RATE, - PCOM_CLKCTL_RPC_MIN_RATE, - PCOM_CLKCTL_RPC_MAX_RATE, - PCOM_CLKCTL_RPC_RATE, - PCOM_CLKCTL_RPC_PLL_REQUEST, - PCOM_CLKCTL_RPC_ENABLED, - PCOM_VREG_SWITCH, - PCOM_VREG_SET_LEVEL, - PCOM_GPIO_TLMM_CONFIG_GROUP, - PCOM_GPIO_TLMM_UNCONFIG_GROUP, - PCOM_NV_WRITE_BYTES_4_7, - PCOM_CONFIG_DISP, - PCOM_GET_FTM_BOOT_COUNT, - PCOM_RPC_GPIO_TLMM_CONFIG_EX, - PCOM_PM_MPP_CONFIG, - PCOM_GPIO_IN, - PCOM_GPIO_OUT, - PCOM_RESET_MODEM, - PCOM_RESET_CHIP_IMM, - PCOM_PM_VID_EN, - PCOM_VREG_PULLDOWN, - PCOM_GET_MODEM_VERSION, - PCOM_CLK_REGIME_SEC_RESET, - PCOM_CLK_REGIME_SEC_RESET_ASSERT, - PCOM_CLK_REGIME_SEC_RESET_DEASSERT, - PCOM_CLK_REGIME_SEC_PLL_REQUEST_WRP, - PCOM_CLK_REGIME_SEC_ENABLE, - PCOM_CLK_REGIME_SEC_DISABLE, - PCOM_CLK_REGIME_SEC_IS_ON, - PCOM_CLK_REGIME_SEC_SEL_CLK_INV, - PCOM_CLK_REGIME_SEC_SEL_CLK_SRC, - PCOM_CLK_REGIME_SEC_SEL_CLK_DIV, - PCOM_CLK_REGIME_SEC_ICODEC_CLK_ENABLE, - PCOM_CLK_REGIME_SEC_ICODEC_CLK_DISABLE, - PCOM_CLK_REGIME_SEC_SEL_SPEED, - PCOM_CLK_REGIME_SEC_CONFIG_GP_CLK_WRP, - PCOM_CLK_REGIME_SEC_CONFIG_MDH_CLK_WRP, - PCOM_CLK_REGIME_SEC_USB_XTAL_ON, - PCOM_CLK_REGIME_SEC_USB_XTAL_OFF, - PCOM_CLK_REGIME_SEC_SET_QDSP_DME_MODE, - PCOM_CLK_REGIME_SEC_SWITCH_ADSP_CLK, - PCOM_CLK_REGIME_SEC_GET_MAX_ADSP_CLK_KHZ, - PCOM_CLK_REGIME_SEC_GET_I2C_CLK_KHZ, - PCOM_CLK_REGIME_SEC_MSM_GET_CLK_FREQ_KHZ, - PCOM_CLK_REGIME_SEC_SEL_VFE_SRC, - PCOM_CLK_REGIME_SEC_MSM_SEL_CAMCLK, - PCOM_CLK_REGIME_SEC_MSM_SEL_LCDCLK, - PCOM_CLK_REGIME_SEC_VFE_RAIL_OFF, - PCOM_CLK_REGIME_SEC_VFE_RAIL_ON, - PCOM_CLK_REGIME_SEC_GRP_RAIL_OFF, - PCOM_CLK_REGIME_SEC_GRP_RAIL_ON, - PCOM_CLK_REGIME_SEC_VDC_RAIL_OFF, - PCOM_CLK_REGIME_SEC_VDC_RAIL_ON, - PCOM_CLK_REGIME_SEC_LCD_CTRL, - PCOM_CLK_REGIME_SEC_REGISTER_FOR_CPU_RESOURCE, - PCOM_CLK_REGIME_SEC_DEREGISTER_FOR_CPU_RESOURCE, - PCOM_CLK_REGIME_SEC_RESOURCE_REQUEST_WRP, - PCOM_CLK_REGIME_MSM_SEC_SEL_CLK_OWNER, - PCOM_CLK_REGIME_SEC_DEVMAN_REQUEST_WRP, - PCOM_GPIO_CONFIG, - PCOM_GPIO_CONFIGURE_GROUP, - PCOM_GPIO_TLMM_SET_PORT, - PCOM_GPIO_TLMM_CONFIG_EX, - PCOM_SET_FTM_BOOT_COUNT, - PCOM_RESERVED0, - PCOM_RESERVED1, - PCOM_CUSTOMER_CMD1, - PCOM_CUSTOMER_CMD2, - PCOM_CUSTOMER_CMD3, - PCOM_CLK_REGIME_ENTER_APPSBL_CHG_MODE, - PCOM_CLK_REGIME_EXIT_APPSBL_CHG_MODE, - PCOM_CLK_REGIME_SEC_RAIL_DISABLE, - PCOM_CLK_REGIME_SEC_RAIL_ENABLE, - PCOM_CLK_REGIME_SEC_RAIL_CONTROL, - PCOM_SET_SW_WATCHDOG_STATE, - PCOM_PM_MPP_CONFIG_DIGITAL_INPUT, - PCOM_PM_MPP_CONFIG_I_SINK, - PCOM_RESERVED_101, - PCOM_MSM_HSUSB_PHY_RESET, - PCOM_GET_BATT_MV_LEVEL, - PCOM_CHG_USB_IS_PC_CONNECTED, - PCOM_CHG_USB_IS_CHARGER_CONNECTED, - PCOM_CHG_USB_IS_DISCONNECTED, - PCOM_CHG_USB_IS_AVAILABLE, - PCOM_CLK_REGIME_SEC_MSM_SEL_FREQ, - PCOM_CLK_REGIME_SEC_SET_PCLK_AXI_POLICY, - PCOM_CLKCTL_RPC_RESET_ASSERT, - PCOM_CLKCTL_RPC_RESET_DEASSERT, - PCOM_CLKCTL_RPC_RAIL_ON, - PCOM_CLKCTL_RPC_RAIL_OFF, - PCOM_CLKCTL_RPC_RAIL_ENABLE, - PCOM_CLKCTL_RPC_RAIL_DISABLE, - PCOM_CLKCTL_RPC_RAIL_CONTROL, - PCOM_CLKCTL_RPC_MIN_MSMC1, - PCOM_NUM_CMDS, -}; - -enum { - PCOM_INVALID_STATUS = 0x0, - PCOM_READY, - PCOM_CMD_RUNNING, - PCOM_CMD_SUCCESS, - PCOM_CMD_FAIL, - PCOM_CMD_FAIL_FALSE_RETURNED, - PCOM_CMD_FAIL_CMD_OUT_OF_BOUNDS_SERVER, - PCOM_CMD_FAIL_CMD_OUT_OF_BOUNDS_CLIENT, - PCOM_CMD_FAIL_CMD_UNREGISTERED, - PCOM_CMD_FAIL_CMD_LOCKED, - PCOM_CMD_FAIL_SERVER_NOT_YET_READY, - PCOM_CMD_FAIL_BAD_DESTINATION, - PCOM_CMD_FAIL_SERVER_RESET, - PCOM_CMD_FAIL_SMSM_NOT_INIT, - PCOM_CMD_FAIL_PROC_COMM_BUSY, - PCOM_CMD_FAIL_PROC_COMM_NOT_INIT, - -}; - -/* List of VREGs that support the Pull Down Resistor setting. */ -enum vreg_pdown_id { - PM_VREG_PDOWN_MSMA_ID, - PM_VREG_PDOWN_MSMP_ID, - PM_VREG_PDOWN_MSME1_ID, /* Not supported in Panoramix */ - PM_VREG_PDOWN_MSMC1_ID, /* Not supported in PM6620 */ - PM_VREG_PDOWN_MSMC2_ID, /* Supported in PM7500 only */ - PM_VREG_PDOWN_GP3_ID, /* Supported in PM7500 only */ - PM_VREG_PDOWN_MSME2_ID, /* Supported in PM7500 and Panoramix only */ - PM_VREG_PDOWN_GP4_ID, /* Supported in PM7500 only */ - PM_VREG_PDOWN_GP1_ID, /* Supported in PM7500 only */ - PM_VREG_PDOWN_TCXO_ID, - PM_VREG_PDOWN_PA_ID, - PM_VREG_PDOWN_RFTX_ID, - PM_VREG_PDOWN_RFRX1_ID, - PM_VREG_PDOWN_RFRX2_ID, - PM_VREG_PDOWN_SYNT_ID, - PM_VREG_PDOWN_WLAN_ID, - PM_VREG_PDOWN_USB_ID, - PM_VREG_PDOWN_MMC_ID, - PM_VREG_PDOWN_RUIM_ID, - PM_VREG_PDOWN_MSMC0_ID, /* Supported in PM6610 only */ - PM_VREG_PDOWN_GP2_ID, /* Supported in PM7500 only */ - PM_VREG_PDOWN_GP5_ID, /* Supported in PM7500 only */ - PM_VREG_PDOWN_GP6_ID, /* Supported in PM7500 only */ - PM_VREG_PDOWN_RF_ID, - PM_VREG_PDOWN_RF_VCO_ID, - PM_VREG_PDOWN_MPLL_ID, - PM_VREG_PDOWN_S2_ID, - PM_VREG_PDOWN_S3_ID, - PM_VREG_PDOWN_RFUBM_ID, - - /* new for HAN */ - PM_VREG_PDOWN_RF1_ID, - PM_VREG_PDOWN_RF2_ID, - PM_VREG_PDOWN_RFA_ID, - PM_VREG_PDOWN_CDC2_ID, - PM_VREG_PDOWN_RFTX2_ID, - PM_VREG_PDOWN_USIM_ID, - PM_VREG_PDOWN_USB2P6_ID, - PM_VREG_PDOWN_USB3P3_ID, - PM_VREG_PDOWN_INVALID_ID, - - /* backward compatible enums only */ - PM_VREG_PDOWN_CAM_ID = PM_VREG_PDOWN_GP1_ID, - PM_VREG_PDOWN_MDDI_ID = PM_VREG_PDOWN_GP2_ID, - PM_VREG_PDOWN_RUIM2_ID = PM_VREG_PDOWN_GP3_ID, - PM_VREG_PDOWN_AUX_ID = PM_VREG_PDOWN_GP4_ID, - PM_VREG_PDOWN_AUX2_ID = PM_VREG_PDOWN_GP5_ID, - PM_VREG_PDOWN_BT_ID = PM_VREG_PDOWN_GP6_ID, - - PM_VREG_PDOWN_MSME_ID = PM_VREG_PDOWN_MSME1_ID, - PM_VREG_PDOWN_MSMC_ID = PM_VREG_PDOWN_MSMC1_ID, - PM_VREG_PDOWN_RFA1_ID = PM_VREG_PDOWN_RFRX2_ID, - PM_VREG_PDOWN_RFA2_ID = PM_VREG_PDOWN_RFTX2_ID, - PM_VREG_PDOWN_XO_ID = PM_VREG_PDOWN_TCXO_ID -}; - -enum { - PCOM_CLKRGM_APPS_RESET_USB_PHY = 34, - PCOM_CLKRGM_APPS_RESET_USBH = 37, -}; - -/* gpio info for PCOM_RPC_GPIO_TLMM_CONFIG_EX */ - -#define GPIO_ENABLE 0 -#define GPIO_DISABLE 1 - -#define GPIO_INPUT 0 -#define GPIO_OUTPUT 1 - -#define GPIO_NO_PULL 0 -#define GPIO_PULL_DOWN 1 -#define GPIO_KEEPER 2 -#define GPIO_PULL_UP 3 - -#define GPIO_2MA 0 -#define GPIO_4MA 1 -#define GPIO_6MA 2 -#define GPIO_8MA 3 -#define GPIO_10MA 4 -#define GPIO_12MA 5 -#define GPIO_14MA 6 -#define GPIO_16MA 7 - -#define PCOM_GPIO_CFG(gpio, func, dir, pull, drvstr) \ - ((((gpio) & 0x3FF) << 4) | \ - ((func) & 0xf) | \ - (((dir) & 0x1) << 14) | \ - (((pull) & 0x3) << 15) | \ - (((drvstr) & 0xF) << 17)) - -int msm_proc_comm(unsigned cmd, unsigned *data1, unsigned *data2); -void proc_comm_boot_wait(void); - -#endif diff --git a/arch/arm/mach-msm/sirc.c b/arch/arm/mach-msm/sirc.c deleted file mode 100644 index 689e78c95f38..000000000000 --- a/arch/arm/mach-msm/sirc.c +++ /dev/null @@ -1,172 +0,0 @@ -/* Copyright (c) 2008-2009, Code Aurora Forum. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA - * 02110-1301, USA. - * - */ - -#include -#include -#include -#include - -static unsigned int int_enable; -static unsigned int wake_enable; - -static struct sirc_regs_t sirc_regs = { - .int_enable = SPSS_SIRC_INT_ENABLE, - .int_enable_clear = SPSS_SIRC_INT_ENABLE_CLEAR, - .int_enable_set = SPSS_SIRC_INT_ENABLE_SET, - .int_type = SPSS_SIRC_INT_TYPE, - .int_polarity = SPSS_SIRC_INT_POLARITY, - .int_clear = SPSS_SIRC_INT_CLEAR, -}; - -static struct sirc_cascade_regs sirc_reg_table[] = { - { - .int_status = SPSS_SIRC_IRQ_STATUS, - .cascade_irq = INT_SIRC_0, - } -}; - -/* Mask off the given interrupt. Keep the int_enable mask in sync with - the enable reg, so it can be restored after power collapse. */ -static void sirc_irq_mask(struct irq_data *d) -{ - unsigned int mask; - - mask = 1 << (d->irq - FIRST_SIRC_IRQ); - writel(mask, sirc_regs.int_enable_clear); - int_enable &= ~mask; - return; -} - -/* Unmask the given interrupt. Keep the int_enable mask in sync with - the enable reg, so it can be restored after power collapse. */ -static void sirc_irq_unmask(struct irq_data *d) -{ - unsigned int mask; - - mask = 1 << (d->irq - FIRST_SIRC_IRQ); - writel(mask, sirc_regs.int_enable_set); - int_enable |= mask; - return; -} - -static void sirc_irq_ack(struct irq_data *d) -{ - unsigned int mask; - - mask = 1 << (d->irq - FIRST_SIRC_IRQ); - writel(mask, sirc_regs.int_clear); - return; -} - -static int sirc_irq_set_wake(struct irq_data *d, unsigned int on) -{ - unsigned int mask; - - /* Used to set the interrupt enable mask during power collapse. */ - mask = 1 << (d->irq - FIRST_SIRC_IRQ); - if (on) - wake_enable |= mask; - else - wake_enable &= ~mask; - - return 0; -} - -static int sirc_irq_set_type(struct irq_data *d, unsigned int flow_type) -{ - unsigned int mask; - unsigned int val; - - mask = 1 << (d->irq - FIRST_SIRC_IRQ); - val = readl(sirc_regs.int_polarity); - - if (flow_type & (IRQF_TRIGGER_LOW | IRQF_TRIGGER_FALLING)) - val |= mask; - else - val &= ~mask; - - writel(val, sirc_regs.int_polarity); - - val = readl(sirc_regs.int_type); - if (flow_type & (IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING)) { - val |= mask; - __irq_set_handler_locked(d->irq, handle_edge_irq); - } else { - val &= ~mask; - __irq_set_handler_locked(d->irq, handle_level_irq); - } - - writel(val, sirc_regs.int_type); - - return 0; -} - -/* Finds the pending interrupt on the passed cascade irq and redrives it */ -static void sirc_irq_handler(unsigned int irq, struct irq_desc *desc) -{ - unsigned int reg = 0; - unsigned int sirq; - unsigned int status; - - while ((reg < ARRAY_SIZE(sirc_reg_table)) && - (sirc_reg_table[reg].cascade_irq != irq)) - reg++; - - status = readl(sirc_reg_table[reg].int_status); - status &= SIRC_MASK; - if (status == 0) - return; - - for (sirq = 0; - (sirq < NR_SIRC_IRQS) && ((status & (1U << sirq)) == 0); - sirq++) - ; - generic_handle_irq(sirq+FIRST_SIRC_IRQ); - - desc->irq_data.chip->irq_ack(&desc->irq_data); -} - -static struct irq_chip sirc_irq_chip = { - .name = "sirc", - .irq_ack = sirc_irq_ack, - .irq_mask = sirc_irq_mask, - .irq_unmask = sirc_irq_unmask, - .irq_set_wake = sirc_irq_set_wake, - .irq_set_type = sirc_irq_set_type, -}; - -void __init msm_init_sirc(void) -{ - int i; - - int_enable = 0; - wake_enable = 0; - - for (i = FIRST_SIRC_IRQ; i < LAST_SIRC_IRQ; i++) { - irq_set_chip_and_handler(i, &sirc_irq_chip, handle_edge_irq); - set_irq_flags(i, IRQF_VALID); - } - - for (i = 0; i < ARRAY_SIZE(sirc_reg_table); i++) { - irq_set_chained_handler(sirc_reg_table[i].cascade_irq, - sirc_irq_handler); - irq_set_irq_wake(sirc_reg_table[i].cascade_irq, 1); - } - return; -} - diff --git a/arch/arm/mach-msm/smd.c b/arch/arm/mach-msm/smd.c deleted file mode 100644 index 7550f5a08956..000000000000 --- a/arch/arm/mach-msm/smd.c +++ /dev/null @@ -1,1034 +0,0 @@ -/* arch/arm/mach-msm/smd.c - * - * Copyright (C) 2007 Google, Inc. - * Author: Brian Swetland - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include - -#include "smd_private.h" -#include "proc_comm.h" - -#if defined(CONFIG_ARCH_QSD8X50) -#define CONFIG_QDSP6 1 -#endif - -#define MODULE_NAME "msm_smd" - -enum { - MSM_SMD_DEBUG = 1U << 0, - MSM_SMSM_DEBUG = 1U << 0, -}; - -static int msm_smd_debug_mask; - -struct shared_info { - int ready; - void __iomem *state; -}; - -static unsigned dummy_state[SMSM_STATE_COUNT]; - -static struct shared_info smd_info = { - /* FIXME: not a real __iomem pointer */ - .state = &dummy_state, -}; - -module_param_named(debug_mask, msm_smd_debug_mask, - int, S_IRUGO | S_IWUSR | S_IWGRP); - -static unsigned last_heap_free = 0xffffffff; - -static inline void notify_other_smsm(void) -{ - msm_a2m_int(5); -#ifdef CONFIG_QDSP6 - msm_a2m_int(8); -#endif -} - -static inline void notify_modem_smd(void) -{ - msm_a2m_int(0); -} - -static inline void notify_dsp_smd(void) -{ - msm_a2m_int(8); -} - -static void smd_diag(void) -{ - char *x; - - x = smem_find(ID_DIAG_ERR_MSG, SZ_DIAG_ERR_MSG); - if (x != 0) { - x[SZ_DIAG_ERR_MSG - 1] = 0; - pr_debug("DIAG '%s'\n", x); - } -} - -/* call when SMSM_RESET flag is set in the A9's smsm_state */ -static void handle_modem_crash(void) -{ - pr_err("ARM9 has CRASHED\n"); - smd_diag(); - - /* in this case the modem or watchdog should reboot us */ - for (;;) - ; -} - -uint32_t raw_smsm_get_state(enum smsm_state_item item) -{ - return readl(smd_info.state + item * 4); -} - -static int check_for_modem_crash(void) -{ - if (raw_smsm_get_state(SMSM_STATE_MODEM) & SMSM_RESET) { - handle_modem_crash(); - return -1; - } - return 0; -} - -/* the spinlock is used to synchronize between the - * irq handler and code that mutates the channel - * list or fiddles with channel state - */ -DEFINE_SPINLOCK(smd_lock); -DEFINE_SPINLOCK(smem_lock); - -/* the mutex is used during open() and close() - * operations to avoid races while creating or - * destroying smd_channel structures - */ -static DEFINE_MUTEX(smd_creation_mutex); - -static int smd_initialized; - -LIST_HEAD(smd_ch_closed_list); -LIST_HEAD(smd_ch_list_modem); -LIST_HEAD(smd_ch_list_dsp); - -static unsigned char smd_ch_allocated[64]; -static struct work_struct probe_work; - -/* how many bytes are available for reading */ -static int smd_stream_read_avail(struct smd_channel *ch) -{ - return (ch->recv->head - ch->recv->tail) & ch->fifo_mask; -} - -/* how many bytes we are free to write */ -static int smd_stream_write_avail(struct smd_channel *ch) -{ - return ch->fifo_mask - - ((ch->send->head - ch->send->tail) & ch->fifo_mask); -} - -static int smd_packet_read_avail(struct smd_channel *ch) -{ - if (ch->current_packet) { - int n = smd_stream_read_avail(ch); - if (n > ch->current_packet) - n = ch->current_packet; - return n; - } else { - return 0; - } -} - -static int smd_packet_write_avail(struct smd_channel *ch) -{ - int n = smd_stream_write_avail(ch); - return n > SMD_HEADER_SIZE ? n - SMD_HEADER_SIZE : 0; -} - -static int ch_is_open(struct smd_channel *ch) -{ - return (ch->recv->state == SMD_SS_OPENED) && - (ch->send->state == SMD_SS_OPENED); -} - -/* provide a pointer and length to readable data in the fifo */ -static unsigned ch_read_buffer(struct smd_channel *ch, void **ptr) -{ - unsigned head = ch->recv->head; - unsigned tail = ch->recv->tail; - *ptr = (void *) (ch->recv_data + tail); - - if (tail <= head) - return head - tail; - else - return ch->fifo_size - tail; -} - -/* advance the fifo read pointer after data from ch_read_buffer is consumed */ -static void ch_read_done(struct smd_channel *ch, unsigned count) -{ - BUG_ON(count > smd_stream_read_avail(ch)); - ch->recv->tail = (ch->recv->tail + count) & ch->fifo_mask; - ch->send->fTAIL = 1; -} - -/* basic read interface to ch_read_{buffer,done} used - * by smd_*_read() and update_packet_state() - * will read-and-discard if the _data pointer is null - */ -static int ch_read(struct smd_channel *ch, void *_data, int len) -{ - void *ptr; - unsigned n; - unsigned char *data = _data; - int orig_len = len; - - while (len > 0) { - n = ch_read_buffer(ch, &ptr); - if (n == 0) - break; - - if (n > len) - n = len; - if (_data) - memcpy(data, ptr, n); - - data += n; - len -= n; - ch_read_done(ch, n); - } - - return orig_len - len; -} - -static void update_stream_state(struct smd_channel *ch) -{ - /* streams have no special state requiring updating */ -} - -static void update_packet_state(struct smd_channel *ch) -{ - unsigned hdr[5]; - int r; - - /* can't do anything if we're in the middle of a packet */ - if (ch->current_packet != 0) - return; - - /* don't bother unless we can get the full header */ - if (smd_stream_read_avail(ch) < SMD_HEADER_SIZE) - return; - - r = ch_read(ch, hdr, SMD_HEADER_SIZE); - BUG_ON(r != SMD_HEADER_SIZE); - - ch->current_packet = hdr[0]; -} - -/* provide a pointer and length to next free space in the fifo */ -static unsigned ch_write_buffer(struct smd_channel *ch, void **ptr) -{ - unsigned head = ch->send->head; - unsigned tail = ch->send->tail; - *ptr = (void *) (ch->send_data + head); - - if (head < tail) { - return tail - head - 1; - } else { - if (tail == 0) - return ch->fifo_size - head - 1; - else - return ch->fifo_size - head; - } -} - -/* advace the fifo write pointer after freespace - * from ch_write_buffer is filled - */ -static void ch_write_done(struct smd_channel *ch, unsigned count) -{ - BUG_ON(count > smd_stream_write_avail(ch)); - ch->send->head = (ch->send->head + count) & ch->fifo_mask; - ch->send->fHEAD = 1; -} - -static void ch_set_state(struct smd_channel *ch, unsigned n) -{ - if (n == SMD_SS_OPENED) { - ch->send->fDSR = 1; - ch->send->fCTS = 1; - ch->send->fCD = 1; - } else { - ch->send->fDSR = 0; - ch->send->fCTS = 0; - ch->send->fCD = 0; - } - ch->send->state = n; - ch->send->fSTATE = 1; - ch->notify_other_cpu(); -} - -static void do_smd_probe(void) -{ - struct smem_shared *shared = (void *) MSM_SHARED_RAM_BASE; - if (shared->heap_info.free_offset != last_heap_free) { - last_heap_free = shared->heap_info.free_offset; - schedule_work(&probe_work); - } -} - -static void smd_state_change(struct smd_channel *ch, - unsigned last, unsigned next) -{ - ch->last_state = next; - - pr_debug("ch %d %d -> %d\n", ch->n, last, next); - - switch (next) { - case SMD_SS_OPENING: - ch->recv->tail = 0; - case SMD_SS_OPENED: - if (ch->send->state != SMD_SS_OPENED) - ch_set_state(ch, SMD_SS_OPENED); - ch->notify(ch->priv, SMD_EVENT_OPEN); - break; - case SMD_SS_FLUSHING: - case SMD_SS_RESET: - /* we should force them to close? */ - default: - ch->notify(ch->priv, SMD_EVENT_CLOSE); - } -} - -static void handle_smd_irq(struct list_head *list, void (*notify)(void)) -{ - unsigned long flags; - struct smd_channel *ch; - int do_notify = 0; - unsigned ch_flags; - unsigned tmp; - - spin_lock_irqsave(&smd_lock, flags); - list_for_each_entry(ch, list, ch_list) { - ch_flags = 0; - if (ch_is_open(ch)) { - if (ch->recv->fHEAD) { - ch->recv->fHEAD = 0; - ch_flags |= 1; - do_notify |= 1; - } - if (ch->recv->fTAIL) { - ch->recv->fTAIL = 0; - ch_flags |= 2; - do_notify |= 1; - } - if (ch->recv->fSTATE) { - ch->recv->fSTATE = 0; - ch_flags |= 4; - do_notify |= 1; - } - } - tmp = ch->recv->state; - if (tmp != ch->last_state) - smd_state_change(ch, ch->last_state, tmp); - if (ch_flags) { - ch->update_state(ch); - ch->notify(ch->priv, SMD_EVENT_DATA); - } - } - if (do_notify) - notify(); - spin_unlock_irqrestore(&smd_lock, flags); - do_smd_probe(); -} - -static irqreturn_t smd_modem_irq_handler(int irq, void *data) -{ - handle_smd_irq(&smd_ch_list_modem, notify_modem_smd); - return IRQ_HANDLED; -} - -#if defined(CONFIG_QDSP6) -static irqreturn_t smd_dsp_irq_handler(int irq, void *data) -{ - handle_smd_irq(&smd_ch_list_dsp, notify_dsp_smd); - return IRQ_HANDLED; -} -#endif - -static void smd_fake_irq_handler(unsigned long arg) -{ - handle_smd_irq(&smd_ch_list_modem, notify_modem_smd); - handle_smd_irq(&smd_ch_list_dsp, notify_dsp_smd); -} - -static DECLARE_TASKLET(smd_fake_irq_tasklet, smd_fake_irq_handler, 0); - -static inline int smd_need_int(struct smd_channel *ch) -{ - if (ch_is_open(ch)) { - if (ch->recv->fHEAD || ch->recv->fTAIL || ch->recv->fSTATE) - return 1; - if (ch->recv->state != ch->last_state) - return 1; - } - return 0; -} - -void smd_sleep_exit(void) -{ - unsigned long flags; - struct smd_channel *ch; - int need_int = 0; - - spin_lock_irqsave(&smd_lock, flags); - list_for_each_entry(ch, &smd_ch_list_modem, ch_list) { - if (smd_need_int(ch)) { - need_int = 1; - break; - } - } - list_for_each_entry(ch, &smd_ch_list_dsp, ch_list) { - if (smd_need_int(ch)) { - need_int = 1; - break; - } - } - spin_unlock_irqrestore(&smd_lock, flags); - do_smd_probe(); - - if (need_int) { - if (msm_smd_debug_mask & MSM_SMD_DEBUG) - pr_info("smd_sleep_exit need interrupt\n"); - tasklet_schedule(&smd_fake_irq_tasklet); - } -} - - -void smd_kick(smd_channel_t *ch) -{ - unsigned long flags; - unsigned tmp; - - spin_lock_irqsave(&smd_lock, flags); - ch->update_state(ch); - tmp = ch->recv->state; - if (tmp != ch->last_state) { - ch->last_state = tmp; - if (tmp == SMD_SS_OPENED) - ch->notify(ch->priv, SMD_EVENT_OPEN); - else - ch->notify(ch->priv, SMD_EVENT_CLOSE); - } - ch->notify(ch->priv, SMD_EVENT_DATA); - ch->notify_other_cpu(); - spin_unlock_irqrestore(&smd_lock, flags); -} - -static int smd_is_packet(int chn, unsigned type) -{ - type &= SMD_KIND_MASK; - if (type == SMD_KIND_PACKET) - return 1; - if (type == SMD_KIND_STREAM) - return 0; - - /* older AMSS reports SMD_KIND_UNKNOWN always */ - if ((chn > 4) || (chn == 1)) - return 1; - else - return 0; -} - -static int smd_stream_write(smd_channel_t *ch, const void *_data, int len) -{ - void *ptr; - const unsigned char *buf = _data; - unsigned xfer; - int orig_len = len; - - if (len < 0) - return -EINVAL; - - while ((xfer = ch_write_buffer(ch, &ptr)) != 0) { - if (!ch_is_open(ch)) - break; - if (xfer > len) - xfer = len; - memcpy(ptr, buf, xfer); - ch_write_done(ch, xfer); - len -= xfer; - buf += xfer; - if (len == 0) - break; - } - - ch->notify_other_cpu(); - - return orig_len - len; -} - -static int smd_packet_write(smd_channel_t *ch, const void *_data, int len) -{ - unsigned hdr[5]; - - if (len < 0) - return -EINVAL; - - if (smd_stream_write_avail(ch) < (len + SMD_HEADER_SIZE)) - return -ENOMEM; - - hdr[0] = len; - hdr[1] = hdr[2] = hdr[3] = hdr[4] = 0; - - smd_stream_write(ch, hdr, sizeof(hdr)); - smd_stream_write(ch, _data, len); - - return len; -} - -static int smd_stream_read(smd_channel_t *ch, void *data, int len) -{ - int r; - - if (len < 0) - return -EINVAL; - - r = ch_read(ch, data, len); - if (r > 0) - ch->notify_other_cpu(); - - return r; -} - -static int smd_packet_read(smd_channel_t *ch, void *data, int len) -{ - unsigned long flags; - int r; - - if (len < 0) - return -EINVAL; - - if (len > ch->current_packet) - len = ch->current_packet; - - r = ch_read(ch, data, len); - if (r > 0) - ch->notify_other_cpu(); - - spin_lock_irqsave(&smd_lock, flags); - ch->current_packet -= r; - update_packet_state(ch); - spin_unlock_irqrestore(&smd_lock, flags); - - return r; -} - -static int smd_alloc_channel(const char *name, uint32_t cid, uint32_t type) -{ - struct smd_channel *ch; - - ch = kzalloc(sizeof(struct smd_channel), GFP_KERNEL); - if (ch == 0) { - pr_err("smd_alloc_channel() out of memory\n"); - return -1; - } - ch->n = cid; - - if (_smd_alloc_channel(ch)) { - kfree(ch); - return -1; - } - - ch->fifo_mask = ch->fifo_size - 1; - ch->type = type; - - if ((type & SMD_TYPE_MASK) == SMD_TYPE_APPS_MODEM) - ch->notify_other_cpu = notify_modem_smd; - else - ch->notify_other_cpu = notify_dsp_smd; - - if (smd_is_packet(cid, type)) { - ch->read = smd_packet_read; - ch->write = smd_packet_write; - ch->read_avail = smd_packet_read_avail; - ch->write_avail = smd_packet_write_avail; - ch->update_state = update_packet_state; - } else { - ch->read = smd_stream_read; - ch->write = smd_stream_write; - ch->read_avail = smd_stream_read_avail; - ch->write_avail = smd_stream_write_avail; - ch->update_state = update_stream_state; - } - - if ((type & 0xff) == 0) - memcpy(ch->name, "SMD_", 4); - else - memcpy(ch->name, "DSP_", 4); - memcpy(ch->name + 4, name, 20); - ch->name[23] = 0; - ch->pdev.name = ch->name; - ch->pdev.id = -1; - - pr_debug("smd_alloc_channel() cid=%02d size=%05d '%s'\n", - ch->n, ch->fifo_size, ch->name); - - mutex_lock(&smd_creation_mutex); - list_add(&ch->ch_list, &smd_ch_closed_list); - mutex_unlock(&smd_creation_mutex); - - platform_device_register(&ch->pdev); - return 0; -} - -static void smd_channel_probe_worker(struct work_struct *work) -{ - struct smd_alloc_elm *shared; - unsigned ctype; - unsigned type; - unsigned n; - - shared = smem_find(ID_CH_ALLOC_TBL, sizeof(*shared) * 64); - if (!shared) { - pr_err("cannot find allocation table\n"); - return; - } - for (n = 0; n < 64; n++) { - if (smd_ch_allocated[n]) - continue; - if (!shared[n].ref_count) - continue; - if (!shared[n].name[0]) - continue; - ctype = shared[n].ctype; - type = ctype & SMD_TYPE_MASK; - - /* DAL channels are stream but neither the modem, - * nor the DSP correctly indicate this. Fixup manually. - */ - if (!memcmp(shared[n].name, "DAL", 3)) - ctype = (ctype & (~SMD_KIND_MASK)) | SMD_KIND_STREAM; - - type = shared[n].ctype & SMD_TYPE_MASK; - if ((type == SMD_TYPE_APPS_MODEM) || - (type == SMD_TYPE_APPS_DSP)) - if (!smd_alloc_channel(shared[n].name, shared[n].cid, ctype)) - smd_ch_allocated[n] = 1; - } -} - -static void do_nothing_notify(void *priv, unsigned flags) -{ -} - -struct smd_channel *smd_get_channel(const char *name) -{ - struct smd_channel *ch; - - mutex_lock(&smd_creation_mutex); - list_for_each_entry(ch, &smd_ch_closed_list, ch_list) { - if (!strcmp(name, ch->name)) { - list_del(&ch->ch_list); - mutex_unlock(&smd_creation_mutex); - return ch; - } - } - mutex_unlock(&smd_creation_mutex); - - return NULL; -} - -int smd_open(const char *name, smd_channel_t **_ch, - void *priv, void (*notify)(void *, unsigned)) -{ - struct smd_channel *ch; - unsigned long flags; - - if (smd_initialized == 0) { - pr_info("smd_open() before smd_init()\n"); - return -ENODEV; - } - - ch = smd_get_channel(name); - if (!ch) - return -ENODEV; - - if (notify == 0) - notify = do_nothing_notify; - - ch->notify = notify; - ch->current_packet = 0; - ch->last_state = SMD_SS_CLOSED; - ch->priv = priv; - - *_ch = ch; - - spin_lock_irqsave(&smd_lock, flags); - - if ((ch->type & SMD_TYPE_MASK) == SMD_TYPE_APPS_MODEM) - list_add(&ch->ch_list, &smd_ch_list_modem); - else - list_add(&ch->ch_list, &smd_ch_list_dsp); - - /* If the remote side is CLOSING, we need to get it to - * move to OPENING (which we'll do by moving from CLOSED to - * OPENING) and then get it to move from OPENING to - * OPENED (by doing the same state change ourselves). - * - * Otherwise, it should be OPENING and we can move directly - * to OPENED so that it will follow. - */ - if (ch->recv->state == SMD_SS_CLOSING) { - ch->send->head = 0; - ch_set_state(ch, SMD_SS_OPENING); - } else { - ch_set_state(ch, SMD_SS_OPENED); - } - spin_unlock_irqrestore(&smd_lock, flags); - smd_kick(ch); - - return 0; -} - -int smd_close(smd_channel_t *ch) -{ - unsigned long flags; - - if (ch == 0) - return -1; - - spin_lock_irqsave(&smd_lock, flags); - ch->notify = do_nothing_notify; - list_del(&ch->ch_list); - ch_set_state(ch, SMD_SS_CLOSED); - spin_unlock_irqrestore(&smd_lock, flags); - - mutex_lock(&smd_creation_mutex); - list_add(&ch->ch_list, &smd_ch_closed_list); - mutex_unlock(&smd_creation_mutex); - - return 0; -} - -int smd_read(smd_channel_t *ch, void *data, int len) -{ - return ch->read(ch, data, len); -} - -int smd_write(smd_channel_t *ch, const void *data, int len) -{ - return ch->write(ch, data, len); -} - -int smd_write_atomic(smd_channel_t *ch, const void *data, int len) -{ - unsigned long flags; - int res; - spin_lock_irqsave(&smd_lock, flags); - res = ch->write(ch, data, len); - spin_unlock_irqrestore(&smd_lock, flags); - return res; -} - -int smd_read_avail(smd_channel_t *ch) -{ - return ch->read_avail(ch); -} - -int smd_write_avail(smd_channel_t *ch) -{ - return ch->write_avail(ch); -} - -int smd_wait_until_readable(smd_channel_t *ch, int bytes) -{ - return -1; -} - -int smd_wait_until_writable(smd_channel_t *ch, int bytes) -{ - return -1; -} - -int smd_cur_packet_size(smd_channel_t *ch) -{ - return ch->current_packet; -} - - -/* ------------------------------------------------------------------------- */ - -void *smem_alloc(unsigned id, unsigned size) -{ - return smem_find(id, size); -} - -void __iomem *smem_item(unsigned id, unsigned *size) -{ - struct smem_shared *shared = (void *) MSM_SHARED_RAM_BASE; - struct smem_heap_entry *toc = shared->heap_toc; - - if (id >= SMEM_NUM_ITEMS) - return NULL; - - if (toc[id].allocated) { - *size = toc[id].size; - return (MSM_SHARED_RAM_BASE + toc[id].offset); - } else { - *size = 0; - } - - return NULL; -} - -void *smem_find(unsigned id, unsigned size_in) -{ - unsigned size; - void *ptr; - - ptr = smem_item(id, &size); - if (!ptr) - return 0; - - size_in = ALIGN(size_in, 8); - if (size_in != size) { - pr_err("smem_find(%d, %d): wrong size %d\n", - id, size_in, size); - return 0; - } - - return ptr; -} - -static irqreturn_t smsm_irq_handler(int irq, void *data) -{ - unsigned long flags; - unsigned apps, modm; - - spin_lock_irqsave(&smem_lock, flags); - - apps = raw_smsm_get_state(SMSM_STATE_APPS); - modm = raw_smsm_get_state(SMSM_STATE_MODEM); - - if (msm_smd_debug_mask & MSM_SMSM_DEBUG) - pr_info("\n", apps, modm); - if (modm & SMSM_RESET) - handle_modem_crash(); - - do_smd_probe(); - - spin_unlock_irqrestore(&smem_lock, flags); - return IRQ_HANDLED; -} - -int smsm_change_state(enum smsm_state_item item, - uint32_t clear_mask, uint32_t set_mask) -{ - void __iomem *addr = smd_info.state + item * 4; - unsigned long flags; - unsigned state; - - if (!smd_info.ready) - return -EIO; - - spin_lock_irqsave(&smem_lock, flags); - - if (raw_smsm_get_state(SMSM_STATE_MODEM) & SMSM_RESET) - handle_modem_crash(); - - state = (readl(addr) & ~clear_mask) | set_mask; - writel(state, addr); - - if (msm_smd_debug_mask & MSM_SMSM_DEBUG) - pr_info("smsm_change_state %d %x\n", item, state); - notify_other_smsm(); - - spin_unlock_irqrestore(&smem_lock, flags); - - return 0; -} - -uint32_t smsm_get_state(enum smsm_state_item item) -{ - unsigned long flags; - uint32_t rv; - - spin_lock_irqsave(&smem_lock, flags); - - rv = readl(smd_info.state + item * 4); - - if (item == SMSM_STATE_MODEM && (rv & SMSM_RESET)) - handle_modem_crash(); - - spin_unlock_irqrestore(&smem_lock, flags); - - return rv; -} - -#ifdef CONFIG_ARCH_MSM_SCORPION - -int smsm_set_sleep_duration(uint32_t delay) -{ - struct msm_dem_slave_data *ptr; - - ptr = smem_find(SMEM_APPS_DEM_SLAVE_DATA, sizeof(*ptr)); - if (ptr == NULL) { - pr_err("smsm_set_sleep_duration \n"); - return -EIO; - } - if (msm_smd_debug_mask & MSM_SMSM_DEBUG) - pr_info("smsm_set_sleep_duration %d -> %d\n", - ptr->sleep_time, delay); - ptr->sleep_time = delay; - return 0; -} - -#else - -int smsm_set_sleep_duration(uint32_t delay) -{ - uint32_t *ptr; - - ptr = smem_find(SMEM_SMSM_SLEEP_DELAY, sizeof(*ptr)); - if (ptr == NULL) { - pr_err("smsm_set_sleep_duration \n"); - return -EIO; - } - if (msm_smd_debug_mask & MSM_SMSM_DEBUG) - pr_info("smsm_set_sleep_duration %d -> %d\n", - *ptr, delay); - *ptr = delay; - return 0; -} - -#endif - -int smd_core_init(void) -{ - int r; - - /* wait for essential items to be initialized */ - for (;;) { - unsigned size; - void __iomem *state; - state = smem_item(SMEM_SMSM_SHARED_STATE, &size); - if (size == SMSM_V1_SIZE || size == SMSM_V2_SIZE) { - smd_info.state = state; - break; - } - } - - smd_info.ready = 1; - - r = request_irq(INT_A9_M2A_0, smd_modem_irq_handler, - IRQF_TRIGGER_RISING, "smd_dev", 0); - if (r < 0) - return r; - r = enable_irq_wake(INT_A9_M2A_0); - if (r < 0) - pr_err("smd_core_init: enable_irq_wake failed for A9_M2A_0\n"); - - r = request_irq(INT_A9_M2A_5, smsm_irq_handler, - IRQF_TRIGGER_RISING, "smsm_dev", 0); - if (r < 0) { - free_irq(INT_A9_M2A_0, 0); - return r; - } - r = enable_irq_wake(INT_A9_M2A_5); - if (r < 0) - pr_err("smd_core_init: enable_irq_wake failed for A9_M2A_5\n"); - -#if defined(CONFIG_QDSP6) - r = request_irq(INT_ADSP_A11, smd_dsp_irq_handler, - IRQF_TRIGGER_RISING, "smd_dsp", 0); - if (r < 0) { - free_irq(INT_A9_M2A_0, 0); - free_irq(INT_A9_M2A_5, 0); - return r; - } -#endif - - /* check for any SMD channels that may already exist */ - do_smd_probe(); - - /* indicate that we're up and running */ - smsm_change_state(SMSM_STATE_APPS, - ~0, SMSM_INIT | SMSM_SMDINIT | SMSM_RPCINIT | SMSM_RUN); -#ifdef CONFIG_ARCH_MSM_SCORPION - smsm_change_state(SMSM_STATE_APPS_DEM, ~0, 0); -#endif - - return 0; -} - -static int msm_smd_probe(struct platform_device *pdev) -{ - /* - * If we haven't waited for the ARM9 to boot up till now, - * then we need to wait here. Otherwise this should just - * return immediately. - */ - proc_comm_boot_wait(); - - INIT_WORK(&probe_work, smd_channel_probe_worker); - - if (smd_core_init()) { - pr_err("smd_core_init() failed\n"); - return -1; - } - - do_smd_probe(); - - msm_check_for_modem_crash = check_for_modem_crash; - - msm_init_last_radio_log(THIS_MODULE); - - smd_initialized = 1; - - return 0; -} - -static struct platform_driver msm_smd_driver = { - .probe = msm_smd_probe, - .driver = { - .name = MODULE_NAME, - }, -}; - -static int __init msm_smd_init(void) -{ - return platform_driver_register(&msm_smd_driver); -} - -module_init(msm_smd_init); - -MODULE_DESCRIPTION("MSM Shared Memory Core"); -MODULE_AUTHOR("Brian Swetland "); -MODULE_LICENSE("GPL"); diff --git a/arch/arm/mach-msm/smd_debug.c b/arch/arm/mach-msm/smd_debug.c deleted file mode 100644 index 8056b3e5590f..000000000000 --- a/arch/arm/mach-msm/smd_debug.c +++ /dev/null @@ -1,311 +0,0 @@ -/* arch/arm/mach-msm/smd_debug.c - * - * Copyright (C) 2007 Google, Inc. - * Author: Brian Swetland - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#include -#include - -#include - -#include "smd_private.h" - -#if defined(CONFIG_DEBUG_FS) - -static char *chstate(unsigned n) -{ - switch (n) { - case SMD_SS_CLOSED: - return "CLOSED"; - case SMD_SS_OPENING: - return "OPENING"; - case SMD_SS_OPENED: - return "OPENED"; - case SMD_SS_FLUSHING: - return "FLUSHING"; - case SMD_SS_CLOSING: - return "CLOSING"; - case SMD_SS_RESET: - return "RESET"; - case SMD_SS_RESET_OPENING: - return "ROPENING"; - default: - return "UNKNOWN"; - } -} - - -static int dump_ch(char *buf, int max, struct smd_channel *ch) -{ - volatile struct smd_half_channel *s = ch->send; - volatile struct smd_half_channel *r = ch->recv; - - return scnprintf( - buf, max, - "ch%02d:" - " %8s(%05d/%05d) %c%c%c%c%c%c%c <->" - " %8s(%05d/%05d) %c%c%c%c%c%c%c '%s'\n", ch->n, - chstate(s->state), s->tail, s->head, - s->fDSR ? 'D' : 'd', - s->fCTS ? 'C' : 'c', - s->fCD ? 'C' : 'c', - s->fRI ? 'I' : 'i', - s->fHEAD ? 'W' : 'w', - s->fTAIL ? 'R' : 'r', - s->fSTATE ? 'S' : 's', - chstate(r->state), r->tail, r->head, - r->fDSR ? 'D' : 'd', - r->fCTS ? 'R' : 'r', - r->fCD ? 'C' : 'c', - r->fRI ? 'I' : 'i', - r->fHEAD ? 'W' : 'w', - r->fTAIL ? 'R' : 'r', - r->fSTATE ? 'S' : 's', - ch->name - ); -} - -static int debug_read_stat(char *buf, int max) -{ - char *msg; - int i = 0; - - msg = smem_find(ID_DIAG_ERR_MSG, SZ_DIAG_ERR_MSG); - - if (raw_smsm_get_state(SMSM_STATE_MODEM) & SMSM_RESET) - i += scnprintf(buf + i, max - i, - "smsm: ARM9 HAS CRASHED\n"); - - i += scnprintf(buf + i, max - i, "smsm: a9: %08x a11: %08x\n", - raw_smsm_get_state(SMSM_STATE_MODEM), - raw_smsm_get_state(SMSM_STATE_APPS)); -#ifdef CONFIG_ARCH_MSM_SCORPION - i += scnprintf(buf + i, max - i, "smsm dem: apps: %08x modem: %08x " - "qdsp6: %08x power: %08x time: %08x\n", - raw_smsm_get_state(SMSM_STATE_APPS_DEM), - raw_smsm_get_state(SMSM_STATE_MODEM_DEM), - raw_smsm_get_state(SMSM_STATE_QDSP6_DEM), - raw_smsm_get_state(SMSM_STATE_POWER_MASTER_DEM), - raw_smsm_get_state(SMSM_STATE_TIME_MASTER_DEM)); -#endif - if (msg) { - msg[SZ_DIAG_ERR_MSG - 1] = 0; - i += scnprintf(buf + i, max - i, "diag: '%s'\n", msg); - } - return i; -} - -static int debug_read_mem(char *buf, int max) -{ - unsigned n; - struct smem_shared *shared = (void *) MSM_SHARED_RAM_BASE; - struct smem_heap_entry *toc = shared->heap_toc; - int i = 0; - - i += scnprintf(buf + i, max - i, - "heap: init=%d free=%d remain=%d\n", - shared->heap_info.initialized, - shared->heap_info.free_offset, - shared->heap_info.heap_remaining); - - for (n = 0; n < SMEM_NUM_ITEMS; n++) { - if (toc[n].allocated == 0) - continue; - i += scnprintf(buf + i, max - i, - "%04d: offset %08x size %08x\n", - n, toc[n].offset, toc[n].size); - } - return i; -} - -static int debug_read_ch(char *buf, int max) -{ - struct smd_channel *ch; - unsigned long flags; - int i = 0; - - spin_lock_irqsave(&smd_lock, flags); - list_for_each_entry(ch, &smd_ch_list_dsp, ch_list) - i += dump_ch(buf + i, max - i, ch); - list_for_each_entry(ch, &smd_ch_list_modem, ch_list) - i += dump_ch(buf + i, max - i, ch); - list_for_each_entry(ch, &smd_ch_closed_list, ch_list) - i += dump_ch(buf + i, max - i, ch); - spin_unlock_irqrestore(&smd_lock, flags); - - return i; -} - -static int debug_read_version(char *buf, int max) -{ - struct smem_shared *shared = (void *) MSM_SHARED_RAM_BASE; - unsigned version = shared->version[VERSION_MODEM]; - return sprintf(buf, "%d.%d\n", version >> 16, version & 0xffff); -} - -static int debug_read_build_id(char *buf, int max) -{ - unsigned size; - void *data; - - data = smem_item(SMEM_HW_SW_BUILD_ID, &size); - if (!data) - return 0; - - if (size >= max) - size = max; - memcpy(buf, data, size); - - return size; -} - -static int debug_read_alloc_tbl(char *buf, int max) -{ - struct smd_alloc_elm *shared; - int n, i = 0; - - shared = smem_find(ID_CH_ALLOC_TBL, sizeof(*shared) * 64); - - for (n = 0; n < 64; n++) { - if (shared[n].ref_count == 0) - continue; - i += scnprintf(buf + i, max - i, - "%03d: %-20s cid=%02d type=%03d " - "kind=%02d ref_count=%d\n", - n, shared[n].name, shared[n].cid, - shared[n].ctype & 0xff, - (shared[n].ctype >> 8) & 0xf, - shared[n].ref_count); - } - - return i; -} - -#define DEBUG_BUFMAX 4096 -static char debug_buffer[DEBUG_BUFMAX]; - -static ssize_t debug_read(struct file *file, char __user *buf, - size_t count, loff_t *ppos) -{ - int (*fill)(char *buf, int max) = file->private_data; - int bsize = fill(debug_buffer, DEBUG_BUFMAX); - return simple_read_from_buffer(buf, count, ppos, debug_buffer, bsize); -} - -static const struct file_operations debug_ops = { - .read = debug_read, - .open = simple_open, - .llseek = default_llseek, -}; - -static void debug_create(const char *name, umode_t mode, - struct dentry *dent, - int (*fill)(char *buf, int max)) -{ - debugfs_create_file(name, mode, dent, fill, &debug_ops); -} - -int __init smd_debugfs_init(void) -{ - struct dentry *dent; - - dent = debugfs_create_dir("smd", 0); - if (IS_ERR(dent)) - return 1; - - debug_create("ch", 0444, dent, debug_read_ch); - debug_create("stat", 0444, dent, debug_read_stat); - debug_create("mem", 0444, dent, debug_read_mem); - debug_create("version", 0444, dent, debug_read_version); - debug_create("tbl", 0444, dent, debug_read_alloc_tbl); - debug_create("build", 0444, dent, debug_read_build_id); - - return 0; -} - -#endif - - -#define MAX_NUM_SLEEP_CLIENTS 64 -#define MAX_SLEEP_NAME_LEN 8 - -#define NUM_GPIO_INT_REGISTERS 6 -#define GPIO_SMEM_NUM_GROUPS 2 -#define GPIO_SMEM_MAX_PC_INTERRUPTS 8 - -struct tramp_gpio_save { - unsigned int enable; - unsigned int detect; - unsigned int polarity; -}; - -struct tramp_gpio_smem { - uint16_t num_fired[GPIO_SMEM_NUM_GROUPS]; - uint16_t fired[GPIO_SMEM_NUM_GROUPS][GPIO_SMEM_MAX_PC_INTERRUPTS]; - uint32_t enabled[NUM_GPIO_INT_REGISTERS]; - uint32_t detection[NUM_GPIO_INT_REGISTERS]; - uint32_t polarity[NUM_GPIO_INT_REGISTERS]; -}; - - -void smsm_print_sleep_info(void) -{ - unsigned long flags; - uint32_t *ptr; -#ifndef CONFIG_ARCH_MSM_SCORPION - struct tramp_gpio_smem *gpio; - struct smsm_interrupt_info *int_info; -#endif - - - spin_lock_irqsave(&smem_lock, flags); - - ptr = smem_alloc(SMEM_SMSM_SLEEP_DELAY, sizeof(*ptr)); - if (ptr) - pr_info("SMEM_SMSM_SLEEP_DELAY: %x\n", *ptr); - - ptr = smem_alloc(SMEM_SMSM_LIMIT_SLEEP, sizeof(*ptr)); - if (ptr) - pr_info("SMEM_SMSM_LIMIT_SLEEP: %x\n", *ptr); - - ptr = smem_alloc(SMEM_SLEEP_POWER_COLLAPSE_DISABLED, sizeof(*ptr)); - if (ptr) - pr_info("SMEM_SLEEP_POWER_COLLAPSE_DISABLED: %x\n", *ptr); - -#ifndef CONFIG_ARCH_MSM_SCORPION - int_info = smem_alloc(SMEM_SMSM_INT_INFO, sizeof(*int_info)); - if (int_info) - pr_info("SMEM_SMSM_INT_INFO %x %x %x\n", - int_info->interrupt_mask, - int_info->pending_interrupts, - int_info->wakeup_reason); - - gpio = smem_alloc(SMEM_GPIO_INT, sizeof(*gpio)); - if (gpio) { - int i; - for (i = 0; i < NUM_GPIO_INT_REGISTERS; i++) - pr_info("SMEM_GPIO_INT: %d: e %x d %x p %x\n", - i, gpio->enabled[i], gpio->detection[i], - gpio->polarity[i]); - - for (i = 0; i < GPIO_SMEM_NUM_GROUPS; i++) - pr_info("SMEM_GPIO_INT: %d: f %d: %d %d...\n", - i, gpio->num_fired[i], gpio->fired[i][0], - gpio->fired[i][1]); - } -#else -#endif - spin_unlock_irqrestore(&smem_lock, flags); -} - diff --git a/arch/arm/mach-msm/smd_private.h b/arch/arm/mach-msm/smd_private.h deleted file mode 100644 index 727bfe68aa9b..000000000000 --- a/arch/arm/mach-msm/smd_private.h +++ /dev/null @@ -1,403 +0,0 @@ -/* arch/arm/mach-msm/smd_private.h - * - * Copyright (C) 2007 Google, Inc. - * Copyright (c) 2007 QUALCOMM Incorporated - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ -#ifndef _ARCH_ARM_MACH_MSM_MSM_SMD_PRIVATE_H_ -#define _ARCH_ARM_MACH_MSM_MSM_SMD_PRIVATE_H_ - -#include -#include -#include -#include - -#include - -struct smem_heap_info { - unsigned initialized; - unsigned free_offset; - unsigned heap_remaining; - unsigned reserved; -}; - -struct smem_heap_entry { - unsigned allocated; - unsigned offset; - unsigned size; - unsigned reserved; -}; - -struct smem_proc_comm { - unsigned command; - unsigned status; - unsigned data1; - unsigned data2; -}; - -#define PC_APPS 0 -#define PC_MODEM 1 - -#define VERSION_SMD 0 -#define VERSION_QDSP6 4 -#define VERSION_APPS_SBL 6 -#define VERSION_MODEM_SBL 7 -#define VERSION_APPS 8 -#define VERSION_MODEM 9 - -struct smem_shared { - struct smem_proc_comm proc_comm[4]; - unsigned version[32]; - struct smem_heap_info heap_info; - struct smem_heap_entry heap_toc[512]; -}; - -#define SMSM_V1_SIZE (sizeof(unsigned) * 8) -#define SMSM_V2_SIZE (sizeof(unsigned) * 4) - -#ifdef CONFIG_MSM_SMD_PKG3 -struct smsm_interrupt_info { - uint32_t interrupt_mask; - uint32_t pending_interrupts; - uint32_t wakeup_reason; -}; -#else -#define DEM_MAX_PORT_NAME_LEN (20) -struct msm_dem_slave_data { - uint32_t sleep_time; - uint32_t interrupt_mask; - uint32_t resources_used; - uint32_t reserved1; - - uint32_t wakeup_reason; - uint32_t pending_interrupts; - uint32_t rpc_prog; - uint32_t rpc_proc; - char smd_port_name[DEM_MAX_PORT_NAME_LEN]; - uint32_t reserved2; -}; -#endif - -#define SZ_DIAG_ERR_MSG 0xC8 -#define ID_DIAG_ERR_MSG SMEM_DIAG_ERR_MESSAGE -#define ID_SMD_CHANNELS SMEM_SMD_BASE_ID -#define ID_SHARED_STATE SMEM_SMSM_SHARED_STATE -#define ID_CH_ALLOC_TBL SMEM_CHANNEL_ALLOC_TBL - -#define SMSM_INIT 0x00000001 -#define SMSM_SMDINIT 0x00000008 -#define SMSM_RPCINIT 0x00000020 -#define SMSM_RESET 0x00000040 -#define SMSM_RSA 0x00000080 -#define SMSM_RUN 0x00000100 -#define SMSM_PWRC 0x00000200 -#define SMSM_TIMEWAIT 0x00000400 -#define SMSM_TIMEINIT 0x00000800 -#define SMSM_PWRC_EARLY_EXIT 0x00001000 -#define SMSM_WFPI 0x00002000 -#define SMSM_SLEEP 0x00004000 -#define SMSM_SLEEPEXIT 0x00008000 -#define SMSM_APPS_REBOOT 0x00020000 -#define SMSM_SYSTEM_POWER_DOWN 0x00040000 -#define SMSM_SYSTEM_REBOOT 0x00080000 -#define SMSM_SYSTEM_DOWNLOAD 0x00100000 -#define SMSM_PWRC_SUSPEND 0x00200000 -#define SMSM_APPS_SHUTDOWN 0x00400000 -#define SMSM_SMD_LOOPBACK 0x00800000 -#define SMSM_RUN_QUIET 0x01000000 -#define SMSM_MODEM_WAIT 0x02000000 -#define SMSM_MODEM_BREAK 0x04000000 -#define SMSM_MODEM_CONTINUE 0x08000000 -#define SMSM_UNKNOWN 0x80000000 - -#define SMSM_WKUP_REASON_RPC 0x00000001 -#define SMSM_WKUP_REASON_INT 0x00000002 -#define SMSM_WKUP_REASON_GPIO 0x00000004 -#define SMSM_WKUP_REASON_TIMER 0x00000008 -#define SMSM_WKUP_REASON_ALARM 0x00000010 -#define SMSM_WKUP_REASON_RESET 0x00000020 - -#ifdef CONFIG_ARCH_MSM7X00A -enum smsm_state_item { - SMSM_STATE_APPS = 1, - SMSM_STATE_MODEM = 3, - SMSM_STATE_COUNT, -}; -#else -enum smsm_state_item { - SMSM_STATE_APPS, - SMSM_STATE_MODEM, - SMSM_STATE_HEXAGON, - SMSM_STATE_APPS_DEM, - SMSM_STATE_MODEM_DEM, - SMSM_STATE_QDSP6_DEM, - SMSM_STATE_POWER_MASTER_DEM, - SMSM_STATE_TIME_MASTER_DEM, - SMSM_STATE_COUNT, -}; -#endif - -void *smem_alloc(unsigned id, unsigned size); -int smsm_change_state(enum smsm_state_item item, uint32_t clear_mask, uint32_t set_mask); -uint32_t smsm_get_state(enum smsm_state_item item); -int smsm_set_sleep_duration(uint32_t delay); -void smsm_print_sleep_info(void); - -#define SMEM_NUM_SMD_CHANNELS 64 - -typedef enum { - /* fixed items */ - SMEM_PROC_COMM = 0, - SMEM_HEAP_INFO, - SMEM_ALLOCATION_TABLE, - SMEM_VERSION_INFO, - SMEM_HW_RESET_DETECT, - SMEM_AARM_WARM_BOOT, - SMEM_DIAG_ERR_MESSAGE, - SMEM_SPINLOCK_ARRAY, - SMEM_MEMORY_BARRIER_LOCATION, - - /* dynamic items */ - SMEM_AARM_PARTITION_TABLE, - SMEM_AARM_BAD_BLOCK_TABLE, - SMEM_RESERVE_BAD_BLOCKS, - SMEM_WM_UUID, - SMEM_CHANNEL_ALLOC_TBL, - SMEM_SMD_BASE_ID, - SMEM_SMEM_LOG_IDX = SMEM_SMD_BASE_ID + SMEM_NUM_SMD_CHANNELS, - SMEM_SMEM_LOG_EVENTS, - SMEM_SMEM_STATIC_LOG_IDX, - SMEM_SMEM_STATIC_LOG_EVENTS, - SMEM_SMEM_SLOW_CLOCK_SYNC, - SMEM_SMEM_SLOW_CLOCK_VALUE, - SMEM_BIO_LED_BUF, - SMEM_SMSM_SHARED_STATE, - SMEM_SMSM_INT_INFO, - SMEM_SMSM_SLEEP_DELAY, - SMEM_SMSM_LIMIT_SLEEP, - SMEM_SLEEP_POWER_COLLAPSE_DISABLED, - SMEM_KEYPAD_KEYS_PRESSED, - SMEM_KEYPAD_STATE_UPDATED, - SMEM_KEYPAD_STATE_IDX, - SMEM_GPIO_INT, - SMEM_MDDI_LCD_IDX, - SMEM_MDDI_HOST_DRIVER_STATE, - SMEM_MDDI_LCD_DISP_STATE, - SMEM_LCD_CUR_PANEL, - SMEM_MARM_BOOT_SEGMENT_INFO, - SMEM_AARM_BOOT_SEGMENT_INFO, - SMEM_SLEEP_STATIC, - SMEM_SCORPION_FREQUENCY, - SMEM_SMD_PROFILES, - SMEM_TSSC_BUSY, - SMEM_HS_SUSPEND_FILTER_INFO, - SMEM_BATT_INFO, - SMEM_APPS_BOOT_MODE, - SMEM_VERSION_FIRST, - SMEM_VERSION_LAST = SMEM_VERSION_FIRST + 24, - SMEM_OSS_RRCASN1_BUF1, - SMEM_OSS_RRCASN1_BUF2, - SMEM_ID_VENDOR0, - SMEM_ID_VENDOR1, - SMEM_ID_VENDOR2, - SMEM_HW_SW_BUILD_ID, - SMEM_SMD_BLOCK_PORT_BASE_ID, - SMEM_SMD_BLOCK_PORT_PROC0_HEAP = SMEM_SMD_BLOCK_PORT_BASE_ID + SMEM_NUM_SMD_CHANNELS, - SMEM_SMD_BLOCK_PORT_PROC1_HEAP = SMEM_SMD_BLOCK_PORT_PROC0_HEAP + SMEM_NUM_SMD_CHANNELS, - SMEM_I2C_MUTEX = SMEM_SMD_BLOCK_PORT_PROC1_HEAP + SMEM_NUM_SMD_CHANNELS, - SMEM_SCLK_CONVERSION, - SMEM_SMD_SMSM_INTR_MUX, - SMEM_SMSM_CPU_INTR_MASK, - SMEM_APPS_DEM_SLAVE_DATA, - SMEM_QDSP6_DEM_SLAVE_DATA, - SMEM_CLKREGIM_BSP, - SMEM_CLKREGIM_SOURCES, - SMEM_SMD_FIFO_BASE_ID, - SMEM_USABLE_RAM_PARTITION_TABLE = SMEM_SMD_FIFO_BASE_ID + SMEM_NUM_SMD_CHANNELS, - SMEM_POWER_ON_STATUS_INFO, - SMEM_DAL_AREA, - SMEM_SMEM_LOG_POWER_IDX, - SMEM_SMEM_LOG_POWER_WRAP, - SMEM_SMEM_LOG_POWER_EVENTS, - SMEM_ERR_CRASH_LOG, - SMEM_ERR_F3_TRACE_LOG, - SMEM_NUM_ITEMS, -} smem_mem_type; - - -#define SMD_SS_CLOSED 0x00000000 -#define SMD_SS_OPENING 0x00000001 -#define SMD_SS_OPENED 0x00000002 -#define SMD_SS_FLUSHING 0x00000003 -#define SMD_SS_CLOSING 0x00000004 -#define SMD_SS_RESET 0x00000005 -#define SMD_SS_RESET_OPENING 0x00000006 - -#define SMD_BUF_SIZE 8192 -#define SMD_CHANNELS 64 - -#define SMD_HEADER_SIZE 20 - -struct smd_alloc_elm { - char name[20]; - uint32_t cid; - uint32_t ctype; - uint32_t ref_count; -}; - -struct smd_half_channel { - unsigned state; - unsigned char fDSR; - unsigned char fCTS; - unsigned char fCD; - unsigned char fRI; - unsigned char fHEAD; - unsigned char fTAIL; - unsigned char fSTATE; - unsigned char fUNUSED; - unsigned tail; - unsigned head; -} __attribute__(( aligned(4), packed )); - -/* Only used on SMD package v3 on msm7201a */ -struct smd_shared_v1 { - struct smd_half_channel ch0; - unsigned char data0[SMD_BUF_SIZE]; - struct smd_half_channel ch1; - unsigned char data1[SMD_BUF_SIZE]; -}; - -/* Used on SMD package v4 */ -struct smd_shared_v2 { - struct smd_half_channel ch0; - struct smd_half_channel ch1; -}; - -struct smd_channel { - volatile struct smd_half_channel *send; - volatile struct smd_half_channel *recv; - unsigned char *send_data; - unsigned char *recv_data; - - unsigned fifo_mask; - unsigned fifo_size; - unsigned current_packet; - unsigned n; - - struct list_head ch_list; - - void *priv; - void (*notify)(void *priv, unsigned flags); - - int (*read)(struct smd_channel *ch, void *data, int len); - int (*write)(struct smd_channel *ch, const void *data, int len); - int (*read_avail)(struct smd_channel *ch); - int (*write_avail)(struct smd_channel *ch); - - void (*update_state)(struct smd_channel *ch); - unsigned last_state; - void (*notify_other_cpu)(void); - unsigned type; - - char name[32]; - struct platform_device pdev; -}; - -#define SMD_TYPE_MASK 0x0FF -#define SMD_TYPE_APPS_MODEM 0x000 -#define SMD_TYPE_APPS_DSP 0x001 -#define SMD_TYPE_MODEM_DSP 0x002 - -#define SMD_KIND_MASK 0xF00 -#define SMD_KIND_UNKNOWN 0x000 -#define SMD_KIND_STREAM 0x100 -#define SMD_KIND_PACKET 0x200 - -extern struct list_head smd_ch_closed_list; -extern struct list_head smd_ch_list_modem; -extern struct list_head smd_ch_list_dsp; - -extern spinlock_t smd_lock; -extern spinlock_t smem_lock; - -void *smem_find(unsigned id, unsigned size); -void *smem_item(unsigned id, unsigned *size); -uint32_t raw_smsm_get_state(enum smsm_state_item item); - -extern void msm_init_last_radio_log(struct module *); - -#ifdef CONFIG_MSM_SMD_PKG3 -/* - * This allocator assumes an SMD Package v3 which only exists on - * MSM7x00 SoC's. - */ -static inline int _smd_alloc_channel(struct smd_channel *ch) -{ - struct smd_shared_v1 *shared1; - - shared1 = smem_alloc(ID_SMD_CHANNELS + ch->n, sizeof(*shared1)); - if (!shared1) { - pr_err("smd_alloc_channel() cid %d does not exist\n", ch->n); - return -1; - } - ch->send = &shared1->ch0; - ch->recv = &shared1->ch1; - ch->send_data = shared1->data0; - ch->recv_data = shared1->data1; - ch->fifo_size = SMD_BUF_SIZE; - return 0; -} -#else -/* - * This allocator assumes an SMD Package v4, the most common - * and the default. - */ -static inline int _smd_alloc_channel(struct smd_channel *ch) -{ - struct smd_shared_v2 *shared2; - void *buffer; - unsigned buffer_sz; - - shared2 = smem_alloc(SMEM_SMD_BASE_ID + ch->n, sizeof(*shared2)); - buffer = smem_item(SMEM_SMD_FIFO_BASE_ID + ch->n, &buffer_sz); - - if (!buffer) - return -1; - - /* buffer must be a power-of-two size */ - if (buffer_sz & (buffer_sz - 1)) - return -1; - - buffer_sz /= 2; - ch->send = &shared2->ch0; - ch->recv = &shared2->ch1; - ch->send_data = buffer; - ch->recv_data = buffer + buffer_sz; - ch->fifo_size = buffer_sz; - return 0; -} -#endif /* CONFIG_MSM_SMD_PKG3 */ - -#if defined(CONFIG_ARCH_MSM7X30) -static inline void msm_a2m_int(uint32_t irq) -{ - writel(1 << irq, MSM_GCC_BASE + 0x8); -} -#else -static inline void msm_a2m_int(uint32_t irq) -{ - writel(1, MSM_CSR_BASE + 0x400 + (irq * 4)); -} -#endif /* CONFIG_ARCH_MSM7X30 */ - - -#endif diff --git a/arch/arm/mach-msm/vreg.c b/arch/arm/mach-msm/vreg.c deleted file mode 100644 index bd66ed04d6dc..000000000000 --- a/arch/arm/mach-msm/vreg.c +++ /dev/null @@ -1,220 +0,0 @@ -/* arch/arm/mach-msm/vreg.c - * - * Copyright (C) 2008 Google, Inc. - * Copyright (c) 2009, Code Aurora Forum. All rights reserved. - * Author: Brian Swetland - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#include -#include -#include -#include -#include -#include -#include - -#include "proc_comm.h" - -struct vreg { - const char *name; - unsigned id; - int status; - unsigned refcnt; -}; - -#define VREG(_name, _id, _status, _refcnt) \ - { .name = _name, .id = _id, .status = _status, .refcnt = _refcnt } - -static struct vreg vregs[] = { - VREG("msma", 0, 0, 0), - VREG("msmp", 1, 0, 0), - VREG("msme1", 2, 0, 0), - VREG("msmc1", 3, 0, 0), - VREG("msmc2", 4, 0, 0), - VREG("gp3", 5, 0, 0), - VREG("msme2", 6, 0, 0), - VREG("gp4", 7, 0, 0), - VREG("gp1", 8, 0, 0), - VREG("tcxo", 9, 0, 0), - VREG("pa", 10, 0, 0), - VREG("rftx", 11, 0, 0), - VREG("rfrx1", 12, 0, 0), - VREG("rfrx2", 13, 0, 0), - VREG("synt", 14, 0, 0), - VREG("wlan", 15, 0, 0), - VREG("usb", 16, 0, 0), - VREG("boost", 17, 0, 0), - VREG("mmc", 18, 0, 0), - VREG("ruim", 19, 0, 0), - VREG("msmc0", 20, 0, 0), - VREG("gp2", 21, 0, 0), - VREG("gp5", 22, 0, 0), - VREG("gp6", 23, 0, 0), - VREG("rf", 24, 0, 0), - VREG("rf_vco", 26, 0, 0), - VREG("mpll", 27, 0, 0), - VREG("s2", 28, 0, 0), - VREG("s3", 29, 0, 0), - VREG("rfubm", 30, 0, 0), - VREG("ncp", 31, 0, 0), - VREG("gp7", 32, 0, 0), - VREG("gp8", 33, 0, 0), - VREG("gp9", 34, 0, 0), - VREG("gp10", 35, 0, 0), - VREG("gp11", 36, 0, 0), - VREG("gp12", 37, 0, 0), - VREG("gp13", 38, 0, 0), - VREG("gp14", 39, 0, 0), - VREG("gp15", 40, 0, 0), - VREG("gp16", 41, 0, 0), - VREG("gp17", 42, 0, 0), - VREG("s4", 43, 0, 0), - VREG("usb2", 44, 0, 0), - VREG("wlan2", 45, 0, 0), - VREG("xo_out", 46, 0, 0), - VREG("lvsw0", 47, 0, 0), - VREG("lvsw1", 48, 0, 0), -}; - -struct vreg *vreg_get(struct device *dev, const char *id) -{ - int n; - for (n = 0; n < ARRAY_SIZE(vregs); n++) { - if (!strcmp(vregs[n].name, id)) - return vregs + n; - } - return ERR_PTR(-ENOENT); -} - -void vreg_put(struct vreg *vreg) -{ -} - -int vreg_enable(struct vreg *vreg) -{ - unsigned id = vreg->id; - unsigned enable = 1; - - if (vreg->refcnt == 0) - vreg->status = msm_proc_comm(PCOM_VREG_SWITCH, &id, &enable); - - if ((vreg->refcnt < UINT_MAX) && (!vreg->status)) - vreg->refcnt++; - - return vreg->status; -} - -int vreg_disable(struct vreg *vreg) -{ - unsigned id = vreg->id; - unsigned enable = 0; - - if (!vreg->refcnt) - return 0; - - if (vreg->refcnt == 1) - vreg->status = msm_proc_comm(PCOM_VREG_SWITCH, &id, &enable); - - if (!vreg->status) - vreg->refcnt--; - - return vreg->status; -} - -int vreg_set_level(struct vreg *vreg, unsigned mv) -{ - unsigned id = vreg->id; - - vreg->status = msm_proc_comm(PCOM_VREG_SET_LEVEL, &id, &mv); - return vreg->status; -} - -#if defined(CONFIG_DEBUG_FS) - -static int vreg_debug_set(void *data, u64 val) -{ - struct vreg *vreg = data; - switch (val) { - case 0: - vreg_disable(vreg); - break; - case 1: - vreg_enable(vreg); - break; - default: - vreg_set_level(vreg, val); - break; - } - return 0; -} - -static int vreg_debug_get(void *data, u64 *val) -{ - struct vreg *vreg = data; - - if (!vreg->status) - *val = 0; - else - *val = 1; - - return 0; -} - -static int vreg_debug_count_set(void *data, u64 val) -{ - struct vreg *vreg = data; - if (val > UINT_MAX) - val = UINT_MAX; - vreg->refcnt = val; - return 0; -} - -static int vreg_debug_count_get(void *data, u64 *val) -{ - struct vreg *vreg = data; - - *val = vreg->refcnt; - - return 0; -} - -DEFINE_SIMPLE_ATTRIBUTE(vreg_fops, vreg_debug_get, vreg_debug_set, "%llu\n"); -DEFINE_SIMPLE_ATTRIBUTE(vreg_count_fops, vreg_debug_count_get, - vreg_debug_count_set, "%llu\n"); - -static int __init vreg_debug_init(void) -{ - struct dentry *dent; - int n; - char name[32]; - const char *refcnt_name = "_refcnt"; - - dent = debugfs_create_dir("vreg", 0); - if (IS_ERR(dent)) - return 0; - - for (n = 0; n < ARRAY_SIZE(vregs); n++) { - (void) debugfs_create_file(vregs[n].name, 0644, - dent, vregs + n, &vreg_fops); - - strlcpy(name, vregs[n].name, sizeof(name)); - strlcat(name, refcnt_name, sizeof(name)); - (void) debugfs_create_file(name, 0644, - dent, vregs + n, &vreg_count_fops); - } - - return 0; -} - -device_initcall(vreg_debug_init); -#endif -- cgit v1.2.3 From 271c865161c57cfabca45b93eaa712b19da365bc Mon Sep 17 00:00:00 2001 From: Gerd Hoffmann Date: Fri, 27 Mar 2015 12:46:12 +1030 Subject: Add virtio-input driver. virtio-input is basically evdev-events-over-virtio, so this driver isn't much more than reading configuration from config space and forwarding incoming events to the linux input layer. Signed-off-by: Gerd Hoffmann Acked-by: Michael S. Tsirkin Signed-off-by: Rusty Russell --- MAINTAINERS | 6 + drivers/virtio/Kconfig | 10 + drivers/virtio/Makefile | 1 + drivers/virtio/virtio_input.c | 384 ++++++++++++++++++++++++++++++++++++++ include/uapi/linux/Kbuild | 1 + include/uapi/linux/virtio_ids.h | 1 + include/uapi/linux/virtio_input.h | 76 ++++++++ 7 files changed, 479 insertions(+) create mode 100644 drivers/virtio/virtio_input.c create mode 100644 include/uapi/linux/virtio_input.h (limited to 'MAINTAINERS') diff --git a/MAINTAINERS b/MAINTAINERS index 0e1abe8cc684..585e6cdd9186 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -10435,6 +10435,12 @@ S: Maintained F: drivers/vhost/ F: include/uapi/linux/vhost.h +VIRTIO INPUT DRIVER +M: Gerd Hoffmann +S: Maintained +F: drivers/virtio/virtio_input.c +F: include/uapi/linux/virtio_input.h + VIA RHINE NETWORK DRIVER M: Roger Luethi S: Maintained diff --git a/drivers/virtio/Kconfig b/drivers/virtio/Kconfig index b546da5d8ea3..cab9f3f63a38 100644 --- a/drivers/virtio/Kconfig +++ b/drivers/virtio/Kconfig @@ -48,6 +48,16 @@ config VIRTIO_BALLOON If unsure, say M. +config VIRTIO_INPUT + tristate "Virtio input driver" + depends on VIRTIO + depends on INPUT + ---help--- + This driver supports virtio input devices such as + keyboards, mice and tablets. + + If unsure, say M. + config VIRTIO_MMIO tristate "Platform bus driver for memory mapped virtio devices" depends on HAS_IOMEM diff --git a/drivers/virtio/Makefile b/drivers/virtio/Makefile index d85565b8ea46..41e30e3dc842 100644 --- a/drivers/virtio/Makefile +++ b/drivers/virtio/Makefile @@ -4,3 +4,4 @@ obj-$(CONFIG_VIRTIO_PCI) += virtio_pci.o virtio_pci-y := virtio_pci_modern.o virtio_pci_common.o virtio_pci-$(CONFIG_VIRTIO_PCI_LEGACY) += virtio_pci_legacy.o obj-$(CONFIG_VIRTIO_BALLOON) += virtio_balloon.o +obj-$(CONFIG_VIRTIO_INPUT) += virtio_input.o diff --git a/drivers/virtio/virtio_input.c b/drivers/virtio/virtio_input.c new file mode 100644 index 000000000000..60e2a1677563 --- /dev/null +++ b/drivers/virtio/virtio_input.c @@ -0,0 +1,384 @@ +#include +#include +#include +#include + +#include +#include + +struct virtio_input { + struct virtio_device *vdev; + struct input_dev *idev; + char name[64]; + char serial[64]; + char phys[64]; + struct virtqueue *evt, *sts; + struct virtio_input_event evts[64]; + spinlock_t lock; + bool ready; +}; + +static void virtinput_queue_evtbuf(struct virtio_input *vi, + struct virtio_input_event *evtbuf) +{ + struct scatterlist sg[1]; + + sg_init_one(sg, evtbuf, sizeof(*evtbuf)); + virtqueue_add_inbuf(vi->evt, sg, 1, evtbuf, GFP_ATOMIC); +} + +static void virtinput_recv_events(struct virtqueue *vq) +{ + struct virtio_input *vi = vq->vdev->priv; + struct virtio_input_event *event; + unsigned long flags; + unsigned int len; + + spin_lock_irqsave(&vi->lock, flags); + if (vi->ready) { + while ((event = virtqueue_get_buf(vi->evt, &len)) != NULL) { + spin_unlock_irqrestore(&vi->lock, flags); + input_event(vi->idev, + le16_to_cpu(event->type), + le16_to_cpu(event->code), + le32_to_cpu(event->value)); + spin_lock_irqsave(&vi->lock, flags); + virtinput_queue_evtbuf(vi, event); + } + virtqueue_kick(vq); + } + spin_unlock_irqrestore(&vi->lock, flags); +} + +/* + * On error we are losing the status update, which isn't critical as + * this is typically used for stuff like keyboard leds. + */ +static int virtinput_send_status(struct virtio_input *vi, + u16 type, u16 code, s32 value) +{ + struct virtio_input_event *stsbuf; + struct scatterlist sg[1]; + unsigned long flags; + int rc; + + stsbuf = kzalloc(sizeof(*stsbuf), GFP_ATOMIC); + if (!stsbuf) + return -ENOMEM; + + stsbuf->type = cpu_to_le16(type); + stsbuf->code = cpu_to_le16(code); + stsbuf->value = cpu_to_le32(value); + sg_init_one(sg, stsbuf, sizeof(*stsbuf)); + + spin_lock_irqsave(&vi->lock, flags); + if (vi->ready) { + rc = virtqueue_add_outbuf(vi->sts, sg, 1, stsbuf, GFP_ATOMIC); + virtqueue_kick(vi->sts); + } else { + rc = -ENODEV; + } + spin_unlock_irqrestore(&vi->lock, flags); + + if (rc != 0) + kfree(stsbuf); + return rc; +} + +static void virtinput_recv_status(struct virtqueue *vq) +{ + struct virtio_input *vi = vq->vdev->priv; + struct virtio_input_event *stsbuf; + unsigned long flags; + unsigned int len; + + spin_lock_irqsave(&vi->lock, flags); + while ((stsbuf = virtqueue_get_buf(vi->sts, &len)) != NULL) + kfree(stsbuf); + spin_unlock_irqrestore(&vi->lock, flags); +} + +static int virtinput_status(struct input_dev *idev, unsigned int type, + unsigned int code, int value) +{ + struct virtio_input *vi = input_get_drvdata(idev); + + return virtinput_send_status(vi, type, code, value); +} + +static u8 virtinput_cfg_select(struct virtio_input *vi, + u8 select, u8 subsel) +{ + u8 size; + + virtio_cwrite(vi->vdev, struct virtio_input_config, select, &select); + virtio_cwrite(vi->vdev, struct virtio_input_config, subsel, &subsel); + virtio_cread(vi->vdev, struct virtio_input_config, size, &size); + return size; +} + +static void virtinput_cfg_bits(struct virtio_input *vi, int select, int subsel, + unsigned long *bits, unsigned int bitcount) +{ + unsigned int bit; + u8 *virtio_bits; + u8 bytes; + + bytes = virtinput_cfg_select(vi, select, subsel); + if (!bytes) + return; + if (bitcount > bytes * 8) + bitcount = bytes * 8; + + /* + * Bitmap in virtio config space is a simple stream of bytes, + * with the first byte carrying bits 0-7, second bits 8-15 and + * so on. + */ + virtio_bits = kzalloc(bytes, GFP_KERNEL); + if (!virtio_bits) + return; + virtio_cread_bytes(vi->vdev, offsetof(struct virtio_input_config, + u.bitmap), + virtio_bits, bytes); + for (bit = 0; bit < bitcount; bit++) { + if (virtio_bits[bit / 8] & (1 << (bit % 8))) + __set_bit(bit, bits); + } + kfree(virtio_bits); + + if (select == VIRTIO_INPUT_CFG_EV_BITS) + __set_bit(subsel, vi->idev->evbit); +} + +static void virtinput_cfg_abs(struct virtio_input *vi, int abs) +{ + u32 mi, ma, re, fu, fl; + + virtinput_cfg_select(vi, VIRTIO_INPUT_CFG_ABS_INFO, abs); + virtio_cread(vi->vdev, struct virtio_input_config, u.abs.min, &mi); + virtio_cread(vi->vdev, struct virtio_input_config, u.abs.max, &ma); + virtio_cread(vi->vdev, struct virtio_input_config, u.abs.res, &re); + virtio_cread(vi->vdev, struct virtio_input_config, u.abs.fuzz, &fu); + virtio_cread(vi->vdev, struct virtio_input_config, u.abs.flat, &fl); + input_set_abs_params(vi->idev, abs, mi, ma, fu, fl); + input_abs_set_res(vi->idev, abs, re); +} + +static int virtinput_init_vqs(struct virtio_input *vi) +{ + struct virtqueue *vqs[2]; + vq_callback_t *cbs[] = { virtinput_recv_events, + virtinput_recv_status }; + static const char *names[] = { "events", "status" }; + int err; + + err = vi->vdev->config->find_vqs(vi->vdev, 2, vqs, cbs, names); + if (err) + return err; + vi->evt = vqs[0]; + vi->sts = vqs[1]; + + return 0; +} + +static void virtinput_fill_evt(struct virtio_input *vi) +{ + unsigned long flags; + int i, size; + + spin_lock_irqsave(&vi->lock, flags); + size = virtqueue_get_vring_size(vi->evt); + if (size > ARRAY_SIZE(vi->evts)) + size = ARRAY_SIZE(vi->evts); + for (i = 0; i < size; i++) + virtinput_queue_evtbuf(vi, &vi->evts[i]); + virtqueue_kick(vi->evt); + spin_unlock_irqrestore(&vi->lock, flags); +} + +static int virtinput_probe(struct virtio_device *vdev) +{ + struct virtio_input *vi; + unsigned long flags; + size_t size; + int abs, err; + + if (!virtio_has_feature(vdev, VIRTIO_F_VERSION_1)) + return -ENODEV; + + vi = kzalloc(sizeof(*vi), GFP_KERNEL); + if (!vi) + return -ENOMEM; + + vdev->priv = vi; + vi->vdev = vdev; + spin_lock_init(&vi->lock); + + err = virtinput_init_vqs(vi); + if (err) + goto err_init_vq; + + vi->idev = input_allocate_device(); + if (!vi->idev) { + err = -ENOMEM; + goto err_input_alloc; + } + input_set_drvdata(vi->idev, vi); + + size = virtinput_cfg_select(vi, VIRTIO_INPUT_CFG_ID_NAME, 0); + virtio_cread_bytes(vi->vdev, offsetof(struct virtio_input_config, + u.string), + vi->name, min(size, sizeof(vi->name))); + size = virtinput_cfg_select(vi, VIRTIO_INPUT_CFG_ID_SERIAL, 0); + virtio_cread_bytes(vi->vdev, offsetof(struct virtio_input_config, + u.string), + vi->serial, min(size, sizeof(vi->serial))); + snprintf(vi->phys, sizeof(vi->phys), + "virtio%d/input0", vdev->index); + vi->idev->name = vi->name; + vi->idev->phys = vi->phys; + vi->idev->uniq = vi->serial; + + size = virtinput_cfg_select(vi, VIRTIO_INPUT_CFG_ID_DEVIDS, 0); + if (size >= sizeof(struct virtio_input_devids)) { + virtio_cread(vi->vdev, struct virtio_input_config, + u.ids.bustype, &vi->idev->id.bustype); + virtio_cread(vi->vdev, struct virtio_input_config, + u.ids.vendor, &vi->idev->id.vendor); + virtio_cread(vi->vdev, struct virtio_input_config, + u.ids.product, &vi->idev->id.product); + virtio_cread(vi->vdev, struct virtio_input_config, + u.ids.version, &vi->idev->id.version); + } else { + vi->idev->id.bustype = BUS_VIRTUAL; + } + + virtinput_cfg_bits(vi, VIRTIO_INPUT_CFG_PROP_BITS, 0, + vi->idev->propbit, INPUT_PROP_CNT); + size = virtinput_cfg_select(vi, VIRTIO_INPUT_CFG_EV_BITS, EV_REP); + if (size) + __set_bit(EV_REP, vi->idev->evbit); + + vi->idev->dev.parent = &vdev->dev; + vi->idev->event = virtinput_status; + + /* device -> kernel */ + virtinput_cfg_bits(vi, VIRTIO_INPUT_CFG_EV_BITS, EV_KEY, + vi->idev->keybit, KEY_CNT); + virtinput_cfg_bits(vi, VIRTIO_INPUT_CFG_EV_BITS, EV_REL, + vi->idev->relbit, REL_CNT); + virtinput_cfg_bits(vi, VIRTIO_INPUT_CFG_EV_BITS, EV_ABS, + vi->idev->absbit, ABS_CNT); + virtinput_cfg_bits(vi, VIRTIO_INPUT_CFG_EV_BITS, EV_MSC, + vi->idev->mscbit, MSC_CNT); + virtinput_cfg_bits(vi, VIRTIO_INPUT_CFG_EV_BITS, EV_SW, + vi->idev->swbit, SW_CNT); + + /* kernel -> device */ + virtinput_cfg_bits(vi, VIRTIO_INPUT_CFG_EV_BITS, EV_LED, + vi->idev->ledbit, LED_CNT); + virtinput_cfg_bits(vi, VIRTIO_INPUT_CFG_EV_BITS, EV_SND, + vi->idev->sndbit, SND_CNT); + + if (test_bit(EV_ABS, vi->idev->evbit)) { + for (abs = 0; abs < ABS_CNT; abs++) { + if (!test_bit(abs, vi->idev->absbit)) + continue; + virtinput_cfg_abs(vi, abs); + } + } + + virtio_device_ready(vdev); + vi->ready = true; + err = input_register_device(vi->idev); + if (err) + goto err_input_register; + + virtinput_fill_evt(vi); + return 0; + +err_input_register: + spin_lock_irqsave(&vi->lock, flags); + vi->ready = false; + spin_unlock_irqrestore(&vi->lock, flags); + input_free_device(vi->idev); +err_input_alloc: + vdev->config->del_vqs(vdev); +err_init_vq: + kfree(vi); + return err; +} + +static void virtinput_remove(struct virtio_device *vdev) +{ + struct virtio_input *vi = vdev->priv; + unsigned long flags; + + spin_lock_irqsave(&vi->lock, flags); + vi->ready = false; + spin_unlock_irqrestore(&vi->lock, flags); + + input_unregister_device(vi->idev); + vdev->config->del_vqs(vdev); + kfree(vi); +} + +#ifdef CONFIG_PM_SLEEP +static int virtinput_freeze(struct virtio_device *vdev) +{ + struct virtio_input *vi = vdev->priv; + unsigned long flags; + + spin_lock_irqsave(&vi->lock, flags); + vi->ready = false; + spin_unlock_irqrestore(&vi->lock, flags); + + vdev->config->del_vqs(vdev); + return 0; +} + +static int virtinput_restore(struct virtio_device *vdev) +{ + struct virtio_input *vi = vdev->priv; + int err; + + err = virtinput_init_vqs(vi); + if (err) + return err; + + virtio_device_ready(vdev); + vi->ready = true; + virtinput_fill_evt(vi); + return 0; +} +#endif + +static unsigned int features[] = { + /* none */ +}; +static struct virtio_device_id id_table[] = { + { VIRTIO_ID_INPUT, VIRTIO_DEV_ANY_ID }, + { 0 }, +}; + +static struct virtio_driver virtio_input_driver = { + .driver.name = KBUILD_MODNAME, + .driver.owner = THIS_MODULE, + .feature_table = features, + .feature_table_size = ARRAY_SIZE(features), + .id_table = id_table, + .probe = virtinput_probe, + .remove = virtinput_remove, +#ifdef CONFIG_PM_SLEEP + .freeze = virtinput_freeze, + .restore = virtinput_restore, +#endif +}; + +module_virtio_driver(virtio_input_driver); +MODULE_DEVICE_TABLE(virtio, id_table); + +MODULE_LICENSE("GPL"); +MODULE_DESCRIPTION("Virtio input device driver"); +MODULE_AUTHOR("Gerd Hoffmann "); diff --git a/include/uapi/linux/Kbuild b/include/uapi/linux/Kbuild index 68ceb97c458c..04b829e9ac46 100644 --- a/include/uapi/linux/Kbuild +++ b/include/uapi/linux/Kbuild @@ -430,6 +430,7 @@ header-y += virtio_blk.h header-y += virtio_config.h header-y += virtio_console.h header-y += virtio_ids.h +header-y += virtio_input.h header-y += virtio_net.h header-y += virtio_pci.h header-y += virtio_ring.h diff --git a/include/uapi/linux/virtio_ids.h b/include/uapi/linux/virtio_ids.h index 284fc3a05f7b..5f60aa4be50a 100644 --- a/include/uapi/linux/virtio_ids.h +++ b/include/uapi/linux/virtio_ids.h @@ -39,5 +39,6 @@ #define VIRTIO_ID_9P 9 /* 9p virtio console */ #define VIRTIO_ID_RPROC_SERIAL 11 /* virtio remoteproc serial link */ #define VIRTIO_ID_CAIF 12 /* Virtio caif */ +#define VIRTIO_ID_INPUT 18 /* virtio input */ #endif /* _LINUX_VIRTIO_IDS_H */ diff --git a/include/uapi/linux/virtio_input.h b/include/uapi/linux/virtio_input.h new file mode 100644 index 000000000000..a7fe5c8fb135 --- /dev/null +++ b/include/uapi/linux/virtio_input.h @@ -0,0 +1,76 @@ +#ifndef _LINUX_VIRTIO_INPUT_H +#define _LINUX_VIRTIO_INPUT_H +/* This header is BSD licensed so anyone can use the definitions to implement + * compatible drivers/servers. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of IBM nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL IBM OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. */ + +#include + +enum virtio_input_config_select { + VIRTIO_INPUT_CFG_UNSET = 0x00, + VIRTIO_INPUT_CFG_ID_NAME = 0x01, + VIRTIO_INPUT_CFG_ID_SERIAL = 0x02, + VIRTIO_INPUT_CFG_ID_DEVIDS = 0x03, + VIRTIO_INPUT_CFG_PROP_BITS = 0x10, + VIRTIO_INPUT_CFG_EV_BITS = 0x11, + VIRTIO_INPUT_CFG_ABS_INFO = 0x12, +}; + +struct virtio_input_absinfo { + __u32 min; + __u32 max; + __u32 fuzz; + __u32 flat; + __u32 res; +}; + +struct virtio_input_devids { + __u16 bustype; + __u16 vendor; + __u16 product; + __u16 version; +}; + +struct virtio_input_config { + __u8 select; + __u8 subsel; + __u8 size; + __u8 reserved[5]; + union { + char string[128]; + __u8 bitmap[128]; + struct virtio_input_absinfo abs; + struct virtio_input_devids ids; + } u; +}; + +struct virtio_input_event { + __le16 type; + __le16 code; + __le32 value; +}; + +#endif /* _LINUX_VIRTIO_INPUT_H */ -- cgit v1.2.3 From 3a82002c7cbb166b891de515b5463aec41035c75 Mon Sep 17 00:00:00 2001 From: Nicolas Ferre Date: Tue, 31 Mar 2015 15:34:51 +0200 Subject: MAINTAINERS: change the Atmel audio alsa driver entry I take over the the maintainship of Atmel alsa drivers from Voice. Thanks for your work! Signed-off-by: Nicolas Ferre Acked-by: Bo Shen Signed-off-by: Mark Brown --- MAINTAINERS | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'MAINTAINERS') diff --git a/MAINTAINERS b/MAINTAINERS index ddc5a8cf9a8a..679b2d0cb2d1 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1751,7 +1751,7 @@ S: Supported F: drivers/tty/serial/atmel_serial.c ATMEL Audio ALSA driver -M: Bo Shen +M: Nicolas Ferre L: alsa-devel@alsa-project.org (moderated for non-subscribers) S: Supported F: sound/soc/atmel -- cgit v1.2.3 From aa571b148c6ab9843e79622f0209b6163d8d4fc5 Mon Sep 17 00:00:00 2001 From: Paul Walmsley Date: Wed, 25 Mar 2015 18:32:59 +0000 Subject: MAINTAINERS: clk: discuss on the linux-clk@vger.kernel.org list Most Linux clock framework discussions take place on the linux-kernel@vger.kernel.org or linux-arm-kernel@lists.infradead.org mailing lists. The volume of unrelated messages on these lists makes it difficult for non-maintainers to follow along with discussions. Switch the discussion list for clock framework discussions to linux-clk@vger.kernel.org. Also, add linux-clk@vger.kernel.org as a mailing list for clock API discussions. Signed-off-by: Paul Walmsley Cc: Thomas Gleixner Cc: Sylwester Nawrocki Cc: Tomasz Figa Cc: Viresh Kumar Cc: Peter De Schrijver Cc: Prashant Gaikwad Cc: Tero Kristo Cc: Russell King Acked-by: Stephen Boyd Signed-off-by: Michael Turquette --- MAINTAINERS | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'MAINTAINERS') diff --git a/MAINTAINERS b/MAINTAINERS index ddc5a8cf9a8a..34f8bc4f1be4 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -2552,6 +2552,7 @@ F: include/linux/cleancache.h CLK API M: Russell King +L: linux-clk@vger.kernel.org S: Maintained F: include/linux/clk.h @@ -2612,7 +2613,7 @@ F: drivers/media/platform/coda/ COMMON CLK FRAMEWORK M: Mike Turquette M: Stephen Boyd -L: linux-kernel@vger.kernel.org +L: linux-clk@vger.kernel.org T: git git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux.git S: Maintained F: drivers/clk/ -- cgit v1.2.3 From 8adc53fdc9721ef6f71fbaad07c486abdc4c8f60 Mon Sep 17 00:00:00 2001 From: Zubair Lutfullah Kakakhel Date: Wed, 18 Mar 2015 16:16:37 +0000 Subject: MAINTAINERS: Add Ingenic JZ4780 DMA driver maintainer entry Signed-off-by: Zubair Lutfullah Kakakhel Signed-off-by: Vinod Koul --- MAINTAINERS | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'MAINTAINERS') diff --git a/MAINTAINERS b/MAINTAINERS index ddc5a8cf9a8a..be98874c8e07 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -4962,6 +4962,11 @@ W: http://industrypack.sourceforge.net S: Maintained F: drivers/ipack/ +INGENIC JZ4780 DMA Driver +M: Zubair Lutfullah Kakakhel +S: Maintained +F: drivers/dma/dma-jz4780.c + INTEGRITY MEASUREMENT ARCHITECTURE (IMA) M: Mimi Zohar M: Dmitry Kasatkin -- cgit v1.2.3 From 9e853f2313e5eb163cb1ea461b23c2332cf6438a Mon Sep 17 00:00:00 2001 From: Ross Zwisler Date: Wed, 1 Apr 2015 09:12:19 +0200 Subject: drivers/block/pmem: Add a driver for persistent memory PMEM is a new driver that presents a reserved range of memory as a block device. This is useful for developing with NV-DIMMs, and can be used with volatile memory as a development platform. This patch contains the initial driver from Ross Zwisler, with various changes: converted it to use a platform_device for discovery, fixed partition support and merged various patches from Boaz Harrosh. Tested-by: Ross Zwisler Signed-off-by: Ross Zwisler Signed-off-by: Christoph Hellwig Acked-by: Dan Williams Cc: Andrew Morton Cc: Andy Lutomirski Cc: Boaz Harrosh Cc: Borislav Petkov Cc: H. Peter Anvin Cc: Jens Axboe Cc: Jens Axboe Cc: Keith Busch Cc: Linus Torvalds Cc: Matthew Wilcox Cc: Thomas Gleixner Cc: linux-nvdimm@ml01.01.org Link: http://lkml.kernel.org/r/1427872339-6688-3-git-send-email-hch@lst.de [ Minor cleanups. ] Signed-off-by: Ingo Molnar --- MAINTAINERS | 6 ++ drivers/block/Kconfig | 11 +++ drivers/block/Makefile | 1 + drivers/block/pmem.c | 263 +++++++++++++++++++++++++++++++++++++++++++++++++ 4 files changed, 281 insertions(+) create mode 100644 drivers/block/pmem.c (limited to 'MAINTAINERS') diff --git a/MAINTAINERS b/MAINTAINERS index 1de6afa8ee51..4517613dc638 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -8071,6 +8071,12 @@ S: Maintained F: Documentation/blockdev/ramdisk.txt F: drivers/block/brd.c +PERSISTENT MEMORY DRIVER +M: Ross Zwisler +L: linux-nvdimm@lists.01.org +S: Supported +F: drivers/block/pmem.c + RANDOM NUMBER DRIVER M: "Theodore Ts'o" S: Maintained diff --git a/drivers/block/Kconfig b/drivers/block/Kconfig index 1b8094d4d7af..eb1fed5bd516 100644 --- a/drivers/block/Kconfig +++ b/drivers/block/Kconfig @@ -404,6 +404,17 @@ config BLK_DEV_RAM_DAX and will prevent RAM block device backing store memory from being allocated from highmem (only a problem for highmem systems). +config BLK_DEV_PMEM + tristate "Persistent memory block device support" + help + Saying Y here will allow you to use a contiguous range of reserved + memory as one or more persistent block devices. + + To compile this driver as a module, choose M here: the module will be + called 'pmem'. + + If unsure, say N. + config CDROM_PKTCDVD tristate "Packet writing on CD/DVD media" depends on !UML diff --git a/drivers/block/Makefile b/drivers/block/Makefile index 02b688d1438d..9cc6c18a1c7e 100644 --- a/drivers/block/Makefile +++ b/drivers/block/Makefile @@ -14,6 +14,7 @@ obj-$(CONFIG_PS3_VRAM) += ps3vram.o obj-$(CONFIG_ATARI_FLOPPY) += ataflop.o obj-$(CONFIG_AMIGA_Z2RAM) += z2ram.o obj-$(CONFIG_BLK_DEV_RAM) += brd.o +obj-$(CONFIG_BLK_DEV_PMEM) += pmem.o obj-$(CONFIG_BLK_DEV_LOOP) += loop.o obj-$(CONFIG_BLK_CPQ_DA) += cpqarray.o obj-$(CONFIG_BLK_CPQ_CISS_DA) += cciss.o diff --git a/drivers/block/pmem.c b/drivers/block/pmem.c new file mode 100644 index 000000000000..988f3846dc3e --- /dev/null +++ b/drivers/block/pmem.c @@ -0,0 +1,263 @@ +/* + * Persistent Memory Driver + * + * Copyright (c) 2014, Intel Corporation. + * Copyright (c) 2015, Christoph Hellwig . + * Copyright (c) 2015, Boaz Harrosh . + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#define PMEM_MINORS 16 + +struct pmem_device { + struct request_queue *pmem_queue; + struct gendisk *pmem_disk; + + /* One contiguous memory region per device */ + phys_addr_t phys_addr; + void *virt_addr; + size_t size; +}; + +static int pmem_major; +static atomic_t pmem_index; + +static void pmem_do_bvec(struct pmem_device *pmem, struct page *page, + unsigned int len, unsigned int off, int rw, + sector_t sector) +{ + void *mem = kmap_atomic(page); + size_t pmem_off = sector << 9; + + if (rw == READ) { + memcpy(mem + off, pmem->virt_addr + pmem_off, len); + flush_dcache_page(page); + } else { + flush_dcache_page(page); + memcpy(pmem->virt_addr + pmem_off, mem + off, len); + } + + kunmap_atomic(mem); +} + +static void pmem_make_request(struct request_queue *q, struct bio *bio) +{ + struct block_device *bdev = bio->bi_bdev; + struct pmem_device *pmem = bdev->bd_disk->private_data; + int rw; + struct bio_vec bvec; + sector_t sector; + struct bvec_iter iter; + int err = 0; + + if (bio_end_sector(bio) > get_capacity(bdev->bd_disk)) { + err = -EIO; + goto out; + } + + BUG_ON(bio->bi_rw & REQ_DISCARD); + + rw = bio_data_dir(bio); + sector = bio->bi_iter.bi_sector; + bio_for_each_segment(bvec, bio, iter) { + pmem_do_bvec(pmem, bvec.bv_page, bvec.bv_len, bvec.bv_offset, + rw, sector); + sector += bvec.bv_len >> 9; + } + +out: + bio_endio(bio, err); +} + +static int pmem_rw_page(struct block_device *bdev, sector_t sector, + struct page *page, int rw) +{ + struct pmem_device *pmem = bdev->bd_disk->private_data; + + pmem_do_bvec(pmem, page, PAGE_CACHE_SIZE, 0, rw, sector); + page_endio(page, rw & WRITE, 0); + + return 0; +} + +static long pmem_direct_access(struct block_device *bdev, sector_t sector, + void **kaddr, unsigned long *pfn, long size) +{ + struct pmem_device *pmem = bdev->bd_disk->private_data; + size_t offset = sector << 9; + + if (!pmem) + return -ENODEV; + + *kaddr = pmem->virt_addr + offset; + *pfn = (pmem->phys_addr + offset) >> PAGE_SHIFT; + + return pmem->size - offset; +} + +static const struct block_device_operations pmem_fops = { + .owner = THIS_MODULE, + .rw_page = pmem_rw_page, + .direct_access = pmem_direct_access, +}; + +static struct pmem_device *pmem_alloc(struct device *dev, struct resource *res) +{ + struct pmem_device *pmem; + struct gendisk *disk; + int idx, err; + + err = -ENOMEM; + pmem = kzalloc(sizeof(*pmem), GFP_KERNEL); + if (!pmem) + goto out; + + pmem->phys_addr = res->start; + pmem->size = resource_size(res); + + err = -EINVAL; + if (!request_mem_region(pmem->phys_addr, pmem->size, "pmem")) { + dev_warn(dev, "could not reserve region [0x%llx:0x%zx]\n", + pmem->phys_addr, pmem->size); + goto out_free_dev; + } + + /* + * Map the memory as non-cachable, as we can't write back the contents + * of the CPU caches in case of a crash. + */ + err = -ENOMEM; + pmem->virt_addr = ioremap_nocache(pmem->phys_addr, pmem->size); + if (!pmem->virt_addr) + goto out_release_region; + + pmem->pmem_queue = blk_alloc_queue(GFP_KERNEL); + if (!pmem->pmem_queue) + goto out_unmap; + + blk_queue_make_request(pmem->pmem_queue, pmem_make_request); + blk_queue_max_hw_sectors(pmem->pmem_queue, 1024); + blk_queue_bounce_limit(pmem->pmem_queue, BLK_BOUNCE_ANY); + + disk = alloc_disk(PMEM_MINORS); + if (!disk) + goto out_free_queue; + + idx = atomic_inc_return(&pmem_index) - 1; + + disk->major = pmem_major; + disk->first_minor = PMEM_MINORS * idx; + disk->fops = &pmem_fops; + disk->private_data = pmem; + disk->queue = pmem->pmem_queue; + disk->flags = GENHD_FL_EXT_DEVT; + sprintf(disk->disk_name, "pmem%d", idx); + disk->driverfs_dev = dev; + set_capacity(disk, pmem->size >> 9); + pmem->pmem_disk = disk; + + add_disk(disk); + + return pmem; + +out_free_queue: + blk_cleanup_queue(pmem->pmem_queue); +out_unmap: + iounmap(pmem->virt_addr); +out_release_region: + release_mem_region(pmem->phys_addr, pmem->size); +out_free_dev: + kfree(pmem); +out: + return ERR_PTR(err); +} + +static void pmem_free(struct pmem_device *pmem) +{ + del_gendisk(pmem->pmem_disk); + put_disk(pmem->pmem_disk); + blk_cleanup_queue(pmem->pmem_queue); + iounmap(pmem->virt_addr); + release_mem_region(pmem->phys_addr, pmem->size); + kfree(pmem); +} + +static int pmem_probe(struct platform_device *pdev) +{ + struct pmem_device *pmem; + struct resource *res; + + if (WARN_ON(pdev->num_resources > 1)) + return -ENXIO; + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!res) + return -ENXIO; + + pmem = pmem_alloc(&pdev->dev, res); + if (IS_ERR(pmem)) + return PTR_ERR(pmem); + + platform_set_drvdata(pdev, pmem); + + return 0; +} + +static int pmem_remove(struct platform_device *pdev) +{ + struct pmem_device *pmem = platform_get_drvdata(pdev); + + pmem_free(pmem); + return 0; +} + +static struct platform_driver pmem_driver = { + .probe = pmem_probe, + .remove = pmem_remove, + .driver = { + .owner = THIS_MODULE, + .name = "pmem", + }, +}; + +static int __init pmem_init(void) +{ + int error; + + pmem_major = register_blkdev(0, "pmem"); + if (pmem_major < 0) + return pmem_major; + + error = platform_driver_register(&pmem_driver); + if (error) + unregister_blkdev(pmem_major, "pmem"); + return error; +} +module_init(pmem_init); + +static void pmem_exit(void) +{ + platform_driver_unregister(&pmem_driver); + unregister_blkdev(pmem_major, "pmem"); +} +module_exit(pmem_exit); + +MODULE_AUTHOR("Ross Zwisler "); +MODULE_LICENSE("GPL v2"); -- cgit v1.2.3 From db60304718583f99162adabb7dd96e2f7073f8f3 Mon Sep 17 00:00:00 2001 From: Or Gerlitz Date: Thu, 2 Apr 2015 16:31:23 +0300 Subject: MAINTAINERS: Update mlx4_en entry Add Ido Shamay as co-maintainer for the mlx4 Ethernet driver. Signed-off-by: Amir Vadai Signed-off-by: Or Gerlitz Signed-off-by: David S. Miller --- MAINTAINERS | 1 + 1 file changed, 1 insertion(+) (limited to 'MAINTAINERS') diff --git a/MAINTAINERS b/MAINTAINERS index 0f0e582e98f7..7f2eb47f5246 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -6323,6 +6323,7 @@ F: drivers/scsi/megaraid/ MELLANOX ETHERNET DRIVER (mlx4_en) M: Amir Vadai +M: Ido Shamay L: netdev@vger.kernel.org S: Supported W: http://www.mellanox.com -- cgit v1.2.3 From 3259aa57dba142c04da3f37e207f9cbcf30a76df Mon Sep 17 00:00:00 2001 From: Ezequiel Garcia Date: Tue, 10 Mar 2015 11:43:20 -0300 Subject: [media] MAINTAINERS: Update the maintainer mail address for stk1160 I'd rather use my work mail address to get patches, so let's update it. Signed-off-by: Ezequiel Garcia Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- MAINTAINERS | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'MAINTAINERS') diff --git a/MAINTAINERS b/MAINTAINERS index ddc5a8cf9a8a..b5965084b788 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -4420,7 +4420,7 @@ S: Maintained F: block/partitions/efi.* STK1160 USB VIDEO CAPTURE DRIVER -M: Ezequiel Garcia +M: Ezequiel Garcia L: linux-media@vger.kernel.org T: git git://linuxtv.org/media_tree.git S: Maintained -- cgit v1.2.3 From f2272e1347c452fb6cc4cb6eeea8b7266cc87ae5 Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Wed, 1 Jan 2014 14:40:35 -0300 Subject: [media] v4l: mt9v032: Add OF support Parse DT properties into a platform data structure when a DT node is available. Signed-off-by: Laurent Pinchart Acked-by: Sakari Ailus Signed-off-by: Mauro Carvalho Chehab --- .../devicetree/bindings/media/i2c/mt9v032.txt | 39 ++++++++++++ MAINTAINERS | 1 + drivers/media/i2c/mt9v032.c | 69 +++++++++++++++++++++- 3 files changed, 108 insertions(+), 1 deletion(-) create mode 100644 Documentation/devicetree/bindings/media/i2c/mt9v032.txt (limited to 'MAINTAINERS') diff --git a/Documentation/devicetree/bindings/media/i2c/mt9v032.txt b/Documentation/devicetree/bindings/media/i2c/mt9v032.txt new file mode 100644 index 000000000000..202565313e82 --- /dev/null +++ b/Documentation/devicetree/bindings/media/i2c/mt9v032.txt @@ -0,0 +1,39 @@ +* Aptina 1/3-Inch WVGA CMOS Digital Image Sensor + +The Aptina MT9V032 is a 1/3-inch CMOS active pixel digital image sensor with +an active array size of 752H x 480V. It is programmable through a simple +two-wire serial interface. + +Required Properties: + +- compatible: value should be either one among the following + (a) "aptina,mt9v022" for MT9V022 color sensor + (b) "aptina,mt9v022m" for MT9V022 monochrome sensor + (c) "aptina,mt9v024" for MT9V024 color sensor + (d) "aptina,mt9v024m" for MT9V024 monochrome sensor + (e) "aptina,mt9v032" for MT9V032 color sensor + (f) "aptina,mt9v032m" for MT9V032 monochrome sensor + (g) "aptina,mt9v034" for MT9V034 color sensor + (h) "aptina,mt9v034m" for MT9V034 monochrome sensor + +Optional Properties: + +- link-frequencies: List of allowed link frequencies in Hz. Each frequency is + expressed as a 64-bit big-endian integer. + +For further reading on port node refer to +Documentation/devicetree/bindings/media/video-interfaces.txt. + +Example: + + mt9v032@5c { + compatible = "aptina,mt9v032"; + reg = <0x5c>; + + port { + mt9v032_out: endpoint { + link-frequencies = /bits/ 64 + <13000000 26600000 27000000>; + }; + }; + }; diff --git a/MAINTAINERS b/MAINTAINERS index b5965084b788..97c174b544a4 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -6535,6 +6535,7 @@ M: Laurent Pinchart L: linux-media@vger.kernel.org T: git git://linuxtv.org/media_tree.git S: Maintained +F: Documentation/devicetree/bindings/media/i2c/mt9v032.txt F: drivers/media/i2c/mt9v032.c F: include/media/mt9v032.h diff --git a/drivers/media/i2c/mt9v032.c b/drivers/media/i2c/mt9v032.c index 6d64e23b1f94..977f4006edbd 100644 --- a/drivers/media/i2c/mt9v032.c +++ b/drivers/media/i2c/mt9v032.c @@ -17,6 +17,8 @@ #include #include #include +#include +#include #include #include #include @@ -26,6 +28,7 @@ #include #include #include +#include #include /* The first four rows are black rows. The active area spans 753x481 pixels. */ @@ -876,10 +879,58 @@ static const struct regmap_config mt9v032_regmap_config = { * Driver initialization and probing */ +static struct mt9v032_platform_data * +mt9v032_get_pdata(struct i2c_client *client) +{ + struct mt9v032_platform_data *pdata; + struct v4l2_of_endpoint endpoint; + struct device_node *np; + struct property *prop; + + if (!IS_ENABLED(CONFIG_OF) || !client->dev.of_node) + return client->dev.platform_data; + + np = of_graph_get_next_endpoint(client->dev.of_node, NULL); + if (!np) + return NULL; + + if (v4l2_of_parse_endpoint(np, &endpoint) < 0) + goto done; + + pdata = devm_kzalloc(&client->dev, sizeof(*pdata), GFP_KERNEL); + if (!pdata) + goto done; + + prop = of_find_property(np, "link-frequencies", NULL); + if (prop) { + u64 *link_freqs; + size_t size = prop->length / sizeof(*link_freqs); + + link_freqs = devm_kcalloc(&client->dev, size, + sizeof(*link_freqs), GFP_KERNEL); + if (!link_freqs) + goto done; + + if (of_property_read_u64_array(np, "link-frequencies", + link_freqs, size) < 0) + goto done; + + pdata->link_freqs = link_freqs; + pdata->link_def_freq = link_freqs[0]; + } + + pdata->clk_pol = !!(endpoint.bus.parallel.flags & + V4L2_MBUS_PCLK_SAMPLE_RISING); + +done: + of_node_put(np); + return pdata; +} + static int mt9v032_probe(struct i2c_client *client, const struct i2c_device_id *did) { - struct mt9v032_platform_data *pdata = client->dev.platform_data; + struct mt9v032_platform_data *pdata = mt9v032_get_pdata(client); struct mt9v032 *mt9v032; unsigned int i; int ret; @@ -1037,9 +1088,25 @@ static const struct i2c_device_id mt9v032_id[] = { }; MODULE_DEVICE_TABLE(i2c, mt9v032_id); +#if IS_ENABLED(CONFIG_OF) +static const struct of_device_id mt9v032_of_match[] = { + { .compatible = "aptina,mt9v022" }, + { .compatible = "aptina,mt9v022m" }, + { .compatible = "aptina,mt9v024" }, + { .compatible = "aptina,mt9v024m" }, + { .compatible = "aptina,mt9v032" }, + { .compatible = "aptina,mt9v032m" }, + { .compatible = "aptina,mt9v034" }, + { .compatible = "aptina,mt9v034m" }, + { /* Sentinel */ } +}; +MODULE_DEVICE_TABLE(of, mt9v032_of_match); +#endif + static struct i2c_driver mt9v032_driver = { .driver = { .name = "mt9v032", + .of_match_table = of_match_ptr(mt9v032_of_match), }, .probe = mt9v032_probe, .remove = mt9v032_remove, -- cgit v1.2.3 From c4c0283ab3cd78f8c53e708f8e75e8ed80468a31 Mon Sep 17 00:00:00 2001 From: Benoit Parrot Date: Fri, 20 Mar 2015 18:03:52 -0300 Subject: [media] media: i2c: add support for omnivision's ov2659 sensor this patch adds support for omnivision's ov2659 sensor, the driver supports following features: 1: Asynchronous probing 2: DT support 3: Media controller support Signed-off-by: Benoit Parrot Signed-off-by: Lad, Prabhakar Acked-by: Sakari Ailus Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- .../devicetree/bindings/media/i2c/ov2659.txt | 38 + MAINTAINERS | 10 + drivers/media/i2c/Kconfig | 11 + drivers/media/i2c/Makefile | 1 + drivers/media/i2c/ov2659.c | 1509 ++++++++++++++++++++ include/media/ov2659.h | 34 + 6 files changed, 1603 insertions(+) create mode 100644 Documentation/devicetree/bindings/media/i2c/ov2659.txt create mode 100644 drivers/media/i2c/ov2659.c create mode 100644 include/media/ov2659.h (limited to 'MAINTAINERS') diff --git a/Documentation/devicetree/bindings/media/i2c/ov2659.txt b/Documentation/devicetree/bindings/media/i2c/ov2659.txt new file mode 100644 index 000000000000..cabc7d827dfb --- /dev/null +++ b/Documentation/devicetree/bindings/media/i2c/ov2659.txt @@ -0,0 +1,38 @@ +* OV2659 1/5-Inch 2Mp SOC Camera + +The Omnivision OV2659 is a 1/5-inch SOC camera, with an active array size of +1632H x 1212V. It is programmable through a SCCB. The OV2659 sensor supports +multiple resolutions output, such as UXGA, SVGA, 720p. It also can support +YUV422, RGB565/555 or raw RGB output formats. + +Required Properties: +- compatible: Must be "ovti,ov2659" +- reg: I2C slave address +- clocks: reference to the xvclk input clock. +- clock-names: should be "xvclk". +- link-frequencies: target pixel clock frequency. + +For further reading on port node refer to +Documentation/devicetree/bindings/media/video-interfaces.txt. + +Example: + + i2c0@1c22000 { + ... + ... + ov2659@30 { + compatible = "ovti,ov2659"; + reg = <0x30>; + + clocks = <&clk_ov2659 0>; + clock-names = "xvclk"; + + port { + ov2659_0: endpoint { + remote-endpoint = <&vpfe_ep>; + link-frequencies = /bits/ 64 <70000000>; + }; + }; + }; + ... + }; diff --git a/MAINTAINERS b/MAINTAINERS index 97c174b544a4..460194ca7927 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -8911,6 +8911,16 @@ T: git git://linuxtv.org/mhadli/v4l-dvb-davinci_devices.git S: Maintained F: drivers/media/platform/am437x/ +OV2659 OMNIVISION SENSOR DRIVER +M: Lad, Prabhakar +L: linux-media@vger.kernel.org +W: http://linuxtv.org/ +Q: http://patchwork.linuxtv.org/project/linux-media/list/ +T: git git://linuxtv.org/mhadli/v4l-dvb-davinci_devices.git +S: Maintained +F: drivers/media/i2c/ov2659.c +F: include/media/ov2659.h + SIS 190 ETHERNET DRIVER M: Francois Romieu L: netdev@vger.kernel.org diff --git a/drivers/media/i2c/Kconfig b/drivers/media/i2c/Kconfig index da58c9bb67c2..6f30ea76151a 100644 --- a/drivers/media/i2c/Kconfig +++ b/drivers/media/i2c/Kconfig @@ -466,6 +466,17 @@ config VIDEO_APTINA_PLL config VIDEO_SMIAPP_PLL tristate +config VIDEO_OV2659 + tristate "OmniVision OV2659 sensor support" + depends on VIDEO_V4L2 && I2C + depends on MEDIA_CAMERA_SUPPORT + ---help--- + This is a Video4Linux2 sensor-level driver for the OmniVision + OV2659 camera. + + To compile this driver as a module, choose M here: the + module will be called ov2659. + config VIDEO_OV7640 tristate "OmniVision OV7640 sensor support" depends on I2C && VIDEO_V4L2 diff --git a/drivers/media/i2c/Makefile b/drivers/media/i2c/Makefile index 9858900168bf..f165faea5b3f 100644 --- a/drivers/media/i2c/Makefile +++ b/drivers/media/i2c/Makefile @@ -77,3 +77,4 @@ obj-$(CONFIG_VIDEO_SMIAPP_PLL) += smiapp-pll.o obj-$(CONFIG_VIDEO_AK881X) += ak881x.o obj-$(CONFIG_VIDEO_IR_I2C) += ir-kbd-i2c.o obj-$(CONFIG_VIDEO_ML86V7667) += ml86v7667.o +obj-$(CONFIG_VIDEO_OV2659) += ov2659.o diff --git a/drivers/media/i2c/ov2659.c b/drivers/media/i2c/ov2659.c new file mode 100644 index 000000000000..edebd114279d --- /dev/null +++ b/drivers/media/i2c/ov2659.c @@ -0,0 +1,1509 @@ +/* + * Omnivision OV2659 CMOS Image Sensor driver + * + * Copyright (C) 2015 Texas Instruments, Inc. + * + * Benoit Parrot + * Lad, Prabhakar + * + * This program is free software; you may redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS + * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN + * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define DRIVER_NAME "ov2659" + +/* + * OV2659 register definitions + */ +#define REG_SOFTWARE_STANDBY 0x0100 +#define REG_SOFTWARE_RESET 0x0103 +#define REG_IO_CTRL00 0x3000 +#define REG_IO_CTRL01 0x3001 +#define REG_IO_CTRL02 0x3002 +#define REG_OUTPUT_VALUE00 0x3008 +#define REG_OUTPUT_VALUE01 0x3009 +#define REG_OUTPUT_VALUE02 0x300d +#define REG_OUTPUT_SELECT00 0x300e +#define REG_OUTPUT_SELECT01 0x300f +#define REG_OUTPUT_SELECT02 0x3010 +#define REG_OUTPUT_DRIVE 0x3011 +#define REG_INPUT_READOUT00 0x302d +#define REG_INPUT_READOUT01 0x302e +#define REG_INPUT_READOUT02 0x302f + +#define REG_SC_PLL_CTRL0 0x3003 +#define REG_SC_PLL_CTRL1 0x3004 +#define REG_SC_PLL_CTRL2 0x3005 +#define REG_SC_PLL_CTRL3 0x3006 +#define REG_SC_CHIP_ID_H 0x300a +#define REG_SC_CHIP_ID_L 0x300b +#define REG_SC_PWC 0x3014 +#define REG_SC_CLKRST0 0x301a +#define REG_SC_CLKRST1 0x301b +#define REG_SC_CLKRST2 0x301c +#define REG_SC_CLKRST3 0x301d +#define REG_SC_SUB_ID 0x302a +#define REG_SC_SCCB_ID 0x302b + +#define REG_GROUP_ADDRESS_00 0x3200 +#define REG_GROUP_ADDRESS_01 0x3201 +#define REG_GROUP_ADDRESS_02 0x3202 +#define REG_GROUP_ADDRESS_03 0x3203 +#define REG_GROUP_ACCESS 0x3208 + +#define REG_AWB_R_GAIN_H 0x3400 +#define REG_AWB_R_GAIN_L 0x3401 +#define REG_AWB_G_GAIN_H 0x3402 +#define REG_AWB_G_GAIN_L 0x3403 +#define REG_AWB_B_GAIN_H 0x3404 +#define REG_AWB_B_GAIN_L 0x3405 +#define REG_AWB_MANUAL_CONTROL 0x3406 + +#define REG_TIMING_HS_H 0x3800 +#define REG_TIMING_HS_L 0x3801 +#define REG_TIMING_VS_H 0x3802 +#define REG_TIMING_VS_L 0x3803 +#define REG_TIMING_HW_H 0x3804 +#define REG_TIMING_HW_L 0x3805 +#define REG_TIMING_VH_H 0x3806 +#define REG_TIMING_VH_L 0x3807 +#define REG_TIMING_DVPHO_H 0x3808 +#define REG_TIMING_DVPHO_L 0x3809 +#define REG_TIMING_DVPVO_H 0x380a +#define REG_TIMING_DVPVO_L 0x380b +#define REG_TIMING_HTS_H 0x380c +#define REG_TIMING_HTS_L 0x380d +#define REG_TIMING_VTS_H 0x380e +#define REG_TIMING_VTS_L 0x380f +#define REG_TIMING_HOFFS_H 0x3810 +#define REG_TIMING_HOFFS_L 0x3811 +#define REG_TIMING_VOFFS_H 0x3812 +#define REG_TIMING_VOFFS_L 0x3813 +#define REG_TIMING_XINC 0x3814 +#define REG_TIMING_YINC 0x3815 +#define REG_TIMING_VERT_FORMAT 0x3820 +#define REG_TIMING_HORIZ_FORMAT 0x3821 + +#define REG_FORMAT_CTRL00 0x4300 + +#define REG_VFIFO_READ_START_H 0x4608 +#define REG_VFIFO_READ_START_L 0x4609 + +#define REG_DVP_CTRL02 0x4708 + +#define REG_ISP_CTRL00 0x5000 +#define REG_ISP_CTRL01 0x5001 +#define REG_ISP_CTRL02 0x5002 + +#define REG_LENC_RED_X0_H 0x500c +#define REG_LENC_RED_X0_L 0x500d +#define REG_LENC_RED_Y0_H 0x500e +#define REG_LENC_RED_Y0_L 0x500f +#define REG_LENC_RED_A1 0x5010 +#define REG_LENC_RED_B1 0x5011 +#define REG_LENC_RED_A2_B2 0x5012 +#define REG_LENC_GREEN_X0_H 0x5013 +#define REG_LENC_GREEN_X0_L 0x5014 +#define REG_LENC_GREEN_Y0_H 0x5015 +#define REG_LENC_GREEN_Y0_L 0x5016 +#define REG_LENC_GREEN_A1 0x5017 +#define REG_LENC_GREEN_B1 0x5018 +#define REG_LENC_GREEN_A2_B2 0x5019 +#define REG_LENC_BLUE_X0_H 0x501a +#define REG_LENC_BLUE_X0_L 0x501b +#define REG_LENC_BLUE_Y0_H 0x501c +#define REG_LENC_BLUE_Y0_L 0x501d +#define REG_LENC_BLUE_A1 0x501e +#define REG_LENC_BLUE_B1 0x501f +#define REG_LENC_BLUE_A2_B2 0x5020 + +#define REG_AWB_CTRL00 0x5035 +#define REG_AWB_CTRL01 0x5036 +#define REG_AWB_CTRL02 0x5037 +#define REG_AWB_CTRL03 0x5038 +#define REG_AWB_CTRL04 0x5039 +#define REG_AWB_LOCAL_LIMIT 0x503a +#define REG_AWB_CTRL12 0x5049 +#define REG_AWB_CTRL13 0x504a +#define REG_AWB_CTRL14 0x504b + +#define REG_SHARPENMT_THRESH1 0x5064 +#define REG_SHARPENMT_THRESH2 0x5065 +#define REG_SHARPENMT_OFFSET1 0x5066 +#define REG_SHARPENMT_OFFSET2 0x5067 +#define REG_DENOISE_THRESH1 0x5068 +#define REG_DENOISE_THRESH2 0x5069 +#define REG_DENOISE_OFFSET1 0x506a +#define REG_DENOISE_OFFSET2 0x506b +#define REG_SHARPEN_THRESH1 0x506c +#define REG_SHARPEN_THRESH2 0x506d +#define REG_CIP_CTRL00 0x506e +#define REG_CIP_CTRL01 0x506f + +#define REG_CMX_SIGN 0x5079 +#define REG_CMX_MISC_CTRL 0x507a + +#define REG_PRE_ISP_CTRL00 0x50a0 +#define TEST_PATTERN_ENABLE BIT(7) +#define VERTICAL_COLOR_BAR_MASK 0x53 + +#define REG_NULL 0x0000 /* Array end token */ + +#define OV265X_ID(_msb, _lsb) ((_msb) << 8 | (_lsb)) +#define OV2659_ID 0x2656 + +struct sensor_register { + u16 addr; + u8 value; +}; + +struct ov2659_framesize { + u16 width; + u16 height; + u16 max_exp_lines; + const struct sensor_register *regs; +}; + +struct ov2659_pll_ctrl { + u8 ctrl1; + u8 ctrl2; + u8 ctrl3; +}; + +struct ov2659_pixfmt { + u32 code; + /* Output format Register Value (REG_FORMAT_CTRL00) */ + struct sensor_register *format_ctrl_regs; +}; + +struct pll_ctrl_reg { + unsigned int div; + unsigned char reg; +}; + +struct ov2659 { + struct v4l2_subdev sd; + struct media_pad pad; + struct v4l2_mbus_framefmt format; + unsigned int xvclk_frequency; + const struct ov2659_platform_data *pdata; + struct mutex lock; + struct i2c_client *client; + struct v4l2_ctrl_handler ctrls; + struct v4l2_ctrl *link_frequency; + const struct ov2659_framesize *frame_size; + struct sensor_register *format_ctrl_regs; + struct ov2659_pll_ctrl pll; + int streaming; +}; + +static const struct sensor_register ov2659_init_regs[] = { + { REG_IO_CTRL00, 0x03 }, + { REG_IO_CTRL01, 0xff }, + { REG_IO_CTRL02, 0xe0 }, + { 0x3633, 0x3d }, + { 0x3620, 0x02 }, + { 0x3631, 0x11 }, + { 0x3612, 0x04 }, + { 0x3630, 0x20 }, + { 0x4702, 0x02 }, + { 0x370c, 0x34 }, + { REG_TIMING_HS_H, 0x00 }, + { REG_TIMING_HS_L, 0x00 }, + { REG_TIMING_VS_H, 0x00 }, + { REG_TIMING_VS_L, 0x00 }, + { REG_TIMING_HW_H, 0x06 }, + { REG_TIMING_HW_L, 0x5f }, + { REG_TIMING_VH_H, 0x04 }, + { REG_TIMING_VH_L, 0xb7 }, + { REG_TIMING_DVPHO_H, 0x03 }, + { REG_TIMING_DVPHO_L, 0x20 }, + { REG_TIMING_DVPVO_H, 0x02 }, + { REG_TIMING_DVPVO_L, 0x58 }, + { REG_TIMING_HTS_H, 0x05 }, + { REG_TIMING_HTS_L, 0x14 }, + { REG_TIMING_VTS_H, 0x02 }, + { REG_TIMING_VTS_L, 0x68 }, + { REG_TIMING_HOFFS_L, 0x08 }, + { REG_TIMING_VOFFS_L, 0x02 }, + { REG_TIMING_XINC, 0x31 }, + { REG_TIMING_YINC, 0x31 }, + { 0x3a02, 0x02 }, + { 0x3a03, 0x68 }, + { 0x3a08, 0x00 }, + { 0x3a09, 0x5c }, + { 0x3a0a, 0x00 }, + { 0x3a0b, 0x4d }, + { 0x3a0d, 0x08 }, + { 0x3a0e, 0x06 }, + { 0x3a14, 0x02 }, + { 0x3a15, 0x28 }, + { REG_DVP_CTRL02, 0x01 }, + { 0x3623, 0x00 }, + { 0x3634, 0x76 }, + { 0x3701, 0x44 }, + { 0x3702, 0x18 }, + { 0x3703, 0x24 }, + { 0x3704, 0x24 }, + { 0x3705, 0x0c }, + { REG_TIMING_VERT_FORMAT, 0x81 }, + { REG_TIMING_HORIZ_FORMAT, 0x01 }, + { 0x370a, 0x52 }, + { REG_VFIFO_READ_START_H, 0x00 }, + { REG_VFIFO_READ_START_L, 0x80 }, + { REG_FORMAT_CTRL00, 0x30 }, + { 0x5086, 0x02 }, + { REG_ISP_CTRL00, 0xfb }, + { REG_ISP_CTRL01, 0x1f }, + { REG_ISP_CTRL02, 0x00 }, + { 0x5025, 0x0e }, + { 0x5026, 0x18 }, + { 0x5027, 0x34 }, + { 0x5028, 0x4c }, + { 0x5029, 0x62 }, + { 0x502a, 0x74 }, + { 0x502b, 0x85 }, + { 0x502c, 0x92 }, + { 0x502d, 0x9e }, + { 0x502e, 0xb2 }, + { 0x502f, 0xc0 }, + { 0x5030, 0xcc }, + { 0x5031, 0xe0 }, + { 0x5032, 0xee }, + { 0x5033, 0xf6 }, + { 0x5034, 0x11 }, + { 0x5070, 0x1c }, + { 0x5071, 0x5b }, + { 0x5072, 0x05 }, + { 0x5073, 0x20 }, + { 0x5074, 0x94 }, + { 0x5075, 0xb4 }, + { 0x5076, 0xb4 }, + { 0x5077, 0xaf }, + { 0x5078, 0x05 }, + { REG_CMX_SIGN, 0x98 }, + { REG_CMX_MISC_CTRL, 0x21 }, + { REG_AWB_CTRL00, 0x6a }, + { REG_AWB_CTRL01, 0x11 }, + { REG_AWB_CTRL02, 0x92 }, + { REG_AWB_CTRL03, 0x21 }, + { REG_AWB_CTRL04, 0xe1 }, + { REG_AWB_LOCAL_LIMIT, 0x01 }, + { 0x503c, 0x05 }, + { 0x503d, 0x08 }, + { 0x503e, 0x08 }, + { 0x503f, 0x64 }, + { 0x5040, 0x58 }, + { 0x5041, 0x2a }, + { 0x5042, 0xc5 }, + { 0x5043, 0x2e }, + { 0x5044, 0x3a }, + { 0x5045, 0x3c }, + { 0x5046, 0x44 }, + { 0x5047, 0xf8 }, + { 0x5048, 0x08 }, + { REG_AWB_CTRL12, 0x70 }, + { REG_AWB_CTRL13, 0xf0 }, + { REG_AWB_CTRL14, 0xf0 }, + { REG_LENC_RED_X0_H, 0x03 }, + { REG_LENC_RED_X0_L, 0x20 }, + { REG_LENC_RED_Y0_H, 0x02 }, + { REG_LENC_RED_Y0_L, 0x5c }, + { REG_LENC_RED_A1, 0x48 }, + { REG_LENC_RED_B1, 0x00 }, + { REG_LENC_RED_A2_B2, 0x66 }, + { REG_LENC_GREEN_X0_H, 0x03 }, + { REG_LENC_GREEN_X0_L, 0x30 }, + { REG_LENC_GREEN_Y0_H, 0x02 }, + { REG_LENC_GREEN_Y0_L, 0x7c }, + { REG_LENC_GREEN_A1, 0x40 }, + { REG_LENC_GREEN_B1, 0x00 }, + { REG_LENC_GREEN_A2_B2, 0x66 }, + { REG_LENC_BLUE_X0_H, 0x03 }, + { REG_LENC_BLUE_X0_L, 0x10 }, + { REG_LENC_BLUE_Y0_H, 0x02 }, + { REG_LENC_BLUE_Y0_L, 0x7c }, + { REG_LENC_BLUE_A1, 0x3a }, + { REG_LENC_BLUE_B1, 0x00 }, + { REG_LENC_BLUE_A2_B2, 0x66 }, + { REG_CIP_CTRL00, 0x44 }, + { REG_SHARPENMT_THRESH1, 0x08 }, + { REG_SHARPENMT_THRESH2, 0x10 }, + { REG_SHARPENMT_OFFSET1, 0x12 }, + { REG_SHARPENMT_OFFSET2, 0x02 }, + { REG_SHARPEN_THRESH1, 0x08 }, + { REG_SHARPEN_THRESH2, 0x10 }, + { REG_CIP_CTRL01, 0xa6 }, + { REG_DENOISE_THRESH1, 0x08 }, + { REG_DENOISE_THRESH2, 0x10 }, + { REG_DENOISE_OFFSET1, 0x04 }, + { REG_DENOISE_OFFSET2, 0x12 }, + { 0x507e, 0x40 }, + { 0x507f, 0x20 }, + { 0x507b, 0x02 }, + { REG_CMX_MISC_CTRL, 0x01 }, + { 0x5084, 0x0c }, + { 0x5085, 0x3e }, + { 0x5005, 0x80 }, + { 0x3a0f, 0x30 }, + { 0x3a10, 0x28 }, + { 0x3a1b, 0x32 }, + { 0x3a1e, 0x26 }, + { 0x3a11, 0x60 }, + { 0x3a1f, 0x14 }, + { 0x5060, 0x69 }, + { 0x5061, 0x7d }, + { 0x5062, 0x7d }, + { 0x5063, 0x69 }, + { REG_NULL, 0x00 }, +}; + +/* 1280X720 720p */ +static struct sensor_register ov2659_720p[] = { + { REG_TIMING_HS_H, 0x00 }, + { REG_TIMING_HS_L, 0xa0 }, + { REG_TIMING_VS_H, 0x00 }, + { REG_TIMING_VS_L, 0xf0 }, + { REG_TIMING_HW_H, 0x05 }, + { REG_TIMING_HW_L, 0xbf }, + { REG_TIMING_VH_H, 0x03 }, + { REG_TIMING_VH_L, 0xcb }, + { REG_TIMING_DVPHO_H, 0x05 }, + { REG_TIMING_DVPHO_L, 0x00 }, + { REG_TIMING_DVPVO_H, 0x02 }, + { REG_TIMING_DVPVO_L, 0xd0 }, + { REG_TIMING_HTS_H, 0x06 }, + { REG_TIMING_HTS_L, 0x4c }, + { REG_TIMING_VTS_H, 0x02 }, + { REG_TIMING_VTS_L, 0xe8 }, + { REG_TIMING_HOFFS_L, 0x10 }, + { REG_TIMING_VOFFS_L, 0x06 }, + { REG_TIMING_XINC, 0x11 }, + { REG_TIMING_YINC, 0x11 }, + { REG_TIMING_VERT_FORMAT, 0x80 }, + { REG_TIMING_HORIZ_FORMAT, 0x00 }, + { 0x3a03, 0xe8 }, + { 0x3a09, 0x6f }, + { 0x3a0b, 0x5d }, + { 0x3a15, 0x9a }, + { REG_NULL, 0x00 }, +}; + +/* 1600X1200 UXGA */ +static struct sensor_register ov2659_uxga[] = { + { REG_TIMING_HS_H, 0x00 }, + { REG_TIMING_HS_L, 0x00 }, + { REG_TIMING_VS_H, 0x00 }, + { REG_TIMING_VS_L, 0x00 }, + { REG_TIMING_HW_H, 0x06 }, + { REG_TIMING_HW_L, 0x5f }, + { REG_TIMING_VH_H, 0x04 }, + { REG_TIMING_VH_L, 0xbb }, + { REG_TIMING_DVPHO_H, 0x06 }, + { REG_TIMING_DVPHO_L, 0x40 }, + { REG_TIMING_DVPVO_H, 0x04 }, + { REG_TIMING_DVPVO_L, 0xb0 }, + { REG_TIMING_HTS_H, 0x07 }, + { REG_TIMING_HTS_L, 0x9f }, + { REG_TIMING_VTS_H, 0x04 }, + { REG_TIMING_VTS_L, 0xd0 }, + { REG_TIMING_HOFFS_L, 0x10 }, + { REG_TIMING_VOFFS_L, 0x06 }, + { REG_TIMING_XINC, 0x11 }, + { REG_TIMING_YINC, 0x11 }, + { 0x3a02, 0x04 }, + { 0x3a03, 0xd0 }, + { 0x3a08, 0x00 }, + { 0x3a09, 0xb8 }, + { 0x3a0a, 0x00 }, + { 0x3a0b, 0x9a }, + { 0x3a0d, 0x08 }, + { 0x3a0e, 0x06 }, + { 0x3a14, 0x04 }, + { 0x3a15, 0x50 }, + { 0x3623, 0x00 }, + { 0x3634, 0x44 }, + { 0x3701, 0x44 }, + { 0x3702, 0x30 }, + { 0x3703, 0x48 }, + { 0x3704, 0x48 }, + { 0x3705, 0x18 }, + { REG_TIMING_VERT_FORMAT, 0x80 }, + { REG_TIMING_HORIZ_FORMAT, 0x00 }, + { 0x370a, 0x12 }, + { REG_VFIFO_READ_START_H, 0x00 }, + { REG_VFIFO_READ_START_L, 0x80 }, + { REG_ISP_CTRL02, 0x00 }, + { REG_NULL, 0x00 }, +}; + +/* 1280X1024 SXGA */ +static struct sensor_register ov2659_sxga[] = { + { REG_TIMING_HS_H, 0x00 }, + { REG_TIMING_HS_L, 0x00 }, + { REG_TIMING_VS_H, 0x00 }, + { REG_TIMING_VS_L, 0x00 }, + { REG_TIMING_HW_H, 0x06 }, + { REG_TIMING_HW_L, 0x5f }, + { REG_TIMING_VH_H, 0x04 }, + { REG_TIMING_VH_L, 0xb7 }, + { REG_TIMING_DVPHO_H, 0x05 }, + { REG_TIMING_DVPHO_L, 0x00 }, + { REG_TIMING_DVPVO_H, 0x04 }, + { REG_TIMING_DVPVO_L, 0x00 }, + { REG_TIMING_HTS_H, 0x07 }, + { REG_TIMING_HTS_L, 0x9c }, + { REG_TIMING_VTS_H, 0x04 }, + { REG_TIMING_VTS_L, 0xd0 }, + { REG_TIMING_HOFFS_L, 0x10 }, + { REG_TIMING_VOFFS_L, 0x06 }, + { REG_TIMING_XINC, 0x11 }, + { REG_TIMING_YINC, 0x11 }, + { 0x3a02, 0x02 }, + { 0x3a03, 0x68 }, + { 0x3a08, 0x00 }, + { 0x3a09, 0x5c }, + { 0x3a0a, 0x00 }, + { 0x3a0b, 0x4d }, + { 0x3a0d, 0x08 }, + { 0x3a0e, 0x06 }, + { 0x3a14, 0x02 }, + { 0x3a15, 0x28 }, + { 0x3623, 0x00 }, + { 0x3634, 0x76 }, + { 0x3701, 0x44 }, + { 0x3702, 0x18 }, + { 0x3703, 0x24 }, + { 0x3704, 0x24 }, + { 0x3705, 0x0c }, + { REG_TIMING_VERT_FORMAT, 0x80 }, + { REG_TIMING_HORIZ_FORMAT, 0x00 }, + { 0x370a, 0x52 }, + { REG_VFIFO_READ_START_H, 0x00 }, + { REG_VFIFO_READ_START_L, 0x80 }, + { REG_ISP_CTRL02, 0x00 }, + { REG_NULL, 0x00 }, +}; + +/* 1024X768 SXGA */ +static struct sensor_register ov2659_xga[] = { + { REG_TIMING_HS_H, 0x00 }, + { REG_TIMING_HS_L, 0x00 }, + { REG_TIMING_VS_H, 0x00 }, + { REG_TIMING_VS_L, 0x00 }, + { REG_TIMING_HW_H, 0x06 }, + { REG_TIMING_HW_L, 0x5f }, + { REG_TIMING_VH_H, 0x04 }, + { REG_TIMING_VH_L, 0xb7 }, + { REG_TIMING_DVPHO_H, 0x04 }, + { REG_TIMING_DVPHO_L, 0x00 }, + { REG_TIMING_DVPVO_H, 0x03 }, + { REG_TIMING_DVPVO_L, 0x00 }, + { REG_TIMING_HTS_H, 0x07 }, + { REG_TIMING_HTS_L, 0x9c }, + { REG_TIMING_VTS_H, 0x04 }, + { REG_TIMING_VTS_L, 0xd0 }, + { REG_TIMING_HOFFS_L, 0x10 }, + { REG_TIMING_VOFFS_L, 0x06 }, + { REG_TIMING_XINC, 0x11 }, + { REG_TIMING_YINC, 0x11 }, + { 0x3a02, 0x02 }, + { 0x3a03, 0x68 }, + { 0x3a08, 0x00 }, + { 0x3a09, 0x5c }, + { 0x3a0a, 0x00 }, + { 0x3a0b, 0x4d }, + { 0x3a0d, 0x08 }, + { 0x3a0e, 0x06 }, + { 0x3a14, 0x02 }, + { 0x3a15, 0x28 }, + { 0x3623, 0x00 }, + { 0x3634, 0x76 }, + { 0x3701, 0x44 }, + { 0x3702, 0x18 }, + { 0x3703, 0x24 }, + { 0x3704, 0x24 }, + { 0x3705, 0x0c }, + { REG_TIMING_VERT_FORMAT, 0x80 }, + { REG_TIMING_HORIZ_FORMAT, 0x00 }, + { 0x370a, 0x52 }, + { REG_VFIFO_READ_START_H, 0x00 }, + { REG_VFIFO_READ_START_L, 0x80 }, + { REG_ISP_CTRL02, 0x00 }, + { REG_NULL, 0x00 }, +}; + +/* 800X600 SVGA */ +static struct sensor_register ov2659_svga[] = { + { REG_TIMING_HS_H, 0x00 }, + { REG_TIMING_HS_L, 0x00 }, + { REG_TIMING_VS_H, 0x00 }, + { REG_TIMING_VS_L, 0x00 }, + { REG_TIMING_HW_H, 0x06 }, + { REG_TIMING_HW_L, 0x5f }, + { REG_TIMING_VH_H, 0x04 }, + { REG_TIMING_VH_L, 0xb7 }, + { REG_TIMING_DVPHO_H, 0x03 }, + { REG_TIMING_DVPHO_L, 0x20 }, + { REG_TIMING_DVPVO_H, 0x02 }, + { REG_TIMING_DVPVO_L, 0x58 }, + { REG_TIMING_HTS_H, 0x05 }, + { REG_TIMING_HTS_L, 0x14 }, + { REG_TIMING_VTS_H, 0x02 }, + { REG_TIMING_VTS_L, 0x68 }, + { REG_TIMING_HOFFS_L, 0x08 }, + { REG_TIMING_VOFFS_L, 0x02 }, + { REG_TIMING_XINC, 0x31 }, + { REG_TIMING_YINC, 0x31 }, + { 0x3a02, 0x02 }, + { 0x3a03, 0x68 }, + { 0x3a08, 0x00 }, + { 0x3a09, 0x5c }, + { 0x3a0a, 0x00 }, + { 0x3a0b, 0x4d }, + { 0x3a0d, 0x08 }, + { 0x3a0e, 0x06 }, + { 0x3a14, 0x02 }, + { 0x3a15, 0x28 }, + { 0x3623, 0x00 }, + { 0x3634, 0x76 }, + { 0x3701, 0x44 }, + { 0x3702, 0x18 }, + { 0x3703, 0x24 }, + { 0x3704, 0x24 }, + { 0x3705, 0x0c }, + { REG_TIMING_VERT_FORMAT, 0x81 }, + { REG_TIMING_HORIZ_FORMAT, 0x01 }, + { 0x370a, 0x52 }, + { REG_VFIFO_READ_START_H, 0x00 }, + { REG_VFIFO_READ_START_L, 0x80 }, + { REG_ISP_CTRL02, 0x00 }, + { REG_NULL, 0x00 }, +}; + +/* 640X480 VGA */ +static struct sensor_register ov2659_vga[] = { + { REG_TIMING_HS_H, 0x00 }, + { REG_TIMING_HS_L, 0x00 }, + { REG_TIMING_VS_H, 0x00 }, + { REG_TIMING_VS_L, 0x00 }, + { REG_TIMING_HW_H, 0x06 }, + { REG_TIMING_HW_L, 0x5f }, + { REG_TIMING_VH_H, 0x04 }, + { REG_TIMING_VH_L, 0xb7 }, + { REG_TIMING_DVPHO_H, 0x02 }, + { REG_TIMING_DVPHO_L, 0x80 }, + { REG_TIMING_DVPVO_H, 0x01 }, + { REG_TIMING_DVPVO_L, 0xe0 }, + { REG_TIMING_HTS_H, 0x05 }, + { REG_TIMING_HTS_L, 0x14 }, + { REG_TIMING_VTS_H, 0x02 }, + { REG_TIMING_VTS_L, 0x68 }, + { REG_TIMING_HOFFS_L, 0x08 }, + { REG_TIMING_VOFFS_L, 0x02 }, + { REG_TIMING_XINC, 0x31 }, + { REG_TIMING_YINC, 0x31 }, + { 0x3a02, 0x02 }, + { 0x3a03, 0x68 }, + { 0x3a08, 0x00 }, + { 0x3a09, 0x5c }, + { 0x3a0a, 0x00 }, + { 0x3a0b, 0x4d }, + { 0x3a0d, 0x08 }, + { 0x3a0e, 0x06 }, + { 0x3a14, 0x02 }, + { 0x3a15, 0x28 }, + { 0x3623, 0x00 }, + { 0x3634, 0x76 }, + { 0x3701, 0x44 }, + { 0x3702, 0x18 }, + { 0x3703, 0x24 }, + { 0x3704, 0x24 }, + { 0x3705, 0x0c }, + { REG_TIMING_VERT_FORMAT, 0x81 }, + { REG_TIMING_HORIZ_FORMAT, 0x01 }, + { 0x370a, 0x52 }, + { REG_VFIFO_READ_START_H, 0x00 }, + { REG_VFIFO_READ_START_L, 0x80 }, + { REG_ISP_CTRL02, 0x10 }, + { REG_NULL, 0x00 }, +}; + +/* 320X240 QVGA */ +static struct sensor_register ov2659_qvga[] = { + { REG_TIMING_HS_H, 0x00 }, + { REG_TIMING_HS_L, 0x00 }, + { REG_TIMING_VS_H, 0x00 }, + { REG_TIMING_VS_L, 0x00 }, + { REG_TIMING_HW_H, 0x06 }, + { REG_TIMING_HW_L, 0x5f }, + { REG_TIMING_VH_H, 0x04 }, + { REG_TIMING_VH_L, 0xb7 }, + { REG_TIMING_DVPHO_H, 0x01 }, + { REG_TIMING_DVPHO_L, 0x40 }, + { REG_TIMING_DVPVO_H, 0x00 }, + { REG_TIMING_DVPVO_L, 0xf0 }, + { REG_TIMING_HTS_H, 0x05 }, + { REG_TIMING_HTS_L, 0x14 }, + { REG_TIMING_VTS_H, 0x02 }, + { REG_TIMING_VTS_L, 0x68 }, + { REG_TIMING_HOFFS_L, 0x08 }, + { REG_TIMING_VOFFS_L, 0x02 }, + { REG_TIMING_XINC, 0x31 }, + { REG_TIMING_YINC, 0x31 }, + { 0x3a02, 0x02 }, + { 0x3a03, 0x68 }, + { 0x3a08, 0x00 }, + { 0x3a09, 0x5c }, + { 0x3a0a, 0x00 }, + { 0x3a0b, 0x4d }, + { 0x3a0d, 0x08 }, + { 0x3a0e, 0x06 }, + { 0x3a14, 0x02 }, + { 0x3a15, 0x28 }, + { 0x3623, 0x00 }, + { 0x3634, 0x76 }, + { 0x3701, 0x44 }, + { 0x3702, 0x18 }, + { 0x3703, 0x24 }, + { 0x3704, 0x24 }, + { 0x3705, 0x0c }, + { REG_TIMING_VERT_FORMAT, 0x81 }, + { REG_TIMING_HORIZ_FORMAT, 0x01 }, + { 0x370a, 0x52 }, + { REG_VFIFO_READ_START_H, 0x00 }, + { REG_VFIFO_READ_START_L, 0x80 }, + { REG_ISP_CTRL02, 0x10 }, + { REG_NULL, 0x00 }, +}; + +static const struct pll_ctrl_reg ctrl3[] = { + { 1, 0x00 }, + { 2, 0x02 }, + { 3, 0x03 }, + { 4, 0x06 }, + { 6, 0x0d }, + { 8, 0x0e }, + { 12, 0x0f }, + { 16, 0x12 }, + { 24, 0x13 }, + { 32, 0x16 }, + { 48, 0x1b }, + { 64, 0x1e }, + { 96, 0x1f }, + { 0, 0x00 }, +}; + +static const struct pll_ctrl_reg ctrl1[] = { + { 2, 0x10 }, + { 4, 0x20 }, + { 6, 0x30 }, + { 8, 0x40 }, + { 10, 0x50 }, + { 12, 0x60 }, + { 14, 0x70 }, + { 16, 0x80 }, + { 18, 0x90 }, + { 20, 0xa0 }, + { 22, 0xb0 }, + { 24, 0xc0 }, + { 26, 0xd0 }, + { 28, 0xe0 }, + { 30, 0xf0 }, + { 0, 0x00 }, +}; + +static const struct ov2659_framesize ov2659_framesizes[] = { + { /* QVGA */ + .width = 320, + .height = 240, + .regs = ov2659_qvga, + .max_exp_lines = 248, + }, { /* VGA */ + .width = 640, + .height = 480, + .regs = ov2659_vga, + .max_exp_lines = 498, + }, { /* SVGA */ + .width = 800, + .height = 600, + .regs = ov2659_svga, + .max_exp_lines = 498, + }, { /* XGA */ + .width = 1024, + .height = 768, + .regs = ov2659_xga, + .max_exp_lines = 498, + }, { /* 720P */ + .width = 1280, + .height = 720, + .regs = ov2659_720p, + .max_exp_lines = 498, + }, { /* SXGA */ + .width = 1280, + .height = 1024, + .regs = ov2659_sxga, + .max_exp_lines = 1048, + }, { /* UXGA */ + .width = 1600, + .height = 1200, + .regs = ov2659_uxga, + .max_exp_lines = 498, + }, +}; + +/* YUV422 YUYV*/ +static struct sensor_register ov2659_format_yuyv[] = { + { REG_FORMAT_CTRL00, 0x30 }, + { REG_NULL, 0x0 }, +}; + +/* YUV422 UYVY */ +static struct sensor_register ov2659_format_uyvy[] = { + { REG_FORMAT_CTRL00, 0x32 }, + { REG_NULL, 0x0 }, +}; + +/* Raw Bayer BGGR */ +static struct sensor_register ov2659_format_bggr[] = { + { REG_FORMAT_CTRL00, 0x00 }, + { REG_NULL, 0x0 }, +}; + +/* RGB565 */ +static struct sensor_register ov2659_format_rgb565[] = { + { REG_FORMAT_CTRL00, 0x60 }, + { REG_NULL, 0x0 }, +}; + +static const struct ov2659_pixfmt ov2659_formats[] = { + { + .code = MEDIA_BUS_FMT_YUYV8_2X8, + .format_ctrl_regs = ov2659_format_yuyv, + }, { + .code = MEDIA_BUS_FMT_UYVY8_2X8, + .format_ctrl_regs = ov2659_format_uyvy, + }, { + .code = MEDIA_BUS_FMT_RGB565_2X8_BE, + .format_ctrl_regs = ov2659_format_rgb565, + }, { + .code = MEDIA_BUS_FMT_SBGGR8_1X8, + .format_ctrl_regs = ov2659_format_bggr, + }, +}; + +static inline struct ov2659 *to_ov2659(struct v4l2_subdev *sd) +{ + return container_of(sd, struct ov2659, sd); +} + +/* sensor register write */ +static int ov2659_write(struct i2c_client *client, u16 reg, u8 val) +{ + struct i2c_msg msg; + u8 buf[3]; + int ret; + + buf[0] = reg >> 8; + buf[1] = reg & 0xFF; + buf[2] = val; + + msg.addr = client->addr; + msg.flags = client->flags; + msg.buf = buf; + msg.len = sizeof(buf); + + ret = i2c_transfer(client->adapter, &msg, 1); + if (ret >= 0) + return 0; + + dev_dbg(&client->dev, + "ov2659 write reg(0x%x val:0x%x) failed !\n", reg, val); + + return ret; +} + +/* sensor register read */ +static int ov2659_read(struct i2c_client *client, u16 reg, u8 *val) +{ + struct i2c_msg msg[2]; + u8 buf[2]; + int ret; + + buf[0] = reg >> 8; + buf[1] = reg & 0xFF; + + msg[0].addr = client->addr; + msg[0].flags = client->flags; + msg[0].buf = buf; + msg[0].len = sizeof(buf); + + msg[1].addr = client->addr; + msg[1].flags = client->flags | I2C_M_RD; + msg[1].buf = buf; + msg[1].len = 1; + + ret = i2c_transfer(client->adapter, msg, 2); + if (ret >= 0) { + *val = buf[0]; + return 0; + } + + dev_dbg(&client->dev, + "ov2659 read reg(0x%x val:0x%x) failed !\n", reg, *val); + + return ret; +} + +static int ov2659_write_array(struct i2c_client *client, + const struct sensor_register *regs) +{ + int i, ret = 0; + + for (i = 0; ret == 0 && regs[i].addr; i++) + ret = ov2659_write(client, regs[i].addr, regs[i].value); + + return ret; +} + +static void ov2659_pll_calc_params(struct ov2659 *ov2659) +{ + const struct ov2659_platform_data *pdata = ov2659->pdata; + u8 ctrl1_reg = 0, ctrl2_reg = 0, ctrl3_reg = 0; + struct i2c_client *client = ov2659->client; + unsigned int desired = pdata->link_frequency; + u32 s_prediv = 1, s_postdiv = 1, s_mult = 1; + u32 prediv, postdiv, mult; + u32 bestdelta = -1; + u32 delta, actual; + int i, j; + + for (i = 0; ctrl1[i].div != 0; i++) { + postdiv = ctrl1[i].div; + for (j = 0; ctrl3[j].div != 0; j++) { + prediv = ctrl3[j].div; + for (mult = 1; mult <= 63; mult++) { + actual = ov2659->xvclk_frequency; + actual *= mult; + actual /= prediv; + actual /= postdiv; + delta = actual - desired; + delta = abs(delta); + + if ((delta < bestdelta) || (bestdelta == -1)) { + bestdelta = delta; + s_mult = mult; + s_prediv = prediv; + s_postdiv = postdiv; + ctrl1_reg = ctrl1[i].reg; + ctrl2_reg = mult; + ctrl3_reg = ctrl3[j].reg; + } + } + } + } + + ov2659->pll.ctrl1 = ctrl1_reg; + ov2659->pll.ctrl2 = ctrl2_reg; + ov2659->pll.ctrl3 = ctrl3_reg; + + dev_dbg(&client->dev, + "Actual reg config: ctrl1_reg: %02x ctrl2_reg: %02x ctrl3_reg: %02x\n", + ctrl1_reg, ctrl2_reg, ctrl3_reg); +} + +static int ov2659_set_pixel_clock(struct ov2659 *ov2659) +{ + struct i2c_client *client = ov2659->client; + struct sensor_register pll_regs[] = { + {REG_SC_PLL_CTRL1, ov2659->pll.ctrl1}, + {REG_SC_PLL_CTRL2, ov2659->pll.ctrl2}, + {REG_SC_PLL_CTRL3, ov2659->pll.ctrl3}, + {REG_NULL, 0x00}, + }; + + dev_dbg(&client->dev, "%s\n", __func__); + + return ov2659_write_array(client, pll_regs); +}; + +static void ov2659_get_default_format(struct v4l2_mbus_framefmt *format) +{ + format->width = ov2659_framesizes[2].width; + format->height = ov2659_framesizes[2].height; + format->colorspace = V4L2_COLORSPACE_SRGB; + format->code = ov2659_formats[0].code; + format->field = V4L2_FIELD_NONE; +} + +static void ov2659_set_streaming(struct ov2659 *ov2659, int on) +{ + struct i2c_client *client = ov2659->client; + int ret; + + on = !!on; + + dev_dbg(&client->dev, "%s: on: %d\n", __func__, on); + + ret = ov2659_write(client, REG_SOFTWARE_STANDBY, on); + if (ret) + dev_err(&client->dev, "ov2659 soft standby failed\n"); +} + +static int ov2659_init(struct v4l2_subdev *sd, u32 val) +{ + struct i2c_client *client = v4l2_get_subdevdata(sd); + + return ov2659_write_array(client, ov2659_init_regs); +} + +/* + * V4L2 subdev video and pad level operations + */ + +static int ov2659_enum_mbus_code(struct v4l2_subdev *sd, + struct v4l2_subdev_pad_config *cfg, + struct v4l2_subdev_mbus_code_enum *code) +{ + struct i2c_client *client = v4l2_get_subdevdata(sd); + + dev_dbg(&client->dev, "%s:\n", __func__); + + if (code->index >= ARRAY_SIZE(ov2659_formats)) + return -EINVAL; + + code->code = ov2659_formats[code->index].code; + + return 0; +} + +static int ov2659_enum_frame_sizes(struct v4l2_subdev *sd, + struct v4l2_subdev_pad_config *cfg, + struct v4l2_subdev_frame_size_enum *fse) +{ + struct i2c_client *client = v4l2_get_subdevdata(sd); + int i = ARRAY_SIZE(ov2659_formats); + + dev_dbg(&client->dev, "%s:\n", __func__); + + if (fse->index >= ARRAY_SIZE(ov2659_framesizes)) + return -EINVAL; + + while (--i) + if (fse->code == ov2659_formats[i].code) + break; + + fse->code = ov2659_formats[i].code; + + fse->min_width = ov2659_framesizes[fse->index].width; + fse->max_width = fse->min_width; + fse->max_height = ov2659_framesizes[fse->index].height; + fse->min_height = fse->max_height; + + return 0; +} + +static int ov2659_get_fmt(struct v4l2_subdev *sd, + struct v4l2_subdev_pad_config *cfg, + struct v4l2_subdev_format *fmt) +{ + struct i2c_client *client = v4l2_get_subdevdata(sd); + struct ov2659 *ov2659 = to_ov2659(sd); + struct v4l2_mbus_framefmt *mf; + + dev_dbg(&client->dev, "ov2659_get_fmt\n"); + + if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) { + mf = v4l2_subdev_get_try_format(sd, cfg, 0); + mutex_lock(&ov2659->lock); + fmt->format = *mf; + mutex_unlock(&ov2659->lock); + return 0; + } + + mutex_lock(&ov2659->lock); + fmt->format = ov2659->format; + mutex_unlock(&ov2659->lock); + + dev_dbg(&client->dev, "ov2659_get_fmt: %x %dx%d\n", + ov2659->format.code, ov2659->format.width, + ov2659->format.height); + + return 0; +} + +static void __ov2659_try_frame_size(struct v4l2_mbus_framefmt *mf, + const struct ov2659_framesize **size) +{ + const struct ov2659_framesize *fsize = &ov2659_framesizes[0]; + const struct ov2659_framesize *match = NULL; + int i = ARRAY_SIZE(ov2659_framesizes); + unsigned int min_err = UINT_MAX; + + while (i--) { + int err = abs(fsize->width - mf->width) + + abs(fsize->height - mf->height); + if ((err < min_err) && (fsize->regs[0].addr)) { + min_err = err; + match = fsize; + } + fsize++; + } + + if (!match) + match = &ov2659_framesizes[2]; + + mf->width = match->width; + mf->height = match->height; + + if (size) + *size = match; +} + +static int ov2659_set_fmt(struct v4l2_subdev *sd, + struct v4l2_subdev_pad_config *cfg, + struct v4l2_subdev_format *fmt) +{ + struct i2c_client *client = v4l2_get_subdevdata(sd); + unsigned int index = ARRAY_SIZE(ov2659_formats); + struct v4l2_mbus_framefmt *mf = &fmt->format; + const struct ov2659_framesize *size = NULL; + struct ov2659 *ov2659 = to_ov2659(sd); + int ret = 0; + + dev_dbg(&client->dev, "ov2659_set_fmt\n"); + + __ov2659_try_frame_size(mf, &size); + + while (--index >= 0) + if (ov2659_formats[index].code == mf->code) + break; + + if (index < 0) + return -EINVAL; + + mf->colorspace = V4L2_COLORSPACE_SRGB; + mf->code = ov2659_formats[index].code; + mf->field = V4L2_FIELD_NONE; + + mutex_lock(&ov2659->lock); + + if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) { + mf = v4l2_subdev_get_try_format(sd, cfg, fmt->pad); + *mf = fmt->format; + } else { + s64 val; + + if (ov2659->streaming) { + mutex_unlock(&ov2659->lock); + return -EBUSY; + } + + ov2659->frame_size = size; + ov2659->format = fmt->format; + ov2659->format_ctrl_regs = + ov2659_formats[index].format_ctrl_regs; + + if (ov2659->format.code != MEDIA_BUS_FMT_SBGGR8_1X8) + val = ov2659->pdata->link_frequency / 2; + else + val = ov2659->pdata->link_frequency; + + ret = v4l2_ctrl_s_ctrl_int64(ov2659->link_frequency, val); + if (ret < 0) + dev_warn(&client->dev, + "failed to set link_frequency rate (%d)\n", + ret); + } + + mutex_unlock(&ov2659->lock); + return ret; +} + +static int ov2659_set_frame_size(struct ov2659 *ov2659) +{ + struct i2c_client *client = ov2659->client; + + dev_dbg(&client->dev, "%s\n", __func__); + + return ov2659_write_array(ov2659->client, ov2659->frame_size->regs); +} + +static int ov2659_set_format(struct ov2659 *ov2659) +{ + struct i2c_client *client = ov2659->client; + + dev_dbg(&client->dev, "%s\n", __func__); + + return ov2659_write_array(ov2659->client, ov2659->format_ctrl_regs); +} + +static int ov2659_s_stream(struct v4l2_subdev *sd, int on) +{ + struct i2c_client *client = v4l2_get_subdevdata(sd); + struct ov2659 *ov2659 = to_ov2659(sd); + int ret = 0; + + dev_dbg(&client->dev, "%s: on: %d\n", __func__, on); + + mutex_lock(&ov2659->lock); + + on = !!on; + + if (ov2659->streaming == on) + goto unlock; + + if (!on) { + /* Stop Streaming Sequence */ + ov2659_set_streaming(ov2659, 0); + ov2659->streaming = on; + goto unlock; + } + + ov2659_set_pixel_clock(ov2659); + ov2659_set_frame_size(ov2659); + ov2659_set_format(ov2659); + ov2659_set_streaming(ov2659, 1); + ov2659->streaming = on; + +unlock: + mutex_unlock(&ov2659->lock); + return ret; +} + +static int ov2659_set_test_pattern(struct ov2659 *ov2659, int value) +{ + struct i2c_client *client = v4l2_get_subdevdata(&ov2659->sd); + int ret; + u8 val; + + ret = ov2659_read(client, REG_PRE_ISP_CTRL00, &val); + if (ret < 0) + return ret; + + switch (value) { + case 0: + val &= ~TEST_PATTERN_ENABLE; + break; + case 1: + val &= VERTICAL_COLOR_BAR_MASK; + val |= TEST_PATTERN_ENABLE; + break; + } + + return ov2659_write(client, REG_PRE_ISP_CTRL00, val); +} + +static int ov2659_s_ctrl(struct v4l2_ctrl *ctrl) +{ + struct ov2659 *ov2659 = + container_of(ctrl->handler, struct ov2659, ctrls); + + switch (ctrl->id) { + case V4L2_CID_TEST_PATTERN: + return ov2659_set_test_pattern(ov2659, ctrl->val); + } + + return 0; +} + +static struct v4l2_ctrl_ops ov2659_ctrl_ops = { + .s_ctrl = ov2659_s_ctrl, +}; + +static const char * const ov2659_test_pattern_menu[] = { + "Disabled", + "Vertical Color Bars", +}; + +/* ----------------------------------------------------------------------------- + * V4L2 subdev internal operations + */ + +static int ov2659_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh) +{ + struct i2c_client *client = v4l2_get_subdevdata(sd); + struct v4l2_mbus_framefmt *format = + v4l2_subdev_get_try_format(sd, fh->pad, 0); + + dev_dbg(&client->dev, "%s:\n", __func__); + + ov2659_get_default_format(format); + + return 0; +} + +static const struct v4l2_subdev_core_ops ov2659_subdev_core_ops = { + .log_status = v4l2_ctrl_subdev_log_status, + .subscribe_event = v4l2_ctrl_subdev_subscribe_event, + .unsubscribe_event = v4l2_event_subdev_unsubscribe, +}; + +static const struct v4l2_subdev_video_ops ov2659_subdev_video_ops = { + .s_stream = ov2659_s_stream, +}; + +static const struct v4l2_subdev_pad_ops ov2659_subdev_pad_ops = { + .enum_mbus_code = ov2659_enum_mbus_code, + .enum_frame_size = ov2659_enum_frame_sizes, + .get_fmt = ov2659_get_fmt, + .set_fmt = ov2659_set_fmt, +}; + +static const struct v4l2_subdev_ops ov2659_subdev_ops = { + .core = &ov2659_subdev_core_ops, + .video = &ov2659_subdev_video_ops, + .pad = &ov2659_subdev_pad_ops, +}; + +static const struct v4l2_subdev_internal_ops ov2659_subdev_internal_ops = { + .open = ov2659_open, +}; + +static int ov2659_detect(struct v4l2_subdev *sd) +{ + struct i2c_client *client = v4l2_get_subdevdata(sd); + u8 pid, ver; + int ret; + + dev_dbg(&client->dev, "%s:\n", __func__); + + ret = ov2659_write(client, REG_SOFTWARE_RESET, 0x01); + if (ret != 0) { + dev_err(&client->dev, "Sensor soft reset failed\n"); + return -ENODEV; + } + usleep_range(1000, 2000); + + ret = ov2659_init(sd, 0); + if (ret < 0) + return ret; + + /* Check sensor revision */ + ret = ov2659_read(client, REG_SC_CHIP_ID_H, &pid); + if (!ret) + ret = ov2659_read(client, REG_SC_CHIP_ID_L, &ver); + + if (!ret) { + unsigned short id; + + id = OV265X_ID(pid, ver); + if (id != OV2659_ID) + dev_err(&client->dev, + "Sensor detection failed (%04X, %d)\n", + id, ret); + else + dev_info(&client->dev, "Found OV%04X sensor\n", id); + } + + return ret; +} + +static struct ov2659_platform_data * +ov2659_get_pdata(struct i2c_client *client) +{ + struct ov2659_platform_data *pdata; + struct device_node *endpoint; + int ret; + + if (!IS_ENABLED(CONFIG_OF) || !client->dev.of_node) + return client->dev.platform_data; + + endpoint = of_graph_get_next_endpoint(client->dev.of_node, NULL); + if (!endpoint) + return NULL; + + pdata = devm_kzalloc(&client->dev, sizeof(*pdata), GFP_KERNEL); + if (!pdata) + goto done; + + ret = of_property_read_u64(endpoint, "link-frequencies", + &pdata->link_frequency); + if (ret) { + dev_err(&client->dev, "link-frequencies property not found\n"); + pdata = NULL; + } + +done: + of_node_put(endpoint); + return pdata; +} + +static int ov2659_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + const struct ov2659_platform_data *pdata = ov2659_get_pdata(client); + struct v4l2_subdev *sd; + struct ov2659 *ov2659; + struct clk *clk; + int ret; + + if (!pdata) { + dev_err(&client->dev, "platform data not specified\n"); + return -EINVAL; + } + + ov2659 = devm_kzalloc(&client->dev, sizeof(*ov2659), GFP_KERNEL); + if (!ov2659) + return -ENOMEM; + + ov2659->pdata = pdata; + ov2659->client = client; + + clk = devm_clk_get(&client->dev, "xvclk"); + if (IS_ERR(clk)) + return PTR_ERR(clk); + + ov2659->xvclk_frequency = clk_get_rate(clk); + if (ov2659->xvclk_frequency < 6000000 || + ov2659->xvclk_frequency > 27000000) + return -EINVAL; + + v4l2_ctrl_handler_init(&ov2659->ctrls, 2); + ov2659->link_frequency = + v4l2_ctrl_new_std(&ov2659->ctrls, &ov2659_ctrl_ops, + V4L2_CID_PIXEL_RATE, + pdata->link_frequency / 2, + pdata->link_frequency, 1, + pdata->link_frequency); + v4l2_ctrl_new_std_menu_items(&ov2659->ctrls, &ov2659_ctrl_ops, + V4L2_CID_TEST_PATTERN, + ARRAY_SIZE(ov2659_test_pattern_menu) - 1, + 0, 0, ov2659_test_pattern_menu); + ov2659->sd.ctrl_handler = &ov2659->ctrls; + + if (ov2659->ctrls.error) { + dev_err(&client->dev, "%s: control initialization error %d\n", + __func__, ov2659->ctrls.error); + return ov2659->ctrls.error; + } + + sd = &ov2659->sd; + client->flags |= I2C_CLIENT_SCCB; + v4l2_i2c_subdev_init(sd, client, &ov2659_subdev_ops); + + sd->internal_ops = &ov2659_subdev_internal_ops; + sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE | + V4L2_SUBDEV_FL_HAS_EVENTS; + +#if defined(CONFIG_MEDIA_CONTROLLER) + ov2659->pad.flags = MEDIA_PAD_FL_SOURCE; + sd->entity.type = MEDIA_ENT_T_V4L2_SUBDEV_SENSOR; + ret = media_entity_init(&sd->entity, 1, &ov2659->pad, 0); + if (ret < 0) { + v4l2_ctrl_handler_free(&ov2659->ctrls); + return ret; + } +#endif + + mutex_init(&ov2659->lock); + + ov2659_get_default_format(&ov2659->format); + ov2659->frame_size = &ov2659_framesizes[2]; + ov2659->format_ctrl_regs = ov2659_formats[0].format_ctrl_regs; + + ret = ov2659_detect(sd); + if (ret < 0) + goto error; + + /* Calculate the PLL register value needed */ + ov2659_pll_calc_params(ov2659); + + ret = v4l2_async_register_subdev(&ov2659->sd); + if (ret) + goto error; + + dev_info(&client->dev, "%s sensor driver registered !!\n", sd->name); + + return 0; + +error: + v4l2_ctrl_handler_free(&ov2659->ctrls); +#if defined(CONFIG_MEDIA_CONTROLLER) + media_entity_cleanup(&sd->entity); +#endif + mutex_destroy(&ov2659->lock); + return ret; +} + +static int ov2659_remove(struct i2c_client *client) +{ + struct v4l2_subdev *sd = i2c_get_clientdata(client); + struct ov2659 *ov2659 = to_ov2659(sd); + + v4l2_ctrl_handler_free(&ov2659->ctrls); + v4l2_async_unregister_subdev(sd); +#if defined(CONFIG_MEDIA_CONTROLLER) + media_entity_cleanup(&sd->entity); +#endif + mutex_destroy(&ov2659->lock); + + return 0; +} + +static const struct i2c_device_id ov2659_id[] = { + { "ov2659", 0 }, + { /* sentinel */ }, +}; +MODULE_DEVICE_TABLE(i2c, ov2659_id); + +#if IS_ENABLED(CONFIG_OF) +static const struct of_device_id ov2659_of_match[] = { + { .compatible = "ovti,ov2659", }, + { /* sentinel */ }, +}; +MODULE_DEVICE_TABLE(of, ov2659_of_match); +#endif + +static struct i2c_driver ov2659_i2c_driver = { + .driver = { + .name = DRIVER_NAME, + .of_match_table = of_match_ptr(ov2659_of_match), + }, + .probe = ov2659_probe, + .remove = ov2659_remove, + .id_table = ov2659_id, +}; + +module_i2c_driver(ov2659_i2c_driver); + +MODULE_AUTHOR("Benoit Parrot "); +MODULE_DESCRIPTION("OV2659 CMOS Image Sensor driver"); +MODULE_LICENSE("GPL v2"); diff --git a/include/media/ov2659.h b/include/media/ov2659.h new file mode 100644 index 000000000000..4216adc1ede2 --- /dev/null +++ b/include/media/ov2659.h @@ -0,0 +1,34 @@ +/* + * Omnivision OV2659 CMOS Image Sensor driver + * + * Copyright (C) 2015 Texas Instruments, Inc. + * + * Benoit Parrot + * Lad, Prabhakar + * + * This program is free software; you may redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS + * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN + * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ + +#ifndef OV2659_H +#define OV2659_H + +/** + * struct ov2659_platform_data - ov2659 driver platform data + * @link_frequency: target pixel clock frequency + */ +struct ov2659_platform_data { + s64 link_frequency; +}; + +#endif /* OV2659_H */ -- cgit v1.2.3 From ce0b065a7cc3cad8e974f1e8a5bead61563a3885 Mon Sep 17 00:00:00 2001 From: Antti Palosaari Date: Mon, 23 Mar 2015 20:35:57 -0300 Subject: [media] m88ts2022: remove obsolete driver This driver was replaced by ts2020 driver. Signed-off-by: Antti Palosaari Signed-off-by: Mauro Carvalho Chehab --- MAINTAINERS | 10 - drivers/media/tuners/Kconfig | 8 - drivers/media/tuners/m88ts2022.c | 579 ---------------------------------- drivers/media/tuners/m88ts2022.h | 54 ---- drivers/media/tuners/m88ts2022_priv.h | 35 -- 5 files changed, 686 deletions(-) delete mode 100644 drivers/media/tuners/m88ts2022.c delete mode 100644 drivers/media/tuners/m88ts2022.h delete mode 100644 drivers/media/tuners/m88ts2022_priv.h (limited to 'MAINTAINERS') diff --git a/MAINTAINERS b/MAINTAINERS index 460194ca7927..ec9bf9f54c97 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -6103,16 +6103,6 @@ Q: http://patchwork.linuxtv.org/project/linux-media/list/ S: Maintained F: drivers/media/dvb-frontends/m88rs2000* -M88TS2022 MEDIA DRIVER -M: Antti Palosaari -L: linux-media@vger.kernel.org -W: http://linuxtv.org/ -W: http://palosaari.fi/linux/ -Q: http://patchwork.linuxtv.org/project/linux-media/list/ -T: git git://linuxtv.org/anttip/media_tree.git -S: Maintained -F: drivers/media/tuners/m88ts2022* - MA901 MASTERKIT USB FM RADIO DRIVER M: Alexey Klimov L: linux-media@vger.kernel.org diff --git a/drivers/media/tuners/Kconfig b/drivers/media/tuners/Kconfig index 42e5a01b9192..983510d282f6 100644 --- a/drivers/media/tuners/Kconfig +++ b/drivers/media/tuners/Kconfig @@ -224,14 +224,6 @@ config MEDIA_TUNER_FC2580 help FCI FC2580 silicon tuner driver. -config MEDIA_TUNER_M88TS2022 - tristate "Montage M88TS2022 silicon tuner" - depends on MEDIA_SUPPORT && I2C - select REGMAP_I2C - default m if !MEDIA_SUBDRV_AUTOSELECT - help - Montage M88TS2022 silicon tuner driver. - config MEDIA_TUNER_M88RS6000T tristate "Montage M88RS6000 internal tuner" depends on MEDIA_SUPPORT && I2C diff --git a/drivers/media/tuners/m88ts2022.c b/drivers/media/tuners/m88ts2022.c deleted file mode 100644 index cdf9fe5376c6..000000000000 --- a/drivers/media/tuners/m88ts2022.c +++ /dev/null @@ -1,579 +0,0 @@ -/* - * Montage M88TS2022 silicon tuner driver - * - * Copyright (C) 2013 Antti Palosaari - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Some calculations are taken from existing TS2020 driver. - */ - -#include "m88ts2022_priv.h" - -static int m88ts2022_cmd(struct m88ts2022_dev *dev, int op, int sleep, u8 reg, - u8 mask, u8 val, u8 *reg_val) -{ - int ret, i, j; - unsigned int utmp; - struct m88ts2022_reg_val reg_vals[] = { - {0x51, 0x1f - op}, - {0x51, 0x1f}, - {0x50, 0x00 + op}, - {0x50, 0x00}, - }; - - for (i = 0; i < 2; i++) { - dev_dbg(&dev->client->dev, - "i=%d op=%02x reg=%02x mask=%02x val=%02x\n", - i, op, reg, mask, val); - - for (j = 0; j < ARRAY_SIZE(reg_vals); j++) { - ret = regmap_write(dev->regmap, reg_vals[j].reg, - reg_vals[j].val); - if (ret) - goto err; - } - - usleep_range(sleep * 1000, sleep * 10000); - - ret = regmap_read(dev->regmap, reg, &utmp); - if (ret) - goto err; - - if ((utmp & mask) != val) - break; - } - - if (reg_val) - *reg_val = utmp; -err: - return ret; -} - -static int m88ts2022_set_params(struct dvb_frontend *fe) -{ - struct m88ts2022_dev *dev = fe->tuner_priv; - struct dtv_frontend_properties *c = &fe->dtv_property_cache; - int ret; - unsigned int utmp, frequency_khz, frequency_offset_khz, f_3db_hz; - unsigned int f_ref_khz, f_vco_khz, div_ref, div_out, pll_n, gdiv28; - u8 buf[3], u8tmp, cap_code, lpf_gm, lpf_mxdiv, div_max, div_min; - u16 u16tmp; - - dev_dbg(&dev->client->dev, - "frequency=%d symbol_rate=%d rolloff=%d\n", - c->frequency, c->symbol_rate, c->rolloff); - /* - * Integer-N PLL synthesizer - * kHz is used for all calculations to keep calculations within 32-bit - */ - f_ref_khz = DIV_ROUND_CLOSEST(dev->cfg.clock, 1000); - div_ref = DIV_ROUND_CLOSEST(f_ref_khz, 2000); - - if (c->symbol_rate < 5000000) - frequency_offset_khz = 3000; /* 3 MHz */ - else - frequency_offset_khz = 0; - - frequency_khz = c->frequency + frequency_offset_khz; - - if (frequency_khz < 1103000) { - div_out = 4; - u8tmp = 0x1b; - } else { - div_out = 2; - u8tmp = 0x0b; - } - - buf[0] = u8tmp; - buf[1] = 0x40; - ret = regmap_bulk_write(dev->regmap, 0x10, buf, 2); - if (ret) - goto err; - - f_vco_khz = frequency_khz * div_out; - pll_n = f_vco_khz * div_ref / f_ref_khz; - pll_n += pll_n % 2; - dev->frequency_khz = pll_n * f_ref_khz / div_ref / div_out; - - if (pll_n < 4095) - u16tmp = pll_n - 1024; - else if (pll_n < 6143) - u16tmp = pll_n + 1024; - else - u16tmp = pll_n + 3072; - - buf[0] = (u16tmp >> 8) & 0x3f; - buf[1] = (u16tmp >> 0) & 0xff; - buf[2] = div_ref - 8; - ret = regmap_bulk_write(dev->regmap, 0x01, buf, 3); - if (ret) - goto err; - - dev_dbg(&dev->client->dev, - "frequency=%u offset=%d f_vco_khz=%u pll_n=%u div_ref=%u div_out=%u\n", - dev->frequency_khz, dev->frequency_khz - c->frequency, - f_vco_khz, pll_n, div_ref, div_out); - - ret = m88ts2022_cmd(dev, 0x10, 5, 0x15, 0x40, 0x00, NULL); - if (ret) - goto err; - - ret = regmap_read(dev->regmap, 0x14, &utmp); - if (ret) - goto err; - - utmp &= 0x7f; - if (utmp < 64) { - ret = regmap_update_bits(dev->regmap, 0x10, 0x80, 0x80); - if (ret) - goto err; - - ret = regmap_write(dev->regmap, 0x11, 0x6f); - if (ret) - goto err; - - ret = m88ts2022_cmd(dev, 0x10, 5, 0x15, 0x40, 0x00, NULL); - if (ret) - goto err; - } - - ret = regmap_read(dev->regmap, 0x14, &utmp); - if (ret) - goto err; - - utmp &= 0x1f; - if (utmp > 19) { - ret = regmap_update_bits(dev->regmap, 0x10, 0x02, 0x00); - if (ret) - goto err; - } - - ret = m88ts2022_cmd(dev, 0x08, 5, 0x3c, 0xff, 0x00, NULL); - if (ret) - goto err; - - ret = regmap_write(dev->regmap, 0x25, 0x00); - if (ret) - goto err; - - ret = regmap_write(dev->regmap, 0x27, 0x70); - if (ret) - goto err; - - ret = regmap_write(dev->regmap, 0x41, 0x09); - if (ret) - goto err; - - ret = regmap_write(dev->regmap, 0x08, 0x0b); - if (ret) - goto err; - - /* filters */ - gdiv28 = DIV_ROUND_CLOSEST(f_ref_khz * 1694U, 1000000U); - - ret = regmap_write(dev->regmap, 0x04, gdiv28); - if (ret) - goto err; - - ret = m88ts2022_cmd(dev, 0x04, 2, 0x26, 0xff, 0x00, &u8tmp); - if (ret) - goto err; - - cap_code = u8tmp & 0x3f; - - ret = regmap_write(dev->regmap, 0x41, 0x0d); - if (ret) - goto err; - - ret = m88ts2022_cmd(dev, 0x04, 2, 0x26, 0xff, 0x00, &u8tmp); - if (ret) - goto err; - - u8tmp &= 0x3f; - cap_code = (cap_code + u8tmp) / 2; - gdiv28 = gdiv28 * 207 / (cap_code * 2 + 151); - div_max = gdiv28 * 135 / 100; - div_min = gdiv28 * 78 / 100; - div_max = clamp_val(div_max, 0U, 63U); - - f_3db_hz = mult_frac(c->symbol_rate, 135, 200); - f_3db_hz += 2000000U + (frequency_offset_khz * 1000U); - f_3db_hz = clamp(f_3db_hz, 7000000U, 40000000U); - -#define LPF_COEFF 3200U - lpf_gm = DIV_ROUND_CLOSEST(f_3db_hz * gdiv28, LPF_COEFF * f_ref_khz); - lpf_gm = clamp_val(lpf_gm, 1U, 23U); - - lpf_mxdiv = DIV_ROUND_CLOSEST(lpf_gm * LPF_COEFF * f_ref_khz, f_3db_hz); - if (lpf_mxdiv < div_min) - lpf_mxdiv = DIV_ROUND_CLOSEST(++lpf_gm * LPF_COEFF * f_ref_khz, f_3db_hz); - lpf_mxdiv = clamp_val(lpf_mxdiv, 0U, div_max); - - ret = regmap_write(dev->regmap, 0x04, lpf_mxdiv); - if (ret) - goto err; - - ret = regmap_write(dev->regmap, 0x06, lpf_gm); - if (ret) - goto err; - - ret = m88ts2022_cmd(dev, 0x04, 2, 0x26, 0xff, 0x00, &u8tmp); - if (ret) - goto err; - - cap_code = u8tmp & 0x3f; - - ret = regmap_write(dev->regmap, 0x41, 0x09); - if (ret) - goto err; - - ret = m88ts2022_cmd(dev, 0x04, 2, 0x26, 0xff, 0x00, &u8tmp); - if (ret) - goto err; - - u8tmp &= 0x3f; - cap_code = (cap_code + u8tmp) / 2; - - u8tmp = cap_code | 0x80; - ret = regmap_write(dev->regmap, 0x25, u8tmp); - if (ret) - goto err; - - ret = regmap_write(dev->regmap, 0x27, 0x30); - if (ret) - goto err; - - ret = regmap_write(dev->regmap, 0x08, 0x09); - if (ret) - goto err; - - ret = m88ts2022_cmd(dev, 0x01, 20, 0x21, 0xff, 0x00, NULL); - if (ret) - goto err; -err: - if (ret) - dev_dbg(&dev->client->dev, "failed=%d\n", ret); - - return ret; -} - -static int m88ts2022_init(struct dvb_frontend *fe) -{ - struct m88ts2022_dev *dev = fe->tuner_priv; - int ret, i; - u8 u8tmp; - static const struct m88ts2022_reg_val reg_vals[] = { - {0x7d, 0x9d}, - {0x7c, 0x9a}, - {0x7a, 0x76}, - {0x3b, 0x01}, - {0x63, 0x88}, - {0x61, 0x85}, - {0x22, 0x30}, - {0x30, 0x40}, - {0x20, 0x23}, - {0x24, 0x02}, - {0x12, 0xa0}, - }; - - dev_dbg(&dev->client->dev, "\n"); - - ret = regmap_write(dev->regmap, 0x00, 0x01); - if (ret) - goto err; - - ret = regmap_write(dev->regmap, 0x00, 0x03); - if (ret) - goto err; - - switch (dev->cfg.clock_out) { - case M88TS2022_CLOCK_OUT_DISABLED: - u8tmp = 0x60; - break; - case M88TS2022_CLOCK_OUT_ENABLED: - u8tmp = 0x70; - ret = regmap_write(dev->regmap, 0x05, dev->cfg.clock_out_div); - if (ret) - goto err; - break; - case M88TS2022_CLOCK_OUT_ENABLED_XTALOUT: - u8tmp = 0x6c; - break; - default: - goto err; - } - - ret = regmap_write(dev->regmap, 0x42, u8tmp); - if (ret) - goto err; - - if (dev->cfg.loop_through) - u8tmp = 0xec; - else - u8tmp = 0x6c; - - ret = regmap_write(dev->regmap, 0x62, u8tmp); - if (ret) - goto err; - - for (i = 0; i < ARRAY_SIZE(reg_vals); i++) { - ret = regmap_write(dev->regmap, reg_vals[i].reg, reg_vals[i].val); - if (ret) - goto err; - } -err: - if (ret) - dev_dbg(&dev->client->dev, "failed=%d\n", ret); - return ret; -} - -static int m88ts2022_sleep(struct dvb_frontend *fe) -{ - struct m88ts2022_dev *dev = fe->tuner_priv; - int ret; - - dev_dbg(&dev->client->dev, "\n"); - - ret = regmap_write(dev->regmap, 0x00, 0x00); - if (ret) - goto err; -err: - if (ret) - dev_dbg(&dev->client->dev, "failed=%d\n", ret); - return ret; -} - -static int m88ts2022_get_frequency(struct dvb_frontend *fe, u32 *frequency) -{ - struct m88ts2022_dev *dev = fe->tuner_priv; - - dev_dbg(&dev->client->dev, "\n"); - - *frequency = dev->frequency_khz; - return 0; -} - -static int m88ts2022_get_if_frequency(struct dvb_frontend *fe, u32 *frequency) -{ - struct m88ts2022_dev *dev = fe->tuner_priv; - - dev_dbg(&dev->client->dev, "\n"); - - *frequency = 0; /* Zero-IF */ - return 0; -} - -static int m88ts2022_get_rf_strength(struct dvb_frontend *fe, u16 *strength) -{ - struct m88ts2022_dev *dev = fe->tuner_priv; - int ret; - u16 gain, u16tmp; - unsigned int utmp, gain1, gain2, gain3; - - ret = regmap_read(dev->regmap, 0x3d, &utmp); - if (ret) - goto err; - - gain1 = (utmp >> 0) & 0x1f; - gain1 = clamp(gain1, 0U, 15U); - - ret = regmap_read(dev->regmap, 0x21, &utmp); - if (ret) - goto err; - - gain2 = (utmp >> 0) & 0x1f; - gain2 = clamp(gain2, 2U, 16U); - - ret = regmap_read(dev->regmap, 0x66, &utmp); - if (ret) - goto err; - - gain3 = (utmp >> 3) & 0x07; - gain3 = clamp(gain3, 0U, 6U); - - gain = gain1 * 265 + gain2 * 338 + gain3 * 285; - - /* scale value to 0x0000-0xffff */ - u16tmp = (0xffff - gain); - u16tmp = clamp_val(u16tmp, 59000U, 61500U); - - *strength = (u16tmp - 59000) * 0xffff / (61500 - 59000); -err: - if (ret) - dev_dbg(&dev->client->dev, "failed=%d\n", ret); - return ret; -} - -static const struct dvb_tuner_ops m88ts2022_tuner_ops = { - .info = { - .name = "Montage M88TS2022", - .frequency_min = 950000, - .frequency_max = 2150000, - }, - - .init = m88ts2022_init, - .sleep = m88ts2022_sleep, - .set_params = m88ts2022_set_params, - - .get_frequency = m88ts2022_get_frequency, - .get_if_frequency = m88ts2022_get_if_frequency, - .get_rf_strength = m88ts2022_get_rf_strength, -}; - -static int m88ts2022_probe(struct i2c_client *client, - const struct i2c_device_id *id) -{ - struct m88ts2022_config *cfg = client->dev.platform_data; - struct dvb_frontend *fe = cfg->fe; - struct m88ts2022_dev *dev; - int ret; - u8 u8tmp; - unsigned int utmp; - static const struct regmap_config regmap_config = { - .reg_bits = 8, - .val_bits = 8, - }; - - dev = kzalloc(sizeof(*dev), GFP_KERNEL); - if (!dev) { - ret = -ENOMEM; - dev_err(&client->dev, "kzalloc() failed\n"); - goto err; - } - - memcpy(&dev->cfg, cfg, sizeof(struct m88ts2022_config)); - dev->client = client; - dev->regmap = devm_regmap_init_i2c(client, ®map_config); - if (IS_ERR(dev->regmap)) { - ret = PTR_ERR(dev->regmap); - goto err; - } - - /* check if the tuner is there */ - ret = regmap_read(dev->regmap, 0x00, &utmp); - if (ret) - goto err; - - if ((utmp & 0x03) == 0x00) { - ret = regmap_write(dev->regmap, 0x00, 0x01); - if (ret) - goto err; - - usleep_range(2000, 50000); - } - - ret = regmap_write(dev->regmap, 0x00, 0x03); - if (ret) - goto err; - - usleep_range(2000, 50000); - - ret = regmap_read(dev->regmap, 0x00, &utmp); - if (ret) - goto err; - - dev_dbg(&dev->client->dev, "chip_id=%02x\n", utmp); - - switch (utmp) { - case 0xc3: - case 0x83: - break; - default: - ret = -ENODEV; - goto err; - } - - switch (dev->cfg.clock_out) { - case M88TS2022_CLOCK_OUT_DISABLED: - u8tmp = 0x60; - break; - case M88TS2022_CLOCK_OUT_ENABLED: - u8tmp = 0x70; - ret = regmap_write(dev->regmap, 0x05, dev->cfg.clock_out_div); - if (ret) - goto err; - break; - case M88TS2022_CLOCK_OUT_ENABLED_XTALOUT: - u8tmp = 0x6c; - break; - default: - ret = -EINVAL; - goto err; - } - - ret = regmap_write(dev->regmap, 0x42, u8tmp); - if (ret) - goto err; - - if (dev->cfg.loop_through) - u8tmp = 0xec; - else - u8tmp = 0x6c; - - ret = regmap_write(dev->regmap, 0x62, u8tmp); - if (ret) - goto err; - - /* sleep */ - ret = regmap_write(dev->regmap, 0x00, 0x00); - if (ret) - goto err; - - dev_info(&dev->client->dev, "Montage M88TS2022 successfully identified\n"); - - fe->tuner_priv = dev; - memcpy(&fe->ops.tuner_ops, &m88ts2022_tuner_ops, - sizeof(struct dvb_tuner_ops)); - - i2c_set_clientdata(client, dev); - return 0; -err: - dev_dbg(&client->dev, "failed=%d\n", ret); - kfree(dev); - return ret; -} - -static int m88ts2022_remove(struct i2c_client *client) -{ - struct m88ts2022_dev *dev = i2c_get_clientdata(client); - struct dvb_frontend *fe = dev->cfg.fe; - - dev_dbg(&client->dev, "\n"); - - memset(&fe->ops.tuner_ops, 0, sizeof(struct dvb_tuner_ops)); - fe->tuner_priv = NULL; - kfree(dev); - - return 0; -} - -static const struct i2c_device_id m88ts2022_id[] = { - {"m88ts2022", 0}, - {} -}; -MODULE_DEVICE_TABLE(i2c, m88ts2022_id); - -static struct i2c_driver m88ts2022_driver = { - .driver = { - .owner = THIS_MODULE, - .name = "m88ts2022", - }, - .probe = m88ts2022_probe, - .remove = m88ts2022_remove, - .id_table = m88ts2022_id, -}; - -module_i2c_driver(m88ts2022_driver); - -MODULE_DESCRIPTION("Montage M88TS2022 silicon tuner driver"); -MODULE_AUTHOR("Antti Palosaari "); -MODULE_LICENSE("GPL"); diff --git a/drivers/media/tuners/m88ts2022.h b/drivers/media/tuners/m88ts2022.h deleted file mode 100644 index 659fa1b1633a..000000000000 --- a/drivers/media/tuners/m88ts2022.h +++ /dev/null @@ -1,54 +0,0 @@ -/* - * Montage M88TS2022 silicon tuner driver - * - * Copyright (C) 2013 Antti Palosaari - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef M88TS2022_H -#define M88TS2022_H - -#include "dvb_frontend.h" - -struct m88ts2022_config { - /* - * clock - * 16000000 - 32000000 - */ - u32 clock; - - /* - * RF loop-through - */ - u8 loop_through:1; - - /* - * clock output - */ -#define M88TS2022_CLOCK_OUT_DISABLED 0 -#define M88TS2022_CLOCK_OUT_ENABLED 1 -#define M88TS2022_CLOCK_OUT_ENABLED_XTALOUT 2 - u8 clock_out:2; - - /* - * clock output divider - * 1 - 31 - */ - u8 clock_out_div:5; - - /* - * pointer to DVB frontend - */ - struct dvb_frontend *fe; -}; - -#endif diff --git a/drivers/media/tuners/m88ts2022_priv.h b/drivers/media/tuners/m88ts2022_priv.h deleted file mode 100644 index feeb5ad6beef..000000000000 --- a/drivers/media/tuners/m88ts2022_priv.h +++ /dev/null @@ -1,35 +0,0 @@ -/* - * Montage M88TS2022 silicon tuner driver - * - * Copyright (C) 2013 Antti Palosaari - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef M88TS2022_PRIV_H -#define M88TS2022_PRIV_H - -#include "m88ts2022.h" -#include - -struct m88ts2022_dev { - struct m88ts2022_config cfg; - struct i2c_client *client; - struct regmap *regmap; - u32 frequency_khz; -}; - -struct m88ts2022_reg_val { - u8 reg; - u8 val; -}; - -#endif -- cgit v1.2.3 From df3305156f989339529b3d6744b898d498fb1f7b Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Wed, 15 May 2013 11:36:19 -0300 Subject: [media] v4l: xilinx: Add Xilinx Video IP core Xilinx platforms have no hardwired video capture or video processing interface. Users create capture and memory to memory processing pipelines in the FPGA fabric to suit their particular needs, by instantiating video IP cores from a large library. The Xilinx Video IP core is a framework that models a video pipeline described in the device tree and expose the pipeline to userspace through the media controller and V4L2 APIs. Signed-off-by: Laurent Pinchart Signed-off-by: Hyun Kwon Signed-off-by: Radhey Shyam Pandey Signed-off-by: Michal Simek Acked-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- .../devicetree/bindings/media/xilinx/video.txt | 35 + .../bindings/media/xilinx/xlnx,video.txt | 55 ++ MAINTAINERS | 9 + drivers/media/platform/Kconfig | 1 + drivers/media/platform/Makefile | 2 + drivers/media/platform/xilinx/Kconfig | 10 + drivers/media/platform/xilinx/Makefile | 3 + drivers/media/platform/xilinx/xilinx-dma.c | 766 +++++++++++++++++++++ drivers/media/platform/xilinx/xilinx-dma.h | 109 +++ drivers/media/platform/xilinx/xilinx-vip.c | 323 +++++++++ drivers/media/platform/xilinx/xilinx-vip.h | 238 +++++++ drivers/media/platform/xilinx/xilinx-vipp.c | 669 ++++++++++++++++++ drivers/media/platform/xilinx/xilinx-vipp.h | 49 ++ include/dt-bindings/media/xilinx-vip.h | 39 ++ 14 files changed, 2308 insertions(+) create mode 100644 Documentation/devicetree/bindings/media/xilinx/video.txt create mode 100644 Documentation/devicetree/bindings/media/xilinx/xlnx,video.txt create mode 100644 drivers/media/platform/xilinx/Kconfig create mode 100644 drivers/media/platform/xilinx/Makefile create mode 100644 drivers/media/platform/xilinx/xilinx-dma.c create mode 100644 drivers/media/platform/xilinx/xilinx-dma.h create mode 100644 drivers/media/platform/xilinx/xilinx-vip.c create mode 100644 drivers/media/platform/xilinx/xilinx-vip.h create mode 100644 drivers/media/platform/xilinx/xilinx-vipp.c create mode 100644 drivers/media/platform/xilinx/xilinx-vipp.h create mode 100644 include/dt-bindings/media/xilinx-vip.h (limited to 'MAINTAINERS') diff --git a/Documentation/devicetree/bindings/media/xilinx/video.txt b/Documentation/devicetree/bindings/media/xilinx/video.txt new file mode 100644 index 000000000000..cbd46fa0988f --- /dev/null +++ b/Documentation/devicetree/bindings/media/xilinx/video.txt @@ -0,0 +1,35 @@ +DT bindings for Xilinx video IP cores +------------------------------------- + +Xilinx video IP cores process video streams by acting as video sinks and/or +sources. They are connected by links through their input and output ports, +creating a video pipeline. + +Each video IP core is represented by an AMBA bus child node in the device +tree using bindings documented in this directory. Connections between the IP +cores are represented as defined in ../video-interfaces.txt. + +The whole pipeline is represented by an AMBA bus child node in the device +tree using bindings documented in ./xlnx,video.txt. + +Common properties +----------------- + +The following properties are common to all Xilinx video IP cores. + +- xlnx,video-format: This property represents a video format transmitted on an + AXI bus between video IP cores, using its VF code as defined in "AXI4-Stream + Video IP and System Design Guide" [UG934]. How the format relates to the IP + core is decribed in the IP core bindings documentation. + +- xlnx,video-width: This property qualifies the video format with the sample + width expressed as a number of bits per pixel component. All components must + use the same width. + +- xlnx,cfa-pattern: When the video format is set to Mono/Sensor, this property + describes the sensor's color filter array pattern. Supported values are + "bggr", "gbrg", "grbg", "rggb" and "mono". If not specified, the pattern + defaults to "mono". + + +[UG934] http://www.xilinx.com/support/documentation/ip_documentation/axi_videoip/v1_0/ug934_axi_videoIP.pdf diff --git a/Documentation/devicetree/bindings/media/xilinx/xlnx,video.txt b/Documentation/devicetree/bindings/media/xilinx/xlnx,video.txt new file mode 100644 index 000000000000..5a0227023608 --- /dev/null +++ b/Documentation/devicetree/bindings/media/xilinx/xlnx,video.txt @@ -0,0 +1,55 @@ +Xilinx Video IP Pipeline (VIPP) +------------------------------- + +General concept +--------------- + +Xilinx video IP pipeline processes video streams through one or more Xilinx +video IP cores. Each video IP core is represented as documented in video.txt +and IP core specific documentation, xlnx,v-*.txt, in this directory. The DT +node of the VIPP represents as a top level node of the pipeline and defines +mappings between DMAs and the video IP cores. + +Required properties: + +- compatible: Must be "xlnx,video". + +- dmas, dma-names: List of one DMA specifier and identifier string (as defined + in Documentation/devicetree/bindings/dma/dma.txt) per port. Each port + requires a DMA channel with the identifier string set to "port" followed by + the port index. + +- ports: Video port, using the DT bindings defined in ../video-interfaces.txt. + +Required port properties: + +- direction: should be either "input" or "output" depending on the direction + of stream. + +Example: + + video_cap { + compatible = "xlnx,video"; + dmas = <&vdma_1 1>, <&vdma_3 1>; + dma-names = "port0", "port1"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + direction = "input"; + vcap0_in0: endpoint { + remote-endpoint = <&scaler0_out>; + }; + }; + port@1 { + reg = <1>; + direction = "input"; + vcap0_in1: endpoint { + remote-endpoint = <&switch_out1>; + }; + }; + }; + }; diff --git a/MAINTAINERS b/MAINTAINERS index ec9bf9f54c97..ca3b2638fcc6 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -10818,6 +10818,15 @@ L: linux-serial@vger.kernel.org S: Maintained F: drivers/tty/serial/uartlite.c +XILINX VIDEO IP CORES +M: Hyun Kwon +M: Laurent Pinchart +L: linux-media@vger.kernel.org +T: git git://linuxtv.org/media_tree.git +S: Supported +F: Documentation/devicetree/bindings/media/xilinx/ +F: drivers/media/platform/xilinx/ + XILLYBUS DRIVER M: Eli Billauer L: linux-kernel@vger.kernel.org diff --git a/drivers/media/platform/Kconfig b/drivers/media/platform/Kconfig index 272dc8c40f57..421f53188c6c 100644 --- a/drivers/media/platform/Kconfig +++ b/drivers/media/platform/Kconfig @@ -118,6 +118,7 @@ source "drivers/media/platform/soc_camera/Kconfig" source "drivers/media/platform/exynos4-is/Kconfig" source "drivers/media/platform/s5p-tv/Kconfig" source "drivers/media/platform/am437x/Kconfig" +source "drivers/media/platform/xilinx/Kconfig" endif # V4L_PLATFORM_DRIVERS diff --git a/drivers/media/platform/Makefile b/drivers/media/platform/Makefile index 3ec154742083..8f855616c237 100644 --- a/drivers/media/platform/Makefile +++ b/drivers/media/platform/Makefile @@ -48,4 +48,6 @@ obj-y += omap/ obj-$(CONFIG_VIDEO_AM437X_VPFE) += am437x/ +obj-$(CONFIG_VIDEO_XILINX) += xilinx/ + ccflags-y += -I$(srctree)/drivers/media/i2c diff --git a/drivers/media/platform/xilinx/Kconfig b/drivers/media/platform/xilinx/Kconfig new file mode 100644 index 000000000000..f4347e9af252 --- /dev/null +++ b/drivers/media/platform/xilinx/Kconfig @@ -0,0 +1,10 @@ +config VIDEO_XILINX + tristate "Xilinx Video IP (EXPERIMENTAL)" + depends on VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API && OF + select VIDEOBUF2_DMA_CONTIG + ---help--- + Driver for Xilinx Video IP Pipelines + +if VIDEO_XILINX + +endif #VIDEO_XILINX diff --git a/drivers/media/platform/xilinx/Makefile b/drivers/media/platform/xilinx/Makefile new file mode 100644 index 000000000000..3ef9c8e3cc8d --- /dev/null +++ b/drivers/media/platform/xilinx/Makefile @@ -0,0 +1,3 @@ +xilinx-video-objs += xilinx-dma.o xilinx-vip.o xilinx-vipp.o + +obj-$(CONFIG_VIDEO_XILINX) += xilinx-video.o diff --git a/drivers/media/platform/xilinx/xilinx-dma.c b/drivers/media/platform/xilinx/xilinx-dma.c new file mode 100644 index 000000000000..10209c294168 --- /dev/null +++ b/drivers/media/platform/xilinx/xilinx-dma.c @@ -0,0 +1,766 @@ +/* + * Xilinx Video DMA + * + * Copyright (C) 2013-2015 Ideas on Board + * Copyright (C) 2013-2015 Xilinx, Inc. + * + * Contacts: Hyun Kwon + * Laurent Pinchart + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include + +#include "xilinx-dma.h" +#include "xilinx-vip.h" +#include "xilinx-vipp.h" + +#define XVIP_DMA_DEF_FORMAT V4L2_PIX_FMT_YUYV +#define XVIP_DMA_DEF_WIDTH 1920 +#define XVIP_DMA_DEF_HEIGHT 1080 + +/* Minimum and maximum widths are expressed in bytes */ +#define XVIP_DMA_MIN_WIDTH 1U +#define XVIP_DMA_MAX_WIDTH 65535U +#define XVIP_DMA_MIN_HEIGHT 1U +#define XVIP_DMA_MAX_HEIGHT 8191U + +/* ----------------------------------------------------------------------------- + * Helper functions + */ + +static struct v4l2_subdev * +xvip_dma_remote_subdev(struct media_pad *local, u32 *pad) +{ + struct media_pad *remote; + + remote = media_entity_remote_pad(local); + if (remote == NULL || + media_entity_type(remote->entity) != MEDIA_ENT_T_V4L2_SUBDEV) + return NULL; + + if (pad) + *pad = remote->index; + + return media_entity_to_v4l2_subdev(remote->entity); +} + +static int xvip_dma_verify_format(struct xvip_dma *dma) +{ + struct v4l2_subdev_format fmt; + struct v4l2_subdev *subdev; + int ret; + + subdev = xvip_dma_remote_subdev(&dma->pad, &fmt.pad); + if (subdev == NULL) + return -EPIPE; + + fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE; + ret = v4l2_subdev_call(subdev, pad, get_fmt, NULL, &fmt); + if (ret < 0) + return ret == -ENOIOCTLCMD ? -EINVAL : ret; + + if (dma->fmtinfo->code != fmt.format.code || + dma->format.height != fmt.format.height || + dma->format.width != fmt.format.width || + dma->format.colorspace != fmt.format.colorspace) + return -EINVAL; + + return 0; +} + +/* ----------------------------------------------------------------------------- + * Pipeline Stream Management + */ + +/** + * xvip_pipeline_start_stop - Start ot stop streaming on a pipeline + * @pipe: The pipeline + * @start: Start (when true) or stop (when false) the pipeline + * + * Walk the entities chain starting at the pipeline output video node and start + * or stop all of them. + * + * Return: 0 if successful, or the return value of the failed video::s_stream + * operation otherwise. + */ +static int xvip_pipeline_start_stop(struct xvip_pipeline *pipe, bool start) +{ + struct xvip_dma *dma = pipe->output; + struct media_entity *entity; + struct media_pad *pad; + struct v4l2_subdev *subdev; + int ret; + + entity = &dma->video.entity; + while (1) { + pad = &entity->pads[0]; + if (!(pad->flags & MEDIA_PAD_FL_SINK)) + break; + + pad = media_entity_remote_pad(pad); + if (pad == NULL || + media_entity_type(pad->entity) != MEDIA_ENT_T_V4L2_SUBDEV) + break; + + entity = pad->entity; + subdev = media_entity_to_v4l2_subdev(entity); + + ret = v4l2_subdev_call(subdev, video, s_stream, start); + if (start && ret < 0 && ret != -ENOIOCTLCMD) + return ret; + } + + return 0; +} + +/** + * xvip_pipeline_set_stream - Enable/disable streaming on a pipeline + * @pipe: The pipeline + * @on: Turn the stream on when true or off when false + * + * The pipeline is shared between all DMA engines connect at its input and + * output. While the stream state of DMA engines can be controlled + * independently, pipelines have a shared stream state that enable or disable + * all entities in the pipeline. For this reason the pipeline uses a streaming + * counter that tracks the number of DMA engines that have requested the stream + * to be enabled. + * + * When called with the @on argument set to true, this function will increment + * the pipeline streaming count. If the streaming count reaches the number of + * DMA engines in the pipeline it will enable all entities that belong to the + * pipeline. + * + * Similarly, when called with the @on argument set to false, this function will + * decrement the pipeline streaming count and disable all entities in the + * pipeline when the streaming count reaches zero. + * + * Return: 0 if successful, or the return value of the failed video::s_stream + * operation otherwise. Stopping the pipeline never fails. The pipeline state is + * not updated when the operation fails. + */ +static int xvip_pipeline_set_stream(struct xvip_pipeline *pipe, bool on) +{ + int ret = 0; + + mutex_lock(&pipe->lock); + + if (on) { + if (pipe->stream_count == pipe->num_dmas - 1) { + ret = xvip_pipeline_start_stop(pipe, true); + if (ret < 0) + goto done; + } + pipe->stream_count++; + } else { + if (--pipe->stream_count == 0) + xvip_pipeline_start_stop(pipe, false); + } + +done: + mutex_unlock(&pipe->lock); + return ret; +} + +static int xvip_pipeline_validate(struct xvip_pipeline *pipe, + struct xvip_dma *start) +{ + struct media_entity_graph graph; + struct media_entity *entity = &start->video.entity; + struct media_device *mdev = entity->parent; + unsigned int num_inputs = 0; + unsigned int num_outputs = 0; + + mutex_lock(&mdev->graph_mutex); + + /* Walk the graph to locate the video nodes. */ + media_entity_graph_walk_start(&graph, entity); + + while ((entity = media_entity_graph_walk_next(&graph))) { + struct xvip_dma *dma; + + if (entity->type != MEDIA_ENT_T_DEVNODE_V4L) + continue; + + dma = to_xvip_dma(media_entity_to_video_device(entity)); + + if (dma->pad.flags & MEDIA_PAD_FL_SINK) { + pipe->output = dma; + num_outputs++; + } else { + num_inputs++; + } + } + + mutex_unlock(&mdev->graph_mutex); + + /* We need exactly one output and zero or one input. */ + if (num_outputs != 1 || num_inputs > 1) + return -EPIPE; + + pipe->num_dmas = num_inputs + num_outputs; + + return 0; +} + +static void __xvip_pipeline_cleanup(struct xvip_pipeline *pipe) +{ + pipe->num_dmas = 0; + pipe->output = NULL; +} + +/** + * xvip_pipeline_cleanup - Cleanup the pipeline after streaming + * @pipe: the pipeline + * + * Decrease the pipeline use count and clean it up if we were the last user. + */ +static void xvip_pipeline_cleanup(struct xvip_pipeline *pipe) +{ + mutex_lock(&pipe->lock); + + /* If we're the last user clean up the pipeline. */ + if (--pipe->use_count == 0) + __xvip_pipeline_cleanup(pipe); + + mutex_unlock(&pipe->lock); +} + +/** + * xvip_pipeline_prepare - Prepare the pipeline for streaming + * @pipe: the pipeline + * @dma: DMA engine at one end of the pipeline + * + * Validate the pipeline if no user exists yet, otherwise just increase the use + * count. + * + * Return: 0 if successful or -EPIPE if the pipeline is not valid. + */ +static int xvip_pipeline_prepare(struct xvip_pipeline *pipe, + struct xvip_dma *dma) +{ + int ret; + + mutex_lock(&pipe->lock); + + /* If we're the first user validate and initialize the pipeline. */ + if (pipe->use_count == 0) { + ret = xvip_pipeline_validate(pipe, dma); + if (ret < 0) { + __xvip_pipeline_cleanup(pipe); + goto done; + } + } + + pipe->use_count++; + ret = 0; + +done: + mutex_unlock(&pipe->lock); + return ret; +} + +/* ----------------------------------------------------------------------------- + * videobuf2 queue operations + */ + +/** + * struct xvip_dma_buffer - Video DMA buffer + * @buf: vb2 buffer base object + * @queue: buffer list entry in the DMA engine queued buffers list + * @dma: DMA channel that uses the buffer + */ +struct xvip_dma_buffer { + struct vb2_buffer buf; + struct list_head queue; + struct xvip_dma *dma; +}; + +#define to_xvip_dma_buffer(vb) container_of(vb, struct xvip_dma_buffer, buf) + +static void xvip_dma_complete(void *param) +{ + struct xvip_dma_buffer *buf = param; + struct xvip_dma *dma = buf->dma; + + spin_lock(&dma->queued_lock); + list_del(&buf->queue); + spin_unlock(&dma->queued_lock); + + buf->buf.v4l2_buf.field = V4L2_FIELD_NONE; + buf->buf.v4l2_buf.sequence = dma->sequence++; + v4l2_get_timestamp(&buf->buf.v4l2_buf.timestamp); + vb2_set_plane_payload(&buf->buf, 0, dma->format.sizeimage); + vb2_buffer_done(&buf->buf, VB2_BUF_STATE_DONE); +} + +static int +xvip_dma_queue_setup(struct vb2_queue *vq, const struct v4l2_format *fmt, + unsigned int *nbuffers, unsigned int *nplanes, + unsigned int sizes[], void *alloc_ctxs[]) +{ + struct xvip_dma *dma = vb2_get_drv_priv(vq); + + /* Make sure the image size is large enough. */ + if (fmt && fmt->fmt.pix.sizeimage < dma->format.sizeimage) + return -EINVAL; + + *nplanes = 1; + + sizes[0] = fmt ? fmt->fmt.pix.sizeimage : dma->format.sizeimage; + alloc_ctxs[0] = dma->alloc_ctx; + + return 0; +} + +static int xvip_dma_buffer_prepare(struct vb2_buffer *vb) +{ + struct xvip_dma *dma = vb2_get_drv_priv(vb->vb2_queue); + struct xvip_dma_buffer *buf = to_xvip_dma_buffer(vb); + + buf->dma = dma; + + return 0; +} + +static void xvip_dma_buffer_queue(struct vb2_buffer *vb) +{ + struct xvip_dma *dma = vb2_get_drv_priv(vb->vb2_queue); + struct xvip_dma_buffer *buf = to_xvip_dma_buffer(vb); + struct dma_async_tx_descriptor *desc; + dma_addr_t addr = vb2_dma_contig_plane_dma_addr(vb, 0); + u32 flags; + + if (dma->queue.type == V4L2_BUF_TYPE_VIDEO_CAPTURE) { + flags = DMA_PREP_INTERRUPT | DMA_CTRL_ACK; + dma->xt.dir = DMA_DEV_TO_MEM; + dma->xt.src_sgl = false; + dma->xt.dst_sgl = true; + dma->xt.dst_start = addr; + } else { + flags = DMA_PREP_INTERRUPT | DMA_CTRL_ACK; + dma->xt.dir = DMA_MEM_TO_DEV; + dma->xt.src_sgl = true; + dma->xt.dst_sgl = false; + dma->xt.src_start = addr; + } + + dma->xt.frame_size = 1; + dma->sgl[0].size = dma->format.width * dma->fmtinfo->bpp; + dma->sgl[0].icg = dma->format.bytesperline - dma->sgl[0].size; + dma->xt.numf = dma->format.height; + + desc = dmaengine_prep_interleaved_dma(dma->dma, &dma->xt, flags); + if (!desc) { + dev_err(dma->xdev->dev, "Failed to prepare DMA transfer\n"); + vb2_buffer_done(&buf->buf, VB2_BUF_STATE_ERROR); + return; + } + desc->callback = xvip_dma_complete; + desc->callback_param = buf; + + spin_lock_irq(&dma->queued_lock); + list_add_tail(&buf->queue, &dma->queued_bufs); + spin_unlock_irq(&dma->queued_lock); + + dmaengine_submit(desc); + + if (vb2_is_streaming(&dma->queue)) + dma_async_issue_pending(dma->dma); +} + +static int xvip_dma_start_streaming(struct vb2_queue *vq, unsigned int count) +{ + struct xvip_dma *dma = vb2_get_drv_priv(vq); + struct xvip_dma_buffer *buf, *nbuf; + struct xvip_pipeline *pipe; + int ret; + + dma->sequence = 0; + + /* + * Start streaming on the pipeline. No link touching an entity in the + * pipeline can be activated or deactivated once streaming is started. + * + * Use the pipeline object embedded in the first DMA object that starts + * streaming. + */ + pipe = dma->video.entity.pipe + ? to_xvip_pipeline(&dma->video.entity) : &dma->pipe; + + ret = media_entity_pipeline_start(&dma->video.entity, &pipe->pipe); + if (ret < 0) + goto error; + + /* Verify that the configured format matches the output of the + * connected subdev. + */ + ret = xvip_dma_verify_format(dma); + if (ret < 0) + goto error_stop; + + ret = xvip_pipeline_prepare(pipe, dma); + if (ret < 0) + goto error_stop; + + /* Start the DMA engine. This must be done before starting the blocks + * in the pipeline to avoid DMA synchronization issues. + */ + dma_async_issue_pending(dma->dma); + + /* Start the pipeline. */ + xvip_pipeline_set_stream(pipe, true); + + return 0; + +error_stop: + media_entity_pipeline_stop(&dma->video.entity); + +error: + /* Give back all queued buffers to videobuf2. */ + spin_lock_irq(&dma->queued_lock); + list_for_each_entry_safe(buf, nbuf, &dma->queued_bufs, queue) { + vb2_buffer_done(&buf->buf, VB2_BUF_STATE_QUEUED); + list_del(&buf->queue); + } + spin_unlock_irq(&dma->queued_lock); + + return ret; +} + +static void xvip_dma_stop_streaming(struct vb2_queue *vq) +{ + struct xvip_dma *dma = vb2_get_drv_priv(vq); + struct xvip_pipeline *pipe = to_xvip_pipeline(&dma->video.entity); + struct xvip_dma_buffer *buf, *nbuf; + + /* Stop the pipeline. */ + xvip_pipeline_set_stream(pipe, false); + + /* Stop and reset the DMA engine. */ + dmaengine_terminate_all(dma->dma); + + /* Cleanup the pipeline and mark it as being stopped. */ + xvip_pipeline_cleanup(pipe); + media_entity_pipeline_stop(&dma->video.entity); + + /* Give back all queued buffers to videobuf2. */ + spin_lock_irq(&dma->queued_lock); + list_for_each_entry_safe(buf, nbuf, &dma->queued_bufs, queue) { + vb2_buffer_done(&buf->buf, VB2_BUF_STATE_ERROR); + list_del(&buf->queue); + } + spin_unlock_irq(&dma->queued_lock); +} + +static struct vb2_ops xvip_dma_queue_qops = { + .queue_setup = xvip_dma_queue_setup, + .buf_prepare = xvip_dma_buffer_prepare, + .buf_queue = xvip_dma_buffer_queue, + .wait_prepare = vb2_ops_wait_prepare, + .wait_finish = vb2_ops_wait_finish, + .start_streaming = xvip_dma_start_streaming, + .stop_streaming = xvip_dma_stop_streaming, +}; + +/* ----------------------------------------------------------------------------- + * V4L2 ioctls + */ + +static int +xvip_dma_querycap(struct file *file, void *fh, struct v4l2_capability *cap) +{ + struct v4l2_fh *vfh = file->private_data; + struct xvip_dma *dma = to_xvip_dma(vfh->vdev); + + cap->capabilities = V4L2_CAP_DEVICE_CAPS | V4L2_CAP_STREAMING + | dma->xdev->v4l2_caps; + + if (dma->queue.type == V4L2_BUF_TYPE_VIDEO_CAPTURE) + cap->device_caps = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_STREAMING; + else + cap->device_caps = V4L2_CAP_VIDEO_OUTPUT | V4L2_CAP_STREAMING; + + strlcpy(cap->driver, "xilinx-vipp", sizeof(cap->driver)); + strlcpy(cap->card, dma->video.name, sizeof(cap->card)); + snprintf(cap->bus_info, sizeof(cap->bus_info), "platform:%s:%u", + dma->xdev->dev->of_node->name, dma->port); + + return 0; +} + +/* FIXME: without this callback function, some applications are not configured + * with correct formats, and it results in frames in wrong format. Whether this + * callback needs to be required is not clearly defined, so it should be + * clarified through the mailing list. + */ +static int +xvip_dma_enum_format(struct file *file, void *fh, struct v4l2_fmtdesc *f) +{ + struct v4l2_fh *vfh = file->private_data; + struct xvip_dma *dma = to_xvip_dma(vfh->vdev); + + if (f->index > 0) + return -EINVAL; + + f->pixelformat = dma->format.pixelformat; + strlcpy(f->description, dma->fmtinfo->description, + sizeof(f->description)); + + return 0; +} + +static int +xvip_dma_get_format(struct file *file, void *fh, struct v4l2_format *format) +{ + struct v4l2_fh *vfh = file->private_data; + struct xvip_dma *dma = to_xvip_dma(vfh->vdev); + + format->fmt.pix = dma->format; + + return 0; +} + +static void +__xvip_dma_try_format(struct xvip_dma *dma, struct v4l2_pix_format *pix, + const struct xvip_video_format **fmtinfo) +{ + const struct xvip_video_format *info; + unsigned int min_width; + unsigned int max_width; + unsigned int min_bpl; + unsigned int max_bpl; + unsigned int width; + unsigned int align; + unsigned int bpl; + + /* Retrieve format information and select the default format if the + * requested format isn't supported. + */ + info = xvip_get_format_by_fourcc(pix->pixelformat); + if (IS_ERR(info)) + info = xvip_get_format_by_fourcc(XVIP_DMA_DEF_FORMAT); + + pix->pixelformat = info->fourcc; + pix->field = V4L2_FIELD_NONE; + + /* The transfer alignment requirements are expressed in bytes. Compute + * the minimum and maximum values, clamp the requested width and convert + * it back to pixels. + */ + align = lcm(dma->align, info->bpp); + min_width = roundup(XVIP_DMA_MIN_WIDTH, align); + max_width = rounddown(XVIP_DMA_MAX_WIDTH, align); + width = rounddown(pix->width * info->bpp, align); + + pix->width = clamp(width, min_width, max_width) / info->bpp; + pix->height = clamp(pix->height, XVIP_DMA_MIN_HEIGHT, + XVIP_DMA_MAX_HEIGHT); + + /* Clamp the requested bytes per line value. If the maximum bytes per + * line value is zero, the module doesn't support user configurable line + * sizes. Override the requested value with the minimum in that case. + */ + min_bpl = pix->width * info->bpp; + max_bpl = rounddown(XVIP_DMA_MAX_WIDTH, dma->align); + bpl = rounddown(pix->bytesperline, dma->align); + + pix->bytesperline = clamp(bpl, min_bpl, max_bpl); + pix->sizeimage = pix->bytesperline * pix->height; + + if (fmtinfo) + *fmtinfo = info; +} + +static int +xvip_dma_try_format(struct file *file, void *fh, struct v4l2_format *format) +{ + struct v4l2_fh *vfh = file->private_data; + struct xvip_dma *dma = to_xvip_dma(vfh->vdev); + + __xvip_dma_try_format(dma, &format->fmt.pix, NULL); + return 0; +} + +static int +xvip_dma_set_format(struct file *file, void *fh, struct v4l2_format *format) +{ + struct v4l2_fh *vfh = file->private_data; + struct xvip_dma *dma = to_xvip_dma(vfh->vdev); + const struct xvip_video_format *info; + + __xvip_dma_try_format(dma, &format->fmt.pix, &info); + + if (vb2_is_busy(&dma->queue)) + return -EBUSY; + + dma->format = format->fmt.pix; + dma->fmtinfo = info; + + return 0; +} + +static const struct v4l2_ioctl_ops xvip_dma_ioctl_ops = { + .vidioc_querycap = xvip_dma_querycap, + .vidioc_enum_fmt_vid_cap = xvip_dma_enum_format, + .vidioc_g_fmt_vid_cap = xvip_dma_get_format, + .vidioc_g_fmt_vid_out = xvip_dma_get_format, + .vidioc_s_fmt_vid_cap = xvip_dma_set_format, + .vidioc_s_fmt_vid_out = xvip_dma_set_format, + .vidioc_try_fmt_vid_cap = xvip_dma_try_format, + .vidioc_try_fmt_vid_out = xvip_dma_try_format, + .vidioc_reqbufs = vb2_ioctl_reqbufs, + .vidioc_querybuf = vb2_ioctl_querybuf, + .vidioc_qbuf = vb2_ioctl_qbuf, + .vidioc_dqbuf = vb2_ioctl_dqbuf, + .vidioc_create_bufs = vb2_ioctl_create_bufs, + .vidioc_expbuf = vb2_ioctl_expbuf, + .vidioc_streamon = vb2_ioctl_streamon, + .vidioc_streamoff = vb2_ioctl_streamoff, +}; + +/* ----------------------------------------------------------------------------- + * V4L2 file operations + */ + +static const struct v4l2_file_operations xvip_dma_fops = { + .owner = THIS_MODULE, + .unlocked_ioctl = video_ioctl2, + .open = v4l2_fh_open, + .release = vb2_fop_release, + .poll = vb2_fop_poll, + .mmap = vb2_fop_mmap, +}; + +/* ----------------------------------------------------------------------------- + * Xilinx Video DMA Core + */ + +int xvip_dma_init(struct xvip_composite_device *xdev, struct xvip_dma *dma, + enum v4l2_buf_type type, unsigned int port) +{ + char name[14]; + int ret; + + dma->xdev = xdev; + dma->port = port; + mutex_init(&dma->lock); + mutex_init(&dma->pipe.lock); + INIT_LIST_HEAD(&dma->queued_bufs); + spin_lock_init(&dma->queued_lock); + + dma->fmtinfo = xvip_get_format_by_fourcc(XVIP_DMA_DEF_FORMAT); + dma->format.pixelformat = dma->fmtinfo->fourcc; + dma->format.colorspace = V4L2_COLORSPACE_SRGB; + dma->format.field = V4L2_FIELD_NONE; + dma->format.width = XVIP_DMA_DEF_WIDTH; + dma->format.height = XVIP_DMA_DEF_HEIGHT; + dma->format.bytesperline = dma->format.width * dma->fmtinfo->bpp; + dma->format.sizeimage = dma->format.bytesperline * dma->format.height; + + /* Initialize the media entity... */ + dma->pad.flags = type == V4L2_BUF_TYPE_VIDEO_CAPTURE + ? MEDIA_PAD_FL_SINK : MEDIA_PAD_FL_SOURCE; + + ret = media_entity_init(&dma->video.entity, 1, &dma->pad, 0); + if (ret < 0) + goto error; + + /* ... and the video node... */ + dma->video.fops = &xvip_dma_fops; + dma->video.v4l2_dev = &xdev->v4l2_dev; + dma->video.queue = &dma->queue; + snprintf(dma->video.name, sizeof(dma->video.name), "%s %s %u", + xdev->dev->of_node->name, + type == V4L2_BUF_TYPE_VIDEO_CAPTURE ? "output" : "input", + port); + dma->video.vfl_type = VFL_TYPE_GRABBER; + dma->video.vfl_dir = type == V4L2_BUF_TYPE_VIDEO_CAPTURE + ? VFL_DIR_RX : VFL_DIR_TX; + dma->video.release = video_device_release_empty; + dma->video.ioctl_ops = &xvip_dma_ioctl_ops; + dma->video.lock = &dma->lock; + + video_set_drvdata(&dma->video, dma); + + /* ... and the buffers queue... */ + dma->alloc_ctx = vb2_dma_contig_init_ctx(dma->xdev->dev); + if (IS_ERR(dma->alloc_ctx)) + goto error; + + /* Don't enable VB2_READ and VB2_WRITE, as using the read() and write() + * V4L2 APIs would be inefficient. Testing on the command line with a + * 'cat /dev/video?' thus won't be possible, but given that the driver + * anyway requires a test tool to setup the pipeline before any video + * stream can be started, requiring a specific V4L2 test tool as well + * instead of 'cat' isn't really a drawback. + */ + dma->queue.type = type; + dma->queue.io_modes = VB2_MMAP | VB2_USERPTR | VB2_DMABUF; + dma->queue.lock = &dma->lock; + dma->queue.drv_priv = dma; + dma->queue.buf_struct_size = sizeof(struct xvip_dma_buffer); + dma->queue.ops = &xvip_dma_queue_qops; + dma->queue.mem_ops = &vb2_dma_contig_memops; + dma->queue.timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC + | V4L2_BUF_FLAG_TSTAMP_SRC_EOF; + ret = vb2_queue_init(&dma->queue); + if (ret < 0) { + dev_err(dma->xdev->dev, "failed to initialize VB2 queue\n"); + goto error; + } + + /* ... and the DMA channel. */ + sprintf(name, "port%u", port); + dma->dma = dma_request_slave_channel(dma->xdev->dev, name); + if (dma->dma == NULL) { + dev_err(dma->xdev->dev, "no VDMA channel found\n"); + ret = -ENODEV; + goto error; + } + + dma->align = 1 << dma->dma->device->copy_align; + + ret = video_register_device(&dma->video, VFL_TYPE_GRABBER, -1); + if (ret < 0) { + dev_err(dma->xdev->dev, "failed to register video device\n"); + goto error; + } + + return 0; + +error: + xvip_dma_cleanup(dma); + return ret; +} + +void xvip_dma_cleanup(struct xvip_dma *dma) +{ + if (video_is_registered(&dma->video)) + video_unregister_device(&dma->video); + + if (dma->dma) + dma_release_channel(dma->dma); + + if (!IS_ERR_OR_NULL(dma->alloc_ctx)) + vb2_dma_contig_cleanup_ctx(dma->alloc_ctx); + + media_entity_cleanup(&dma->video.entity); + + mutex_destroy(&dma->lock); + mutex_destroy(&dma->pipe.lock); +} diff --git a/drivers/media/platform/xilinx/xilinx-dma.h b/drivers/media/platform/xilinx/xilinx-dma.h new file mode 100644 index 000000000000..a540111f8d3d --- /dev/null +++ b/drivers/media/platform/xilinx/xilinx-dma.h @@ -0,0 +1,109 @@ +/* + * Xilinx Video DMA + * + * Copyright (C) 2013-2015 Ideas on Board + * Copyright (C) 2013-2015 Xilinx, Inc. + * + * Contacts: Hyun Kwon + * Laurent Pinchart + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __XILINX_VIP_DMA_H__ +#define __XILINX_VIP_DMA_H__ + +#include +#include +#include +#include + +#include +#include +#include + +struct dma_chan; +struct xvip_composite_device; +struct xvip_video_format; + +/** + * struct xvip_pipeline - Xilinx Video IP pipeline structure + * @pipe: media pipeline + * @lock: protects the pipeline @stream_count + * @use_count: number of DMA engines using the pipeline + * @stream_count: number of DMA engines currently streaming + * @num_dmas: number of DMA engines in the pipeline + * @output: DMA engine at the output of the pipeline + */ +struct xvip_pipeline { + struct media_pipeline pipe; + + struct mutex lock; + unsigned int use_count; + unsigned int stream_count; + + unsigned int num_dmas; + struct xvip_dma *output; +}; + +static inline struct xvip_pipeline *to_xvip_pipeline(struct media_entity *e) +{ + return container_of(e->pipe, struct xvip_pipeline, pipe); +} + +/** + * struct xvip_dma - Video DMA channel + * @list: list entry in a composite device dmas list + * @video: V4L2 video device associated with the DMA channel + * @pad: media pad for the video device entity + * @xdev: composite device the DMA channel belongs to + * @pipe: pipeline belonging to the DMA channel + * @port: composite device DT node port number for the DMA channel + * @lock: protects the @format, @fmtinfo and @queue fields + * @format: active V4L2 pixel format + * @fmtinfo: format information corresponding to the active @format + * @queue: vb2 buffers queue + * @alloc_ctx: allocation context for the vb2 @queue + * @sequence: V4L2 buffers sequence number + * @queued_bufs: list of queued buffers + * @queued_lock: protects the buf_queued list + * @dma: DMA engine channel + * @align: transfer alignment required by the DMA channel (in bytes) + * @xt: dma interleaved template for dma configuration + * @sgl: data chunk structure for dma_interleaved_template + */ +struct xvip_dma { + struct list_head list; + struct video_device video; + struct media_pad pad; + + struct xvip_composite_device *xdev; + struct xvip_pipeline pipe; + unsigned int port; + + struct mutex lock; + struct v4l2_pix_format format; + const struct xvip_video_format *fmtinfo; + + struct vb2_queue queue; + void *alloc_ctx; + unsigned int sequence; + + struct list_head queued_bufs; + spinlock_t queued_lock; + + struct dma_chan *dma; + unsigned int align; + struct dma_interleaved_template xt; + struct data_chunk sgl[1]; +}; + +#define to_xvip_dma(vdev) container_of(vdev, struct xvip_dma, video) + +int xvip_dma_init(struct xvip_composite_device *xdev, struct xvip_dma *dma, + enum v4l2_buf_type type, unsigned int port); +void xvip_dma_cleanup(struct xvip_dma *dma); + +#endif /* __XILINX_VIP_DMA_H__ */ diff --git a/drivers/media/platform/xilinx/xilinx-vip.c b/drivers/media/platform/xilinx/xilinx-vip.c new file mode 100644 index 000000000000..311259129504 --- /dev/null +++ b/drivers/media/platform/xilinx/xilinx-vip.c @@ -0,0 +1,323 @@ +/* + * Xilinx Video IP Core + * + * Copyright (C) 2013-2015 Ideas on Board + * Copyright (C) 2013-2015 Xilinx, Inc. + * + * Contacts: Hyun Kwon + * Laurent Pinchart + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include +#include +#include +#include +#include + +#include + +#include "xilinx-vip.h" + +/* ----------------------------------------------------------------------------- + * Helper functions + */ + +static const struct xvip_video_format xvip_video_formats[] = { + { XVIP_VF_YUV_422, 8, NULL, MEDIA_BUS_FMT_UYVY8_1X16, + 2, V4L2_PIX_FMT_YUYV, "4:2:2, packed, YUYV" }, + { XVIP_VF_YUV_444, 8, NULL, MEDIA_BUS_FMT_VUY8_1X24, + 3, V4L2_PIX_FMT_YUV444, "4:4:4, packed, YUYV" }, + { XVIP_VF_RBG, 8, NULL, MEDIA_BUS_FMT_RBG888_1X24, + 3, 0, NULL }, + { XVIP_VF_MONO_SENSOR, 8, "mono", MEDIA_BUS_FMT_Y8_1X8, + 1, V4L2_PIX_FMT_GREY, "Greyscale 8-bit" }, + { XVIP_VF_MONO_SENSOR, 8, "rggb", MEDIA_BUS_FMT_SRGGB8_1X8, + 1, V4L2_PIX_FMT_SGRBG8, "Bayer 8-bit RGGB" }, + { XVIP_VF_MONO_SENSOR, 8, "grbg", MEDIA_BUS_FMT_SGRBG8_1X8, + 1, V4L2_PIX_FMT_SGRBG8, "Bayer 8-bit GRBG" }, + { XVIP_VF_MONO_SENSOR, 8, "gbrg", MEDIA_BUS_FMT_SGBRG8_1X8, + 1, V4L2_PIX_FMT_SGBRG8, "Bayer 8-bit GBRG" }, + { XVIP_VF_MONO_SENSOR, 8, "bggr", MEDIA_BUS_FMT_SBGGR8_1X8, + 1, V4L2_PIX_FMT_SBGGR8, "Bayer 8-bit BGGR" }, +}; + +/** + * xvip_get_format_by_code - Retrieve format information for a media bus code + * @code: the format media bus code + * + * Return: a pointer to the format information structure corresponding to the + * given V4L2 media bus format @code, or ERR_PTR if no corresponding format can + * be found. + */ +const struct xvip_video_format *xvip_get_format_by_code(unsigned int code) +{ + unsigned int i; + + for (i = 0; i < ARRAY_SIZE(xvip_video_formats); ++i) { + const struct xvip_video_format *format = &xvip_video_formats[i]; + + if (format->code == code) + return format; + } + + return ERR_PTR(-EINVAL); +} +EXPORT_SYMBOL_GPL(xvip_get_format_by_code); + +/** + * xvip_get_format_by_fourcc - Retrieve format information for a 4CC + * @fourcc: the format 4CC + * + * Return: a pointer to the format information structure corresponding to the + * given V4L2 format @fourcc, or ERR_PTR if no corresponding format can be + * found. + */ +const struct xvip_video_format *xvip_get_format_by_fourcc(u32 fourcc) +{ + unsigned int i; + + for (i = 0; i < ARRAY_SIZE(xvip_video_formats); ++i) { + const struct xvip_video_format *format = &xvip_video_formats[i]; + + if (format->fourcc == fourcc) + return format; + } + + return ERR_PTR(-EINVAL); +} +EXPORT_SYMBOL_GPL(xvip_get_format_by_fourcc); + +/** + * xvip_of_get_format - Parse a device tree node and return format information + * @node: the device tree node + * + * Read the xlnx,video-format, xlnx,video-width and xlnx,cfa-pattern properties + * from the device tree @node passed as an argument and return the corresponding + * format information. + * + * Return: a pointer to the format information structure corresponding to the + * format name and width, or ERR_PTR if no corresponding format can be found. + */ +const struct xvip_video_format *xvip_of_get_format(struct device_node *node) +{ + const char *pattern = "mono"; + unsigned int vf_code; + unsigned int i; + u32 width; + int ret; + + ret = of_property_read_u32(node, "xlnx,video-format", &vf_code); + if (ret < 0) + return ERR_PTR(ret); + + ret = of_property_read_u32(node, "xlnx,video-width", &width); + if (ret < 0) + return ERR_PTR(ret); + + if (vf_code == XVIP_VF_MONO_SENSOR) + of_property_read_string(node, "xlnx,cfa-pattern", &pattern); + + for (i = 0; i < ARRAY_SIZE(xvip_video_formats); ++i) { + const struct xvip_video_format *format = &xvip_video_formats[i]; + + if (format->vf_code != vf_code || format->width != width) + continue; + + if (vf_code == XVIP_VF_MONO_SENSOR && + strcmp(pattern, format->pattern)) + continue; + + return format; + } + + return ERR_PTR(-EINVAL); +} +EXPORT_SYMBOL_GPL(xvip_of_get_format); + +/** + * xvip_set_format_size - Set the media bus frame format size + * @format: V4L2 frame format on media bus + * @fmt: media bus format + * + * Set the media bus frame format size. The width / height from the subdevice + * format are set to the given media bus format. The new format size is stored + * in @format. The width and height are clamped using default min / max values. + */ +void xvip_set_format_size(struct v4l2_mbus_framefmt *format, + const struct v4l2_subdev_format *fmt) +{ + format->width = clamp_t(unsigned int, fmt->format.width, + XVIP_MIN_WIDTH, XVIP_MAX_WIDTH); + format->height = clamp_t(unsigned int, fmt->format.height, + XVIP_MIN_HEIGHT, XVIP_MAX_HEIGHT); +} +EXPORT_SYMBOL_GPL(xvip_set_format_size); + +/** + * xvip_clr_or_set - Clear or set the register with a bitmask + * @xvip: Xilinx Video IP device + * @addr: address of register + * @mask: bitmask to be set or cleared + * @set: boolean flag indicating whether to set or clear + * + * Clear or set the register at address @addr with a bitmask @mask depending on + * the boolean flag @set. When the flag @set is true, the bitmask is set in + * the register, otherwise the bitmask is cleared from the register + * when the flag @set is false. + * + * Fox eample, this function can be used to set a control with a boolean value + * requested by users. If the caller knows whether to set or clear in the first + * place, the caller should call xvip_clr() or xvip_set() directly instead of + * using this function. + */ +void xvip_clr_or_set(struct xvip_device *xvip, u32 addr, u32 mask, bool set) +{ + u32 reg; + + reg = xvip_read(xvip, addr); + reg = set ? reg | mask : reg & ~mask; + xvip_write(xvip, addr, reg); +} +EXPORT_SYMBOL_GPL(xvip_clr_or_set); + +/** + * xvip_clr_and_set - Clear and set the register with a bitmask + * @xvip: Xilinx Video IP device + * @addr: address of register + * @clr: bitmask to be cleared + * @set: bitmask to be set + * + * Clear a bit(s) of mask @clr in the register at address @addr, then set + * a bit(s) of mask @set in the register after. + */ +void xvip_clr_and_set(struct xvip_device *xvip, u32 addr, u32 clr, u32 set) +{ + u32 reg; + + reg = xvip_read(xvip, addr); + reg &= ~clr; + reg |= set; + xvip_write(xvip, addr, reg); +} +EXPORT_SYMBOL_GPL(xvip_clr_and_set); + +int xvip_init_resources(struct xvip_device *xvip) +{ + struct platform_device *pdev = to_platform_device(xvip->dev); + struct resource *res; + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + xvip->iomem = devm_ioremap_resource(xvip->dev, res); + if (IS_ERR(xvip->iomem)) + return PTR_ERR(xvip->iomem); + + xvip->clk = devm_clk_get(xvip->dev, NULL); + if (IS_ERR(xvip->clk)) + return PTR_ERR(xvip->clk); + + clk_prepare_enable(xvip->clk); + return 0; +} +EXPORT_SYMBOL_GPL(xvip_init_resources); + +void xvip_cleanup_resources(struct xvip_device *xvip) +{ + clk_disable_unprepare(xvip->clk); +} +EXPORT_SYMBOL_GPL(xvip_cleanup_resources); + +/* ----------------------------------------------------------------------------- + * Subdev operations handlers + */ + +/** + * xvip_enum_mbus_code - Enumerate the media format code + * @subdev: V4L2 subdevice + * @cfg: V4L2 subdev pad configuration + * @code: returning media bus code + * + * Enumerate the media bus code of the subdevice. Return the corresponding + * pad format code. This function only works for subdevices with fixed format + * on all pads. Subdevices with multiple format should have their own + * function to enumerate mbus codes. + * + * Return: 0 if the media bus code is found, or -EINVAL if the format index + * is not valid. + */ +int xvip_enum_mbus_code(struct v4l2_subdev *subdev, + struct v4l2_subdev_pad_config *cfg, + struct v4l2_subdev_mbus_code_enum *code) +{ + struct v4l2_mbus_framefmt *format; + + /* Enumerating frame sizes based on the active configuration isn't + * supported yet. + */ + if (code->which == V4L2_SUBDEV_FORMAT_ACTIVE) + return -EINVAL; + + if (code->index) + return -EINVAL; + + format = v4l2_subdev_get_try_format(subdev, cfg, code->pad); + + code->code = format->code; + + return 0; +} +EXPORT_SYMBOL_GPL(xvip_enum_mbus_code); + +/** + * xvip_enum_frame_size - Enumerate the media bus frame size + * @subdev: V4L2 subdevice + * @cfg: V4L2 subdev pad configuration + * @fse: returning media bus frame size + * + * This function is a drop-in implementation of the subdev enum_frame_size pad + * operation. It assumes that the subdevice has one sink pad and one source + * pad, and that the format on the source pad is always identical to the + * format on the sink pad. Entities with different requirements need to + * implement their own enum_frame_size handlers. + * + * Return: 0 if the media bus frame size is found, or -EINVAL + * if the index or the code is not valid. + */ +int xvip_enum_frame_size(struct v4l2_subdev *subdev, + struct v4l2_subdev_pad_config *cfg, + struct v4l2_subdev_frame_size_enum *fse) +{ + struct v4l2_mbus_framefmt *format; + + /* Enumerating frame sizes based on the active configuration isn't + * supported yet. + */ + if (fse->which == V4L2_SUBDEV_FORMAT_ACTIVE) + return -EINVAL; + + format = v4l2_subdev_get_try_format(subdev, cfg, fse->pad); + + if (fse->index || fse->code != format->code) + return -EINVAL; + + if (fse->pad == XVIP_PAD_SINK) { + fse->min_width = XVIP_MIN_WIDTH; + fse->max_width = XVIP_MAX_WIDTH; + fse->min_height = XVIP_MIN_HEIGHT; + fse->max_height = XVIP_MAX_HEIGHT; + } else { + /* The size on the source pad is fixed and always identical to + * the size on the sink pad. + */ + fse->min_width = format->width; + fse->max_width = format->width; + fse->min_height = format->height; + fse->max_height = format->height; + } + + return 0; +} +EXPORT_SYMBOL_GPL(xvip_enum_frame_size); diff --git a/drivers/media/platform/xilinx/xilinx-vip.h b/drivers/media/platform/xilinx/xilinx-vip.h new file mode 100644 index 000000000000..42fee2026815 --- /dev/null +++ b/drivers/media/platform/xilinx/xilinx-vip.h @@ -0,0 +1,238 @@ +/* + * Xilinx Video IP Core + * + * Copyright (C) 2013-2015 Ideas on Board + * Copyright (C) 2013-2015 Xilinx, Inc. + * + * Contacts: Hyun Kwon + * Laurent Pinchart + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __XILINX_VIP_H__ +#define __XILINX_VIP_H__ + +#include +#include + +struct clk; + +/* + * Minimum and maximum width and height common to most video IP cores. IP + * cores with different requirements must define their own values. + */ +#define XVIP_MIN_WIDTH 32 +#define XVIP_MAX_WIDTH 7680 +#define XVIP_MIN_HEIGHT 32 +#define XVIP_MAX_HEIGHT 7680 + +/* + * Pad IDs. IP cores with with multiple inputs or outputs should define + * their own values. + */ +#define XVIP_PAD_SINK 0 +#define XVIP_PAD_SOURCE 1 + +/* Xilinx Video IP Control Registers */ +#define XVIP_CTRL_CONTROL 0x0000 +#define XVIP_CTRL_CONTROL_SW_ENABLE (1 << 0) +#define XVIP_CTRL_CONTROL_REG_UPDATE (1 << 1) +#define XVIP_CTRL_CONTROL_BYPASS (1 << 4) +#define XVIP_CTRL_CONTROL_TEST_PATTERN (1 << 5) +#define XVIP_CTRL_CONTROL_FRAME_SYNC_RESET (1 << 30) +#define XVIP_CTRL_CONTROL_SW_RESET (1 << 31) +#define XVIP_CTRL_STATUS 0x0004 +#define XVIP_CTRL_STATUS_PROC_STARTED (1 << 0) +#define XVIP_CTRL_STATUS_EOF (1 << 1) +#define XVIP_CTRL_ERROR 0x0008 +#define XVIP_CTRL_ERROR_SLAVE_EOL_EARLY (1 << 0) +#define XVIP_CTRL_ERROR_SLAVE_EOL_LATE (1 << 1) +#define XVIP_CTRL_ERROR_SLAVE_SOF_EARLY (1 << 2) +#define XVIP_CTRL_ERROR_SLAVE_SOF_LATE (1 << 3) +#define XVIP_CTRL_IRQ_ENABLE 0x000c +#define XVIP_CTRL_IRQ_ENABLE_PROC_STARTED (1 << 0) +#define XVIP_CTRL_IRQ_EOF (1 << 1) +#define XVIP_CTRL_VERSION 0x0010 +#define XVIP_CTRL_VERSION_MAJOR_MASK (0xff << 24) +#define XVIP_CTRL_VERSION_MAJOR_SHIFT 24 +#define XVIP_CTRL_VERSION_MINOR_MASK (0xff << 16) +#define XVIP_CTRL_VERSION_MINOR_SHIFT 16 +#define XVIP_CTRL_VERSION_REVISION_MASK (0xf << 12) +#define XVIP_CTRL_VERSION_REVISION_SHIFT 12 +#define XVIP_CTRL_VERSION_PATCH_MASK (0xf << 8) +#define XVIP_CTRL_VERSION_PATCH_SHIFT 8 +#define XVIP_CTRL_VERSION_INTERNAL_MASK (0xff << 0) +#define XVIP_CTRL_VERSION_INTERNAL_SHIFT 0 + +/* Xilinx Video IP Timing Registers */ +#define XVIP_ACTIVE_SIZE 0x0020 +#define XVIP_ACTIVE_VSIZE_MASK (0x7ff << 16) +#define XVIP_ACTIVE_VSIZE_SHIFT 16 +#define XVIP_ACTIVE_HSIZE_MASK (0x7ff << 0) +#define XVIP_ACTIVE_HSIZE_SHIFT 0 +#define XVIP_ENCODING 0x0028 +#define XVIP_ENCODING_NBITS_8 (0 << 4) +#define XVIP_ENCODING_NBITS_10 (1 << 4) +#define XVIP_ENCODING_NBITS_12 (2 << 4) +#define XVIP_ENCODING_NBITS_16 (3 << 4) +#define XVIP_ENCODING_NBITS_MASK (3 << 4) +#define XVIP_ENCODING_NBITS_SHIFT 4 +#define XVIP_ENCODING_VIDEO_FORMAT_YUV422 (0 << 0) +#define XVIP_ENCODING_VIDEO_FORMAT_YUV444 (1 << 0) +#define XVIP_ENCODING_VIDEO_FORMAT_RGB (2 << 0) +#define XVIP_ENCODING_VIDEO_FORMAT_YUV420 (3 << 0) +#define XVIP_ENCODING_VIDEO_FORMAT_MASK (3 << 0) +#define XVIP_ENCODING_VIDEO_FORMAT_SHIFT 0 + +/** + * struct xvip_device - Xilinx Video IP device structure + * @subdev: V4L2 subdevice + * @dev: (OF) device + * @iomem: device I/O register space remapped to kernel virtual memory + * @clk: video core clock + * @saved_ctrl: saved control register for resume / suspend + */ +struct xvip_device { + struct v4l2_subdev subdev; + struct device *dev; + void __iomem *iomem; + struct clk *clk; + u32 saved_ctrl; +}; + +/** + * struct xvip_video_format - Xilinx Video IP video format description + * @vf_code: AXI4 video format code + * @width: AXI4 format width in bits per component + * @pattern: CFA pattern for Mono/Sensor formats + * @code: media bus format code + * @bpp: bytes per pixel (when stored in memory) + * @fourcc: V4L2 pixel format FCC identifier + * @description: format description, suitable for userspace + */ +struct xvip_video_format { + unsigned int vf_code; + unsigned int width; + const char *pattern; + unsigned int code; + unsigned int bpp; + u32 fourcc; + const char *description; +}; + +const struct xvip_video_format *xvip_get_format_by_code(unsigned int code); +const struct xvip_video_format *xvip_get_format_by_fourcc(u32 fourcc); +const struct xvip_video_format *xvip_of_get_format(struct device_node *node); +void xvip_set_format_size(struct v4l2_mbus_framefmt *format, + const struct v4l2_subdev_format *fmt); +int xvip_enum_mbus_code(struct v4l2_subdev *subdev, + struct v4l2_subdev_pad_config *cfg, + struct v4l2_subdev_mbus_code_enum *code); +int xvip_enum_frame_size(struct v4l2_subdev *subdev, + struct v4l2_subdev_pad_config *cfg, + struct v4l2_subdev_frame_size_enum *fse); + +static inline u32 xvip_read(struct xvip_device *xvip, u32 addr) +{ + return ioread32(xvip->iomem + addr); +} + +static inline void xvip_write(struct xvip_device *xvip, u32 addr, u32 value) +{ + iowrite32(value, xvip->iomem + addr); +} + +static inline void xvip_clr(struct xvip_device *xvip, u32 addr, u32 clr) +{ + xvip_write(xvip, addr, xvip_read(xvip, addr) & ~clr); +} + +static inline void xvip_set(struct xvip_device *xvip, u32 addr, u32 set) +{ + xvip_write(xvip, addr, xvip_read(xvip, addr) | set); +} + +void xvip_clr_or_set(struct xvip_device *xvip, u32 addr, u32 mask, bool set); +void xvip_clr_and_set(struct xvip_device *xvip, u32 addr, u32 clr, u32 set); + +int xvip_init_resources(struct xvip_device *xvip); +void xvip_cleanup_resources(struct xvip_device *xvip); + +static inline void xvip_reset(struct xvip_device *xvip) +{ + xvip_write(xvip, XVIP_CTRL_CONTROL, XVIP_CTRL_CONTROL_SW_RESET); +} + +static inline void xvip_start(struct xvip_device *xvip) +{ + xvip_set(xvip, XVIP_CTRL_CONTROL, + XVIP_CTRL_CONTROL_SW_ENABLE | XVIP_CTRL_CONTROL_REG_UPDATE); +} + +static inline void xvip_stop(struct xvip_device *xvip) +{ + xvip_clr(xvip, XVIP_CTRL_CONTROL, XVIP_CTRL_CONTROL_SW_ENABLE); +} + +static inline void xvip_resume(struct xvip_device *xvip) +{ + xvip_write(xvip, XVIP_CTRL_CONTROL, + xvip->saved_ctrl | XVIP_CTRL_CONTROL_SW_ENABLE); +} + +static inline void xvip_suspend(struct xvip_device *xvip) +{ + xvip->saved_ctrl = xvip_read(xvip, XVIP_CTRL_CONTROL); + xvip_write(xvip, XVIP_CTRL_CONTROL, + xvip->saved_ctrl & ~XVIP_CTRL_CONTROL_SW_ENABLE); +} + +static inline void xvip_set_frame_size(struct xvip_device *xvip, + const struct v4l2_mbus_framefmt *format) +{ + xvip_write(xvip, XVIP_ACTIVE_SIZE, + (format->height << XVIP_ACTIVE_VSIZE_SHIFT) | + (format->width << XVIP_ACTIVE_HSIZE_SHIFT)); +} + +static inline void xvip_get_frame_size(struct xvip_device *xvip, + struct v4l2_mbus_framefmt *format) +{ + u32 reg; + + reg = xvip_read(xvip, XVIP_ACTIVE_SIZE); + format->width = (reg & XVIP_ACTIVE_HSIZE_MASK) >> + XVIP_ACTIVE_HSIZE_SHIFT; + format->height = (reg & XVIP_ACTIVE_VSIZE_MASK) >> + XVIP_ACTIVE_VSIZE_SHIFT; +} + +static inline void xvip_enable_reg_update(struct xvip_device *xvip) +{ + xvip_set(xvip, XVIP_CTRL_CONTROL, XVIP_CTRL_CONTROL_REG_UPDATE); +} + +static inline void xvip_disable_reg_update(struct xvip_device *xvip) +{ + xvip_clr(xvip, XVIP_CTRL_CONTROL, XVIP_CTRL_CONTROL_REG_UPDATE); +} + +static inline void xvip_print_version(struct xvip_device *xvip) +{ + u32 version; + + version = xvip_read(xvip, XVIP_CTRL_VERSION); + + dev_info(xvip->dev, "device found, version %u.%02x%x\n", + ((version & XVIP_CTRL_VERSION_MAJOR_MASK) >> + XVIP_CTRL_VERSION_MAJOR_SHIFT), + ((version & XVIP_CTRL_VERSION_MINOR_MASK) >> + XVIP_CTRL_VERSION_MINOR_SHIFT), + ((version & XVIP_CTRL_VERSION_REVISION_MASK) >> + XVIP_CTRL_VERSION_REVISION_SHIFT)); +} + +#endif /* __XILINX_VIP_H__ */ diff --git a/drivers/media/platform/xilinx/xilinx-vipp.c b/drivers/media/platform/xilinx/xilinx-vipp.c new file mode 100644 index 000000000000..7b7cb9c28d2c --- /dev/null +++ b/drivers/media/platform/xilinx/xilinx-vipp.c @@ -0,0 +1,669 @@ +/* + * Xilinx Video IP Composite Device + * + * Copyright (C) 2013-2015 Ideas on Board + * Copyright (C) 2013-2015 Xilinx, Inc. + * + * Contacts: Hyun Kwon + * Laurent Pinchart + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +#include "xilinx-dma.h" +#include "xilinx-vipp.h" + +#define XVIPP_DMA_S2MM 0 +#define XVIPP_DMA_MM2S 1 + +/** + * struct xvip_graph_entity - Entity in the video graph + * @list: list entry in a graph entities list + * @node: the entity's DT node + * @entity: media entity, from the corresponding V4L2 subdev + * @asd: subdev asynchronous registration information + * @subdev: V4L2 subdev + */ +struct xvip_graph_entity { + struct list_head list; + struct device_node *node; + struct media_entity *entity; + + struct v4l2_async_subdev asd; + struct v4l2_subdev *subdev; +}; + +/* ----------------------------------------------------------------------------- + * Graph Management + */ + +static struct xvip_graph_entity * +xvip_graph_find_entity(struct xvip_composite_device *xdev, + const struct device_node *node) +{ + struct xvip_graph_entity *entity; + + list_for_each_entry(entity, &xdev->entities, list) { + if (entity->node == node) + return entity; + } + + return NULL; +} + +static int xvip_graph_build_one(struct xvip_composite_device *xdev, + struct xvip_graph_entity *entity) +{ + u32 link_flags = MEDIA_LNK_FL_ENABLED; + struct media_entity *local = entity->entity; + struct media_entity *remote; + struct media_pad *local_pad; + struct media_pad *remote_pad; + struct xvip_graph_entity *ent; + struct v4l2_of_link link; + struct device_node *ep = NULL; + struct device_node *next; + int ret = 0; + + dev_dbg(xdev->dev, "creating links for entity %s\n", local->name); + + while (1) { + /* Get the next endpoint and parse its link. */ + next = of_graph_get_next_endpoint(entity->node, ep); + if (next == NULL) + break; + + of_node_put(ep); + ep = next; + + dev_dbg(xdev->dev, "processing endpoint %s\n", ep->full_name); + + ret = v4l2_of_parse_link(ep, &link); + if (ret < 0) { + dev_err(xdev->dev, "failed to parse link for %s\n", + ep->full_name); + continue; + } + + /* Skip sink ports, they will be processed from the other end of + * the link. + */ + if (link.local_port >= local->num_pads) { + dev_err(xdev->dev, "invalid port number %u on %s\n", + link.local_port, link.local_node->full_name); + v4l2_of_put_link(&link); + ret = -EINVAL; + break; + } + + local_pad = &local->pads[link.local_port]; + + if (local_pad->flags & MEDIA_PAD_FL_SINK) { + dev_dbg(xdev->dev, "skipping sink port %s:%u\n", + link.local_node->full_name, link.local_port); + v4l2_of_put_link(&link); + continue; + } + + /* Skip DMA engines, they will be processed separately. */ + if (link.remote_node == xdev->dev->of_node) { + dev_dbg(xdev->dev, "skipping DMA port %s:%u\n", + link.local_node->full_name, link.local_port); + v4l2_of_put_link(&link); + continue; + } + + /* Find the remote entity. */ + ent = xvip_graph_find_entity(xdev, link.remote_node); + if (ent == NULL) { + dev_err(xdev->dev, "no entity found for %s\n", + link.remote_node->full_name); + v4l2_of_put_link(&link); + ret = -ENODEV; + break; + } + + remote = ent->entity; + + if (link.remote_port >= remote->num_pads) { + dev_err(xdev->dev, "invalid port number %u on %s\n", + link.remote_port, link.remote_node->full_name); + v4l2_of_put_link(&link); + ret = -EINVAL; + break; + } + + remote_pad = &remote->pads[link.remote_port]; + + v4l2_of_put_link(&link); + + /* Create the media link. */ + dev_dbg(xdev->dev, "creating %s:%u -> %s:%u link\n", + local->name, local_pad->index, + remote->name, remote_pad->index); + + ret = media_entity_create_link(local, local_pad->index, + remote, remote_pad->index, + link_flags); + if (ret < 0) { + dev_err(xdev->dev, + "failed to create %s:%u -> %s:%u link\n", + local->name, local_pad->index, + remote->name, remote_pad->index); + break; + } + } + + of_node_put(ep); + return ret; +} + +static struct xvip_dma * +xvip_graph_find_dma(struct xvip_composite_device *xdev, unsigned int port) +{ + struct xvip_dma *dma; + + list_for_each_entry(dma, &xdev->dmas, list) { + if (dma->port == port) + return dma; + } + + return NULL; +} + +static int xvip_graph_build_dma(struct xvip_composite_device *xdev) +{ + u32 link_flags = MEDIA_LNK_FL_ENABLED; + struct device_node *node = xdev->dev->of_node; + struct media_entity *source; + struct media_entity *sink; + struct media_pad *source_pad; + struct media_pad *sink_pad; + struct xvip_graph_entity *ent; + struct v4l2_of_link link; + struct device_node *ep = NULL; + struct device_node *next; + struct xvip_dma *dma; + int ret = 0; + + dev_dbg(xdev->dev, "creating links for DMA engines\n"); + + while (1) { + /* Get the next endpoint and parse its link. */ + next = of_graph_get_next_endpoint(node, ep); + if (next == NULL) + break; + + of_node_put(ep); + ep = next; + + dev_dbg(xdev->dev, "processing endpoint %s\n", ep->full_name); + + ret = v4l2_of_parse_link(ep, &link); + if (ret < 0) { + dev_err(xdev->dev, "failed to parse link for %s\n", + ep->full_name); + continue; + } + + /* Find the DMA engine. */ + dma = xvip_graph_find_dma(xdev, link.local_port); + if (dma == NULL) { + dev_err(xdev->dev, "no DMA engine found for port %u\n", + link.local_port); + v4l2_of_put_link(&link); + ret = -EINVAL; + break; + } + + dev_dbg(xdev->dev, "creating link for DMA engine %s\n", + dma->video.name); + + /* Find the remote entity. */ + ent = xvip_graph_find_entity(xdev, link.remote_node); + if (ent == NULL) { + dev_err(xdev->dev, "no entity found for %s\n", + link.remote_node->full_name); + v4l2_of_put_link(&link); + ret = -ENODEV; + break; + } + + if (link.remote_port >= ent->entity->num_pads) { + dev_err(xdev->dev, "invalid port number %u on %s\n", + link.remote_port, link.remote_node->full_name); + v4l2_of_put_link(&link); + ret = -EINVAL; + break; + } + + if (dma->pad.flags & MEDIA_PAD_FL_SOURCE) { + source = &dma->video.entity; + source_pad = &dma->pad; + sink = ent->entity; + sink_pad = &sink->pads[link.remote_port]; + } else { + source = ent->entity; + source_pad = &source->pads[link.remote_port]; + sink = &dma->video.entity; + sink_pad = &dma->pad; + } + + v4l2_of_put_link(&link); + + /* Create the media link. */ + dev_dbg(xdev->dev, "creating %s:%u -> %s:%u link\n", + source->name, source_pad->index, + sink->name, sink_pad->index); + + ret = media_entity_create_link(source, source_pad->index, + sink, sink_pad->index, + link_flags); + if (ret < 0) { + dev_err(xdev->dev, + "failed to create %s:%u -> %s:%u link\n", + source->name, source_pad->index, + sink->name, sink_pad->index); + break; + } + } + + of_node_put(ep); + return ret; +} + +static int xvip_graph_notify_complete(struct v4l2_async_notifier *notifier) +{ + struct xvip_composite_device *xdev = + container_of(notifier, struct xvip_composite_device, notifier); + struct xvip_graph_entity *entity; + int ret; + + dev_dbg(xdev->dev, "notify complete, all subdevs registered\n"); + + /* Create links for every entity. */ + list_for_each_entry(entity, &xdev->entities, list) { + ret = xvip_graph_build_one(xdev, entity); + if (ret < 0) + return ret; + } + + /* Create links for DMA channels. */ + ret = xvip_graph_build_dma(xdev); + if (ret < 0) + return ret; + + ret = v4l2_device_register_subdev_nodes(&xdev->v4l2_dev); + if (ret < 0) + dev_err(xdev->dev, "failed to register subdev nodes\n"); + + return ret; +} + +static int xvip_graph_notify_bound(struct v4l2_async_notifier *notifier, + struct v4l2_subdev *subdev, + struct v4l2_async_subdev *asd) +{ + struct xvip_composite_device *xdev = + container_of(notifier, struct xvip_composite_device, notifier); + struct xvip_graph_entity *entity; + + /* Locate the entity corresponding to the bound subdev and store the + * subdev pointer. + */ + list_for_each_entry(entity, &xdev->entities, list) { + if (entity->node != subdev->dev->of_node) + continue; + + if (entity->subdev) { + dev_err(xdev->dev, "duplicate subdev for node %s\n", + entity->node->full_name); + return -EINVAL; + } + + dev_dbg(xdev->dev, "subdev %s bound\n", subdev->name); + entity->entity = &subdev->entity; + entity->subdev = subdev; + return 0; + } + + dev_err(xdev->dev, "no entity for subdev %s\n", subdev->name); + return -EINVAL; +} + +static int xvip_graph_parse_one(struct xvip_composite_device *xdev, + struct device_node *node) +{ + struct xvip_graph_entity *entity; + struct device_node *remote; + struct device_node *ep = NULL; + struct device_node *next; + int ret = 0; + + dev_dbg(xdev->dev, "parsing node %s\n", node->full_name); + + while (1) { + next = of_graph_get_next_endpoint(node, ep); + if (next == NULL) + break; + + of_node_put(ep); + ep = next; + + dev_dbg(xdev->dev, "handling endpoint %s\n", ep->full_name); + + remote = of_graph_get_remote_port_parent(ep); + if (remote == NULL) { + ret = -EINVAL; + break; + } + + /* Skip entities that we have already processed. */ + if (remote == xdev->dev->of_node || + xvip_graph_find_entity(xdev, remote)) { + of_node_put(remote); + continue; + } + + entity = devm_kzalloc(xdev->dev, sizeof(*entity), GFP_KERNEL); + if (entity == NULL) { + of_node_put(remote); + ret = -ENOMEM; + break; + } + + entity->node = remote; + entity->asd.match_type = V4L2_ASYNC_MATCH_OF; + entity->asd.match.of.node = remote; + list_add_tail(&entity->list, &xdev->entities); + xdev->num_subdevs++; + } + + of_node_put(ep); + return ret; +} + +static int xvip_graph_parse(struct xvip_composite_device *xdev) +{ + struct xvip_graph_entity *entity; + int ret; + + /* + * Walk the links to parse the full graph. Start by parsing the + * composite node and then parse entities in turn. The list_for_each + * loop will handle entities added at the end of the list while walking + * the links. + */ + ret = xvip_graph_parse_one(xdev, xdev->dev->of_node); + if (ret < 0) + return 0; + + list_for_each_entry(entity, &xdev->entities, list) { + ret = xvip_graph_parse_one(xdev, entity->node); + if (ret < 0) + break; + } + + return ret; +} + +static int xvip_graph_dma_init_one(struct xvip_composite_device *xdev, + struct device_node *node) +{ + struct xvip_dma *dma; + enum v4l2_buf_type type; + const char *direction; + unsigned int index; + int ret; + + ret = of_property_read_string(node, "direction", &direction); + if (ret < 0) + return ret; + + if (strcmp(direction, "input") == 0) + type = V4L2_BUF_TYPE_VIDEO_CAPTURE; + else if (strcmp(direction, "output") == 0) + type = V4L2_BUF_TYPE_VIDEO_OUTPUT; + else + return -EINVAL; + + of_property_read_u32(node, "reg", &index); + + dma = devm_kzalloc(xdev->dev, sizeof(*dma), GFP_KERNEL); + if (dma == NULL) + return -ENOMEM; + + ret = xvip_dma_init(xdev, dma, type, index); + if (ret < 0) { + dev_err(xdev->dev, "%s initialization failed\n", + node->full_name); + return ret; + } + + list_add_tail(&dma->list, &xdev->dmas); + + xdev->v4l2_caps |= type == V4L2_BUF_TYPE_VIDEO_CAPTURE + ? V4L2_CAP_VIDEO_CAPTURE : V4L2_CAP_VIDEO_OUTPUT; + + return 0; +} + +static int xvip_graph_dma_init(struct xvip_composite_device *xdev) +{ + struct device_node *ports; + struct device_node *port; + int ret; + + ports = of_get_child_by_name(xdev->dev->of_node, "ports"); + if (ports == NULL) { + dev_err(xdev->dev, "ports node not present\n"); + return -EINVAL; + } + + for_each_child_of_node(ports, port) { + ret = xvip_graph_dma_init_one(xdev, port); + if (ret < 0) + return ret; + } + + return 0; +} + +static void xvip_graph_cleanup(struct xvip_composite_device *xdev) +{ + struct xvip_graph_entity *entityp; + struct xvip_graph_entity *entity; + struct xvip_dma *dmap; + struct xvip_dma *dma; + + v4l2_async_notifier_unregister(&xdev->notifier); + + list_for_each_entry_safe(entity, entityp, &xdev->entities, list) { + of_node_put(entity->node); + list_del(&entity->list); + } + + list_for_each_entry_safe(dma, dmap, &xdev->dmas, list) { + xvip_dma_cleanup(dma); + list_del(&dma->list); + } +} + +static int xvip_graph_init(struct xvip_composite_device *xdev) +{ + struct xvip_graph_entity *entity; + struct v4l2_async_subdev **subdevs = NULL; + unsigned int num_subdevs; + unsigned int i; + int ret; + + /* Init the DMA channels. */ + ret = xvip_graph_dma_init(xdev); + if (ret < 0) { + dev_err(xdev->dev, "DMA initialization failed\n"); + goto done; + } + + /* Parse the graph to extract a list of subdevice DT nodes. */ + ret = xvip_graph_parse(xdev); + if (ret < 0) { + dev_err(xdev->dev, "graph parsing failed\n"); + goto done; + } + + if (!xdev->num_subdevs) { + dev_err(xdev->dev, "no subdev found in graph\n"); + goto done; + } + + /* Register the subdevices notifier. */ + num_subdevs = xdev->num_subdevs; + subdevs = devm_kzalloc(xdev->dev, sizeof(*subdevs) * num_subdevs, + GFP_KERNEL); + if (subdevs == NULL) { + ret = -ENOMEM; + goto done; + } + + i = 0; + list_for_each_entry(entity, &xdev->entities, list) + subdevs[i++] = &entity->asd; + + xdev->notifier.subdevs = subdevs; + xdev->notifier.num_subdevs = num_subdevs; + xdev->notifier.bound = xvip_graph_notify_bound; + xdev->notifier.complete = xvip_graph_notify_complete; + + ret = v4l2_async_notifier_register(&xdev->v4l2_dev, &xdev->notifier); + if (ret < 0) { + dev_err(xdev->dev, "notifier registration failed\n"); + goto done; + } + + ret = 0; + +done: + if (ret < 0) + xvip_graph_cleanup(xdev); + + return ret; +} + +/* ----------------------------------------------------------------------------- + * Media Controller and V4L2 + */ + +static void xvip_composite_v4l2_cleanup(struct xvip_composite_device *xdev) +{ + v4l2_device_unregister(&xdev->v4l2_dev); + media_device_unregister(&xdev->media_dev); +} + +static int xvip_composite_v4l2_init(struct xvip_composite_device *xdev) +{ + int ret; + + xdev->media_dev.dev = xdev->dev; + strlcpy(xdev->media_dev.model, "Xilinx Video Composite Device", + sizeof(xdev->media_dev.model)); + xdev->media_dev.hw_revision = 0; + + ret = media_device_register(&xdev->media_dev); + if (ret < 0) { + dev_err(xdev->dev, "media device registration failed (%d)\n", + ret); + return ret; + } + + xdev->v4l2_dev.mdev = &xdev->media_dev; + ret = v4l2_device_register(xdev->dev, &xdev->v4l2_dev); + if (ret < 0) { + dev_err(xdev->dev, "V4L2 device registration failed (%d)\n", + ret); + media_device_unregister(&xdev->media_dev); + return ret; + } + + return 0; +} + +/* ----------------------------------------------------------------------------- + * Platform Device Driver + */ + +static int xvip_composite_probe(struct platform_device *pdev) +{ + struct xvip_composite_device *xdev; + int ret; + + xdev = devm_kzalloc(&pdev->dev, sizeof(*xdev), GFP_KERNEL); + if (!xdev) + return -ENOMEM; + + xdev->dev = &pdev->dev; + INIT_LIST_HEAD(&xdev->entities); + INIT_LIST_HEAD(&xdev->dmas); + + ret = xvip_composite_v4l2_init(xdev); + if (ret < 0) + return ret; + + ret = xvip_graph_init(xdev); + if (ret < 0) + goto error; + + platform_set_drvdata(pdev, xdev); + + dev_info(xdev->dev, "device registered\n"); + + return 0; + +error: + xvip_composite_v4l2_cleanup(xdev); + return ret; +} + +static int xvip_composite_remove(struct platform_device *pdev) +{ + struct xvip_composite_device *xdev = platform_get_drvdata(pdev); + + xvip_graph_cleanup(xdev); + xvip_composite_v4l2_cleanup(xdev); + + return 0; +} + +static const struct of_device_id xvip_composite_of_id_table[] = { + { .compatible = "xlnx,video" }, + { } +}; +MODULE_DEVICE_TABLE(of, xvip_composite_of_id_table); + +static struct platform_driver xvip_composite_driver = { + .driver = { + .name = "xilinx-video", + .of_match_table = xvip_composite_of_id_table, + }, + .probe = xvip_composite_probe, + .remove = xvip_composite_remove, +}; + +module_platform_driver(xvip_composite_driver); + +MODULE_AUTHOR("Laurent Pinchart "); +MODULE_DESCRIPTION("Xilinx Video IP Composite Driver"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/media/platform/xilinx/xilinx-vipp.h b/drivers/media/platform/xilinx/xilinx-vipp.h new file mode 100644 index 000000000000..faf6b6e80b3b --- /dev/null +++ b/drivers/media/platform/xilinx/xilinx-vipp.h @@ -0,0 +1,49 @@ +/* + * Xilinx Video IP Composite Device + * + * Copyright (C) 2013-2015 Ideas on Board + * Copyright (C) 2013-2015 Xilinx, Inc. + * + * Contacts: Hyun Kwon + * Laurent Pinchart + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __XILINX_VIPP_H__ +#define __XILINX_VIPP_H__ + +#include +#include +#include +#include +#include +#include + +/** + * struct xvip_composite_device - Xilinx Video IP device structure + * @v4l2_dev: V4L2 device + * @media_dev: media device + * @dev: (OF) device + * @notifier: V4L2 asynchronous subdevs notifier + * @entities: entities in the graph as a list of xvip_graph_entity + * @num_subdevs: number of subdevs in the pipeline + * @dmas: list of DMA channels at the pipeline output and input + * @v4l2_caps: V4L2 capabilities of the whole device (see VIDIOC_QUERYCAP) + */ +struct xvip_composite_device { + struct v4l2_device v4l2_dev; + struct media_device media_dev; + struct device *dev; + + struct v4l2_async_notifier notifier; + struct list_head entities; + unsigned int num_subdevs; + + struct list_head dmas; + u32 v4l2_caps; +}; + +#endif /* __XILINX_VIPP_H__ */ diff --git a/include/dt-bindings/media/xilinx-vip.h b/include/dt-bindings/media/xilinx-vip.h new file mode 100644 index 000000000000..6298fec00685 --- /dev/null +++ b/include/dt-bindings/media/xilinx-vip.h @@ -0,0 +1,39 @@ +/* + * Xilinx Video IP Core + * + * Copyright (C) 2013-2015 Ideas on Board + * Copyright (C) 2013-2015 Xilinx, Inc. + * + * Contacts: Hyun Kwon + * Laurent Pinchart + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __DT_BINDINGS_MEDIA_XILINX_VIP_H__ +#define __DT_BINDINGS_MEDIA_XILINX_VIP_H__ + +/* + * Video format codes as defined in "AXI4-Stream Video IP and System Design + * Guide". + */ +#define XVIP_VF_YUV_422 0 +#define XVIP_VF_YUV_444 1 +#define XVIP_VF_RBG 2 +#define XVIP_VF_YUV_420 3 +#define XVIP_VF_YUVA_422 4 +#define XVIP_VF_YUVA_444 5 +#define XVIP_VF_RGBA 6 +#define XVIP_VF_YUVA_420 7 +#define XVIP_VF_YUVD_422 8 +#define XVIP_VF_YUVD_444 9 +#define XVIP_VF_RGBD 10 +#define XVIP_VF_YUVD_420 11 +#define XVIP_VF_MONO_SENSOR 12 +#define XVIP_VF_CUSTOM2 13 +#define XVIP_VF_CUSTOM3 14 +#define XVIP_VF_CUSTOM4 15 + +#endif /* __DT_BINDINGS_MEDIA_XILINX_VIP_H__ */ -- cgit v1.2.3 From a5562f65b1371a0988b707c10c44fcc2bba56990 Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Wed, 15 May 2013 11:36:56 -0300 Subject: [media] v4l: xilinx: Add Test Pattern Generator driver The TPG generates multiple static or dynamic test patterns. The driver currently hardcodes the pattern to the moving box pattern. Signed-off-by: Christian Kohn Signed-off-by: Hyun Kwon Signed-off-by: Laurent Pinchart Signed-off-by: Michal Simek Acked-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- .../bindings/media/xilinx/xlnx,v-tpg.txt | 71 ++ MAINTAINERS | 1 + drivers/media/platform/xilinx/Kconfig | 7 + drivers/media/platform/xilinx/Makefile | 1 + drivers/media/platform/xilinx/xilinx-tpg.c | 931 +++++++++++++++++++++ include/uapi/linux/Kbuild | 1 + include/uapi/linux/xilinx-v4l2-controls.h | 73 ++ 7 files changed, 1085 insertions(+) create mode 100644 Documentation/devicetree/bindings/media/xilinx/xlnx,v-tpg.txt create mode 100644 drivers/media/platform/xilinx/xilinx-tpg.c create mode 100644 include/uapi/linux/xilinx-v4l2-controls.h (limited to 'MAINTAINERS') diff --git a/Documentation/devicetree/bindings/media/xilinx/xlnx,v-tpg.txt b/Documentation/devicetree/bindings/media/xilinx/xlnx,v-tpg.txt new file mode 100644 index 000000000000..9dd86b3db937 --- /dev/null +++ b/Documentation/devicetree/bindings/media/xilinx/xlnx,v-tpg.txt @@ -0,0 +1,71 @@ +Xilinx Video Test Pattern Generator (TPG) +----------------------------------------- + +Required properties: + +- compatible: Must contain at least one of + + "xlnx,v-tpg-5.0" (TPG version 5.0) + "xlnx,v-tpg-6.0" (TPG version 6.0) + + TPG versions backward-compatible with previous versions should list all + compatible versions in the newer to older order. + +- reg: Physical base address and length of the registers set for the device. + +- clocks: Reference to the video core clock. + +- xlnx,video-format, xlnx,video-width: Video format and width, as defined in + video.txt. + +- port: Video port, using the DT bindings defined in ../video-interfaces.txt. + The TPG has a single output port numbered 0. + +Optional properties: + +- xlnx,vtc: A phandle referencing the Video Timing Controller that generates + video timings for the TPG test patterns. + +- timing-gpios: Specifier for a GPIO that controls the timing mux at the TPG + input. The GPIO active level corresponds to the selection of VTC-generated + video timings. + +The xlnx,vtc and timing-gpios properties are mandatory when the TPG is +synthesized with two ports and forbidden when synthesized with one port. + +Example: + + tpg_0: tpg@40050000 { + compatible = "xlnx,v-tpg-6.0", "xlnx,v-tpg-5.0"; + reg = <0x40050000 0x10000>; + clocks = <&clkc 15>; + + xlnx,vtc = <&vtc_3>; + timing-gpios = <&ps7_gpio_0 55 GPIO_ACTIVE_LOW>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + xlnx,video-format = ; + xlnx,video-width = <8>; + + tpg_in: endpoint { + remote-endpoint = <&adv7611_out>; + }; + }; + port@1 { + reg = <1>; + + xlnx,video-format = ; + xlnx,video-width = <8>; + + tpg1_out: endpoint { + remote-endpoint = <&switch_in0>; + }; + }: + }; + }; diff --git a/MAINTAINERS b/MAINTAINERS index ca3b2638fcc6..30e7e38ccad0 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -10826,6 +10826,7 @@ T: git git://linuxtv.org/media_tree.git S: Supported F: Documentation/devicetree/bindings/media/xilinx/ F: drivers/media/platform/xilinx/ +F: include/uapi/linux/xilinx-v4l2-controls.h XILLYBUS DRIVER M: Eli Billauer diff --git a/drivers/media/platform/xilinx/Kconfig b/drivers/media/platform/xilinx/Kconfig index 19db82343bb8..d7324c726fc2 100644 --- a/drivers/media/platform/xilinx/Kconfig +++ b/drivers/media/platform/xilinx/Kconfig @@ -7,6 +7,13 @@ config VIDEO_XILINX if VIDEO_XILINX +config VIDEO_XILINX_TPG + tristate "Xilinx Video Test Pattern Generator" + depends on VIDEO_XILINX + select VIDEO_XILINX_VTC + ---help--- + Driver for the Xilinx Video Test Pattern Generator + config VIDEO_XILINX_VTC tristate "Xilinx Video Timing Controller" depends on VIDEO_XILINX diff --git a/drivers/media/platform/xilinx/Makefile b/drivers/media/platform/xilinx/Makefile index 6611e3228e3c..e8a0f2a9f733 100644 --- a/drivers/media/platform/xilinx/Makefile +++ b/drivers/media/platform/xilinx/Makefile @@ -1,4 +1,5 @@ xilinx-video-objs += xilinx-dma.o xilinx-vip.o xilinx-vipp.o obj-$(CONFIG_VIDEO_XILINX) += xilinx-video.o +obj-$(CONFIG_VIDEO_XILINX_TPG) += xilinx-tpg.o obj-$(CONFIG_VIDEO_XILINX_VTC) += xilinx-vtc.o diff --git a/drivers/media/platform/xilinx/xilinx-tpg.c b/drivers/media/platform/xilinx/xilinx-tpg.c new file mode 100644 index 000000000000..b5f7d5ecb7f6 --- /dev/null +++ b/drivers/media/platform/xilinx/xilinx-tpg.c @@ -0,0 +1,931 @@ +/* + * Xilinx Test Pattern Generator + * + * Copyright (C) 2013-2015 Ideas on Board + * Copyright (C) 2013-2015 Xilinx, Inc. + * + * Contacts: Hyun Kwon + * Laurent Pinchart + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +#include "xilinx-vip.h" +#include "xilinx-vtc.h" + +#define XTPG_CTRL_STATUS_SLAVE_ERROR (1 << 16) +#define XTPG_CTRL_IRQ_SLAVE_ERROR (1 << 16) + +#define XTPG_PATTERN_CONTROL 0x0100 +#define XTPG_PATTERN_MASK (0xf << 0) +#define XTPG_PATTERN_CONTROL_CROSS_HAIRS (1 << 4) +#define XTPG_PATTERN_CONTROL_MOVING_BOX (1 << 5) +#define XTPG_PATTERN_CONTROL_COLOR_MASK_SHIFT 6 +#define XTPG_PATTERN_CONTROL_COLOR_MASK_MASK (0xf << 6) +#define XTPG_PATTERN_CONTROL_STUCK_PIXEL (1 << 9) +#define XTPG_PATTERN_CONTROL_NOISE (1 << 10) +#define XTPG_PATTERN_CONTROL_MOTION (1 << 12) +#define XTPG_MOTION_SPEED 0x0104 +#define XTPG_CROSS_HAIRS 0x0108 +#define XTPG_CROSS_HAIRS_ROW_SHIFT 0 +#define XTPG_CROSS_HAIRS_ROW_MASK (0xfff << 0) +#define XTPG_CROSS_HAIRS_COLUMN_SHIFT 16 +#define XTPG_CROSS_HAIRS_COLUMN_MASK (0xfff << 16) +#define XTPG_ZPLATE_HOR_CONTROL 0x010c +#define XTPG_ZPLATE_VER_CONTROL 0x0110 +#define XTPG_ZPLATE_START_SHIFT 0 +#define XTPG_ZPLATE_START_MASK (0xffff << 0) +#define XTPG_ZPLATE_SPEED_SHIFT 16 +#define XTPG_ZPLATE_SPEED_MASK (0xffff << 16) +#define XTPG_BOX_SIZE 0x0114 +#define XTPG_BOX_COLOR 0x0118 +#define XTPG_STUCK_PIXEL_THRESH 0x011c +#define XTPG_NOISE_GAIN 0x0120 +#define XTPG_BAYER_PHASE 0x0124 +#define XTPG_BAYER_PHASE_RGGB 0 +#define XTPG_BAYER_PHASE_GRBG 1 +#define XTPG_BAYER_PHASE_GBRG 2 +#define XTPG_BAYER_PHASE_BGGR 3 +#define XTPG_BAYER_PHASE_OFF 4 + +/* + * The minimum blanking value is one clock cycle for the front porch, one clock + * cycle for the sync pulse and one clock cycle for the back porch. + */ +#define XTPG_MIN_HBLANK 3 +#define XTPG_MAX_HBLANK (XVTC_MAX_HSIZE - XVIP_MIN_WIDTH) +#define XTPG_MIN_VBLANK 3 +#define XTPG_MAX_VBLANK (XVTC_MAX_VSIZE - XVIP_MIN_HEIGHT) + +/** + * struct xtpg_device - Xilinx Test Pattern Generator device structure + * @xvip: Xilinx Video IP device + * @pads: media pads + * @npads: number of pads (1 or 2) + * @has_input: whether an input is connected to the sink pad + * @formats: active V4L2 media bus format for each pad + * @default_format: default V4L2 media bus format + * @vip_format: format information corresponding to the active format + * @bayer: boolean flag if TPG is set to any bayer format + * @ctrl_handler: control handler + * @hblank: horizontal blanking control + * @vblank: vertical blanking control + * @pattern: test pattern control + * @streaming: is the video stream active + * @vtc: video timing controller + * @vtmux_gpio: video timing mux GPIO + */ +struct xtpg_device { + struct xvip_device xvip; + + struct media_pad pads[2]; + unsigned int npads; + bool has_input; + + struct v4l2_mbus_framefmt formats[2]; + struct v4l2_mbus_framefmt default_format; + const struct xvip_video_format *vip_format; + bool bayer; + + struct v4l2_ctrl_handler ctrl_handler; + struct v4l2_ctrl *hblank; + struct v4l2_ctrl *vblank; + struct v4l2_ctrl *pattern; + bool streaming; + + struct xvtc_device *vtc; + struct gpio_desc *vtmux_gpio; +}; + +static inline struct xtpg_device *to_tpg(struct v4l2_subdev *subdev) +{ + return container_of(subdev, struct xtpg_device, xvip.subdev); +} + +static u32 xtpg_get_bayer_phase(unsigned int code) +{ + switch (code) { + case MEDIA_BUS_FMT_SRGGB8_1X8: + return XTPG_BAYER_PHASE_RGGB; + case MEDIA_BUS_FMT_SGRBG8_1X8: + return XTPG_BAYER_PHASE_GRBG; + case MEDIA_BUS_FMT_SGBRG8_1X8: + return XTPG_BAYER_PHASE_GBRG; + case MEDIA_BUS_FMT_SBGGR8_1X8: + return XTPG_BAYER_PHASE_BGGR; + default: + return XTPG_BAYER_PHASE_OFF; + } +} + +static void __xtpg_update_pattern_control(struct xtpg_device *xtpg, + bool passthrough, bool pattern) +{ + u32 pattern_mask = (1 << (xtpg->pattern->maximum + 1)) - 1; + + /* + * If the TPG has no sink pad or no input connected to its sink pad + * passthrough mode can't be enabled. + */ + if (xtpg->npads == 1 || !xtpg->has_input) + passthrough = false; + + /* If passthrough mode is allowed unmask bit 0. */ + if (passthrough) + pattern_mask &= ~1; + + /* If test pattern mode is allowed unmask all other bits. */ + if (pattern) + pattern_mask &= 1; + + __v4l2_ctrl_modify_range(xtpg->pattern, 0, xtpg->pattern->maximum, + pattern_mask, pattern ? 9 : 0); +} + +static void xtpg_update_pattern_control(struct xtpg_device *xtpg, + bool passthrough, bool pattern) +{ + mutex_lock(xtpg->ctrl_handler.lock); + __xtpg_update_pattern_control(xtpg, passthrough, pattern); + mutex_unlock(xtpg->ctrl_handler.lock); +} + +/* ----------------------------------------------------------------------------- + * V4L2 Subdevice Video Operations + */ + +static int xtpg_s_stream(struct v4l2_subdev *subdev, int enable) +{ + struct xtpg_device *xtpg = to_tpg(subdev); + unsigned int width = xtpg->formats[0].width; + unsigned int height = xtpg->formats[0].height; + bool passthrough; + u32 bayer_phase; + + if (!enable) { + xvip_stop(&xtpg->xvip); + if (xtpg->vtc) + xvtc_generator_stop(xtpg->vtc); + + xtpg_update_pattern_control(xtpg, true, true); + xtpg->streaming = false; + return 0; + } + + xvip_set_frame_size(&xtpg->xvip, &xtpg->formats[0]); + + if (xtpg->vtc) { + struct xvtc_config config = { + .hblank_start = width, + .hsync_start = width + 1, + .vblank_start = height, + .vsync_start = height + 1, + }; + unsigned int htotal; + unsigned int vtotal; + + htotal = min_t(unsigned int, XVTC_MAX_HSIZE, + v4l2_ctrl_g_ctrl(xtpg->hblank) + width); + vtotal = min_t(unsigned int, XVTC_MAX_VSIZE, + v4l2_ctrl_g_ctrl(xtpg->vblank) + height); + + config.hsync_end = htotal - 1; + config.hsize = htotal; + config.vsync_end = vtotal - 1; + config.vsize = vtotal; + + xvtc_generator_start(xtpg->vtc, &config); + } + + /* + * Configure the bayer phase and video timing mux based on the + * operation mode (passthrough or test pattern generation). The test + * pattern can be modified by the control set handler, we thus need to + * take the control lock here to avoid races. + */ + mutex_lock(xtpg->ctrl_handler.lock); + + xvip_clr_and_set(&xtpg->xvip, XTPG_PATTERN_CONTROL, + XTPG_PATTERN_MASK, xtpg->pattern->cur.val); + + /* + * Switching between passthrough and test pattern generation modes isn't + * allowed during streaming, update the control range accordingly. + */ + passthrough = xtpg->pattern->cur.val == 0; + __xtpg_update_pattern_control(xtpg, passthrough, !passthrough); + + xtpg->streaming = true; + + mutex_unlock(xtpg->ctrl_handler.lock); + + /* + * For TPG v5.0, the bayer phase needs to be off for the pass through + * mode, otherwise the external input would be subsampled. + */ + bayer_phase = passthrough ? XTPG_BAYER_PHASE_OFF + : xtpg_get_bayer_phase(xtpg->formats[0].code); + xvip_write(&xtpg->xvip, XTPG_BAYER_PHASE, bayer_phase); + + if (xtpg->vtmux_gpio) + gpiod_set_value_cansleep(xtpg->vtmux_gpio, !passthrough); + + xvip_start(&xtpg->xvip); + + return 0; +} + +/* ----------------------------------------------------------------------------- + * V4L2 Subdevice Pad Operations + */ + +static struct v4l2_mbus_framefmt * +__xtpg_get_pad_format(struct xtpg_device *xtpg, + struct v4l2_subdev_pad_config *cfg, + unsigned int pad, u32 which) +{ + switch (which) { + case V4L2_SUBDEV_FORMAT_TRY: + return v4l2_subdev_get_try_format(&xtpg->xvip.subdev, cfg, pad); + case V4L2_SUBDEV_FORMAT_ACTIVE: + return &xtpg->formats[pad]; + default: + return NULL; + } +} + +static int xtpg_get_format(struct v4l2_subdev *subdev, + struct v4l2_subdev_pad_config *cfg, + struct v4l2_subdev_format *fmt) +{ + struct xtpg_device *xtpg = to_tpg(subdev); + + fmt->format = *__xtpg_get_pad_format(xtpg, cfg, fmt->pad, fmt->which); + + return 0; +} + +static int xtpg_set_format(struct v4l2_subdev *subdev, + struct v4l2_subdev_pad_config *cfg, + struct v4l2_subdev_format *fmt) +{ + struct xtpg_device *xtpg = to_tpg(subdev); + struct v4l2_mbus_framefmt *__format; + u32 bayer_phase; + + __format = __xtpg_get_pad_format(xtpg, cfg, fmt->pad, fmt->which); + + /* In two pads mode the source pad format is always identical to the + * sink pad format. + */ + if (xtpg->npads == 2 && fmt->pad == 1) { + fmt->format = *__format; + return 0; + } + + /* Bayer phase is configurable at runtime */ + if (xtpg->bayer) { + bayer_phase = xtpg_get_bayer_phase(fmt->format.code); + if (bayer_phase != XTPG_BAYER_PHASE_OFF) + __format->code = fmt->format.code; + } + + xvip_set_format_size(__format, fmt); + + fmt->format = *__format; + + /* Propagate the format to the source pad. */ + if (xtpg->npads == 2) { + __format = __xtpg_get_pad_format(xtpg, cfg, 1, fmt->which); + *__format = fmt->format; + } + + return 0; +} + +/* ----------------------------------------------------------------------------- + * V4L2 Subdevice Operations + */ + +static int xtpg_enum_frame_size(struct v4l2_subdev *subdev, + struct v4l2_subdev_pad_config *cfg, + struct v4l2_subdev_frame_size_enum *fse) +{ + struct v4l2_mbus_framefmt *format; + + format = v4l2_subdev_get_try_format(subdev, cfg, fse->pad); + + if (fse->index || fse->code != format->code) + return -EINVAL; + + /* Min / max values for pad 0 is always fixed in both one and two pads + * modes. In two pads mode, the source pad(= 1) size is identical to + * the sink pad size */ + if (fse->pad == 0) { + fse->min_width = XVIP_MIN_WIDTH; + fse->max_width = XVIP_MAX_WIDTH; + fse->min_height = XVIP_MIN_HEIGHT; + fse->max_height = XVIP_MAX_HEIGHT; + } else { + fse->min_width = format->width; + fse->max_width = format->width; + fse->min_height = format->height; + fse->max_height = format->height; + } + + return 0; +} + +static int xtpg_open(struct v4l2_subdev *subdev, struct v4l2_subdev_fh *fh) +{ + struct xtpg_device *xtpg = to_tpg(subdev); + struct v4l2_mbus_framefmt *format; + + format = v4l2_subdev_get_try_format(subdev, fh->pad, 0); + *format = xtpg->default_format; + + if (xtpg->npads == 2) { + format = v4l2_subdev_get_try_format(subdev, fh->pad, 1); + *format = xtpg->default_format; + } + + return 0; +} + +static int xtpg_close(struct v4l2_subdev *subdev, struct v4l2_subdev_fh *fh) +{ + return 0; +} + +static int xtpg_s_ctrl(struct v4l2_ctrl *ctrl) +{ + struct xtpg_device *xtpg = container_of(ctrl->handler, + struct xtpg_device, + ctrl_handler); + switch (ctrl->id) { + case V4L2_CID_TEST_PATTERN: + xvip_clr_and_set(&xtpg->xvip, XTPG_PATTERN_CONTROL, + XTPG_PATTERN_MASK, ctrl->val); + return 0; + case V4L2_CID_XILINX_TPG_CROSS_HAIRS: + xvip_clr_or_set(&xtpg->xvip, XTPG_PATTERN_CONTROL, + XTPG_PATTERN_CONTROL_CROSS_HAIRS, ctrl->val); + return 0; + case V4L2_CID_XILINX_TPG_MOVING_BOX: + xvip_clr_or_set(&xtpg->xvip, XTPG_PATTERN_CONTROL, + XTPG_PATTERN_CONTROL_MOVING_BOX, ctrl->val); + return 0; + case V4L2_CID_XILINX_TPG_COLOR_MASK: + xvip_clr_and_set(&xtpg->xvip, XTPG_PATTERN_CONTROL, + XTPG_PATTERN_CONTROL_COLOR_MASK_MASK, + ctrl->val << + XTPG_PATTERN_CONTROL_COLOR_MASK_SHIFT); + return 0; + case V4L2_CID_XILINX_TPG_STUCK_PIXEL: + xvip_clr_or_set(&xtpg->xvip, XTPG_PATTERN_CONTROL, + XTPG_PATTERN_CONTROL_STUCK_PIXEL, ctrl->val); + return 0; + case V4L2_CID_XILINX_TPG_NOISE: + xvip_clr_or_set(&xtpg->xvip, XTPG_PATTERN_CONTROL, + XTPG_PATTERN_CONTROL_NOISE, ctrl->val); + return 0; + case V4L2_CID_XILINX_TPG_MOTION: + xvip_clr_or_set(&xtpg->xvip, XTPG_PATTERN_CONTROL, + XTPG_PATTERN_CONTROL_MOTION, ctrl->val); + return 0; + case V4L2_CID_XILINX_TPG_MOTION_SPEED: + xvip_write(&xtpg->xvip, XTPG_MOTION_SPEED, ctrl->val); + return 0; + case V4L2_CID_XILINX_TPG_CROSS_HAIR_ROW: + xvip_clr_and_set(&xtpg->xvip, XTPG_CROSS_HAIRS, + XTPG_CROSS_HAIRS_ROW_MASK, + ctrl->val << XTPG_CROSS_HAIRS_ROW_SHIFT); + return 0; + case V4L2_CID_XILINX_TPG_CROSS_HAIR_COLUMN: + xvip_clr_and_set(&xtpg->xvip, XTPG_CROSS_HAIRS, + XTPG_CROSS_HAIRS_COLUMN_MASK, + ctrl->val << XTPG_CROSS_HAIRS_COLUMN_SHIFT); + return 0; + case V4L2_CID_XILINX_TPG_ZPLATE_HOR_START: + xvip_clr_and_set(&xtpg->xvip, XTPG_ZPLATE_HOR_CONTROL, + XTPG_ZPLATE_START_MASK, + ctrl->val << XTPG_ZPLATE_START_SHIFT); + return 0; + case V4L2_CID_XILINX_TPG_ZPLATE_HOR_SPEED: + xvip_clr_and_set(&xtpg->xvip, XTPG_ZPLATE_HOR_CONTROL, + XTPG_ZPLATE_SPEED_MASK, + ctrl->val << XTPG_ZPLATE_SPEED_SHIFT); + return 0; + case V4L2_CID_XILINX_TPG_ZPLATE_VER_START: + xvip_clr_and_set(&xtpg->xvip, XTPG_ZPLATE_VER_CONTROL, + XTPG_ZPLATE_START_MASK, + ctrl->val << XTPG_ZPLATE_START_SHIFT); + return 0; + case V4L2_CID_XILINX_TPG_ZPLATE_VER_SPEED: + xvip_clr_and_set(&xtpg->xvip, XTPG_ZPLATE_VER_CONTROL, + XTPG_ZPLATE_SPEED_MASK, + ctrl->val << XTPG_ZPLATE_SPEED_SHIFT); + return 0; + case V4L2_CID_XILINX_TPG_BOX_SIZE: + xvip_write(&xtpg->xvip, XTPG_BOX_SIZE, ctrl->val); + return 0; + case V4L2_CID_XILINX_TPG_BOX_COLOR: + xvip_write(&xtpg->xvip, XTPG_BOX_COLOR, ctrl->val); + return 0; + case V4L2_CID_XILINX_TPG_STUCK_PIXEL_THRESH: + xvip_write(&xtpg->xvip, XTPG_STUCK_PIXEL_THRESH, ctrl->val); + return 0; + case V4L2_CID_XILINX_TPG_NOISE_GAIN: + xvip_write(&xtpg->xvip, XTPG_NOISE_GAIN, ctrl->val); + return 0; + } + + return 0; +} + +static const struct v4l2_ctrl_ops xtpg_ctrl_ops = { + .s_ctrl = xtpg_s_ctrl, +}; + +static struct v4l2_subdev_core_ops xtpg_core_ops = { +}; + +static struct v4l2_subdev_video_ops xtpg_video_ops = { + .s_stream = xtpg_s_stream, +}; + +static struct v4l2_subdev_pad_ops xtpg_pad_ops = { + .enum_mbus_code = xvip_enum_mbus_code, + .enum_frame_size = xtpg_enum_frame_size, + .get_fmt = xtpg_get_format, + .set_fmt = xtpg_set_format, +}; + +static struct v4l2_subdev_ops xtpg_ops = { + .core = &xtpg_core_ops, + .video = &xtpg_video_ops, + .pad = &xtpg_pad_ops, +}; + +static const struct v4l2_subdev_internal_ops xtpg_internal_ops = { + .open = xtpg_open, + .close = xtpg_close, +}; + +/* + * Control Config + */ + +static const char *const xtpg_pattern_strings[] = { + "Passthrough", + "Horizontal Ramp", + "Vertical Ramp", + "Temporal Ramp", + "Solid Red", + "Solid Green", + "Solid Blue", + "Solid Black", + "Solid White", + "Color Bars", + "Zone Plate", + "Tartan Color Bars", + "Cross Hatch", + "None", + "Vertical/Horizontal Ramps", + "Black/White Checker Board", +}; + +static struct v4l2_ctrl_config xtpg_ctrls[] = { + { + .ops = &xtpg_ctrl_ops, + .id = V4L2_CID_XILINX_TPG_CROSS_HAIRS, + .name = "Test Pattern: Cross Hairs", + .type = V4L2_CTRL_TYPE_BOOLEAN, + .min = false, + .max = true, + .step = 1, + .def = 0, + }, { + .ops = &xtpg_ctrl_ops, + .id = V4L2_CID_XILINX_TPG_MOVING_BOX, + .name = "Test Pattern: Moving Box", + .type = V4L2_CTRL_TYPE_BOOLEAN, + .min = false, + .max = true, + .step = 1, + .def = 0, + }, { + .ops = &xtpg_ctrl_ops, + .id = V4L2_CID_XILINX_TPG_COLOR_MASK, + .name = "Test Pattern: Color Mask", + .type = V4L2_CTRL_TYPE_BITMASK, + .min = 0, + .max = 0xf, + .def = 0, + }, { + .ops = &xtpg_ctrl_ops, + .id = V4L2_CID_XILINX_TPG_STUCK_PIXEL, + .name = "Test Pattern: Stuck Pixel", + .type = V4L2_CTRL_TYPE_BOOLEAN, + .min = false, + .max = true, + .step = 1, + .def = 0, + }, { + .ops = &xtpg_ctrl_ops, + .id = V4L2_CID_XILINX_TPG_NOISE, + .name = "Test Pattern: Noise", + .type = V4L2_CTRL_TYPE_BOOLEAN, + .min = false, + .max = true, + .step = 1, + .def = 0, + }, { + .ops = &xtpg_ctrl_ops, + .id = V4L2_CID_XILINX_TPG_MOTION, + .name = "Test Pattern: Motion", + .type = V4L2_CTRL_TYPE_BOOLEAN, + .min = false, + .max = true, + .step = 1, + .def = 0, + }, { + .ops = &xtpg_ctrl_ops, + .id = V4L2_CID_XILINX_TPG_MOTION_SPEED, + .name = "Test Pattern: Motion Speed", + .type = V4L2_CTRL_TYPE_INTEGER, + .min = 0, + .max = (1 << 8) - 1, + .step = 1, + .def = 4, + .flags = V4L2_CTRL_FLAG_SLIDER, + }, { + .ops = &xtpg_ctrl_ops, + .id = V4L2_CID_XILINX_TPG_CROSS_HAIR_ROW, + .name = "Test Pattern: Cross Hairs Row", + .type = V4L2_CTRL_TYPE_INTEGER, + .min = 0, + .max = (1 << 12) - 1, + .step = 1, + .def = 0x64, + .flags = V4L2_CTRL_FLAG_SLIDER, + }, { + .ops = &xtpg_ctrl_ops, + .id = V4L2_CID_XILINX_TPG_CROSS_HAIR_COLUMN, + .name = "Test Pattern: Cross Hairs Column", + .type = V4L2_CTRL_TYPE_INTEGER, + .min = 0, + .max = (1 << 12) - 1, + .step = 1, + .def = 0x64, + .flags = V4L2_CTRL_FLAG_SLIDER, + }, { + .ops = &xtpg_ctrl_ops, + .id = V4L2_CID_XILINX_TPG_ZPLATE_HOR_START, + .name = "Test Pattern: Zplate Horizontal Start Pos", + .type = V4L2_CTRL_TYPE_INTEGER, + .min = 0, + .max = (1 << 16) - 1, + .step = 1, + .def = 0x1e, + .flags = V4L2_CTRL_FLAG_SLIDER, + }, { + .ops = &xtpg_ctrl_ops, + .id = V4L2_CID_XILINX_TPG_ZPLATE_HOR_SPEED, + .name = "Test Pattern: Zplate Horizontal Speed", + .type = V4L2_CTRL_TYPE_INTEGER, + .min = 0, + .max = (1 << 16) - 1, + .step = 1, + .def = 0, + .flags = V4L2_CTRL_FLAG_SLIDER, + }, { + .ops = &xtpg_ctrl_ops, + .id = V4L2_CID_XILINX_TPG_ZPLATE_VER_START, + .name = "Test Pattern: Zplate Vertical Start Pos", + .type = V4L2_CTRL_TYPE_INTEGER, + .min = 0, + .max = (1 << 16) - 1, + .step = 1, + .def = 1, + .flags = V4L2_CTRL_FLAG_SLIDER, + }, { + .ops = &xtpg_ctrl_ops, + .id = V4L2_CID_XILINX_TPG_ZPLATE_VER_SPEED, + .name = "Test Pattern: Zplate Vertical Speed", + .type = V4L2_CTRL_TYPE_INTEGER, + .min = 0, + .max = (1 << 16) - 1, + .step = 1, + .def = 0, + .flags = V4L2_CTRL_FLAG_SLIDER, + }, { + .ops = &xtpg_ctrl_ops, + .id = V4L2_CID_XILINX_TPG_BOX_SIZE, + .name = "Test Pattern: Box Size", + .type = V4L2_CTRL_TYPE_INTEGER, + .min = 0, + .max = (1 << 12) - 1, + .step = 1, + .def = 0x32, + .flags = V4L2_CTRL_FLAG_SLIDER, + }, { + .ops = &xtpg_ctrl_ops, + .id = V4L2_CID_XILINX_TPG_BOX_COLOR, + .name = "Test Pattern: Box Color(RGB)", + .type = V4L2_CTRL_TYPE_INTEGER, + .min = 0, + .max = (1 << 24) - 1, + .step = 1, + .def = 0, + }, { + .ops = &xtpg_ctrl_ops, + .id = V4L2_CID_XILINX_TPG_STUCK_PIXEL_THRESH, + .name = "Test Pattern: Stuck Pixel threshold", + .type = V4L2_CTRL_TYPE_INTEGER, + .min = 0, + .max = (1 << 16) - 1, + .step = 1, + .def = 0, + .flags = V4L2_CTRL_FLAG_SLIDER, + }, { + .ops = &xtpg_ctrl_ops, + .id = V4L2_CID_XILINX_TPG_NOISE_GAIN, + .name = "Test Pattern: Noise Gain", + .type = V4L2_CTRL_TYPE_INTEGER, + .min = 0, + .max = (1 << 8) - 1, + .step = 1, + .def = 0, + .flags = V4L2_CTRL_FLAG_SLIDER, + }, +}; + +/* ----------------------------------------------------------------------------- + * Media Operations + */ + +static const struct media_entity_operations xtpg_media_ops = { + .link_validate = v4l2_subdev_link_validate, +}; + +/* ----------------------------------------------------------------------------- + * Power Management + */ + +static int __maybe_unused xtpg_pm_suspend(struct device *dev) +{ + struct xtpg_device *xtpg = dev_get_drvdata(dev); + + xvip_suspend(&xtpg->xvip); + + return 0; +} + +static int __maybe_unused xtpg_pm_resume(struct device *dev) +{ + struct xtpg_device *xtpg = dev_get_drvdata(dev); + + xvip_resume(&xtpg->xvip); + + return 0; +} + +/* ----------------------------------------------------------------------------- + * Platform Device Driver + */ + +static int xtpg_parse_of(struct xtpg_device *xtpg) +{ + struct device *dev = xtpg->xvip.dev; + struct device_node *node = xtpg->xvip.dev->of_node; + struct device_node *ports; + struct device_node *port; + unsigned int nports = 0; + bool has_endpoint = false; + + ports = of_get_child_by_name(node, "ports"); + if (ports == NULL) + ports = node; + + for_each_child_of_node(ports, port) { + const struct xvip_video_format *format; + struct device_node *endpoint; + + if (!port->name || of_node_cmp(port->name, "port")) + continue; + + format = xvip_of_get_format(port); + if (IS_ERR(format)) { + dev_err(dev, "invalid format in DT"); + return PTR_ERR(format); + } + + /* Get and check the format description */ + if (!xtpg->vip_format) { + xtpg->vip_format = format; + } else if (xtpg->vip_format != format) { + dev_err(dev, "in/out format mismatch in DT"); + return -EINVAL; + } + + if (nports == 0) { + endpoint = of_get_next_child(port, NULL); + if (endpoint) + has_endpoint = true; + of_node_put(endpoint); + } + + /* Count the number of ports. */ + nports++; + } + + if (nports != 1 && nports != 2) { + dev_err(dev, "invalid number of ports %u\n", nports); + return -EINVAL; + } + + xtpg->npads = nports; + if (nports == 2 && has_endpoint) + xtpg->has_input = true; + + return 0; +} + +static int xtpg_probe(struct platform_device *pdev) +{ + struct v4l2_subdev *subdev; + struct xtpg_device *xtpg; + u32 i, bayer_phase; + int ret; + + xtpg = devm_kzalloc(&pdev->dev, sizeof(*xtpg), GFP_KERNEL); + if (!xtpg) + return -ENOMEM; + + xtpg->xvip.dev = &pdev->dev; + + ret = xtpg_parse_of(xtpg); + if (ret < 0) + return ret; + + ret = xvip_init_resources(&xtpg->xvip); + if (ret < 0) + return ret; + + xtpg->vtmux_gpio = devm_gpiod_get_optional(&pdev->dev, "timing", + GPIOD_OUT_HIGH); + if (IS_ERR(xtpg->vtmux_gpio)) { + ret = PTR_ERR(xtpg->vtmux_gpio); + goto error_resource; + } + + xtpg->vtc = xvtc_of_get(pdev->dev.of_node); + if (IS_ERR(xtpg->vtc)) { + ret = PTR_ERR(xtpg->vtc); + goto error_resource; + } + + /* Reset and initialize the core */ + xvip_reset(&xtpg->xvip); + + /* Initialize V4L2 subdevice and media entity. Pad numbers depend on the + * number of pads. + */ + if (xtpg->npads == 2) { + xtpg->pads[0].flags = MEDIA_PAD_FL_SINK; + xtpg->pads[1].flags = MEDIA_PAD_FL_SOURCE; + } else { + xtpg->pads[0].flags = MEDIA_PAD_FL_SOURCE; + } + + /* Initialize the default format */ + xtpg->default_format.code = xtpg->vip_format->code; + xtpg->default_format.field = V4L2_FIELD_NONE; + xtpg->default_format.colorspace = V4L2_COLORSPACE_SRGB; + xvip_get_frame_size(&xtpg->xvip, &xtpg->default_format); + + bayer_phase = xtpg_get_bayer_phase(xtpg->vip_format->code); + if (bayer_phase != XTPG_BAYER_PHASE_OFF) + xtpg->bayer = true; + + xtpg->formats[0] = xtpg->default_format; + if (xtpg->npads == 2) + xtpg->formats[1] = xtpg->default_format; + + /* Initialize V4L2 subdevice and media entity */ + subdev = &xtpg->xvip.subdev; + v4l2_subdev_init(subdev, &xtpg_ops); + subdev->dev = &pdev->dev; + subdev->internal_ops = &xtpg_internal_ops; + strlcpy(subdev->name, dev_name(&pdev->dev), sizeof(subdev->name)); + v4l2_set_subdevdata(subdev, xtpg); + subdev->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE; + subdev->entity.ops = &xtpg_media_ops; + + ret = media_entity_init(&subdev->entity, xtpg->npads, xtpg->pads, 0); + if (ret < 0) + goto error; + + v4l2_ctrl_handler_init(&xtpg->ctrl_handler, 3 + ARRAY_SIZE(xtpg_ctrls)); + + xtpg->vblank = v4l2_ctrl_new_std(&xtpg->ctrl_handler, &xtpg_ctrl_ops, + V4L2_CID_VBLANK, XTPG_MIN_VBLANK, + XTPG_MAX_VBLANK, 1, 100); + xtpg->hblank = v4l2_ctrl_new_std(&xtpg->ctrl_handler, &xtpg_ctrl_ops, + V4L2_CID_HBLANK, XTPG_MIN_HBLANK, + XTPG_MAX_HBLANK, 1, 100); + xtpg->pattern = v4l2_ctrl_new_std_menu_items(&xtpg->ctrl_handler, + &xtpg_ctrl_ops, V4L2_CID_TEST_PATTERN, + ARRAY_SIZE(xtpg_pattern_strings) - 1, + 1, 9, xtpg_pattern_strings); + + for (i = 0; i < ARRAY_SIZE(xtpg_ctrls); i++) + v4l2_ctrl_new_custom(&xtpg->ctrl_handler, &xtpg_ctrls[i], NULL); + + if (xtpg->ctrl_handler.error) { + dev_err(&pdev->dev, "failed to add controls\n"); + ret = xtpg->ctrl_handler.error; + goto error; + } + subdev->ctrl_handler = &xtpg->ctrl_handler; + + xtpg_update_pattern_control(xtpg, true, true); + + ret = v4l2_ctrl_handler_setup(&xtpg->ctrl_handler); + if (ret < 0) { + dev_err(&pdev->dev, "failed to set controls\n"); + goto error; + } + + platform_set_drvdata(pdev, xtpg); + + xvip_print_version(&xtpg->xvip); + + ret = v4l2_async_register_subdev(subdev); + if (ret < 0) { + dev_err(&pdev->dev, "failed to register subdev\n"); + goto error; + } + + return 0; + +error: + v4l2_ctrl_handler_free(&xtpg->ctrl_handler); + media_entity_cleanup(&subdev->entity); + xvtc_put(xtpg->vtc); +error_resource: + xvip_cleanup_resources(&xtpg->xvip); + return ret; +} + +static int xtpg_remove(struct platform_device *pdev) +{ + struct xtpg_device *xtpg = platform_get_drvdata(pdev); + struct v4l2_subdev *subdev = &xtpg->xvip.subdev; + + v4l2_async_unregister_subdev(subdev); + v4l2_ctrl_handler_free(&xtpg->ctrl_handler); + media_entity_cleanup(&subdev->entity); + + xvip_cleanup_resources(&xtpg->xvip); + + return 0; +} + +static SIMPLE_DEV_PM_OPS(xtpg_pm_ops, xtpg_pm_suspend, xtpg_pm_resume); + +static const struct of_device_id xtpg_of_id_table[] = { + { .compatible = "xlnx,v-tpg-5.0" }, + { } +}; +MODULE_DEVICE_TABLE(of, xtpg_of_id_table); + +static struct platform_driver xtpg_driver = { + .driver = { + .name = "xilinx-tpg", + .pm = &xtpg_pm_ops, + .of_match_table = xtpg_of_id_table, + }, + .probe = xtpg_probe, + .remove = xtpg_remove, +}; + +module_platform_driver(xtpg_driver); + +MODULE_AUTHOR("Laurent Pinchart "); +MODULE_DESCRIPTION("Xilinx Test Pattern Generator Driver"); +MODULE_LICENSE("GPL v2"); diff --git a/include/uapi/linux/Kbuild b/include/uapi/linux/Kbuild index 68ceb97c458c..d4cfc17cc414 100644 --- a/include/uapi/linux/Kbuild +++ b/include/uapi/linux/Kbuild @@ -446,5 +446,6 @@ header-y += wireless.h header-y += x25.h header-y += xattr.h header-y += xfrm.h +header-y += xilinx-v4l2-controls.h header-y += zorro.h header-y += zorro_ids.h diff --git a/include/uapi/linux/xilinx-v4l2-controls.h b/include/uapi/linux/xilinx-v4l2-controls.h new file mode 100644 index 000000000000..fb495b91e800 --- /dev/null +++ b/include/uapi/linux/xilinx-v4l2-controls.h @@ -0,0 +1,73 @@ +/* + * Xilinx Controls Header + * + * Copyright (C) 2013-2015 Ideas on Board + * Copyright (C) 2013-2015 Xilinx, Inc. + * + * Contacts: Hyun Kwon + * Laurent Pinchart + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef __UAPI_XILINX_V4L2_CONTROLS_H__ +#define __UAPI_XILINX_V4L2_CONTROLS_H__ + +#include + +#define V4L2_CID_XILINX_OFFSET 0xc000 +#define V4L2_CID_XILINX_BASE (V4L2_CID_USER_BASE + V4L2_CID_XILINX_OFFSET) + +/* + * Private Controls for Xilinx Video IPs + */ + +/* + * Xilinx TPG Video IP + */ + +#define V4L2_CID_XILINX_TPG (V4L2_CID_USER_BASE + 0xc000) + +/* Draw cross hairs */ +#define V4L2_CID_XILINX_TPG_CROSS_HAIRS (V4L2_CID_XILINX_TPG + 1) +/* Enable a moving box */ +#define V4L2_CID_XILINX_TPG_MOVING_BOX (V4L2_CID_XILINX_TPG + 2) +/* Mask out a color component */ +#define V4L2_CID_XILINX_TPG_COLOR_MASK (V4L2_CID_XILINX_TPG + 3) +/* Enable a stuck pixel feature */ +#define V4L2_CID_XILINX_TPG_STUCK_PIXEL (V4L2_CID_XILINX_TPG + 4) +/* Enable a noisy output */ +#define V4L2_CID_XILINX_TPG_NOISE (V4L2_CID_XILINX_TPG + 5) +/* Enable the motion feature */ +#define V4L2_CID_XILINX_TPG_MOTION (V4L2_CID_XILINX_TPG + 6) +/* Configure the motion speed of moving patterns */ +#define V4L2_CID_XILINX_TPG_MOTION_SPEED (V4L2_CID_XILINX_TPG + 7) +/* The row of horizontal cross hair location */ +#define V4L2_CID_XILINX_TPG_CROSS_HAIR_ROW (V4L2_CID_XILINX_TPG + 8) +/* The colum of vertical cross hair location */ +#define V4L2_CID_XILINX_TPG_CROSS_HAIR_COLUMN (V4L2_CID_XILINX_TPG + 9) +/* Set starting point of sine wave for horizontal component */ +#define V4L2_CID_XILINX_TPG_ZPLATE_HOR_START (V4L2_CID_XILINX_TPG + 10) +/* Set speed of the horizontal component */ +#define V4L2_CID_XILINX_TPG_ZPLATE_HOR_SPEED (V4L2_CID_XILINX_TPG + 11) +/* Set starting point of sine wave for vertical component */ +#define V4L2_CID_XILINX_TPG_ZPLATE_VER_START (V4L2_CID_XILINX_TPG + 12) +/* Set speed of the vertical component */ +#define V4L2_CID_XILINX_TPG_ZPLATE_VER_SPEED (V4L2_CID_XILINX_TPG + 13) +/* Moving box size */ +#define V4L2_CID_XILINX_TPG_BOX_SIZE (V4L2_CID_XILINX_TPG + 14) +/* Moving box color */ +#define V4L2_CID_XILINX_TPG_BOX_COLOR (V4L2_CID_XILINX_TPG + 15) +/* Upper limit count of generated stuck pixels */ +#define V4L2_CID_XILINX_TPG_STUCK_PIXEL_THRESH (V4L2_CID_XILINX_TPG + 16) +/* Noise level */ +#define V4L2_CID_XILINX_TPG_NOISE_GAIN (V4L2_CID_XILINX_TPG + 17) + +#endif /* __UAPI_XILINX_V4L2_CONTROLS_H__ */ -- cgit v1.2.3 From e95cf393d2097a7744f98de1c7936fcbde0843e3 Mon Sep 17 00:00:00 2001 From: Peter Griffin Date: Wed, 1 Apr 2015 07:42:41 +0100 Subject: MAINTAINERS: Add phy-miphy28lp.c and phy-miphy365x.c to ARCH/STI architecture This patch adds the phy-miphy28lp.c and phy-miphy365x.c phy drivers found on STMicroelectronics stih407 family SoC's into the STI arch section of the maintainers file. Signed-off-by: Peter Griffin Acked-by: Lee Jones Signed-off-by: Kishon Vijay Abraham I --- MAINTAINERS | 2 ++ 1 file changed, 2 insertions(+) (limited to 'MAINTAINERS') diff --git a/MAINTAINERS b/MAINTAINERS index ddc5a8cf9a8a..daddc008939e 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1457,6 +1457,8 @@ F: drivers/clocksource/arm_global_timer.c F: drivers/i2c/busses/i2c-st.c F: drivers/media/rc/st_rc.c F: drivers/mmc/host/sdhci-st.c +F: drivers/phy/phy-miphy28lp.c +F: drivers/phy/phy-miphy365x.c F: drivers/phy/phy-stih407-usb.c F: drivers/phy/phy-stih41x-usb.c F: drivers/pinctrl/pinctrl-st.c -- cgit v1.2.3 From 01081f5ab9916603555f236b11f76bb00e4e01e9 Mon Sep 17 00:00:00 2001 From: Mathieu Poirier Date: Mon, 30 Mar 2015 14:13:41 -0600 Subject: coresight: moving to new "hwtracing" directory Keeping drivers related to HW tracing on ARM, i.e coresight, under "drivers/coresight" doesn't make sense when other architectures start rolling out technologies of the same nature. As such creating a new "drivers/hwtracing" directory where all drivers of the same kind can reside, reducing namespace pollution under "drivers/". Signed-off-by: Mathieu Poirier Signed-off-by: Greg Kroah-Hartman --- MAINTAINERS | 2 +- arch/arm/Kconfig.debug | 2 +- arch/arm64/Kconfig.debug | 2 +- drivers/Makefile | 2 +- drivers/coresight/Kconfig | 61 - drivers/coresight/Makefile | 11 - drivers/coresight/coresight-etb10.c | 527 ------ drivers/coresight/coresight-etm-cp14.c | 591 ------ drivers/coresight/coresight-etm.h | 251 --- drivers/coresight/coresight-etm3x.c | 1932 -------------------- drivers/coresight/coresight-funnel.c | 258 --- drivers/coresight/coresight-priv.h | 63 - drivers/coresight/coresight-replicator.c | 137 -- drivers/coresight/coresight-tmc.c | 822 --------- drivers/coresight/coresight-tpiu.c | 207 --- drivers/coresight/coresight.c | 720 -------- drivers/coresight/of_coresight.c | 200 -- drivers/hwtracing/coresight/Kconfig | 61 + drivers/hwtracing/coresight/Makefile | 11 + drivers/hwtracing/coresight/coresight-etb10.c | 527 ++++++ drivers/hwtracing/coresight/coresight-etm-cp14.c | 591 ++++++ drivers/hwtracing/coresight/coresight-etm.h | 251 +++ drivers/hwtracing/coresight/coresight-etm3x.c | 1932 ++++++++++++++++++++ drivers/hwtracing/coresight/coresight-funnel.c | 258 +++ drivers/hwtracing/coresight/coresight-priv.h | 63 + drivers/hwtracing/coresight/coresight-replicator.c | 137 ++ drivers/hwtracing/coresight/coresight-tmc.c | 822 +++++++++ drivers/hwtracing/coresight/coresight-tpiu.c | 207 +++ drivers/hwtracing/coresight/coresight.c | 720 ++++++++ drivers/hwtracing/coresight/of_coresight.c | 200 ++ 30 files changed, 5784 insertions(+), 5784 deletions(-) delete mode 100644 drivers/coresight/Kconfig delete mode 100644 drivers/coresight/Makefile delete mode 100644 drivers/coresight/coresight-etb10.c delete mode 100644 drivers/coresight/coresight-etm-cp14.c delete mode 100644 drivers/coresight/coresight-etm.h delete mode 100644 drivers/coresight/coresight-etm3x.c delete mode 100644 drivers/coresight/coresight-funnel.c delete mode 100644 drivers/coresight/coresight-priv.h delete mode 100644 drivers/coresight/coresight-replicator.c delete mode 100644 drivers/coresight/coresight-tmc.c delete mode 100644 drivers/coresight/coresight-tpiu.c delete mode 100644 drivers/coresight/coresight.c delete mode 100644 drivers/coresight/of_coresight.c create mode 100644 drivers/hwtracing/coresight/Kconfig create mode 100644 drivers/hwtracing/coresight/Makefile create mode 100644 drivers/hwtracing/coresight/coresight-etb10.c create mode 100644 drivers/hwtracing/coresight/coresight-etm-cp14.c create mode 100644 drivers/hwtracing/coresight/coresight-etm.h create mode 100644 drivers/hwtracing/coresight/coresight-etm3x.c create mode 100644 drivers/hwtracing/coresight/coresight-funnel.c create mode 100644 drivers/hwtracing/coresight/coresight-priv.h create mode 100644 drivers/hwtracing/coresight/coresight-replicator.c create mode 100644 drivers/hwtracing/coresight/coresight-tmc.c create mode 100644 drivers/hwtracing/coresight/coresight-tpiu.c create mode 100644 drivers/hwtracing/coresight/coresight.c create mode 100644 drivers/hwtracing/coresight/of_coresight.c (limited to 'MAINTAINERS') diff --git a/MAINTAINERS b/MAINTAINERS index d7490020c0f3..e9e12d75546a 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -953,7 +953,7 @@ ARM/CORESIGHT FRAMEWORK AND DRIVERS M: Mathieu Poirier L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) S: Maintained -F: drivers/coresight/* +F: drivers/hwtracing/coresight/* F: Documentation/trace/coresight.txt F: Documentation/devicetree/bindings/arm/coresight.txt F: Documentation/ABI/testing/sysfs-bus-coresight-devices-* diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug index 8d14ad4e1db0..8b0183a9a300 100644 --- a/arch/arm/Kconfig.debug +++ b/arch/arm/Kconfig.debug @@ -1610,6 +1610,6 @@ config DEBUG_SET_MODULE_RONX against certain classes of kernel exploits. If in doubt, say "N". -source "drivers/coresight/Kconfig" +source "drivers/hwtracing/coresight/Kconfig" endmenu diff --git a/arch/arm64/Kconfig.debug b/arch/arm64/Kconfig.debug index 5b2ffd8e6cdb..d6285ef9b5f9 100644 --- a/arch/arm64/Kconfig.debug +++ b/arch/arm64/Kconfig.debug @@ -89,6 +89,6 @@ config DEBUG_ALIGN_RODATA If in doubt, say N -source "drivers/coresight/Kconfig" +source "drivers/hwtracing/coresight/Kconfig" endmenu diff --git a/drivers/Makefile b/drivers/Makefile index 527a6da8d539..46d2554be404 100644 --- a/drivers/Makefile +++ b/drivers/Makefile @@ -163,5 +163,5 @@ obj-$(CONFIG_POWERCAP) += powercap/ obj-$(CONFIG_MCB) += mcb/ obj-$(CONFIG_RAS) += ras/ obj-$(CONFIG_THUNDERBOLT) += thunderbolt/ -obj-$(CONFIG_CORESIGHT) += coresight/ +obj-$(CONFIG_CORESIGHT) += hwtracing/coresight/ obj-$(CONFIG_ANDROID) += android/ diff --git a/drivers/coresight/Kconfig b/drivers/coresight/Kconfig deleted file mode 100644 index fc1f1ae7a49d..000000000000 --- a/drivers/coresight/Kconfig +++ /dev/null @@ -1,61 +0,0 @@ -# -# Coresight configuration -# -menuconfig CORESIGHT - bool "CoreSight Tracing Support" - select ARM_AMBA - help - This framework provides a kernel interface for the CoreSight debug - and trace drivers to register themselves with. It's intended to build - a topological view of the CoreSight components based on a DT - specification and configure the right serie of components when a - trace source gets enabled. - -if CORESIGHT -config CORESIGHT_LINKS_AND_SINKS - bool "CoreSight Link and Sink drivers" - help - This enables support for CoreSight link and sink drivers that are - responsible for transporting and collecting the trace data - respectively. Link and sinks are dynamically aggregated with a trace - entity at run time to form a complete trace path. - -config CORESIGHT_LINK_AND_SINK_TMC - bool "Coresight generic TMC driver" - depends on CORESIGHT_LINKS_AND_SINKS - help - This enables support for the Trace Memory Controller driver. - Depending on its configuration the device can act as a link (embedded - trace router - ETR) or sink (embedded trace FIFO). The driver - complies with the generic implementation of the component without - special enhancement or added features. - -config CORESIGHT_SINK_TPIU - bool "Coresight generic TPIU driver" - depends on CORESIGHT_LINKS_AND_SINKS - help - This enables support for the Trace Port Interface Unit driver, - responsible for bridging the gap between the on-chip coresight - components and a trace for bridging the gap between the on-chip - coresight components and a trace port collection engine, typically - connected to an external host for use case capturing more traces than - the on-board coresight memory can handle. - -config CORESIGHT_SINK_ETBV10 - bool "Coresight ETBv1.0 driver" - depends on CORESIGHT_LINKS_AND_SINKS - help - This enables support for the Embedded Trace Buffer version 1.0 driver - that complies with the generic implementation of the component without - special enhancement or added features. - -config CORESIGHT_SOURCE_ETM3X - bool "CoreSight Embedded Trace Macrocell 3.x driver" - depends on !ARM64 - select CORESIGHT_LINKS_AND_SINKS - help - This driver provides support for processor ETM3.x and PTM1.x modules, - which allows tracing the instructions that a processor is executing - This is primarily useful for instruction level tracing. Depending - the ETM version data tracing may also be available. -endif diff --git a/drivers/coresight/Makefile b/drivers/coresight/Makefile deleted file mode 100644 index 4b4bec890ef5..000000000000 --- a/drivers/coresight/Makefile +++ /dev/null @@ -1,11 +0,0 @@ -# -# Makefile for CoreSight drivers. -# -obj-$(CONFIG_CORESIGHT) += coresight.o -obj-$(CONFIG_OF) += of_coresight.o -obj-$(CONFIG_CORESIGHT_LINK_AND_SINK_TMC) += coresight-tmc.o -obj-$(CONFIG_CORESIGHT_SINK_TPIU) += coresight-tpiu.o -obj-$(CONFIG_CORESIGHT_SINK_ETBV10) += coresight-etb10.o -obj-$(CONFIG_CORESIGHT_LINKS_AND_SINKS) += coresight-funnel.o \ - coresight-replicator.o -obj-$(CONFIG_CORESIGHT_SOURCE_ETM3X) += coresight-etm3x.o coresight-etm-cp14.o diff --git a/drivers/coresight/coresight-etb10.c b/drivers/coresight/coresight-etb10.c deleted file mode 100644 index 40049869aecd..000000000000 --- a/drivers/coresight/coresight-etb10.c +++ /dev/null @@ -1,527 +0,0 @@ -/* Copyright (c) 2011-2012, The Linux Foundation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include "coresight-priv.h" - -#define ETB_RAM_DEPTH_REG 0x004 -#define ETB_STATUS_REG 0x00c -#define ETB_RAM_READ_DATA_REG 0x010 -#define ETB_RAM_READ_POINTER 0x014 -#define ETB_RAM_WRITE_POINTER 0x018 -#define ETB_TRG 0x01c -#define ETB_CTL_REG 0x020 -#define ETB_RWD_REG 0x024 -#define ETB_FFSR 0x300 -#define ETB_FFCR 0x304 -#define ETB_ITMISCOP0 0xee0 -#define ETB_ITTRFLINACK 0xee4 -#define ETB_ITTRFLIN 0xee8 -#define ETB_ITATBDATA0 0xeeC -#define ETB_ITATBCTR2 0xef0 -#define ETB_ITATBCTR1 0xef4 -#define ETB_ITATBCTR0 0xef8 - -/* register description */ -/* STS - 0x00C */ -#define ETB_STATUS_RAM_FULL BIT(0) -/* CTL - 0x020 */ -#define ETB_CTL_CAPT_EN BIT(0) -/* FFCR - 0x304 */ -#define ETB_FFCR_EN_FTC BIT(0) -#define ETB_FFCR_FON_MAN BIT(6) -#define ETB_FFCR_STOP_FI BIT(12) -#define ETB_FFCR_STOP_TRIGGER BIT(13) - -#define ETB_FFCR_BIT 6 -#define ETB_FFSR_BIT 1 -#define ETB_FRAME_SIZE_WORDS 4 - -/** - * struct etb_drvdata - specifics associated to an ETB component - * @base: memory mapped base address for this component. - * @dev: the device entity associated to this component. - * @csdev: component vitals needed by the framework. - * @miscdev: specifics to handle "/dev/xyz.etb" entry. - * @clk: the clock this component is associated to. - * @spinlock: only one at a time pls. - * @in_use: synchronise user space access to etb buffer. - * @buf: area of memory where ETB buffer content gets sent. - * @buffer_depth: size of @buf. - * @enable: this ETB is being used. - * @trigger_cntr: amount of words to store after a trigger. - */ -struct etb_drvdata { - void __iomem *base; - struct device *dev; - struct coresight_device *csdev; - struct miscdevice miscdev; - struct clk *clk; - spinlock_t spinlock; - atomic_t in_use; - u8 *buf; - u32 buffer_depth; - bool enable; - u32 trigger_cntr; -}; - -static unsigned int etb_get_buffer_depth(struct etb_drvdata *drvdata) -{ - int ret; - u32 depth = 0; - - ret = clk_prepare_enable(drvdata->clk); - if (ret) - return ret; - - /* RO registers don't need locking */ - depth = readl_relaxed(drvdata->base + ETB_RAM_DEPTH_REG); - - clk_disable_unprepare(drvdata->clk); - return depth; -} - -static void etb_enable_hw(struct etb_drvdata *drvdata) -{ - int i; - u32 depth; - - CS_UNLOCK(drvdata->base); - - depth = drvdata->buffer_depth; - /* reset write RAM pointer address */ - writel_relaxed(0x0, drvdata->base + ETB_RAM_WRITE_POINTER); - /* clear entire RAM buffer */ - for (i = 0; i < depth; i++) - writel_relaxed(0x0, drvdata->base + ETB_RWD_REG); - - /* reset write RAM pointer address */ - writel_relaxed(0x0, drvdata->base + ETB_RAM_WRITE_POINTER); - /* reset read RAM pointer address */ - writel_relaxed(0x0, drvdata->base + ETB_RAM_READ_POINTER); - - writel_relaxed(drvdata->trigger_cntr, drvdata->base + ETB_TRG); - writel_relaxed(ETB_FFCR_EN_FTC | ETB_FFCR_STOP_TRIGGER, - drvdata->base + ETB_FFCR); - /* ETB trace capture enable */ - writel_relaxed(ETB_CTL_CAPT_EN, drvdata->base + ETB_CTL_REG); - - CS_LOCK(drvdata->base); -} - -static int etb_enable(struct coresight_device *csdev) -{ - struct etb_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); - int ret; - unsigned long flags; - - ret = clk_prepare_enable(drvdata->clk); - if (ret) - return ret; - - spin_lock_irqsave(&drvdata->spinlock, flags); - etb_enable_hw(drvdata); - drvdata->enable = true; - spin_unlock_irqrestore(&drvdata->spinlock, flags); - - dev_info(drvdata->dev, "ETB enabled\n"); - return 0; -} - -static void etb_disable_hw(struct etb_drvdata *drvdata) -{ - u32 ffcr; - - CS_UNLOCK(drvdata->base); - - ffcr = readl_relaxed(drvdata->base + ETB_FFCR); - /* stop formatter when a stop has completed */ - ffcr |= ETB_FFCR_STOP_FI; - writel_relaxed(ffcr, drvdata->base + ETB_FFCR); - /* manually generate a flush of the system */ - ffcr |= ETB_FFCR_FON_MAN; - writel_relaxed(ffcr, drvdata->base + ETB_FFCR); - - if (coresight_timeout(drvdata->base, ETB_FFCR, ETB_FFCR_BIT, 0)) { - dev_err(drvdata->dev, - "timeout observed when probing at offset %#x\n", - ETB_FFCR); - } - - /* disable trace capture */ - writel_relaxed(0x0, drvdata->base + ETB_CTL_REG); - - if (coresight_timeout(drvdata->base, ETB_FFSR, ETB_FFSR_BIT, 1)) { - dev_err(drvdata->dev, - "timeout observed when probing at offset %#x\n", - ETB_FFCR); - } - - CS_LOCK(drvdata->base); -} - -static void etb_dump_hw(struct etb_drvdata *drvdata) -{ - int i; - u8 *buf_ptr; - u32 read_data, depth; - u32 read_ptr, write_ptr; - u32 frame_off, frame_endoff; - - CS_UNLOCK(drvdata->base); - - read_ptr = readl_relaxed(drvdata->base + ETB_RAM_READ_POINTER); - write_ptr = readl_relaxed(drvdata->base + ETB_RAM_WRITE_POINTER); - - frame_off = write_ptr % ETB_FRAME_SIZE_WORDS; - frame_endoff = ETB_FRAME_SIZE_WORDS - frame_off; - if (frame_off) { - dev_err(drvdata->dev, - "write_ptr: %lu not aligned to formatter frame size\n", - (unsigned long)write_ptr); - dev_err(drvdata->dev, "frameoff: %lu, frame_endoff: %lu\n", - (unsigned long)frame_off, (unsigned long)frame_endoff); - write_ptr += frame_endoff; - } - - if ((readl_relaxed(drvdata->base + ETB_STATUS_REG) - & ETB_STATUS_RAM_FULL) == 0) - writel_relaxed(0x0, drvdata->base + ETB_RAM_READ_POINTER); - else - writel_relaxed(write_ptr, drvdata->base + ETB_RAM_READ_POINTER); - - depth = drvdata->buffer_depth; - buf_ptr = drvdata->buf; - for (i = 0; i < depth; i++) { - read_data = readl_relaxed(drvdata->base + - ETB_RAM_READ_DATA_REG); - *buf_ptr++ = read_data >> 0; - *buf_ptr++ = read_data >> 8; - *buf_ptr++ = read_data >> 16; - *buf_ptr++ = read_data >> 24; - } - - if (frame_off) { - buf_ptr -= (frame_endoff * 4); - for (i = 0; i < frame_endoff; i++) { - *buf_ptr++ = 0x0; - *buf_ptr++ = 0x0; - *buf_ptr++ = 0x0; - *buf_ptr++ = 0x0; - } - } - - writel_relaxed(read_ptr, drvdata->base + ETB_RAM_READ_POINTER); - - CS_LOCK(drvdata->base); -} - -static void etb_disable(struct coresight_device *csdev) -{ - struct etb_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); - unsigned long flags; - - spin_lock_irqsave(&drvdata->spinlock, flags); - etb_disable_hw(drvdata); - etb_dump_hw(drvdata); - drvdata->enable = false; - spin_unlock_irqrestore(&drvdata->spinlock, flags); - - clk_disable_unprepare(drvdata->clk); - - dev_info(drvdata->dev, "ETB disabled\n"); -} - -static const struct coresight_ops_sink etb_sink_ops = { - .enable = etb_enable, - .disable = etb_disable, -}; - -static const struct coresight_ops etb_cs_ops = { - .sink_ops = &etb_sink_ops, -}; - -static void etb_dump(struct etb_drvdata *drvdata) -{ - unsigned long flags; - - spin_lock_irqsave(&drvdata->spinlock, flags); - if (drvdata->enable) { - etb_disable_hw(drvdata); - etb_dump_hw(drvdata); - etb_enable_hw(drvdata); - } - spin_unlock_irqrestore(&drvdata->spinlock, flags); - - dev_info(drvdata->dev, "ETB dumped\n"); -} - -static int etb_open(struct inode *inode, struct file *file) -{ - struct etb_drvdata *drvdata = container_of(file->private_data, - struct etb_drvdata, miscdev); - - if (atomic_cmpxchg(&drvdata->in_use, 0, 1)) - return -EBUSY; - - dev_dbg(drvdata->dev, "%s: successfully opened\n", __func__); - return 0; -} - -static ssize_t etb_read(struct file *file, char __user *data, - size_t len, loff_t *ppos) -{ - u32 depth; - struct etb_drvdata *drvdata = container_of(file->private_data, - struct etb_drvdata, miscdev); - - etb_dump(drvdata); - - depth = drvdata->buffer_depth; - if (*ppos + len > depth * 4) - len = depth * 4 - *ppos; - - if (copy_to_user(data, drvdata->buf + *ppos, len)) { - dev_dbg(drvdata->dev, "%s: copy_to_user failed\n", __func__); - return -EFAULT; - } - - *ppos += len; - - dev_dbg(drvdata->dev, "%s: %zu bytes copied, %d bytes left\n", - __func__, len, (int)(depth * 4 - *ppos)); - return len; -} - -static int etb_release(struct inode *inode, struct file *file) -{ - struct etb_drvdata *drvdata = container_of(file->private_data, - struct etb_drvdata, miscdev); - atomic_set(&drvdata->in_use, 0); - - dev_dbg(drvdata->dev, "%s: released\n", __func__); - return 0; -} - -static const struct file_operations etb_fops = { - .owner = THIS_MODULE, - .open = etb_open, - .read = etb_read, - .release = etb_release, - .llseek = no_llseek, -}; - -static ssize_t status_show(struct device *dev, - struct device_attribute *attr, char *buf) -{ - int ret; - unsigned long flags; - u32 etb_rdr, etb_sr, etb_rrp, etb_rwp; - u32 etb_trg, etb_cr, etb_ffsr, etb_ffcr; - struct etb_drvdata *drvdata = dev_get_drvdata(dev->parent); - - ret = clk_prepare_enable(drvdata->clk); - if (ret) - goto out; - - spin_lock_irqsave(&drvdata->spinlock, flags); - CS_UNLOCK(drvdata->base); - - etb_rdr = readl_relaxed(drvdata->base + ETB_RAM_DEPTH_REG); - etb_sr = readl_relaxed(drvdata->base + ETB_STATUS_REG); - etb_rrp = readl_relaxed(drvdata->base + ETB_RAM_READ_POINTER); - etb_rwp = readl_relaxed(drvdata->base + ETB_RAM_WRITE_POINTER); - etb_trg = readl_relaxed(drvdata->base + ETB_TRG); - etb_cr = readl_relaxed(drvdata->base + ETB_CTL_REG); - etb_ffsr = readl_relaxed(drvdata->base + ETB_FFSR); - etb_ffcr = readl_relaxed(drvdata->base + ETB_FFCR); - - CS_LOCK(drvdata->base); - spin_unlock_irqrestore(&drvdata->spinlock, flags); - - clk_disable_unprepare(drvdata->clk); - - return sprintf(buf, - "Depth:\t\t0x%x\n" - "Status:\t\t0x%x\n" - "RAM read ptr:\t0x%x\n" - "RAM wrt ptr:\t0x%x\n" - "Trigger cnt:\t0x%x\n" - "Control:\t0x%x\n" - "Flush status:\t0x%x\n" - "Flush ctrl:\t0x%x\n", - etb_rdr, etb_sr, etb_rrp, etb_rwp, - etb_trg, etb_cr, etb_ffsr, etb_ffcr); -out: - return -EINVAL; -} -static DEVICE_ATTR_RO(status); - -static ssize_t trigger_cntr_show(struct device *dev, - struct device_attribute *attr, char *buf) -{ - struct etb_drvdata *drvdata = dev_get_drvdata(dev->parent); - unsigned long val = drvdata->trigger_cntr; - - return sprintf(buf, "%#lx\n", val); -} - -static ssize_t trigger_cntr_store(struct device *dev, - struct device_attribute *attr, - const char *buf, size_t size) -{ - int ret; - unsigned long val; - struct etb_drvdata *drvdata = dev_get_drvdata(dev->parent); - - ret = kstrtoul(buf, 16, &val); - if (ret) - return ret; - - drvdata->trigger_cntr = val; - return size; -} -static DEVICE_ATTR_RW(trigger_cntr); - -static struct attribute *coresight_etb_attrs[] = { - &dev_attr_trigger_cntr.attr, - &dev_attr_status.attr, - NULL, -}; -ATTRIBUTE_GROUPS(coresight_etb); - -static int etb_probe(struct amba_device *adev, const struct amba_id *id) -{ - int ret; - void __iomem *base; - struct device *dev = &adev->dev; - struct coresight_platform_data *pdata = NULL; - struct etb_drvdata *drvdata; - struct resource *res = &adev->res; - struct coresight_desc *desc; - struct device_node *np = adev->dev.of_node; - - if (np) { - pdata = of_get_coresight_platform_data(dev, np); - if (IS_ERR(pdata)) - return PTR_ERR(pdata); - adev->dev.platform_data = pdata; - } - - drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL); - if (!drvdata) - return -ENOMEM; - - drvdata->dev = &adev->dev; - dev_set_drvdata(dev, drvdata); - - /* validity for the resource is already checked by the AMBA core */ - base = devm_ioremap_resource(dev, res); - if (IS_ERR(base)) - return PTR_ERR(base); - - drvdata->base = base; - - spin_lock_init(&drvdata->spinlock); - - drvdata->clk = adev->pclk; - ret = clk_prepare_enable(drvdata->clk); - if (ret) - return ret; - - drvdata->buffer_depth = etb_get_buffer_depth(drvdata); - clk_disable_unprepare(drvdata->clk); - - if (drvdata->buffer_depth < 0) - return -EINVAL; - - drvdata->buf = devm_kzalloc(dev, - drvdata->buffer_depth * 4, GFP_KERNEL); - if (!drvdata->buf) - return -ENOMEM; - - desc = devm_kzalloc(dev, sizeof(*desc), GFP_KERNEL); - if (!desc) - return -ENOMEM; - - desc->type = CORESIGHT_DEV_TYPE_SINK; - desc->subtype.sink_subtype = CORESIGHT_DEV_SUBTYPE_SINK_BUFFER; - desc->ops = &etb_cs_ops; - desc->pdata = pdata; - desc->dev = dev; - desc->groups = coresight_etb_groups; - drvdata->csdev = coresight_register(desc); - if (IS_ERR(drvdata->csdev)) - return PTR_ERR(drvdata->csdev); - - drvdata->miscdev.name = pdata->name; - drvdata->miscdev.minor = MISC_DYNAMIC_MINOR; - drvdata->miscdev.fops = &etb_fops; - ret = misc_register(&drvdata->miscdev); - if (ret) - goto err_misc_register; - - dev_info(dev, "ETB initialized\n"); - return 0; - -err_misc_register: - coresight_unregister(drvdata->csdev); - return ret; -} - -static int etb_remove(struct amba_device *adev) -{ - struct etb_drvdata *drvdata = amba_get_drvdata(adev); - - misc_deregister(&drvdata->miscdev); - coresight_unregister(drvdata->csdev); - return 0; -} - -static struct amba_id etb_ids[] = { - { - .id = 0x0003b907, - .mask = 0x0003ffff, - }, - { 0, 0}, -}; - -static struct amba_driver etb_driver = { - .drv = { - .name = "coresight-etb10", - .owner = THIS_MODULE, - }, - .probe = etb_probe, - .remove = etb_remove, - .id_table = etb_ids, -}; - -module_amba_driver(etb_driver); - -MODULE_LICENSE("GPL v2"); -MODULE_DESCRIPTION("CoreSight Embedded Trace Buffer driver"); diff --git a/drivers/coresight/coresight-etm-cp14.c b/drivers/coresight/coresight-etm-cp14.c deleted file mode 100644 index 12a220682117..000000000000 --- a/drivers/coresight/coresight-etm-cp14.c +++ /dev/null @@ -1,591 +0,0 @@ -/* Copyright (c) 2012, The Linux Foundation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt - -#include -#include -#include -#include - -#include "coresight-etm.h" - -int etm_readl_cp14(u32 reg, unsigned int *val) -{ - switch (reg) { - case ETMCR: - *val = etm_read(ETMCR); - return 0; - case ETMCCR: - *val = etm_read(ETMCCR); - return 0; - case ETMTRIGGER: - *val = etm_read(ETMTRIGGER); - return 0; - case ETMSR: - *val = etm_read(ETMSR); - return 0; - case ETMSCR: - *val = etm_read(ETMSCR); - return 0; - case ETMTSSCR: - *val = etm_read(ETMTSSCR); - return 0; - case ETMTEEVR: - *val = etm_read(ETMTEEVR); - return 0; - case ETMTECR1: - *val = etm_read(ETMTECR1); - return 0; - case ETMFFLR: - *val = etm_read(ETMFFLR); - return 0; - case ETMACVRn(0): - *val = etm_read(ETMACVR0); - return 0; - case ETMACVRn(1): - *val = etm_read(ETMACVR1); - return 0; - case ETMACVRn(2): - *val = etm_read(ETMACVR2); - return 0; - case ETMACVRn(3): - *val = etm_read(ETMACVR3); - return 0; - case ETMACVRn(4): - *val = etm_read(ETMACVR4); - return 0; - case ETMACVRn(5): - *val = etm_read(ETMACVR5); - return 0; - case ETMACVRn(6): - *val = etm_read(ETMACVR6); - return 0; - case ETMACVRn(7): - *val = etm_read(ETMACVR7); - return 0; - case ETMACVRn(8): - *val = etm_read(ETMACVR8); - return 0; - case ETMACVRn(9): - *val = etm_read(ETMACVR9); - return 0; - case ETMACVRn(10): - *val = etm_read(ETMACVR10); - return 0; - case ETMACVRn(11): - *val = etm_read(ETMACVR11); - return 0; - case ETMACVRn(12): - *val = etm_read(ETMACVR12); - return 0; - case ETMACVRn(13): - *val = etm_read(ETMACVR13); - return 0; - case ETMACVRn(14): - *val = etm_read(ETMACVR14); - return 0; - case ETMACVRn(15): - *val = etm_read(ETMACVR15); - return 0; - case ETMACTRn(0): - *val = etm_read(ETMACTR0); - return 0; - case ETMACTRn(1): - *val = etm_read(ETMACTR1); - return 0; - case ETMACTRn(2): - *val = etm_read(ETMACTR2); - return 0; - case ETMACTRn(3): - *val = etm_read(ETMACTR3); - return 0; - case ETMACTRn(4): - *val = etm_read(ETMACTR4); - return 0; - case ETMACTRn(5): - *val = etm_read(ETMACTR5); - return 0; - case ETMACTRn(6): - *val = etm_read(ETMACTR6); - return 0; - case ETMACTRn(7): - *val = etm_read(ETMACTR7); - return 0; - case ETMACTRn(8): - *val = etm_read(ETMACTR8); - return 0; - case ETMACTRn(9): - *val = etm_read(ETMACTR9); - return 0; - case ETMACTRn(10): - *val = etm_read(ETMACTR10); - return 0; - case ETMACTRn(11): - *val = etm_read(ETMACTR11); - return 0; - case ETMACTRn(12): - *val = etm_read(ETMACTR12); - return 0; - case ETMACTRn(13): - *val = etm_read(ETMACTR13); - return 0; - case ETMACTRn(14): - *val = etm_read(ETMACTR14); - return 0; - case ETMACTRn(15): - *val = etm_read(ETMACTR15); - return 0; - case ETMCNTRLDVRn(0): - *val = etm_read(ETMCNTRLDVR0); - return 0; - case ETMCNTRLDVRn(1): - *val = etm_read(ETMCNTRLDVR1); - return 0; - case ETMCNTRLDVRn(2): - *val = etm_read(ETMCNTRLDVR2); - return 0; - case ETMCNTRLDVRn(3): - *val = etm_read(ETMCNTRLDVR3); - return 0; - case ETMCNTENRn(0): - *val = etm_read(ETMCNTENR0); - return 0; - case ETMCNTENRn(1): - *val = etm_read(ETMCNTENR1); - return 0; - case ETMCNTENRn(2): - *val = etm_read(ETMCNTENR2); - return 0; - case ETMCNTENRn(3): - *val = etm_read(ETMCNTENR3); - return 0; - case ETMCNTRLDEVRn(0): - *val = etm_read(ETMCNTRLDEVR0); - return 0; - case ETMCNTRLDEVRn(1): - *val = etm_read(ETMCNTRLDEVR1); - return 0; - case ETMCNTRLDEVRn(2): - *val = etm_read(ETMCNTRLDEVR2); - return 0; - case ETMCNTRLDEVRn(3): - *val = etm_read(ETMCNTRLDEVR3); - return 0; - case ETMCNTVRn(0): - *val = etm_read(ETMCNTVR0); - return 0; - case ETMCNTVRn(1): - *val = etm_read(ETMCNTVR1); - return 0; - case ETMCNTVRn(2): - *val = etm_read(ETMCNTVR2); - return 0; - case ETMCNTVRn(3): - *val = etm_read(ETMCNTVR3); - return 0; - case ETMSQ12EVR: - *val = etm_read(ETMSQ12EVR); - return 0; - case ETMSQ21EVR: - *val = etm_read(ETMSQ21EVR); - return 0; - case ETMSQ23EVR: - *val = etm_read(ETMSQ23EVR); - return 0; - case ETMSQ31EVR: - *val = etm_read(ETMSQ31EVR); - return 0; - case ETMSQ32EVR: - *val = etm_read(ETMSQ32EVR); - return 0; - case ETMSQ13EVR: - *val = etm_read(ETMSQ13EVR); - return 0; - case ETMSQR: - *val = etm_read(ETMSQR); - return 0; - case ETMEXTOUTEVRn(0): - *val = etm_read(ETMEXTOUTEVR0); - return 0; - case ETMEXTOUTEVRn(1): - *val = etm_read(ETMEXTOUTEVR1); - return 0; - case ETMEXTOUTEVRn(2): - *val = etm_read(ETMEXTOUTEVR2); - return 0; - case ETMEXTOUTEVRn(3): - *val = etm_read(ETMEXTOUTEVR3); - return 0; - case ETMCIDCVRn(0): - *val = etm_read(ETMCIDCVR0); - return 0; - case ETMCIDCVRn(1): - *val = etm_read(ETMCIDCVR1); - return 0; - case ETMCIDCVRn(2): - *val = etm_read(ETMCIDCVR2); - return 0; - case ETMCIDCMR: - *val = etm_read(ETMCIDCMR); - return 0; - case ETMIMPSPEC0: - *val = etm_read(ETMIMPSPEC0); - return 0; - case ETMIMPSPEC1: - *val = etm_read(ETMIMPSPEC1); - return 0; - case ETMIMPSPEC2: - *val = etm_read(ETMIMPSPEC2); - return 0; - case ETMIMPSPEC3: - *val = etm_read(ETMIMPSPEC3); - return 0; - case ETMIMPSPEC4: - *val = etm_read(ETMIMPSPEC4); - return 0; - case ETMIMPSPEC5: - *val = etm_read(ETMIMPSPEC5); - return 0; - case ETMIMPSPEC6: - *val = etm_read(ETMIMPSPEC6); - return 0; - case ETMIMPSPEC7: - *val = etm_read(ETMIMPSPEC7); - return 0; - case ETMSYNCFR: - *val = etm_read(ETMSYNCFR); - return 0; - case ETMIDR: - *val = etm_read(ETMIDR); - return 0; - case ETMCCER: - *val = etm_read(ETMCCER); - return 0; - case ETMEXTINSELR: - *val = etm_read(ETMEXTINSELR); - return 0; - case ETMTESSEICR: - *val = etm_read(ETMTESSEICR); - return 0; - case ETMEIBCR: - *val = etm_read(ETMEIBCR); - return 0; - case ETMTSEVR: - *val = etm_read(ETMTSEVR); - return 0; - case ETMAUXCR: - *val = etm_read(ETMAUXCR); - return 0; - case ETMTRACEIDR: - *val = etm_read(ETMTRACEIDR); - return 0; - case ETMVMIDCVR: - *val = etm_read(ETMVMIDCVR); - return 0; - case ETMOSLSR: - *val = etm_read(ETMOSLSR); - return 0; - case ETMOSSRR: - *val = etm_read(ETMOSSRR); - return 0; - case ETMPDCR: - *val = etm_read(ETMPDCR); - return 0; - case ETMPDSR: - *val = etm_read(ETMPDSR); - return 0; - default: - *val = 0; - return -EINVAL; - } -} - -int etm_writel_cp14(u32 reg, u32 val) -{ - switch (reg) { - case ETMCR: - etm_write(val, ETMCR); - break; - case ETMTRIGGER: - etm_write(val, ETMTRIGGER); - break; - case ETMSR: - etm_write(val, ETMSR); - break; - case ETMTSSCR: - etm_write(val, ETMTSSCR); - break; - case ETMTEEVR: - etm_write(val, ETMTEEVR); - break; - case ETMTECR1: - etm_write(val, ETMTECR1); - break; - case ETMFFLR: - etm_write(val, ETMFFLR); - break; - case ETMACVRn(0): - etm_write(val, ETMACVR0); - break; - case ETMACVRn(1): - etm_write(val, ETMACVR1); - break; - case ETMACVRn(2): - etm_write(val, ETMACVR2); - break; - case ETMACVRn(3): - etm_write(val, ETMACVR3); - break; - case ETMACVRn(4): - etm_write(val, ETMACVR4); - break; - case ETMACVRn(5): - etm_write(val, ETMACVR5); - break; - case ETMACVRn(6): - etm_write(val, ETMACVR6); - break; - case ETMACVRn(7): - etm_write(val, ETMACVR7); - break; - case ETMACVRn(8): - etm_write(val, ETMACVR8); - break; - case ETMACVRn(9): - etm_write(val, ETMACVR9); - break; - case ETMACVRn(10): - etm_write(val, ETMACVR10); - break; - case ETMACVRn(11): - etm_write(val, ETMACVR11); - break; - case ETMACVRn(12): - etm_write(val, ETMACVR12); - break; - case ETMACVRn(13): - etm_write(val, ETMACVR13); - break; - case ETMACVRn(14): - etm_write(val, ETMACVR14); - break; - case ETMACVRn(15): - etm_write(val, ETMACVR15); - break; - case ETMACTRn(0): - etm_write(val, ETMACTR0); - break; - case ETMACTRn(1): - etm_write(val, ETMACTR1); - break; - case ETMACTRn(2): - etm_write(val, ETMACTR2); - break; - case ETMACTRn(3): - etm_write(val, ETMACTR3); - break; - case ETMACTRn(4): - etm_write(val, ETMACTR4); - break; - case ETMACTRn(5): - etm_write(val, ETMACTR5); - break; - case ETMACTRn(6): - etm_write(val, ETMACTR6); - break; - case ETMACTRn(7): - etm_write(val, ETMACTR7); - break; - case ETMACTRn(8): - etm_write(val, ETMACTR8); - break; - case ETMACTRn(9): - etm_write(val, ETMACTR9); - break; - case ETMACTRn(10): - etm_write(val, ETMACTR10); - break; - case ETMACTRn(11): - etm_write(val, ETMACTR11); - break; - case ETMACTRn(12): - etm_write(val, ETMACTR12); - break; - case ETMACTRn(13): - etm_write(val, ETMACTR13); - break; - case ETMACTRn(14): - etm_write(val, ETMACTR14); - break; - case ETMACTRn(15): - etm_write(val, ETMACTR15); - break; - case ETMCNTRLDVRn(0): - etm_write(val, ETMCNTRLDVR0); - break; - case ETMCNTRLDVRn(1): - etm_write(val, ETMCNTRLDVR1); - break; - case ETMCNTRLDVRn(2): - etm_write(val, ETMCNTRLDVR2); - break; - case ETMCNTRLDVRn(3): - etm_write(val, ETMCNTRLDVR3); - break; - case ETMCNTENRn(0): - etm_write(val, ETMCNTENR0); - break; - case ETMCNTENRn(1): - etm_write(val, ETMCNTENR1); - break; - case ETMCNTENRn(2): - etm_write(val, ETMCNTENR2); - break; - case ETMCNTENRn(3): - etm_write(val, ETMCNTENR3); - break; - case ETMCNTRLDEVRn(0): - etm_write(val, ETMCNTRLDEVR0); - break; - case ETMCNTRLDEVRn(1): - etm_write(val, ETMCNTRLDEVR1); - break; - case ETMCNTRLDEVRn(2): - etm_write(val, ETMCNTRLDEVR2); - break; - case ETMCNTRLDEVRn(3): - etm_write(val, ETMCNTRLDEVR3); - break; - case ETMCNTVRn(0): - etm_write(val, ETMCNTVR0); - break; - case ETMCNTVRn(1): - etm_write(val, ETMCNTVR1); - break; - case ETMCNTVRn(2): - etm_write(val, ETMCNTVR2); - break; - case ETMCNTVRn(3): - etm_write(val, ETMCNTVR3); - break; - case ETMSQ12EVR: - etm_write(val, ETMSQ12EVR); - break; - case ETMSQ21EVR: - etm_write(val, ETMSQ21EVR); - break; - case ETMSQ23EVR: - etm_write(val, ETMSQ23EVR); - break; - case ETMSQ31EVR: - etm_write(val, ETMSQ31EVR); - break; - case ETMSQ32EVR: - etm_write(val, ETMSQ32EVR); - break; - case ETMSQ13EVR: - etm_write(val, ETMSQ13EVR); - break; - case ETMSQR: - etm_write(val, ETMSQR); - break; - case ETMEXTOUTEVRn(0): - etm_write(val, ETMEXTOUTEVR0); - break; - case ETMEXTOUTEVRn(1): - etm_write(val, ETMEXTOUTEVR1); - break; - case ETMEXTOUTEVRn(2): - etm_write(val, ETMEXTOUTEVR2); - break; - case ETMEXTOUTEVRn(3): - etm_write(val, ETMEXTOUTEVR3); - break; - case ETMCIDCVRn(0): - etm_write(val, ETMCIDCVR0); - break; - case ETMCIDCVRn(1): - etm_write(val, ETMCIDCVR1); - break; - case ETMCIDCVRn(2): - etm_write(val, ETMCIDCVR2); - break; - case ETMCIDCMR: - etm_write(val, ETMCIDCMR); - break; - case ETMIMPSPEC0: - etm_write(val, ETMIMPSPEC0); - break; - case ETMIMPSPEC1: - etm_write(val, ETMIMPSPEC1); - break; - case ETMIMPSPEC2: - etm_write(val, ETMIMPSPEC2); - break; - case ETMIMPSPEC3: - etm_write(val, ETMIMPSPEC3); - break; - case ETMIMPSPEC4: - etm_write(val, ETMIMPSPEC4); - break; - case ETMIMPSPEC5: - etm_write(val, ETMIMPSPEC5); - break; - case ETMIMPSPEC6: - etm_write(val, ETMIMPSPEC6); - break; - case ETMIMPSPEC7: - etm_write(val, ETMIMPSPEC7); - break; - case ETMSYNCFR: - etm_write(val, ETMSYNCFR); - break; - case ETMEXTINSELR: - etm_write(val, ETMEXTINSELR); - break; - case ETMTESSEICR: - etm_write(val, ETMTESSEICR); - break; - case ETMEIBCR: - etm_write(val, ETMEIBCR); - break; - case ETMTSEVR: - etm_write(val, ETMTSEVR); - break; - case ETMAUXCR: - etm_write(val, ETMAUXCR); - break; - case ETMTRACEIDR: - etm_write(val, ETMTRACEIDR); - break; - case ETMVMIDCVR: - etm_write(val, ETMVMIDCVR); - break; - case ETMOSLAR: - etm_write(val, ETMOSLAR); - break; - case ETMOSSRR: - etm_write(val, ETMOSSRR); - break; - case ETMPDCR: - etm_write(val, ETMPDCR); - break; - case ETMPDSR: - etm_write(val, ETMPDSR); - break; - default: - return -EINVAL; - } - - return 0; -} diff --git a/drivers/coresight/coresight-etm.h b/drivers/coresight/coresight-etm.h deleted file mode 100644 index 501c5fac8a45..000000000000 --- a/drivers/coresight/coresight-etm.h +++ /dev/null @@ -1,251 +0,0 @@ -/* Copyright (c) 2014-2015, The Linux Foundation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef _CORESIGHT_CORESIGHT_ETM_H -#define _CORESIGHT_CORESIGHT_ETM_H - -#include -#include "coresight-priv.h" - -/* - * Device registers: - * 0x000 - 0x2FC: Trace registers - * 0x300 - 0x314: Management registers - * 0x318 - 0xEFC: Trace registers - * - * Coresight registers - * 0xF00 - 0xF9C: Management registers - * 0xFA0 - 0xFA4: Management registers in PFTv1.0 - * Trace registers in PFTv1.1 - * 0xFA8 - 0xFFC: Management registers - */ - -/* Trace registers (0x000-0x2FC) */ -#define ETMCR 0x000 -#define ETMCCR 0x004 -#define ETMTRIGGER 0x008 -#define ETMSR 0x010 -#define ETMSCR 0x014 -#define ETMTSSCR 0x018 -#define ETMTECR2 0x01c -#define ETMTEEVR 0x020 -#define ETMTECR1 0x024 -#define ETMFFLR 0x02c -#define ETMACVRn(n) (0x040 + (n * 4)) -#define ETMACTRn(n) (0x080 + (n * 4)) -#define ETMCNTRLDVRn(n) (0x140 + (n * 4)) -#define ETMCNTENRn(n) (0x150 + (n * 4)) -#define ETMCNTRLDEVRn(n) (0x160 + (n * 4)) -#define ETMCNTVRn(n) (0x170 + (n * 4)) -#define ETMSQ12EVR 0x180 -#define ETMSQ21EVR 0x184 -#define ETMSQ23EVR 0x188 -#define ETMSQ31EVR 0x18c -#define ETMSQ32EVR 0x190 -#define ETMSQ13EVR 0x194 -#define ETMSQR 0x19c -#define ETMEXTOUTEVRn(n) (0x1a0 + (n * 4)) -#define ETMCIDCVRn(n) (0x1b0 + (n * 4)) -#define ETMCIDCMR 0x1bc -#define ETMIMPSPEC0 0x1c0 -#define ETMIMPSPEC1 0x1c4 -#define ETMIMPSPEC2 0x1c8 -#define ETMIMPSPEC3 0x1cc -#define ETMIMPSPEC4 0x1d0 -#define ETMIMPSPEC5 0x1d4 -#define ETMIMPSPEC6 0x1d8 -#define ETMIMPSPEC7 0x1dc -#define ETMSYNCFR 0x1e0 -#define ETMIDR 0x1e4 -#define ETMCCER 0x1e8 -#define ETMEXTINSELR 0x1ec -#define ETMTESSEICR 0x1f0 -#define ETMEIBCR 0x1f4 -#define ETMTSEVR 0x1f8 -#define ETMAUXCR 0x1fc -#define ETMTRACEIDR 0x200 -#define ETMVMIDCVR 0x240 -/* Management registers (0x300-0x314) */ -#define ETMOSLAR 0x300 -#define ETMOSLSR 0x304 -#define ETMOSSRR 0x308 -#define ETMPDCR 0x310 -#define ETMPDSR 0x314 -#define ETM_MAX_ADDR_CMP 16 -#define ETM_MAX_CNTR 4 -#define ETM_MAX_CTXID_CMP 3 - -/* Register definition */ -/* ETMCR - 0x00 */ -#define ETMCR_PWD_DWN BIT(0) -#define ETMCR_STALL_MODE BIT(7) -#define ETMCR_ETM_PRG BIT(10) -#define ETMCR_ETM_EN BIT(11) -#define ETMCR_CYC_ACC BIT(12) -#define ETMCR_CTXID_SIZE (BIT(14)|BIT(15)) -#define ETMCR_TIMESTAMP_EN BIT(28) -/* ETMCCR - 0x04 */ -#define ETMCCR_FIFOFULL BIT(23) -/* ETMPDCR - 0x310 */ -#define ETMPDCR_PWD_UP BIT(3) -/* ETMTECR1 - 0x024 */ -#define ETMTECR1_ADDR_COMP_1 BIT(0) -#define ETMTECR1_INC_EXC BIT(24) -#define ETMTECR1_START_STOP BIT(25) -/* ETMCCER - 0x1E8 */ -#define ETMCCER_TIMESTAMP BIT(22) - -#define ETM_MODE_EXCLUDE BIT(0) -#define ETM_MODE_CYCACC BIT(1) -#define ETM_MODE_STALL BIT(2) -#define ETM_MODE_TIMESTAMP BIT(3) -#define ETM_MODE_CTXID BIT(4) -#define ETM_MODE_ALL 0x1f - -#define ETM_SQR_MASK 0x3 -#define ETM_TRACEID_MASK 0x3f -#define ETM_EVENT_MASK 0x1ffff -#define ETM_SYNC_MASK 0xfff -#define ETM_ALL_MASK 0xffffffff - -#define ETMSR_PROG_BIT 1 -#define ETM_SEQ_STATE_MAX_VAL (0x2) -#define PORT_SIZE_MASK (GENMASK(21, 21) | GENMASK(6, 4)) - -#define ETM_HARD_WIRE_RES_A /* Hard wired, always true */ \ - ((0x0f << 0) | \ - /* Resource index A */ \ - (0x06 << 4)) - -#define ETM_ADD_COMP_0 /* Single addr comparator 1 */ \ - ((0x00 << 7) | \ - /* Resource index B */ \ - (0x00 << 11)) - -#define ETM_EVENT_NOT_A BIT(14) /* NOT(A) */ - -#define ETM_DEFAULT_EVENT_VAL (ETM_HARD_WIRE_RES_A | \ - ETM_ADD_COMP_0 | \ - ETM_EVENT_NOT_A) -/** - * struct etm_drvdata - specifics associated to an ETM component - * @base: memory mapped base address for this component. - * @dev: the device entity associated to this component. - * @csdev: component vitals needed by the framework. - * @clk: the clock this component is associated to. - * @spinlock: only one at a time pls. - * @cpu: the cpu this component is affined to. - * @port_size: port size as reported by ETMCR bit 4-6 and 21. - * @arch: ETM/PTM version number. - * @use_cpu14: true if management registers need to be accessed via CP14. - * @enable: is this ETM/PTM currently tracing. - * @sticky_enable: true if ETM base configuration has been done. - * @boot_enable:true if we should start tracing at boot time. - * @os_unlock: true if access to management registers is allowed. - * @nr_addr_cmp:Number of pairs of address comparators as found in ETMCCR. - * @nr_cntr: Number of counters as found in ETMCCR bit 13-15. - * @nr_ext_inp: Number of external input as found in ETMCCR bit 17-19. - * @nr_ext_out: Number of external output as found in ETMCCR bit 20-22. - * @nr_ctxid_cmp: Number of contextID comparators as found in ETMCCR bit 24-25. - * @etmccr: value of register ETMCCR. - * @etmccer: value of register ETMCCER. - * @traceid: value of the current ID for this component. - * @mode: controls various modes supported by this ETM/PTM. - * @ctrl: used in conjunction with @mode. - * @trigger_event: setting for register ETMTRIGGER. - * @startstop_ctrl: setting for register ETMTSSCR. - * @enable_event: setting for register ETMTEEVR. - * @enable_ctrl1: setting for register ETMTECR1. - * @fifofull_level: setting for register ETMFFLR. - * @addr_idx: index for the address comparator selection. - * @addr_val: value for address comparator register. - * @addr_acctype: access type for address comparator register. - * @addr_type: current status of the comparator register. - * @cntr_idx: index for the counter register selection. - * @cntr_rld_val: reload value of a counter register. - * @cntr_event: control for counter enable register. - * @cntr_rld_event: value for counter reload event register. - * @cntr_val: counter value register. - * @seq_12_event: event causing the transition from 1 to 2. - * @seq_21_event: event causing the transition from 2 to 1. - * @seq_23_event: event causing the transition from 2 to 3. - * @seq_31_event: event causing the transition from 3 to 1. - * @seq_32_event: event causing the transition from 3 to 2. - * @seq_13_event: event causing the transition from 1 to 3. - * @seq_curr_state: current value of the sequencer register. - * @ctxid_idx: index for the context ID registers. - * @ctxid_val: value for the context ID to trigger on. - * @ctxid_mask: mask applicable to all the context IDs. - * @sync_freq: Synchronisation frequency. - * @timestamp_event: Defines an event that requests the insertion - of a timestamp into the trace stream. - */ -struct etm_drvdata { - void __iomem *base; - struct device *dev; - struct coresight_device *csdev; - struct clk *clk; - spinlock_t spinlock; - int cpu; - int port_size; - u8 arch; - bool use_cp14; - bool enable; - bool sticky_enable; - bool boot_enable; - bool os_unlock; - u8 nr_addr_cmp; - u8 nr_cntr; - u8 nr_ext_inp; - u8 nr_ext_out; - u8 nr_ctxid_cmp; - u32 etmccr; - u32 etmccer; - u32 traceid; - u32 mode; - u32 ctrl; - u32 trigger_event; - u32 startstop_ctrl; - u32 enable_event; - u32 enable_ctrl1; - u32 fifofull_level; - u8 addr_idx; - u32 addr_val[ETM_MAX_ADDR_CMP]; - u32 addr_acctype[ETM_MAX_ADDR_CMP]; - u32 addr_type[ETM_MAX_ADDR_CMP]; - u8 cntr_idx; - u32 cntr_rld_val[ETM_MAX_CNTR]; - u32 cntr_event[ETM_MAX_CNTR]; - u32 cntr_rld_event[ETM_MAX_CNTR]; - u32 cntr_val[ETM_MAX_CNTR]; - u32 seq_12_event; - u32 seq_21_event; - u32 seq_23_event; - u32 seq_31_event; - u32 seq_32_event; - u32 seq_13_event; - u32 seq_curr_state; - u8 ctxid_idx; - u32 ctxid_val[ETM_MAX_CTXID_CMP]; - u32 ctxid_mask; - u32 sync_freq; - u32 timestamp_event; -}; - -enum etm_addr_type { - ETM_ADDR_TYPE_NONE, - ETM_ADDR_TYPE_SINGLE, - ETM_ADDR_TYPE_RANGE, - ETM_ADDR_TYPE_START, - ETM_ADDR_TYPE_STOP, -}; -#endif diff --git a/drivers/coresight/coresight-etm3x.c b/drivers/coresight/coresight-etm3x.c deleted file mode 100644 index c965f5724abd..000000000000 --- a/drivers/coresight/coresight-etm3x.c +++ /dev/null @@ -1,1932 +0,0 @@ -/* Copyright (c) 2011-2012, The Linux Foundation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include "coresight-etm.h" - -static int boot_enable; -module_param_named(boot_enable, boot_enable, int, S_IRUGO); - -/* The number of ETM/PTM currently registered */ -static int etm_count; -static struct etm_drvdata *etmdrvdata[NR_CPUS]; - -static inline void etm_writel(struct etm_drvdata *drvdata, - u32 val, u32 off) -{ - if (drvdata->use_cp14) { - if (etm_writel_cp14(off, val)) { - dev_err(drvdata->dev, - "invalid CP14 access to ETM reg: %#x", off); - } - } else { - writel_relaxed(val, drvdata->base + off); - } -} - -static inline unsigned int etm_readl(struct etm_drvdata *drvdata, u32 off) -{ - u32 val; - - if (drvdata->use_cp14) { - if (etm_readl_cp14(off, &val)) { - dev_err(drvdata->dev, - "invalid CP14 access to ETM reg: %#x", off); - } - } else { - val = readl_relaxed(drvdata->base + off); - } - - return val; -} - -/* - * Memory mapped writes to clear os lock are not supported on some processors - * and OS lock must be unlocked before any memory mapped access on such - * processors, otherwise memory mapped reads/writes will be invalid. - */ -static void etm_os_unlock(void *info) -{ - struct etm_drvdata *drvdata = (struct etm_drvdata *)info; - /* Writing any value to ETMOSLAR unlocks the trace registers */ - etm_writel(drvdata, 0x0, ETMOSLAR); - isb(); -} - -static void etm_set_pwrdwn(struct etm_drvdata *drvdata) -{ - u32 etmcr; - - /* Ensure pending cp14 accesses complete before setting pwrdwn */ - mb(); - isb(); - etmcr = etm_readl(drvdata, ETMCR); - etmcr |= ETMCR_PWD_DWN; - etm_writel(drvdata, etmcr, ETMCR); -} - -static void etm_clr_pwrdwn(struct etm_drvdata *drvdata) -{ - u32 etmcr; - - etmcr = etm_readl(drvdata, ETMCR); - etmcr &= ~ETMCR_PWD_DWN; - etm_writel(drvdata, etmcr, ETMCR); - /* Ensure pwrup completes before subsequent cp14 accesses */ - mb(); - isb(); -} - -static void etm_set_pwrup(struct etm_drvdata *drvdata) -{ - u32 etmpdcr; - - etmpdcr = readl_relaxed(drvdata->base + ETMPDCR); - etmpdcr |= ETMPDCR_PWD_UP; - writel_relaxed(etmpdcr, drvdata->base + ETMPDCR); - /* Ensure pwrup completes before subsequent cp14 accesses */ - mb(); - isb(); -} - -static void etm_clr_pwrup(struct etm_drvdata *drvdata) -{ - u32 etmpdcr; - - /* Ensure pending cp14 accesses complete before clearing pwrup */ - mb(); - isb(); - etmpdcr = readl_relaxed(drvdata->base + ETMPDCR); - etmpdcr &= ~ETMPDCR_PWD_UP; - writel_relaxed(etmpdcr, drvdata->base + ETMPDCR); -} - -/** - * coresight_timeout_etm - loop until a bit has changed to a specific state. - * @drvdata: etm's private data structure. - * @offset: address of a register, starting from @addr. - * @position: the position of the bit of interest. - * @value: the value the bit should have. - * - * Basically the same as @coresight_timeout except for the register access - * method where we have to account for CP14 configurations. - - * Return: 0 as soon as the bit has taken the desired state or -EAGAIN if - * TIMEOUT_US has elapsed, which ever happens first. - */ - -static int coresight_timeout_etm(struct etm_drvdata *drvdata, u32 offset, - int position, int value) -{ - int i; - u32 val; - - for (i = TIMEOUT_US; i > 0; i--) { - val = etm_readl(drvdata, offset); - /* Waiting on the bit to go from 0 to 1 */ - if (value) { - if (val & BIT(position)) - return 0; - /* Waiting on the bit to go from 1 to 0 */ - } else { - if (!(val & BIT(position))) - return 0; - } - - /* - * Delay is arbitrary - the specification doesn't say how long - * we are expected to wait. Extra check required to make sure - * we don't wait needlessly on the last iteration. - */ - if (i - 1) - udelay(1); - } - - return -EAGAIN; -} - - -static void etm_set_prog(struct etm_drvdata *drvdata) -{ - u32 etmcr; - - etmcr = etm_readl(drvdata, ETMCR); - etmcr |= ETMCR_ETM_PRG; - etm_writel(drvdata, etmcr, ETMCR); - /* - * Recommended by spec for cp14 accesses to ensure etmcr write is - * complete before polling etmsr - */ - isb(); - if (coresight_timeout_etm(drvdata, ETMSR, ETMSR_PROG_BIT, 1)) { - dev_err(drvdata->dev, - "timeout observed when probing at offset %#x\n", ETMSR); - } -} - -static void etm_clr_prog(struct etm_drvdata *drvdata) -{ - u32 etmcr; - - etmcr = etm_readl(drvdata, ETMCR); - etmcr &= ~ETMCR_ETM_PRG; - etm_writel(drvdata, etmcr, ETMCR); - /* - * Recommended by spec for cp14 accesses to ensure etmcr write is - * complete before polling etmsr - */ - isb(); - if (coresight_timeout_etm(drvdata, ETMSR, ETMSR_PROG_BIT, 0)) { - dev_err(drvdata->dev, - "timeout observed when probing at offset %#x\n", ETMSR); - } -} - -static void etm_set_default(struct etm_drvdata *drvdata) -{ - int i; - - drvdata->trigger_event = ETM_DEFAULT_EVENT_VAL; - drvdata->enable_event = ETM_HARD_WIRE_RES_A; - - drvdata->seq_12_event = ETM_DEFAULT_EVENT_VAL; - drvdata->seq_21_event = ETM_DEFAULT_EVENT_VAL; - drvdata->seq_23_event = ETM_DEFAULT_EVENT_VAL; - drvdata->seq_31_event = ETM_DEFAULT_EVENT_VAL; - drvdata->seq_32_event = ETM_DEFAULT_EVENT_VAL; - drvdata->seq_13_event = ETM_DEFAULT_EVENT_VAL; - drvdata->timestamp_event = ETM_DEFAULT_EVENT_VAL; - - for (i = 0; i < drvdata->nr_cntr; i++) { - drvdata->cntr_rld_val[i] = 0x0; - drvdata->cntr_event[i] = ETM_DEFAULT_EVENT_VAL; - drvdata->cntr_rld_event[i] = ETM_DEFAULT_EVENT_VAL; - drvdata->cntr_val[i] = 0x0; - } - - drvdata->seq_curr_state = 0x0; - drvdata->ctxid_idx = 0x0; - for (i = 0; i < drvdata->nr_ctxid_cmp; i++) - drvdata->ctxid_val[i] = 0x0; - drvdata->ctxid_mask = 0x0; -} - -static void etm_enable_hw(void *info) -{ - int i; - u32 etmcr; - struct etm_drvdata *drvdata = info; - - CS_UNLOCK(drvdata->base); - - /* Turn engine on */ - etm_clr_pwrdwn(drvdata); - /* Apply power to trace registers */ - etm_set_pwrup(drvdata); - /* Make sure all registers are accessible */ - etm_os_unlock(drvdata); - - etm_set_prog(drvdata); - - etmcr = etm_readl(drvdata, ETMCR); - etmcr &= (ETMCR_PWD_DWN | ETMCR_ETM_PRG); - etmcr |= drvdata->port_size; - etm_writel(drvdata, drvdata->ctrl | etmcr, ETMCR); - etm_writel(drvdata, drvdata->trigger_event, ETMTRIGGER); - etm_writel(drvdata, drvdata->startstop_ctrl, ETMTSSCR); - etm_writel(drvdata, drvdata->enable_event, ETMTEEVR); - etm_writel(drvdata, drvdata->enable_ctrl1, ETMTECR1); - etm_writel(drvdata, drvdata->fifofull_level, ETMFFLR); - for (i = 0; i < drvdata->nr_addr_cmp; i++) { - etm_writel(drvdata, drvdata->addr_val[i], ETMACVRn(i)); - etm_writel(drvdata, drvdata->addr_acctype[i], ETMACTRn(i)); - } - for (i = 0; i < drvdata->nr_cntr; i++) { - etm_writel(drvdata, drvdata->cntr_rld_val[i], ETMCNTRLDVRn(i)); - etm_writel(drvdata, drvdata->cntr_event[i], ETMCNTENRn(i)); - etm_writel(drvdata, drvdata->cntr_rld_event[i], - ETMCNTRLDEVRn(i)); - etm_writel(drvdata, drvdata->cntr_val[i], ETMCNTVRn(i)); - } - etm_writel(drvdata, drvdata->seq_12_event, ETMSQ12EVR); - etm_writel(drvdata, drvdata->seq_21_event, ETMSQ21EVR); - etm_writel(drvdata, drvdata->seq_23_event, ETMSQ23EVR); - etm_writel(drvdata, drvdata->seq_31_event, ETMSQ31EVR); - etm_writel(drvdata, drvdata->seq_32_event, ETMSQ32EVR); - etm_writel(drvdata, drvdata->seq_13_event, ETMSQ13EVR); - etm_writel(drvdata, drvdata->seq_curr_state, ETMSQR); - for (i = 0; i < drvdata->nr_ext_out; i++) - etm_writel(drvdata, ETM_DEFAULT_EVENT_VAL, ETMEXTOUTEVRn(i)); - for (i = 0; i < drvdata->nr_ctxid_cmp; i++) - etm_writel(drvdata, drvdata->ctxid_val[i], ETMCIDCVRn(i)); - etm_writel(drvdata, drvdata->ctxid_mask, ETMCIDCMR); - etm_writel(drvdata, drvdata->sync_freq, ETMSYNCFR); - /* No external input selected */ - etm_writel(drvdata, 0x0, ETMEXTINSELR); - etm_writel(drvdata, drvdata->timestamp_event, ETMTSEVR); - /* No auxiliary control selected */ - etm_writel(drvdata, 0x0, ETMAUXCR); - etm_writel(drvdata, drvdata->traceid, ETMTRACEIDR); - /* No VMID comparator value selected */ - etm_writel(drvdata, 0x0, ETMVMIDCVR); - - /* Ensures trace output is enabled from this ETM */ - etm_writel(drvdata, drvdata->ctrl | ETMCR_ETM_EN | etmcr, ETMCR); - - etm_clr_prog(drvdata); - CS_LOCK(drvdata->base); - - dev_dbg(drvdata->dev, "cpu: %d enable smp call done\n", drvdata->cpu); -} - -static int etm_trace_id_simple(struct etm_drvdata *drvdata) -{ - if (!drvdata->enable) - return drvdata->traceid; - - return (etm_readl(drvdata, ETMTRACEIDR) & ETM_TRACEID_MASK); -} - -static int etm_trace_id(struct coresight_device *csdev) -{ - struct etm_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); - unsigned long flags; - int trace_id = -1; - - if (!drvdata->enable) - return drvdata->traceid; - - if (clk_prepare_enable(drvdata->clk)) - goto out; - - spin_lock_irqsave(&drvdata->spinlock, flags); - - CS_UNLOCK(drvdata->base); - trace_id = (etm_readl(drvdata, ETMTRACEIDR) & ETM_TRACEID_MASK); - CS_LOCK(drvdata->base); - - spin_unlock_irqrestore(&drvdata->spinlock, flags); - clk_disable_unprepare(drvdata->clk); -out: - return trace_id; -} - -static int etm_enable(struct coresight_device *csdev) -{ - struct etm_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); - int ret; - - ret = clk_prepare_enable(drvdata->clk); - if (ret) - goto err_clk; - - spin_lock(&drvdata->spinlock); - - /* - * Configure the ETM only if the CPU is online. If it isn't online - * hw configuration will take place when 'CPU_STARTING' is received - * in @etm_cpu_callback. - */ - if (cpu_online(drvdata->cpu)) { - ret = smp_call_function_single(drvdata->cpu, - etm_enable_hw, drvdata, 1); - if (ret) - goto err; - } - - drvdata->enable = true; - drvdata->sticky_enable = true; - - spin_unlock(&drvdata->spinlock); - - dev_info(drvdata->dev, "ETM tracing enabled\n"); - return 0; -err: - spin_unlock(&drvdata->spinlock); - clk_disable_unprepare(drvdata->clk); -err_clk: - return ret; -} - -static void etm_disable_hw(void *info) -{ - int i; - struct etm_drvdata *drvdata = info; - - CS_UNLOCK(drvdata->base); - etm_set_prog(drvdata); - - /* Program trace enable to low by using always false event */ - etm_writel(drvdata, ETM_HARD_WIRE_RES_A | ETM_EVENT_NOT_A, ETMTEEVR); - - /* Read back sequencer and counters for post trace analysis */ - drvdata->seq_curr_state = (etm_readl(drvdata, ETMSQR) & ETM_SQR_MASK); - - for (i = 0; i < drvdata->nr_cntr; i++) - drvdata->cntr_val[i] = etm_readl(drvdata, ETMCNTVRn(i)); - - etm_set_pwrdwn(drvdata); - CS_LOCK(drvdata->base); - - dev_dbg(drvdata->dev, "cpu: %d disable smp call done\n", drvdata->cpu); -} - -static void etm_disable(struct coresight_device *csdev) -{ - struct etm_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); - - /* - * Taking hotplug lock here protects from clocks getting disabled - * with tracing being left on (crash scenario) if user disable occurs - * after cpu online mask indicates the cpu is offline but before the - * DYING hotplug callback is serviced by the ETM driver. - */ - get_online_cpus(); - spin_lock(&drvdata->spinlock); - - /* - * Executing etm_disable_hw on the cpu whose ETM is being disabled - * ensures that register writes occur when cpu is powered. - */ - smp_call_function_single(drvdata->cpu, etm_disable_hw, drvdata, 1); - drvdata->enable = false; - - spin_unlock(&drvdata->spinlock); - put_online_cpus(); - - clk_disable_unprepare(drvdata->clk); - - dev_info(drvdata->dev, "ETM tracing disabled\n"); -} - -static const struct coresight_ops_source etm_source_ops = { - .trace_id = etm_trace_id, - .enable = etm_enable, - .disable = etm_disable, -}; - -static const struct coresight_ops etm_cs_ops = { - .source_ops = &etm_source_ops, -}; - -static ssize_t nr_addr_cmp_show(struct device *dev, - struct device_attribute *attr, char *buf) -{ - unsigned long val; - struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); - - val = drvdata->nr_addr_cmp; - return sprintf(buf, "%#lx\n", val); -} -static DEVICE_ATTR_RO(nr_addr_cmp); - -static ssize_t nr_cntr_show(struct device *dev, - struct device_attribute *attr, char *buf) -{ unsigned long val; - struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); - - val = drvdata->nr_cntr; - return sprintf(buf, "%#lx\n", val); -} -static DEVICE_ATTR_RO(nr_cntr); - -static ssize_t nr_ctxid_cmp_show(struct device *dev, - struct device_attribute *attr, char *buf) -{ - unsigned long val; - struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); - - val = drvdata->nr_ctxid_cmp; - return sprintf(buf, "%#lx\n", val); -} -static DEVICE_ATTR_RO(nr_ctxid_cmp); - -static ssize_t etmsr_show(struct device *dev, - struct device_attribute *attr, char *buf) -{ - int ret; - unsigned long flags, val; - struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); - - ret = clk_prepare_enable(drvdata->clk); - if (ret) - return ret; - - spin_lock_irqsave(&drvdata->spinlock, flags); - CS_UNLOCK(drvdata->base); - - val = etm_readl(drvdata, ETMSR); - - CS_LOCK(drvdata->base); - spin_unlock_irqrestore(&drvdata->spinlock, flags); - clk_disable_unprepare(drvdata->clk); - - return sprintf(buf, "%#lx\n", val); -} -static DEVICE_ATTR_RO(etmsr); - -static ssize_t reset_store(struct device *dev, - struct device_attribute *attr, - const char *buf, size_t size) -{ - int i, ret; - unsigned long val; - struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); - - ret = kstrtoul(buf, 16, &val); - if (ret) - return ret; - - if (val) { - spin_lock(&drvdata->spinlock); - drvdata->mode = ETM_MODE_EXCLUDE; - drvdata->ctrl = 0x0; - drvdata->trigger_event = ETM_DEFAULT_EVENT_VAL; - drvdata->startstop_ctrl = 0x0; - drvdata->addr_idx = 0x0; - for (i = 0; i < drvdata->nr_addr_cmp; i++) { - drvdata->addr_val[i] = 0x0; - drvdata->addr_acctype[i] = 0x0; - drvdata->addr_type[i] = ETM_ADDR_TYPE_NONE; - } - drvdata->cntr_idx = 0x0; - - etm_set_default(drvdata); - spin_unlock(&drvdata->spinlock); - } - - return size; -} -static DEVICE_ATTR_WO(reset); - -static ssize_t mode_show(struct device *dev, - struct device_attribute *attr, char *buf) -{ - unsigned long val; - struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); - - val = drvdata->mode; - return sprintf(buf, "%#lx\n", val); -} - -static ssize_t mode_store(struct device *dev, - struct device_attribute *attr, - const char *buf, size_t size) -{ - int ret; - unsigned long val; - struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); - - ret = kstrtoul(buf, 16, &val); - if (ret) - return ret; - - spin_lock(&drvdata->spinlock); - drvdata->mode = val & ETM_MODE_ALL; - - if (drvdata->mode & ETM_MODE_EXCLUDE) - drvdata->enable_ctrl1 |= ETMTECR1_INC_EXC; - else - drvdata->enable_ctrl1 &= ~ETMTECR1_INC_EXC; - - if (drvdata->mode & ETM_MODE_CYCACC) - drvdata->ctrl |= ETMCR_CYC_ACC; - else - drvdata->ctrl &= ~ETMCR_CYC_ACC; - - if (drvdata->mode & ETM_MODE_STALL) { - if (!(drvdata->etmccr & ETMCCR_FIFOFULL)) { - dev_warn(drvdata->dev, "stall mode not supported\n"); - ret = -EINVAL; - goto err_unlock; - } - drvdata->ctrl |= ETMCR_STALL_MODE; - } else - drvdata->ctrl &= ~ETMCR_STALL_MODE; - - if (drvdata->mode & ETM_MODE_TIMESTAMP) { - if (!(drvdata->etmccer & ETMCCER_TIMESTAMP)) { - dev_warn(drvdata->dev, "timestamp not supported\n"); - ret = -EINVAL; - goto err_unlock; - } - drvdata->ctrl |= ETMCR_TIMESTAMP_EN; - } else - drvdata->ctrl &= ~ETMCR_TIMESTAMP_EN; - - if (drvdata->mode & ETM_MODE_CTXID) - drvdata->ctrl |= ETMCR_CTXID_SIZE; - else - drvdata->ctrl &= ~ETMCR_CTXID_SIZE; - spin_unlock(&drvdata->spinlock); - - return size; - -err_unlock: - spin_unlock(&drvdata->spinlock); - return ret; -} -static DEVICE_ATTR_RW(mode); - -static ssize_t trigger_event_show(struct device *dev, - struct device_attribute *attr, char *buf) -{ - unsigned long val; - struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); - - val = drvdata->trigger_event; - return sprintf(buf, "%#lx\n", val); -} - -static ssize_t trigger_event_store(struct device *dev, - struct device_attribute *attr, - const char *buf, size_t size) -{ - int ret; - unsigned long val; - struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); - - ret = kstrtoul(buf, 16, &val); - if (ret) - return ret; - - drvdata->trigger_event = val & ETM_EVENT_MASK; - - return size; -} -static DEVICE_ATTR_RW(trigger_event); - -static ssize_t enable_event_show(struct device *dev, - struct device_attribute *attr, char *buf) -{ - unsigned long val; - struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); - - val = drvdata->enable_event; - return sprintf(buf, "%#lx\n", val); -} - -static ssize_t enable_event_store(struct device *dev, - struct device_attribute *attr, - const char *buf, size_t size) -{ - int ret; - unsigned long val; - struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); - - ret = kstrtoul(buf, 16, &val); - if (ret) - return ret; - - drvdata->enable_event = val & ETM_EVENT_MASK; - - return size; -} -static DEVICE_ATTR_RW(enable_event); - -static ssize_t fifofull_level_show(struct device *dev, - struct device_attribute *attr, char *buf) -{ - unsigned long val; - struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); - - val = drvdata->fifofull_level; - return sprintf(buf, "%#lx\n", val); -} - -static ssize_t fifofull_level_store(struct device *dev, - struct device_attribute *attr, - const char *buf, size_t size) -{ - int ret; - unsigned long val; - struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); - - ret = kstrtoul(buf, 16, &val); - if (ret) - return ret; - - drvdata->fifofull_level = val; - - return size; -} -static DEVICE_ATTR_RW(fifofull_level); - -static ssize_t addr_idx_show(struct device *dev, - struct device_attribute *attr, char *buf) -{ - unsigned long val; - struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); - - val = drvdata->addr_idx; - return sprintf(buf, "%#lx\n", val); -} - -static ssize_t addr_idx_store(struct device *dev, - struct device_attribute *attr, - const char *buf, size_t size) -{ - int ret; - unsigned long val; - struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); - - ret = kstrtoul(buf, 16, &val); - if (ret) - return ret; - - if (val >= drvdata->nr_addr_cmp) - return -EINVAL; - - /* - * Use spinlock to ensure index doesn't change while it gets - * dereferenced multiple times within a spinlock block elsewhere. - */ - spin_lock(&drvdata->spinlock); - drvdata->addr_idx = val; - spin_unlock(&drvdata->spinlock); - - return size; -} -static DEVICE_ATTR_RW(addr_idx); - -static ssize_t addr_single_show(struct device *dev, - struct device_attribute *attr, char *buf) -{ - u8 idx; - unsigned long val; - struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); - - spin_lock(&drvdata->spinlock); - idx = drvdata->addr_idx; - if (!(drvdata->addr_type[idx] == ETM_ADDR_TYPE_NONE || - drvdata->addr_type[idx] == ETM_ADDR_TYPE_SINGLE)) { - spin_unlock(&drvdata->spinlock); - return -EINVAL; - } - - val = drvdata->addr_val[idx]; - spin_unlock(&drvdata->spinlock); - - return sprintf(buf, "%#lx\n", val); -} - -static ssize_t addr_single_store(struct device *dev, - struct device_attribute *attr, - const char *buf, size_t size) -{ - u8 idx; - int ret; - unsigned long val; - struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); - - ret = kstrtoul(buf, 16, &val); - if (ret) - return ret; - - spin_lock(&drvdata->spinlock); - idx = drvdata->addr_idx; - if (!(drvdata->addr_type[idx] == ETM_ADDR_TYPE_NONE || - drvdata->addr_type[idx] == ETM_ADDR_TYPE_SINGLE)) { - spin_unlock(&drvdata->spinlock); - return -EINVAL; - } - - drvdata->addr_val[idx] = val; - drvdata->addr_type[idx] = ETM_ADDR_TYPE_SINGLE; - spin_unlock(&drvdata->spinlock); - - return size; -} -static DEVICE_ATTR_RW(addr_single); - -static ssize_t addr_range_show(struct device *dev, - struct device_attribute *attr, char *buf) -{ - u8 idx; - unsigned long val1, val2; - struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); - - spin_lock(&drvdata->spinlock); - idx = drvdata->addr_idx; - if (idx % 2 != 0) { - spin_unlock(&drvdata->spinlock); - return -EPERM; - } - if (!((drvdata->addr_type[idx] == ETM_ADDR_TYPE_NONE && - drvdata->addr_type[idx + 1] == ETM_ADDR_TYPE_NONE) || - (drvdata->addr_type[idx] == ETM_ADDR_TYPE_RANGE && - drvdata->addr_type[idx + 1] == ETM_ADDR_TYPE_RANGE))) { - spin_unlock(&drvdata->spinlock); - return -EPERM; - } - - val1 = drvdata->addr_val[idx]; - val2 = drvdata->addr_val[idx + 1]; - spin_unlock(&drvdata->spinlock); - - return sprintf(buf, "%#lx %#lx\n", val1, val2); -} - -static ssize_t addr_range_store(struct device *dev, - struct device_attribute *attr, - const char *buf, size_t size) -{ - u8 idx; - unsigned long val1, val2; - struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); - - if (sscanf(buf, "%lx %lx", &val1, &val2) != 2) - return -EINVAL; - /* Lower address comparator cannot have a higher address value */ - if (val1 > val2) - return -EINVAL; - - spin_lock(&drvdata->spinlock); - idx = drvdata->addr_idx; - if (idx % 2 != 0) { - spin_unlock(&drvdata->spinlock); - return -EPERM; - } - if (!((drvdata->addr_type[idx] == ETM_ADDR_TYPE_NONE && - drvdata->addr_type[idx + 1] == ETM_ADDR_TYPE_NONE) || - (drvdata->addr_type[idx] == ETM_ADDR_TYPE_RANGE && - drvdata->addr_type[idx + 1] == ETM_ADDR_TYPE_RANGE))) { - spin_unlock(&drvdata->spinlock); - return -EPERM; - } - - drvdata->addr_val[idx] = val1; - drvdata->addr_type[idx] = ETM_ADDR_TYPE_RANGE; - drvdata->addr_val[idx + 1] = val2; - drvdata->addr_type[idx + 1] = ETM_ADDR_TYPE_RANGE; - drvdata->enable_ctrl1 |= (1 << (idx/2)); - spin_unlock(&drvdata->spinlock); - - return size; -} -static DEVICE_ATTR_RW(addr_range); - -static ssize_t addr_start_show(struct device *dev, - struct device_attribute *attr, char *buf) -{ - u8 idx; - unsigned long val; - struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); - - spin_lock(&drvdata->spinlock); - idx = drvdata->addr_idx; - if (!(drvdata->addr_type[idx] == ETM_ADDR_TYPE_NONE || - drvdata->addr_type[idx] == ETM_ADDR_TYPE_START)) { - spin_unlock(&drvdata->spinlock); - return -EPERM; - } - - val = drvdata->addr_val[idx]; - spin_unlock(&drvdata->spinlock); - - return sprintf(buf, "%#lx\n", val); -} - -static ssize_t addr_start_store(struct device *dev, - struct device_attribute *attr, - const char *buf, size_t size) -{ - u8 idx; - int ret; - unsigned long val; - struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); - - ret = kstrtoul(buf, 16, &val); - if (ret) - return ret; - - spin_lock(&drvdata->spinlock); - idx = drvdata->addr_idx; - if (!(drvdata->addr_type[idx] == ETM_ADDR_TYPE_NONE || - drvdata->addr_type[idx] == ETM_ADDR_TYPE_START)) { - spin_unlock(&drvdata->spinlock); - return -EPERM; - } - - drvdata->addr_val[idx] = val; - drvdata->addr_type[idx] = ETM_ADDR_TYPE_START; - drvdata->startstop_ctrl |= (1 << idx); - drvdata->enable_ctrl1 |= BIT(25); - spin_unlock(&drvdata->spinlock); - - return size; -} -static DEVICE_ATTR_RW(addr_start); - -static ssize_t addr_stop_show(struct device *dev, - struct device_attribute *attr, char *buf) -{ - u8 idx; - unsigned long val; - struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); - - spin_lock(&drvdata->spinlock); - idx = drvdata->addr_idx; - if (!(drvdata->addr_type[idx] == ETM_ADDR_TYPE_NONE || - drvdata->addr_type[idx] == ETM_ADDR_TYPE_STOP)) { - spin_unlock(&drvdata->spinlock); - return -EPERM; - } - - val = drvdata->addr_val[idx]; - spin_unlock(&drvdata->spinlock); - - return sprintf(buf, "%#lx\n", val); -} - -static ssize_t addr_stop_store(struct device *dev, - struct device_attribute *attr, - const char *buf, size_t size) -{ - u8 idx; - int ret; - unsigned long val; - struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); - - ret = kstrtoul(buf, 16, &val); - if (ret) - return ret; - - spin_lock(&drvdata->spinlock); - idx = drvdata->addr_idx; - if (!(drvdata->addr_type[idx] == ETM_ADDR_TYPE_NONE || - drvdata->addr_type[idx] == ETM_ADDR_TYPE_STOP)) { - spin_unlock(&drvdata->spinlock); - return -EPERM; - } - - drvdata->addr_val[idx] = val; - drvdata->addr_type[idx] = ETM_ADDR_TYPE_STOP; - drvdata->startstop_ctrl |= (1 << (idx + 16)); - drvdata->enable_ctrl1 |= ETMTECR1_START_STOP; - spin_unlock(&drvdata->spinlock); - - return size; -} -static DEVICE_ATTR_RW(addr_stop); - -static ssize_t addr_acctype_show(struct device *dev, - struct device_attribute *attr, char *buf) -{ - unsigned long val; - struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); - - spin_lock(&drvdata->spinlock); - val = drvdata->addr_acctype[drvdata->addr_idx]; - spin_unlock(&drvdata->spinlock); - - return sprintf(buf, "%#lx\n", val); -} - -static ssize_t addr_acctype_store(struct device *dev, - struct device_attribute *attr, - const char *buf, size_t size) -{ - int ret; - unsigned long val; - struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); - - ret = kstrtoul(buf, 16, &val); - if (ret) - return ret; - - spin_lock(&drvdata->spinlock); - drvdata->addr_acctype[drvdata->addr_idx] = val; - spin_unlock(&drvdata->spinlock); - - return size; -} -static DEVICE_ATTR_RW(addr_acctype); - -static ssize_t cntr_idx_show(struct device *dev, - struct device_attribute *attr, char *buf) -{ - unsigned long val; - struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); - - val = drvdata->cntr_idx; - return sprintf(buf, "%#lx\n", val); -} - -static ssize_t cntr_idx_store(struct device *dev, - struct device_attribute *attr, - const char *buf, size_t size) -{ - int ret; - unsigned long val; - struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); - - ret = kstrtoul(buf, 16, &val); - if (ret) - return ret; - - if (val >= drvdata->nr_cntr) - return -EINVAL; - /* - * Use spinlock to ensure index doesn't change while it gets - * dereferenced multiple times within a spinlock block elsewhere. - */ - spin_lock(&drvdata->spinlock); - drvdata->cntr_idx = val; - spin_unlock(&drvdata->spinlock); - - return size; -} -static DEVICE_ATTR_RW(cntr_idx); - -static ssize_t cntr_rld_val_show(struct device *dev, - struct device_attribute *attr, char *buf) -{ - unsigned long val; - struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); - - spin_lock(&drvdata->spinlock); - val = drvdata->cntr_rld_val[drvdata->cntr_idx]; - spin_unlock(&drvdata->spinlock); - - return sprintf(buf, "%#lx\n", val); -} - -static ssize_t cntr_rld_val_store(struct device *dev, - struct device_attribute *attr, - const char *buf, size_t size) -{ - int ret; - unsigned long val; - struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); - - ret = kstrtoul(buf, 16, &val); - if (ret) - return ret; - - spin_lock(&drvdata->spinlock); - drvdata->cntr_rld_val[drvdata->cntr_idx] = val; - spin_unlock(&drvdata->spinlock); - - return size; -} -static DEVICE_ATTR_RW(cntr_rld_val); - -static ssize_t cntr_event_show(struct device *dev, - struct device_attribute *attr, char *buf) -{ - unsigned long val; - struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); - - spin_lock(&drvdata->spinlock); - val = drvdata->cntr_event[drvdata->cntr_idx]; - spin_unlock(&drvdata->spinlock); - - return sprintf(buf, "%#lx\n", val); -} - -static ssize_t cntr_event_store(struct device *dev, - struct device_attribute *attr, - const char *buf, size_t size) -{ - int ret; - unsigned long val; - struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); - - ret = kstrtoul(buf, 16, &val); - if (ret) - return ret; - - spin_lock(&drvdata->spinlock); - drvdata->cntr_event[drvdata->cntr_idx] = val & ETM_EVENT_MASK; - spin_unlock(&drvdata->spinlock); - - return size; -} -static DEVICE_ATTR_RW(cntr_event); - -static ssize_t cntr_rld_event_show(struct device *dev, - struct device_attribute *attr, char *buf) -{ - unsigned long val; - struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); - - spin_lock(&drvdata->spinlock); - val = drvdata->cntr_rld_event[drvdata->cntr_idx]; - spin_unlock(&drvdata->spinlock); - - return sprintf(buf, "%#lx\n", val); -} - -static ssize_t cntr_rld_event_store(struct device *dev, - struct device_attribute *attr, - const char *buf, size_t size) -{ - int ret; - unsigned long val; - struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); - - ret = kstrtoul(buf, 16, &val); - if (ret) - return ret; - - spin_lock(&drvdata->spinlock); - drvdata->cntr_rld_event[drvdata->cntr_idx] = val & ETM_EVENT_MASK; - spin_unlock(&drvdata->spinlock); - - return size; -} -static DEVICE_ATTR_RW(cntr_rld_event); - -static ssize_t cntr_val_show(struct device *dev, - struct device_attribute *attr, char *buf) -{ - int i, ret = 0; - u32 val; - struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); - - if (!drvdata->enable) { - spin_lock(&drvdata->spinlock); - for (i = 0; i < drvdata->nr_cntr; i++) - ret += sprintf(buf, "counter %d: %x\n", - i, drvdata->cntr_val[i]); - spin_unlock(&drvdata->spinlock); - return ret; - } - - for (i = 0; i < drvdata->nr_cntr; i++) { - val = etm_readl(drvdata, ETMCNTVRn(i)); - ret += sprintf(buf, "counter %d: %x\n", i, val); - } - - return ret; -} - -static ssize_t cntr_val_store(struct device *dev, - struct device_attribute *attr, - const char *buf, size_t size) -{ - int ret; - unsigned long val; - struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); - - ret = kstrtoul(buf, 16, &val); - if (ret) - return ret; - - spin_lock(&drvdata->spinlock); - drvdata->cntr_val[drvdata->cntr_idx] = val; - spin_unlock(&drvdata->spinlock); - - return size; -} -static DEVICE_ATTR_RW(cntr_val); - -static ssize_t seq_12_event_show(struct device *dev, - struct device_attribute *attr, char *buf) -{ - unsigned long val; - struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); - - val = drvdata->seq_12_event; - return sprintf(buf, "%#lx\n", val); -} - -static ssize_t seq_12_event_store(struct device *dev, - struct device_attribute *attr, - const char *buf, size_t size) -{ - int ret; - unsigned long val; - struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); - - ret = kstrtoul(buf, 16, &val); - if (ret) - return ret; - - drvdata->seq_12_event = val & ETM_EVENT_MASK; - return size; -} -static DEVICE_ATTR_RW(seq_12_event); - -static ssize_t seq_21_event_show(struct device *dev, - struct device_attribute *attr, char *buf) -{ - unsigned long val; - struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); - - val = drvdata->seq_21_event; - return sprintf(buf, "%#lx\n", val); -} - -static ssize_t seq_21_event_store(struct device *dev, - struct device_attribute *attr, - const char *buf, size_t size) -{ - int ret; - unsigned long val; - struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); - - ret = kstrtoul(buf, 16, &val); - if (ret) - return ret; - - drvdata->seq_21_event = val & ETM_EVENT_MASK; - return size; -} -static DEVICE_ATTR_RW(seq_21_event); - -static ssize_t seq_23_event_show(struct device *dev, - struct device_attribute *attr, char *buf) -{ - unsigned long val; - struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); - - val = drvdata->seq_23_event; - return sprintf(buf, "%#lx\n", val); -} - -static ssize_t seq_23_event_store(struct device *dev, - struct device_attribute *attr, - const char *buf, size_t size) -{ - int ret; - unsigned long val; - struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); - - ret = kstrtoul(buf, 16, &val); - if (ret) - return ret; - - drvdata->seq_23_event = val & ETM_EVENT_MASK; - return size; -} -static DEVICE_ATTR_RW(seq_23_event); - -static ssize_t seq_31_event_show(struct device *dev, - struct device_attribute *attr, char *buf) -{ - unsigned long val; - struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); - - val = drvdata->seq_31_event; - return sprintf(buf, "%#lx\n", val); -} - -static ssize_t seq_31_event_store(struct device *dev, - struct device_attribute *attr, - const char *buf, size_t size) -{ - int ret; - unsigned long val; - struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); - - ret = kstrtoul(buf, 16, &val); - if (ret) - return ret; - - drvdata->seq_31_event = val & ETM_EVENT_MASK; - return size; -} -static DEVICE_ATTR_RW(seq_31_event); - -static ssize_t seq_32_event_show(struct device *dev, - struct device_attribute *attr, char *buf) -{ - unsigned long val; - struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); - - val = drvdata->seq_32_event; - return sprintf(buf, "%#lx\n", val); -} - -static ssize_t seq_32_event_store(struct device *dev, - struct device_attribute *attr, - const char *buf, size_t size) -{ - int ret; - unsigned long val; - struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); - - ret = kstrtoul(buf, 16, &val); - if (ret) - return ret; - - drvdata->seq_32_event = val & ETM_EVENT_MASK; - return size; -} -static DEVICE_ATTR_RW(seq_32_event); - -static ssize_t seq_13_event_show(struct device *dev, - struct device_attribute *attr, char *buf) -{ - unsigned long val; - struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); - - val = drvdata->seq_13_event; - return sprintf(buf, "%#lx\n", val); -} - -static ssize_t seq_13_event_store(struct device *dev, - struct device_attribute *attr, - const char *buf, size_t size) -{ - int ret; - unsigned long val; - struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); - - ret = kstrtoul(buf, 16, &val); - if (ret) - return ret; - - drvdata->seq_13_event = val & ETM_EVENT_MASK; - return size; -} -static DEVICE_ATTR_RW(seq_13_event); - -static ssize_t seq_curr_state_show(struct device *dev, - struct device_attribute *attr, char *buf) -{ - int ret; - unsigned long val, flags; - struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); - - if (!drvdata->enable) { - val = drvdata->seq_curr_state; - goto out; - } - - ret = clk_prepare_enable(drvdata->clk); - if (ret) - return ret; - - spin_lock_irqsave(&drvdata->spinlock, flags); - - CS_UNLOCK(drvdata->base); - val = (etm_readl(drvdata, ETMSQR) & ETM_SQR_MASK); - CS_LOCK(drvdata->base); - - spin_unlock_irqrestore(&drvdata->spinlock, flags); - clk_disable_unprepare(drvdata->clk); -out: - return sprintf(buf, "%#lx\n", val); -} - -static ssize_t seq_curr_state_store(struct device *dev, - struct device_attribute *attr, - const char *buf, size_t size) -{ - int ret; - unsigned long val; - struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); - - ret = kstrtoul(buf, 16, &val); - if (ret) - return ret; - - if (val > ETM_SEQ_STATE_MAX_VAL) - return -EINVAL; - - drvdata->seq_curr_state = val; - - return size; -} -static DEVICE_ATTR_RW(seq_curr_state); - -static ssize_t ctxid_idx_show(struct device *dev, - struct device_attribute *attr, char *buf) -{ - unsigned long val; - struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); - - val = drvdata->ctxid_idx; - return sprintf(buf, "%#lx\n", val); -} - -static ssize_t ctxid_idx_store(struct device *dev, - struct device_attribute *attr, - const char *buf, size_t size) -{ - int ret; - unsigned long val; - struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); - - ret = kstrtoul(buf, 16, &val); - if (ret) - return ret; - - if (val >= drvdata->nr_ctxid_cmp) - return -EINVAL; - - /* - * Use spinlock to ensure index doesn't change while it gets - * dereferenced multiple times within a spinlock block elsewhere. - */ - spin_lock(&drvdata->spinlock); - drvdata->ctxid_idx = val; - spin_unlock(&drvdata->spinlock); - - return size; -} -static DEVICE_ATTR_RW(ctxid_idx); - -static ssize_t ctxid_val_show(struct device *dev, - struct device_attribute *attr, char *buf) -{ - unsigned long val; - struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); - - spin_lock(&drvdata->spinlock); - val = drvdata->ctxid_val[drvdata->ctxid_idx]; - spin_unlock(&drvdata->spinlock); - - return sprintf(buf, "%#lx\n", val); -} - -static ssize_t ctxid_val_store(struct device *dev, - struct device_attribute *attr, - const char *buf, size_t size) -{ - int ret; - unsigned long val; - struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); - - ret = kstrtoul(buf, 16, &val); - if (ret) - return ret; - - spin_lock(&drvdata->spinlock); - drvdata->ctxid_val[drvdata->ctxid_idx] = val; - spin_unlock(&drvdata->spinlock); - - return size; -} -static DEVICE_ATTR_RW(ctxid_val); - -static ssize_t ctxid_mask_show(struct device *dev, - struct device_attribute *attr, char *buf) -{ - unsigned long val; - struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); - - val = drvdata->ctxid_mask; - return sprintf(buf, "%#lx\n", val); -} - -static ssize_t ctxid_mask_store(struct device *dev, - struct device_attribute *attr, - const char *buf, size_t size) -{ - int ret; - unsigned long val; - struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); - - ret = kstrtoul(buf, 16, &val); - if (ret) - return ret; - - drvdata->ctxid_mask = val; - return size; -} -static DEVICE_ATTR_RW(ctxid_mask); - -static ssize_t sync_freq_show(struct device *dev, - struct device_attribute *attr, char *buf) -{ - unsigned long val; - struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); - - val = drvdata->sync_freq; - return sprintf(buf, "%#lx\n", val); -} - -static ssize_t sync_freq_store(struct device *dev, - struct device_attribute *attr, - const char *buf, size_t size) -{ - int ret; - unsigned long val; - struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); - - ret = kstrtoul(buf, 16, &val); - if (ret) - return ret; - - drvdata->sync_freq = val & ETM_SYNC_MASK; - return size; -} -static DEVICE_ATTR_RW(sync_freq); - -static ssize_t timestamp_event_show(struct device *dev, - struct device_attribute *attr, char *buf) -{ - unsigned long val; - struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); - - val = drvdata->timestamp_event; - return sprintf(buf, "%#lx\n", val); -} - -static ssize_t timestamp_event_store(struct device *dev, - struct device_attribute *attr, - const char *buf, size_t size) -{ - int ret; - unsigned long val; - struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); - - ret = kstrtoul(buf, 16, &val); - if (ret) - return ret; - - drvdata->timestamp_event = val & ETM_EVENT_MASK; - return size; -} -static DEVICE_ATTR_RW(timestamp_event); - -static ssize_t status_show(struct device *dev, - struct device_attribute *attr, char *buf) -{ - int ret; - unsigned long flags; - struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); - - ret = clk_prepare_enable(drvdata->clk); - if (ret) - return ret; - - spin_lock_irqsave(&drvdata->spinlock, flags); - - CS_UNLOCK(drvdata->base); - ret = sprintf(buf, - "ETMCCR: 0x%08x\n" - "ETMCCER: 0x%08x\n" - "ETMSCR: 0x%08x\n" - "ETMIDR: 0x%08x\n" - "ETMCR: 0x%08x\n" - "ETMTRACEIDR: 0x%08x\n" - "Enable event: 0x%08x\n" - "Enable start/stop: 0x%08x\n" - "Enable control: CR1 0x%08x CR2 0x%08x\n" - "CPU affinity: %d\n", - drvdata->etmccr, drvdata->etmccer, - etm_readl(drvdata, ETMSCR), etm_readl(drvdata, ETMIDR), - etm_readl(drvdata, ETMCR), etm_trace_id_simple(drvdata), - etm_readl(drvdata, ETMTEEVR), - etm_readl(drvdata, ETMTSSCR), - etm_readl(drvdata, ETMTECR1), - etm_readl(drvdata, ETMTECR2), - drvdata->cpu); - CS_LOCK(drvdata->base); - - spin_unlock_irqrestore(&drvdata->spinlock, flags); - clk_disable_unprepare(drvdata->clk); - - return ret; -} -static DEVICE_ATTR_RO(status); - -static ssize_t traceid_show(struct device *dev, - struct device_attribute *attr, char *buf) -{ - int ret; - unsigned long val, flags; - struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); - - if (!drvdata->enable) { - val = drvdata->traceid; - goto out; - } - - ret = clk_prepare_enable(drvdata->clk); - if (ret) - return ret; - - spin_lock_irqsave(&drvdata->spinlock, flags); - CS_UNLOCK(drvdata->base); - - val = (etm_readl(drvdata, ETMTRACEIDR) & ETM_TRACEID_MASK); - - CS_LOCK(drvdata->base); - spin_unlock_irqrestore(&drvdata->spinlock, flags); - clk_disable_unprepare(drvdata->clk); -out: - return sprintf(buf, "%#lx\n", val); -} - -static ssize_t traceid_store(struct device *dev, - struct device_attribute *attr, - const char *buf, size_t size) -{ - int ret; - unsigned long val; - struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); - - ret = kstrtoul(buf, 16, &val); - if (ret) - return ret; - - drvdata->traceid = val & ETM_TRACEID_MASK; - return size; -} -static DEVICE_ATTR_RW(traceid); - -static struct attribute *coresight_etm_attrs[] = { - &dev_attr_nr_addr_cmp.attr, - &dev_attr_nr_cntr.attr, - &dev_attr_nr_ctxid_cmp.attr, - &dev_attr_etmsr.attr, - &dev_attr_reset.attr, - &dev_attr_mode.attr, - &dev_attr_trigger_event.attr, - &dev_attr_enable_event.attr, - &dev_attr_fifofull_level.attr, - &dev_attr_addr_idx.attr, - &dev_attr_addr_single.attr, - &dev_attr_addr_range.attr, - &dev_attr_addr_start.attr, - &dev_attr_addr_stop.attr, - &dev_attr_addr_acctype.attr, - &dev_attr_cntr_idx.attr, - &dev_attr_cntr_rld_val.attr, - &dev_attr_cntr_event.attr, - &dev_attr_cntr_rld_event.attr, - &dev_attr_cntr_val.attr, - &dev_attr_seq_12_event.attr, - &dev_attr_seq_21_event.attr, - &dev_attr_seq_23_event.attr, - &dev_attr_seq_31_event.attr, - &dev_attr_seq_32_event.attr, - &dev_attr_seq_13_event.attr, - &dev_attr_seq_curr_state.attr, - &dev_attr_ctxid_idx.attr, - &dev_attr_ctxid_val.attr, - &dev_attr_ctxid_mask.attr, - &dev_attr_sync_freq.attr, - &dev_attr_timestamp_event.attr, - &dev_attr_status.attr, - &dev_attr_traceid.attr, - NULL, -}; -ATTRIBUTE_GROUPS(coresight_etm); - -static int etm_cpu_callback(struct notifier_block *nfb, unsigned long action, - void *hcpu) -{ - unsigned int cpu = (unsigned long)hcpu; - - if (!etmdrvdata[cpu]) - goto out; - - switch (action & (~CPU_TASKS_FROZEN)) { - case CPU_STARTING: - spin_lock(&etmdrvdata[cpu]->spinlock); - if (!etmdrvdata[cpu]->os_unlock) { - etm_os_unlock(etmdrvdata[cpu]); - etmdrvdata[cpu]->os_unlock = true; - } - - if (etmdrvdata[cpu]->enable) - etm_enable_hw(etmdrvdata[cpu]); - spin_unlock(&etmdrvdata[cpu]->spinlock); - break; - - case CPU_ONLINE: - if (etmdrvdata[cpu]->boot_enable && - !etmdrvdata[cpu]->sticky_enable) - coresight_enable(etmdrvdata[cpu]->csdev); - break; - - case CPU_DYING: - spin_lock(&etmdrvdata[cpu]->spinlock); - if (etmdrvdata[cpu]->enable) - etm_disable_hw(etmdrvdata[cpu]); - spin_unlock(&etmdrvdata[cpu]->spinlock); - break; - } -out: - return NOTIFY_OK; -} - -static struct notifier_block etm_cpu_notifier = { - .notifier_call = etm_cpu_callback, -}; - -static bool etm_arch_supported(u8 arch) -{ - switch (arch) { - case ETM_ARCH_V3_3: - break; - case ETM_ARCH_V3_5: - break; - case PFT_ARCH_V1_0: - break; - case PFT_ARCH_V1_1: - break; - default: - return false; - } - return true; -} - -static void etm_init_arch_data(void *info) -{ - u32 etmidr; - u32 etmccr; - struct etm_drvdata *drvdata = info; - - CS_UNLOCK(drvdata->base); - - /* First dummy read */ - (void)etm_readl(drvdata, ETMPDSR); - /* Provide power to ETM: ETMPDCR[3] == 1 */ - etm_set_pwrup(drvdata); - /* - * Clear power down bit since when this bit is set writes to - * certain registers might be ignored. - */ - etm_clr_pwrdwn(drvdata); - /* - * Set prog bit. It will be set from reset but this is included to - * ensure it is set - */ - etm_set_prog(drvdata); - - /* Find all capabilities */ - etmidr = etm_readl(drvdata, ETMIDR); - drvdata->arch = BMVAL(etmidr, 4, 11); - drvdata->port_size = etm_readl(drvdata, ETMCR) & PORT_SIZE_MASK; - - drvdata->etmccer = etm_readl(drvdata, ETMCCER); - etmccr = etm_readl(drvdata, ETMCCR); - drvdata->etmccr = etmccr; - drvdata->nr_addr_cmp = BMVAL(etmccr, 0, 3) * 2; - drvdata->nr_cntr = BMVAL(etmccr, 13, 15); - drvdata->nr_ext_inp = BMVAL(etmccr, 17, 19); - drvdata->nr_ext_out = BMVAL(etmccr, 20, 22); - drvdata->nr_ctxid_cmp = BMVAL(etmccr, 24, 25); - - etm_set_pwrdwn(drvdata); - etm_clr_pwrup(drvdata); - CS_LOCK(drvdata->base); -} - -static void etm_init_default_data(struct etm_drvdata *drvdata) -{ - /* - * A trace ID of value 0 is invalid, so let's start at some - * random value that fits in 7 bits and will be just as good. - */ - static int etm3x_traceid = 0x10; - - u32 flags = (1 << 0 | /* instruction execute*/ - 3 << 3 | /* ARM instruction */ - 0 << 5 | /* No data value comparison */ - 0 << 7 | /* No exact mach */ - 0 << 8 | /* Ignore context ID */ - 0 << 10); /* Security ignored */ - - /* - * Initial configuration only - guarantees sources handled by - * this driver have a unique ID at startup time but not between - * all other types of sources. For that we lean on the core - * framework. - */ - drvdata->traceid = etm3x_traceid++; - drvdata->ctrl = (ETMCR_CYC_ACC | ETMCR_TIMESTAMP_EN); - drvdata->enable_ctrl1 = ETMTECR1_ADDR_COMP_1; - if (drvdata->nr_addr_cmp >= 2) { - drvdata->addr_val[0] = (u32) _stext; - drvdata->addr_val[1] = (u32) _etext; - drvdata->addr_acctype[0] = flags; - drvdata->addr_acctype[1] = flags; - drvdata->addr_type[0] = ETM_ADDR_TYPE_RANGE; - drvdata->addr_type[1] = ETM_ADDR_TYPE_RANGE; - } - - etm_set_default(drvdata); -} - -static int etm_probe(struct amba_device *adev, const struct amba_id *id) -{ - int ret; - void __iomem *base; - struct device *dev = &adev->dev; - struct coresight_platform_data *pdata = NULL; - struct etm_drvdata *drvdata; - struct resource *res = &adev->res; - struct coresight_desc *desc; - struct device_node *np = adev->dev.of_node; - - desc = devm_kzalloc(dev, sizeof(*desc), GFP_KERNEL); - if (!desc) - return -ENOMEM; - - drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL); - if (!drvdata) - return -ENOMEM; - - if (np) { - pdata = of_get_coresight_platform_data(dev, np); - if (IS_ERR(pdata)) - return PTR_ERR(pdata); - - adev->dev.platform_data = pdata; - drvdata->use_cp14 = of_property_read_bool(np, "arm,cp14"); - } - - drvdata->dev = &adev->dev; - dev_set_drvdata(dev, drvdata); - - /* Validity for the resource is already checked by the AMBA core */ - base = devm_ioremap_resource(dev, res); - if (IS_ERR(base)) - return PTR_ERR(base); - - drvdata->base = base; - - spin_lock_init(&drvdata->spinlock); - - drvdata->clk = adev->pclk; - ret = clk_prepare_enable(drvdata->clk); - if (ret) - return ret; - - drvdata->cpu = pdata ? pdata->cpu : 0; - - get_online_cpus(); - etmdrvdata[drvdata->cpu] = drvdata; - - if (!smp_call_function_single(drvdata->cpu, etm_os_unlock, drvdata, 1)) - drvdata->os_unlock = true; - - if (smp_call_function_single(drvdata->cpu, - etm_init_arch_data, drvdata, 1)) - dev_err(dev, "ETM arch init failed\n"); - - if (!etm_count++) - register_hotcpu_notifier(&etm_cpu_notifier); - - put_online_cpus(); - - if (etm_arch_supported(drvdata->arch) == false) { - ret = -EINVAL; - goto err_arch_supported; - } - etm_init_default_data(drvdata); - - clk_disable_unprepare(drvdata->clk); - - desc->type = CORESIGHT_DEV_TYPE_SOURCE; - desc->subtype.source_subtype = CORESIGHT_DEV_SUBTYPE_SOURCE_PROC; - desc->ops = &etm_cs_ops; - desc->pdata = pdata; - desc->dev = dev; - desc->groups = coresight_etm_groups; - drvdata->csdev = coresight_register(desc); - if (IS_ERR(drvdata->csdev)) { - ret = PTR_ERR(drvdata->csdev); - goto err_arch_supported; - } - - dev_info(dev, "ETM initialized\n"); - - if (boot_enable) { - coresight_enable(drvdata->csdev); - drvdata->boot_enable = true; - } - - return 0; - -err_arch_supported: - clk_disable_unprepare(drvdata->clk); - if (--etm_count == 0) - unregister_hotcpu_notifier(&etm_cpu_notifier); - return ret; -} - -static int etm_remove(struct amba_device *adev) -{ - struct etm_drvdata *drvdata = amba_get_drvdata(adev); - - coresight_unregister(drvdata->csdev); - if (--etm_count == 0) - unregister_hotcpu_notifier(&etm_cpu_notifier); - - return 0; -} - -static struct amba_id etm_ids[] = { - { /* ETM 3.3 */ - .id = 0x0003b921, - .mask = 0x0003ffff, - }, - { /* ETM 3.5 */ - .id = 0x0003b956, - .mask = 0x0003ffff, - }, - { /* PTM 1.0 */ - .id = 0x0003b950, - .mask = 0x0003ffff, - }, - { /* PTM 1.1 */ - .id = 0x0003b95f, - .mask = 0x0003ffff, - }, - { 0, 0}, -}; - -static struct amba_driver etm_driver = { - .drv = { - .name = "coresight-etm3x", - .owner = THIS_MODULE, - }, - .probe = etm_probe, - .remove = etm_remove, - .id_table = etm_ids, -}; - -int __init etm_init(void) -{ - return amba_driver_register(&etm_driver); -} -module_init(etm_init); - -void __exit etm_exit(void) -{ - amba_driver_unregister(&etm_driver); -} -module_exit(etm_exit); - -MODULE_LICENSE("GPL v2"); -MODULE_DESCRIPTION("CoreSight Program Flow Trace driver"); diff --git a/drivers/coresight/coresight-funnel.c b/drivers/coresight/coresight-funnel.c deleted file mode 100644 index 3db36f70b666..000000000000 --- a/drivers/coresight/coresight-funnel.c +++ /dev/null @@ -1,258 +0,0 @@ -/* Copyright (c) 2011-2012, The Linux Foundation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include "coresight-priv.h" - -#define FUNNEL_FUNCTL 0x000 -#define FUNNEL_PRICTL 0x004 - -#define FUNNEL_HOLDTIME_MASK 0xf00 -#define FUNNEL_HOLDTIME_SHFT 0x8 -#define FUNNEL_HOLDTIME (0x7 << FUNNEL_HOLDTIME_SHFT) - -/** - * struct funnel_drvdata - specifics associated to a funnel component - * @base: memory mapped base address for this component. - * @dev: the device entity associated to this component. - * @csdev: component vitals needed by the framework. - * @clk: the clock this component is associated to. - * @priority: port selection order. - */ -struct funnel_drvdata { - void __iomem *base; - struct device *dev; - struct coresight_device *csdev; - struct clk *clk; - unsigned long priority; -}; - -static void funnel_enable_hw(struct funnel_drvdata *drvdata, int port) -{ - u32 functl; - - CS_UNLOCK(drvdata->base); - - functl = readl_relaxed(drvdata->base + FUNNEL_FUNCTL); - functl &= ~FUNNEL_HOLDTIME_MASK; - functl |= FUNNEL_HOLDTIME; - functl |= (1 << port); - writel_relaxed(functl, drvdata->base + FUNNEL_FUNCTL); - writel_relaxed(drvdata->priority, drvdata->base + FUNNEL_PRICTL); - - CS_LOCK(drvdata->base); -} - -static int funnel_enable(struct coresight_device *csdev, int inport, - int outport) -{ - struct funnel_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); - int ret; - - ret = clk_prepare_enable(drvdata->clk); - if (ret) - return ret; - - funnel_enable_hw(drvdata, inport); - - dev_info(drvdata->dev, "FUNNEL inport %d enabled\n", inport); - return 0; -} - -static void funnel_disable_hw(struct funnel_drvdata *drvdata, int inport) -{ - u32 functl; - - CS_UNLOCK(drvdata->base); - - functl = readl_relaxed(drvdata->base + FUNNEL_FUNCTL); - functl &= ~(1 << inport); - writel_relaxed(functl, drvdata->base + FUNNEL_FUNCTL); - - CS_LOCK(drvdata->base); -} - -static void funnel_disable(struct coresight_device *csdev, int inport, - int outport) -{ - struct funnel_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); - - funnel_disable_hw(drvdata, inport); - - clk_disable_unprepare(drvdata->clk); - - dev_info(drvdata->dev, "FUNNEL inport %d disabled\n", inport); -} - -static const struct coresight_ops_link funnel_link_ops = { - .enable = funnel_enable, - .disable = funnel_disable, -}; - -static const struct coresight_ops funnel_cs_ops = { - .link_ops = &funnel_link_ops, -}; - -static ssize_t priority_show(struct device *dev, - struct device_attribute *attr, char *buf) -{ - struct funnel_drvdata *drvdata = dev_get_drvdata(dev->parent); - unsigned long val = drvdata->priority; - - return sprintf(buf, "%#lx\n", val); -} - -static ssize_t priority_store(struct device *dev, - struct device_attribute *attr, - const char *buf, size_t size) -{ - int ret; - unsigned long val; - struct funnel_drvdata *drvdata = dev_get_drvdata(dev->parent); - - ret = kstrtoul(buf, 16, &val); - if (ret) - return ret; - - drvdata->priority = val; - return size; -} -static DEVICE_ATTR_RW(priority); - -static u32 get_funnel_ctrl_hw(struct funnel_drvdata *drvdata) -{ - u32 functl; - - CS_UNLOCK(drvdata->base); - functl = readl_relaxed(drvdata->base + FUNNEL_FUNCTL); - CS_LOCK(drvdata->base); - - return functl; -} - -static ssize_t funnel_ctrl_show(struct device *dev, - struct device_attribute *attr, char *buf) -{ - int ret; - u32 val; - struct funnel_drvdata *drvdata = dev_get_drvdata(dev->parent); - - ret = clk_prepare_enable(drvdata->clk); - if (ret) - return ret; - - val = get_funnel_ctrl_hw(drvdata); - clk_disable_unprepare(drvdata->clk); - - return sprintf(buf, "%#x\n", val); -} -static DEVICE_ATTR_RO(funnel_ctrl); - -static struct attribute *coresight_funnel_attrs[] = { - &dev_attr_funnel_ctrl.attr, - &dev_attr_priority.attr, - NULL, -}; -ATTRIBUTE_GROUPS(coresight_funnel); - -static int funnel_probe(struct amba_device *adev, const struct amba_id *id) -{ - void __iomem *base; - struct device *dev = &adev->dev; - struct coresight_platform_data *pdata = NULL; - struct funnel_drvdata *drvdata; - struct resource *res = &adev->res; - struct coresight_desc *desc; - struct device_node *np = adev->dev.of_node; - - if (np) { - pdata = of_get_coresight_platform_data(dev, np); - if (IS_ERR(pdata)) - return PTR_ERR(pdata); - adev->dev.platform_data = pdata; - } - - drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL); - if (!drvdata) - return -ENOMEM; - - drvdata->dev = &adev->dev; - dev_set_drvdata(dev, drvdata); - - /* Validity for the resource is already checked by the AMBA core */ - base = devm_ioremap_resource(dev, res); - if (IS_ERR(base)) - return PTR_ERR(base); - - drvdata->base = base; - - drvdata->clk = adev->pclk; - - desc = devm_kzalloc(dev, sizeof(*desc), GFP_KERNEL); - if (!desc) - return -ENOMEM; - - desc->type = CORESIGHT_DEV_TYPE_LINK; - desc->subtype.link_subtype = CORESIGHT_DEV_SUBTYPE_LINK_MERG; - desc->ops = &funnel_cs_ops; - desc->pdata = pdata; - desc->dev = dev; - desc->groups = coresight_funnel_groups; - drvdata->csdev = coresight_register(desc); - if (IS_ERR(drvdata->csdev)) - return PTR_ERR(drvdata->csdev); - - dev_info(dev, "FUNNEL initialized\n"); - return 0; -} - -static int funnel_remove(struct amba_device *adev) -{ - struct funnel_drvdata *drvdata = amba_get_drvdata(adev); - - coresight_unregister(drvdata->csdev); - return 0; -} - -static struct amba_id funnel_ids[] = { - { - .id = 0x0003b908, - .mask = 0x0003ffff, - }, - { 0, 0}, -}; - -static struct amba_driver funnel_driver = { - .drv = { - .name = "coresight-funnel", - .owner = THIS_MODULE, - }, - .probe = funnel_probe, - .remove = funnel_remove, - .id_table = funnel_ids, -}; - -module_amba_driver(funnel_driver); - -MODULE_LICENSE("GPL v2"); -MODULE_DESCRIPTION("CoreSight Funnel driver"); diff --git a/drivers/coresight/coresight-priv.h b/drivers/coresight/coresight-priv.h deleted file mode 100644 index 62fcd98cc7cf..000000000000 --- a/drivers/coresight/coresight-priv.h +++ /dev/null @@ -1,63 +0,0 @@ -/* Copyright (c) 2011-2012, The Linux Foundation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef _CORESIGHT_PRIV_H -#define _CORESIGHT_PRIV_H - -#include -#include -#include - -/* - * Coresight management registers (0xf00-0xfcc) - * 0xfa0 - 0xfa4: Management registers in PFTv1.0 - * Trace registers in PFTv1.1 - */ -#define CORESIGHT_ITCTRL 0xf00 -#define CORESIGHT_CLAIMSET 0xfa0 -#define CORESIGHT_CLAIMCLR 0xfa4 -#define CORESIGHT_LAR 0xfb0 -#define CORESIGHT_LSR 0xfb4 -#define CORESIGHT_AUTHSTATUS 0xfb8 -#define CORESIGHT_DEVID 0xfc8 -#define CORESIGHT_DEVTYPE 0xfcc - -#define TIMEOUT_US 100 -#define BMVAL(val, lsb, msb) ((val & GENMASK(msb, lsb)) >> lsb) - -static inline void CS_LOCK(void __iomem *addr) -{ - do { - /* Wait for things to settle */ - mb(); - writel_relaxed(0x0, addr + CORESIGHT_LAR); - } while (0); -} - -static inline void CS_UNLOCK(void __iomem *addr) -{ - do { - writel_relaxed(CORESIGHT_UNLOCK, addr + CORESIGHT_LAR); - /* Make sure everyone has seen this */ - mb(); - } while (0); -} - -#ifdef CONFIG_CORESIGHT_SOURCE_ETM3X -extern int etm_readl_cp14(u32 off, unsigned int *val); -extern int etm_writel_cp14(u32 off, u32 val); -#else -static inline int etm_readl_cp14(u32 off, unsigned int *val) { return 0; } -static inline int etm_writel_cp14(u32 off, u32 val) { return 0; } -#endif - -#endif diff --git a/drivers/coresight/coresight-replicator.c b/drivers/coresight/coresight-replicator.c deleted file mode 100644 index 75b9abd804e6..000000000000 --- a/drivers/coresight/coresight-replicator.c +++ /dev/null @@ -1,137 +0,0 @@ -/* Copyright (c) 2011-2012, The Linux Foundation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include "coresight-priv.h" - -/** - * struct replicator_drvdata - specifics associated to a replicator component - * @dev: the device entity associated with this component - * @csdev: component vitals needed by the framework - */ -struct replicator_drvdata { - struct device *dev; - struct coresight_device *csdev; -}; - -static int replicator_enable(struct coresight_device *csdev, int inport, - int outport) -{ - struct replicator_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); - - dev_info(drvdata->dev, "REPLICATOR enabled\n"); - return 0; -} - -static void replicator_disable(struct coresight_device *csdev, int inport, - int outport) -{ - struct replicator_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); - - dev_info(drvdata->dev, "REPLICATOR disabled\n"); -} - -static const struct coresight_ops_link replicator_link_ops = { - .enable = replicator_enable, - .disable = replicator_disable, -}; - -static const struct coresight_ops replicator_cs_ops = { - .link_ops = &replicator_link_ops, -}; - -static int replicator_probe(struct platform_device *pdev) -{ - struct device *dev = &pdev->dev; - struct coresight_platform_data *pdata = NULL; - struct replicator_drvdata *drvdata; - struct coresight_desc *desc; - struct device_node *np = pdev->dev.of_node; - - if (np) { - pdata = of_get_coresight_platform_data(dev, np); - if (IS_ERR(pdata)) - return PTR_ERR(pdata); - pdev->dev.platform_data = pdata; - } - - drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL); - if (!drvdata) - return -ENOMEM; - - drvdata->dev = &pdev->dev; - platform_set_drvdata(pdev, drvdata); - - desc = devm_kzalloc(dev, sizeof(*desc), GFP_KERNEL); - if (!desc) - return -ENOMEM; - - desc->type = CORESIGHT_DEV_TYPE_LINK; - desc->subtype.link_subtype = CORESIGHT_DEV_SUBTYPE_LINK_SPLIT; - desc->ops = &replicator_cs_ops; - desc->pdata = pdev->dev.platform_data; - desc->dev = &pdev->dev; - drvdata->csdev = coresight_register(desc); - if (IS_ERR(drvdata->csdev)) - return PTR_ERR(drvdata->csdev); - - dev_info(dev, "REPLICATOR initialized\n"); - return 0; -} - -static int replicator_remove(struct platform_device *pdev) -{ - struct replicator_drvdata *drvdata = platform_get_drvdata(pdev); - - coresight_unregister(drvdata->csdev); - return 0; -} - -static const struct of_device_id replicator_match[] = { - {.compatible = "arm,coresight-replicator"}, - {} -}; - -static struct platform_driver replicator_driver = { - .probe = replicator_probe, - .remove = replicator_remove, - .driver = { - .name = "coresight-replicator", - .of_match_table = replicator_match, - }, -}; - -static int __init replicator_init(void) -{ - return platform_driver_register(&replicator_driver); -} -module_init(replicator_init); - -static void __exit replicator_exit(void) -{ - platform_driver_unregister(&replicator_driver); -} -module_exit(replicator_exit); - -MODULE_LICENSE("GPL v2"); -MODULE_DESCRIPTION("CoreSight Replicator driver"); diff --git a/drivers/coresight/coresight-tmc.c b/drivers/coresight/coresight-tmc.c deleted file mode 100644 index 7147f3dd363c..000000000000 --- a/drivers/coresight/coresight-tmc.c +++ /dev/null @@ -1,822 +0,0 @@ -/* Copyright (c) 2012, The Linux Foundation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include "coresight-priv.h" - -#define TMC_RSZ 0x004 -#define TMC_STS 0x00c -#define TMC_RRD 0x010 -#define TMC_RRP 0x014 -#define TMC_RWP 0x018 -#define TMC_TRG 0x01c -#define TMC_CTL 0x020 -#define TMC_RWD 0x024 -#define TMC_MODE 0x028 -#define TMC_LBUFLEVEL 0x02c -#define TMC_CBUFLEVEL 0x030 -#define TMC_BUFWM 0x034 -#define TMC_RRPHI 0x038 -#define TMC_RWPHI 0x03c -#define TMC_AXICTL 0x110 -#define TMC_DBALO 0x118 -#define TMC_DBAHI 0x11c -#define TMC_FFSR 0x300 -#define TMC_FFCR 0x304 -#define TMC_PSCR 0x308 -#define TMC_ITMISCOP0 0xee0 -#define TMC_ITTRFLIN 0xee8 -#define TMC_ITATBDATA0 0xeec -#define TMC_ITATBCTR2 0xef0 -#define TMC_ITATBCTR1 0xef4 -#define TMC_ITATBCTR0 0xef8 - -/* register description */ -/* TMC_CTL - 0x020 */ -#define TMC_CTL_CAPT_EN BIT(0) -/* TMC_STS - 0x00C */ -#define TMC_STS_TRIGGERED BIT(1) -/* TMC_AXICTL - 0x110 */ -#define TMC_AXICTL_PROT_CTL_B0 BIT(0) -#define TMC_AXICTL_PROT_CTL_B1 BIT(1) -#define TMC_AXICTL_SCT_GAT_MODE BIT(7) -#define TMC_AXICTL_WR_BURST_LEN 0xF00 -/* TMC_FFCR - 0x304 */ -#define TMC_FFCR_EN_FMT BIT(0) -#define TMC_FFCR_EN_TI BIT(1) -#define TMC_FFCR_FON_FLIN BIT(4) -#define TMC_FFCR_FON_TRIG_EVT BIT(5) -#define TMC_FFCR_FLUSHMAN BIT(6) -#define TMC_FFCR_TRIGON_TRIGIN BIT(8) -#define TMC_FFCR_STOP_ON_FLUSH BIT(12) - -#define TMC_STS_TRIGGERED_BIT 2 -#define TMC_FFCR_FLUSHMAN_BIT 6 - -enum tmc_config_type { - TMC_CONFIG_TYPE_ETB, - TMC_CONFIG_TYPE_ETR, - TMC_CONFIG_TYPE_ETF, -}; - -enum tmc_mode { - TMC_MODE_CIRCULAR_BUFFER, - TMC_MODE_SOFTWARE_FIFO, - TMC_MODE_HARDWARE_FIFO, -}; - -enum tmc_mem_intf_width { - TMC_MEM_INTF_WIDTH_32BITS = 0x2, - TMC_MEM_INTF_WIDTH_64BITS = 0x3, - TMC_MEM_INTF_WIDTH_128BITS = 0x4, - TMC_MEM_INTF_WIDTH_256BITS = 0x5, -}; - -/** - * struct tmc_drvdata - specifics associated to an TMC component - * @base: memory mapped base address for this component. - * @dev: the device entity associated to this component. - * @csdev: component vitals needed by the framework. - * @miscdev: specifics to handle "/dev/xyz.tmc" entry. - * @clk: the clock this component is associated to. - * @spinlock: only one at a time pls. - * @read_count: manages preparation of buffer for reading. - * @buf: area of memory where trace data get sent. - * @paddr: DMA start location in RAM. - * @vaddr: virtual representation of @paddr. - * @size: @buf size. - * @enable: this TMC is being used. - * @config_type: TMC variant, must be of type @tmc_config_type. - * @trigger_cntr: amount of words to store after a trigger. - */ -struct tmc_drvdata { - void __iomem *base; - struct device *dev; - struct coresight_device *csdev; - struct miscdevice miscdev; - struct clk *clk; - spinlock_t spinlock; - int read_count; - bool reading; - char *buf; - dma_addr_t paddr; - void __iomem *vaddr; - u32 size; - bool enable; - enum tmc_config_type config_type; - u32 trigger_cntr; -}; - -static void tmc_wait_for_ready(struct tmc_drvdata *drvdata) -{ - /* Ensure formatter, unformatter and hardware fifo are empty */ - if (coresight_timeout(drvdata->base, - TMC_STS, TMC_STS_TRIGGERED_BIT, 1)) { - dev_err(drvdata->dev, - "timeout observed when probing at offset %#x\n", - TMC_STS); - } -} - -static void tmc_flush_and_stop(struct tmc_drvdata *drvdata) -{ - u32 ffcr; - - ffcr = readl_relaxed(drvdata->base + TMC_FFCR); - ffcr |= TMC_FFCR_STOP_ON_FLUSH; - writel_relaxed(ffcr, drvdata->base + TMC_FFCR); - ffcr |= TMC_FFCR_FLUSHMAN; - writel_relaxed(ffcr, drvdata->base + TMC_FFCR); - /* Ensure flush completes */ - if (coresight_timeout(drvdata->base, - TMC_FFCR, TMC_FFCR_FLUSHMAN_BIT, 0)) { - dev_err(drvdata->dev, - "timeout observed when probing at offset %#x\n", - TMC_FFCR); - } - - tmc_wait_for_ready(drvdata); -} - -static void tmc_enable_hw(struct tmc_drvdata *drvdata) -{ - writel_relaxed(TMC_CTL_CAPT_EN, drvdata->base + TMC_CTL); -} - -static void tmc_disable_hw(struct tmc_drvdata *drvdata) -{ - writel_relaxed(0x0, drvdata->base + TMC_CTL); -} - -static void tmc_etb_enable_hw(struct tmc_drvdata *drvdata) -{ - /* Zero out the memory to help with debug */ - memset(drvdata->buf, 0, drvdata->size); - - CS_UNLOCK(drvdata->base); - - writel_relaxed(TMC_MODE_CIRCULAR_BUFFER, drvdata->base + TMC_MODE); - writel_relaxed(TMC_FFCR_EN_FMT | TMC_FFCR_EN_TI | - TMC_FFCR_FON_FLIN | TMC_FFCR_FON_TRIG_EVT | - TMC_FFCR_TRIGON_TRIGIN, - drvdata->base + TMC_FFCR); - - writel_relaxed(drvdata->trigger_cntr, drvdata->base + TMC_TRG); - tmc_enable_hw(drvdata); - - CS_LOCK(drvdata->base); -} - -static void tmc_etr_enable_hw(struct tmc_drvdata *drvdata) -{ - u32 axictl; - - /* Zero out the memory to help with debug */ - memset(drvdata->vaddr, 0, drvdata->size); - - CS_UNLOCK(drvdata->base); - - writel_relaxed(drvdata->size / 4, drvdata->base + TMC_RSZ); - writel_relaxed(TMC_MODE_CIRCULAR_BUFFER, drvdata->base + TMC_MODE); - - axictl = readl_relaxed(drvdata->base + TMC_AXICTL); - axictl |= TMC_AXICTL_WR_BURST_LEN; - writel_relaxed(axictl, drvdata->base + TMC_AXICTL); - axictl &= ~TMC_AXICTL_SCT_GAT_MODE; - writel_relaxed(axictl, drvdata->base + TMC_AXICTL); - axictl = (axictl & - ~(TMC_AXICTL_PROT_CTL_B0 | TMC_AXICTL_PROT_CTL_B1)) | - TMC_AXICTL_PROT_CTL_B1; - writel_relaxed(axictl, drvdata->base + TMC_AXICTL); - - writel_relaxed(drvdata->paddr, drvdata->base + TMC_DBALO); - writel_relaxed(0x0, drvdata->base + TMC_DBAHI); - writel_relaxed(TMC_FFCR_EN_FMT | TMC_FFCR_EN_TI | - TMC_FFCR_FON_FLIN | TMC_FFCR_FON_TRIG_EVT | - TMC_FFCR_TRIGON_TRIGIN, - drvdata->base + TMC_FFCR); - writel_relaxed(drvdata->trigger_cntr, drvdata->base + TMC_TRG); - tmc_enable_hw(drvdata); - - CS_LOCK(drvdata->base); -} - -static void tmc_etf_enable_hw(struct tmc_drvdata *drvdata) -{ - CS_UNLOCK(drvdata->base); - - writel_relaxed(TMC_MODE_HARDWARE_FIFO, drvdata->base + TMC_MODE); - writel_relaxed(TMC_FFCR_EN_FMT | TMC_FFCR_EN_TI, - drvdata->base + TMC_FFCR); - writel_relaxed(0x0, drvdata->base + TMC_BUFWM); - tmc_enable_hw(drvdata); - - CS_LOCK(drvdata->base); -} - -static int tmc_enable(struct tmc_drvdata *drvdata, enum tmc_mode mode) -{ - int ret; - unsigned long flags; - - ret = clk_prepare_enable(drvdata->clk); - if (ret) - return ret; - - spin_lock_irqsave(&drvdata->spinlock, flags); - if (drvdata->reading) { - spin_unlock_irqrestore(&drvdata->spinlock, flags); - clk_disable_unprepare(drvdata->clk); - return -EBUSY; - } - - if (drvdata->config_type == TMC_CONFIG_TYPE_ETB) { - tmc_etb_enable_hw(drvdata); - } else if (drvdata->config_type == TMC_CONFIG_TYPE_ETR) { - tmc_etr_enable_hw(drvdata); - } else { - if (mode == TMC_MODE_CIRCULAR_BUFFER) - tmc_etb_enable_hw(drvdata); - else - tmc_etf_enable_hw(drvdata); - } - drvdata->enable = true; - spin_unlock_irqrestore(&drvdata->spinlock, flags); - - dev_info(drvdata->dev, "TMC enabled\n"); - return 0; -} - -static int tmc_enable_sink(struct coresight_device *csdev) -{ - struct tmc_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); - - return tmc_enable(drvdata, TMC_MODE_CIRCULAR_BUFFER); -} - -static int tmc_enable_link(struct coresight_device *csdev, int inport, - int outport) -{ - struct tmc_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); - - return tmc_enable(drvdata, TMC_MODE_HARDWARE_FIFO); -} - -static void tmc_etb_dump_hw(struct tmc_drvdata *drvdata) -{ - enum tmc_mem_intf_width memwidth; - u8 memwords; - char *bufp; - u32 read_data; - int i; - - memwidth = BMVAL(readl_relaxed(drvdata->base + CORESIGHT_DEVID), 8, 10); - if (memwidth == TMC_MEM_INTF_WIDTH_32BITS) - memwords = 1; - else if (memwidth == TMC_MEM_INTF_WIDTH_64BITS) - memwords = 2; - else if (memwidth == TMC_MEM_INTF_WIDTH_128BITS) - memwords = 4; - else - memwords = 8; - - bufp = drvdata->buf; - while (1) { - for (i = 0; i < memwords; i++) { - read_data = readl_relaxed(drvdata->base + TMC_RRD); - if (read_data == 0xFFFFFFFF) - return; - memcpy(bufp, &read_data, 4); - bufp += 4; - } - } -} - -static void tmc_etb_disable_hw(struct tmc_drvdata *drvdata) -{ - CS_UNLOCK(drvdata->base); - - tmc_flush_and_stop(drvdata); - tmc_etb_dump_hw(drvdata); - tmc_disable_hw(drvdata); - - CS_LOCK(drvdata->base); -} - -static void tmc_etr_dump_hw(struct tmc_drvdata *drvdata) -{ - u32 rwp, val; - - rwp = readl_relaxed(drvdata->base + TMC_RWP); - val = readl_relaxed(drvdata->base + TMC_STS); - - /* How much memory do we still have */ - if (val & BIT(0)) - drvdata->buf = drvdata->vaddr + rwp - drvdata->paddr; - else - drvdata->buf = drvdata->vaddr; -} - -static void tmc_etr_disable_hw(struct tmc_drvdata *drvdata) -{ - CS_UNLOCK(drvdata->base); - - tmc_flush_and_stop(drvdata); - tmc_etr_dump_hw(drvdata); - tmc_disable_hw(drvdata); - - CS_LOCK(drvdata->base); -} - -static void tmc_etf_disable_hw(struct tmc_drvdata *drvdata) -{ - CS_UNLOCK(drvdata->base); - - tmc_flush_and_stop(drvdata); - tmc_disable_hw(drvdata); - - CS_LOCK(drvdata->base); -} - -static void tmc_disable(struct tmc_drvdata *drvdata, enum tmc_mode mode) -{ - unsigned long flags; - - spin_lock_irqsave(&drvdata->spinlock, flags); - if (drvdata->reading) - goto out; - - if (drvdata->config_type == TMC_CONFIG_TYPE_ETB) { - tmc_etb_disable_hw(drvdata); - } else if (drvdata->config_type == TMC_CONFIG_TYPE_ETR) { - tmc_etr_disable_hw(drvdata); - } else { - if (mode == TMC_MODE_CIRCULAR_BUFFER) - tmc_etb_disable_hw(drvdata); - else - tmc_etf_disable_hw(drvdata); - } -out: - drvdata->enable = false; - spin_unlock_irqrestore(&drvdata->spinlock, flags); - - clk_disable_unprepare(drvdata->clk); - - dev_info(drvdata->dev, "TMC disabled\n"); -} - -static void tmc_disable_sink(struct coresight_device *csdev) -{ - struct tmc_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); - - tmc_disable(drvdata, TMC_MODE_CIRCULAR_BUFFER); -} - -static void tmc_disable_link(struct coresight_device *csdev, int inport, - int outport) -{ - struct tmc_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); - - tmc_disable(drvdata, TMC_MODE_HARDWARE_FIFO); -} - -static const struct coresight_ops_sink tmc_sink_ops = { - .enable = tmc_enable_sink, - .disable = tmc_disable_sink, -}; - -static const struct coresight_ops_link tmc_link_ops = { - .enable = tmc_enable_link, - .disable = tmc_disable_link, -}; - -static const struct coresight_ops tmc_etb_cs_ops = { - .sink_ops = &tmc_sink_ops, -}; - -static const struct coresight_ops tmc_etr_cs_ops = { - .sink_ops = &tmc_sink_ops, -}; - -static const struct coresight_ops tmc_etf_cs_ops = { - .sink_ops = &tmc_sink_ops, - .link_ops = &tmc_link_ops, -}; - -static int tmc_read_prepare(struct tmc_drvdata *drvdata) -{ - int ret; - unsigned long flags; - enum tmc_mode mode; - - spin_lock_irqsave(&drvdata->spinlock, flags); - if (!drvdata->enable) - goto out; - - if (drvdata->config_type == TMC_CONFIG_TYPE_ETB) { - tmc_etb_disable_hw(drvdata); - } else if (drvdata->config_type == TMC_CONFIG_TYPE_ETR) { - tmc_etr_disable_hw(drvdata); - } else { - mode = readl_relaxed(drvdata->base + TMC_MODE); - if (mode == TMC_MODE_CIRCULAR_BUFFER) { - tmc_etb_disable_hw(drvdata); - } else { - ret = -ENODEV; - goto err; - } - } -out: - drvdata->reading = true; - spin_unlock_irqrestore(&drvdata->spinlock, flags); - - dev_info(drvdata->dev, "TMC read start\n"); - return 0; -err: - spin_unlock_irqrestore(&drvdata->spinlock, flags); - return ret; -} - -static void tmc_read_unprepare(struct tmc_drvdata *drvdata) -{ - unsigned long flags; - enum tmc_mode mode; - - spin_lock_irqsave(&drvdata->spinlock, flags); - if (!drvdata->enable) - goto out; - - if (drvdata->config_type == TMC_CONFIG_TYPE_ETB) { - tmc_etb_enable_hw(drvdata); - } else if (drvdata->config_type == TMC_CONFIG_TYPE_ETR) { - tmc_etr_enable_hw(drvdata); - } else { - mode = readl_relaxed(drvdata->base + TMC_MODE); - if (mode == TMC_MODE_CIRCULAR_BUFFER) - tmc_etb_enable_hw(drvdata); - } -out: - drvdata->reading = false; - spin_unlock_irqrestore(&drvdata->spinlock, flags); - - dev_info(drvdata->dev, "TMC read end\n"); -} - -static int tmc_open(struct inode *inode, struct file *file) -{ - struct tmc_drvdata *drvdata = container_of(file->private_data, - struct tmc_drvdata, miscdev); - int ret = 0; - - if (drvdata->read_count++) - goto out; - - ret = tmc_read_prepare(drvdata); - if (ret) - return ret; -out: - nonseekable_open(inode, file); - - dev_dbg(drvdata->dev, "%s: successfully opened\n", __func__); - return 0; -} - -static ssize_t tmc_read(struct file *file, char __user *data, size_t len, - loff_t *ppos) -{ - struct tmc_drvdata *drvdata = container_of(file->private_data, - struct tmc_drvdata, miscdev); - char *bufp = drvdata->buf + *ppos; - - if (*ppos + len > drvdata->size) - len = drvdata->size - *ppos; - - if (drvdata->config_type == TMC_CONFIG_TYPE_ETR) { - if (bufp == (char *)(drvdata->vaddr + drvdata->size)) - bufp = drvdata->vaddr; - else if (bufp > (char *)(drvdata->vaddr + drvdata->size)) - bufp -= drvdata->size; - if ((bufp + len) > (char *)(drvdata->vaddr + drvdata->size)) - len = (char *)(drvdata->vaddr + drvdata->size) - bufp; - } - - if (copy_to_user(data, bufp, len)) { - dev_dbg(drvdata->dev, "%s: copy_to_user failed\n", __func__); - return -EFAULT; - } - - *ppos += len; - - dev_dbg(drvdata->dev, "%s: %zu bytes copied, %d bytes left\n", - __func__, len, (int)(drvdata->size - *ppos)); - return len; -} - -static int tmc_release(struct inode *inode, struct file *file) -{ - struct tmc_drvdata *drvdata = container_of(file->private_data, - struct tmc_drvdata, miscdev); - - if (--drvdata->read_count) { - if (drvdata->read_count < 0) { - dev_err(drvdata->dev, "mismatched close\n"); - drvdata->read_count = 0; - } - goto out; - } - - tmc_read_unprepare(drvdata); -out: - dev_dbg(drvdata->dev, "%s: released\n", __func__); - return 0; -} - -static const struct file_operations tmc_fops = { - .owner = THIS_MODULE, - .open = tmc_open, - .read = tmc_read, - .release = tmc_release, - .llseek = no_llseek, -}; - -static ssize_t status_show(struct device *dev, - struct device_attribute *attr, char *buf) -{ - int ret; - unsigned long flags; - u32 tmc_rsz, tmc_sts, tmc_rrp, tmc_rwp, tmc_trg; - u32 tmc_ctl, tmc_ffsr, tmc_ffcr, tmc_mode, tmc_pscr; - u32 devid; - struct tmc_drvdata *drvdata = dev_get_drvdata(dev->parent); - - ret = clk_prepare_enable(drvdata->clk); - if (ret) - goto out; - - spin_lock_irqsave(&drvdata->spinlock, flags); - CS_UNLOCK(drvdata->base); - - tmc_rsz = readl_relaxed(drvdata->base + TMC_RSZ); - tmc_sts = readl_relaxed(drvdata->base + TMC_STS); - tmc_rrp = readl_relaxed(drvdata->base + TMC_RRP); - tmc_rwp = readl_relaxed(drvdata->base + TMC_RWP); - tmc_trg = readl_relaxed(drvdata->base + TMC_TRG); - tmc_ctl = readl_relaxed(drvdata->base + TMC_CTL); - tmc_ffsr = readl_relaxed(drvdata->base + TMC_FFSR); - tmc_ffcr = readl_relaxed(drvdata->base + TMC_FFCR); - tmc_mode = readl_relaxed(drvdata->base + TMC_MODE); - tmc_pscr = readl_relaxed(drvdata->base + TMC_PSCR); - devid = readl_relaxed(drvdata->base + CORESIGHT_DEVID); - - CS_LOCK(drvdata->base); - spin_unlock_irqrestore(&drvdata->spinlock, flags); - - clk_disable_unprepare(drvdata->clk); - - return sprintf(buf, - "Depth:\t\t0x%x\n" - "Status:\t\t0x%x\n" - "RAM read ptr:\t0x%x\n" - "RAM wrt ptr:\t0x%x\n" - "Trigger cnt:\t0x%x\n" - "Control:\t0x%x\n" - "Flush status:\t0x%x\n" - "Flush ctrl:\t0x%x\n" - "Mode:\t\t0x%x\n" - "PSRC:\t\t0x%x\n" - "DEVID:\t\t0x%x\n", - tmc_rsz, tmc_sts, tmc_rrp, tmc_rwp, tmc_trg, - tmc_ctl, tmc_ffsr, tmc_ffcr, tmc_mode, tmc_pscr, devid); -out: - return -EINVAL; -} -static DEVICE_ATTR_RO(status); - -static ssize_t trigger_cntr_show(struct device *dev, - struct device_attribute *attr, char *buf) -{ - struct tmc_drvdata *drvdata = dev_get_drvdata(dev->parent); - unsigned long val = drvdata->trigger_cntr; - - return sprintf(buf, "%#lx\n", val); -} - -static ssize_t trigger_cntr_store(struct device *dev, - struct device_attribute *attr, - const char *buf, size_t size) -{ - int ret; - unsigned long val; - struct tmc_drvdata *drvdata = dev_get_drvdata(dev->parent); - - ret = kstrtoul(buf, 16, &val); - if (ret) - return ret; - - drvdata->trigger_cntr = val; - return size; -} -static DEVICE_ATTR_RW(trigger_cntr); - -static struct attribute *coresight_etb_attrs[] = { - &dev_attr_trigger_cntr.attr, - &dev_attr_status.attr, - NULL, -}; -ATTRIBUTE_GROUPS(coresight_etb); - -static struct attribute *coresight_etr_attrs[] = { - &dev_attr_trigger_cntr.attr, - &dev_attr_status.attr, - NULL, -}; -ATTRIBUTE_GROUPS(coresight_etr); - -static struct attribute *coresight_etf_attrs[] = { - &dev_attr_trigger_cntr.attr, - &dev_attr_status.attr, - NULL, -}; -ATTRIBUTE_GROUPS(coresight_etf); - -static int tmc_probe(struct amba_device *adev, const struct amba_id *id) -{ - int ret = 0; - u32 devid; - void __iomem *base; - struct device *dev = &adev->dev; - struct coresight_platform_data *pdata = NULL; - struct tmc_drvdata *drvdata; - struct resource *res = &adev->res; - struct coresight_desc *desc; - struct device_node *np = adev->dev.of_node; - - if (np) { - pdata = of_get_coresight_platform_data(dev, np); - if (IS_ERR(pdata)) - return PTR_ERR(pdata); - adev->dev.platform_data = pdata; - } - - drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL); - if (!drvdata) - return -ENOMEM; - - drvdata->dev = &adev->dev; - dev_set_drvdata(dev, drvdata); - - /* Validity for the resource is already checked by the AMBA core */ - base = devm_ioremap_resource(dev, res); - if (IS_ERR(base)) - return PTR_ERR(base); - - drvdata->base = base; - - spin_lock_init(&drvdata->spinlock); - - drvdata->clk = adev->pclk; - ret = clk_prepare_enable(drvdata->clk); - if (ret) - return ret; - - devid = readl_relaxed(drvdata->base + CORESIGHT_DEVID); - drvdata->config_type = BMVAL(devid, 6, 7); - - if (drvdata->config_type == TMC_CONFIG_TYPE_ETR) { - if (np) - ret = of_property_read_u32(np, - "arm,buffer-size", - &drvdata->size); - if (ret) - drvdata->size = SZ_1M; - } else { - drvdata->size = readl_relaxed(drvdata->base + TMC_RSZ) * 4; - } - - clk_disable_unprepare(drvdata->clk); - - if (drvdata->config_type == TMC_CONFIG_TYPE_ETR) { - drvdata->vaddr = dma_alloc_coherent(dev, drvdata->size, - &drvdata->paddr, GFP_KERNEL); - if (!drvdata->vaddr) - return -ENOMEM; - - memset(drvdata->vaddr, 0, drvdata->size); - drvdata->buf = drvdata->vaddr; - } else { - drvdata->buf = devm_kzalloc(dev, drvdata->size, GFP_KERNEL); - if (!drvdata->buf) - return -ENOMEM; - } - - desc = devm_kzalloc(dev, sizeof(*desc), GFP_KERNEL); - if (!desc) { - ret = -ENOMEM; - goto err_devm_kzalloc; - } - - desc->pdata = pdata; - desc->dev = dev; - desc->subtype.sink_subtype = CORESIGHT_DEV_SUBTYPE_SINK_BUFFER; - - if (drvdata->config_type == TMC_CONFIG_TYPE_ETB) { - desc->type = CORESIGHT_DEV_TYPE_SINK; - desc->ops = &tmc_etb_cs_ops; - desc->groups = coresight_etb_groups; - } else if (drvdata->config_type == TMC_CONFIG_TYPE_ETR) { - desc->type = CORESIGHT_DEV_TYPE_SINK; - desc->ops = &tmc_etr_cs_ops; - desc->groups = coresight_etr_groups; - } else { - desc->type = CORESIGHT_DEV_TYPE_LINKSINK; - desc->subtype.link_subtype = CORESIGHT_DEV_SUBTYPE_LINK_FIFO; - desc->ops = &tmc_etf_cs_ops; - desc->groups = coresight_etf_groups; - } - - drvdata->csdev = coresight_register(desc); - if (IS_ERR(drvdata->csdev)) { - ret = PTR_ERR(drvdata->csdev); - goto err_devm_kzalloc; - } - - drvdata->miscdev.name = pdata->name; - drvdata->miscdev.minor = MISC_DYNAMIC_MINOR; - drvdata->miscdev.fops = &tmc_fops; - ret = misc_register(&drvdata->miscdev); - if (ret) - goto err_misc_register; - - dev_info(dev, "TMC initialized\n"); - return 0; - -err_misc_register: - coresight_unregister(drvdata->csdev); -err_devm_kzalloc: - if (drvdata->config_type == TMC_CONFIG_TYPE_ETR) - dma_free_coherent(dev, drvdata->size, - &drvdata->paddr, GFP_KERNEL); - return ret; -} - -static int tmc_remove(struct amba_device *adev) -{ - struct tmc_drvdata *drvdata = amba_get_drvdata(adev); - - misc_deregister(&drvdata->miscdev); - coresight_unregister(drvdata->csdev); - if (drvdata->config_type == TMC_CONFIG_TYPE_ETR) - dma_free_coherent(drvdata->dev, drvdata->size, - &drvdata->paddr, GFP_KERNEL); - - return 0; -} - -static struct amba_id tmc_ids[] = { - { - .id = 0x0003b961, - .mask = 0x0003ffff, - }, - { 0, 0}, -}; - -static struct amba_driver tmc_driver = { - .drv = { - .name = "coresight-tmc", - .owner = THIS_MODULE, - }, - .probe = tmc_probe, - .remove = tmc_remove, - .id_table = tmc_ids, -}; - -module_amba_driver(tmc_driver); - -MODULE_LICENSE("GPL v2"); -MODULE_DESCRIPTION("CoreSight Trace Memory Controller driver"); diff --git a/drivers/coresight/coresight-tpiu.c b/drivers/coresight/coresight-tpiu.c deleted file mode 100644 index 3b33af2416bb..000000000000 --- a/drivers/coresight/coresight-tpiu.c +++ /dev/null @@ -1,207 +0,0 @@ -/* Copyright (c) 2011-2012, The Linux Foundation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include "coresight-priv.h" - -#define TPIU_SUPP_PORTSZ 0x000 -#define TPIU_CURR_PORTSZ 0x004 -#define TPIU_SUPP_TRIGMODES 0x100 -#define TPIU_TRIG_CNTRVAL 0x104 -#define TPIU_TRIG_MULT 0x108 -#define TPIU_SUPP_TESTPATM 0x200 -#define TPIU_CURR_TESTPATM 0x204 -#define TPIU_TEST_PATREPCNTR 0x208 -#define TPIU_FFSR 0x300 -#define TPIU_FFCR 0x304 -#define TPIU_FSYNC_CNTR 0x308 -#define TPIU_EXTCTL_INPORT 0x400 -#define TPIU_EXTCTL_OUTPORT 0x404 -#define TPIU_ITTRFLINACK 0xee4 -#define TPIU_ITTRFLIN 0xee8 -#define TPIU_ITATBDATA0 0xeec -#define TPIU_ITATBCTR2 0xef0 -#define TPIU_ITATBCTR1 0xef4 -#define TPIU_ITATBCTR0 0xef8 - -/** register definition **/ -/* FFCR - 0x304 */ -#define FFCR_FON_MAN BIT(6) - -/** - * @base: memory mapped base address for this component. - * @dev: the device entity associated to this component. - * @csdev: component vitals needed by the framework. - * @clk: the clock this component is associated to. - */ -struct tpiu_drvdata { - void __iomem *base; - struct device *dev; - struct coresight_device *csdev; - struct clk *clk; -}; - -static void tpiu_enable_hw(struct tpiu_drvdata *drvdata) -{ - CS_UNLOCK(drvdata->base); - - /* TODO: fill this up */ - - CS_LOCK(drvdata->base); -} - -static int tpiu_enable(struct coresight_device *csdev) -{ - struct tpiu_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); - int ret; - - ret = clk_prepare_enable(drvdata->clk); - if (ret) - return ret; - - tpiu_enable_hw(drvdata); - - dev_info(drvdata->dev, "TPIU enabled\n"); - return 0; -} - -static void tpiu_disable_hw(struct tpiu_drvdata *drvdata) -{ - CS_UNLOCK(drvdata->base); - - /* Clear formatter controle reg. */ - writel_relaxed(0x0, drvdata->base + TPIU_FFCR); - /* Generate manual flush */ - writel_relaxed(FFCR_FON_MAN, drvdata->base + TPIU_FFCR); - - CS_LOCK(drvdata->base); -} - -static void tpiu_disable(struct coresight_device *csdev) -{ - struct tpiu_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); - - tpiu_disable_hw(drvdata); - - clk_disable_unprepare(drvdata->clk); - - dev_info(drvdata->dev, "TPIU disabled\n"); -} - -static const struct coresight_ops_sink tpiu_sink_ops = { - .enable = tpiu_enable, - .disable = tpiu_disable, -}; - -static const struct coresight_ops tpiu_cs_ops = { - .sink_ops = &tpiu_sink_ops, -}; - -static int tpiu_probe(struct amba_device *adev, const struct amba_id *id) -{ - int ret; - void __iomem *base; - struct device *dev = &adev->dev; - struct coresight_platform_data *pdata = NULL; - struct tpiu_drvdata *drvdata; - struct resource *res = &adev->res; - struct coresight_desc *desc; - struct device_node *np = adev->dev.of_node; - - if (np) { - pdata = of_get_coresight_platform_data(dev, np); - if (IS_ERR(pdata)) - return PTR_ERR(pdata); - adev->dev.platform_data = pdata; - } - - drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL); - if (!drvdata) - return -ENOMEM; - - drvdata->dev = &adev->dev; - dev_set_drvdata(dev, drvdata); - - /* Validity for the resource is already checked by the AMBA core */ - base = devm_ioremap_resource(dev, res); - if (IS_ERR(base)) - return PTR_ERR(base); - - drvdata->base = base; - - drvdata->clk = adev->pclk; - ret = clk_prepare_enable(drvdata->clk); - if (ret) - return ret; - - /* Disable tpiu to support older devices */ - tpiu_disable_hw(drvdata); - - clk_disable_unprepare(drvdata->clk); - - desc = devm_kzalloc(dev, sizeof(*desc), GFP_KERNEL); - if (!desc) - return -ENOMEM; - - desc->type = CORESIGHT_DEV_TYPE_SINK; - desc->subtype.sink_subtype = CORESIGHT_DEV_SUBTYPE_SINK_PORT; - desc->ops = &tpiu_cs_ops; - desc->pdata = pdata; - desc->dev = dev; - drvdata->csdev = coresight_register(desc); - if (IS_ERR(drvdata->csdev)) - return PTR_ERR(drvdata->csdev); - - dev_info(dev, "TPIU initialized\n"); - return 0; -} - -static int tpiu_remove(struct amba_device *adev) -{ - struct tpiu_drvdata *drvdata = amba_get_drvdata(adev); - - coresight_unregister(drvdata->csdev); - return 0; -} - -static struct amba_id tpiu_ids[] = { - { - .id = 0x0003b912, - .mask = 0x0003ffff, - }, - { 0, 0}, -}; - -static struct amba_driver tpiu_driver = { - .drv = { - .name = "coresight-tpiu", - .owner = THIS_MODULE, - }, - .probe = tpiu_probe, - .remove = tpiu_remove, - .id_table = tpiu_ids, -}; - -module_amba_driver(tpiu_driver); - -MODULE_LICENSE("GPL v2"); -MODULE_DESCRIPTION("CoreSight Trace Port Interface Unit driver"); diff --git a/drivers/coresight/coresight.c b/drivers/coresight/coresight.c deleted file mode 100644 index 894531d315b8..000000000000 --- a/drivers/coresight/coresight.c +++ /dev/null @@ -1,720 +0,0 @@ -/* Copyright (c) 2012, The Linux Foundation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include "coresight-priv.h" - -static DEFINE_MUTEX(coresight_mutex); - -static int coresight_id_match(struct device *dev, void *data) -{ - int trace_id, i_trace_id; - struct coresight_device *csdev, *i_csdev; - - csdev = data; - i_csdev = to_coresight_device(dev); - - /* - * No need to care about oneself and components that are not - * sources or not enabled - */ - if (i_csdev == csdev || !i_csdev->enable || - i_csdev->type != CORESIGHT_DEV_TYPE_SOURCE) - return 0; - - /* Get the source ID for both compoment */ - trace_id = source_ops(csdev)->trace_id(csdev); - i_trace_id = source_ops(i_csdev)->trace_id(i_csdev); - - /* All you need is one */ - if (trace_id == i_trace_id) - return 1; - - return 0; -} - -static int coresight_source_is_unique(struct coresight_device *csdev) -{ - int trace_id = source_ops(csdev)->trace_id(csdev); - - /* this shouldn't happen */ - if (trace_id < 0) - return 0; - - return !bus_for_each_dev(&coresight_bustype, NULL, - csdev, coresight_id_match); -} - -static int coresight_find_link_inport(struct coresight_device *csdev) -{ - int i; - struct coresight_device *parent; - struct coresight_connection *conn; - - parent = container_of(csdev->path_link.next, - struct coresight_device, path_link); - - for (i = 0; i < parent->nr_outport; i++) { - conn = &parent->conns[i]; - if (conn->child_dev == csdev) - return conn->child_port; - } - - dev_err(&csdev->dev, "couldn't find inport, parent: %s, child: %s\n", - dev_name(&parent->dev), dev_name(&csdev->dev)); - - return 0; -} - -static int coresight_find_link_outport(struct coresight_device *csdev) -{ - int i; - struct coresight_device *child; - struct coresight_connection *conn; - - child = container_of(csdev->path_link.prev, - struct coresight_device, path_link); - - for (i = 0; i < csdev->nr_outport; i++) { - conn = &csdev->conns[i]; - if (conn->child_dev == child) - return conn->outport; - } - - dev_err(&csdev->dev, "couldn't find outport, parent: %s, child: %s\n", - dev_name(&csdev->dev), dev_name(&child->dev)); - - return 0; -} - -static int coresight_enable_sink(struct coresight_device *csdev) -{ - int ret; - - if (!csdev->enable) { - if (sink_ops(csdev)->enable) { - ret = sink_ops(csdev)->enable(csdev); - if (ret) - return ret; - } - csdev->enable = true; - } - - atomic_inc(csdev->refcnt); - - return 0; -} - -static void coresight_disable_sink(struct coresight_device *csdev) -{ - if (atomic_dec_return(csdev->refcnt) == 0) { - if (sink_ops(csdev)->disable) { - sink_ops(csdev)->disable(csdev); - csdev->enable = false; - } - } -} - -static int coresight_enable_link(struct coresight_device *csdev) -{ - int ret; - int link_subtype; - int refport, inport, outport; - - inport = coresight_find_link_inport(csdev); - outport = coresight_find_link_outport(csdev); - link_subtype = csdev->subtype.link_subtype; - - if (link_subtype == CORESIGHT_DEV_SUBTYPE_LINK_MERG) - refport = inport; - else if (link_subtype == CORESIGHT_DEV_SUBTYPE_LINK_SPLIT) - refport = outport; - else - refport = 0; - - if (atomic_inc_return(&csdev->refcnt[refport]) == 1) { - if (link_ops(csdev)->enable) { - ret = link_ops(csdev)->enable(csdev, inport, outport); - if (ret) - return ret; - } - } - - csdev->enable = true; - - return 0; -} - -static void coresight_disable_link(struct coresight_device *csdev) -{ - int i, nr_conns; - int link_subtype; - int refport, inport, outport; - - inport = coresight_find_link_inport(csdev); - outport = coresight_find_link_outport(csdev); - link_subtype = csdev->subtype.link_subtype; - - if (link_subtype == CORESIGHT_DEV_SUBTYPE_LINK_MERG) { - refport = inport; - nr_conns = csdev->nr_inport; - } else if (link_subtype == CORESIGHT_DEV_SUBTYPE_LINK_SPLIT) { - refport = outport; - nr_conns = csdev->nr_outport; - } else { - refport = 0; - nr_conns = 1; - } - - if (atomic_dec_return(&csdev->refcnt[refport]) == 0) { - if (link_ops(csdev)->disable) - link_ops(csdev)->disable(csdev, inport, outport); - } - - for (i = 0; i < nr_conns; i++) - if (atomic_read(&csdev->refcnt[i]) != 0) - return; - - csdev->enable = false; -} - -static int coresight_enable_source(struct coresight_device *csdev) -{ - int ret; - - if (!coresight_source_is_unique(csdev)) { - dev_warn(&csdev->dev, "traceID %d not unique\n", - source_ops(csdev)->trace_id(csdev)); - return -EINVAL; - } - - if (!csdev->enable) { - if (source_ops(csdev)->enable) { - ret = source_ops(csdev)->enable(csdev); - if (ret) - return ret; - } - csdev->enable = true; - } - - atomic_inc(csdev->refcnt); - - return 0; -} - -static void coresight_disable_source(struct coresight_device *csdev) -{ - if (atomic_dec_return(csdev->refcnt) == 0) { - if (source_ops(csdev)->disable) { - source_ops(csdev)->disable(csdev); - csdev->enable = false; - } - } -} - -static int coresight_enable_path(struct list_head *path) -{ - int ret = 0; - struct coresight_device *cd; - - list_for_each_entry(cd, path, path_link) { - if (cd == list_first_entry(path, struct coresight_device, - path_link)) { - ret = coresight_enable_sink(cd); - } else if (list_is_last(&cd->path_link, path)) { - /* - * Don't enable the source just yet - this needs to - * happen at the very end when all links and sink - * along the path have been configured properly. - */ - ; - } else { - ret = coresight_enable_link(cd); - } - if (ret) - goto err; - } - - return 0; -err: - list_for_each_entry_continue_reverse(cd, path, path_link) { - if (cd == list_first_entry(path, struct coresight_device, - path_link)) { - coresight_disable_sink(cd); - } else if (list_is_last(&cd->path_link, path)) { - ; - } else { - coresight_disable_link(cd); - } - } - - return ret; -} - -static int coresight_disable_path(struct list_head *path) -{ - struct coresight_device *cd; - - list_for_each_entry_reverse(cd, path, path_link) { - if (cd == list_first_entry(path, struct coresight_device, - path_link)) { - coresight_disable_sink(cd); - } else if (list_is_last(&cd->path_link, path)) { - /* - * The source has already been stopped, no need - * to do it again here. - */ - ; - } else { - coresight_disable_link(cd); - } - } - - return 0; -} - -static int coresight_build_paths(struct coresight_device *csdev, - struct list_head *path, - bool enable) -{ - int i, ret = -EINVAL; - struct coresight_connection *conn; - - list_add(&csdev->path_link, path); - - if ((csdev->type == CORESIGHT_DEV_TYPE_SINK || - csdev->type == CORESIGHT_DEV_TYPE_LINKSINK) && - csdev->activated) { - if (enable) - ret = coresight_enable_path(path); - else - ret = coresight_disable_path(path); - } else { - for (i = 0; i < csdev->nr_outport; i++) { - conn = &csdev->conns[i]; - if (coresight_build_paths(conn->child_dev, - path, enable) == 0) - ret = 0; - } - } - - if (list_first_entry(path, struct coresight_device, path_link) != csdev) - dev_err(&csdev->dev, "wrong device in %s\n", __func__); - - list_del(&csdev->path_link); - - return ret; -} - -int coresight_enable(struct coresight_device *csdev) -{ - int ret = 0; - LIST_HEAD(path); - - mutex_lock(&coresight_mutex); - if (csdev->type != CORESIGHT_DEV_TYPE_SOURCE) { - ret = -EINVAL; - dev_err(&csdev->dev, "wrong device type in %s\n", __func__); - goto out; - } - if (csdev->enable) - goto out; - - if (coresight_build_paths(csdev, &path, true)) { - dev_err(&csdev->dev, "building path(s) failed\n"); - goto out; - } - - if (coresight_enable_source(csdev)) - dev_err(&csdev->dev, "source enable failed\n"); -out: - mutex_unlock(&coresight_mutex); - return ret; -} -EXPORT_SYMBOL_GPL(coresight_enable); - -void coresight_disable(struct coresight_device *csdev) -{ - LIST_HEAD(path); - - mutex_lock(&coresight_mutex); - if (csdev->type != CORESIGHT_DEV_TYPE_SOURCE) { - dev_err(&csdev->dev, "wrong device type in %s\n", __func__); - goto out; - } - if (!csdev->enable) - goto out; - - coresight_disable_source(csdev); - if (coresight_build_paths(csdev, &path, false)) - dev_err(&csdev->dev, "releasing path(s) failed\n"); - -out: - mutex_unlock(&coresight_mutex); -} -EXPORT_SYMBOL_GPL(coresight_disable); - -static ssize_t enable_sink_show(struct device *dev, - struct device_attribute *attr, char *buf) -{ - struct coresight_device *csdev = to_coresight_device(dev); - - return scnprintf(buf, PAGE_SIZE, "%u\n", (unsigned)csdev->activated); -} - -static ssize_t enable_sink_store(struct device *dev, - struct device_attribute *attr, - const char *buf, size_t size) -{ - int ret; - unsigned long val; - struct coresight_device *csdev = to_coresight_device(dev); - - ret = kstrtoul(buf, 10, &val); - if (ret) - return ret; - - if (val) - csdev->activated = true; - else - csdev->activated = false; - - return size; - -} -static DEVICE_ATTR_RW(enable_sink); - -static ssize_t enable_source_show(struct device *dev, - struct device_attribute *attr, char *buf) -{ - struct coresight_device *csdev = to_coresight_device(dev); - - return scnprintf(buf, PAGE_SIZE, "%u\n", (unsigned)csdev->enable); -} - -static ssize_t enable_source_store(struct device *dev, - struct device_attribute *attr, - const char *buf, size_t size) -{ - int ret = 0; - unsigned long val; - struct coresight_device *csdev = to_coresight_device(dev); - - ret = kstrtoul(buf, 10, &val); - if (ret) - return ret; - - if (val) { - ret = coresight_enable(csdev); - if (ret) - return ret; - } else { - coresight_disable(csdev); - } - - return size; -} -static DEVICE_ATTR_RW(enable_source); - -static struct attribute *coresight_sink_attrs[] = { - &dev_attr_enable_sink.attr, - NULL, -}; -ATTRIBUTE_GROUPS(coresight_sink); - -static struct attribute *coresight_source_attrs[] = { - &dev_attr_enable_source.attr, - NULL, -}; -ATTRIBUTE_GROUPS(coresight_source); - -static struct device_type coresight_dev_type[] = { - { - .name = "none", - }, - { - .name = "sink", - .groups = coresight_sink_groups, - }, - { - .name = "link", - }, - { - .name = "linksink", - .groups = coresight_sink_groups, - }, - { - .name = "source", - .groups = coresight_source_groups, - }, -}; - -static void coresight_device_release(struct device *dev) -{ - struct coresight_device *csdev = to_coresight_device(dev); - - kfree(csdev); -} - -static int coresight_orphan_match(struct device *dev, void *data) -{ - int i; - bool still_orphan = false; - struct coresight_device *csdev, *i_csdev; - struct coresight_connection *conn; - - csdev = data; - i_csdev = to_coresight_device(dev); - - /* No need to check oneself */ - if (csdev == i_csdev) - return 0; - - /* Move on to another component if no connection is orphan */ - if (!i_csdev->orphan) - return 0; - /* - * Circle throuch all the connection of that component. If we find - * an orphan connection whose name matches @csdev, link it. - */ - for (i = 0; i < i_csdev->nr_outport; i++) { - conn = &i_csdev->conns[i]; - - /* We have found at least one orphan connection */ - if (conn->child_dev == NULL) { - /* Does it match this newly added device? */ - if (!strcmp(dev_name(&csdev->dev), conn->child_name)) { - conn->child_dev = csdev; - } else { - /* This component still has an orphan */ - still_orphan = true; - } - } - } - - i_csdev->orphan = still_orphan; - - /* - * Returning '0' ensures that all known component on the - * bus will be checked. - */ - return 0; -} - -static void coresight_fixup_orphan_conns(struct coresight_device *csdev) -{ - /* - * No need to check for a return value as orphan connection(s) - * are hooked-up with each newly added component. - */ - bus_for_each_dev(&coresight_bustype, NULL, - csdev, coresight_orphan_match); -} - - -static int coresight_name_match(struct device *dev, void *data) -{ - char *to_match; - struct coresight_device *i_csdev; - - to_match = data; - i_csdev = to_coresight_device(dev); - - if (!strcmp(to_match, dev_name(&i_csdev->dev))) - return 1; - - return 0; -} - -static void coresight_fixup_device_conns(struct coresight_device *csdev) -{ - int i; - struct device *dev = NULL; - struct coresight_connection *conn; - - for (i = 0; i < csdev->nr_outport; i++) { - conn = &csdev->conns[i]; - dev = bus_find_device(&coresight_bustype, NULL, - (void *)conn->child_name, - coresight_name_match); - - if (dev) { - conn->child_dev = to_coresight_device(dev); - } else { - csdev->orphan = true; - conn->child_dev = NULL; - } - } -} - -/** - * coresight_timeout - loop until a bit has changed to a specific state. - * @addr: base address of the area of interest. - * @offset: address of a register, starting from @addr. - * @position: the position of the bit of interest. - * @value: the value the bit should have. - * - * Return: 0 as soon as the bit has taken the desired state or -EAGAIN if - * TIMEOUT_US has elapsed, which ever happens first. - */ - -int coresight_timeout(void __iomem *addr, u32 offset, int position, int value) -{ - int i; - u32 val; - - for (i = TIMEOUT_US; i > 0; i--) { - val = __raw_readl(addr + offset); - /* waiting on the bit to go from 0 to 1 */ - if (value) { - if (val & BIT(position)) - return 0; - /* waiting on the bit to go from 1 to 0 */ - } else { - if (!(val & BIT(position))) - return 0; - } - - /* - * Delay is arbitrary - the specification doesn't say how long - * we are expected to wait. Extra check required to make sure - * we don't wait needlessly on the last iteration. - */ - if (i - 1) - udelay(1); - } - - return -EAGAIN; -} - -struct bus_type coresight_bustype = { - .name = "coresight", -}; - -static int __init coresight_init(void) -{ - return bus_register(&coresight_bustype); -} -postcore_initcall(coresight_init); - -struct coresight_device *coresight_register(struct coresight_desc *desc) -{ - int i; - int ret; - int link_subtype; - int nr_refcnts = 1; - atomic_t *refcnts = NULL; - struct coresight_device *csdev; - struct coresight_connection *conns; - - csdev = kzalloc(sizeof(*csdev), GFP_KERNEL); - if (!csdev) { - ret = -ENOMEM; - goto err_kzalloc_csdev; - } - - if (desc->type == CORESIGHT_DEV_TYPE_LINK || - desc->type == CORESIGHT_DEV_TYPE_LINKSINK) { - link_subtype = desc->subtype.link_subtype; - - if (link_subtype == CORESIGHT_DEV_SUBTYPE_LINK_MERG) - nr_refcnts = desc->pdata->nr_inport; - else if (link_subtype == CORESIGHT_DEV_SUBTYPE_LINK_SPLIT) - nr_refcnts = desc->pdata->nr_outport; - } - - refcnts = kcalloc(nr_refcnts, sizeof(*refcnts), GFP_KERNEL); - if (!refcnts) { - ret = -ENOMEM; - goto err_kzalloc_refcnts; - } - - csdev->refcnt = refcnts; - - csdev->nr_inport = desc->pdata->nr_inport; - csdev->nr_outport = desc->pdata->nr_outport; - conns = kcalloc(csdev->nr_outport, sizeof(*conns), GFP_KERNEL); - if (!conns) { - ret = -ENOMEM; - goto err_kzalloc_conns; - } - - for (i = 0; i < csdev->nr_outport; i++) { - conns[i].outport = desc->pdata->outports[i]; - conns[i].child_name = desc->pdata->child_names[i]; - conns[i].child_port = desc->pdata->child_ports[i]; - } - - csdev->conns = conns; - - csdev->type = desc->type; - csdev->subtype = desc->subtype; - csdev->ops = desc->ops; - csdev->orphan = false; - - csdev->dev.type = &coresight_dev_type[desc->type]; - csdev->dev.groups = desc->groups; - csdev->dev.parent = desc->dev; - csdev->dev.release = coresight_device_release; - csdev->dev.bus = &coresight_bustype; - dev_set_name(&csdev->dev, "%s", desc->pdata->name); - - ret = device_register(&csdev->dev); - if (ret) - goto err_device_register; - - mutex_lock(&coresight_mutex); - - coresight_fixup_device_conns(csdev); - coresight_fixup_orphan_conns(csdev); - - mutex_unlock(&coresight_mutex); - - return csdev; - -err_device_register: - kfree(conns); -err_kzalloc_conns: - kfree(refcnts); -err_kzalloc_refcnts: - kfree(csdev); -err_kzalloc_csdev: - return ERR_PTR(ret); -} -EXPORT_SYMBOL_GPL(coresight_register); - -void coresight_unregister(struct coresight_device *csdev) -{ - mutex_lock(&coresight_mutex); - - kfree(csdev->conns); - device_unregister(&csdev->dev); - - mutex_unlock(&coresight_mutex); -} -EXPORT_SYMBOL_GPL(coresight_unregister); - -MODULE_LICENSE("GPL v2"); diff --git a/drivers/coresight/of_coresight.c b/drivers/coresight/of_coresight.c deleted file mode 100644 index f3cc8e97a0f8..000000000000 --- a/drivers/coresight/of_coresight.c +++ /dev/null @@ -1,200 +0,0 @@ -/* Copyright (c) 2012, The Linux Foundation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - - -static int of_dev_node_match(struct device *dev, void *data) -{ - return dev->of_node == data; -} - -static struct device * -of_coresight_get_endpoint_device(struct device_node *endpoint) -{ - struct device *dev = NULL; - - /* - * If we have a non-configuable replicator, it will be found on the - * platform bus. - */ - dev = bus_find_device(&platform_bus_type, NULL, - endpoint, of_dev_node_match); - if (dev) - return dev; - - /* - * We have a configurable component - circle through the AMBA bus - * looking for the device that matches the endpoint node. - */ - return bus_find_device(&amba_bustype, NULL, - endpoint, of_dev_node_match); -} - -static struct device_node *of_get_coresight_endpoint( - const struct device_node *parent, struct device_node *prev) -{ - struct device_node *node = of_graph_get_next_endpoint(parent, prev); - - of_node_put(prev); - return node; -} - -static void of_coresight_get_ports(struct device_node *node, - int *nr_inport, int *nr_outport) -{ - struct device_node *ep = NULL; - int in = 0, out = 0; - - do { - ep = of_get_coresight_endpoint(node, ep); - if (!ep) - break; - - if (of_property_read_bool(ep, "slave-mode")) - in++; - else - out++; - - } while (ep); - - *nr_inport = in; - *nr_outport = out; -} - -static int of_coresight_alloc_memory(struct device *dev, - struct coresight_platform_data *pdata) -{ - /* List of output port on this component */ - pdata->outports = devm_kzalloc(dev, pdata->nr_outport * - sizeof(*pdata->outports), - GFP_KERNEL); - if (!pdata->outports) - return -ENOMEM; - - /* Children connected to this component via @outports */ - pdata->child_names = devm_kzalloc(dev, pdata->nr_outport * - sizeof(*pdata->child_names), - GFP_KERNEL); - if (!pdata->child_names) - return -ENOMEM; - - /* Port number on the child this component is connected to */ - pdata->child_ports = devm_kzalloc(dev, pdata->nr_outport * - sizeof(*pdata->child_ports), - GFP_KERNEL); - if (!pdata->child_ports) - return -ENOMEM; - - return 0; -} - -struct coresight_platform_data *of_get_coresight_platform_data( - struct device *dev, struct device_node *node) -{ - int i = 0, ret = 0, cpu; - struct coresight_platform_data *pdata; - struct of_endpoint endpoint, rendpoint; - struct device *rdev; - struct device_node *dn; - struct device_node *ep = NULL; - struct device_node *rparent = NULL; - struct device_node *rport = NULL; - - pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL); - if (!pdata) - return ERR_PTR(-ENOMEM); - - /* Use device name as sysfs handle */ - pdata->name = dev_name(dev); - - /* Get the number of input and output port for this component */ - of_coresight_get_ports(node, &pdata->nr_inport, &pdata->nr_outport); - - if (pdata->nr_outport) { - ret = of_coresight_alloc_memory(dev, pdata); - if (ret) - return ERR_PTR(ret); - - /* Iterate through each port to discover topology */ - do { - /* Get a handle on a port */ - ep = of_get_coresight_endpoint(node, ep); - if (!ep) - break; - - /* - * No need to deal with input ports, processing for as - * processing for output ports will deal with them. - */ - if (of_find_property(ep, "slave-mode", NULL)) - continue; - - /* Get a handle on the local endpoint */ - ret = of_graph_parse_endpoint(ep, &endpoint); - - if (ret) - continue; - - /* The local out port number */ - pdata->outports[i] = endpoint.id; - - /* - * Get a handle on the remote port and parent - * attached to it. - */ - rparent = of_graph_get_remote_port_parent(ep); - rport = of_graph_get_remote_port(ep); - - if (!rparent || !rport) - continue; - - if (of_graph_parse_endpoint(rport, &rendpoint)) - continue; - - rdev = of_coresight_get_endpoint_device(rparent); - if (!rdev) - continue; - - pdata->child_names[i] = dev_name(rdev); - pdata->child_ports[i] = rendpoint.id; - - i++; - } while (ep); - } - - /* Affinity defaults to CPU0 */ - pdata->cpu = 0; - dn = of_parse_phandle(node, "cpu", 0); - for (cpu = 0; dn && cpu < nr_cpu_ids; cpu++) { - if (dn == of_get_cpu_node(cpu, NULL)) { - pdata->cpu = cpu; - break; - } - } - - return pdata; -} -EXPORT_SYMBOL_GPL(of_get_coresight_platform_data); diff --git a/drivers/hwtracing/coresight/Kconfig b/drivers/hwtracing/coresight/Kconfig new file mode 100644 index 000000000000..fc1f1ae7a49d --- /dev/null +++ b/drivers/hwtracing/coresight/Kconfig @@ -0,0 +1,61 @@ +# +# Coresight configuration +# +menuconfig CORESIGHT + bool "CoreSight Tracing Support" + select ARM_AMBA + help + This framework provides a kernel interface for the CoreSight debug + and trace drivers to register themselves with. It's intended to build + a topological view of the CoreSight components based on a DT + specification and configure the right serie of components when a + trace source gets enabled. + +if CORESIGHT +config CORESIGHT_LINKS_AND_SINKS + bool "CoreSight Link and Sink drivers" + help + This enables support for CoreSight link and sink drivers that are + responsible for transporting and collecting the trace data + respectively. Link and sinks are dynamically aggregated with a trace + entity at run time to form a complete trace path. + +config CORESIGHT_LINK_AND_SINK_TMC + bool "Coresight generic TMC driver" + depends on CORESIGHT_LINKS_AND_SINKS + help + This enables support for the Trace Memory Controller driver. + Depending on its configuration the device can act as a link (embedded + trace router - ETR) or sink (embedded trace FIFO). The driver + complies with the generic implementation of the component without + special enhancement or added features. + +config CORESIGHT_SINK_TPIU + bool "Coresight generic TPIU driver" + depends on CORESIGHT_LINKS_AND_SINKS + help + This enables support for the Trace Port Interface Unit driver, + responsible for bridging the gap between the on-chip coresight + components and a trace for bridging the gap between the on-chip + coresight components and a trace port collection engine, typically + connected to an external host for use case capturing more traces than + the on-board coresight memory can handle. + +config CORESIGHT_SINK_ETBV10 + bool "Coresight ETBv1.0 driver" + depends on CORESIGHT_LINKS_AND_SINKS + help + This enables support for the Embedded Trace Buffer version 1.0 driver + that complies with the generic implementation of the component without + special enhancement or added features. + +config CORESIGHT_SOURCE_ETM3X + bool "CoreSight Embedded Trace Macrocell 3.x driver" + depends on !ARM64 + select CORESIGHT_LINKS_AND_SINKS + help + This driver provides support for processor ETM3.x and PTM1.x modules, + which allows tracing the instructions that a processor is executing + This is primarily useful for instruction level tracing. Depending + the ETM version data tracing may also be available. +endif diff --git a/drivers/hwtracing/coresight/Makefile b/drivers/hwtracing/coresight/Makefile new file mode 100644 index 000000000000..4b4bec890ef5 --- /dev/null +++ b/drivers/hwtracing/coresight/Makefile @@ -0,0 +1,11 @@ +# +# Makefile for CoreSight drivers. +# +obj-$(CONFIG_CORESIGHT) += coresight.o +obj-$(CONFIG_OF) += of_coresight.o +obj-$(CONFIG_CORESIGHT_LINK_AND_SINK_TMC) += coresight-tmc.o +obj-$(CONFIG_CORESIGHT_SINK_TPIU) += coresight-tpiu.o +obj-$(CONFIG_CORESIGHT_SINK_ETBV10) += coresight-etb10.o +obj-$(CONFIG_CORESIGHT_LINKS_AND_SINKS) += coresight-funnel.o \ + coresight-replicator.o +obj-$(CONFIG_CORESIGHT_SOURCE_ETM3X) += coresight-etm3x.o coresight-etm-cp14.o diff --git a/drivers/hwtracing/coresight/coresight-etb10.c b/drivers/hwtracing/coresight/coresight-etb10.c new file mode 100644 index 000000000000..40049869aecd --- /dev/null +++ b/drivers/hwtracing/coresight/coresight-etb10.c @@ -0,0 +1,527 @@ +/* Copyright (c) 2011-2012, The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "coresight-priv.h" + +#define ETB_RAM_DEPTH_REG 0x004 +#define ETB_STATUS_REG 0x00c +#define ETB_RAM_READ_DATA_REG 0x010 +#define ETB_RAM_READ_POINTER 0x014 +#define ETB_RAM_WRITE_POINTER 0x018 +#define ETB_TRG 0x01c +#define ETB_CTL_REG 0x020 +#define ETB_RWD_REG 0x024 +#define ETB_FFSR 0x300 +#define ETB_FFCR 0x304 +#define ETB_ITMISCOP0 0xee0 +#define ETB_ITTRFLINACK 0xee4 +#define ETB_ITTRFLIN 0xee8 +#define ETB_ITATBDATA0 0xeeC +#define ETB_ITATBCTR2 0xef0 +#define ETB_ITATBCTR1 0xef4 +#define ETB_ITATBCTR0 0xef8 + +/* register description */ +/* STS - 0x00C */ +#define ETB_STATUS_RAM_FULL BIT(0) +/* CTL - 0x020 */ +#define ETB_CTL_CAPT_EN BIT(0) +/* FFCR - 0x304 */ +#define ETB_FFCR_EN_FTC BIT(0) +#define ETB_FFCR_FON_MAN BIT(6) +#define ETB_FFCR_STOP_FI BIT(12) +#define ETB_FFCR_STOP_TRIGGER BIT(13) + +#define ETB_FFCR_BIT 6 +#define ETB_FFSR_BIT 1 +#define ETB_FRAME_SIZE_WORDS 4 + +/** + * struct etb_drvdata - specifics associated to an ETB component + * @base: memory mapped base address for this component. + * @dev: the device entity associated to this component. + * @csdev: component vitals needed by the framework. + * @miscdev: specifics to handle "/dev/xyz.etb" entry. + * @clk: the clock this component is associated to. + * @spinlock: only one at a time pls. + * @in_use: synchronise user space access to etb buffer. + * @buf: area of memory where ETB buffer content gets sent. + * @buffer_depth: size of @buf. + * @enable: this ETB is being used. + * @trigger_cntr: amount of words to store after a trigger. + */ +struct etb_drvdata { + void __iomem *base; + struct device *dev; + struct coresight_device *csdev; + struct miscdevice miscdev; + struct clk *clk; + spinlock_t spinlock; + atomic_t in_use; + u8 *buf; + u32 buffer_depth; + bool enable; + u32 trigger_cntr; +}; + +static unsigned int etb_get_buffer_depth(struct etb_drvdata *drvdata) +{ + int ret; + u32 depth = 0; + + ret = clk_prepare_enable(drvdata->clk); + if (ret) + return ret; + + /* RO registers don't need locking */ + depth = readl_relaxed(drvdata->base + ETB_RAM_DEPTH_REG); + + clk_disable_unprepare(drvdata->clk); + return depth; +} + +static void etb_enable_hw(struct etb_drvdata *drvdata) +{ + int i; + u32 depth; + + CS_UNLOCK(drvdata->base); + + depth = drvdata->buffer_depth; + /* reset write RAM pointer address */ + writel_relaxed(0x0, drvdata->base + ETB_RAM_WRITE_POINTER); + /* clear entire RAM buffer */ + for (i = 0; i < depth; i++) + writel_relaxed(0x0, drvdata->base + ETB_RWD_REG); + + /* reset write RAM pointer address */ + writel_relaxed(0x0, drvdata->base + ETB_RAM_WRITE_POINTER); + /* reset read RAM pointer address */ + writel_relaxed(0x0, drvdata->base + ETB_RAM_READ_POINTER); + + writel_relaxed(drvdata->trigger_cntr, drvdata->base + ETB_TRG); + writel_relaxed(ETB_FFCR_EN_FTC | ETB_FFCR_STOP_TRIGGER, + drvdata->base + ETB_FFCR); + /* ETB trace capture enable */ + writel_relaxed(ETB_CTL_CAPT_EN, drvdata->base + ETB_CTL_REG); + + CS_LOCK(drvdata->base); +} + +static int etb_enable(struct coresight_device *csdev) +{ + struct etb_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); + int ret; + unsigned long flags; + + ret = clk_prepare_enable(drvdata->clk); + if (ret) + return ret; + + spin_lock_irqsave(&drvdata->spinlock, flags); + etb_enable_hw(drvdata); + drvdata->enable = true; + spin_unlock_irqrestore(&drvdata->spinlock, flags); + + dev_info(drvdata->dev, "ETB enabled\n"); + return 0; +} + +static void etb_disable_hw(struct etb_drvdata *drvdata) +{ + u32 ffcr; + + CS_UNLOCK(drvdata->base); + + ffcr = readl_relaxed(drvdata->base + ETB_FFCR); + /* stop formatter when a stop has completed */ + ffcr |= ETB_FFCR_STOP_FI; + writel_relaxed(ffcr, drvdata->base + ETB_FFCR); + /* manually generate a flush of the system */ + ffcr |= ETB_FFCR_FON_MAN; + writel_relaxed(ffcr, drvdata->base + ETB_FFCR); + + if (coresight_timeout(drvdata->base, ETB_FFCR, ETB_FFCR_BIT, 0)) { + dev_err(drvdata->dev, + "timeout observed when probing at offset %#x\n", + ETB_FFCR); + } + + /* disable trace capture */ + writel_relaxed(0x0, drvdata->base + ETB_CTL_REG); + + if (coresight_timeout(drvdata->base, ETB_FFSR, ETB_FFSR_BIT, 1)) { + dev_err(drvdata->dev, + "timeout observed when probing at offset %#x\n", + ETB_FFCR); + } + + CS_LOCK(drvdata->base); +} + +static void etb_dump_hw(struct etb_drvdata *drvdata) +{ + int i; + u8 *buf_ptr; + u32 read_data, depth; + u32 read_ptr, write_ptr; + u32 frame_off, frame_endoff; + + CS_UNLOCK(drvdata->base); + + read_ptr = readl_relaxed(drvdata->base + ETB_RAM_READ_POINTER); + write_ptr = readl_relaxed(drvdata->base + ETB_RAM_WRITE_POINTER); + + frame_off = write_ptr % ETB_FRAME_SIZE_WORDS; + frame_endoff = ETB_FRAME_SIZE_WORDS - frame_off; + if (frame_off) { + dev_err(drvdata->dev, + "write_ptr: %lu not aligned to formatter frame size\n", + (unsigned long)write_ptr); + dev_err(drvdata->dev, "frameoff: %lu, frame_endoff: %lu\n", + (unsigned long)frame_off, (unsigned long)frame_endoff); + write_ptr += frame_endoff; + } + + if ((readl_relaxed(drvdata->base + ETB_STATUS_REG) + & ETB_STATUS_RAM_FULL) == 0) + writel_relaxed(0x0, drvdata->base + ETB_RAM_READ_POINTER); + else + writel_relaxed(write_ptr, drvdata->base + ETB_RAM_READ_POINTER); + + depth = drvdata->buffer_depth; + buf_ptr = drvdata->buf; + for (i = 0; i < depth; i++) { + read_data = readl_relaxed(drvdata->base + + ETB_RAM_READ_DATA_REG); + *buf_ptr++ = read_data >> 0; + *buf_ptr++ = read_data >> 8; + *buf_ptr++ = read_data >> 16; + *buf_ptr++ = read_data >> 24; + } + + if (frame_off) { + buf_ptr -= (frame_endoff * 4); + for (i = 0; i < frame_endoff; i++) { + *buf_ptr++ = 0x0; + *buf_ptr++ = 0x0; + *buf_ptr++ = 0x0; + *buf_ptr++ = 0x0; + } + } + + writel_relaxed(read_ptr, drvdata->base + ETB_RAM_READ_POINTER); + + CS_LOCK(drvdata->base); +} + +static void etb_disable(struct coresight_device *csdev) +{ + struct etb_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); + unsigned long flags; + + spin_lock_irqsave(&drvdata->spinlock, flags); + etb_disable_hw(drvdata); + etb_dump_hw(drvdata); + drvdata->enable = false; + spin_unlock_irqrestore(&drvdata->spinlock, flags); + + clk_disable_unprepare(drvdata->clk); + + dev_info(drvdata->dev, "ETB disabled\n"); +} + +static const struct coresight_ops_sink etb_sink_ops = { + .enable = etb_enable, + .disable = etb_disable, +}; + +static const struct coresight_ops etb_cs_ops = { + .sink_ops = &etb_sink_ops, +}; + +static void etb_dump(struct etb_drvdata *drvdata) +{ + unsigned long flags; + + spin_lock_irqsave(&drvdata->spinlock, flags); + if (drvdata->enable) { + etb_disable_hw(drvdata); + etb_dump_hw(drvdata); + etb_enable_hw(drvdata); + } + spin_unlock_irqrestore(&drvdata->spinlock, flags); + + dev_info(drvdata->dev, "ETB dumped\n"); +} + +static int etb_open(struct inode *inode, struct file *file) +{ + struct etb_drvdata *drvdata = container_of(file->private_data, + struct etb_drvdata, miscdev); + + if (atomic_cmpxchg(&drvdata->in_use, 0, 1)) + return -EBUSY; + + dev_dbg(drvdata->dev, "%s: successfully opened\n", __func__); + return 0; +} + +static ssize_t etb_read(struct file *file, char __user *data, + size_t len, loff_t *ppos) +{ + u32 depth; + struct etb_drvdata *drvdata = container_of(file->private_data, + struct etb_drvdata, miscdev); + + etb_dump(drvdata); + + depth = drvdata->buffer_depth; + if (*ppos + len > depth * 4) + len = depth * 4 - *ppos; + + if (copy_to_user(data, drvdata->buf + *ppos, len)) { + dev_dbg(drvdata->dev, "%s: copy_to_user failed\n", __func__); + return -EFAULT; + } + + *ppos += len; + + dev_dbg(drvdata->dev, "%s: %zu bytes copied, %d bytes left\n", + __func__, len, (int)(depth * 4 - *ppos)); + return len; +} + +static int etb_release(struct inode *inode, struct file *file) +{ + struct etb_drvdata *drvdata = container_of(file->private_data, + struct etb_drvdata, miscdev); + atomic_set(&drvdata->in_use, 0); + + dev_dbg(drvdata->dev, "%s: released\n", __func__); + return 0; +} + +static const struct file_operations etb_fops = { + .owner = THIS_MODULE, + .open = etb_open, + .read = etb_read, + .release = etb_release, + .llseek = no_llseek, +}; + +static ssize_t status_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + int ret; + unsigned long flags; + u32 etb_rdr, etb_sr, etb_rrp, etb_rwp; + u32 etb_trg, etb_cr, etb_ffsr, etb_ffcr; + struct etb_drvdata *drvdata = dev_get_drvdata(dev->parent); + + ret = clk_prepare_enable(drvdata->clk); + if (ret) + goto out; + + spin_lock_irqsave(&drvdata->spinlock, flags); + CS_UNLOCK(drvdata->base); + + etb_rdr = readl_relaxed(drvdata->base + ETB_RAM_DEPTH_REG); + etb_sr = readl_relaxed(drvdata->base + ETB_STATUS_REG); + etb_rrp = readl_relaxed(drvdata->base + ETB_RAM_READ_POINTER); + etb_rwp = readl_relaxed(drvdata->base + ETB_RAM_WRITE_POINTER); + etb_trg = readl_relaxed(drvdata->base + ETB_TRG); + etb_cr = readl_relaxed(drvdata->base + ETB_CTL_REG); + etb_ffsr = readl_relaxed(drvdata->base + ETB_FFSR); + etb_ffcr = readl_relaxed(drvdata->base + ETB_FFCR); + + CS_LOCK(drvdata->base); + spin_unlock_irqrestore(&drvdata->spinlock, flags); + + clk_disable_unprepare(drvdata->clk); + + return sprintf(buf, + "Depth:\t\t0x%x\n" + "Status:\t\t0x%x\n" + "RAM read ptr:\t0x%x\n" + "RAM wrt ptr:\t0x%x\n" + "Trigger cnt:\t0x%x\n" + "Control:\t0x%x\n" + "Flush status:\t0x%x\n" + "Flush ctrl:\t0x%x\n", + etb_rdr, etb_sr, etb_rrp, etb_rwp, + etb_trg, etb_cr, etb_ffsr, etb_ffcr); +out: + return -EINVAL; +} +static DEVICE_ATTR_RO(status); + +static ssize_t trigger_cntr_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct etb_drvdata *drvdata = dev_get_drvdata(dev->parent); + unsigned long val = drvdata->trigger_cntr; + + return sprintf(buf, "%#lx\n", val); +} + +static ssize_t trigger_cntr_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t size) +{ + int ret; + unsigned long val; + struct etb_drvdata *drvdata = dev_get_drvdata(dev->parent); + + ret = kstrtoul(buf, 16, &val); + if (ret) + return ret; + + drvdata->trigger_cntr = val; + return size; +} +static DEVICE_ATTR_RW(trigger_cntr); + +static struct attribute *coresight_etb_attrs[] = { + &dev_attr_trigger_cntr.attr, + &dev_attr_status.attr, + NULL, +}; +ATTRIBUTE_GROUPS(coresight_etb); + +static int etb_probe(struct amba_device *adev, const struct amba_id *id) +{ + int ret; + void __iomem *base; + struct device *dev = &adev->dev; + struct coresight_platform_data *pdata = NULL; + struct etb_drvdata *drvdata; + struct resource *res = &adev->res; + struct coresight_desc *desc; + struct device_node *np = adev->dev.of_node; + + if (np) { + pdata = of_get_coresight_platform_data(dev, np); + if (IS_ERR(pdata)) + return PTR_ERR(pdata); + adev->dev.platform_data = pdata; + } + + drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL); + if (!drvdata) + return -ENOMEM; + + drvdata->dev = &adev->dev; + dev_set_drvdata(dev, drvdata); + + /* validity for the resource is already checked by the AMBA core */ + base = devm_ioremap_resource(dev, res); + if (IS_ERR(base)) + return PTR_ERR(base); + + drvdata->base = base; + + spin_lock_init(&drvdata->spinlock); + + drvdata->clk = adev->pclk; + ret = clk_prepare_enable(drvdata->clk); + if (ret) + return ret; + + drvdata->buffer_depth = etb_get_buffer_depth(drvdata); + clk_disable_unprepare(drvdata->clk); + + if (drvdata->buffer_depth < 0) + return -EINVAL; + + drvdata->buf = devm_kzalloc(dev, + drvdata->buffer_depth * 4, GFP_KERNEL); + if (!drvdata->buf) + return -ENOMEM; + + desc = devm_kzalloc(dev, sizeof(*desc), GFP_KERNEL); + if (!desc) + return -ENOMEM; + + desc->type = CORESIGHT_DEV_TYPE_SINK; + desc->subtype.sink_subtype = CORESIGHT_DEV_SUBTYPE_SINK_BUFFER; + desc->ops = &etb_cs_ops; + desc->pdata = pdata; + desc->dev = dev; + desc->groups = coresight_etb_groups; + drvdata->csdev = coresight_register(desc); + if (IS_ERR(drvdata->csdev)) + return PTR_ERR(drvdata->csdev); + + drvdata->miscdev.name = pdata->name; + drvdata->miscdev.minor = MISC_DYNAMIC_MINOR; + drvdata->miscdev.fops = &etb_fops; + ret = misc_register(&drvdata->miscdev); + if (ret) + goto err_misc_register; + + dev_info(dev, "ETB initialized\n"); + return 0; + +err_misc_register: + coresight_unregister(drvdata->csdev); + return ret; +} + +static int etb_remove(struct amba_device *adev) +{ + struct etb_drvdata *drvdata = amba_get_drvdata(adev); + + misc_deregister(&drvdata->miscdev); + coresight_unregister(drvdata->csdev); + return 0; +} + +static struct amba_id etb_ids[] = { + { + .id = 0x0003b907, + .mask = 0x0003ffff, + }, + { 0, 0}, +}; + +static struct amba_driver etb_driver = { + .drv = { + .name = "coresight-etb10", + .owner = THIS_MODULE, + }, + .probe = etb_probe, + .remove = etb_remove, + .id_table = etb_ids, +}; + +module_amba_driver(etb_driver); + +MODULE_LICENSE("GPL v2"); +MODULE_DESCRIPTION("CoreSight Embedded Trace Buffer driver"); diff --git a/drivers/hwtracing/coresight/coresight-etm-cp14.c b/drivers/hwtracing/coresight/coresight-etm-cp14.c new file mode 100644 index 000000000000..12a220682117 --- /dev/null +++ b/drivers/hwtracing/coresight/coresight-etm-cp14.c @@ -0,0 +1,591 @@ +/* Copyright (c) 2012, The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt + +#include +#include +#include +#include + +#include "coresight-etm.h" + +int etm_readl_cp14(u32 reg, unsigned int *val) +{ + switch (reg) { + case ETMCR: + *val = etm_read(ETMCR); + return 0; + case ETMCCR: + *val = etm_read(ETMCCR); + return 0; + case ETMTRIGGER: + *val = etm_read(ETMTRIGGER); + return 0; + case ETMSR: + *val = etm_read(ETMSR); + return 0; + case ETMSCR: + *val = etm_read(ETMSCR); + return 0; + case ETMTSSCR: + *val = etm_read(ETMTSSCR); + return 0; + case ETMTEEVR: + *val = etm_read(ETMTEEVR); + return 0; + case ETMTECR1: + *val = etm_read(ETMTECR1); + return 0; + case ETMFFLR: + *val = etm_read(ETMFFLR); + return 0; + case ETMACVRn(0): + *val = etm_read(ETMACVR0); + return 0; + case ETMACVRn(1): + *val = etm_read(ETMACVR1); + return 0; + case ETMACVRn(2): + *val = etm_read(ETMACVR2); + return 0; + case ETMACVRn(3): + *val = etm_read(ETMACVR3); + return 0; + case ETMACVRn(4): + *val = etm_read(ETMACVR4); + return 0; + case ETMACVRn(5): + *val = etm_read(ETMACVR5); + return 0; + case ETMACVRn(6): + *val = etm_read(ETMACVR6); + return 0; + case ETMACVRn(7): + *val = etm_read(ETMACVR7); + return 0; + case ETMACVRn(8): + *val = etm_read(ETMACVR8); + return 0; + case ETMACVRn(9): + *val = etm_read(ETMACVR9); + return 0; + case ETMACVRn(10): + *val = etm_read(ETMACVR10); + return 0; + case ETMACVRn(11): + *val = etm_read(ETMACVR11); + return 0; + case ETMACVRn(12): + *val = etm_read(ETMACVR12); + return 0; + case ETMACVRn(13): + *val = etm_read(ETMACVR13); + return 0; + case ETMACVRn(14): + *val = etm_read(ETMACVR14); + return 0; + case ETMACVRn(15): + *val = etm_read(ETMACVR15); + return 0; + case ETMACTRn(0): + *val = etm_read(ETMACTR0); + return 0; + case ETMACTRn(1): + *val = etm_read(ETMACTR1); + return 0; + case ETMACTRn(2): + *val = etm_read(ETMACTR2); + return 0; + case ETMACTRn(3): + *val = etm_read(ETMACTR3); + return 0; + case ETMACTRn(4): + *val = etm_read(ETMACTR4); + return 0; + case ETMACTRn(5): + *val = etm_read(ETMACTR5); + return 0; + case ETMACTRn(6): + *val = etm_read(ETMACTR6); + return 0; + case ETMACTRn(7): + *val = etm_read(ETMACTR7); + return 0; + case ETMACTRn(8): + *val = etm_read(ETMACTR8); + return 0; + case ETMACTRn(9): + *val = etm_read(ETMACTR9); + return 0; + case ETMACTRn(10): + *val = etm_read(ETMACTR10); + return 0; + case ETMACTRn(11): + *val = etm_read(ETMACTR11); + return 0; + case ETMACTRn(12): + *val = etm_read(ETMACTR12); + return 0; + case ETMACTRn(13): + *val = etm_read(ETMACTR13); + return 0; + case ETMACTRn(14): + *val = etm_read(ETMACTR14); + return 0; + case ETMACTRn(15): + *val = etm_read(ETMACTR15); + return 0; + case ETMCNTRLDVRn(0): + *val = etm_read(ETMCNTRLDVR0); + return 0; + case ETMCNTRLDVRn(1): + *val = etm_read(ETMCNTRLDVR1); + return 0; + case ETMCNTRLDVRn(2): + *val = etm_read(ETMCNTRLDVR2); + return 0; + case ETMCNTRLDVRn(3): + *val = etm_read(ETMCNTRLDVR3); + return 0; + case ETMCNTENRn(0): + *val = etm_read(ETMCNTENR0); + return 0; + case ETMCNTENRn(1): + *val = etm_read(ETMCNTENR1); + return 0; + case ETMCNTENRn(2): + *val = etm_read(ETMCNTENR2); + return 0; + case ETMCNTENRn(3): + *val = etm_read(ETMCNTENR3); + return 0; + case ETMCNTRLDEVRn(0): + *val = etm_read(ETMCNTRLDEVR0); + return 0; + case ETMCNTRLDEVRn(1): + *val = etm_read(ETMCNTRLDEVR1); + return 0; + case ETMCNTRLDEVRn(2): + *val = etm_read(ETMCNTRLDEVR2); + return 0; + case ETMCNTRLDEVRn(3): + *val = etm_read(ETMCNTRLDEVR3); + return 0; + case ETMCNTVRn(0): + *val = etm_read(ETMCNTVR0); + return 0; + case ETMCNTVRn(1): + *val = etm_read(ETMCNTVR1); + return 0; + case ETMCNTVRn(2): + *val = etm_read(ETMCNTVR2); + return 0; + case ETMCNTVRn(3): + *val = etm_read(ETMCNTVR3); + return 0; + case ETMSQ12EVR: + *val = etm_read(ETMSQ12EVR); + return 0; + case ETMSQ21EVR: + *val = etm_read(ETMSQ21EVR); + return 0; + case ETMSQ23EVR: + *val = etm_read(ETMSQ23EVR); + return 0; + case ETMSQ31EVR: + *val = etm_read(ETMSQ31EVR); + return 0; + case ETMSQ32EVR: + *val = etm_read(ETMSQ32EVR); + return 0; + case ETMSQ13EVR: + *val = etm_read(ETMSQ13EVR); + return 0; + case ETMSQR: + *val = etm_read(ETMSQR); + return 0; + case ETMEXTOUTEVRn(0): + *val = etm_read(ETMEXTOUTEVR0); + return 0; + case ETMEXTOUTEVRn(1): + *val = etm_read(ETMEXTOUTEVR1); + return 0; + case ETMEXTOUTEVRn(2): + *val = etm_read(ETMEXTOUTEVR2); + return 0; + case ETMEXTOUTEVRn(3): + *val = etm_read(ETMEXTOUTEVR3); + return 0; + case ETMCIDCVRn(0): + *val = etm_read(ETMCIDCVR0); + return 0; + case ETMCIDCVRn(1): + *val = etm_read(ETMCIDCVR1); + return 0; + case ETMCIDCVRn(2): + *val = etm_read(ETMCIDCVR2); + return 0; + case ETMCIDCMR: + *val = etm_read(ETMCIDCMR); + return 0; + case ETMIMPSPEC0: + *val = etm_read(ETMIMPSPEC0); + return 0; + case ETMIMPSPEC1: + *val = etm_read(ETMIMPSPEC1); + return 0; + case ETMIMPSPEC2: + *val = etm_read(ETMIMPSPEC2); + return 0; + case ETMIMPSPEC3: + *val = etm_read(ETMIMPSPEC3); + return 0; + case ETMIMPSPEC4: + *val = etm_read(ETMIMPSPEC4); + return 0; + case ETMIMPSPEC5: + *val = etm_read(ETMIMPSPEC5); + return 0; + case ETMIMPSPEC6: + *val = etm_read(ETMIMPSPEC6); + return 0; + case ETMIMPSPEC7: + *val = etm_read(ETMIMPSPEC7); + return 0; + case ETMSYNCFR: + *val = etm_read(ETMSYNCFR); + return 0; + case ETMIDR: + *val = etm_read(ETMIDR); + return 0; + case ETMCCER: + *val = etm_read(ETMCCER); + return 0; + case ETMEXTINSELR: + *val = etm_read(ETMEXTINSELR); + return 0; + case ETMTESSEICR: + *val = etm_read(ETMTESSEICR); + return 0; + case ETMEIBCR: + *val = etm_read(ETMEIBCR); + return 0; + case ETMTSEVR: + *val = etm_read(ETMTSEVR); + return 0; + case ETMAUXCR: + *val = etm_read(ETMAUXCR); + return 0; + case ETMTRACEIDR: + *val = etm_read(ETMTRACEIDR); + return 0; + case ETMVMIDCVR: + *val = etm_read(ETMVMIDCVR); + return 0; + case ETMOSLSR: + *val = etm_read(ETMOSLSR); + return 0; + case ETMOSSRR: + *val = etm_read(ETMOSSRR); + return 0; + case ETMPDCR: + *val = etm_read(ETMPDCR); + return 0; + case ETMPDSR: + *val = etm_read(ETMPDSR); + return 0; + default: + *val = 0; + return -EINVAL; + } +} + +int etm_writel_cp14(u32 reg, u32 val) +{ + switch (reg) { + case ETMCR: + etm_write(val, ETMCR); + break; + case ETMTRIGGER: + etm_write(val, ETMTRIGGER); + break; + case ETMSR: + etm_write(val, ETMSR); + break; + case ETMTSSCR: + etm_write(val, ETMTSSCR); + break; + case ETMTEEVR: + etm_write(val, ETMTEEVR); + break; + case ETMTECR1: + etm_write(val, ETMTECR1); + break; + case ETMFFLR: + etm_write(val, ETMFFLR); + break; + case ETMACVRn(0): + etm_write(val, ETMACVR0); + break; + case ETMACVRn(1): + etm_write(val, ETMACVR1); + break; + case ETMACVRn(2): + etm_write(val, ETMACVR2); + break; + case ETMACVRn(3): + etm_write(val, ETMACVR3); + break; + case ETMACVRn(4): + etm_write(val, ETMACVR4); + break; + case ETMACVRn(5): + etm_write(val, ETMACVR5); + break; + case ETMACVRn(6): + etm_write(val, ETMACVR6); + break; + case ETMACVRn(7): + etm_write(val, ETMACVR7); + break; + case ETMACVRn(8): + etm_write(val, ETMACVR8); + break; + case ETMACVRn(9): + etm_write(val, ETMACVR9); + break; + case ETMACVRn(10): + etm_write(val, ETMACVR10); + break; + case ETMACVRn(11): + etm_write(val, ETMACVR11); + break; + case ETMACVRn(12): + etm_write(val, ETMACVR12); + break; + case ETMACVRn(13): + etm_write(val, ETMACVR13); + break; + case ETMACVRn(14): + etm_write(val, ETMACVR14); + break; + case ETMACVRn(15): + etm_write(val, ETMACVR15); + break; + case ETMACTRn(0): + etm_write(val, ETMACTR0); + break; + case ETMACTRn(1): + etm_write(val, ETMACTR1); + break; + case ETMACTRn(2): + etm_write(val, ETMACTR2); + break; + case ETMACTRn(3): + etm_write(val, ETMACTR3); + break; + case ETMACTRn(4): + etm_write(val, ETMACTR4); + break; + case ETMACTRn(5): + etm_write(val, ETMACTR5); + break; + case ETMACTRn(6): + etm_write(val, ETMACTR6); + break; + case ETMACTRn(7): + etm_write(val, ETMACTR7); + break; + case ETMACTRn(8): + etm_write(val, ETMACTR8); + break; + case ETMACTRn(9): + etm_write(val, ETMACTR9); + break; + case ETMACTRn(10): + etm_write(val, ETMACTR10); + break; + case ETMACTRn(11): + etm_write(val, ETMACTR11); + break; + case ETMACTRn(12): + etm_write(val, ETMACTR12); + break; + case ETMACTRn(13): + etm_write(val, ETMACTR13); + break; + case ETMACTRn(14): + etm_write(val, ETMACTR14); + break; + case ETMACTRn(15): + etm_write(val, ETMACTR15); + break; + case ETMCNTRLDVRn(0): + etm_write(val, ETMCNTRLDVR0); + break; + case ETMCNTRLDVRn(1): + etm_write(val, ETMCNTRLDVR1); + break; + case ETMCNTRLDVRn(2): + etm_write(val, ETMCNTRLDVR2); + break; + case ETMCNTRLDVRn(3): + etm_write(val, ETMCNTRLDVR3); + break; + case ETMCNTENRn(0): + etm_write(val, ETMCNTENR0); + break; + case ETMCNTENRn(1): + etm_write(val, ETMCNTENR1); + break; + case ETMCNTENRn(2): + etm_write(val, ETMCNTENR2); + break; + case ETMCNTENRn(3): + etm_write(val, ETMCNTENR3); + break; + case ETMCNTRLDEVRn(0): + etm_write(val, ETMCNTRLDEVR0); + break; + case ETMCNTRLDEVRn(1): + etm_write(val, ETMCNTRLDEVR1); + break; + case ETMCNTRLDEVRn(2): + etm_write(val, ETMCNTRLDEVR2); + break; + case ETMCNTRLDEVRn(3): + etm_write(val, ETMCNTRLDEVR3); + break; + case ETMCNTVRn(0): + etm_write(val, ETMCNTVR0); + break; + case ETMCNTVRn(1): + etm_write(val, ETMCNTVR1); + break; + case ETMCNTVRn(2): + etm_write(val, ETMCNTVR2); + break; + case ETMCNTVRn(3): + etm_write(val, ETMCNTVR3); + break; + case ETMSQ12EVR: + etm_write(val, ETMSQ12EVR); + break; + case ETMSQ21EVR: + etm_write(val, ETMSQ21EVR); + break; + case ETMSQ23EVR: + etm_write(val, ETMSQ23EVR); + break; + case ETMSQ31EVR: + etm_write(val, ETMSQ31EVR); + break; + case ETMSQ32EVR: + etm_write(val, ETMSQ32EVR); + break; + case ETMSQ13EVR: + etm_write(val, ETMSQ13EVR); + break; + case ETMSQR: + etm_write(val, ETMSQR); + break; + case ETMEXTOUTEVRn(0): + etm_write(val, ETMEXTOUTEVR0); + break; + case ETMEXTOUTEVRn(1): + etm_write(val, ETMEXTOUTEVR1); + break; + case ETMEXTOUTEVRn(2): + etm_write(val, ETMEXTOUTEVR2); + break; + case ETMEXTOUTEVRn(3): + etm_write(val, ETMEXTOUTEVR3); + break; + case ETMCIDCVRn(0): + etm_write(val, ETMCIDCVR0); + break; + case ETMCIDCVRn(1): + etm_write(val, ETMCIDCVR1); + break; + case ETMCIDCVRn(2): + etm_write(val, ETMCIDCVR2); + break; + case ETMCIDCMR: + etm_write(val, ETMCIDCMR); + break; + case ETMIMPSPEC0: + etm_write(val, ETMIMPSPEC0); + break; + case ETMIMPSPEC1: + etm_write(val, ETMIMPSPEC1); + break; + case ETMIMPSPEC2: + etm_write(val, ETMIMPSPEC2); + break; + case ETMIMPSPEC3: + etm_write(val, ETMIMPSPEC3); + break; + case ETMIMPSPEC4: + etm_write(val, ETMIMPSPEC4); + break; + case ETMIMPSPEC5: + etm_write(val, ETMIMPSPEC5); + break; + case ETMIMPSPEC6: + etm_write(val, ETMIMPSPEC6); + break; + case ETMIMPSPEC7: + etm_write(val, ETMIMPSPEC7); + break; + case ETMSYNCFR: + etm_write(val, ETMSYNCFR); + break; + case ETMEXTINSELR: + etm_write(val, ETMEXTINSELR); + break; + case ETMTESSEICR: + etm_write(val, ETMTESSEICR); + break; + case ETMEIBCR: + etm_write(val, ETMEIBCR); + break; + case ETMTSEVR: + etm_write(val, ETMTSEVR); + break; + case ETMAUXCR: + etm_write(val, ETMAUXCR); + break; + case ETMTRACEIDR: + etm_write(val, ETMTRACEIDR); + break; + case ETMVMIDCVR: + etm_write(val, ETMVMIDCVR); + break; + case ETMOSLAR: + etm_write(val, ETMOSLAR); + break; + case ETMOSSRR: + etm_write(val, ETMOSSRR); + break; + case ETMPDCR: + etm_write(val, ETMPDCR); + break; + case ETMPDSR: + etm_write(val, ETMPDSR); + break; + default: + return -EINVAL; + } + + return 0; +} diff --git a/drivers/hwtracing/coresight/coresight-etm.h b/drivers/hwtracing/coresight/coresight-etm.h new file mode 100644 index 000000000000..501c5fac8a45 --- /dev/null +++ b/drivers/hwtracing/coresight/coresight-etm.h @@ -0,0 +1,251 @@ +/* Copyright (c) 2014-2015, The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef _CORESIGHT_CORESIGHT_ETM_H +#define _CORESIGHT_CORESIGHT_ETM_H + +#include +#include "coresight-priv.h" + +/* + * Device registers: + * 0x000 - 0x2FC: Trace registers + * 0x300 - 0x314: Management registers + * 0x318 - 0xEFC: Trace registers + * + * Coresight registers + * 0xF00 - 0xF9C: Management registers + * 0xFA0 - 0xFA4: Management registers in PFTv1.0 + * Trace registers in PFTv1.1 + * 0xFA8 - 0xFFC: Management registers + */ + +/* Trace registers (0x000-0x2FC) */ +#define ETMCR 0x000 +#define ETMCCR 0x004 +#define ETMTRIGGER 0x008 +#define ETMSR 0x010 +#define ETMSCR 0x014 +#define ETMTSSCR 0x018 +#define ETMTECR2 0x01c +#define ETMTEEVR 0x020 +#define ETMTECR1 0x024 +#define ETMFFLR 0x02c +#define ETMACVRn(n) (0x040 + (n * 4)) +#define ETMACTRn(n) (0x080 + (n * 4)) +#define ETMCNTRLDVRn(n) (0x140 + (n * 4)) +#define ETMCNTENRn(n) (0x150 + (n * 4)) +#define ETMCNTRLDEVRn(n) (0x160 + (n * 4)) +#define ETMCNTVRn(n) (0x170 + (n * 4)) +#define ETMSQ12EVR 0x180 +#define ETMSQ21EVR 0x184 +#define ETMSQ23EVR 0x188 +#define ETMSQ31EVR 0x18c +#define ETMSQ32EVR 0x190 +#define ETMSQ13EVR 0x194 +#define ETMSQR 0x19c +#define ETMEXTOUTEVRn(n) (0x1a0 + (n * 4)) +#define ETMCIDCVRn(n) (0x1b0 + (n * 4)) +#define ETMCIDCMR 0x1bc +#define ETMIMPSPEC0 0x1c0 +#define ETMIMPSPEC1 0x1c4 +#define ETMIMPSPEC2 0x1c8 +#define ETMIMPSPEC3 0x1cc +#define ETMIMPSPEC4 0x1d0 +#define ETMIMPSPEC5 0x1d4 +#define ETMIMPSPEC6 0x1d8 +#define ETMIMPSPEC7 0x1dc +#define ETMSYNCFR 0x1e0 +#define ETMIDR 0x1e4 +#define ETMCCER 0x1e8 +#define ETMEXTINSELR 0x1ec +#define ETMTESSEICR 0x1f0 +#define ETMEIBCR 0x1f4 +#define ETMTSEVR 0x1f8 +#define ETMAUXCR 0x1fc +#define ETMTRACEIDR 0x200 +#define ETMVMIDCVR 0x240 +/* Management registers (0x300-0x314) */ +#define ETMOSLAR 0x300 +#define ETMOSLSR 0x304 +#define ETMOSSRR 0x308 +#define ETMPDCR 0x310 +#define ETMPDSR 0x314 +#define ETM_MAX_ADDR_CMP 16 +#define ETM_MAX_CNTR 4 +#define ETM_MAX_CTXID_CMP 3 + +/* Register definition */ +/* ETMCR - 0x00 */ +#define ETMCR_PWD_DWN BIT(0) +#define ETMCR_STALL_MODE BIT(7) +#define ETMCR_ETM_PRG BIT(10) +#define ETMCR_ETM_EN BIT(11) +#define ETMCR_CYC_ACC BIT(12) +#define ETMCR_CTXID_SIZE (BIT(14)|BIT(15)) +#define ETMCR_TIMESTAMP_EN BIT(28) +/* ETMCCR - 0x04 */ +#define ETMCCR_FIFOFULL BIT(23) +/* ETMPDCR - 0x310 */ +#define ETMPDCR_PWD_UP BIT(3) +/* ETMTECR1 - 0x024 */ +#define ETMTECR1_ADDR_COMP_1 BIT(0) +#define ETMTECR1_INC_EXC BIT(24) +#define ETMTECR1_START_STOP BIT(25) +/* ETMCCER - 0x1E8 */ +#define ETMCCER_TIMESTAMP BIT(22) + +#define ETM_MODE_EXCLUDE BIT(0) +#define ETM_MODE_CYCACC BIT(1) +#define ETM_MODE_STALL BIT(2) +#define ETM_MODE_TIMESTAMP BIT(3) +#define ETM_MODE_CTXID BIT(4) +#define ETM_MODE_ALL 0x1f + +#define ETM_SQR_MASK 0x3 +#define ETM_TRACEID_MASK 0x3f +#define ETM_EVENT_MASK 0x1ffff +#define ETM_SYNC_MASK 0xfff +#define ETM_ALL_MASK 0xffffffff + +#define ETMSR_PROG_BIT 1 +#define ETM_SEQ_STATE_MAX_VAL (0x2) +#define PORT_SIZE_MASK (GENMASK(21, 21) | GENMASK(6, 4)) + +#define ETM_HARD_WIRE_RES_A /* Hard wired, always true */ \ + ((0x0f << 0) | \ + /* Resource index A */ \ + (0x06 << 4)) + +#define ETM_ADD_COMP_0 /* Single addr comparator 1 */ \ + ((0x00 << 7) | \ + /* Resource index B */ \ + (0x00 << 11)) + +#define ETM_EVENT_NOT_A BIT(14) /* NOT(A) */ + +#define ETM_DEFAULT_EVENT_VAL (ETM_HARD_WIRE_RES_A | \ + ETM_ADD_COMP_0 | \ + ETM_EVENT_NOT_A) +/** + * struct etm_drvdata - specifics associated to an ETM component + * @base: memory mapped base address for this component. + * @dev: the device entity associated to this component. + * @csdev: component vitals needed by the framework. + * @clk: the clock this component is associated to. + * @spinlock: only one at a time pls. + * @cpu: the cpu this component is affined to. + * @port_size: port size as reported by ETMCR bit 4-6 and 21. + * @arch: ETM/PTM version number. + * @use_cpu14: true if management registers need to be accessed via CP14. + * @enable: is this ETM/PTM currently tracing. + * @sticky_enable: true if ETM base configuration has been done. + * @boot_enable:true if we should start tracing at boot time. + * @os_unlock: true if access to management registers is allowed. + * @nr_addr_cmp:Number of pairs of address comparators as found in ETMCCR. + * @nr_cntr: Number of counters as found in ETMCCR bit 13-15. + * @nr_ext_inp: Number of external input as found in ETMCCR bit 17-19. + * @nr_ext_out: Number of external output as found in ETMCCR bit 20-22. + * @nr_ctxid_cmp: Number of contextID comparators as found in ETMCCR bit 24-25. + * @etmccr: value of register ETMCCR. + * @etmccer: value of register ETMCCER. + * @traceid: value of the current ID for this component. + * @mode: controls various modes supported by this ETM/PTM. + * @ctrl: used in conjunction with @mode. + * @trigger_event: setting for register ETMTRIGGER. + * @startstop_ctrl: setting for register ETMTSSCR. + * @enable_event: setting for register ETMTEEVR. + * @enable_ctrl1: setting for register ETMTECR1. + * @fifofull_level: setting for register ETMFFLR. + * @addr_idx: index for the address comparator selection. + * @addr_val: value for address comparator register. + * @addr_acctype: access type for address comparator register. + * @addr_type: current status of the comparator register. + * @cntr_idx: index for the counter register selection. + * @cntr_rld_val: reload value of a counter register. + * @cntr_event: control for counter enable register. + * @cntr_rld_event: value for counter reload event register. + * @cntr_val: counter value register. + * @seq_12_event: event causing the transition from 1 to 2. + * @seq_21_event: event causing the transition from 2 to 1. + * @seq_23_event: event causing the transition from 2 to 3. + * @seq_31_event: event causing the transition from 3 to 1. + * @seq_32_event: event causing the transition from 3 to 2. + * @seq_13_event: event causing the transition from 1 to 3. + * @seq_curr_state: current value of the sequencer register. + * @ctxid_idx: index for the context ID registers. + * @ctxid_val: value for the context ID to trigger on. + * @ctxid_mask: mask applicable to all the context IDs. + * @sync_freq: Synchronisation frequency. + * @timestamp_event: Defines an event that requests the insertion + of a timestamp into the trace stream. + */ +struct etm_drvdata { + void __iomem *base; + struct device *dev; + struct coresight_device *csdev; + struct clk *clk; + spinlock_t spinlock; + int cpu; + int port_size; + u8 arch; + bool use_cp14; + bool enable; + bool sticky_enable; + bool boot_enable; + bool os_unlock; + u8 nr_addr_cmp; + u8 nr_cntr; + u8 nr_ext_inp; + u8 nr_ext_out; + u8 nr_ctxid_cmp; + u32 etmccr; + u32 etmccer; + u32 traceid; + u32 mode; + u32 ctrl; + u32 trigger_event; + u32 startstop_ctrl; + u32 enable_event; + u32 enable_ctrl1; + u32 fifofull_level; + u8 addr_idx; + u32 addr_val[ETM_MAX_ADDR_CMP]; + u32 addr_acctype[ETM_MAX_ADDR_CMP]; + u32 addr_type[ETM_MAX_ADDR_CMP]; + u8 cntr_idx; + u32 cntr_rld_val[ETM_MAX_CNTR]; + u32 cntr_event[ETM_MAX_CNTR]; + u32 cntr_rld_event[ETM_MAX_CNTR]; + u32 cntr_val[ETM_MAX_CNTR]; + u32 seq_12_event; + u32 seq_21_event; + u32 seq_23_event; + u32 seq_31_event; + u32 seq_32_event; + u32 seq_13_event; + u32 seq_curr_state; + u8 ctxid_idx; + u32 ctxid_val[ETM_MAX_CTXID_CMP]; + u32 ctxid_mask; + u32 sync_freq; + u32 timestamp_event; +}; + +enum etm_addr_type { + ETM_ADDR_TYPE_NONE, + ETM_ADDR_TYPE_SINGLE, + ETM_ADDR_TYPE_RANGE, + ETM_ADDR_TYPE_START, + ETM_ADDR_TYPE_STOP, +}; +#endif diff --git a/drivers/hwtracing/coresight/coresight-etm3x.c b/drivers/hwtracing/coresight/coresight-etm3x.c new file mode 100644 index 000000000000..c965f5724abd --- /dev/null +++ b/drivers/hwtracing/coresight/coresight-etm3x.c @@ -0,0 +1,1932 @@ +/* Copyright (c) 2011-2012, The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "coresight-etm.h" + +static int boot_enable; +module_param_named(boot_enable, boot_enable, int, S_IRUGO); + +/* The number of ETM/PTM currently registered */ +static int etm_count; +static struct etm_drvdata *etmdrvdata[NR_CPUS]; + +static inline void etm_writel(struct etm_drvdata *drvdata, + u32 val, u32 off) +{ + if (drvdata->use_cp14) { + if (etm_writel_cp14(off, val)) { + dev_err(drvdata->dev, + "invalid CP14 access to ETM reg: %#x", off); + } + } else { + writel_relaxed(val, drvdata->base + off); + } +} + +static inline unsigned int etm_readl(struct etm_drvdata *drvdata, u32 off) +{ + u32 val; + + if (drvdata->use_cp14) { + if (etm_readl_cp14(off, &val)) { + dev_err(drvdata->dev, + "invalid CP14 access to ETM reg: %#x", off); + } + } else { + val = readl_relaxed(drvdata->base + off); + } + + return val; +} + +/* + * Memory mapped writes to clear os lock are not supported on some processors + * and OS lock must be unlocked before any memory mapped access on such + * processors, otherwise memory mapped reads/writes will be invalid. + */ +static void etm_os_unlock(void *info) +{ + struct etm_drvdata *drvdata = (struct etm_drvdata *)info; + /* Writing any value to ETMOSLAR unlocks the trace registers */ + etm_writel(drvdata, 0x0, ETMOSLAR); + isb(); +} + +static void etm_set_pwrdwn(struct etm_drvdata *drvdata) +{ + u32 etmcr; + + /* Ensure pending cp14 accesses complete before setting pwrdwn */ + mb(); + isb(); + etmcr = etm_readl(drvdata, ETMCR); + etmcr |= ETMCR_PWD_DWN; + etm_writel(drvdata, etmcr, ETMCR); +} + +static void etm_clr_pwrdwn(struct etm_drvdata *drvdata) +{ + u32 etmcr; + + etmcr = etm_readl(drvdata, ETMCR); + etmcr &= ~ETMCR_PWD_DWN; + etm_writel(drvdata, etmcr, ETMCR); + /* Ensure pwrup completes before subsequent cp14 accesses */ + mb(); + isb(); +} + +static void etm_set_pwrup(struct etm_drvdata *drvdata) +{ + u32 etmpdcr; + + etmpdcr = readl_relaxed(drvdata->base + ETMPDCR); + etmpdcr |= ETMPDCR_PWD_UP; + writel_relaxed(etmpdcr, drvdata->base + ETMPDCR); + /* Ensure pwrup completes before subsequent cp14 accesses */ + mb(); + isb(); +} + +static void etm_clr_pwrup(struct etm_drvdata *drvdata) +{ + u32 etmpdcr; + + /* Ensure pending cp14 accesses complete before clearing pwrup */ + mb(); + isb(); + etmpdcr = readl_relaxed(drvdata->base + ETMPDCR); + etmpdcr &= ~ETMPDCR_PWD_UP; + writel_relaxed(etmpdcr, drvdata->base + ETMPDCR); +} + +/** + * coresight_timeout_etm - loop until a bit has changed to a specific state. + * @drvdata: etm's private data structure. + * @offset: address of a register, starting from @addr. + * @position: the position of the bit of interest. + * @value: the value the bit should have. + * + * Basically the same as @coresight_timeout except for the register access + * method where we have to account for CP14 configurations. + + * Return: 0 as soon as the bit has taken the desired state or -EAGAIN if + * TIMEOUT_US has elapsed, which ever happens first. + */ + +static int coresight_timeout_etm(struct etm_drvdata *drvdata, u32 offset, + int position, int value) +{ + int i; + u32 val; + + for (i = TIMEOUT_US; i > 0; i--) { + val = etm_readl(drvdata, offset); + /* Waiting on the bit to go from 0 to 1 */ + if (value) { + if (val & BIT(position)) + return 0; + /* Waiting on the bit to go from 1 to 0 */ + } else { + if (!(val & BIT(position))) + return 0; + } + + /* + * Delay is arbitrary - the specification doesn't say how long + * we are expected to wait. Extra check required to make sure + * we don't wait needlessly on the last iteration. + */ + if (i - 1) + udelay(1); + } + + return -EAGAIN; +} + + +static void etm_set_prog(struct etm_drvdata *drvdata) +{ + u32 etmcr; + + etmcr = etm_readl(drvdata, ETMCR); + etmcr |= ETMCR_ETM_PRG; + etm_writel(drvdata, etmcr, ETMCR); + /* + * Recommended by spec for cp14 accesses to ensure etmcr write is + * complete before polling etmsr + */ + isb(); + if (coresight_timeout_etm(drvdata, ETMSR, ETMSR_PROG_BIT, 1)) { + dev_err(drvdata->dev, + "timeout observed when probing at offset %#x\n", ETMSR); + } +} + +static void etm_clr_prog(struct etm_drvdata *drvdata) +{ + u32 etmcr; + + etmcr = etm_readl(drvdata, ETMCR); + etmcr &= ~ETMCR_ETM_PRG; + etm_writel(drvdata, etmcr, ETMCR); + /* + * Recommended by spec for cp14 accesses to ensure etmcr write is + * complete before polling etmsr + */ + isb(); + if (coresight_timeout_etm(drvdata, ETMSR, ETMSR_PROG_BIT, 0)) { + dev_err(drvdata->dev, + "timeout observed when probing at offset %#x\n", ETMSR); + } +} + +static void etm_set_default(struct etm_drvdata *drvdata) +{ + int i; + + drvdata->trigger_event = ETM_DEFAULT_EVENT_VAL; + drvdata->enable_event = ETM_HARD_WIRE_RES_A; + + drvdata->seq_12_event = ETM_DEFAULT_EVENT_VAL; + drvdata->seq_21_event = ETM_DEFAULT_EVENT_VAL; + drvdata->seq_23_event = ETM_DEFAULT_EVENT_VAL; + drvdata->seq_31_event = ETM_DEFAULT_EVENT_VAL; + drvdata->seq_32_event = ETM_DEFAULT_EVENT_VAL; + drvdata->seq_13_event = ETM_DEFAULT_EVENT_VAL; + drvdata->timestamp_event = ETM_DEFAULT_EVENT_VAL; + + for (i = 0; i < drvdata->nr_cntr; i++) { + drvdata->cntr_rld_val[i] = 0x0; + drvdata->cntr_event[i] = ETM_DEFAULT_EVENT_VAL; + drvdata->cntr_rld_event[i] = ETM_DEFAULT_EVENT_VAL; + drvdata->cntr_val[i] = 0x0; + } + + drvdata->seq_curr_state = 0x0; + drvdata->ctxid_idx = 0x0; + for (i = 0; i < drvdata->nr_ctxid_cmp; i++) + drvdata->ctxid_val[i] = 0x0; + drvdata->ctxid_mask = 0x0; +} + +static void etm_enable_hw(void *info) +{ + int i; + u32 etmcr; + struct etm_drvdata *drvdata = info; + + CS_UNLOCK(drvdata->base); + + /* Turn engine on */ + etm_clr_pwrdwn(drvdata); + /* Apply power to trace registers */ + etm_set_pwrup(drvdata); + /* Make sure all registers are accessible */ + etm_os_unlock(drvdata); + + etm_set_prog(drvdata); + + etmcr = etm_readl(drvdata, ETMCR); + etmcr &= (ETMCR_PWD_DWN | ETMCR_ETM_PRG); + etmcr |= drvdata->port_size; + etm_writel(drvdata, drvdata->ctrl | etmcr, ETMCR); + etm_writel(drvdata, drvdata->trigger_event, ETMTRIGGER); + etm_writel(drvdata, drvdata->startstop_ctrl, ETMTSSCR); + etm_writel(drvdata, drvdata->enable_event, ETMTEEVR); + etm_writel(drvdata, drvdata->enable_ctrl1, ETMTECR1); + etm_writel(drvdata, drvdata->fifofull_level, ETMFFLR); + for (i = 0; i < drvdata->nr_addr_cmp; i++) { + etm_writel(drvdata, drvdata->addr_val[i], ETMACVRn(i)); + etm_writel(drvdata, drvdata->addr_acctype[i], ETMACTRn(i)); + } + for (i = 0; i < drvdata->nr_cntr; i++) { + etm_writel(drvdata, drvdata->cntr_rld_val[i], ETMCNTRLDVRn(i)); + etm_writel(drvdata, drvdata->cntr_event[i], ETMCNTENRn(i)); + etm_writel(drvdata, drvdata->cntr_rld_event[i], + ETMCNTRLDEVRn(i)); + etm_writel(drvdata, drvdata->cntr_val[i], ETMCNTVRn(i)); + } + etm_writel(drvdata, drvdata->seq_12_event, ETMSQ12EVR); + etm_writel(drvdata, drvdata->seq_21_event, ETMSQ21EVR); + etm_writel(drvdata, drvdata->seq_23_event, ETMSQ23EVR); + etm_writel(drvdata, drvdata->seq_31_event, ETMSQ31EVR); + etm_writel(drvdata, drvdata->seq_32_event, ETMSQ32EVR); + etm_writel(drvdata, drvdata->seq_13_event, ETMSQ13EVR); + etm_writel(drvdata, drvdata->seq_curr_state, ETMSQR); + for (i = 0; i < drvdata->nr_ext_out; i++) + etm_writel(drvdata, ETM_DEFAULT_EVENT_VAL, ETMEXTOUTEVRn(i)); + for (i = 0; i < drvdata->nr_ctxid_cmp; i++) + etm_writel(drvdata, drvdata->ctxid_val[i], ETMCIDCVRn(i)); + etm_writel(drvdata, drvdata->ctxid_mask, ETMCIDCMR); + etm_writel(drvdata, drvdata->sync_freq, ETMSYNCFR); + /* No external input selected */ + etm_writel(drvdata, 0x0, ETMEXTINSELR); + etm_writel(drvdata, drvdata->timestamp_event, ETMTSEVR); + /* No auxiliary control selected */ + etm_writel(drvdata, 0x0, ETMAUXCR); + etm_writel(drvdata, drvdata->traceid, ETMTRACEIDR); + /* No VMID comparator value selected */ + etm_writel(drvdata, 0x0, ETMVMIDCVR); + + /* Ensures trace output is enabled from this ETM */ + etm_writel(drvdata, drvdata->ctrl | ETMCR_ETM_EN | etmcr, ETMCR); + + etm_clr_prog(drvdata); + CS_LOCK(drvdata->base); + + dev_dbg(drvdata->dev, "cpu: %d enable smp call done\n", drvdata->cpu); +} + +static int etm_trace_id_simple(struct etm_drvdata *drvdata) +{ + if (!drvdata->enable) + return drvdata->traceid; + + return (etm_readl(drvdata, ETMTRACEIDR) & ETM_TRACEID_MASK); +} + +static int etm_trace_id(struct coresight_device *csdev) +{ + struct etm_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); + unsigned long flags; + int trace_id = -1; + + if (!drvdata->enable) + return drvdata->traceid; + + if (clk_prepare_enable(drvdata->clk)) + goto out; + + spin_lock_irqsave(&drvdata->spinlock, flags); + + CS_UNLOCK(drvdata->base); + trace_id = (etm_readl(drvdata, ETMTRACEIDR) & ETM_TRACEID_MASK); + CS_LOCK(drvdata->base); + + spin_unlock_irqrestore(&drvdata->spinlock, flags); + clk_disable_unprepare(drvdata->clk); +out: + return trace_id; +} + +static int etm_enable(struct coresight_device *csdev) +{ + struct etm_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); + int ret; + + ret = clk_prepare_enable(drvdata->clk); + if (ret) + goto err_clk; + + spin_lock(&drvdata->spinlock); + + /* + * Configure the ETM only if the CPU is online. If it isn't online + * hw configuration will take place when 'CPU_STARTING' is received + * in @etm_cpu_callback. + */ + if (cpu_online(drvdata->cpu)) { + ret = smp_call_function_single(drvdata->cpu, + etm_enable_hw, drvdata, 1); + if (ret) + goto err; + } + + drvdata->enable = true; + drvdata->sticky_enable = true; + + spin_unlock(&drvdata->spinlock); + + dev_info(drvdata->dev, "ETM tracing enabled\n"); + return 0; +err: + spin_unlock(&drvdata->spinlock); + clk_disable_unprepare(drvdata->clk); +err_clk: + return ret; +} + +static void etm_disable_hw(void *info) +{ + int i; + struct etm_drvdata *drvdata = info; + + CS_UNLOCK(drvdata->base); + etm_set_prog(drvdata); + + /* Program trace enable to low by using always false event */ + etm_writel(drvdata, ETM_HARD_WIRE_RES_A | ETM_EVENT_NOT_A, ETMTEEVR); + + /* Read back sequencer and counters for post trace analysis */ + drvdata->seq_curr_state = (etm_readl(drvdata, ETMSQR) & ETM_SQR_MASK); + + for (i = 0; i < drvdata->nr_cntr; i++) + drvdata->cntr_val[i] = etm_readl(drvdata, ETMCNTVRn(i)); + + etm_set_pwrdwn(drvdata); + CS_LOCK(drvdata->base); + + dev_dbg(drvdata->dev, "cpu: %d disable smp call done\n", drvdata->cpu); +} + +static void etm_disable(struct coresight_device *csdev) +{ + struct etm_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); + + /* + * Taking hotplug lock here protects from clocks getting disabled + * with tracing being left on (crash scenario) if user disable occurs + * after cpu online mask indicates the cpu is offline but before the + * DYING hotplug callback is serviced by the ETM driver. + */ + get_online_cpus(); + spin_lock(&drvdata->spinlock); + + /* + * Executing etm_disable_hw on the cpu whose ETM is being disabled + * ensures that register writes occur when cpu is powered. + */ + smp_call_function_single(drvdata->cpu, etm_disable_hw, drvdata, 1); + drvdata->enable = false; + + spin_unlock(&drvdata->spinlock); + put_online_cpus(); + + clk_disable_unprepare(drvdata->clk); + + dev_info(drvdata->dev, "ETM tracing disabled\n"); +} + +static const struct coresight_ops_source etm_source_ops = { + .trace_id = etm_trace_id, + .enable = etm_enable, + .disable = etm_disable, +}; + +static const struct coresight_ops etm_cs_ops = { + .source_ops = &etm_source_ops, +}; + +static ssize_t nr_addr_cmp_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + unsigned long val; + struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); + + val = drvdata->nr_addr_cmp; + return sprintf(buf, "%#lx\n", val); +} +static DEVICE_ATTR_RO(nr_addr_cmp); + +static ssize_t nr_cntr_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ unsigned long val; + struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); + + val = drvdata->nr_cntr; + return sprintf(buf, "%#lx\n", val); +} +static DEVICE_ATTR_RO(nr_cntr); + +static ssize_t nr_ctxid_cmp_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + unsigned long val; + struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); + + val = drvdata->nr_ctxid_cmp; + return sprintf(buf, "%#lx\n", val); +} +static DEVICE_ATTR_RO(nr_ctxid_cmp); + +static ssize_t etmsr_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + int ret; + unsigned long flags, val; + struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); + + ret = clk_prepare_enable(drvdata->clk); + if (ret) + return ret; + + spin_lock_irqsave(&drvdata->spinlock, flags); + CS_UNLOCK(drvdata->base); + + val = etm_readl(drvdata, ETMSR); + + CS_LOCK(drvdata->base); + spin_unlock_irqrestore(&drvdata->spinlock, flags); + clk_disable_unprepare(drvdata->clk); + + return sprintf(buf, "%#lx\n", val); +} +static DEVICE_ATTR_RO(etmsr); + +static ssize_t reset_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t size) +{ + int i, ret; + unsigned long val; + struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); + + ret = kstrtoul(buf, 16, &val); + if (ret) + return ret; + + if (val) { + spin_lock(&drvdata->spinlock); + drvdata->mode = ETM_MODE_EXCLUDE; + drvdata->ctrl = 0x0; + drvdata->trigger_event = ETM_DEFAULT_EVENT_VAL; + drvdata->startstop_ctrl = 0x0; + drvdata->addr_idx = 0x0; + for (i = 0; i < drvdata->nr_addr_cmp; i++) { + drvdata->addr_val[i] = 0x0; + drvdata->addr_acctype[i] = 0x0; + drvdata->addr_type[i] = ETM_ADDR_TYPE_NONE; + } + drvdata->cntr_idx = 0x0; + + etm_set_default(drvdata); + spin_unlock(&drvdata->spinlock); + } + + return size; +} +static DEVICE_ATTR_WO(reset); + +static ssize_t mode_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + unsigned long val; + struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); + + val = drvdata->mode; + return sprintf(buf, "%#lx\n", val); +} + +static ssize_t mode_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t size) +{ + int ret; + unsigned long val; + struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); + + ret = kstrtoul(buf, 16, &val); + if (ret) + return ret; + + spin_lock(&drvdata->spinlock); + drvdata->mode = val & ETM_MODE_ALL; + + if (drvdata->mode & ETM_MODE_EXCLUDE) + drvdata->enable_ctrl1 |= ETMTECR1_INC_EXC; + else + drvdata->enable_ctrl1 &= ~ETMTECR1_INC_EXC; + + if (drvdata->mode & ETM_MODE_CYCACC) + drvdata->ctrl |= ETMCR_CYC_ACC; + else + drvdata->ctrl &= ~ETMCR_CYC_ACC; + + if (drvdata->mode & ETM_MODE_STALL) { + if (!(drvdata->etmccr & ETMCCR_FIFOFULL)) { + dev_warn(drvdata->dev, "stall mode not supported\n"); + ret = -EINVAL; + goto err_unlock; + } + drvdata->ctrl |= ETMCR_STALL_MODE; + } else + drvdata->ctrl &= ~ETMCR_STALL_MODE; + + if (drvdata->mode & ETM_MODE_TIMESTAMP) { + if (!(drvdata->etmccer & ETMCCER_TIMESTAMP)) { + dev_warn(drvdata->dev, "timestamp not supported\n"); + ret = -EINVAL; + goto err_unlock; + } + drvdata->ctrl |= ETMCR_TIMESTAMP_EN; + } else + drvdata->ctrl &= ~ETMCR_TIMESTAMP_EN; + + if (drvdata->mode & ETM_MODE_CTXID) + drvdata->ctrl |= ETMCR_CTXID_SIZE; + else + drvdata->ctrl &= ~ETMCR_CTXID_SIZE; + spin_unlock(&drvdata->spinlock); + + return size; + +err_unlock: + spin_unlock(&drvdata->spinlock); + return ret; +} +static DEVICE_ATTR_RW(mode); + +static ssize_t trigger_event_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + unsigned long val; + struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); + + val = drvdata->trigger_event; + return sprintf(buf, "%#lx\n", val); +} + +static ssize_t trigger_event_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t size) +{ + int ret; + unsigned long val; + struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); + + ret = kstrtoul(buf, 16, &val); + if (ret) + return ret; + + drvdata->trigger_event = val & ETM_EVENT_MASK; + + return size; +} +static DEVICE_ATTR_RW(trigger_event); + +static ssize_t enable_event_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + unsigned long val; + struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); + + val = drvdata->enable_event; + return sprintf(buf, "%#lx\n", val); +} + +static ssize_t enable_event_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t size) +{ + int ret; + unsigned long val; + struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); + + ret = kstrtoul(buf, 16, &val); + if (ret) + return ret; + + drvdata->enable_event = val & ETM_EVENT_MASK; + + return size; +} +static DEVICE_ATTR_RW(enable_event); + +static ssize_t fifofull_level_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + unsigned long val; + struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); + + val = drvdata->fifofull_level; + return sprintf(buf, "%#lx\n", val); +} + +static ssize_t fifofull_level_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t size) +{ + int ret; + unsigned long val; + struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); + + ret = kstrtoul(buf, 16, &val); + if (ret) + return ret; + + drvdata->fifofull_level = val; + + return size; +} +static DEVICE_ATTR_RW(fifofull_level); + +static ssize_t addr_idx_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + unsigned long val; + struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); + + val = drvdata->addr_idx; + return sprintf(buf, "%#lx\n", val); +} + +static ssize_t addr_idx_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t size) +{ + int ret; + unsigned long val; + struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); + + ret = kstrtoul(buf, 16, &val); + if (ret) + return ret; + + if (val >= drvdata->nr_addr_cmp) + return -EINVAL; + + /* + * Use spinlock to ensure index doesn't change while it gets + * dereferenced multiple times within a spinlock block elsewhere. + */ + spin_lock(&drvdata->spinlock); + drvdata->addr_idx = val; + spin_unlock(&drvdata->spinlock); + + return size; +} +static DEVICE_ATTR_RW(addr_idx); + +static ssize_t addr_single_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + u8 idx; + unsigned long val; + struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); + + spin_lock(&drvdata->spinlock); + idx = drvdata->addr_idx; + if (!(drvdata->addr_type[idx] == ETM_ADDR_TYPE_NONE || + drvdata->addr_type[idx] == ETM_ADDR_TYPE_SINGLE)) { + spin_unlock(&drvdata->spinlock); + return -EINVAL; + } + + val = drvdata->addr_val[idx]; + spin_unlock(&drvdata->spinlock); + + return sprintf(buf, "%#lx\n", val); +} + +static ssize_t addr_single_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t size) +{ + u8 idx; + int ret; + unsigned long val; + struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); + + ret = kstrtoul(buf, 16, &val); + if (ret) + return ret; + + spin_lock(&drvdata->spinlock); + idx = drvdata->addr_idx; + if (!(drvdata->addr_type[idx] == ETM_ADDR_TYPE_NONE || + drvdata->addr_type[idx] == ETM_ADDR_TYPE_SINGLE)) { + spin_unlock(&drvdata->spinlock); + return -EINVAL; + } + + drvdata->addr_val[idx] = val; + drvdata->addr_type[idx] = ETM_ADDR_TYPE_SINGLE; + spin_unlock(&drvdata->spinlock); + + return size; +} +static DEVICE_ATTR_RW(addr_single); + +static ssize_t addr_range_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + u8 idx; + unsigned long val1, val2; + struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); + + spin_lock(&drvdata->spinlock); + idx = drvdata->addr_idx; + if (idx % 2 != 0) { + spin_unlock(&drvdata->spinlock); + return -EPERM; + } + if (!((drvdata->addr_type[idx] == ETM_ADDR_TYPE_NONE && + drvdata->addr_type[idx + 1] == ETM_ADDR_TYPE_NONE) || + (drvdata->addr_type[idx] == ETM_ADDR_TYPE_RANGE && + drvdata->addr_type[idx + 1] == ETM_ADDR_TYPE_RANGE))) { + spin_unlock(&drvdata->spinlock); + return -EPERM; + } + + val1 = drvdata->addr_val[idx]; + val2 = drvdata->addr_val[idx + 1]; + spin_unlock(&drvdata->spinlock); + + return sprintf(buf, "%#lx %#lx\n", val1, val2); +} + +static ssize_t addr_range_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t size) +{ + u8 idx; + unsigned long val1, val2; + struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); + + if (sscanf(buf, "%lx %lx", &val1, &val2) != 2) + return -EINVAL; + /* Lower address comparator cannot have a higher address value */ + if (val1 > val2) + return -EINVAL; + + spin_lock(&drvdata->spinlock); + idx = drvdata->addr_idx; + if (idx % 2 != 0) { + spin_unlock(&drvdata->spinlock); + return -EPERM; + } + if (!((drvdata->addr_type[idx] == ETM_ADDR_TYPE_NONE && + drvdata->addr_type[idx + 1] == ETM_ADDR_TYPE_NONE) || + (drvdata->addr_type[idx] == ETM_ADDR_TYPE_RANGE && + drvdata->addr_type[idx + 1] == ETM_ADDR_TYPE_RANGE))) { + spin_unlock(&drvdata->spinlock); + return -EPERM; + } + + drvdata->addr_val[idx] = val1; + drvdata->addr_type[idx] = ETM_ADDR_TYPE_RANGE; + drvdata->addr_val[idx + 1] = val2; + drvdata->addr_type[idx + 1] = ETM_ADDR_TYPE_RANGE; + drvdata->enable_ctrl1 |= (1 << (idx/2)); + spin_unlock(&drvdata->spinlock); + + return size; +} +static DEVICE_ATTR_RW(addr_range); + +static ssize_t addr_start_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + u8 idx; + unsigned long val; + struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); + + spin_lock(&drvdata->spinlock); + idx = drvdata->addr_idx; + if (!(drvdata->addr_type[idx] == ETM_ADDR_TYPE_NONE || + drvdata->addr_type[idx] == ETM_ADDR_TYPE_START)) { + spin_unlock(&drvdata->spinlock); + return -EPERM; + } + + val = drvdata->addr_val[idx]; + spin_unlock(&drvdata->spinlock); + + return sprintf(buf, "%#lx\n", val); +} + +static ssize_t addr_start_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t size) +{ + u8 idx; + int ret; + unsigned long val; + struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); + + ret = kstrtoul(buf, 16, &val); + if (ret) + return ret; + + spin_lock(&drvdata->spinlock); + idx = drvdata->addr_idx; + if (!(drvdata->addr_type[idx] == ETM_ADDR_TYPE_NONE || + drvdata->addr_type[idx] == ETM_ADDR_TYPE_START)) { + spin_unlock(&drvdata->spinlock); + return -EPERM; + } + + drvdata->addr_val[idx] = val; + drvdata->addr_type[idx] = ETM_ADDR_TYPE_START; + drvdata->startstop_ctrl |= (1 << idx); + drvdata->enable_ctrl1 |= BIT(25); + spin_unlock(&drvdata->spinlock); + + return size; +} +static DEVICE_ATTR_RW(addr_start); + +static ssize_t addr_stop_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + u8 idx; + unsigned long val; + struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); + + spin_lock(&drvdata->spinlock); + idx = drvdata->addr_idx; + if (!(drvdata->addr_type[idx] == ETM_ADDR_TYPE_NONE || + drvdata->addr_type[idx] == ETM_ADDR_TYPE_STOP)) { + spin_unlock(&drvdata->spinlock); + return -EPERM; + } + + val = drvdata->addr_val[idx]; + spin_unlock(&drvdata->spinlock); + + return sprintf(buf, "%#lx\n", val); +} + +static ssize_t addr_stop_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t size) +{ + u8 idx; + int ret; + unsigned long val; + struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); + + ret = kstrtoul(buf, 16, &val); + if (ret) + return ret; + + spin_lock(&drvdata->spinlock); + idx = drvdata->addr_idx; + if (!(drvdata->addr_type[idx] == ETM_ADDR_TYPE_NONE || + drvdata->addr_type[idx] == ETM_ADDR_TYPE_STOP)) { + spin_unlock(&drvdata->spinlock); + return -EPERM; + } + + drvdata->addr_val[idx] = val; + drvdata->addr_type[idx] = ETM_ADDR_TYPE_STOP; + drvdata->startstop_ctrl |= (1 << (idx + 16)); + drvdata->enable_ctrl1 |= ETMTECR1_START_STOP; + spin_unlock(&drvdata->spinlock); + + return size; +} +static DEVICE_ATTR_RW(addr_stop); + +static ssize_t addr_acctype_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + unsigned long val; + struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); + + spin_lock(&drvdata->spinlock); + val = drvdata->addr_acctype[drvdata->addr_idx]; + spin_unlock(&drvdata->spinlock); + + return sprintf(buf, "%#lx\n", val); +} + +static ssize_t addr_acctype_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t size) +{ + int ret; + unsigned long val; + struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); + + ret = kstrtoul(buf, 16, &val); + if (ret) + return ret; + + spin_lock(&drvdata->spinlock); + drvdata->addr_acctype[drvdata->addr_idx] = val; + spin_unlock(&drvdata->spinlock); + + return size; +} +static DEVICE_ATTR_RW(addr_acctype); + +static ssize_t cntr_idx_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + unsigned long val; + struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); + + val = drvdata->cntr_idx; + return sprintf(buf, "%#lx\n", val); +} + +static ssize_t cntr_idx_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t size) +{ + int ret; + unsigned long val; + struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); + + ret = kstrtoul(buf, 16, &val); + if (ret) + return ret; + + if (val >= drvdata->nr_cntr) + return -EINVAL; + /* + * Use spinlock to ensure index doesn't change while it gets + * dereferenced multiple times within a spinlock block elsewhere. + */ + spin_lock(&drvdata->spinlock); + drvdata->cntr_idx = val; + spin_unlock(&drvdata->spinlock); + + return size; +} +static DEVICE_ATTR_RW(cntr_idx); + +static ssize_t cntr_rld_val_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + unsigned long val; + struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); + + spin_lock(&drvdata->spinlock); + val = drvdata->cntr_rld_val[drvdata->cntr_idx]; + spin_unlock(&drvdata->spinlock); + + return sprintf(buf, "%#lx\n", val); +} + +static ssize_t cntr_rld_val_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t size) +{ + int ret; + unsigned long val; + struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); + + ret = kstrtoul(buf, 16, &val); + if (ret) + return ret; + + spin_lock(&drvdata->spinlock); + drvdata->cntr_rld_val[drvdata->cntr_idx] = val; + spin_unlock(&drvdata->spinlock); + + return size; +} +static DEVICE_ATTR_RW(cntr_rld_val); + +static ssize_t cntr_event_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + unsigned long val; + struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); + + spin_lock(&drvdata->spinlock); + val = drvdata->cntr_event[drvdata->cntr_idx]; + spin_unlock(&drvdata->spinlock); + + return sprintf(buf, "%#lx\n", val); +} + +static ssize_t cntr_event_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t size) +{ + int ret; + unsigned long val; + struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); + + ret = kstrtoul(buf, 16, &val); + if (ret) + return ret; + + spin_lock(&drvdata->spinlock); + drvdata->cntr_event[drvdata->cntr_idx] = val & ETM_EVENT_MASK; + spin_unlock(&drvdata->spinlock); + + return size; +} +static DEVICE_ATTR_RW(cntr_event); + +static ssize_t cntr_rld_event_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + unsigned long val; + struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); + + spin_lock(&drvdata->spinlock); + val = drvdata->cntr_rld_event[drvdata->cntr_idx]; + spin_unlock(&drvdata->spinlock); + + return sprintf(buf, "%#lx\n", val); +} + +static ssize_t cntr_rld_event_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t size) +{ + int ret; + unsigned long val; + struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); + + ret = kstrtoul(buf, 16, &val); + if (ret) + return ret; + + spin_lock(&drvdata->spinlock); + drvdata->cntr_rld_event[drvdata->cntr_idx] = val & ETM_EVENT_MASK; + spin_unlock(&drvdata->spinlock); + + return size; +} +static DEVICE_ATTR_RW(cntr_rld_event); + +static ssize_t cntr_val_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + int i, ret = 0; + u32 val; + struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); + + if (!drvdata->enable) { + spin_lock(&drvdata->spinlock); + for (i = 0; i < drvdata->nr_cntr; i++) + ret += sprintf(buf, "counter %d: %x\n", + i, drvdata->cntr_val[i]); + spin_unlock(&drvdata->spinlock); + return ret; + } + + for (i = 0; i < drvdata->nr_cntr; i++) { + val = etm_readl(drvdata, ETMCNTVRn(i)); + ret += sprintf(buf, "counter %d: %x\n", i, val); + } + + return ret; +} + +static ssize_t cntr_val_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t size) +{ + int ret; + unsigned long val; + struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); + + ret = kstrtoul(buf, 16, &val); + if (ret) + return ret; + + spin_lock(&drvdata->spinlock); + drvdata->cntr_val[drvdata->cntr_idx] = val; + spin_unlock(&drvdata->spinlock); + + return size; +} +static DEVICE_ATTR_RW(cntr_val); + +static ssize_t seq_12_event_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + unsigned long val; + struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); + + val = drvdata->seq_12_event; + return sprintf(buf, "%#lx\n", val); +} + +static ssize_t seq_12_event_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t size) +{ + int ret; + unsigned long val; + struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); + + ret = kstrtoul(buf, 16, &val); + if (ret) + return ret; + + drvdata->seq_12_event = val & ETM_EVENT_MASK; + return size; +} +static DEVICE_ATTR_RW(seq_12_event); + +static ssize_t seq_21_event_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + unsigned long val; + struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); + + val = drvdata->seq_21_event; + return sprintf(buf, "%#lx\n", val); +} + +static ssize_t seq_21_event_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t size) +{ + int ret; + unsigned long val; + struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); + + ret = kstrtoul(buf, 16, &val); + if (ret) + return ret; + + drvdata->seq_21_event = val & ETM_EVENT_MASK; + return size; +} +static DEVICE_ATTR_RW(seq_21_event); + +static ssize_t seq_23_event_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + unsigned long val; + struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); + + val = drvdata->seq_23_event; + return sprintf(buf, "%#lx\n", val); +} + +static ssize_t seq_23_event_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t size) +{ + int ret; + unsigned long val; + struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); + + ret = kstrtoul(buf, 16, &val); + if (ret) + return ret; + + drvdata->seq_23_event = val & ETM_EVENT_MASK; + return size; +} +static DEVICE_ATTR_RW(seq_23_event); + +static ssize_t seq_31_event_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + unsigned long val; + struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); + + val = drvdata->seq_31_event; + return sprintf(buf, "%#lx\n", val); +} + +static ssize_t seq_31_event_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t size) +{ + int ret; + unsigned long val; + struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); + + ret = kstrtoul(buf, 16, &val); + if (ret) + return ret; + + drvdata->seq_31_event = val & ETM_EVENT_MASK; + return size; +} +static DEVICE_ATTR_RW(seq_31_event); + +static ssize_t seq_32_event_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + unsigned long val; + struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); + + val = drvdata->seq_32_event; + return sprintf(buf, "%#lx\n", val); +} + +static ssize_t seq_32_event_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t size) +{ + int ret; + unsigned long val; + struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); + + ret = kstrtoul(buf, 16, &val); + if (ret) + return ret; + + drvdata->seq_32_event = val & ETM_EVENT_MASK; + return size; +} +static DEVICE_ATTR_RW(seq_32_event); + +static ssize_t seq_13_event_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + unsigned long val; + struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); + + val = drvdata->seq_13_event; + return sprintf(buf, "%#lx\n", val); +} + +static ssize_t seq_13_event_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t size) +{ + int ret; + unsigned long val; + struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); + + ret = kstrtoul(buf, 16, &val); + if (ret) + return ret; + + drvdata->seq_13_event = val & ETM_EVENT_MASK; + return size; +} +static DEVICE_ATTR_RW(seq_13_event); + +static ssize_t seq_curr_state_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + int ret; + unsigned long val, flags; + struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); + + if (!drvdata->enable) { + val = drvdata->seq_curr_state; + goto out; + } + + ret = clk_prepare_enable(drvdata->clk); + if (ret) + return ret; + + spin_lock_irqsave(&drvdata->spinlock, flags); + + CS_UNLOCK(drvdata->base); + val = (etm_readl(drvdata, ETMSQR) & ETM_SQR_MASK); + CS_LOCK(drvdata->base); + + spin_unlock_irqrestore(&drvdata->spinlock, flags); + clk_disable_unprepare(drvdata->clk); +out: + return sprintf(buf, "%#lx\n", val); +} + +static ssize_t seq_curr_state_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t size) +{ + int ret; + unsigned long val; + struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); + + ret = kstrtoul(buf, 16, &val); + if (ret) + return ret; + + if (val > ETM_SEQ_STATE_MAX_VAL) + return -EINVAL; + + drvdata->seq_curr_state = val; + + return size; +} +static DEVICE_ATTR_RW(seq_curr_state); + +static ssize_t ctxid_idx_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + unsigned long val; + struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); + + val = drvdata->ctxid_idx; + return sprintf(buf, "%#lx\n", val); +} + +static ssize_t ctxid_idx_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t size) +{ + int ret; + unsigned long val; + struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); + + ret = kstrtoul(buf, 16, &val); + if (ret) + return ret; + + if (val >= drvdata->nr_ctxid_cmp) + return -EINVAL; + + /* + * Use spinlock to ensure index doesn't change while it gets + * dereferenced multiple times within a spinlock block elsewhere. + */ + spin_lock(&drvdata->spinlock); + drvdata->ctxid_idx = val; + spin_unlock(&drvdata->spinlock); + + return size; +} +static DEVICE_ATTR_RW(ctxid_idx); + +static ssize_t ctxid_val_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + unsigned long val; + struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); + + spin_lock(&drvdata->spinlock); + val = drvdata->ctxid_val[drvdata->ctxid_idx]; + spin_unlock(&drvdata->spinlock); + + return sprintf(buf, "%#lx\n", val); +} + +static ssize_t ctxid_val_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t size) +{ + int ret; + unsigned long val; + struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); + + ret = kstrtoul(buf, 16, &val); + if (ret) + return ret; + + spin_lock(&drvdata->spinlock); + drvdata->ctxid_val[drvdata->ctxid_idx] = val; + spin_unlock(&drvdata->spinlock); + + return size; +} +static DEVICE_ATTR_RW(ctxid_val); + +static ssize_t ctxid_mask_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + unsigned long val; + struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); + + val = drvdata->ctxid_mask; + return sprintf(buf, "%#lx\n", val); +} + +static ssize_t ctxid_mask_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t size) +{ + int ret; + unsigned long val; + struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); + + ret = kstrtoul(buf, 16, &val); + if (ret) + return ret; + + drvdata->ctxid_mask = val; + return size; +} +static DEVICE_ATTR_RW(ctxid_mask); + +static ssize_t sync_freq_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + unsigned long val; + struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); + + val = drvdata->sync_freq; + return sprintf(buf, "%#lx\n", val); +} + +static ssize_t sync_freq_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t size) +{ + int ret; + unsigned long val; + struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); + + ret = kstrtoul(buf, 16, &val); + if (ret) + return ret; + + drvdata->sync_freq = val & ETM_SYNC_MASK; + return size; +} +static DEVICE_ATTR_RW(sync_freq); + +static ssize_t timestamp_event_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + unsigned long val; + struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); + + val = drvdata->timestamp_event; + return sprintf(buf, "%#lx\n", val); +} + +static ssize_t timestamp_event_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t size) +{ + int ret; + unsigned long val; + struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); + + ret = kstrtoul(buf, 16, &val); + if (ret) + return ret; + + drvdata->timestamp_event = val & ETM_EVENT_MASK; + return size; +} +static DEVICE_ATTR_RW(timestamp_event); + +static ssize_t status_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + int ret; + unsigned long flags; + struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); + + ret = clk_prepare_enable(drvdata->clk); + if (ret) + return ret; + + spin_lock_irqsave(&drvdata->spinlock, flags); + + CS_UNLOCK(drvdata->base); + ret = sprintf(buf, + "ETMCCR: 0x%08x\n" + "ETMCCER: 0x%08x\n" + "ETMSCR: 0x%08x\n" + "ETMIDR: 0x%08x\n" + "ETMCR: 0x%08x\n" + "ETMTRACEIDR: 0x%08x\n" + "Enable event: 0x%08x\n" + "Enable start/stop: 0x%08x\n" + "Enable control: CR1 0x%08x CR2 0x%08x\n" + "CPU affinity: %d\n", + drvdata->etmccr, drvdata->etmccer, + etm_readl(drvdata, ETMSCR), etm_readl(drvdata, ETMIDR), + etm_readl(drvdata, ETMCR), etm_trace_id_simple(drvdata), + etm_readl(drvdata, ETMTEEVR), + etm_readl(drvdata, ETMTSSCR), + etm_readl(drvdata, ETMTECR1), + etm_readl(drvdata, ETMTECR2), + drvdata->cpu); + CS_LOCK(drvdata->base); + + spin_unlock_irqrestore(&drvdata->spinlock, flags); + clk_disable_unprepare(drvdata->clk); + + return ret; +} +static DEVICE_ATTR_RO(status); + +static ssize_t traceid_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + int ret; + unsigned long val, flags; + struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); + + if (!drvdata->enable) { + val = drvdata->traceid; + goto out; + } + + ret = clk_prepare_enable(drvdata->clk); + if (ret) + return ret; + + spin_lock_irqsave(&drvdata->spinlock, flags); + CS_UNLOCK(drvdata->base); + + val = (etm_readl(drvdata, ETMTRACEIDR) & ETM_TRACEID_MASK); + + CS_LOCK(drvdata->base); + spin_unlock_irqrestore(&drvdata->spinlock, flags); + clk_disable_unprepare(drvdata->clk); +out: + return sprintf(buf, "%#lx\n", val); +} + +static ssize_t traceid_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t size) +{ + int ret; + unsigned long val; + struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); + + ret = kstrtoul(buf, 16, &val); + if (ret) + return ret; + + drvdata->traceid = val & ETM_TRACEID_MASK; + return size; +} +static DEVICE_ATTR_RW(traceid); + +static struct attribute *coresight_etm_attrs[] = { + &dev_attr_nr_addr_cmp.attr, + &dev_attr_nr_cntr.attr, + &dev_attr_nr_ctxid_cmp.attr, + &dev_attr_etmsr.attr, + &dev_attr_reset.attr, + &dev_attr_mode.attr, + &dev_attr_trigger_event.attr, + &dev_attr_enable_event.attr, + &dev_attr_fifofull_level.attr, + &dev_attr_addr_idx.attr, + &dev_attr_addr_single.attr, + &dev_attr_addr_range.attr, + &dev_attr_addr_start.attr, + &dev_attr_addr_stop.attr, + &dev_attr_addr_acctype.attr, + &dev_attr_cntr_idx.attr, + &dev_attr_cntr_rld_val.attr, + &dev_attr_cntr_event.attr, + &dev_attr_cntr_rld_event.attr, + &dev_attr_cntr_val.attr, + &dev_attr_seq_12_event.attr, + &dev_attr_seq_21_event.attr, + &dev_attr_seq_23_event.attr, + &dev_attr_seq_31_event.attr, + &dev_attr_seq_32_event.attr, + &dev_attr_seq_13_event.attr, + &dev_attr_seq_curr_state.attr, + &dev_attr_ctxid_idx.attr, + &dev_attr_ctxid_val.attr, + &dev_attr_ctxid_mask.attr, + &dev_attr_sync_freq.attr, + &dev_attr_timestamp_event.attr, + &dev_attr_status.attr, + &dev_attr_traceid.attr, + NULL, +}; +ATTRIBUTE_GROUPS(coresight_etm); + +static int etm_cpu_callback(struct notifier_block *nfb, unsigned long action, + void *hcpu) +{ + unsigned int cpu = (unsigned long)hcpu; + + if (!etmdrvdata[cpu]) + goto out; + + switch (action & (~CPU_TASKS_FROZEN)) { + case CPU_STARTING: + spin_lock(&etmdrvdata[cpu]->spinlock); + if (!etmdrvdata[cpu]->os_unlock) { + etm_os_unlock(etmdrvdata[cpu]); + etmdrvdata[cpu]->os_unlock = true; + } + + if (etmdrvdata[cpu]->enable) + etm_enable_hw(etmdrvdata[cpu]); + spin_unlock(&etmdrvdata[cpu]->spinlock); + break; + + case CPU_ONLINE: + if (etmdrvdata[cpu]->boot_enable && + !etmdrvdata[cpu]->sticky_enable) + coresight_enable(etmdrvdata[cpu]->csdev); + break; + + case CPU_DYING: + spin_lock(&etmdrvdata[cpu]->spinlock); + if (etmdrvdata[cpu]->enable) + etm_disable_hw(etmdrvdata[cpu]); + spin_unlock(&etmdrvdata[cpu]->spinlock); + break; + } +out: + return NOTIFY_OK; +} + +static struct notifier_block etm_cpu_notifier = { + .notifier_call = etm_cpu_callback, +}; + +static bool etm_arch_supported(u8 arch) +{ + switch (arch) { + case ETM_ARCH_V3_3: + break; + case ETM_ARCH_V3_5: + break; + case PFT_ARCH_V1_0: + break; + case PFT_ARCH_V1_1: + break; + default: + return false; + } + return true; +} + +static void etm_init_arch_data(void *info) +{ + u32 etmidr; + u32 etmccr; + struct etm_drvdata *drvdata = info; + + CS_UNLOCK(drvdata->base); + + /* First dummy read */ + (void)etm_readl(drvdata, ETMPDSR); + /* Provide power to ETM: ETMPDCR[3] == 1 */ + etm_set_pwrup(drvdata); + /* + * Clear power down bit since when this bit is set writes to + * certain registers might be ignored. + */ + etm_clr_pwrdwn(drvdata); + /* + * Set prog bit. It will be set from reset but this is included to + * ensure it is set + */ + etm_set_prog(drvdata); + + /* Find all capabilities */ + etmidr = etm_readl(drvdata, ETMIDR); + drvdata->arch = BMVAL(etmidr, 4, 11); + drvdata->port_size = etm_readl(drvdata, ETMCR) & PORT_SIZE_MASK; + + drvdata->etmccer = etm_readl(drvdata, ETMCCER); + etmccr = etm_readl(drvdata, ETMCCR); + drvdata->etmccr = etmccr; + drvdata->nr_addr_cmp = BMVAL(etmccr, 0, 3) * 2; + drvdata->nr_cntr = BMVAL(etmccr, 13, 15); + drvdata->nr_ext_inp = BMVAL(etmccr, 17, 19); + drvdata->nr_ext_out = BMVAL(etmccr, 20, 22); + drvdata->nr_ctxid_cmp = BMVAL(etmccr, 24, 25); + + etm_set_pwrdwn(drvdata); + etm_clr_pwrup(drvdata); + CS_LOCK(drvdata->base); +} + +static void etm_init_default_data(struct etm_drvdata *drvdata) +{ + /* + * A trace ID of value 0 is invalid, so let's start at some + * random value that fits in 7 bits and will be just as good. + */ + static int etm3x_traceid = 0x10; + + u32 flags = (1 << 0 | /* instruction execute*/ + 3 << 3 | /* ARM instruction */ + 0 << 5 | /* No data value comparison */ + 0 << 7 | /* No exact mach */ + 0 << 8 | /* Ignore context ID */ + 0 << 10); /* Security ignored */ + + /* + * Initial configuration only - guarantees sources handled by + * this driver have a unique ID at startup time but not between + * all other types of sources. For that we lean on the core + * framework. + */ + drvdata->traceid = etm3x_traceid++; + drvdata->ctrl = (ETMCR_CYC_ACC | ETMCR_TIMESTAMP_EN); + drvdata->enable_ctrl1 = ETMTECR1_ADDR_COMP_1; + if (drvdata->nr_addr_cmp >= 2) { + drvdata->addr_val[0] = (u32) _stext; + drvdata->addr_val[1] = (u32) _etext; + drvdata->addr_acctype[0] = flags; + drvdata->addr_acctype[1] = flags; + drvdata->addr_type[0] = ETM_ADDR_TYPE_RANGE; + drvdata->addr_type[1] = ETM_ADDR_TYPE_RANGE; + } + + etm_set_default(drvdata); +} + +static int etm_probe(struct amba_device *adev, const struct amba_id *id) +{ + int ret; + void __iomem *base; + struct device *dev = &adev->dev; + struct coresight_platform_data *pdata = NULL; + struct etm_drvdata *drvdata; + struct resource *res = &adev->res; + struct coresight_desc *desc; + struct device_node *np = adev->dev.of_node; + + desc = devm_kzalloc(dev, sizeof(*desc), GFP_KERNEL); + if (!desc) + return -ENOMEM; + + drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL); + if (!drvdata) + return -ENOMEM; + + if (np) { + pdata = of_get_coresight_platform_data(dev, np); + if (IS_ERR(pdata)) + return PTR_ERR(pdata); + + adev->dev.platform_data = pdata; + drvdata->use_cp14 = of_property_read_bool(np, "arm,cp14"); + } + + drvdata->dev = &adev->dev; + dev_set_drvdata(dev, drvdata); + + /* Validity for the resource is already checked by the AMBA core */ + base = devm_ioremap_resource(dev, res); + if (IS_ERR(base)) + return PTR_ERR(base); + + drvdata->base = base; + + spin_lock_init(&drvdata->spinlock); + + drvdata->clk = adev->pclk; + ret = clk_prepare_enable(drvdata->clk); + if (ret) + return ret; + + drvdata->cpu = pdata ? pdata->cpu : 0; + + get_online_cpus(); + etmdrvdata[drvdata->cpu] = drvdata; + + if (!smp_call_function_single(drvdata->cpu, etm_os_unlock, drvdata, 1)) + drvdata->os_unlock = true; + + if (smp_call_function_single(drvdata->cpu, + etm_init_arch_data, drvdata, 1)) + dev_err(dev, "ETM arch init failed\n"); + + if (!etm_count++) + register_hotcpu_notifier(&etm_cpu_notifier); + + put_online_cpus(); + + if (etm_arch_supported(drvdata->arch) == false) { + ret = -EINVAL; + goto err_arch_supported; + } + etm_init_default_data(drvdata); + + clk_disable_unprepare(drvdata->clk); + + desc->type = CORESIGHT_DEV_TYPE_SOURCE; + desc->subtype.source_subtype = CORESIGHT_DEV_SUBTYPE_SOURCE_PROC; + desc->ops = &etm_cs_ops; + desc->pdata = pdata; + desc->dev = dev; + desc->groups = coresight_etm_groups; + drvdata->csdev = coresight_register(desc); + if (IS_ERR(drvdata->csdev)) { + ret = PTR_ERR(drvdata->csdev); + goto err_arch_supported; + } + + dev_info(dev, "ETM initialized\n"); + + if (boot_enable) { + coresight_enable(drvdata->csdev); + drvdata->boot_enable = true; + } + + return 0; + +err_arch_supported: + clk_disable_unprepare(drvdata->clk); + if (--etm_count == 0) + unregister_hotcpu_notifier(&etm_cpu_notifier); + return ret; +} + +static int etm_remove(struct amba_device *adev) +{ + struct etm_drvdata *drvdata = amba_get_drvdata(adev); + + coresight_unregister(drvdata->csdev); + if (--etm_count == 0) + unregister_hotcpu_notifier(&etm_cpu_notifier); + + return 0; +} + +static struct amba_id etm_ids[] = { + { /* ETM 3.3 */ + .id = 0x0003b921, + .mask = 0x0003ffff, + }, + { /* ETM 3.5 */ + .id = 0x0003b956, + .mask = 0x0003ffff, + }, + { /* PTM 1.0 */ + .id = 0x0003b950, + .mask = 0x0003ffff, + }, + { /* PTM 1.1 */ + .id = 0x0003b95f, + .mask = 0x0003ffff, + }, + { 0, 0}, +}; + +static struct amba_driver etm_driver = { + .drv = { + .name = "coresight-etm3x", + .owner = THIS_MODULE, + }, + .probe = etm_probe, + .remove = etm_remove, + .id_table = etm_ids, +}; + +int __init etm_init(void) +{ + return amba_driver_register(&etm_driver); +} +module_init(etm_init); + +void __exit etm_exit(void) +{ + amba_driver_unregister(&etm_driver); +} +module_exit(etm_exit); + +MODULE_LICENSE("GPL v2"); +MODULE_DESCRIPTION("CoreSight Program Flow Trace driver"); diff --git a/drivers/hwtracing/coresight/coresight-funnel.c b/drivers/hwtracing/coresight/coresight-funnel.c new file mode 100644 index 000000000000..3db36f70b666 --- /dev/null +++ b/drivers/hwtracing/coresight/coresight-funnel.c @@ -0,0 +1,258 @@ +/* Copyright (c) 2011-2012, The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "coresight-priv.h" + +#define FUNNEL_FUNCTL 0x000 +#define FUNNEL_PRICTL 0x004 + +#define FUNNEL_HOLDTIME_MASK 0xf00 +#define FUNNEL_HOLDTIME_SHFT 0x8 +#define FUNNEL_HOLDTIME (0x7 << FUNNEL_HOLDTIME_SHFT) + +/** + * struct funnel_drvdata - specifics associated to a funnel component + * @base: memory mapped base address for this component. + * @dev: the device entity associated to this component. + * @csdev: component vitals needed by the framework. + * @clk: the clock this component is associated to. + * @priority: port selection order. + */ +struct funnel_drvdata { + void __iomem *base; + struct device *dev; + struct coresight_device *csdev; + struct clk *clk; + unsigned long priority; +}; + +static void funnel_enable_hw(struct funnel_drvdata *drvdata, int port) +{ + u32 functl; + + CS_UNLOCK(drvdata->base); + + functl = readl_relaxed(drvdata->base + FUNNEL_FUNCTL); + functl &= ~FUNNEL_HOLDTIME_MASK; + functl |= FUNNEL_HOLDTIME; + functl |= (1 << port); + writel_relaxed(functl, drvdata->base + FUNNEL_FUNCTL); + writel_relaxed(drvdata->priority, drvdata->base + FUNNEL_PRICTL); + + CS_LOCK(drvdata->base); +} + +static int funnel_enable(struct coresight_device *csdev, int inport, + int outport) +{ + struct funnel_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); + int ret; + + ret = clk_prepare_enable(drvdata->clk); + if (ret) + return ret; + + funnel_enable_hw(drvdata, inport); + + dev_info(drvdata->dev, "FUNNEL inport %d enabled\n", inport); + return 0; +} + +static void funnel_disable_hw(struct funnel_drvdata *drvdata, int inport) +{ + u32 functl; + + CS_UNLOCK(drvdata->base); + + functl = readl_relaxed(drvdata->base + FUNNEL_FUNCTL); + functl &= ~(1 << inport); + writel_relaxed(functl, drvdata->base + FUNNEL_FUNCTL); + + CS_LOCK(drvdata->base); +} + +static void funnel_disable(struct coresight_device *csdev, int inport, + int outport) +{ + struct funnel_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); + + funnel_disable_hw(drvdata, inport); + + clk_disable_unprepare(drvdata->clk); + + dev_info(drvdata->dev, "FUNNEL inport %d disabled\n", inport); +} + +static const struct coresight_ops_link funnel_link_ops = { + .enable = funnel_enable, + .disable = funnel_disable, +}; + +static const struct coresight_ops funnel_cs_ops = { + .link_ops = &funnel_link_ops, +}; + +static ssize_t priority_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct funnel_drvdata *drvdata = dev_get_drvdata(dev->parent); + unsigned long val = drvdata->priority; + + return sprintf(buf, "%#lx\n", val); +} + +static ssize_t priority_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t size) +{ + int ret; + unsigned long val; + struct funnel_drvdata *drvdata = dev_get_drvdata(dev->parent); + + ret = kstrtoul(buf, 16, &val); + if (ret) + return ret; + + drvdata->priority = val; + return size; +} +static DEVICE_ATTR_RW(priority); + +static u32 get_funnel_ctrl_hw(struct funnel_drvdata *drvdata) +{ + u32 functl; + + CS_UNLOCK(drvdata->base); + functl = readl_relaxed(drvdata->base + FUNNEL_FUNCTL); + CS_LOCK(drvdata->base); + + return functl; +} + +static ssize_t funnel_ctrl_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + int ret; + u32 val; + struct funnel_drvdata *drvdata = dev_get_drvdata(dev->parent); + + ret = clk_prepare_enable(drvdata->clk); + if (ret) + return ret; + + val = get_funnel_ctrl_hw(drvdata); + clk_disable_unprepare(drvdata->clk); + + return sprintf(buf, "%#x\n", val); +} +static DEVICE_ATTR_RO(funnel_ctrl); + +static struct attribute *coresight_funnel_attrs[] = { + &dev_attr_funnel_ctrl.attr, + &dev_attr_priority.attr, + NULL, +}; +ATTRIBUTE_GROUPS(coresight_funnel); + +static int funnel_probe(struct amba_device *adev, const struct amba_id *id) +{ + void __iomem *base; + struct device *dev = &adev->dev; + struct coresight_platform_data *pdata = NULL; + struct funnel_drvdata *drvdata; + struct resource *res = &adev->res; + struct coresight_desc *desc; + struct device_node *np = adev->dev.of_node; + + if (np) { + pdata = of_get_coresight_platform_data(dev, np); + if (IS_ERR(pdata)) + return PTR_ERR(pdata); + adev->dev.platform_data = pdata; + } + + drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL); + if (!drvdata) + return -ENOMEM; + + drvdata->dev = &adev->dev; + dev_set_drvdata(dev, drvdata); + + /* Validity for the resource is already checked by the AMBA core */ + base = devm_ioremap_resource(dev, res); + if (IS_ERR(base)) + return PTR_ERR(base); + + drvdata->base = base; + + drvdata->clk = adev->pclk; + + desc = devm_kzalloc(dev, sizeof(*desc), GFP_KERNEL); + if (!desc) + return -ENOMEM; + + desc->type = CORESIGHT_DEV_TYPE_LINK; + desc->subtype.link_subtype = CORESIGHT_DEV_SUBTYPE_LINK_MERG; + desc->ops = &funnel_cs_ops; + desc->pdata = pdata; + desc->dev = dev; + desc->groups = coresight_funnel_groups; + drvdata->csdev = coresight_register(desc); + if (IS_ERR(drvdata->csdev)) + return PTR_ERR(drvdata->csdev); + + dev_info(dev, "FUNNEL initialized\n"); + return 0; +} + +static int funnel_remove(struct amba_device *adev) +{ + struct funnel_drvdata *drvdata = amba_get_drvdata(adev); + + coresight_unregister(drvdata->csdev); + return 0; +} + +static struct amba_id funnel_ids[] = { + { + .id = 0x0003b908, + .mask = 0x0003ffff, + }, + { 0, 0}, +}; + +static struct amba_driver funnel_driver = { + .drv = { + .name = "coresight-funnel", + .owner = THIS_MODULE, + }, + .probe = funnel_probe, + .remove = funnel_remove, + .id_table = funnel_ids, +}; + +module_amba_driver(funnel_driver); + +MODULE_LICENSE("GPL v2"); +MODULE_DESCRIPTION("CoreSight Funnel driver"); diff --git a/drivers/hwtracing/coresight/coresight-priv.h b/drivers/hwtracing/coresight/coresight-priv.h new file mode 100644 index 000000000000..62fcd98cc7cf --- /dev/null +++ b/drivers/hwtracing/coresight/coresight-priv.h @@ -0,0 +1,63 @@ +/* Copyright (c) 2011-2012, The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef _CORESIGHT_PRIV_H +#define _CORESIGHT_PRIV_H + +#include +#include +#include + +/* + * Coresight management registers (0xf00-0xfcc) + * 0xfa0 - 0xfa4: Management registers in PFTv1.0 + * Trace registers in PFTv1.1 + */ +#define CORESIGHT_ITCTRL 0xf00 +#define CORESIGHT_CLAIMSET 0xfa0 +#define CORESIGHT_CLAIMCLR 0xfa4 +#define CORESIGHT_LAR 0xfb0 +#define CORESIGHT_LSR 0xfb4 +#define CORESIGHT_AUTHSTATUS 0xfb8 +#define CORESIGHT_DEVID 0xfc8 +#define CORESIGHT_DEVTYPE 0xfcc + +#define TIMEOUT_US 100 +#define BMVAL(val, lsb, msb) ((val & GENMASK(msb, lsb)) >> lsb) + +static inline void CS_LOCK(void __iomem *addr) +{ + do { + /* Wait for things to settle */ + mb(); + writel_relaxed(0x0, addr + CORESIGHT_LAR); + } while (0); +} + +static inline void CS_UNLOCK(void __iomem *addr) +{ + do { + writel_relaxed(CORESIGHT_UNLOCK, addr + CORESIGHT_LAR); + /* Make sure everyone has seen this */ + mb(); + } while (0); +} + +#ifdef CONFIG_CORESIGHT_SOURCE_ETM3X +extern int etm_readl_cp14(u32 off, unsigned int *val); +extern int etm_writel_cp14(u32 off, u32 val); +#else +static inline int etm_readl_cp14(u32 off, unsigned int *val) { return 0; } +static inline int etm_writel_cp14(u32 off, u32 val) { return 0; } +#endif + +#endif diff --git a/drivers/hwtracing/coresight/coresight-replicator.c b/drivers/hwtracing/coresight/coresight-replicator.c new file mode 100644 index 000000000000..75b9abd804e6 --- /dev/null +++ b/drivers/hwtracing/coresight/coresight-replicator.c @@ -0,0 +1,137 @@ +/* Copyright (c) 2011-2012, The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "coresight-priv.h" + +/** + * struct replicator_drvdata - specifics associated to a replicator component + * @dev: the device entity associated with this component + * @csdev: component vitals needed by the framework + */ +struct replicator_drvdata { + struct device *dev; + struct coresight_device *csdev; +}; + +static int replicator_enable(struct coresight_device *csdev, int inport, + int outport) +{ + struct replicator_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); + + dev_info(drvdata->dev, "REPLICATOR enabled\n"); + return 0; +} + +static void replicator_disable(struct coresight_device *csdev, int inport, + int outport) +{ + struct replicator_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); + + dev_info(drvdata->dev, "REPLICATOR disabled\n"); +} + +static const struct coresight_ops_link replicator_link_ops = { + .enable = replicator_enable, + .disable = replicator_disable, +}; + +static const struct coresight_ops replicator_cs_ops = { + .link_ops = &replicator_link_ops, +}; + +static int replicator_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct coresight_platform_data *pdata = NULL; + struct replicator_drvdata *drvdata; + struct coresight_desc *desc; + struct device_node *np = pdev->dev.of_node; + + if (np) { + pdata = of_get_coresight_platform_data(dev, np); + if (IS_ERR(pdata)) + return PTR_ERR(pdata); + pdev->dev.platform_data = pdata; + } + + drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL); + if (!drvdata) + return -ENOMEM; + + drvdata->dev = &pdev->dev; + platform_set_drvdata(pdev, drvdata); + + desc = devm_kzalloc(dev, sizeof(*desc), GFP_KERNEL); + if (!desc) + return -ENOMEM; + + desc->type = CORESIGHT_DEV_TYPE_LINK; + desc->subtype.link_subtype = CORESIGHT_DEV_SUBTYPE_LINK_SPLIT; + desc->ops = &replicator_cs_ops; + desc->pdata = pdev->dev.platform_data; + desc->dev = &pdev->dev; + drvdata->csdev = coresight_register(desc); + if (IS_ERR(drvdata->csdev)) + return PTR_ERR(drvdata->csdev); + + dev_info(dev, "REPLICATOR initialized\n"); + return 0; +} + +static int replicator_remove(struct platform_device *pdev) +{ + struct replicator_drvdata *drvdata = platform_get_drvdata(pdev); + + coresight_unregister(drvdata->csdev); + return 0; +} + +static const struct of_device_id replicator_match[] = { + {.compatible = "arm,coresight-replicator"}, + {} +}; + +static struct platform_driver replicator_driver = { + .probe = replicator_probe, + .remove = replicator_remove, + .driver = { + .name = "coresight-replicator", + .of_match_table = replicator_match, + }, +}; + +static int __init replicator_init(void) +{ + return platform_driver_register(&replicator_driver); +} +module_init(replicator_init); + +static void __exit replicator_exit(void) +{ + platform_driver_unregister(&replicator_driver); +} +module_exit(replicator_exit); + +MODULE_LICENSE("GPL v2"); +MODULE_DESCRIPTION("CoreSight Replicator driver"); diff --git a/drivers/hwtracing/coresight/coresight-tmc.c b/drivers/hwtracing/coresight/coresight-tmc.c new file mode 100644 index 000000000000..7147f3dd363c --- /dev/null +++ b/drivers/hwtracing/coresight/coresight-tmc.c @@ -0,0 +1,822 @@ +/* Copyright (c) 2012, The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "coresight-priv.h" + +#define TMC_RSZ 0x004 +#define TMC_STS 0x00c +#define TMC_RRD 0x010 +#define TMC_RRP 0x014 +#define TMC_RWP 0x018 +#define TMC_TRG 0x01c +#define TMC_CTL 0x020 +#define TMC_RWD 0x024 +#define TMC_MODE 0x028 +#define TMC_LBUFLEVEL 0x02c +#define TMC_CBUFLEVEL 0x030 +#define TMC_BUFWM 0x034 +#define TMC_RRPHI 0x038 +#define TMC_RWPHI 0x03c +#define TMC_AXICTL 0x110 +#define TMC_DBALO 0x118 +#define TMC_DBAHI 0x11c +#define TMC_FFSR 0x300 +#define TMC_FFCR 0x304 +#define TMC_PSCR 0x308 +#define TMC_ITMISCOP0 0xee0 +#define TMC_ITTRFLIN 0xee8 +#define TMC_ITATBDATA0 0xeec +#define TMC_ITATBCTR2 0xef0 +#define TMC_ITATBCTR1 0xef4 +#define TMC_ITATBCTR0 0xef8 + +/* register description */ +/* TMC_CTL - 0x020 */ +#define TMC_CTL_CAPT_EN BIT(0) +/* TMC_STS - 0x00C */ +#define TMC_STS_TRIGGERED BIT(1) +/* TMC_AXICTL - 0x110 */ +#define TMC_AXICTL_PROT_CTL_B0 BIT(0) +#define TMC_AXICTL_PROT_CTL_B1 BIT(1) +#define TMC_AXICTL_SCT_GAT_MODE BIT(7) +#define TMC_AXICTL_WR_BURST_LEN 0xF00 +/* TMC_FFCR - 0x304 */ +#define TMC_FFCR_EN_FMT BIT(0) +#define TMC_FFCR_EN_TI BIT(1) +#define TMC_FFCR_FON_FLIN BIT(4) +#define TMC_FFCR_FON_TRIG_EVT BIT(5) +#define TMC_FFCR_FLUSHMAN BIT(6) +#define TMC_FFCR_TRIGON_TRIGIN BIT(8) +#define TMC_FFCR_STOP_ON_FLUSH BIT(12) + +#define TMC_STS_TRIGGERED_BIT 2 +#define TMC_FFCR_FLUSHMAN_BIT 6 + +enum tmc_config_type { + TMC_CONFIG_TYPE_ETB, + TMC_CONFIG_TYPE_ETR, + TMC_CONFIG_TYPE_ETF, +}; + +enum tmc_mode { + TMC_MODE_CIRCULAR_BUFFER, + TMC_MODE_SOFTWARE_FIFO, + TMC_MODE_HARDWARE_FIFO, +}; + +enum tmc_mem_intf_width { + TMC_MEM_INTF_WIDTH_32BITS = 0x2, + TMC_MEM_INTF_WIDTH_64BITS = 0x3, + TMC_MEM_INTF_WIDTH_128BITS = 0x4, + TMC_MEM_INTF_WIDTH_256BITS = 0x5, +}; + +/** + * struct tmc_drvdata - specifics associated to an TMC component + * @base: memory mapped base address for this component. + * @dev: the device entity associated to this component. + * @csdev: component vitals needed by the framework. + * @miscdev: specifics to handle "/dev/xyz.tmc" entry. + * @clk: the clock this component is associated to. + * @spinlock: only one at a time pls. + * @read_count: manages preparation of buffer for reading. + * @buf: area of memory where trace data get sent. + * @paddr: DMA start location in RAM. + * @vaddr: virtual representation of @paddr. + * @size: @buf size. + * @enable: this TMC is being used. + * @config_type: TMC variant, must be of type @tmc_config_type. + * @trigger_cntr: amount of words to store after a trigger. + */ +struct tmc_drvdata { + void __iomem *base; + struct device *dev; + struct coresight_device *csdev; + struct miscdevice miscdev; + struct clk *clk; + spinlock_t spinlock; + int read_count; + bool reading; + char *buf; + dma_addr_t paddr; + void __iomem *vaddr; + u32 size; + bool enable; + enum tmc_config_type config_type; + u32 trigger_cntr; +}; + +static void tmc_wait_for_ready(struct tmc_drvdata *drvdata) +{ + /* Ensure formatter, unformatter and hardware fifo are empty */ + if (coresight_timeout(drvdata->base, + TMC_STS, TMC_STS_TRIGGERED_BIT, 1)) { + dev_err(drvdata->dev, + "timeout observed when probing at offset %#x\n", + TMC_STS); + } +} + +static void tmc_flush_and_stop(struct tmc_drvdata *drvdata) +{ + u32 ffcr; + + ffcr = readl_relaxed(drvdata->base + TMC_FFCR); + ffcr |= TMC_FFCR_STOP_ON_FLUSH; + writel_relaxed(ffcr, drvdata->base + TMC_FFCR); + ffcr |= TMC_FFCR_FLUSHMAN; + writel_relaxed(ffcr, drvdata->base + TMC_FFCR); + /* Ensure flush completes */ + if (coresight_timeout(drvdata->base, + TMC_FFCR, TMC_FFCR_FLUSHMAN_BIT, 0)) { + dev_err(drvdata->dev, + "timeout observed when probing at offset %#x\n", + TMC_FFCR); + } + + tmc_wait_for_ready(drvdata); +} + +static void tmc_enable_hw(struct tmc_drvdata *drvdata) +{ + writel_relaxed(TMC_CTL_CAPT_EN, drvdata->base + TMC_CTL); +} + +static void tmc_disable_hw(struct tmc_drvdata *drvdata) +{ + writel_relaxed(0x0, drvdata->base + TMC_CTL); +} + +static void tmc_etb_enable_hw(struct tmc_drvdata *drvdata) +{ + /* Zero out the memory to help with debug */ + memset(drvdata->buf, 0, drvdata->size); + + CS_UNLOCK(drvdata->base); + + writel_relaxed(TMC_MODE_CIRCULAR_BUFFER, drvdata->base + TMC_MODE); + writel_relaxed(TMC_FFCR_EN_FMT | TMC_FFCR_EN_TI | + TMC_FFCR_FON_FLIN | TMC_FFCR_FON_TRIG_EVT | + TMC_FFCR_TRIGON_TRIGIN, + drvdata->base + TMC_FFCR); + + writel_relaxed(drvdata->trigger_cntr, drvdata->base + TMC_TRG); + tmc_enable_hw(drvdata); + + CS_LOCK(drvdata->base); +} + +static void tmc_etr_enable_hw(struct tmc_drvdata *drvdata) +{ + u32 axictl; + + /* Zero out the memory to help with debug */ + memset(drvdata->vaddr, 0, drvdata->size); + + CS_UNLOCK(drvdata->base); + + writel_relaxed(drvdata->size / 4, drvdata->base + TMC_RSZ); + writel_relaxed(TMC_MODE_CIRCULAR_BUFFER, drvdata->base + TMC_MODE); + + axictl = readl_relaxed(drvdata->base + TMC_AXICTL); + axictl |= TMC_AXICTL_WR_BURST_LEN; + writel_relaxed(axictl, drvdata->base + TMC_AXICTL); + axictl &= ~TMC_AXICTL_SCT_GAT_MODE; + writel_relaxed(axictl, drvdata->base + TMC_AXICTL); + axictl = (axictl & + ~(TMC_AXICTL_PROT_CTL_B0 | TMC_AXICTL_PROT_CTL_B1)) | + TMC_AXICTL_PROT_CTL_B1; + writel_relaxed(axictl, drvdata->base + TMC_AXICTL); + + writel_relaxed(drvdata->paddr, drvdata->base + TMC_DBALO); + writel_relaxed(0x0, drvdata->base + TMC_DBAHI); + writel_relaxed(TMC_FFCR_EN_FMT | TMC_FFCR_EN_TI | + TMC_FFCR_FON_FLIN | TMC_FFCR_FON_TRIG_EVT | + TMC_FFCR_TRIGON_TRIGIN, + drvdata->base + TMC_FFCR); + writel_relaxed(drvdata->trigger_cntr, drvdata->base + TMC_TRG); + tmc_enable_hw(drvdata); + + CS_LOCK(drvdata->base); +} + +static void tmc_etf_enable_hw(struct tmc_drvdata *drvdata) +{ + CS_UNLOCK(drvdata->base); + + writel_relaxed(TMC_MODE_HARDWARE_FIFO, drvdata->base + TMC_MODE); + writel_relaxed(TMC_FFCR_EN_FMT | TMC_FFCR_EN_TI, + drvdata->base + TMC_FFCR); + writel_relaxed(0x0, drvdata->base + TMC_BUFWM); + tmc_enable_hw(drvdata); + + CS_LOCK(drvdata->base); +} + +static int tmc_enable(struct tmc_drvdata *drvdata, enum tmc_mode mode) +{ + int ret; + unsigned long flags; + + ret = clk_prepare_enable(drvdata->clk); + if (ret) + return ret; + + spin_lock_irqsave(&drvdata->spinlock, flags); + if (drvdata->reading) { + spin_unlock_irqrestore(&drvdata->spinlock, flags); + clk_disable_unprepare(drvdata->clk); + return -EBUSY; + } + + if (drvdata->config_type == TMC_CONFIG_TYPE_ETB) { + tmc_etb_enable_hw(drvdata); + } else if (drvdata->config_type == TMC_CONFIG_TYPE_ETR) { + tmc_etr_enable_hw(drvdata); + } else { + if (mode == TMC_MODE_CIRCULAR_BUFFER) + tmc_etb_enable_hw(drvdata); + else + tmc_etf_enable_hw(drvdata); + } + drvdata->enable = true; + spin_unlock_irqrestore(&drvdata->spinlock, flags); + + dev_info(drvdata->dev, "TMC enabled\n"); + return 0; +} + +static int tmc_enable_sink(struct coresight_device *csdev) +{ + struct tmc_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); + + return tmc_enable(drvdata, TMC_MODE_CIRCULAR_BUFFER); +} + +static int tmc_enable_link(struct coresight_device *csdev, int inport, + int outport) +{ + struct tmc_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); + + return tmc_enable(drvdata, TMC_MODE_HARDWARE_FIFO); +} + +static void tmc_etb_dump_hw(struct tmc_drvdata *drvdata) +{ + enum tmc_mem_intf_width memwidth; + u8 memwords; + char *bufp; + u32 read_data; + int i; + + memwidth = BMVAL(readl_relaxed(drvdata->base + CORESIGHT_DEVID), 8, 10); + if (memwidth == TMC_MEM_INTF_WIDTH_32BITS) + memwords = 1; + else if (memwidth == TMC_MEM_INTF_WIDTH_64BITS) + memwords = 2; + else if (memwidth == TMC_MEM_INTF_WIDTH_128BITS) + memwords = 4; + else + memwords = 8; + + bufp = drvdata->buf; + while (1) { + for (i = 0; i < memwords; i++) { + read_data = readl_relaxed(drvdata->base + TMC_RRD); + if (read_data == 0xFFFFFFFF) + return; + memcpy(bufp, &read_data, 4); + bufp += 4; + } + } +} + +static void tmc_etb_disable_hw(struct tmc_drvdata *drvdata) +{ + CS_UNLOCK(drvdata->base); + + tmc_flush_and_stop(drvdata); + tmc_etb_dump_hw(drvdata); + tmc_disable_hw(drvdata); + + CS_LOCK(drvdata->base); +} + +static void tmc_etr_dump_hw(struct tmc_drvdata *drvdata) +{ + u32 rwp, val; + + rwp = readl_relaxed(drvdata->base + TMC_RWP); + val = readl_relaxed(drvdata->base + TMC_STS); + + /* How much memory do we still have */ + if (val & BIT(0)) + drvdata->buf = drvdata->vaddr + rwp - drvdata->paddr; + else + drvdata->buf = drvdata->vaddr; +} + +static void tmc_etr_disable_hw(struct tmc_drvdata *drvdata) +{ + CS_UNLOCK(drvdata->base); + + tmc_flush_and_stop(drvdata); + tmc_etr_dump_hw(drvdata); + tmc_disable_hw(drvdata); + + CS_LOCK(drvdata->base); +} + +static void tmc_etf_disable_hw(struct tmc_drvdata *drvdata) +{ + CS_UNLOCK(drvdata->base); + + tmc_flush_and_stop(drvdata); + tmc_disable_hw(drvdata); + + CS_LOCK(drvdata->base); +} + +static void tmc_disable(struct tmc_drvdata *drvdata, enum tmc_mode mode) +{ + unsigned long flags; + + spin_lock_irqsave(&drvdata->spinlock, flags); + if (drvdata->reading) + goto out; + + if (drvdata->config_type == TMC_CONFIG_TYPE_ETB) { + tmc_etb_disable_hw(drvdata); + } else if (drvdata->config_type == TMC_CONFIG_TYPE_ETR) { + tmc_etr_disable_hw(drvdata); + } else { + if (mode == TMC_MODE_CIRCULAR_BUFFER) + tmc_etb_disable_hw(drvdata); + else + tmc_etf_disable_hw(drvdata); + } +out: + drvdata->enable = false; + spin_unlock_irqrestore(&drvdata->spinlock, flags); + + clk_disable_unprepare(drvdata->clk); + + dev_info(drvdata->dev, "TMC disabled\n"); +} + +static void tmc_disable_sink(struct coresight_device *csdev) +{ + struct tmc_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); + + tmc_disable(drvdata, TMC_MODE_CIRCULAR_BUFFER); +} + +static void tmc_disable_link(struct coresight_device *csdev, int inport, + int outport) +{ + struct tmc_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); + + tmc_disable(drvdata, TMC_MODE_HARDWARE_FIFO); +} + +static const struct coresight_ops_sink tmc_sink_ops = { + .enable = tmc_enable_sink, + .disable = tmc_disable_sink, +}; + +static const struct coresight_ops_link tmc_link_ops = { + .enable = tmc_enable_link, + .disable = tmc_disable_link, +}; + +static const struct coresight_ops tmc_etb_cs_ops = { + .sink_ops = &tmc_sink_ops, +}; + +static const struct coresight_ops tmc_etr_cs_ops = { + .sink_ops = &tmc_sink_ops, +}; + +static const struct coresight_ops tmc_etf_cs_ops = { + .sink_ops = &tmc_sink_ops, + .link_ops = &tmc_link_ops, +}; + +static int tmc_read_prepare(struct tmc_drvdata *drvdata) +{ + int ret; + unsigned long flags; + enum tmc_mode mode; + + spin_lock_irqsave(&drvdata->spinlock, flags); + if (!drvdata->enable) + goto out; + + if (drvdata->config_type == TMC_CONFIG_TYPE_ETB) { + tmc_etb_disable_hw(drvdata); + } else if (drvdata->config_type == TMC_CONFIG_TYPE_ETR) { + tmc_etr_disable_hw(drvdata); + } else { + mode = readl_relaxed(drvdata->base + TMC_MODE); + if (mode == TMC_MODE_CIRCULAR_BUFFER) { + tmc_etb_disable_hw(drvdata); + } else { + ret = -ENODEV; + goto err; + } + } +out: + drvdata->reading = true; + spin_unlock_irqrestore(&drvdata->spinlock, flags); + + dev_info(drvdata->dev, "TMC read start\n"); + return 0; +err: + spin_unlock_irqrestore(&drvdata->spinlock, flags); + return ret; +} + +static void tmc_read_unprepare(struct tmc_drvdata *drvdata) +{ + unsigned long flags; + enum tmc_mode mode; + + spin_lock_irqsave(&drvdata->spinlock, flags); + if (!drvdata->enable) + goto out; + + if (drvdata->config_type == TMC_CONFIG_TYPE_ETB) { + tmc_etb_enable_hw(drvdata); + } else if (drvdata->config_type == TMC_CONFIG_TYPE_ETR) { + tmc_etr_enable_hw(drvdata); + } else { + mode = readl_relaxed(drvdata->base + TMC_MODE); + if (mode == TMC_MODE_CIRCULAR_BUFFER) + tmc_etb_enable_hw(drvdata); + } +out: + drvdata->reading = false; + spin_unlock_irqrestore(&drvdata->spinlock, flags); + + dev_info(drvdata->dev, "TMC read end\n"); +} + +static int tmc_open(struct inode *inode, struct file *file) +{ + struct tmc_drvdata *drvdata = container_of(file->private_data, + struct tmc_drvdata, miscdev); + int ret = 0; + + if (drvdata->read_count++) + goto out; + + ret = tmc_read_prepare(drvdata); + if (ret) + return ret; +out: + nonseekable_open(inode, file); + + dev_dbg(drvdata->dev, "%s: successfully opened\n", __func__); + return 0; +} + +static ssize_t tmc_read(struct file *file, char __user *data, size_t len, + loff_t *ppos) +{ + struct tmc_drvdata *drvdata = container_of(file->private_data, + struct tmc_drvdata, miscdev); + char *bufp = drvdata->buf + *ppos; + + if (*ppos + len > drvdata->size) + len = drvdata->size - *ppos; + + if (drvdata->config_type == TMC_CONFIG_TYPE_ETR) { + if (bufp == (char *)(drvdata->vaddr + drvdata->size)) + bufp = drvdata->vaddr; + else if (bufp > (char *)(drvdata->vaddr + drvdata->size)) + bufp -= drvdata->size; + if ((bufp + len) > (char *)(drvdata->vaddr + drvdata->size)) + len = (char *)(drvdata->vaddr + drvdata->size) - bufp; + } + + if (copy_to_user(data, bufp, len)) { + dev_dbg(drvdata->dev, "%s: copy_to_user failed\n", __func__); + return -EFAULT; + } + + *ppos += len; + + dev_dbg(drvdata->dev, "%s: %zu bytes copied, %d bytes left\n", + __func__, len, (int)(drvdata->size - *ppos)); + return len; +} + +static int tmc_release(struct inode *inode, struct file *file) +{ + struct tmc_drvdata *drvdata = container_of(file->private_data, + struct tmc_drvdata, miscdev); + + if (--drvdata->read_count) { + if (drvdata->read_count < 0) { + dev_err(drvdata->dev, "mismatched close\n"); + drvdata->read_count = 0; + } + goto out; + } + + tmc_read_unprepare(drvdata); +out: + dev_dbg(drvdata->dev, "%s: released\n", __func__); + return 0; +} + +static const struct file_operations tmc_fops = { + .owner = THIS_MODULE, + .open = tmc_open, + .read = tmc_read, + .release = tmc_release, + .llseek = no_llseek, +}; + +static ssize_t status_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + int ret; + unsigned long flags; + u32 tmc_rsz, tmc_sts, tmc_rrp, tmc_rwp, tmc_trg; + u32 tmc_ctl, tmc_ffsr, tmc_ffcr, tmc_mode, tmc_pscr; + u32 devid; + struct tmc_drvdata *drvdata = dev_get_drvdata(dev->parent); + + ret = clk_prepare_enable(drvdata->clk); + if (ret) + goto out; + + spin_lock_irqsave(&drvdata->spinlock, flags); + CS_UNLOCK(drvdata->base); + + tmc_rsz = readl_relaxed(drvdata->base + TMC_RSZ); + tmc_sts = readl_relaxed(drvdata->base + TMC_STS); + tmc_rrp = readl_relaxed(drvdata->base + TMC_RRP); + tmc_rwp = readl_relaxed(drvdata->base + TMC_RWP); + tmc_trg = readl_relaxed(drvdata->base + TMC_TRG); + tmc_ctl = readl_relaxed(drvdata->base + TMC_CTL); + tmc_ffsr = readl_relaxed(drvdata->base + TMC_FFSR); + tmc_ffcr = readl_relaxed(drvdata->base + TMC_FFCR); + tmc_mode = readl_relaxed(drvdata->base + TMC_MODE); + tmc_pscr = readl_relaxed(drvdata->base + TMC_PSCR); + devid = readl_relaxed(drvdata->base + CORESIGHT_DEVID); + + CS_LOCK(drvdata->base); + spin_unlock_irqrestore(&drvdata->spinlock, flags); + + clk_disable_unprepare(drvdata->clk); + + return sprintf(buf, + "Depth:\t\t0x%x\n" + "Status:\t\t0x%x\n" + "RAM read ptr:\t0x%x\n" + "RAM wrt ptr:\t0x%x\n" + "Trigger cnt:\t0x%x\n" + "Control:\t0x%x\n" + "Flush status:\t0x%x\n" + "Flush ctrl:\t0x%x\n" + "Mode:\t\t0x%x\n" + "PSRC:\t\t0x%x\n" + "DEVID:\t\t0x%x\n", + tmc_rsz, tmc_sts, tmc_rrp, tmc_rwp, tmc_trg, + tmc_ctl, tmc_ffsr, tmc_ffcr, tmc_mode, tmc_pscr, devid); +out: + return -EINVAL; +} +static DEVICE_ATTR_RO(status); + +static ssize_t trigger_cntr_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct tmc_drvdata *drvdata = dev_get_drvdata(dev->parent); + unsigned long val = drvdata->trigger_cntr; + + return sprintf(buf, "%#lx\n", val); +} + +static ssize_t trigger_cntr_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t size) +{ + int ret; + unsigned long val; + struct tmc_drvdata *drvdata = dev_get_drvdata(dev->parent); + + ret = kstrtoul(buf, 16, &val); + if (ret) + return ret; + + drvdata->trigger_cntr = val; + return size; +} +static DEVICE_ATTR_RW(trigger_cntr); + +static struct attribute *coresight_etb_attrs[] = { + &dev_attr_trigger_cntr.attr, + &dev_attr_status.attr, + NULL, +}; +ATTRIBUTE_GROUPS(coresight_etb); + +static struct attribute *coresight_etr_attrs[] = { + &dev_attr_trigger_cntr.attr, + &dev_attr_status.attr, + NULL, +}; +ATTRIBUTE_GROUPS(coresight_etr); + +static struct attribute *coresight_etf_attrs[] = { + &dev_attr_trigger_cntr.attr, + &dev_attr_status.attr, + NULL, +}; +ATTRIBUTE_GROUPS(coresight_etf); + +static int tmc_probe(struct amba_device *adev, const struct amba_id *id) +{ + int ret = 0; + u32 devid; + void __iomem *base; + struct device *dev = &adev->dev; + struct coresight_platform_data *pdata = NULL; + struct tmc_drvdata *drvdata; + struct resource *res = &adev->res; + struct coresight_desc *desc; + struct device_node *np = adev->dev.of_node; + + if (np) { + pdata = of_get_coresight_platform_data(dev, np); + if (IS_ERR(pdata)) + return PTR_ERR(pdata); + adev->dev.platform_data = pdata; + } + + drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL); + if (!drvdata) + return -ENOMEM; + + drvdata->dev = &adev->dev; + dev_set_drvdata(dev, drvdata); + + /* Validity for the resource is already checked by the AMBA core */ + base = devm_ioremap_resource(dev, res); + if (IS_ERR(base)) + return PTR_ERR(base); + + drvdata->base = base; + + spin_lock_init(&drvdata->spinlock); + + drvdata->clk = adev->pclk; + ret = clk_prepare_enable(drvdata->clk); + if (ret) + return ret; + + devid = readl_relaxed(drvdata->base + CORESIGHT_DEVID); + drvdata->config_type = BMVAL(devid, 6, 7); + + if (drvdata->config_type == TMC_CONFIG_TYPE_ETR) { + if (np) + ret = of_property_read_u32(np, + "arm,buffer-size", + &drvdata->size); + if (ret) + drvdata->size = SZ_1M; + } else { + drvdata->size = readl_relaxed(drvdata->base + TMC_RSZ) * 4; + } + + clk_disable_unprepare(drvdata->clk); + + if (drvdata->config_type == TMC_CONFIG_TYPE_ETR) { + drvdata->vaddr = dma_alloc_coherent(dev, drvdata->size, + &drvdata->paddr, GFP_KERNEL); + if (!drvdata->vaddr) + return -ENOMEM; + + memset(drvdata->vaddr, 0, drvdata->size); + drvdata->buf = drvdata->vaddr; + } else { + drvdata->buf = devm_kzalloc(dev, drvdata->size, GFP_KERNEL); + if (!drvdata->buf) + return -ENOMEM; + } + + desc = devm_kzalloc(dev, sizeof(*desc), GFP_KERNEL); + if (!desc) { + ret = -ENOMEM; + goto err_devm_kzalloc; + } + + desc->pdata = pdata; + desc->dev = dev; + desc->subtype.sink_subtype = CORESIGHT_DEV_SUBTYPE_SINK_BUFFER; + + if (drvdata->config_type == TMC_CONFIG_TYPE_ETB) { + desc->type = CORESIGHT_DEV_TYPE_SINK; + desc->ops = &tmc_etb_cs_ops; + desc->groups = coresight_etb_groups; + } else if (drvdata->config_type == TMC_CONFIG_TYPE_ETR) { + desc->type = CORESIGHT_DEV_TYPE_SINK; + desc->ops = &tmc_etr_cs_ops; + desc->groups = coresight_etr_groups; + } else { + desc->type = CORESIGHT_DEV_TYPE_LINKSINK; + desc->subtype.link_subtype = CORESIGHT_DEV_SUBTYPE_LINK_FIFO; + desc->ops = &tmc_etf_cs_ops; + desc->groups = coresight_etf_groups; + } + + drvdata->csdev = coresight_register(desc); + if (IS_ERR(drvdata->csdev)) { + ret = PTR_ERR(drvdata->csdev); + goto err_devm_kzalloc; + } + + drvdata->miscdev.name = pdata->name; + drvdata->miscdev.minor = MISC_DYNAMIC_MINOR; + drvdata->miscdev.fops = &tmc_fops; + ret = misc_register(&drvdata->miscdev); + if (ret) + goto err_misc_register; + + dev_info(dev, "TMC initialized\n"); + return 0; + +err_misc_register: + coresight_unregister(drvdata->csdev); +err_devm_kzalloc: + if (drvdata->config_type == TMC_CONFIG_TYPE_ETR) + dma_free_coherent(dev, drvdata->size, + &drvdata->paddr, GFP_KERNEL); + return ret; +} + +static int tmc_remove(struct amba_device *adev) +{ + struct tmc_drvdata *drvdata = amba_get_drvdata(adev); + + misc_deregister(&drvdata->miscdev); + coresight_unregister(drvdata->csdev); + if (drvdata->config_type == TMC_CONFIG_TYPE_ETR) + dma_free_coherent(drvdata->dev, drvdata->size, + &drvdata->paddr, GFP_KERNEL); + + return 0; +} + +static struct amba_id tmc_ids[] = { + { + .id = 0x0003b961, + .mask = 0x0003ffff, + }, + { 0, 0}, +}; + +static struct amba_driver tmc_driver = { + .drv = { + .name = "coresight-tmc", + .owner = THIS_MODULE, + }, + .probe = tmc_probe, + .remove = tmc_remove, + .id_table = tmc_ids, +}; + +module_amba_driver(tmc_driver); + +MODULE_LICENSE("GPL v2"); +MODULE_DESCRIPTION("CoreSight Trace Memory Controller driver"); diff --git a/drivers/hwtracing/coresight/coresight-tpiu.c b/drivers/hwtracing/coresight/coresight-tpiu.c new file mode 100644 index 000000000000..3b33af2416bb --- /dev/null +++ b/drivers/hwtracing/coresight/coresight-tpiu.c @@ -0,0 +1,207 @@ +/* Copyright (c) 2011-2012, The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "coresight-priv.h" + +#define TPIU_SUPP_PORTSZ 0x000 +#define TPIU_CURR_PORTSZ 0x004 +#define TPIU_SUPP_TRIGMODES 0x100 +#define TPIU_TRIG_CNTRVAL 0x104 +#define TPIU_TRIG_MULT 0x108 +#define TPIU_SUPP_TESTPATM 0x200 +#define TPIU_CURR_TESTPATM 0x204 +#define TPIU_TEST_PATREPCNTR 0x208 +#define TPIU_FFSR 0x300 +#define TPIU_FFCR 0x304 +#define TPIU_FSYNC_CNTR 0x308 +#define TPIU_EXTCTL_INPORT 0x400 +#define TPIU_EXTCTL_OUTPORT 0x404 +#define TPIU_ITTRFLINACK 0xee4 +#define TPIU_ITTRFLIN 0xee8 +#define TPIU_ITATBDATA0 0xeec +#define TPIU_ITATBCTR2 0xef0 +#define TPIU_ITATBCTR1 0xef4 +#define TPIU_ITATBCTR0 0xef8 + +/** register definition **/ +/* FFCR - 0x304 */ +#define FFCR_FON_MAN BIT(6) + +/** + * @base: memory mapped base address for this component. + * @dev: the device entity associated to this component. + * @csdev: component vitals needed by the framework. + * @clk: the clock this component is associated to. + */ +struct tpiu_drvdata { + void __iomem *base; + struct device *dev; + struct coresight_device *csdev; + struct clk *clk; +}; + +static void tpiu_enable_hw(struct tpiu_drvdata *drvdata) +{ + CS_UNLOCK(drvdata->base); + + /* TODO: fill this up */ + + CS_LOCK(drvdata->base); +} + +static int tpiu_enable(struct coresight_device *csdev) +{ + struct tpiu_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); + int ret; + + ret = clk_prepare_enable(drvdata->clk); + if (ret) + return ret; + + tpiu_enable_hw(drvdata); + + dev_info(drvdata->dev, "TPIU enabled\n"); + return 0; +} + +static void tpiu_disable_hw(struct tpiu_drvdata *drvdata) +{ + CS_UNLOCK(drvdata->base); + + /* Clear formatter controle reg. */ + writel_relaxed(0x0, drvdata->base + TPIU_FFCR); + /* Generate manual flush */ + writel_relaxed(FFCR_FON_MAN, drvdata->base + TPIU_FFCR); + + CS_LOCK(drvdata->base); +} + +static void tpiu_disable(struct coresight_device *csdev) +{ + struct tpiu_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); + + tpiu_disable_hw(drvdata); + + clk_disable_unprepare(drvdata->clk); + + dev_info(drvdata->dev, "TPIU disabled\n"); +} + +static const struct coresight_ops_sink tpiu_sink_ops = { + .enable = tpiu_enable, + .disable = tpiu_disable, +}; + +static const struct coresight_ops tpiu_cs_ops = { + .sink_ops = &tpiu_sink_ops, +}; + +static int tpiu_probe(struct amba_device *adev, const struct amba_id *id) +{ + int ret; + void __iomem *base; + struct device *dev = &adev->dev; + struct coresight_platform_data *pdata = NULL; + struct tpiu_drvdata *drvdata; + struct resource *res = &adev->res; + struct coresight_desc *desc; + struct device_node *np = adev->dev.of_node; + + if (np) { + pdata = of_get_coresight_platform_data(dev, np); + if (IS_ERR(pdata)) + return PTR_ERR(pdata); + adev->dev.platform_data = pdata; + } + + drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL); + if (!drvdata) + return -ENOMEM; + + drvdata->dev = &adev->dev; + dev_set_drvdata(dev, drvdata); + + /* Validity for the resource is already checked by the AMBA core */ + base = devm_ioremap_resource(dev, res); + if (IS_ERR(base)) + return PTR_ERR(base); + + drvdata->base = base; + + drvdata->clk = adev->pclk; + ret = clk_prepare_enable(drvdata->clk); + if (ret) + return ret; + + /* Disable tpiu to support older devices */ + tpiu_disable_hw(drvdata); + + clk_disable_unprepare(drvdata->clk); + + desc = devm_kzalloc(dev, sizeof(*desc), GFP_KERNEL); + if (!desc) + return -ENOMEM; + + desc->type = CORESIGHT_DEV_TYPE_SINK; + desc->subtype.sink_subtype = CORESIGHT_DEV_SUBTYPE_SINK_PORT; + desc->ops = &tpiu_cs_ops; + desc->pdata = pdata; + desc->dev = dev; + drvdata->csdev = coresight_register(desc); + if (IS_ERR(drvdata->csdev)) + return PTR_ERR(drvdata->csdev); + + dev_info(dev, "TPIU initialized\n"); + return 0; +} + +static int tpiu_remove(struct amba_device *adev) +{ + struct tpiu_drvdata *drvdata = amba_get_drvdata(adev); + + coresight_unregister(drvdata->csdev); + return 0; +} + +static struct amba_id tpiu_ids[] = { + { + .id = 0x0003b912, + .mask = 0x0003ffff, + }, + { 0, 0}, +}; + +static struct amba_driver tpiu_driver = { + .drv = { + .name = "coresight-tpiu", + .owner = THIS_MODULE, + }, + .probe = tpiu_probe, + .remove = tpiu_remove, + .id_table = tpiu_ids, +}; + +module_amba_driver(tpiu_driver); + +MODULE_LICENSE("GPL v2"); +MODULE_DESCRIPTION("CoreSight Trace Port Interface Unit driver"); diff --git a/drivers/hwtracing/coresight/coresight.c b/drivers/hwtracing/coresight/coresight.c new file mode 100644 index 000000000000..894531d315b8 --- /dev/null +++ b/drivers/hwtracing/coresight/coresight.c @@ -0,0 +1,720 @@ +/* Copyright (c) 2012, The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "coresight-priv.h" + +static DEFINE_MUTEX(coresight_mutex); + +static int coresight_id_match(struct device *dev, void *data) +{ + int trace_id, i_trace_id; + struct coresight_device *csdev, *i_csdev; + + csdev = data; + i_csdev = to_coresight_device(dev); + + /* + * No need to care about oneself and components that are not + * sources or not enabled + */ + if (i_csdev == csdev || !i_csdev->enable || + i_csdev->type != CORESIGHT_DEV_TYPE_SOURCE) + return 0; + + /* Get the source ID for both compoment */ + trace_id = source_ops(csdev)->trace_id(csdev); + i_trace_id = source_ops(i_csdev)->trace_id(i_csdev); + + /* All you need is one */ + if (trace_id == i_trace_id) + return 1; + + return 0; +} + +static int coresight_source_is_unique(struct coresight_device *csdev) +{ + int trace_id = source_ops(csdev)->trace_id(csdev); + + /* this shouldn't happen */ + if (trace_id < 0) + return 0; + + return !bus_for_each_dev(&coresight_bustype, NULL, + csdev, coresight_id_match); +} + +static int coresight_find_link_inport(struct coresight_device *csdev) +{ + int i; + struct coresight_device *parent; + struct coresight_connection *conn; + + parent = container_of(csdev->path_link.next, + struct coresight_device, path_link); + + for (i = 0; i < parent->nr_outport; i++) { + conn = &parent->conns[i]; + if (conn->child_dev == csdev) + return conn->child_port; + } + + dev_err(&csdev->dev, "couldn't find inport, parent: %s, child: %s\n", + dev_name(&parent->dev), dev_name(&csdev->dev)); + + return 0; +} + +static int coresight_find_link_outport(struct coresight_device *csdev) +{ + int i; + struct coresight_device *child; + struct coresight_connection *conn; + + child = container_of(csdev->path_link.prev, + struct coresight_device, path_link); + + for (i = 0; i < csdev->nr_outport; i++) { + conn = &csdev->conns[i]; + if (conn->child_dev == child) + return conn->outport; + } + + dev_err(&csdev->dev, "couldn't find outport, parent: %s, child: %s\n", + dev_name(&csdev->dev), dev_name(&child->dev)); + + return 0; +} + +static int coresight_enable_sink(struct coresight_device *csdev) +{ + int ret; + + if (!csdev->enable) { + if (sink_ops(csdev)->enable) { + ret = sink_ops(csdev)->enable(csdev); + if (ret) + return ret; + } + csdev->enable = true; + } + + atomic_inc(csdev->refcnt); + + return 0; +} + +static void coresight_disable_sink(struct coresight_device *csdev) +{ + if (atomic_dec_return(csdev->refcnt) == 0) { + if (sink_ops(csdev)->disable) { + sink_ops(csdev)->disable(csdev); + csdev->enable = false; + } + } +} + +static int coresight_enable_link(struct coresight_device *csdev) +{ + int ret; + int link_subtype; + int refport, inport, outport; + + inport = coresight_find_link_inport(csdev); + outport = coresight_find_link_outport(csdev); + link_subtype = csdev->subtype.link_subtype; + + if (link_subtype == CORESIGHT_DEV_SUBTYPE_LINK_MERG) + refport = inport; + else if (link_subtype == CORESIGHT_DEV_SUBTYPE_LINK_SPLIT) + refport = outport; + else + refport = 0; + + if (atomic_inc_return(&csdev->refcnt[refport]) == 1) { + if (link_ops(csdev)->enable) { + ret = link_ops(csdev)->enable(csdev, inport, outport); + if (ret) + return ret; + } + } + + csdev->enable = true; + + return 0; +} + +static void coresight_disable_link(struct coresight_device *csdev) +{ + int i, nr_conns; + int link_subtype; + int refport, inport, outport; + + inport = coresight_find_link_inport(csdev); + outport = coresight_find_link_outport(csdev); + link_subtype = csdev->subtype.link_subtype; + + if (link_subtype == CORESIGHT_DEV_SUBTYPE_LINK_MERG) { + refport = inport; + nr_conns = csdev->nr_inport; + } else if (link_subtype == CORESIGHT_DEV_SUBTYPE_LINK_SPLIT) { + refport = outport; + nr_conns = csdev->nr_outport; + } else { + refport = 0; + nr_conns = 1; + } + + if (atomic_dec_return(&csdev->refcnt[refport]) == 0) { + if (link_ops(csdev)->disable) + link_ops(csdev)->disable(csdev, inport, outport); + } + + for (i = 0; i < nr_conns; i++) + if (atomic_read(&csdev->refcnt[i]) != 0) + return; + + csdev->enable = false; +} + +static int coresight_enable_source(struct coresight_device *csdev) +{ + int ret; + + if (!coresight_source_is_unique(csdev)) { + dev_warn(&csdev->dev, "traceID %d not unique\n", + source_ops(csdev)->trace_id(csdev)); + return -EINVAL; + } + + if (!csdev->enable) { + if (source_ops(csdev)->enable) { + ret = source_ops(csdev)->enable(csdev); + if (ret) + return ret; + } + csdev->enable = true; + } + + atomic_inc(csdev->refcnt); + + return 0; +} + +static void coresight_disable_source(struct coresight_device *csdev) +{ + if (atomic_dec_return(csdev->refcnt) == 0) { + if (source_ops(csdev)->disable) { + source_ops(csdev)->disable(csdev); + csdev->enable = false; + } + } +} + +static int coresight_enable_path(struct list_head *path) +{ + int ret = 0; + struct coresight_device *cd; + + list_for_each_entry(cd, path, path_link) { + if (cd == list_first_entry(path, struct coresight_device, + path_link)) { + ret = coresight_enable_sink(cd); + } else if (list_is_last(&cd->path_link, path)) { + /* + * Don't enable the source just yet - this needs to + * happen at the very end when all links and sink + * along the path have been configured properly. + */ + ; + } else { + ret = coresight_enable_link(cd); + } + if (ret) + goto err; + } + + return 0; +err: + list_for_each_entry_continue_reverse(cd, path, path_link) { + if (cd == list_first_entry(path, struct coresight_device, + path_link)) { + coresight_disable_sink(cd); + } else if (list_is_last(&cd->path_link, path)) { + ; + } else { + coresight_disable_link(cd); + } + } + + return ret; +} + +static int coresight_disable_path(struct list_head *path) +{ + struct coresight_device *cd; + + list_for_each_entry_reverse(cd, path, path_link) { + if (cd == list_first_entry(path, struct coresight_device, + path_link)) { + coresight_disable_sink(cd); + } else if (list_is_last(&cd->path_link, path)) { + /* + * The source has already been stopped, no need + * to do it again here. + */ + ; + } else { + coresight_disable_link(cd); + } + } + + return 0; +} + +static int coresight_build_paths(struct coresight_device *csdev, + struct list_head *path, + bool enable) +{ + int i, ret = -EINVAL; + struct coresight_connection *conn; + + list_add(&csdev->path_link, path); + + if ((csdev->type == CORESIGHT_DEV_TYPE_SINK || + csdev->type == CORESIGHT_DEV_TYPE_LINKSINK) && + csdev->activated) { + if (enable) + ret = coresight_enable_path(path); + else + ret = coresight_disable_path(path); + } else { + for (i = 0; i < csdev->nr_outport; i++) { + conn = &csdev->conns[i]; + if (coresight_build_paths(conn->child_dev, + path, enable) == 0) + ret = 0; + } + } + + if (list_first_entry(path, struct coresight_device, path_link) != csdev) + dev_err(&csdev->dev, "wrong device in %s\n", __func__); + + list_del(&csdev->path_link); + + return ret; +} + +int coresight_enable(struct coresight_device *csdev) +{ + int ret = 0; + LIST_HEAD(path); + + mutex_lock(&coresight_mutex); + if (csdev->type != CORESIGHT_DEV_TYPE_SOURCE) { + ret = -EINVAL; + dev_err(&csdev->dev, "wrong device type in %s\n", __func__); + goto out; + } + if (csdev->enable) + goto out; + + if (coresight_build_paths(csdev, &path, true)) { + dev_err(&csdev->dev, "building path(s) failed\n"); + goto out; + } + + if (coresight_enable_source(csdev)) + dev_err(&csdev->dev, "source enable failed\n"); +out: + mutex_unlock(&coresight_mutex); + return ret; +} +EXPORT_SYMBOL_GPL(coresight_enable); + +void coresight_disable(struct coresight_device *csdev) +{ + LIST_HEAD(path); + + mutex_lock(&coresight_mutex); + if (csdev->type != CORESIGHT_DEV_TYPE_SOURCE) { + dev_err(&csdev->dev, "wrong device type in %s\n", __func__); + goto out; + } + if (!csdev->enable) + goto out; + + coresight_disable_source(csdev); + if (coresight_build_paths(csdev, &path, false)) + dev_err(&csdev->dev, "releasing path(s) failed\n"); + +out: + mutex_unlock(&coresight_mutex); +} +EXPORT_SYMBOL_GPL(coresight_disable); + +static ssize_t enable_sink_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct coresight_device *csdev = to_coresight_device(dev); + + return scnprintf(buf, PAGE_SIZE, "%u\n", (unsigned)csdev->activated); +} + +static ssize_t enable_sink_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t size) +{ + int ret; + unsigned long val; + struct coresight_device *csdev = to_coresight_device(dev); + + ret = kstrtoul(buf, 10, &val); + if (ret) + return ret; + + if (val) + csdev->activated = true; + else + csdev->activated = false; + + return size; + +} +static DEVICE_ATTR_RW(enable_sink); + +static ssize_t enable_source_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct coresight_device *csdev = to_coresight_device(dev); + + return scnprintf(buf, PAGE_SIZE, "%u\n", (unsigned)csdev->enable); +} + +static ssize_t enable_source_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t size) +{ + int ret = 0; + unsigned long val; + struct coresight_device *csdev = to_coresight_device(dev); + + ret = kstrtoul(buf, 10, &val); + if (ret) + return ret; + + if (val) { + ret = coresight_enable(csdev); + if (ret) + return ret; + } else { + coresight_disable(csdev); + } + + return size; +} +static DEVICE_ATTR_RW(enable_source); + +static struct attribute *coresight_sink_attrs[] = { + &dev_attr_enable_sink.attr, + NULL, +}; +ATTRIBUTE_GROUPS(coresight_sink); + +static struct attribute *coresight_source_attrs[] = { + &dev_attr_enable_source.attr, + NULL, +}; +ATTRIBUTE_GROUPS(coresight_source); + +static struct device_type coresight_dev_type[] = { + { + .name = "none", + }, + { + .name = "sink", + .groups = coresight_sink_groups, + }, + { + .name = "link", + }, + { + .name = "linksink", + .groups = coresight_sink_groups, + }, + { + .name = "source", + .groups = coresight_source_groups, + }, +}; + +static void coresight_device_release(struct device *dev) +{ + struct coresight_device *csdev = to_coresight_device(dev); + + kfree(csdev); +} + +static int coresight_orphan_match(struct device *dev, void *data) +{ + int i; + bool still_orphan = false; + struct coresight_device *csdev, *i_csdev; + struct coresight_connection *conn; + + csdev = data; + i_csdev = to_coresight_device(dev); + + /* No need to check oneself */ + if (csdev == i_csdev) + return 0; + + /* Move on to another component if no connection is orphan */ + if (!i_csdev->orphan) + return 0; + /* + * Circle throuch all the connection of that component. If we find + * an orphan connection whose name matches @csdev, link it. + */ + for (i = 0; i < i_csdev->nr_outport; i++) { + conn = &i_csdev->conns[i]; + + /* We have found at least one orphan connection */ + if (conn->child_dev == NULL) { + /* Does it match this newly added device? */ + if (!strcmp(dev_name(&csdev->dev), conn->child_name)) { + conn->child_dev = csdev; + } else { + /* This component still has an orphan */ + still_orphan = true; + } + } + } + + i_csdev->orphan = still_orphan; + + /* + * Returning '0' ensures that all known component on the + * bus will be checked. + */ + return 0; +} + +static void coresight_fixup_orphan_conns(struct coresight_device *csdev) +{ + /* + * No need to check for a return value as orphan connection(s) + * are hooked-up with each newly added component. + */ + bus_for_each_dev(&coresight_bustype, NULL, + csdev, coresight_orphan_match); +} + + +static int coresight_name_match(struct device *dev, void *data) +{ + char *to_match; + struct coresight_device *i_csdev; + + to_match = data; + i_csdev = to_coresight_device(dev); + + if (!strcmp(to_match, dev_name(&i_csdev->dev))) + return 1; + + return 0; +} + +static void coresight_fixup_device_conns(struct coresight_device *csdev) +{ + int i; + struct device *dev = NULL; + struct coresight_connection *conn; + + for (i = 0; i < csdev->nr_outport; i++) { + conn = &csdev->conns[i]; + dev = bus_find_device(&coresight_bustype, NULL, + (void *)conn->child_name, + coresight_name_match); + + if (dev) { + conn->child_dev = to_coresight_device(dev); + } else { + csdev->orphan = true; + conn->child_dev = NULL; + } + } +} + +/** + * coresight_timeout - loop until a bit has changed to a specific state. + * @addr: base address of the area of interest. + * @offset: address of a register, starting from @addr. + * @position: the position of the bit of interest. + * @value: the value the bit should have. + * + * Return: 0 as soon as the bit has taken the desired state or -EAGAIN if + * TIMEOUT_US has elapsed, which ever happens first. + */ + +int coresight_timeout(void __iomem *addr, u32 offset, int position, int value) +{ + int i; + u32 val; + + for (i = TIMEOUT_US; i > 0; i--) { + val = __raw_readl(addr + offset); + /* waiting on the bit to go from 0 to 1 */ + if (value) { + if (val & BIT(position)) + return 0; + /* waiting on the bit to go from 1 to 0 */ + } else { + if (!(val & BIT(position))) + return 0; + } + + /* + * Delay is arbitrary - the specification doesn't say how long + * we are expected to wait. Extra check required to make sure + * we don't wait needlessly on the last iteration. + */ + if (i - 1) + udelay(1); + } + + return -EAGAIN; +} + +struct bus_type coresight_bustype = { + .name = "coresight", +}; + +static int __init coresight_init(void) +{ + return bus_register(&coresight_bustype); +} +postcore_initcall(coresight_init); + +struct coresight_device *coresight_register(struct coresight_desc *desc) +{ + int i; + int ret; + int link_subtype; + int nr_refcnts = 1; + atomic_t *refcnts = NULL; + struct coresight_device *csdev; + struct coresight_connection *conns; + + csdev = kzalloc(sizeof(*csdev), GFP_KERNEL); + if (!csdev) { + ret = -ENOMEM; + goto err_kzalloc_csdev; + } + + if (desc->type == CORESIGHT_DEV_TYPE_LINK || + desc->type == CORESIGHT_DEV_TYPE_LINKSINK) { + link_subtype = desc->subtype.link_subtype; + + if (link_subtype == CORESIGHT_DEV_SUBTYPE_LINK_MERG) + nr_refcnts = desc->pdata->nr_inport; + else if (link_subtype == CORESIGHT_DEV_SUBTYPE_LINK_SPLIT) + nr_refcnts = desc->pdata->nr_outport; + } + + refcnts = kcalloc(nr_refcnts, sizeof(*refcnts), GFP_KERNEL); + if (!refcnts) { + ret = -ENOMEM; + goto err_kzalloc_refcnts; + } + + csdev->refcnt = refcnts; + + csdev->nr_inport = desc->pdata->nr_inport; + csdev->nr_outport = desc->pdata->nr_outport; + conns = kcalloc(csdev->nr_outport, sizeof(*conns), GFP_KERNEL); + if (!conns) { + ret = -ENOMEM; + goto err_kzalloc_conns; + } + + for (i = 0; i < csdev->nr_outport; i++) { + conns[i].outport = desc->pdata->outports[i]; + conns[i].child_name = desc->pdata->child_names[i]; + conns[i].child_port = desc->pdata->child_ports[i]; + } + + csdev->conns = conns; + + csdev->type = desc->type; + csdev->subtype = desc->subtype; + csdev->ops = desc->ops; + csdev->orphan = false; + + csdev->dev.type = &coresight_dev_type[desc->type]; + csdev->dev.groups = desc->groups; + csdev->dev.parent = desc->dev; + csdev->dev.release = coresight_device_release; + csdev->dev.bus = &coresight_bustype; + dev_set_name(&csdev->dev, "%s", desc->pdata->name); + + ret = device_register(&csdev->dev); + if (ret) + goto err_device_register; + + mutex_lock(&coresight_mutex); + + coresight_fixup_device_conns(csdev); + coresight_fixup_orphan_conns(csdev); + + mutex_unlock(&coresight_mutex); + + return csdev; + +err_device_register: + kfree(conns); +err_kzalloc_conns: + kfree(refcnts); +err_kzalloc_refcnts: + kfree(csdev); +err_kzalloc_csdev: + return ERR_PTR(ret); +} +EXPORT_SYMBOL_GPL(coresight_register); + +void coresight_unregister(struct coresight_device *csdev) +{ + mutex_lock(&coresight_mutex); + + kfree(csdev->conns); + device_unregister(&csdev->dev); + + mutex_unlock(&coresight_mutex); +} +EXPORT_SYMBOL_GPL(coresight_unregister); + +MODULE_LICENSE("GPL v2"); diff --git a/drivers/hwtracing/coresight/of_coresight.c b/drivers/hwtracing/coresight/of_coresight.c new file mode 100644 index 000000000000..f3cc8e97a0f8 --- /dev/null +++ b/drivers/hwtracing/coresight/of_coresight.c @@ -0,0 +1,200 @@ +/* Copyright (c) 2012, The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + + +static int of_dev_node_match(struct device *dev, void *data) +{ + return dev->of_node == data; +} + +static struct device * +of_coresight_get_endpoint_device(struct device_node *endpoint) +{ + struct device *dev = NULL; + + /* + * If we have a non-configuable replicator, it will be found on the + * platform bus. + */ + dev = bus_find_device(&platform_bus_type, NULL, + endpoint, of_dev_node_match); + if (dev) + return dev; + + /* + * We have a configurable component - circle through the AMBA bus + * looking for the device that matches the endpoint node. + */ + return bus_find_device(&amba_bustype, NULL, + endpoint, of_dev_node_match); +} + +static struct device_node *of_get_coresight_endpoint( + const struct device_node *parent, struct device_node *prev) +{ + struct device_node *node = of_graph_get_next_endpoint(parent, prev); + + of_node_put(prev); + return node; +} + +static void of_coresight_get_ports(struct device_node *node, + int *nr_inport, int *nr_outport) +{ + struct device_node *ep = NULL; + int in = 0, out = 0; + + do { + ep = of_get_coresight_endpoint(node, ep); + if (!ep) + break; + + if (of_property_read_bool(ep, "slave-mode")) + in++; + else + out++; + + } while (ep); + + *nr_inport = in; + *nr_outport = out; +} + +static int of_coresight_alloc_memory(struct device *dev, + struct coresight_platform_data *pdata) +{ + /* List of output port on this component */ + pdata->outports = devm_kzalloc(dev, pdata->nr_outport * + sizeof(*pdata->outports), + GFP_KERNEL); + if (!pdata->outports) + return -ENOMEM; + + /* Children connected to this component via @outports */ + pdata->child_names = devm_kzalloc(dev, pdata->nr_outport * + sizeof(*pdata->child_names), + GFP_KERNEL); + if (!pdata->child_names) + return -ENOMEM; + + /* Port number on the child this component is connected to */ + pdata->child_ports = devm_kzalloc(dev, pdata->nr_outport * + sizeof(*pdata->child_ports), + GFP_KERNEL); + if (!pdata->child_ports) + return -ENOMEM; + + return 0; +} + +struct coresight_platform_data *of_get_coresight_platform_data( + struct device *dev, struct device_node *node) +{ + int i = 0, ret = 0, cpu; + struct coresight_platform_data *pdata; + struct of_endpoint endpoint, rendpoint; + struct device *rdev; + struct device_node *dn; + struct device_node *ep = NULL; + struct device_node *rparent = NULL; + struct device_node *rport = NULL; + + pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL); + if (!pdata) + return ERR_PTR(-ENOMEM); + + /* Use device name as sysfs handle */ + pdata->name = dev_name(dev); + + /* Get the number of input and output port for this component */ + of_coresight_get_ports(node, &pdata->nr_inport, &pdata->nr_outport); + + if (pdata->nr_outport) { + ret = of_coresight_alloc_memory(dev, pdata); + if (ret) + return ERR_PTR(ret); + + /* Iterate through each port to discover topology */ + do { + /* Get a handle on a port */ + ep = of_get_coresight_endpoint(node, ep); + if (!ep) + break; + + /* + * No need to deal with input ports, processing for as + * processing for output ports will deal with them. + */ + if (of_find_property(ep, "slave-mode", NULL)) + continue; + + /* Get a handle on the local endpoint */ + ret = of_graph_parse_endpoint(ep, &endpoint); + + if (ret) + continue; + + /* The local out port number */ + pdata->outports[i] = endpoint.id; + + /* + * Get a handle on the remote port and parent + * attached to it. + */ + rparent = of_graph_get_remote_port_parent(ep); + rport = of_graph_get_remote_port(ep); + + if (!rparent || !rport) + continue; + + if (of_graph_parse_endpoint(rport, &rendpoint)) + continue; + + rdev = of_coresight_get_endpoint_device(rparent); + if (!rdev) + continue; + + pdata->child_names[i] = dev_name(rdev); + pdata->child_ports[i] = rendpoint.id; + + i++; + } while (ep); + } + + /* Affinity defaults to CPU0 */ + pdata->cpu = 0; + dn = of_parse_phandle(node, "cpu", 0); + for (cpu = 0; dn && cpu < nr_cpu_ids; cpu++) { + if (dn == of_get_cpu_node(cpu, NULL)) { + pdata->cpu = cpu; + break; + } + } + + return pdata; +} +EXPORT_SYMBOL_GPL(of_get_coresight_platform_data); -- cgit v1.2.3 From cdbff611940882b36d6964ced177bc167012f5c0 Mon Sep 17 00:00:00 2001 From: Pali Rohár Date: Sun, 29 Mar 2015 15:38:50 +0200 Subject: MAINTAINERS: Add me on list of Dell laptop drivers MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit I have written many parts of dell laptop drivers dell-laptop.c, dell-wmi.c and dell-smo8800.c Signed-off-by: Pali Rohár Signed-off-by: Darren Hart --- MAINTAINERS | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'MAINTAINERS') diff --git a/MAINTAINERS b/MAINTAINERS index 507c0e3c36a8..c2b883fdccf2 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -3047,10 +3047,16 @@ F: drivers/net/fddi/defxx.* DELL LAPTOP DRIVER M: Matthew Garrett +M: Pali Rohár L: platform-driver-x86@vger.kernel.org S: Maintained F: drivers/platform/x86/dell-laptop.c +DELL LAPTOP FREEFALL DRIVER +M: Pali Rohár +S: Maintained +F: drivers/platform/x86/dell-smo8800.c + DELL LAPTOP SMM DRIVER M: Guenter Roeck S: Maintained @@ -3065,6 +3071,7 @@ F: drivers/firmware/dcdbas.* DELL WMI EXTRAS DRIVER M: Matthew Garrett +M: Pali Rohár S: Maintained F: drivers/platform/x86/dell-wmi.c -- cgit v1.2.3 From 0351b8f81392c6dbbbb036e5c8f73ceff68726e9 Mon Sep 17 00:00:00 2001 From: James Bottomley Date: Wed, 1 Apr 2015 09:09:36 +0000 Subject: change SCSI Maintainer email We've recently suffered a rebranding and the Service Provider half of Parallels has become Odin. This means my email has changed so update the MAINTAINERS file (and tidy up the pointers to our git trees to be correct). Signed-off-by: James Bottomley --- MAINTAINERS | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) (limited to 'MAINTAINERS') diff --git a/MAINTAINERS b/MAINTAINERS index eaf999638a65..cb6257636307 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -8585,11 +8585,9 @@ F: drivers/scsi/sg.c F: include/scsi/sg.h SCSI SUBSYSTEM -M: "James E.J. Bottomley" +M: "James E.J. Bottomley" L: linux-scsi@vger.kernel.org -T: git git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi-misc-2.6.git -T: git git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi-rc-fixes-2.6.git -T: git git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi-pending-2.6.git +T: git git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi.git S: Maintained F: drivers/scsi/ F: include/scsi/ -- cgit v1.2.3 From d2928a8c0db061939ea34ff3f53f36dcccdf5aa2 Mon Sep 17 00:00:00 2001 From: Selvin Xavier Date: Sun, 15 Mar 2015 00:09:41 +0530 Subject: MAINTAINERS: Adding list of maintainers for ocrdma Updating the MAINTAINERS file with ocrdma maintainers and their email ids Signed-off-by: Selvin Xavier Signed-off-by: Doug Ledford --- MAINTAINERS | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'MAINTAINERS') diff --git a/MAINTAINERS b/MAINTAINERS index c72a7baec55c..1b9e38d02318 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -8791,6 +8791,15 @@ W: http://www.emulex.com S: Supported F: drivers/net/ethernet/emulex/benet/ +EMULEX ONECONNECT ROCE DRIVER +M: Selvin Xavier +M: Devesh Sharma +M: Mitesh Ahuja +L: linux-rdma@vger.kernel.org +W: http://www.emulex.com +S: Supported +F: drivers/infiniband/hw/ocrdma/ + SFC NETWORK DRIVER M: Solarflare linux maintainers M: Shradha Shah -- cgit v1.2.3 From d02be50dba649b4246e0c1c4b7cb5d8a8d49de9a Mon Sep 17 00:00:00 2001 From: Minchan Kim Date: Wed, 15 Apr 2015 16:15:46 -0700 Subject: zsmalloc: zsmalloc documentation Create zsmalloc doc which explains design concept and stat information. Signed-off-by: Minchan Kim Cc: Juneho Choi Cc: Gunho Lee Cc: Luigi Semenzato Cc: Dan Streetman Cc: Seth Jennings Cc: Nitin Gupta Cc: Jerome Marchand Cc: Sergey Senozhatsky Cc: Joonsoo Kim Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- Documentation/vm/zsmalloc.txt | 70 +++++++++++++++++++++++++++++++++++++++++++ MAINTAINERS | 1 + mm/zsmalloc.c | 29 ------------------ 3 files changed, 71 insertions(+), 29 deletions(-) create mode 100644 Documentation/vm/zsmalloc.txt (limited to 'MAINTAINERS') diff --git a/Documentation/vm/zsmalloc.txt b/Documentation/vm/zsmalloc.txt new file mode 100644 index 000000000000..64ed63c4f69d --- /dev/null +++ b/Documentation/vm/zsmalloc.txt @@ -0,0 +1,70 @@ +zsmalloc +-------- + +This allocator is designed for use with zram. Thus, the allocator is +supposed to work well under low memory conditions. In particular, it +never attempts higher order page allocation which is very likely to +fail under memory pressure. On the other hand, if we just use single +(0-order) pages, it would suffer from very high fragmentation -- +any object of size PAGE_SIZE/2 or larger would occupy an entire page. +This was one of the major issues with its predecessor (xvmalloc). + +To overcome these issues, zsmalloc allocates a bunch of 0-order pages +and links them together using various 'struct page' fields. These linked +pages act as a single higher-order page i.e. an object can span 0-order +page boundaries. The code refers to these linked pages as a single entity +called zspage. + +For simplicity, zsmalloc can only allocate objects of size up to PAGE_SIZE +since this satisfies the requirements of all its current users (in the +worst case, page is incompressible and is thus stored "as-is" i.e. in +uncompressed form). For allocation requests larger than this size, failure +is returned (see zs_malloc). + +Additionally, zs_malloc() does not return a dereferenceable pointer. +Instead, it returns an opaque handle (unsigned long) which encodes actual +location of the allocated object. The reason for this indirection is that +zsmalloc does not keep zspages permanently mapped since that would cause +issues on 32-bit systems where the VA region for kernel space mappings +is very small. So, before using the allocating memory, the object has to +be mapped using zs_map_object() to get a usable pointer and subsequently +unmapped using zs_unmap_object(). + +stat +---- + +With CONFIG_ZSMALLOC_STAT, we could see zsmalloc internal information via +/sys/kernel/debug/zsmalloc/. Here is a sample of stat output: + +# cat /sys/kernel/debug/zsmalloc/zram0/classes + + class size almost_full almost_empty obj_allocated obj_used pages_used pages_per_zspage + .. + .. + 9 176 0 1 186 129 8 4 + 10 192 1 0 2880 2872 135 3 + 11 208 0 1 819 795 42 2 + 12 224 0 1 219 159 12 4 + .. + .. + + +class: index +size: object size zspage stores +almost_empty: the number of ZS_ALMOST_EMPTY zspages(see below) +almost_full: the number of ZS_ALMOST_FULL zspages(see below) +obj_allocated: the number of objects allocated +obj_used: the number of objects allocated to the user +pages_used: the number of pages allocated for the class +pages_per_zspage: the number of 0-order pages to make a zspage + +We assign a zspage to ZS_ALMOST_EMPTY fullness group when: + n <= N / f, where +n = number of allocated objects +N = total number of objects zspage can store +f = fullness_threshold_frac(ie, 4 at the moment) + +Similarly, we assign zspage to: + ZS_ALMOST_FULL when n > N / f + ZS_EMPTY when n == 0 + ZS_FULL when n == N diff --git a/MAINTAINERS b/MAINTAINERS index 6ee1e79ea16b..190981382853 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -10972,6 +10972,7 @@ L: linux-mm@kvack.org S: Maintained F: mm/zsmalloc.c F: include/linux/zsmalloc.h +F: Documentation/vm/zsmalloc.txt ZSWAP COMPRESSED SWAP CACHING M: Seth Jennings diff --git a/mm/zsmalloc.c b/mm/zsmalloc.c index 461243e14d3e..1833fc9e09cb 100644 --- a/mm/zsmalloc.c +++ b/mm/zsmalloc.c @@ -12,35 +12,6 @@ */ /* - * This allocator is designed for use with zram. Thus, the allocator is - * supposed to work well under low memory conditions. In particular, it - * never attempts higher order page allocation which is very likely to - * fail under memory pressure. On the other hand, if we just use single - * (0-order) pages, it would suffer from very high fragmentation -- - * any object of size PAGE_SIZE/2 or larger would occupy an entire page. - * This was one of the major issues with its predecessor (xvmalloc). - * - * To overcome these issues, zsmalloc allocates a bunch of 0-order pages - * and links them together using various 'struct page' fields. These linked - * pages act as a single higher-order page i.e. an object can span 0-order - * page boundaries. The code refers to these linked pages as a single entity - * called zspage. - * - * For simplicity, zsmalloc can only allocate objects of size up to PAGE_SIZE - * since this satisfies the requirements of all its current users (in the - * worst case, page is incompressible and is thus stored "as-is" i.e. in - * uncompressed form). For allocation requests larger than this size, failure - * is returned (see zs_malloc). - * - * Additionally, zs_malloc() does not return a dereferenceable pointer. - * Instead, it returns an opaque handle (unsigned long) which encodes actual - * location of the allocated object. The reason for this indirection is that - * zsmalloc does not keep zspages permanently mapped since that would cause - * issues on 32-bit systems where the VA region for kernel space mappings - * is very small. So, before using the allocating memory, the object has to - * be mapped using zs_map_object() to get a usable pointer and subsequently - * unmapped using zs_unmap_object(). - * * Following is how we use various fields and flags of underlying * struct page(s) to form a zspage. * -- cgit v1.2.3 From 49e7d9df9046590ab25788cb2a0cbcf071942e0d Mon Sep 17 00:00:00 2001 From: Joe Perches Date: Wed, 15 Apr 2015 16:17:31 -0700 Subject: MAINTAINERS: Use tabs consistently Consistently use a single tab after the "specifier:" type. Signed-off-by: Joe Perches Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- MAINTAINERS | 70 ++++++++++++++++++++++++++++++------------------------------- 1 file changed, 35 insertions(+), 35 deletions(-) (limited to 'MAINTAINERS') diff --git a/MAINTAINERS b/MAINTAINERS index 190981382853..87b2644a78fa 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -625,16 +625,16 @@ F: drivers/iommu/amd_iommu*.[ch] F: include/linux/amd-iommu.h AMD KFD -M: Oded Gabbay -L: dri-devel@lists.freedesktop.org -T: git git://people.freedesktop.org/~gabbayo/linux.git -S: Supported -F: drivers/gpu/drm/amd/amdkfd/ +M: Oded Gabbay +L: dri-devel@lists.freedesktop.org +T: git git://people.freedesktop.org/~gabbayo/linux.git +S: Supported +F: drivers/gpu/drm/amd/amdkfd/ F: drivers/gpu/drm/amd/include/cik_structs.h F: drivers/gpu/drm/amd/include/kgd_kfd_interface.h -F: drivers/gpu/drm/radeon/radeon_kfd.c -F: drivers/gpu/drm/radeon/radeon_kfd.h -F: include/uapi/linux/kfd_ioctl.h +F: drivers/gpu/drm/radeon/radeon_kfd.c +F: drivers/gpu/drm/radeon/radeon_kfd.h +F: include/uapi/linux/kfd_ioctl.h AMD MICROCODE UPDATE SUPPORT M: Borislav Petkov @@ -1967,10 +1967,10 @@ F: Documentation/filesystems/befs.txt F: fs/befs/ BECKHOFF CX5020 ETHERCAT MASTER DRIVER -M: Dariusz Marcinkiewicz -L: netdev@vger.kernel.org -S: Maintained -F: drivers/net/ethernet/ec_bhf.c +M: Dariusz Marcinkiewicz +L: netdev@vger.kernel.org +S: Maintained +F: drivers/net/ethernet/ec_bhf.c BFS FILE SYSTEM M: "Tigran A. Aivazian" @@ -2895,11 +2895,11 @@ S: Supported F: drivers/net/ethernet/chelsio/cxgb3/ CXGB3 ISCSI DRIVER (CXGB3I) -M: Karen Xie -L: linux-scsi@vger.kernel.org -W: http://www.chelsio.com -S: Supported -F: drivers/scsi/cxgbi/cxgb3i +M: Karen Xie +L: linux-scsi@vger.kernel.org +W: http://www.chelsio.com +S: Supported +F: drivers/scsi/cxgbi/cxgb3i CXGB3 IWARP RNIC DRIVER (IW_CXGB3) M: Steve Wise @@ -2916,11 +2916,11 @@ S: Supported F: drivers/net/ethernet/chelsio/cxgb4/ CXGB4 ISCSI DRIVER (CXGB4I) -M: Karen Xie -L: linux-scsi@vger.kernel.org -W: http://www.chelsio.com -S: Supported -F: drivers/scsi/cxgbi/cxgb4i +M: Karen Xie +L: linux-scsi@vger.kernel.org +W: http://www.chelsio.com +S: Supported +F: drivers/scsi/cxgbi/cxgb4i CXGB4 IWARP RNIC DRIVER (IW_CXGB4) M: Steve Wise @@ -5222,7 +5222,7 @@ F: arch/x86/kernel/tboot.c INTEL WIRELESS WIMAX CONNECTION 2400 M: Inaky Perez-Gonzalez M: linux-wimax@intel.com -L: wimax@linuxwimax.org (subscribers-only) +L: wimax@linuxwimax.org (subscribers-only) S: Supported W: http://linuxwimax.org F: Documentation/wimax/README.i2400m @@ -5918,7 +5918,7 @@ F: arch/powerpc/platforms/512x/ F: arch/powerpc/platforms/52xx/ LINUX FOR POWERPC EMBEDDED PPC4XX -M: Alistair Popple +M: Alistair Popple M: Matt Porter W: http://www.penguinppc.org/ L: linuxppc-dev@lists.ozlabs.org @@ -6391,7 +6391,7 @@ S: Supported F: drivers/watchdog/mena21_wdt.c MEN CHAMELEON BUS (mcb) -M: Johannes Thumshirn +M: Johannes Thumshirn S: Supported F: drivers/mcb/ F: include/linux/mcb.h @@ -7947,10 +7947,10 @@ L: rtc-linux@googlegroups.com S: Maintained QAT DRIVER -M: Tadeusz Struk -L: qat-linux@intel.com -S: Supported -F: drivers/crypto/qat/ +M: Tadeusz Struk +L: qat-linux@intel.com +S: Supported +F: drivers/crypto/qat/ QIB DRIVER M: Mike Marciniszyn @@ -10120,11 +10120,11 @@ F: include/linux/cdrom.h F: include/uapi/linux/cdrom.h UNISYS S-PAR DRIVERS -M: Benjamin Romer -M: David Kershner -L: sparmaintainer@unisys.com (Unisys internal) -S: Supported -F: drivers/staging/unisys/ +M: Benjamin Romer +M: David Kershner +L: sparmaintainer@unisys.com (Unisys internal) +S: Supported +F: drivers/staging/unisys/ UNIVERSAL FLASH STORAGE HOST CONTROLLER DRIVER M: Vinayak Holikatti @@ -10681,7 +10681,7 @@ F: drivers/media/rc/winbond-cir.c WIMAX STACK M: Inaky Perez-Gonzalez M: linux-wimax@intel.com -L: wimax@linuxwimax.org (subscribers-only) +L: wimax@linuxwimax.org (subscribers-only) S: Supported W: http://linuxwimax.org F: Documentation/wimax/README.wimax -- cgit v1.2.3 From 8a72ed6fa7e89c5ecd68803cd1160c35b079ea3b Mon Sep 17 00:00:00 2001 From: Joe Perches Date: Wed, 15 Apr 2015 16:17:39 -0700 Subject: MAINTAINERS: CREDITS: remove Stefano Brivio from B43 This email address isn't working anymore Signed-off-by: Joe Perches Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- CREDITS | 4 ++++ MAINTAINERS | 4 +--- 2 files changed, 5 insertions(+), 3 deletions(-) (limited to 'MAINTAINERS') diff --git a/CREDITS b/CREDITS index a0060bd054b5..2ef5dceef324 100644 --- a/CREDITS +++ b/CREDITS @@ -508,6 +508,10 @@ E: paul@paulbristow.net W: http://paulbristow.net/linux/idefloppy.html D: Maintainer of IDE/ATAPI floppy driver +N: Stefano Brivio +E: stefano.brivio@polimi.it +D: Broadcom B43 driver + N: Dominik Brodowski E: linux@brodo.de W: http://www.brodo.de/ diff --git a/MAINTAINERS b/MAINTAINERS index 87b2644a78fa..61740322d465 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1915,16 +1915,14 @@ S: Maintained F: drivers/media/radio/radio-aztech* B43 WIRELESS DRIVER -M: Stefano Brivio L: linux-wireless@vger.kernel.org L: b43-dev@lists.infradead.org W: http://wireless.kernel.org/en/users/Drivers/b43 -S: Maintained +S: Odd Fixes F: drivers/net/wireless/b43/ B43LEGACY WIRELESS DRIVER M: Larry Finger -M: Stefano Brivio L: linux-wireless@vger.kernel.org L: b43-dev@lists.infradead.org W: http://wireless.kernel.org/en/users/Drivers/b43 -- cgit v1.2.3 From 78b9ae307bded23cd8b239562d3a832dad585bdd Mon Sep 17 00:00:00 2001 From: Chao Yu Date: Thu, 16 Apr 2015 12:44:59 +0800 Subject: MAINTAINERS: remove maintainship entry of docking station driver As Rafael suggested, docking station driver is maintained along with the ACPI core nowadays, so it's better to remove this entry. Signed-off-by: Chao Yu Signed-off-by: Rafael J. Wysocki --- MAINTAINERS | 6 ------ 1 file changed, 6 deletions(-) (limited to 'MAINTAINERS') diff --git a/MAINTAINERS b/MAINTAINERS index 40eaa356e355..e1ec7785005c 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -3272,12 +3272,6 @@ F: drivers/firmware/dmi-id.c F: drivers/firmware/dmi_scan.c F: include/linux/dmi.h -DOCKING STATION DRIVER -M: Shaohua Li -L: linux-acpi@vger.kernel.org -S: Supported -F: drivers/acpi/dock.c - DOCUMENTATION M: Jonathan Corbet L: linux-doc@vger.kernel.org -- cgit v1.2.3 From 7c6f84f8df02a17ad3da5e38abc8b8abff122d39 Mon Sep 17 00:00:00 2001 From: Alexandre Belloni Date: Thu, 16 Apr 2015 12:45:43 -0700 Subject: MAINTAINERS: Add Alexandre Belloni as an RTC maintainer I've noticed that most of the patches for the RTC subsystem are currently either taken directly by Andrew or going through another maintainer's tree, quite often without an Acked-by or Reviewed-by tag. I'd like to propose myself as the RTC subsystem co-maintainer, to mainly help Alessandro reviewing incoming patches and maintain a subsystem tree to avoid having the RTC patches going through trees when they have no particular dependencies. Signed-off-by: Alexandre Belloni Cc: Alessandro Zummo Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- MAINTAINERS | 1 + 1 file changed, 1 insertion(+) (limited to 'MAINTAINERS') diff --git a/MAINTAINERS b/MAINTAINERS index 56a432d51119..8b0a0c969e40 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -8183,6 +8183,7 @@ X: kernel/torture.c REAL TIME CLOCK (RTC) SUBSYSTEM M: Alessandro Zummo +M: Alexandre Belloni L: rtc-linux@googlegroups.com Q: http://patchwork.ozlabs.org/project/rtc-linux/list/ S: Maintained -- cgit v1.2.3 From 17b199d62d7fd732ba02c13433e438ebb368aac9 Mon Sep 17 00:00:00 2001 From: Matthias Brugger Date: Thu, 16 Apr 2015 12:49:21 -0700 Subject: MAINTAINERS: add Mediatek SoC mailing list Add the new list that Mediatek specific patches should also be directed to. Signed-off-by: Matthias Brugger Cc: Olof Johansson Cc: Arnd Bergmann Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- MAINTAINERS | 1 + 1 file changed, 1 insertion(+) (limited to 'MAINTAINERS') diff --git a/MAINTAINERS b/MAINTAINERS index 8b0a0c969e40..d24e8a38ff63 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1215,6 +1215,7 @@ F: arch/arm/mach-orion5x/ts78xx-* ARM/Mediatek SoC support M: Matthias Brugger L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) +L: linux-mediatek@lists.infradead.org (moderated for non-subscribers) S: Maintained F: arch/arm/boot/dts/mt6* F: arch/arm/boot/dts/mt8* -- cgit v1.2.3 From 625e03461ba51592ac785214b2254af7bd630077 Mon Sep 17 00:00:00 2001 From: Heiko Stuebner Date: Mon, 20 Apr 2015 00:59:50 +0200 Subject: MAINTAINERS: add entry for Rockchip drm drivers Mark Yao looks after the Rockchip drm drivers and should thus also get patches touching these. Signed-off-by: Heiko Stuebner --- MAINTAINERS | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'MAINTAINERS') diff --git a/MAINTAINERS b/MAINTAINERS index 652004223ead..76dfb2b7028f 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -3398,6 +3398,13 @@ F: drivers/gpu/drm/rcar-du/ F: drivers/gpu/drm/shmobile/ F: include/linux/platform_data/shmob_drm.h +DRM DRIVERS FOR ROCKCHIP +M: Mark Yao +L: dri-devel@lists.freedesktop.org +S: Maintained +F: drivers/gpu/drm/rockchip/ +F: Documentation/devicetree/bindings/video/rockchip* + DSBR100 USB FM RADIO DRIVER M: Alexey Klimov L: linux-media@vger.kernel.org -- cgit v1.2.3 From af539e985b3fbe3b602313f317506a2a9e73f5bf Mon Sep 17 00:00:00 2001 From: Bjorn Helgaas Date: Tue, 21 Apr 2015 14:57:45 -0500 Subject: MAINTAINERS: Remove Mohit Kumar (email bounces) Email to Mohit Kumar has been bouncing, so remove the address from MAINTAINERS and add an entry in CREDITS. Signed-off-by: Bjorn Helgaas --- CREDITS | 4 ++++ MAINTAINERS | 4 +--- 2 files changed, 5 insertions(+), 3 deletions(-) (limited to 'MAINTAINERS') diff --git a/CREDITS b/CREDITS index 843e17647f3b..6bb0d51e83de 100644 --- a/CREDITS +++ b/CREDITS @@ -2045,6 +2045,10 @@ D: pirq addr, CS5535 alsa audio driver S: Gurgaon, India S: Kuala Lumpur, Malaysia +N: Mohit Kumar +D: ST Microelectronics SPEAr13xx PCI host bridge driver +D: Synopsys Designware PCI host bridge driver + N: Gabor Kuti M: seasons@falcon.sch.bme.hu M: seasons@makosteszta.sote.hu diff --git a/MAINTAINERS b/MAINTAINERS index a123c39b4f0e..1c95b707a5f6 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -7490,7 +7490,6 @@ S: Maintained F: drivers/pci/host/pci-exynos.c PCI DRIVER FOR SYNOPSIS DESIGNWARE -M: Mohit Kumar M: Jingoo Han L: linux-pci@vger.kernel.org S: Maintained @@ -7505,9 +7504,8 @@ F: Documentation/devicetree/bindings/pci/host-generic-pci.txt F: drivers/pci/host/pci-host-generic.c PCIE DRIVER FOR ST SPEAR13XX -M: Mohit Kumar L: linux-pci@vger.kernel.org -S: Maintained +S: Orphan F: drivers/pci/host/*spear* PCMCIA SUBSYSTEM -- cgit v1.2.3 From db4112e6d71526def391d4cdd708b3a826643228 Mon Sep 17 00:00:00 2001 From: Lee Jones Date: Thu, 9 Apr 2015 15:47:34 +0100 Subject: MAINTAINERS: Add Watchdog and RTC files to STI's maintainer entry Signed-off-by: Lee Jones --- MAINTAINERS | 2 ++ 1 file changed, 2 insertions(+) (limited to 'MAINTAINERS') diff --git a/MAINTAINERS b/MAINTAINERS index 2e5bbc0d68b2..b514f6b077b0 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1473,10 +1473,12 @@ F: drivers/phy/phy-stih407-usb.c F: drivers/phy/phy-stih41x-usb.c F: drivers/pinctrl/pinctrl-st.c F: drivers/reset/sti/ +F: drivers/rtc/rtc-st-lpc.c F: drivers/tty/serial/st-asc.c F: drivers/usb/dwc3/dwc3-st.c F: drivers/usb/host/ehci-st.c F: drivers/usb/host/ohci-st.c +F: drivers/watchdog/st_lpc_wdt.c F: drivers/ata/ahci_st.c ARM/TECHNOLOGIC SYSTEMS TS7250 MACHINE SUPPORT -- cgit v1.2.3 From 2a6afddb6656aefbc6e8d6ef1f95749895ae2945 Mon Sep 17 00:00:00 2001 From: Pali Rohár Date: Sun, 29 Mar 2015 15:35:54 +0200 Subject: MAINTAINERS: Add me as maintainer of Nokia N900 power supply drivers MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit I'm author of two of those drivers (bq2415x and rx51) and I added more patches for other twos. Also I fished (proper) open source power management software for Nokia N900 and those kernel drivers are part of it. Signed-off-by: Pali Rohár Signed-off-by: Sebastian Reichel --- MAINTAINERS | 11 +++++++++++ 1 file changed, 11 insertions(+) (limited to 'MAINTAINERS') diff --git a/MAINTAINERS b/MAINTAINERS index 2e5bbc0d68b2..e9919782444b 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -6943,6 +6943,17 @@ T: git git://git.rocketboards.org/linux-socfpga-next.git S: Maintained F: arch/nios2/ +NOKIA N900 POWER SUPPLY DRIVERS +M: Pali Rohár +S: Maintained +F: include/linux/power/bq2415x_charger.h +F: include/linux/power/bq27x00_battery.h +F: include/linux/power/isp1704_charger.h +F: drivers/power/bq2415x_charger.c +F: drivers/power/bq27x00_battery.c +F: drivers/power/isp1704_charger.c +F: drivers/power/rx51_battery.c + NTB DRIVER M: Jon Mason M: Dave Jiang -- cgit v1.2.3 From cc11b140c3f1ad80a9a7c5422748c041cb5fddfb Mon Sep 17 00:00:00 2001 From: Hans Verkuil Date: Sat, 25 Apr 2015 12:36:18 -0300 Subject: [media] dt3155: move out of staging into drivers/media/pci The dt3155 code is now in good shape, so move it out of staging into drivers/media/pci. Mark in MAINTAINERS that I'll do Odd Fixes for this driver. Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- MAINTAINERS | 8 + drivers/media/pci/Kconfig | 1 + drivers/media/pci/Makefile | 1 + drivers/media/pci/dt3155/Kconfig | 13 + drivers/media/pci/dt3155/Makefile | 1 + drivers/media/pci/dt3155/dt3155.c | 626 ++++++++++++++++++++++++++++ drivers/media/pci/dt3155/dt3155.h | 196 +++++++++ drivers/staging/media/Kconfig | 2 - drivers/staging/media/Makefile | 1 - drivers/staging/media/dt3155v4l/Kconfig | 13 - drivers/staging/media/dt3155v4l/Makefile | 1 - drivers/staging/media/dt3155v4l/dt3155v4l.c | 626 ---------------------------- drivers/staging/media/dt3155v4l/dt3155v4l.h | 196 --------- 13 files changed, 846 insertions(+), 839 deletions(-) create mode 100644 drivers/media/pci/dt3155/Kconfig create mode 100644 drivers/media/pci/dt3155/Makefile create mode 100644 drivers/media/pci/dt3155/dt3155.c create mode 100644 drivers/media/pci/dt3155/dt3155.h delete mode 100644 drivers/staging/media/dt3155v4l/Kconfig delete mode 100644 drivers/staging/media/dt3155v4l/Makefile delete mode 100644 drivers/staging/media/dt3155v4l/dt3155v4l.c delete mode 100644 drivers/staging/media/dt3155v4l/dt3155v4l.h (limited to 'MAINTAINERS') diff --git a/MAINTAINERS b/MAINTAINERS index 2e5bbc0d68b2..ef403f5d5127 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -3426,6 +3426,14 @@ L: netdev@vger.kernel.org S: Maintained F: drivers/net/wan/dscc4.c +DT3155 MEDIA DRIVER +M: Hans Verkuil +L: linux-media@vger.kernel.org +T: git git://linuxtv.org/media_tree.git +W: http://linuxtv.org +S: Odd Fixes +F: drivers/media/pci/dt3155/ + DVB_USB_AF9015 MEDIA DRIVER M: Antti Palosaari L: linux-media@vger.kernel.org diff --git a/drivers/media/pci/Kconfig b/drivers/media/pci/Kconfig index 218144a99016..fd359fb15e69 100644 --- a/drivers/media/pci/Kconfig +++ b/drivers/media/pci/Kconfig @@ -21,6 +21,7 @@ source "drivers/media/pci/zoran/Kconfig" source "drivers/media/pci/saa7146/Kconfig" source "drivers/media/pci/solo6x10/Kconfig" source "drivers/media/pci/tw68/Kconfig" +source "drivers/media/pci/dt3155/Kconfig" endif if MEDIA_ANALOG_TV_SUPPORT || MEDIA_DIGITAL_TV_SUPPORT diff --git a/drivers/media/pci/Makefile b/drivers/media/pci/Makefile index 0baf0d2967ee..3471ab6b9f22 100644 --- a/drivers/media/pci/Makefile +++ b/drivers/media/pci/Makefile @@ -24,6 +24,7 @@ obj-$(CONFIG_VIDEO_BT848) += bt8xx/ obj-$(CONFIG_VIDEO_SAA7134) += saa7134/ obj-$(CONFIG_VIDEO_SAA7164) += saa7164/ obj-$(CONFIG_VIDEO_TW68) += tw68/ +obj-$(CONFIG_VIDEO_DT3155) += dt3155/ obj-$(CONFIG_VIDEO_MEYE) += meye/ obj-$(CONFIG_STA2X11_VIP) += sta2x11/ obj-$(CONFIG_VIDEO_SOLO6X10) += solo6x10/ diff --git a/drivers/media/pci/dt3155/Kconfig b/drivers/media/pci/dt3155/Kconfig new file mode 100644 index 000000000000..5145e0dfa2aa --- /dev/null +++ b/drivers/media/pci/dt3155/Kconfig @@ -0,0 +1,13 @@ +config VIDEO_DT3155 + tristate "DT3155 frame grabber" + depends on PCI && VIDEO_DEV && VIDEO_V4L2 + depends on HAS_DMA + select VIDEOBUF2_DMA_CONTIG + default n + ---help--- + Enables dt3155 device driver for the DataTranslation DT3155 frame grabber. + Say Y here if you have this hardware. + In doubt, say N. + + To compile this driver as a module, choose M here: the + module will be called dt3155. diff --git a/drivers/media/pci/dt3155/Makefile b/drivers/media/pci/dt3155/Makefile new file mode 100644 index 000000000000..89fa637ec54c --- /dev/null +++ b/drivers/media/pci/dt3155/Makefile @@ -0,0 +1 @@ +obj-$(CONFIG_VIDEO_DT3155) += dt3155.o diff --git a/drivers/media/pci/dt3155/dt3155.c b/drivers/media/pci/dt3155/dt3155.c new file mode 100644 index 000000000000..3131c2ee3b85 --- /dev/null +++ b/drivers/media/pci/dt3155/dt3155.c @@ -0,0 +1,626 @@ +/*************************************************************************** + * Copyright (C) 2006-2010 by Marin Mitov * + * mitov@issp.bas.bg * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 2 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + ***************************************************************************/ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "dt3155.h" + +#define DT3155_DEVICE_ID 0x1223 + +/** + * read_i2c_reg - reads an internal i2c register + * + * @addr: dt3155 mmio base address + * @index: index (internal address) of register to read + * @data: pointer to byte the read data will be placed in + * + * returns: zero on success or error code + * + * This function starts reading the specified (by index) register + * and busy waits for the process to finish. The result is placed + * in a byte pointed by data. + */ +static int read_i2c_reg(void __iomem *addr, u8 index, u8 *data) +{ + u32 tmp = index; + + iowrite32((tmp << 17) | IIC_READ, addr + IIC_CSR2); + mmiowb(); + udelay(45); /* wait at least 43 usec for NEW_CYCLE to clear */ + if (ioread32(addr + IIC_CSR2) & NEW_CYCLE) + return -EIO; /* error: NEW_CYCLE not cleared */ + tmp = ioread32(addr + IIC_CSR1); + if (tmp & DIRECT_ABORT) { + /* reset DIRECT_ABORT bit */ + iowrite32(DIRECT_ABORT, addr + IIC_CSR1); + return -EIO; /* error: DIRECT_ABORT set */ + } + *data = tmp >> 24; + return 0; +} + +/** + * write_i2c_reg - writes to an internal i2c register + * + * @addr: dt3155 mmio base address + * @index: index (internal address) of register to read + * @data: data to be written + * + * returns: zero on success or error code + * + * This function starts writing the specified (by index) register + * and busy waits for the process to finish. + */ +static int write_i2c_reg(void __iomem *addr, u8 index, u8 data) +{ + u32 tmp = index; + + iowrite32((tmp << 17) | IIC_WRITE | data, addr + IIC_CSR2); + mmiowb(); + udelay(65); /* wait at least 63 usec for NEW_CYCLE to clear */ + if (ioread32(addr + IIC_CSR2) & NEW_CYCLE) + return -EIO; /* error: NEW_CYCLE not cleared */ + if (ioread32(addr + IIC_CSR1) & DIRECT_ABORT) { + /* reset DIRECT_ABORT bit */ + iowrite32(DIRECT_ABORT, addr + IIC_CSR1); + return -EIO; /* error: DIRECT_ABORT set */ + } + return 0; +} + +/** + * write_i2c_reg_nowait - writes to an internal i2c register + * + * @addr: dt3155 mmio base address + * @index: index (internal address) of register to read + * @data: data to be written + * + * This function starts writing the specified (by index) register + * and then returns. + */ +static void write_i2c_reg_nowait(void __iomem *addr, u8 index, u8 data) +{ + u32 tmp = index; + + iowrite32((tmp << 17) | IIC_WRITE | data, addr + IIC_CSR2); + mmiowb(); +} + +/** + * wait_i2c_reg - waits the read/write to finish + * + * @addr: dt3155 mmio base address + * + * returns: zero on success or error code + * + * This function waits reading/writing to finish. + */ +static int wait_i2c_reg(void __iomem *addr) +{ + if (ioread32(addr + IIC_CSR2) & NEW_CYCLE) + udelay(65); /* wait at least 63 usec for NEW_CYCLE to clear */ + if (ioread32(addr + IIC_CSR2) & NEW_CYCLE) + return -EIO; /* error: NEW_CYCLE not cleared */ + if (ioread32(addr + IIC_CSR1) & DIRECT_ABORT) { + /* reset DIRECT_ABORT bit */ + iowrite32(DIRECT_ABORT, addr + IIC_CSR1); + return -EIO; /* error: DIRECT_ABORT set */ + } + return 0; +} + +static int +dt3155_queue_setup(struct vb2_queue *vq, const struct v4l2_format *fmt, + unsigned int *nbuffers, unsigned int *num_planes, + unsigned int sizes[], void *alloc_ctxs[]) + +{ + struct dt3155_priv *pd = vb2_get_drv_priv(vq); + unsigned size = pd->width * pd->height; + + if (vq->num_buffers + *nbuffers < 2) + *nbuffers = 2 - vq->num_buffers; + if (fmt && fmt->fmt.pix.sizeimage < size) + return -EINVAL; + *num_planes = 1; + sizes[0] = fmt ? fmt->fmt.pix.sizeimage : size; + alloc_ctxs[0] = pd->alloc_ctx; + return 0; +} + +static int dt3155_buf_prepare(struct vb2_buffer *vb) +{ + struct dt3155_priv *pd = vb2_get_drv_priv(vb->vb2_queue); + + vb2_set_plane_payload(vb, 0, pd->width * pd->height); + return 0; +} + +static int dt3155_start_streaming(struct vb2_queue *q, unsigned count) +{ + struct dt3155_priv *pd = vb2_get_drv_priv(q); + struct vb2_buffer *vb = pd->curr_buf; + dma_addr_t dma_addr; + + pd->sequence = 0; + dma_addr = vb2_dma_contig_plane_dma_addr(vb, 0); + iowrite32(dma_addr, pd->regs + EVEN_DMA_START); + iowrite32(dma_addr + pd->width, pd->regs + ODD_DMA_START); + iowrite32(pd->width, pd->regs + EVEN_DMA_STRIDE); + iowrite32(pd->width, pd->regs + ODD_DMA_STRIDE); + /* enable interrupts, clear all irq flags */ + iowrite32(FLD_START_EN | FLD_END_ODD_EN | FLD_START | + FLD_END_EVEN | FLD_END_ODD, pd->regs + INT_CSR); + iowrite32(FIFO_EN | SRST | FLD_CRPT_ODD | FLD_CRPT_EVEN | + FLD_DN_ODD | FLD_DN_EVEN | CAP_CONT_EVEN | CAP_CONT_ODD, + pd->regs + CSR1); + wait_i2c_reg(pd->regs); + write_i2c_reg(pd->regs, CONFIG, pd->config); + write_i2c_reg(pd->regs, EVEN_CSR, CSR_ERROR | CSR_DONE); + write_i2c_reg(pd->regs, ODD_CSR, CSR_ERROR | CSR_DONE); + + /* start the board */ + write_i2c_reg(pd->regs, CSR2, pd->csr2 | BUSY_EVEN | BUSY_ODD); + return 0; +} + +static void dt3155_stop_streaming(struct vb2_queue *q) +{ + struct dt3155_priv *pd = vb2_get_drv_priv(q); + struct vb2_buffer *vb; + + spin_lock_irq(&pd->lock); + /* stop the board */ + write_i2c_reg_nowait(pd->regs, CSR2, pd->csr2); + iowrite32(FIFO_EN | SRST | FLD_CRPT_ODD | FLD_CRPT_EVEN | + FLD_DN_ODD | FLD_DN_EVEN, pd->regs + CSR1); + /* disable interrupts, clear all irq flags */ + iowrite32(FLD_START | FLD_END_EVEN | FLD_END_ODD, pd->regs + INT_CSR); + spin_unlock_irq(&pd->lock); + + /* + * It is not clear whether the DMA stops at once or whether it + * will finish the current frame or field first. To be on the + * safe side we wait a bit. + */ + msleep(45); + + spin_lock_irq(&pd->lock); + if (pd->curr_buf) { + vb2_buffer_done(pd->curr_buf, VB2_BUF_STATE_ERROR); + pd->curr_buf = NULL; + } + + while (!list_empty(&pd->dmaq)) { + vb = list_first_entry(&pd->dmaq, typeof(*vb), done_entry); + list_del(&vb->done_entry); + vb2_buffer_done(vb, VB2_BUF_STATE_ERROR); + } + spin_unlock_irq(&pd->lock); +} + +static void dt3155_buf_queue(struct vb2_buffer *vb) +{ + struct dt3155_priv *pd = vb2_get_drv_priv(vb->vb2_queue); + + /* pd->vidq.streaming = 1 when dt3155_buf_queue() is invoked */ + spin_lock_irq(&pd->lock); + if (pd->curr_buf) + list_add_tail(&vb->done_entry, &pd->dmaq); + else + pd->curr_buf = vb; + spin_unlock_irq(&pd->lock); +} + +static const struct vb2_ops q_ops = { + .queue_setup = dt3155_queue_setup, + .wait_prepare = vb2_ops_wait_prepare, + .wait_finish = vb2_ops_wait_finish, + .buf_prepare = dt3155_buf_prepare, + .start_streaming = dt3155_start_streaming, + .stop_streaming = dt3155_stop_streaming, + .buf_queue = dt3155_buf_queue, +}; + +static irqreturn_t dt3155_irq_handler_even(int irq, void *dev_id) +{ + struct dt3155_priv *ipd = dev_id; + struct vb2_buffer *ivb; + dma_addr_t dma_addr; + u32 tmp; + + tmp = ioread32(ipd->regs + INT_CSR) & (FLD_START | FLD_END_ODD); + if (!tmp) + return IRQ_NONE; /* not our irq */ + if ((tmp & FLD_START) && !(tmp & FLD_END_ODD)) { + iowrite32(FLD_START_EN | FLD_END_ODD_EN | FLD_START, + ipd->regs + INT_CSR); + return IRQ_HANDLED; /* start of field irq */ + } + tmp = ioread32(ipd->regs + CSR1) & (FLD_CRPT_EVEN | FLD_CRPT_ODD); + if (tmp) { + iowrite32(FIFO_EN | SRST | FLD_CRPT_ODD | FLD_CRPT_EVEN | + FLD_DN_ODD | FLD_DN_EVEN | + CAP_CONT_EVEN | CAP_CONT_ODD, + ipd->regs + CSR1); + mmiowb(); + } + + spin_lock(&ipd->lock); + if (ipd->curr_buf && !list_empty(&ipd->dmaq)) { + v4l2_get_timestamp(&ipd->curr_buf->v4l2_buf.timestamp); + ipd->curr_buf->v4l2_buf.sequence = ipd->sequence++; + ipd->curr_buf->v4l2_buf.field = V4L2_FIELD_NONE; + vb2_buffer_done(ipd->curr_buf, VB2_BUF_STATE_DONE); + + ivb = list_first_entry(&ipd->dmaq, typeof(*ivb), done_entry); + list_del(&ivb->done_entry); + ipd->curr_buf = ivb; + dma_addr = vb2_dma_contig_plane_dma_addr(ivb, 0); + iowrite32(dma_addr, ipd->regs + EVEN_DMA_START); + iowrite32(dma_addr + ipd->width, ipd->regs + ODD_DMA_START); + iowrite32(ipd->width, ipd->regs + EVEN_DMA_STRIDE); + iowrite32(ipd->width, ipd->regs + ODD_DMA_STRIDE); + mmiowb(); + } + + /* enable interrupts, clear all irq flags */ + iowrite32(FLD_START_EN | FLD_END_ODD_EN | FLD_START | + FLD_END_EVEN | FLD_END_ODD, ipd->regs + INT_CSR); + spin_unlock(&ipd->lock); + return IRQ_HANDLED; +} + +static const struct v4l2_file_operations dt3155_fops = { + .owner = THIS_MODULE, + .open = v4l2_fh_open, + .release = vb2_fop_release, + .unlocked_ioctl = video_ioctl2, + .read = vb2_fop_read, + .mmap = vb2_fop_mmap, + .poll = vb2_fop_poll +}; + +static int dt3155_querycap(struct file *filp, void *p, struct v4l2_capability *cap) +{ + struct dt3155_priv *pd = video_drvdata(filp); + + strcpy(cap->driver, DT3155_NAME); + strcpy(cap->card, DT3155_NAME " frame grabber"); + sprintf(cap->bus_info, "PCI:%s", pci_name(pd->pdev)); + cap->device_caps = V4L2_CAP_VIDEO_CAPTURE | + V4L2_CAP_STREAMING | V4L2_CAP_READWRITE; + cap->capabilities = cap->device_caps | V4L2_CAP_DEVICE_CAPS; + return 0; +} + +static int dt3155_enum_fmt_vid_cap(struct file *filp, void *p, struct v4l2_fmtdesc *f) +{ + if (f->index) + return -EINVAL; + f->pixelformat = V4L2_PIX_FMT_GREY; + strcpy(f->description, "8-bit Greyscale"); + return 0; +} + +static int dt3155_fmt_vid_cap(struct file *filp, void *p, struct v4l2_format *f) +{ + struct dt3155_priv *pd = video_drvdata(filp); + + f->fmt.pix.width = pd->width; + f->fmt.pix.height = pd->height; + f->fmt.pix.pixelformat = V4L2_PIX_FMT_GREY; + f->fmt.pix.field = V4L2_FIELD_NONE; + f->fmt.pix.bytesperline = f->fmt.pix.width; + f->fmt.pix.sizeimage = f->fmt.pix.width * f->fmt.pix.height; + f->fmt.pix.colorspace = V4L2_COLORSPACE_SMPTE170M; + return 0; +} + +static int dt3155_g_std(struct file *filp, void *p, v4l2_std_id *norm) +{ + struct dt3155_priv *pd = video_drvdata(filp); + + *norm = pd->std; + return 0; +} + +static int dt3155_s_std(struct file *filp, void *p, v4l2_std_id norm) +{ + struct dt3155_priv *pd = video_drvdata(filp); + + if (pd->std == norm) + return 0; + if (vb2_is_busy(&pd->vidq)) + return -EBUSY; + pd->std = norm; + if (pd->std & V4L2_STD_525_60) { + pd->csr2 = VT_60HZ; + pd->width = 640; + pd->height = 480; + } else { + pd->csr2 = VT_50HZ; + pd->width = 768; + pd->height = 576; + } + return 0; +} + +static int dt3155_enum_input(struct file *filp, void *p, struct v4l2_input *input) +{ + if (input->index > 3) + return -EINVAL; + if (input->index) + snprintf(input->name, sizeof(input->name), "VID%d", input->index); + else + strlcpy(input->name, "J2/VID0", sizeof(input->name)); + input->type = V4L2_INPUT_TYPE_CAMERA; + input->std = V4L2_STD_ALL; + input->status = 0; + return 0; +} + +static int dt3155_g_input(struct file *filp, void *p, unsigned int *i) +{ + struct dt3155_priv *pd = video_drvdata(filp); + + *i = pd->input; + return 0; +} + +static int dt3155_s_input(struct file *filp, void *p, unsigned int i) +{ + struct dt3155_priv *pd = video_drvdata(filp); + + if (i > 3) + return -EINVAL; + pd->input = i; + write_i2c_reg(pd->regs, AD_ADDR, AD_CMD_REG); + write_i2c_reg(pd->regs, AD_CMD, (i << 6) | (i << 4) | SYNC_LVL_3); + return 0; +} + +static const struct v4l2_ioctl_ops dt3155_ioctl_ops = { + .vidioc_querycap = dt3155_querycap, + .vidioc_enum_fmt_vid_cap = dt3155_enum_fmt_vid_cap, + .vidioc_try_fmt_vid_cap = dt3155_fmt_vid_cap, + .vidioc_g_fmt_vid_cap = dt3155_fmt_vid_cap, + .vidioc_s_fmt_vid_cap = dt3155_fmt_vid_cap, + .vidioc_reqbufs = vb2_ioctl_reqbufs, + .vidioc_create_bufs = vb2_ioctl_create_bufs, + .vidioc_querybuf = vb2_ioctl_querybuf, + .vidioc_expbuf = vb2_ioctl_expbuf, + .vidioc_qbuf = vb2_ioctl_qbuf, + .vidioc_dqbuf = vb2_ioctl_dqbuf, + .vidioc_streamon = vb2_ioctl_streamon, + .vidioc_streamoff = vb2_ioctl_streamoff, + .vidioc_g_std = dt3155_g_std, + .vidioc_s_std = dt3155_s_std, + .vidioc_enum_input = dt3155_enum_input, + .vidioc_g_input = dt3155_g_input, + .vidioc_s_input = dt3155_s_input, +}; + +static int dt3155_init_board(struct dt3155_priv *pd) +{ + struct pci_dev *pdev = pd->pdev; + int i; + u8 tmp = 0; + + pci_set_master(pdev); /* dt3155 needs it */ + + /* resetting the adapter */ + iowrite32(ADDR_ERR_ODD | ADDR_ERR_EVEN | FLD_CRPT_ODD | FLD_CRPT_EVEN | + FLD_DN_ODD | FLD_DN_EVEN, pd->regs + CSR1); + mmiowb(); + msleep(20); + + /* initializing adapter registers */ + iowrite32(FIFO_EN | SRST, pd->regs + CSR1); + mmiowb(); + iowrite32(0xEEEEEE01, pd->regs + EVEN_PIXEL_FMT); + iowrite32(0xEEEEEE01, pd->regs + ODD_PIXEL_FMT); + iowrite32(0x00000020, pd->regs + FIFO_TRIGER); + iowrite32(0x00000103, pd->regs + XFER_MODE); + iowrite32(0, pd->regs + RETRY_WAIT_CNT); + iowrite32(0, pd->regs + INT_CSR); + iowrite32(1, pd->regs + EVEN_FLD_MASK); + iowrite32(1, pd->regs + ODD_FLD_MASK); + iowrite32(0, pd->regs + MASK_LENGTH); + iowrite32(0x0005007C, pd->regs + FIFO_FLAG_CNT); + iowrite32(0x01010101, pd->regs + IIC_CLK_DUR); + mmiowb(); + + /* verifying that we have a DT3155 board (not just a SAA7116 chip) */ + read_i2c_reg(pd->regs, DT_ID, &tmp); + if (tmp != DT3155_ID) + return -ENODEV; + + /* initialize AD LUT */ + write_i2c_reg(pd->regs, AD_ADDR, 0); + for (i = 0; i < 256; i++) + write_i2c_reg(pd->regs, AD_LUT, i); + + /* initialize ADC references */ + /* FIXME: pos_ref & neg_ref depend on VT_50HZ */ + write_i2c_reg(pd->regs, AD_ADDR, AD_CMD_REG); + write_i2c_reg(pd->regs, AD_CMD, VIDEO_CNL_1 | SYNC_CNL_1 | SYNC_LVL_3); + write_i2c_reg(pd->regs, AD_ADDR, AD_POS_REF); + write_i2c_reg(pd->regs, AD_CMD, 34); + write_i2c_reg(pd->regs, AD_ADDR, AD_NEG_REF); + write_i2c_reg(pd->regs, AD_CMD, 0); + + /* initialize PM LUT */ + write_i2c_reg(pd->regs, CONFIG, pd->config | PM_LUT_PGM); + for (i = 0; i < 256; i++) { + write_i2c_reg(pd->regs, PM_LUT_ADDR, i); + write_i2c_reg(pd->regs, PM_LUT_DATA, i); + } + write_i2c_reg(pd->regs, CONFIG, pd->config | PM_LUT_PGM | PM_LUT_SEL); + for (i = 0; i < 256; i++) { + write_i2c_reg(pd->regs, PM_LUT_ADDR, i); + write_i2c_reg(pd->regs, PM_LUT_DATA, i); + } + write_i2c_reg(pd->regs, CONFIG, pd->config); /* ACQ_MODE_EVEN */ + + /* select channel 1 for input and set sync level */ + write_i2c_reg(pd->regs, AD_ADDR, AD_CMD_REG); + write_i2c_reg(pd->regs, AD_CMD, VIDEO_CNL_1 | SYNC_CNL_1 | SYNC_LVL_3); + + /* disable all irqs, clear all irq flags */ + iowrite32(FLD_START | FLD_END_EVEN | FLD_END_ODD, + pd->regs + INT_CSR); + + return 0; +} + +static struct video_device dt3155_vdev = { + .name = DT3155_NAME, + .fops = &dt3155_fops, + .ioctl_ops = &dt3155_ioctl_ops, + .minor = -1, + .release = video_device_release_empty, + .tvnorms = V4L2_STD_ALL, +}; + +static int dt3155_probe(struct pci_dev *pdev, const struct pci_device_id *id) +{ + int err; + struct dt3155_priv *pd; + + err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)); + if (err) + return -ENODEV; + pd = devm_kzalloc(&pdev->dev, sizeof(*pd), GFP_KERNEL); + if (!pd) + return -ENOMEM; + + err = v4l2_device_register(&pdev->dev, &pd->v4l2_dev); + if (err) + return err; + pd->vdev = dt3155_vdev; + pd->vdev.v4l2_dev = &pd->v4l2_dev; + video_set_drvdata(&pd->vdev, pd); /* for use in video_fops */ + pd->pdev = pdev; + pd->std = V4L2_STD_625_50; + pd->csr2 = VT_50HZ; + pd->width = 768; + pd->height = 576; + INIT_LIST_HEAD(&pd->dmaq); + mutex_init(&pd->mux); + pd->vdev.lock = &pd->mux; /* for locking v4l2_file_operations */ + pd->vidq.type = V4L2_BUF_TYPE_VIDEO_CAPTURE; + pd->vidq.timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC; + pd->vidq.io_modes = VB2_MMAP | VB2_DMABUF | VB2_READ; + pd->vidq.ops = &q_ops; + pd->vidq.mem_ops = &vb2_dma_contig_memops; + pd->vidq.drv_priv = pd; + pd->vidq.min_buffers_needed = 2; + pd->vidq.lock = &pd->mux; /* for locking v4l2_file_operations */ + pd->vdev.queue = &pd->vidq; + err = vb2_queue_init(&pd->vidq); + if (err < 0) + goto err_v4l2_dev_unreg; + pd->alloc_ctx = vb2_dma_contig_init_ctx(&pdev->dev); + if (IS_ERR(pd->alloc_ctx)) { + dev_err(&pdev->dev, "Can't allocate buffer context"); + err = PTR_ERR(pd->alloc_ctx); + goto err_v4l2_dev_unreg; + } + spin_lock_init(&pd->lock); + pd->config = ACQ_MODE_EVEN; + err = pci_enable_device(pdev); + if (err) + goto err_free_ctx; + err = pci_request_region(pdev, 0, pci_name(pdev)); + if (err) + goto err_pci_disable; + pd->regs = pci_iomap(pdev, 0, pci_resource_len(pd->pdev, 0)); + if (!pd->regs) { + err = -ENOMEM; + goto err_free_reg; + } + err = dt3155_init_board(pd); + if (err) + goto err_iounmap; + err = request_irq(pd->pdev->irq, dt3155_irq_handler_even, + IRQF_SHARED, DT3155_NAME, pd); + if (err) + goto err_iounmap; + err = video_register_device(&pd->vdev, VFL_TYPE_GRABBER, -1); + if (err) + goto err_free_irq; + dev_info(&pdev->dev, "/dev/video%i is ready\n", pd->vdev.minor); + return 0; /* success */ + +err_free_irq: + free_irq(pd->pdev->irq, pd); +err_iounmap: + pci_iounmap(pdev, pd->regs); +err_free_reg: + pci_release_region(pdev, 0); +err_pci_disable: + pci_disable_device(pdev); +err_free_ctx: + vb2_dma_contig_cleanup_ctx(pd->alloc_ctx); +err_v4l2_dev_unreg: + v4l2_device_unregister(&pd->v4l2_dev); + return err; +} + +static void dt3155_remove(struct pci_dev *pdev) +{ + struct v4l2_device *v4l2_dev = pci_get_drvdata(pdev); + struct dt3155_priv *pd = container_of(v4l2_dev, struct dt3155_priv, v4l2_dev); + + video_unregister_device(&pd->vdev); + free_irq(pd->pdev->irq, pd); + vb2_queue_release(&pd->vidq); + v4l2_device_unregister(&pd->v4l2_dev); + pci_iounmap(pdev, pd->regs); + pci_release_region(pdev, 0); + pci_disable_device(pdev); + vb2_dma_contig_cleanup_ctx(pd->alloc_ctx); +} + +static const struct pci_device_id pci_ids[] = { + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, DT3155_DEVICE_ID) }, + { 0, /* zero marks the end */ }, +}; +MODULE_DEVICE_TABLE(pci, pci_ids); + +static struct pci_driver pci_driver = { + .name = DT3155_NAME, + .id_table = pci_ids, + .probe = dt3155_probe, + .remove = dt3155_remove, +}; + +module_pci_driver(pci_driver); + +MODULE_DESCRIPTION("video4linux pci-driver for dt3155 frame grabber"); +MODULE_AUTHOR("Marin Mitov "); +MODULE_VERSION(DT3155_VERSION); +MODULE_LICENSE("GPL"); diff --git a/drivers/media/pci/dt3155/dt3155.h b/drivers/media/pci/dt3155/dt3155.h new file mode 100644 index 000000000000..4e1f4d598d57 --- /dev/null +++ b/drivers/media/pci/dt3155/dt3155.h @@ -0,0 +1,196 @@ +/*************************************************************************** + * Copyright (C) 2006-2010 by Marin Mitov * + * mitov@issp.bas.bg * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 2 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + ***************************************************************************/ + +/* DT3155 header file */ +#ifndef _DT3155_H_ +#define _DT3155_H_ + +#include +#include +#include +#include + +#define DT3155_NAME "dt3155" +#define DT3155_VER_MAJ 2 +#define DT3155_VER_MIN 0 +#define DT3155_VER_EXT 0 +#define DT3155_VERSION __stringify(DT3155_VER_MAJ) "." \ + __stringify(DT3155_VER_MIN) "." \ + __stringify(DT3155_VER_EXT) + +/* DT3155 Base Register offsets (memory mapped) */ +#define EVEN_DMA_START 0x00 +#define ODD_DMA_START 0x0C +#define EVEN_DMA_STRIDE 0x18 +#define ODD_DMA_STRIDE 0x24 +#define EVEN_PIXEL_FMT 0x30 +#define ODD_PIXEL_FMT 0x34 +#define FIFO_TRIGER 0x38 +#define XFER_MODE 0x3C +#define CSR1 0x40 +#define RETRY_WAIT_CNT 0x44 +#define INT_CSR 0x48 +#define EVEN_FLD_MASK 0x4C +#define ODD_FLD_MASK 0x50 +#define MASK_LENGTH 0x54 +#define FIFO_FLAG_CNT 0x58 +#define IIC_CLK_DUR 0x5C +#define IIC_CSR1 0x60 +#define IIC_CSR2 0x64 + +/* DT3155 Internal Registers indexes (i2c/IIC mapped) */ +#define CSR2 0x10 +#define EVEN_CSR 0x11 +#define ODD_CSR 0x12 +#define CONFIG 0x13 +#define DT_ID 0x1F +#define X_CLIP_START 0x20 +#define Y_CLIP_START 0x22 +#define X_CLIP_END 0x24 +#define Y_CLIP_END 0x26 +#define AD_ADDR 0x30 +#define AD_LUT 0x31 +#define AD_CMD 0x32 +#define DIG_OUT 0x40 +#define PM_LUT_ADDR 0x50 +#define PM_LUT_DATA 0x51 + +/* AD command register values */ +#define AD_CMD_REG 0x00 +#define AD_POS_REF 0x01 +#define AD_NEG_REF 0x02 + +/* CSR1 bit masks */ +#define RANGE_EN 0x00008000 +#define CRPT_DIS 0x00004000 +#define ADDR_ERR_ODD 0x00000800 +#define ADDR_ERR_EVEN 0x00000400 +#define FLD_CRPT_ODD 0x00000200 +#define FLD_CRPT_EVEN 0x00000100 +#define FIFO_EN 0x00000080 +#define SRST 0x00000040 +#define FLD_DN_ODD 0x00000020 +#define FLD_DN_EVEN 0x00000010 +/* These should not be used. + * Use CAP_CONT_ODD/EVEN instead +#define CAP_SNGL_ODD 0x00000008 +#define CAP_SNGL_EVEN 0x00000004 +*/ +#define CAP_CONT_ODD 0x00000002 +#define CAP_CONT_EVEN 0x00000001 + +/* INT_CSR bit masks */ +#define FLD_START_EN 0x00000400 +#define FLD_END_ODD_EN 0x00000200 +#define FLD_END_EVEN_EN 0x00000100 +#define FLD_START 0x00000004 +#define FLD_END_ODD 0x00000002 +#define FLD_END_EVEN 0x00000001 + +/* IIC_CSR1 bit masks */ +#define DIRECT_ABORT 0x00000200 + +/* IIC_CSR2 bit masks */ +#define NEW_CYCLE 0x01000000 +#define DIR_RD 0x00010000 +#define IIC_READ 0x01010000 +#define IIC_WRITE 0x01000000 + +/* CSR2 bit masks */ +#define DISP_PASS 0x40 +#define BUSY_ODD 0x20 +#define BUSY_EVEN 0x10 +#define SYNC_PRESENT 0x08 +#define VT_50HZ 0x04 +#define SYNC_SNTL 0x02 +#define CHROM_FILT 0x01 +#define VT_60HZ 0x00 + +/* CSR_EVEN/ODD bit masks */ +#define CSR_ERROR 0x04 +#define CSR_SNGL 0x02 +#define CSR_DONE 0x01 + +/* CONFIG bit masks */ +#define PM_LUT_PGM 0x80 +#define PM_LUT_SEL 0x40 +#define CLIP_EN 0x20 +#define HSCALE_EN 0x10 +#define EXT_TRIG_UP 0x0C +#define EXT_TRIG_DOWN 0x04 +#define ACQ_MODE_NEXT 0x02 +#define ACQ_MODE_ODD 0x01 +#define ACQ_MODE_EVEN 0x00 + +/* AD_CMD bit masks */ +#define VIDEO_CNL_1 0x00 +#define VIDEO_CNL_2 0x40 +#define VIDEO_CNL_3 0x80 +#define VIDEO_CNL_4 0xC0 +#define SYNC_CNL_1 0x00 +#define SYNC_CNL_2 0x10 +#define SYNC_CNL_3 0x20 +#define SYNC_CNL_4 0x30 +#define SYNC_LVL_1 0x00 +#define SYNC_LVL_2 0x04 +#define SYNC_LVL_3 0x08 +#define SYNC_LVL_4 0x0C + +/* DT3155 identificator */ +#define DT3155_ID 0x20 + +/* per board private data structure */ +/** + * struct dt3155_priv - private data structure + * + * @v4l2_dev: v4l2_device structure + * @vdev: video_device structure + * @pdev: pointer to pci_dev structure + * @vidq: vb2_queue structure + * @alloc_ctx: dma_contig allocation context + * @curr_buf: pointer to curren buffer + * @mux: mutex to protect the instance + * @dmaq: queue for dma buffers + * @lock: spinlock for dma queue + * @std: input standard + * @width: frame width + * @height: frame height + * @input: current input + * @sequence: frame counter + * @stats: statistics structure + * @regs: local copy of mmio base register + * @csr2: local copy of csr2 register + * @config: local copy of config register + */ +struct dt3155_priv { + struct v4l2_device v4l2_dev; + struct video_device vdev; + struct pci_dev *pdev; + struct vb2_queue vidq; + struct vb2_alloc_ctx *alloc_ctx; + struct vb2_buffer *curr_buf; + struct mutex mux; + struct list_head dmaq; + spinlock_t lock; + v4l2_std_id std; + unsigned width, height; + unsigned input; + unsigned int sequence; + void __iomem *regs; + u8 csr2, config; +}; + +#endif /* _DT3155_H_ */ diff --git a/drivers/staging/media/Kconfig b/drivers/staging/media/Kconfig index 96498b7fc20e..14697686eea5 100644 --- a/drivers/staging/media/Kconfig +++ b/drivers/staging/media/Kconfig @@ -25,8 +25,6 @@ source "drivers/staging/media/cxd2099/Kconfig" source "drivers/staging/media/davinci_vpfe/Kconfig" -source "drivers/staging/media/dt3155v4l/Kconfig" - source "drivers/staging/media/mn88472/Kconfig" source "drivers/staging/media/mn88473/Kconfig" diff --git a/drivers/staging/media/Makefile b/drivers/staging/media/Makefile index a9006bcb4472..34c557b4c6d6 100644 --- a/drivers/staging/media/Makefile +++ b/drivers/staging/media/Makefile @@ -1,7 +1,6 @@ obj-$(CONFIG_I2C_BCM2048) += bcm2048/ obj-$(CONFIG_DVB_CXD2099) += cxd2099/ obj-$(CONFIG_LIRC_STAGING) += lirc/ -obj-$(CONFIG_VIDEO_DT3155) += dt3155v4l/ obj-$(CONFIG_VIDEO_DM365_VPFE) += davinci_vpfe/ obj-$(CONFIG_VIDEO_OMAP4) += omap4iss/ obj-$(CONFIG_DVB_MN88472) += mn88472/ diff --git a/drivers/staging/media/dt3155v4l/Kconfig b/drivers/staging/media/dt3155v4l/Kconfig deleted file mode 100644 index fcbcba6e58d2..000000000000 --- a/drivers/staging/media/dt3155v4l/Kconfig +++ /dev/null @@ -1,13 +0,0 @@ -config VIDEO_DT3155 - tristate "DT3155 frame grabber, Video4Linux interface" - depends on PCI && VIDEO_DEV && VIDEO_V4L2 - depends on HAS_DMA - select VIDEOBUF2_DMA_CONTIG - default n - ---help--- - Enables dt3155 device driver for the DataTranslation DT3155 frame grabber. - Say Y here if you have this hardware. - In doubt, say N. - - To compile this driver as a module, choose M here: the - module will be called dt3155v4l. diff --git a/drivers/staging/media/dt3155v4l/Makefile b/drivers/staging/media/dt3155v4l/Makefile deleted file mode 100644 index ce7a3ec2faf3..000000000000 --- a/drivers/staging/media/dt3155v4l/Makefile +++ /dev/null @@ -1 +0,0 @@ -obj-$(CONFIG_VIDEO_DT3155) += dt3155v4l.o diff --git a/drivers/staging/media/dt3155v4l/dt3155v4l.c b/drivers/staging/media/dt3155v4l/dt3155v4l.c deleted file mode 100644 index 43c9e0f97876..000000000000 --- a/drivers/staging/media/dt3155v4l/dt3155v4l.c +++ /dev/null @@ -1,626 +0,0 @@ -/*************************************************************************** - * Copyright (C) 2006-2010 by Marin Mitov * - * mitov@issp.bas.bg * - * * - * This program is free software; you can redistribute it and/or modify * - * it under the terms of the GNU General Public License as published by * - * the Free Software Foundation; either version 2 of the License, or * - * (at your option) any later version. * - * * - * This program is distributed in the hope that it will be useful, * - * but WITHOUT ANY WARRANTY; without even the implied warranty of * - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * - * GNU General Public License for more details. * - * * - ***************************************************************************/ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include "dt3155v4l.h" - -#define DT3155_DEVICE_ID 0x1223 - -/** - * read_i2c_reg - reads an internal i2c register - * - * @addr: dt3155 mmio base address - * @index: index (internal address) of register to read - * @data: pointer to byte the read data will be placed in - * - * returns: zero on success or error code - * - * This function starts reading the specified (by index) register - * and busy waits for the process to finish. The result is placed - * in a byte pointed by data. - */ -static int read_i2c_reg(void __iomem *addr, u8 index, u8 *data) -{ - u32 tmp = index; - - iowrite32((tmp << 17) | IIC_READ, addr + IIC_CSR2); - mmiowb(); - udelay(45); /* wait at least 43 usec for NEW_CYCLE to clear */ - if (ioread32(addr + IIC_CSR2) & NEW_CYCLE) - return -EIO; /* error: NEW_CYCLE not cleared */ - tmp = ioread32(addr + IIC_CSR1); - if (tmp & DIRECT_ABORT) { - /* reset DIRECT_ABORT bit */ - iowrite32(DIRECT_ABORT, addr + IIC_CSR1); - return -EIO; /* error: DIRECT_ABORT set */ - } - *data = tmp >> 24; - return 0; -} - -/** - * write_i2c_reg - writes to an internal i2c register - * - * @addr: dt3155 mmio base address - * @index: index (internal address) of register to read - * @data: data to be written - * - * returns: zero on success or error code - * - * This function starts writing the specified (by index) register - * and busy waits for the process to finish. - */ -static int write_i2c_reg(void __iomem *addr, u8 index, u8 data) -{ - u32 tmp = index; - - iowrite32((tmp << 17) | IIC_WRITE | data, addr + IIC_CSR2); - mmiowb(); - udelay(65); /* wait at least 63 usec for NEW_CYCLE to clear */ - if (ioread32(addr + IIC_CSR2) & NEW_CYCLE) - return -EIO; /* error: NEW_CYCLE not cleared */ - if (ioread32(addr + IIC_CSR1) & DIRECT_ABORT) { - /* reset DIRECT_ABORT bit */ - iowrite32(DIRECT_ABORT, addr + IIC_CSR1); - return -EIO; /* error: DIRECT_ABORT set */ - } - return 0; -} - -/** - * write_i2c_reg_nowait - writes to an internal i2c register - * - * @addr: dt3155 mmio base address - * @index: index (internal address) of register to read - * @data: data to be written - * - * This function starts writing the specified (by index) register - * and then returns. - */ -static void write_i2c_reg_nowait(void __iomem *addr, u8 index, u8 data) -{ - u32 tmp = index; - - iowrite32((tmp << 17) | IIC_WRITE | data, addr + IIC_CSR2); - mmiowb(); -} - -/** - * wait_i2c_reg - waits the read/write to finish - * - * @addr: dt3155 mmio base address - * - * returns: zero on success or error code - * - * This function waits reading/writing to finish. - */ -static int wait_i2c_reg(void __iomem *addr) -{ - if (ioread32(addr + IIC_CSR2) & NEW_CYCLE) - udelay(65); /* wait at least 63 usec for NEW_CYCLE to clear */ - if (ioread32(addr + IIC_CSR2) & NEW_CYCLE) - return -EIO; /* error: NEW_CYCLE not cleared */ - if (ioread32(addr + IIC_CSR1) & DIRECT_ABORT) { - /* reset DIRECT_ABORT bit */ - iowrite32(DIRECT_ABORT, addr + IIC_CSR1); - return -EIO; /* error: DIRECT_ABORT set */ - } - return 0; -} - -static int -dt3155_queue_setup(struct vb2_queue *vq, const struct v4l2_format *fmt, - unsigned int *nbuffers, unsigned int *num_planes, - unsigned int sizes[], void *alloc_ctxs[]) - -{ - struct dt3155_priv *pd = vb2_get_drv_priv(vq); - unsigned size = pd->width * pd->height; - - if (vq->num_buffers + *nbuffers < 2) - *nbuffers = 2 - vq->num_buffers; - if (fmt && fmt->fmt.pix.sizeimage < size) - return -EINVAL; - *num_planes = 1; - sizes[0] = fmt ? fmt->fmt.pix.sizeimage : size; - alloc_ctxs[0] = pd->alloc_ctx; - return 0; -} - -static int dt3155_buf_prepare(struct vb2_buffer *vb) -{ - struct dt3155_priv *pd = vb2_get_drv_priv(vb->vb2_queue); - - vb2_set_plane_payload(vb, 0, pd->width * pd->height); - return 0; -} - -static int dt3155_start_streaming(struct vb2_queue *q, unsigned count) -{ - struct dt3155_priv *pd = vb2_get_drv_priv(q); - struct vb2_buffer *vb = pd->curr_buf; - dma_addr_t dma_addr; - - pd->sequence = 0; - dma_addr = vb2_dma_contig_plane_dma_addr(vb, 0); - iowrite32(dma_addr, pd->regs + EVEN_DMA_START); - iowrite32(dma_addr + pd->width, pd->regs + ODD_DMA_START); - iowrite32(pd->width, pd->regs + EVEN_DMA_STRIDE); - iowrite32(pd->width, pd->regs + ODD_DMA_STRIDE); - /* enable interrupts, clear all irq flags */ - iowrite32(FLD_START_EN | FLD_END_ODD_EN | FLD_START | - FLD_END_EVEN | FLD_END_ODD, pd->regs + INT_CSR); - iowrite32(FIFO_EN | SRST | FLD_CRPT_ODD | FLD_CRPT_EVEN | - FLD_DN_ODD | FLD_DN_EVEN | CAP_CONT_EVEN | CAP_CONT_ODD, - pd->regs + CSR1); - wait_i2c_reg(pd->regs); - write_i2c_reg(pd->regs, CONFIG, pd->config); - write_i2c_reg(pd->regs, EVEN_CSR, CSR_ERROR | CSR_DONE); - write_i2c_reg(pd->regs, ODD_CSR, CSR_ERROR | CSR_DONE); - - /* start the board */ - write_i2c_reg(pd->regs, CSR2, pd->csr2 | BUSY_EVEN | BUSY_ODD); - return 0; -} - -static void dt3155_stop_streaming(struct vb2_queue *q) -{ - struct dt3155_priv *pd = vb2_get_drv_priv(q); - struct vb2_buffer *vb; - - spin_lock_irq(&pd->lock); - /* stop the board */ - write_i2c_reg_nowait(pd->regs, CSR2, pd->csr2); - iowrite32(FIFO_EN | SRST | FLD_CRPT_ODD | FLD_CRPT_EVEN | - FLD_DN_ODD | FLD_DN_EVEN, pd->regs + CSR1); - /* disable interrupts, clear all irq flags */ - iowrite32(FLD_START | FLD_END_EVEN | FLD_END_ODD, pd->regs + INT_CSR); - spin_unlock_irq(&pd->lock); - - /* - * It is not clear whether the DMA stops at once or whether it - * will finish the current frame or field first. To be on the - * safe side we wait a bit. - */ - msleep(45); - - spin_lock_irq(&pd->lock); - if (pd->curr_buf) { - vb2_buffer_done(pd->curr_buf, VB2_BUF_STATE_ERROR); - pd->curr_buf = NULL; - } - - while (!list_empty(&pd->dmaq)) { - vb = list_first_entry(&pd->dmaq, typeof(*vb), done_entry); - list_del(&vb->done_entry); - vb2_buffer_done(vb, VB2_BUF_STATE_ERROR); - } - spin_unlock_irq(&pd->lock); -} - -static void dt3155_buf_queue(struct vb2_buffer *vb) -{ - struct dt3155_priv *pd = vb2_get_drv_priv(vb->vb2_queue); - - /* pd->vidq.streaming = 1 when dt3155_buf_queue() is invoked */ - spin_lock_irq(&pd->lock); - if (pd->curr_buf) - list_add_tail(&vb->done_entry, &pd->dmaq); - else - pd->curr_buf = vb; - spin_unlock_irq(&pd->lock); -} - -static const struct vb2_ops q_ops = { - .queue_setup = dt3155_queue_setup, - .wait_prepare = vb2_ops_wait_prepare, - .wait_finish = vb2_ops_wait_finish, - .buf_prepare = dt3155_buf_prepare, - .start_streaming = dt3155_start_streaming, - .stop_streaming = dt3155_stop_streaming, - .buf_queue = dt3155_buf_queue, -}; - -static irqreturn_t dt3155_irq_handler_even(int irq, void *dev_id) -{ - struct dt3155_priv *ipd = dev_id; - struct vb2_buffer *ivb; - dma_addr_t dma_addr; - u32 tmp; - - tmp = ioread32(ipd->regs + INT_CSR) & (FLD_START | FLD_END_ODD); - if (!tmp) - return IRQ_NONE; /* not our irq */ - if ((tmp & FLD_START) && !(tmp & FLD_END_ODD)) { - iowrite32(FLD_START_EN | FLD_END_ODD_EN | FLD_START, - ipd->regs + INT_CSR); - return IRQ_HANDLED; /* start of field irq */ - } - tmp = ioread32(ipd->regs + CSR1) & (FLD_CRPT_EVEN | FLD_CRPT_ODD); - if (tmp) { - iowrite32(FIFO_EN | SRST | FLD_CRPT_ODD | FLD_CRPT_EVEN | - FLD_DN_ODD | FLD_DN_EVEN | - CAP_CONT_EVEN | CAP_CONT_ODD, - ipd->regs + CSR1); - mmiowb(); - } - - spin_lock(&ipd->lock); - if (ipd->curr_buf && !list_empty(&ipd->dmaq)) { - v4l2_get_timestamp(&ipd->curr_buf->v4l2_buf.timestamp); - ipd->curr_buf->v4l2_buf.sequence = ipd->sequence++; - ipd->curr_buf->v4l2_buf.field = V4L2_FIELD_NONE; - vb2_buffer_done(ipd->curr_buf, VB2_BUF_STATE_DONE); - - ivb = list_first_entry(&ipd->dmaq, typeof(*ivb), done_entry); - list_del(&ivb->done_entry); - ipd->curr_buf = ivb; - dma_addr = vb2_dma_contig_plane_dma_addr(ivb, 0); - iowrite32(dma_addr, ipd->regs + EVEN_DMA_START); - iowrite32(dma_addr + ipd->width, ipd->regs + ODD_DMA_START); - iowrite32(ipd->width, ipd->regs + EVEN_DMA_STRIDE); - iowrite32(ipd->width, ipd->regs + ODD_DMA_STRIDE); - mmiowb(); - } - - /* enable interrupts, clear all irq flags */ - iowrite32(FLD_START_EN | FLD_END_ODD_EN | FLD_START | - FLD_END_EVEN | FLD_END_ODD, ipd->regs + INT_CSR); - spin_unlock(&ipd->lock); - return IRQ_HANDLED; -} - -static const struct v4l2_file_operations dt3155_fops = { - .owner = THIS_MODULE, - .open = v4l2_fh_open, - .release = vb2_fop_release, - .unlocked_ioctl = video_ioctl2, - .read = vb2_fop_read, - .mmap = vb2_fop_mmap, - .poll = vb2_fop_poll -}; - -static int dt3155_querycap(struct file *filp, void *p, struct v4l2_capability *cap) -{ - struct dt3155_priv *pd = video_drvdata(filp); - - strcpy(cap->driver, DT3155_NAME); - strcpy(cap->card, DT3155_NAME " frame grabber"); - sprintf(cap->bus_info, "PCI:%s", pci_name(pd->pdev)); - cap->device_caps = V4L2_CAP_VIDEO_CAPTURE | - V4L2_CAP_STREAMING | V4L2_CAP_READWRITE; - cap->capabilities = cap->device_caps | V4L2_CAP_DEVICE_CAPS; - return 0; -} - -static int dt3155_enum_fmt_vid_cap(struct file *filp, void *p, struct v4l2_fmtdesc *f) -{ - if (f->index) - return -EINVAL; - f->pixelformat = V4L2_PIX_FMT_GREY; - strcpy(f->description, "8-bit Greyscale"); - return 0; -} - -static int dt3155_fmt_vid_cap(struct file *filp, void *p, struct v4l2_format *f) -{ - struct dt3155_priv *pd = video_drvdata(filp); - - f->fmt.pix.width = pd->width; - f->fmt.pix.height = pd->height; - f->fmt.pix.pixelformat = V4L2_PIX_FMT_GREY; - f->fmt.pix.field = V4L2_FIELD_NONE; - f->fmt.pix.bytesperline = f->fmt.pix.width; - f->fmt.pix.sizeimage = f->fmt.pix.width * f->fmt.pix.height; - f->fmt.pix.colorspace = V4L2_COLORSPACE_SMPTE170M; - return 0; -} - -static int dt3155_g_std(struct file *filp, void *p, v4l2_std_id *norm) -{ - struct dt3155_priv *pd = video_drvdata(filp); - - *norm = pd->std; - return 0; -} - -static int dt3155_s_std(struct file *filp, void *p, v4l2_std_id norm) -{ - struct dt3155_priv *pd = video_drvdata(filp); - - if (pd->std == norm) - return 0; - if (vb2_is_busy(&pd->vidq)) - return -EBUSY; - pd->std = norm; - if (pd->std & V4L2_STD_525_60) { - pd->csr2 = VT_60HZ; - pd->width = 640; - pd->height = 480; - } else { - pd->csr2 = VT_50HZ; - pd->width = 768; - pd->height = 576; - } - return 0; -} - -static int dt3155_enum_input(struct file *filp, void *p, struct v4l2_input *input) -{ - if (input->index > 3) - return -EINVAL; - if (input->index) - snprintf(input->name, sizeof(input->name), "VID%d", input->index); - else - strlcpy(input->name, "J2/VID0", sizeof(input->name)); - input->type = V4L2_INPUT_TYPE_CAMERA; - input->std = V4L2_STD_ALL; - input->status = 0; - return 0; -} - -static int dt3155_g_input(struct file *filp, void *p, unsigned int *i) -{ - struct dt3155_priv *pd = video_drvdata(filp); - - *i = pd->input; - return 0; -} - -static int dt3155_s_input(struct file *filp, void *p, unsigned int i) -{ - struct dt3155_priv *pd = video_drvdata(filp); - - if (i > 3) - return -EINVAL; - pd->input = i; - write_i2c_reg(pd->regs, AD_ADDR, AD_CMD_REG); - write_i2c_reg(pd->regs, AD_CMD, (i << 6) | (i << 4) | SYNC_LVL_3); - return 0; -} - -static const struct v4l2_ioctl_ops dt3155_ioctl_ops = { - .vidioc_querycap = dt3155_querycap, - .vidioc_enum_fmt_vid_cap = dt3155_enum_fmt_vid_cap, - .vidioc_try_fmt_vid_cap = dt3155_fmt_vid_cap, - .vidioc_g_fmt_vid_cap = dt3155_fmt_vid_cap, - .vidioc_s_fmt_vid_cap = dt3155_fmt_vid_cap, - .vidioc_reqbufs = vb2_ioctl_reqbufs, - .vidioc_create_bufs = vb2_ioctl_create_bufs, - .vidioc_querybuf = vb2_ioctl_querybuf, - .vidioc_expbuf = vb2_ioctl_expbuf, - .vidioc_qbuf = vb2_ioctl_qbuf, - .vidioc_dqbuf = vb2_ioctl_dqbuf, - .vidioc_streamon = vb2_ioctl_streamon, - .vidioc_streamoff = vb2_ioctl_streamoff, - .vidioc_g_std = dt3155_g_std, - .vidioc_s_std = dt3155_s_std, - .vidioc_enum_input = dt3155_enum_input, - .vidioc_g_input = dt3155_g_input, - .vidioc_s_input = dt3155_s_input, -}; - -static int dt3155_init_board(struct dt3155_priv *pd) -{ - struct pci_dev *pdev = pd->pdev; - int i; - u8 tmp = 0; - - pci_set_master(pdev); /* dt3155 needs it */ - - /* resetting the adapter */ - iowrite32(ADDR_ERR_ODD | ADDR_ERR_EVEN | FLD_CRPT_ODD | FLD_CRPT_EVEN | - FLD_DN_ODD | FLD_DN_EVEN, pd->regs + CSR1); - mmiowb(); - msleep(20); - - /* initializing adapter registers */ - iowrite32(FIFO_EN | SRST, pd->regs + CSR1); - mmiowb(); - iowrite32(0xEEEEEE01, pd->regs + EVEN_PIXEL_FMT); - iowrite32(0xEEEEEE01, pd->regs + ODD_PIXEL_FMT); - iowrite32(0x00000020, pd->regs + FIFO_TRIGER); - iowrite32(0x00000103, pd->regs + XFER_MODE); - iowrite32(0, pd->regs + RETRY_WAIT_CNT); - iowrite32(0, pd->regs + INT_CSR); - iowrite32(1, pd->regs + EVEN_FLD_MASK); - iowrite32(1, pd->regs + ODD_FLD_MASK); - iowrite32(0, pd->regs + MASK_LENGTH); - iowrite32(0x0005007C, pd->regs + FIFO_FLAG_CNT); - iowrite32(0x01010101, pd->regs + IIC_CLK_DUR); - mmiowb(); - - /* verifying that we have a DT3155 board (not just a SAA7116 chip) */ - read_i2c_reg(pd->regs, DT_ID, &tmp); - if (tmp != DT3155_ID) - return -ENODEV; - - /* initialize AD LUT */ - write_i2c_reg(pd->regs, AD_ADDR, 0); - for (i = 0; i < 256; i++) - write_i2c_reg(pd->regs, AD_LUT, i); - - /* initialize ADC references */ - /* FIXME: pos_ref & neg_ref depend on VT_50HZ */ - write_i2c_reg(pd->regs, AD_ADDR, AD_CMD_REG); - write_i2c_reg(pd->regs, AD_CMD, VIDEO_CNL_1 | SYNC_CNL_1 | SYNC_LVL_3); - write_i2c_reg(pd->regs, AD_ADDR, AD_POS_REF); - write_i2c_reg(pd->regs, AD_CMD, 34); - write_i2c_reg(pd->regs, AD_ADDR, AD_NEG_REF); - write_i2c_reg(pd->regs, AD_CMD, 0); - - /* initialize PM LUT */ - write_i2c_reg(pd->regs, CONFIG, pd->config | PM_LUT_PGM); - for (i = 0; i < 256; i++) { - write_i2c_reg(pd->regs, PM_LUT_ADDR, i); - write_i2c_reg(pd->regs, PM_LUT_DATA, i); - } - write_i2c_reg(pd->regs, CONFIG, pd->config | PM_LUT_PGM | PM_LUT_SEL); - for (i = 0; i < 256; i++) { - write_i2c_reg(pd->regs, PM_LUT_ADDR, i); - write_i2c_reg(pd->regs, PM_LUT_DATA, i); - } - write_i2c_reg(pd->regs, CONFIG, pd->config); /* ACQ_MODE_EVEN */ - - /* select channel 1 for input and set sync level */ - write_i2c_reg(pd->regs, AD_ADDR, AD_CMD_REG); - write_i2c_reg(pd->regs, AD_CMD, VIDEO_CNL_1 | SYNC_CNL_1 | SYNC_LVL_3); - - /* disable all irqs, clear all irq flags */ - iowrite32(FLD_START | FLD_END_EVEN | FLD_END_ODD, - pd->regs + INT_CSR); - - return 0; -} - -static struct video_device dt3155_vdev = { - .name = DT3155_NAME, - .fops = &dt3155_fops, - .ioctl_ops = &dt3155_ioctl_ops, - .minor = -1, - .release = video_device_release_empty, - .tvnorms = V4L2_STD_ALL, -}; - -static int dt3155_probe(struct pci_dev *pdev, const struct pci_device_id *id) -{ - int err; - struct dt3155_priv *pd; - - err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)); - if (err) - return -ENODEV; - pd = devm_kzalloc(&pdev->dev, sizeof(*pd), GFP_KERNEL); - if (!pd) - return -ENOMEM; - - err = v4l2_device_register(&pdev->dev, &pd->v4l2_dev); - if (err) - return err; - pd->vdev = dt3155_vdev; - pd->vdev.v4l2_dev = &pd->v4l2_dev; - video_set_drvdata(&pd->vdev, pd); /* for use in video_fops */ - pd->pdev = pdev; - pd->std = V4L2_STD_625_50; - pd->csr2 = VT_50HZ; - pd->width = 768; - pd->height = 576; - INIT_LIST_HEAD(&pd->dmaq); - mutex_init(&pd->mux); - pd->vdev.lock = &pd->mux; /* for locking v4l2_file_operations */ - pd->vidq.type = V4L2_BUF_TYPE_VIDEO_CAPTURE; - pd->vidq.timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC; - pd->vidq.io_modes = VB2_MMAP | VB2_DMABUF | VB2_READ; - pd->vidq.ops = &q_ops; - pd->vidq.mem_ops = &vb2_dma_contig_memops; - pd->vidq.drv_priv = pd; - pd->vidq.min_buffers_needed = 2; - pd->vidq.lock = &pd->mux; /* for locking v4l2_file_operations */ - pd->vdev.queue = &pd->vidq; - err = vb2_queue_init(&pd->vidq); - if (err < 0) - goto err_v4l2_dev_unreg; - pd->alloc_ctx = vb2_dma_contig_init_ctx(&pdev->dev); - if (IS_ERR(pd->alloc_ctx)) { - dev_err(&pdev->dev, "Can't allocate buffer context"); - err = PTR_ERR(pd->alloc_ctx); - goto err_v4l2_dev_unreg; - } - spin_lock_init(&pd->lock); - pd->config = ACQ_MODE_EVEN; - err = pci_enable_device(pdev); - if (err) - goto err_free_ctx; - err = pci_request_region(pdev, 0, pci_name(pdev)); - if (err) - goto err_pci_disable; - pd->regs = pci_iomap(pdev, 0, pci_resource_len(pd->pdev, 0)); - if (!pd->regs) { - err = -ENOMEM; - goto err_free_reg; - } - err = dt3155_init_board(pd); - if (err) - goto err_iounmap; - err = request_irq(pd->pdev->irq, dt3155_irq_handler_even, - IRQF_SHARED, DT3155_NAME, pd); - if (err) - goto err_iounmap; - err = video_register_device(&pd->vdev, VFL_TYPE_GRABBER, -1); - if (err) - goto err_free_irq; - dev_info(&pdev->dev, "/dev/video%i is ready\n", pd->vdev.minor); - return 0; /* success */ - -err_free_irq: - free_irq(pd->pdev->irq, pd); -err_iounmap: - pci_iounmap(pdev, pd->regs); -err_free_reg: - pci_release_region(pdev, 0); -err_pci_disable: - pci_disable_device(pdev); -err_free_ctx: - vb2_dma_contig_cleanup_ctx(pd->alloc_ctx); -err_v4l2_dev_unreg: - v4l2_device_unregister(&pd->v4l2_dev); - return err; -} - -static void dt3155_remove(struct pci_dev *pdev) -{ - struct v4l2_device *v4l2_dev = pci_get_drvdata(pdev); - struct dt3155_priv *pd = container_of(v4l2_dev, struct dt3155_priv, v4l2_dev); - - video_unregister_device(&pd->vdev); - free_irq(pd->pdev->irq, pd); - vb2_queue_release(&pd->vidq); - v4l2_device_unregister(&pd->v4l2_dev); - pci_iounmap(pdev, pd->regs); - pci_release_region(pdev, 0); - pci_disable_device(pdev); - vb2_dma_contig_cleanup_ctx(pd->alloc_ctx); -} - -static const struct pci_device_id pci_ids[] = { - { PCI_DEVICE(PCI_VENDOR_ID_INTEL, DT3155_DEVICE_ID) }, - { 0, /* zero marks the end */ }, -}; -MODULE_DEVICE_TABLE(pci, pci_ids); - -static struct pci_driver pci_driver = { - .name = DT3155_NAME, - .id_table = pci_ids, - .probe = dt3155_probe, - .remove = dt3155_remove, -}; - -module_pci_driver(pci_driver); - -MODULE_DESCRIPTION("video4linux pci-driver for dt3155 frame grabber"); -MODULE_AUTHOR("Marin Mitov "); -MODULE_VERSION(DT3155_VERSION); -MODULE_LICENSE("GPL"); diff --git a/drivers/staging/media/dt3155v4l/dt3155v4l.h b/drivers/staging/media/dt3155v4l/dt3155v4l.h deleted file mode 100644 index bcf7b5ef75e6..000000000000 --- a/drivers/staging/media/dt3155v4l/dt3155v4l.h +++ /dev/null @@ -1,196 +0,0 @@ -/*************************************************************************** - * Copyright (C) 2006-2010 by Marin Mitov * - * mitov@issp.bas.bg * - * * - * This program is free software; you can redistribute it and/or modify * - * it under the terms of the GNU General Public License as published by * - * the Free Software Foundation; either version 2 of the License, or * - * (at your option) any later version. * - * * - * This program is distributed in the hope that it will be useful, * - * but WITHOUT ANY WARRANTY; without even the implied warranty of * - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * - * GNU General Public License for more details. * - * * - ***************************************************************************/ - -/* DT3155 header file */ -#ifndef _DT3155_H_ -#define _DT3155_H_ - -#include -#include -#include -#include - -#define DT3155_NAME "dt3155" -#define DT3155_VER_MAJ 1 -#define DT3155_VER_MIN 1 -#define DT3155_VER_EXT 0 -#define DT3155_VERSION __stringify(DT3155_VER_MAJ) "." \ - __stringify(DT3155_VER_MIN) "." \ - __stringify(DT3155_VER_EXT) - -/* DT3155 Base Register offsets (memory mapped) */ -#define EVEN_DMA_START 0x00 -#define ODD_DMA_START 0x0C -#define EVEN_DMA_STRIDE 0x18 -#define ODD_DMA_STRIDE 0x24 -#define EVEN_PIXEL_FMT 0x30 -#define ODD_PIXEL_FMT 0x34 -#define FIFO_TRIGER 0x38 -#define XFER_MODE 0x3C -#define CSR1 0x40 -#define RETRY_WAIT_CNT 0x44 -#define INT_CSR 0x48 -#define EVEN_FLD_MASK 0x4C -#define ODD_FLD_MASK 0x50 -#define MASK_LENGTH 0x54 -#define FIFO_FLAG_CNT 0x58 -#define IIC_CLK_DUR 0x5C -#define IIC_CSR1 0x60 -#define IIC_CSR2 0x64 - -/* DT3155 Internal Registers indexes (i2c/IIC mapped) */ -#define CSR2 0x10 -#define EVEN_CSR 0x11 -#define ODD_CSR 0x12 -#define CONFIG 0x13 -#define DT_ID 0x1F -#define X_CLIP_START 0x20 -#define Y_CLIP_START 0x22 -#define X_CLIP_END 0x24 -#define Y_CLIP_END 0x26 -#define AD_ADDR 0x30 -#define AD_LUT 0x31 -#define AD_CMD 0x32 -#define DIG_OUT 0x40 -#define PM_LUT_ADDR 0x50 -#define PM_LUT_DATA 0x51 - -/* AD command register values */ -#define AD_CMD_REG 0x00 -#define AD_POS_REF 0x01 -#define AD_NEG_REF 0x02 - -/* CSR1 bit masks */ -#define RANGE_EN 0x00008000 -#define CRPT_DIS 0x00004000 -#define ADDR_ERR_ODD 0x00000800 -#define ADDR_ERR_EVEN 0x00000400 -#define FLD_CRPT_ODD 0x00000200 -#define FLD_CRPT_EVEN 0x00000100 -#define FIFO_EN 0x00000080 -#define SRST 0x00000040 -#define FLD_DN_ODD 0x00000020 -#define FLD_DN_EVEN 0x00000010 -/* These should not be used. - * Use CAP_CONT_ODD/EVEN instead -#define CAP_SNGL_ODD 0x00000008 -#define CAP_SNGL_EVEN 0x00000004 -*/ -#define CAP_CONT_ODD 0x00000002 -#define CAP_CONT_EVEN 0x00000001 - -/* INT_CSR bit masks */ -#define FLD_START_EN 0x00000400 -#define FLD_END_ODD_EN 0x00000200 -#define FLD_END_EVEN_EN 0x00000100 -#define FLD_START 0x00000004 -#define FLD_END_ODD 0x00000002 -#define FLD_END_EVEN 0x00000001 - -/* IIC_CSR1 bit masks */ -#define DIRECT_ABORT 0x00000200 - -/* IIC_CSR2 bit masks */ -#define NEW_CYCLE 0x01000000 -#define DIR_RD 0x00010000 -#define IIC_READ 0x01010000 -#define IIC_WRITE 0x01000000 - -/* CSR2 bit masks */ -#define DISP_PASS 0x40 -#define BUSY_ODD 0x20 -#define BUSY_EVEN 0x10 -#define SYNC_PRESENT 0x08 -#define VT_50HZ 0x04 -#define SYNC_SNTL 0x02 -#define CHROM_FILT 0x01 -#define VT_60HZ 0x00 - -/* CSR_EVEN/ODD bit masks */ -#define CSR_ERROR 0x04 -#define CSR_SNGL 0x02 -#define CSR_DONE 0x01 - -/* CONFIG bit masks */ -#define PM_LUT_PGM 0x80 -#define PM_LUT_SEL 0x40 -#define CLIP_EN 0x20 -#define HSCALE_EN 0x10 -#define EXT_TRIG_UP 0x0C -#define EXT_TRIG_DOWN 0x04 -#define ACQ_MODE_NEXT 0x02 -#define ACQ_MODE_ODD 0x01 -#define ACQ_MODE_EVEN 0x00 - -/* AD_CMD bit masks */ -#define VIDEO_CNL_1 0x00 -#define VIDEO_CNL_2 0x40 -#define VIDEO_CNL_3 0x80 -#define VIDEO_CNL_4 0xC0 -#define SYNC_CNL_1 0x00 -#define SYNC_CNL_2 0x10 -#define SYNC_CNL_3 0x20 -#define SYNC_CNL_4 0x30 -#define SYNC_LVL_1 0x00 -#define SYNC_LVL_2 0x04 -#define SYNC_LVL_3 0x08 -#define SYNC_LVL_4 0x0C - -/* DT3155 identificator */ -#define DT3155_ID 0x20 - -/* per board private data structure */ -/** - * struct dt3155_priv - private data structure - * - * @v4l2_dev: v4l2_device structure - * @vdev: video_device structure - * @pdev: pointer to pci_dev structure - * @vidq: vb2_queue structure - * @alloc_ctx: dma_contig allocation context - * @curr_buf: pointer to curren buffer - * @mux: mutex to protect the instance - * @dmaq: queue for dma buffers - * @lock: spinlock for dma queue - * @std: input standard - * @width: frame width - * @height: frame height - * @input: current input - * @sequence: frame counter - * @stats: statistics structure - * @regs: local copy of mmio base register - * @csr2: local copy of csr2 register - * @config: local copy of config register - */ -struct dt3155_priv { - struct v4l2_device v4l2_dev; - struct video_device vdev; - struct pci_dev *pdev; - struct vb2_queue vidq; - struct vb2_alloc_ctx *alloc_ctx; - struct vb2_buffer *curr_buf; - struct mutex mux; - struct list_head dmaq; - spinlock_t lock; - v4l2_std_id std; - unsigned width, height; - unsigned input; - unsigned int sequence; - void __iomem *regs; - u8 csr2, config; -}; - -#endif /* _DT3155_H_ */ -- cgit v1.2.3 From d3cc2e865055f58378de86c6b51a5636328ca827 Mon Sep 17 00:00:00 2001 From: Florian Fainelli Date: Fri, 10 Apr 2015 11:49:44 -0700 Subject: MAINTAINERS: Update mach-bcm maintainers list Add Ray Jui and Scott Branden for the mach-bcm/ entries. Signed-off-by: Florian Fainelli --- MAINTAINERS | 2 ++ 1 file changed, 2 insertions(+) (limited to 'MAINTAINERS') diff --git a/MAINTAINERS b/MAINTAINERS index 2e5bbc0d68b2..ba352d9ecbcf 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -2118,6 +2118,8 @@ F: drivers/net/ethernet/broadcom/bnx2x/ BROADCOM BCM281XX/BCM11XXX/BCM216XX ARM ARCHITECTURE M: Christian Daudt M: Florian Fainelli +M: Ray Jui +M: Scott Branden L: bcm-kernel-feedback-list@broadcom.com T: git git://github.com/broadcom/mach-bcm S: Maintained -- cgit v1.2.3 From 049a4c506586c293b6fe54b5c61762230417dbf8 Mon Sep 17 00:00:00 2001 From: Florian Fainelli Date: Fri, 10 Apr 2015 11:50:40 -0700 Subject: MAINTAINERS: Remove Christian Daudt for mach-bcm Christian has not been responding to mach-bcm related emails since around July 2013, and with Scott and Ray maintaining the platform, we should have enough coverage to get that going now. Signed-off-by: Florian Fainelli --- MAINTAINERS | 1 - 1 file changed, 1 deletion(-) (limited to 'MAINTAINERS') diff --git a/MAINTAINERS b/MAINTAINERS index ba352d9ecbcf..7222089a80a0 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -2116,7 +2116,6 @@ S: Supported F: drivers/net/ethernet/broadcom/bnx2x/ BROADCOM BCM281XX/BCM11XXX/BCM216XX ARM ARCHITECTURE -M: Christian Daudt M: Florian Fainelli M: Ray Jui M: Scott Branden -- cgit v1.2.3 From 1de2a662d0f2d3b211b7d10ea6578abe5c39eda3 Mon Sep 17 00:00:00 2001 From: Florian Fainelli Date: Fri, 10 Apr 2015 11:52:40 -0700 Subject: MAINTAINERS: Update brcmstb entry We have not heard back from Marc in a while, since we last asked him to ack/nack this change here: https://lkml.org/lkml/2015/1/14/1004 This was back in January, we are in the 3.21^W4.1 merge window now, so, as outlined in this email thread, remove him from the MAINTAINERS list now. Signed-off-by: Florian Fainelli --- MAINTAINERS | 1 - 1 file changed, 1 deletion(-) (limited to 'MAINTAINERS') diff --git a/MAINTAINERS b/MAINTAINERS index 7222089a80a0..0aa1a427f8ea 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -2169,7 +2169,6 @@ S: Maintained F: drivers/usb/gadget/udc/bcm63xx_udc.* BROADCOM BCM7XXX ARM ARCHITECTURE -M: Marc Carino M: Brian Norris M: Gregory Fong M: Florian Fainelli -- cgit v1.2.3 From feda5f939eafa4af94dfb547847806e0f2df73b8 Mon Sep 17 00:00:00 2001 From: Rusty Russell Date: Sat, 2 May 2015 08:42:38 +0930 Subject: virtio: pass baton to Michael Tsirkin With my job change kernel work will be "own time"; I'm keeping lguest and modules (and the virtio standards work), but virtio kernel has to go. This makes it clear that Michael is in charge. He's good, but having me watch over his shoulder won't help. Good luck Michael! Signed-off-by: Rusty Russell Signed-off-by: Linus Torvalds --- MAINTAINERS | 1 - 1 file changed, 1 deletion(-) (limited to 'MAINTAINERS') diff --git a/MAINTAINERS b/MAINTAINERS index 2e5bbc0d68b2..16227759dfa8 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -10523,7 +10523,6 @@ F: include/linux/virtio_console.h F: include/uapi/linux/virtio_console.h VIRTIO CORE, NET AND BLOCK DRIVERS -M: Rusty Russell M: "Michael S. Tsirkin" L: virtualization@lists.linux-foundation.org S: Maintained -- cgit v1.2.3 From 65bd4341d61678494ea14994d0d7df73644ca014 Mon Sep 17 00:00:00 2001 From: Suman Anna Date: Wed, 4 Mar 2015 20:01:16 -0600 Subject: hwspinlock/omap: add support for dt nodes HwSpinlock IP is present only on OMAP4 and other newer SoCs, which are all device-tree boot only. This patch adds the base support for parsing the DT nodes, and removes the code dealing with the traditional platform device instantiation. Signed-off-by: Suman Anna [tony@atomide.com: ack for legacy file removal] Acked-by: Tony Lindgren [comment on the imperfect always-zero base_id] Signed-off-by: Ohad Ben-Cohen --- MAINTAINERS | 1 - arch/arm/mach-omap2/Makefile | 3 -- arch/arm/mach-omap2/hwspinlock.c | 60 ------------------------------------ drivers/hwspinlock/omap_hwspinlock.c | 18 ++++++++--- 4 files changed, 14 insertions(+), 68 deletions(-) delete mode 100644 arch/arm/mach-omap2/hwspinlock.c (limited to 'MAINTAINERS') diff --git a/MAINTAINERS b/MAINTAINERS index 2e5bbc0d68b2..5fe8941ba12d 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -7095,7 +7095,6 @@ M: Ohad Ben-Cohen L: linux-omap@vger.kernel.org S: Maintained F: drivers/hwspinlock/omap_hwspinlock.c -F: arch/arm/mach-omap2/hwspinlock.c OMAP MMC SUPPORT M: Jarkko Lavinen diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile index ec002bd4af77..9a2c88e56bae 100644 --- a/arch/arm/mach-omap2/Makefile +++ b/arch/arm/mach-omap2/Makefile @@ -277,8 +277,5 @@ obj-y += $(nand-m) $(nand-y) smsc911x-$(CONFIG_SMSC911X) := gpmc-smsc911x.o obj-y += $(smsc911x-m) $(smsc911x-y) -ifneq ($(CONFIG_HWSPINLOCK_OMAP),) -obj-y += hwspinlock.o -endif obj-y += common-board-devices.o twl-common.o dss-common.o diff --git a/arch/arm/mach-omap2/hwspinlock.c b/arch/arm/mach-omap2/hwspinlock.c deleted file mode 100644 index ef175acaeaa2..000000000000 --- a/arch/arm/mach-omap2/hwspinlock.c +++ /dev/null @@ -1,60 +0,0 @@ -/* - * OMAP hardware spinlock device initialization - * - * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com - * - * Contact: Simon Que - * Hari Kanigeri - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but - * WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * General Public License for more details. - */ - -#include -#include -#include -#include - -#include "soc.h" -#include "omap_hwmod.h" -#include "omap_device.h" - -static struct hwspinlock_pdata omap_hwspinlock_pdata __initdata = { - .base_id = 0, -}; - -static int __init hwspinlocks_init(void) -{ - int retval = 0; - struct omap_hwmod *oh; - struct platform_device *pdev; - const char *oh_name = "spinlock"; - const char *dev_name = "omap_hwspinlock"; - - /* - * Hwmod lookup will fail in case our platform doesn't support the - * hardware spinlock module, so it is safe to run this initcall - * on all omaps - */ - oh = omap_hwmod_lookup(oh_name); - if (oh == NULL) - return -EINVAL; - - pdev = omap_device_build(dev_name, 0, oh, &omap_hwspinlock_pdata, - sizeof(struct hwspinlock_pdata)); - if (IS_ERR(pdev)) { - pr_err("Can't build omap_device for %s:%s\n", dev_name, - oh_name); - retval = PTR_ERR(pdev); - } - - return retval; -} -/* early board code might need to reserve specific hwspinlock instances */ -omap_postcore_initcall(hwspinlocks_init); diff --git a/drivers/hwspinlock/omap_hwspinlock.c b/drivers/hwspinlock/omap_hwspinlock.c index 47a275c6ece1..ad2f8cac8487 100644 --- a/drivers/hwspinlock/omap_hwspinlock.c +++ b/drivers/hwspinlock/omap_hwspinlock.c @@ -1,7 +1,7 @@ /* * OMAP hardware spinlock driver * - * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com + * Copyright (C) 2010-2015 Texas Instruments Incorporated - http://www.ti.com * * Contact: Simon Que * Hari Kanigeri @@ -27,6 +27,7 @@ #include #include #include +#include #include #include "hwspinlock_internal.h" @@ -80,14 +81,16 @@ static const struct hwspinlock_ops omap_hwspinlock_ops = { static int omap_hwspinlock_probe(struct platform_device *pdev) { - struct hwspinlock_pdata *pdata = pdev->dev.platform_data; + struct device_node *node = pdev->dev.of_node; struct hwspinlock_device *bank; struct hwspinlock *hwlock; struct resource *res; void __iomem *io_base; int num_locks, i, ret; + /* Only a single hwspinlock block device is supported */ + int base_id = 0; - if (!pdata) + if (!node) return -ENODEV; res = platform_get_resource(pdev, IORESOURCE_MEM, 0); @@ -141,7 +144,7 @@ static int omap_hwspinlock_probe(struct platform_device *pdev) hwlock->priv = io_base + LOCK_BASE_OFFSET + sizeof(u32) * i; ret = hwspin_lock_register(bank, &pdev->dev, &omap_hwspinlock_ops, - pdata->base_id, num_locks); + base_id, num_locks); if (ret) goto reg_fail; @@ -174,11 +177,18 @@ static int omap_hwspinlock_remove(struct platform_device *pdev) return 0; } +static const struct of_device_id omap_hwspinlock_of_match[] = { + { .compatible = "ti,omap4-hwspinlock", }, + { /* end */ }, +}; +MODULE_DEVICE_TABLE(of, omap_hwspinlock_of_match); + static struct platform_driver omap_hwspinlock_driver = { .probe = omap_hwspinlock_probe, .remove = omap_hwspinlock_remove, .driver = { .name = "omap_hwspinlock", + .of_match_table = of_match_ptr(omap_hwspinlock_of_match), }, }; -- cgit v1.2.3 From 217e0ca9c8623e4fb8b768e738f8e59dc56d3eb6 Mon Sep 17 00:00:00 2001 From: Kevin Cernekee Date: Sun, 3 May 2015 17:00:19 -0700 Subject: MAINTAINERS: Add entry for tas571x ASoC codec driver Add self as maintainer for the new driver. Signed-off-by: Kevin Cernekee Signed-off-by: Mark Brown --- MAINTAINERS | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'MAINTAINERS') diff --git a/MAINTAINERS b/MAINTAINERS index 2e5bbc0d68b2..9a632154c8cd 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -9884,6 +9884,12 @@ L: netdev@vger.kernel.org S: Maintained F: drivers/net/ethernet/ti/netcp* +TI TAS571X FAMILY ASoC CODEC DRIVER +M: Kevin Cernekee +L: alsa-devel@alsa-project.org (moderated for non-subscribers) +S: Odd Fixes +F: sound/soc/codecs/tas571x* + TI TWL4030 SERIES SOC CODEC DRIVER M: Peter Ujfalusi L: alsa-devel@alsa-project.org (moderated for non-subscribers) -- cgit v1.2.3 From 6b096fded15bbf0cd4b39fdab3dfe306210ad3f6 Mon Sep 17 00:00:00 2001 From: Tilman Schmidt Date: Sat, 2 May 2015 19:23:22 +0200 Subject: isdn/gigaset: cede maintainership MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit As German phone operators are discontinuing ISDN service, neither Hansjörg nor I will be able to maintain the Gigaset ISDN drivers any longer. Paul Bolle offered to step into the breach for odd fixes. Signed-off-by: Tilman Schmidt Acked-by: Paul Bolle Signed-off-by: David S. Miller --- MAINTAINERS | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) (limited to 'MAINTAINERS') diff --git a/MAINTAINERS b/MAINTAINERS index 16227759dfa8..fa4e59d9c07b 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -4364,11 +4364,10 @@ F: fs/gfs2/ F: include/uapi/linux/gfs2_ondisk.h GIGASET ISDN DRIVERS -M: Hansjoerg Lipp -M: Tilman Schmidt +M: Paul Bolle L: gigaset307x-common@lists.sourceforge.net W: http://gigaset307x.sourceforge.net/ -S: Maintained +S: Odd Fixes F: Documentation/isdn/README.gigaset F: drivers/isdn/gigaset/ F: include/uapi/linux/gigaset_dev.h -- cgit v1.2.3 From 954138dc25dca0263f315c5a3450059df05a4ea1 Mon Sep 17 00:00:00 2001 From: Yann Droneaud Date: Mon, 4 May 2015 14:31:03 +0200 Subject: MAINTAINERS: add include/rdma/ to InfiniBand subsystem Most headers for InfiniBand/RDMA are located under include/rdma/ and include/uapi/rdma. Signed-off-by: Yann Droneaud Reviewed-by: Ira Weiny Signed-off-by: Doug Ledford --- MAINTAINERS | 2 ++ 1 file changed, 2 insertions(+) (limited to 'MAINTAINERS') diff --git a/MAINTAINERS b/MAINTAINERS index 781e099495d3..c80714ad3114 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -5053,6 +5053,8 @@ S: Supported F: Documentation/infiniband/ F: drivers/infiniband/ F: include/uapi/linux/if_infiniband.h +F: include/uapi/rdma/ +F: include/rdma/ INOTIFY M: John McCutchan -- cgit v1.2.3 From b6b2bbe65b2117afd9766faa7cffea4d8f681455 Mon Sep 17 00:00:00 2001 From: Doug Ledford Date: Tue, 5 May 2015 12:57:09 -0400 Subject: MAINTAINERS: Update InfiniBand subsystem maintainer Since Roland stepped down, the community asked me to take his place, and the nomination was followed by sufficient votes and no dissensions that we can move forward with the change. Signed-off-by: Doug Ledford --- MAINTAINERS | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'MAINTAINERS') diff --git a/MAINTAINERS b/MAINTAINERS index c80714ad3114..40c14f14204d 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -5042,13 +5042,13 @@ S: Orphan F: drivers/video/fbdev/imsttfb.c INFINIBAND SUBSYSTEM -M: Roland Dreier +M: Doug Ledford M: Sean Hefty M: Hal Rosenstock L: linux-rdma@vger.kernel.org W: http://www.openfabrics.org/ Q: http://patchwork.kernel.org/project/linux-rdma/list/ -T: git git://git.kernel.org/pub/scm/linux/kernel/git/roland/infiniband.git +T: git git://github.com/dledford/linux.git S: Supported F: Documentation/infiniband/ F: drivers/infiniband/ -- cgit v1.2.3 From 74f3037c4015f3a440dc4cb4e31477875fa9791c Mon Sep 17 00:00:00 2001 From: Minchan Kim Date: Tue, 5 May 2015 16:23:28 -0700 Subject: zram: add Designated Reviewer for zram in MAINTAINERS Sergey Senozhatsky has contributed/reviewed to zram for a long time. He is really helpful for maintaining zram so I want for him to continue helping me as Designated Reviewer unless he hates it. Signed-off-by: Minchan Kim Cc: Sergey Senozhatsky Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- MAINTAINERS | 1 + 1 file changed, 1 insertion(+) (limited to 'MAINTAINERS') diff --git a/MAINTAINERS b/MAINTAINERS index 781e099495d3..1c7fd3c85ba7 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -11037,6 +11037,7 @@ F: drivers/media/pci/zoran/ ZRAM COMPRESSED RAM BLOCK DEVICE DRVIER M: Minchan Kim M: Nitin Gupta +R: Sergey Senozhatsky L: linux-kernel@vger.kernel.org S: Maintained F: drivers/block/zram/ -- cgit v1.2.3 From 48b945a19cf6e7e548b2ce545ec88f93284ab276 Mon Sep 17 00:00:00 2001 From: Andrew Morton Date: Tue, 5 May 2015 16:23:30 -0700 Subject: MAINTAINERS: add co-maintainer for LED subsystem Add myself (Jacek Anaszewski) as a co-maintainer for the LED subsystem. Signed-off-by: Jacek Anaszewski Acked-by: Bryan Wu Cc: Richard Purdie Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- MAINTAINERS | 1 + 1 file changed, 1 insertion(+) (limited to 'MAINTAINERS') diff --git a/MAINTAINERS b/MAINTAINERS index 1c7fd3c85ba7..b399b34a2496 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -5805,6 +5805,7 @@ F: drivers/scsi/53c700* LED SUBSYSTEM M: Bryan Wu M: Richard Purdie +M: Jacek Anaszewski L: linux-leds@vger.kernel.org T: git git://git.kernel.org/pub/scm/linux/kernel/git/cooloney/linux-leds.git S: Maintained -- cgit v1.2.3 From 30c7469ba6f5eccf33ac33ec7cb19414f50cf3bf Mon Sep 17 00:00:00 2001 From: Johannes Thumshirn Date: Thu, 7 May 2015 10:21:24 +0200 Subject: MAINTAINERS: Change Johannes Thumshirn's email address Change my email address to something that is not associated with my current or future employer. Suggested-by: Borislav Petkov Signed-off-by: Johannes Thumshirn Cc: linux-edac Cc: linux-watchdog@vger.kernel.org Cc: Mauro Carvalho Chehab Cc: Wim Van Sebroeck Cc: Greg Kroah-Hartman Link: http://lkml.kernel.org/r/1430986884-8760-1-git-send-email-jthumshirn@suse.de Signed-off-by: Borislav Petkov --- MAINTAINERS | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) (limited to 'MAINTAINERS') diff --git a/MAINTAINERS b/MAINTAINERS index 2e5bbc0d68b2..be68a7156f13 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -3708,7 +3708,7 @@ S: Maintained F: drivers/edac/ie31200_edac.c EDAC-MPC85XX -M: Johannes Thumshirn +M: Johannes Thumshirn L: linux-edac@vger.kernel.org W: bluesmoke.sourceforge.net S: Maintained @@ -6388,14 +6388,14 @@ F: include/linux/mtd/ F: include/uapi/mtd/ MEN A21 WATCHDOG DRIVER -M: Johannes Thumshirn +M: Johannes Thumshirn L: linux-watchdog@vger.kernel.org -S: Supported +S: Maintained F: drivers/watchdog/mena21_wdt.c MEN CHAMELEON BUS (mcb) -M: Johannes Thumshirn -S: Supported +M: Johannes Thumshirn +S: Maintained F: drivers/mcb/ F: include/linux/mcb.h -- cgit v1.2.3 From d68b35f845cc56472fa0d782449ff1549f00ec47 Mon Sep 17 00:00:00 2001 From: Nicolas Ferre Date: Wed, 29 Apr 2015 11:57:18 +0200 Subject: MAINTAINERS: replace an AT91 maintainer As some help is needed from an active maintainer, replace Andrew Victor by Alexandre Belloni in the ARM/Atmel MAINTAINERS' entry (aka AT91). Add an entry to the CREDITS file. Thanks Andrew for the great role you played during the early days of this product family. Signed-off-by: Nicolas Ferre Acked-by: Andrew Victor Acked-by: Alexandre Belloni Signed-off-by: Arnd Bergmann --- CREDITS | 7 +++++++ MAINTAINERS | 3 +-- 2 files changed, 8 insertions(+), 2 deletions(-) (limited to 'MAINTAINERS') diff --git a/CREDITS b/CREDITS index 40cc4bfb34db..ec7e6c7fdd1b 100644 --- a/CREDITS +++ b/CREDITS @@ -3709,6 +3709,13 @@ N: Dirk Verworner D: Co-author of German book ``Linux-Kernel-Programmierung'' D: Co-founder of Berlin Linux User Group +N: Andrew Victor +E: linux@maxim.org.za +W: http://maxim.org.za/at91_26.html +D: First maintainer of Atmel ARM-based SoC, aka AT91 +D: Introduced support for at91rm9200, the first chip of AT91 family +S: South Africa + N: Riku Voipio E: riku.voipio@iki.fi D: Author of PCA9532 LED and Fintek f75375s hwmon driver diff --git a/MAINTAINERS b/MAINTAINERS index f639c04c8098..3ab4597c6a8b 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -892,11 +892,10 @@ S: Maintained F: arch/arm/mach-alpine/ ARM/ATMEL AT91RM9200 AND AT91SAM ARM ARCHITECTURES -M: Andrew Victor M: Nicolas Ferre +M: Alexandre Belloni M: Jean-Christophe Plagniol-Villard L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) -W: http://maxim.org.za/at91_26.html W: http://www.linux4sam.org S: Supported F: arch/arm/mach-at91/ -- cgit v1.2.3 From efadb751692f3c10e72cf96c8409e40e60852ff2 Mon Sep 17 00:00:00 2001 From: Dinh Nguyen Date: Mon, 20 Apr 2015 14:13:12 -0500 Subject: MAINTAINERS: socfpga: update the git repo for SoCFPGA The git tree at rocketboards.org is going away. Update the entry to reflect the address of the new location. Also add an entry for all the socfpga_* dts files. Signed-off-by: Dinh Nguyen Signed-off-by: Arnd Bergmann --- MAINTAINERS | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) (limited to 'MAINTAINERS') diff --git a/MAINTAINERS b/MAINTAINERS index 3ab4597c6a8b..948b49379909 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1438,9 +1438,10 @@ ARM/SOCFPGA ARCHITECTURE M: Dinh Nguyen S: Maintained F: arch/arm/mach-socfpga/ +F: arch/arm/boot/dts/socfpga* +F: arch/arm/configs/socfpga_defconfig W: http://www.rocketboards.org -T: git://git.rocketboards.org/linux-socfpga.git -T: git://git.rocketboards.org/linux-socfpga-next.git +T: git git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux.git ARM/SOCFPGA CLOCK FRAMEWORK SUPPORT M: Dinh Nguyen -- cgit v1.2.3 From c9d862c48c48883a4327ae82f4a6de1eef928d60 Mon Sep 17 00:00:00 2001 From: Baruch Siach Date: Tue, 28 Apr 2015 13:59:43 +0300 Subject: MAINTAINERS: add Conexant Digicolor machines entry This adds Baruch as the maintainer for the Digicolor platform. Signed-off-by: Baruch Siach Signed-off-by: Arnd Bergmann --- MAINTAINERS | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'MAINTAINERS') diff --git a/MAINTAINERS b/MAINTAINERS index 948b49379909..9d39c3824be2 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -989,6 +989,12 @@ F: drivers/clocksource/timer-prima2.c F: drivers/clocksource/timer-atlas7.c N: [^a-z]sirf +ARM/CONEXANT DIGICOLOR MACHINE SUPPORT +M: Baruch Siach +L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) +S: Maintained +N: digicolor + ARM/EBSA110 MACHINE SUPPORT M: Russell King L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) -- cgit v1.2.3 From 2da572c959dd5815aef153cf62010b16a498a0d3 Mon Sep 17 00:00:00 2001 From: Dan Streetman Date: Thu, 7 May 2015 13:49:14 -0400 Subject: lib: add software 842 compression/decompression Add 842-format software compression and decompression functions. Update the MAINTAINERS 842 section to include the new files. The 842 compression function can compress any input data into the 842 compression format. The 842 decompression function can decompress any standard-format 842 compressed data - specifically, either a compressed data buffer created by the 842 software compression function, or a compressed data buffer created by the 842 hardware compressor (located in PowerPC coprocessors). The 842 compressed data format is explained in the header comments. This is used in a later patch to provide a full software 842 compression and decompression crypto interface. Signed-off-by: Dan Streetman Signed-off-by: Herbert Xu --- MAINTAINERS | 2 + include/linux/sw842.h | 12 + lib/842/842.h | 127 ++++++++++ lib/842/842_compress.c | 626 +++++++++++++++++++++++++++++++++++++++++++++++ lib/842/842_debugfs.h | 52 ++++ lib/842/842_decompress.c | 405 ++++++++++++++++++++++++++++++ lib/842/Makefile | 2 + lib/Kconfig | 6 + lib/Makefile | 2 + 9 files changed, 1234 insertions(+) create mode 100644 include/linux/sw842.h create mode 100644 lib/842/842.h create mode 100644 lib/842/842_compress.c create mode 100644 lib/842/842_debugfs.h create mode 100644 lib/842/842_decompress.c create mode 100644 lib/842/Makefile (limited to 'MAINTAINERS') diff --git a/MAINTAINERS b/MAINTAINERS index 56a432d51119..96684fd49abc 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -4863,6 +4863,8 @@ M: Dan Streetman S: Supported F: drivers/crypto/nx/nx-842.c F: include/linux/nx842.h +F: include/linux/sw842.h +F: lib/842/ IBM Power Linux RAID adapter M: Brian King diff --git a/include/linux/sw842.h b/include/linux/sw842.h new file mode 100644 index 000000000000..109ba041c2ae --- /dev/null +++ b/include/linux/sw842.h @@ -0,0 +1,12 @@ +#ifndef __SW842_H__ +#define __SW842_H__ + +#define SW842_MEM_COMPRESS (0xf000) + +int sw842_compress(const u8 *src, unsigned int srclen, + u8 *dst, unsigned int *destlen, void *wmem); + +int sw842_decompress(const u8 *src, unsigned int srclen, + u8 *dst, unsigned int *destlen); + +#endif diff --git a/lib/842/842.h b/lib/842/842.h new file mode 100644 index 000000000000..7c200030acf7 --- /dev/null +++ b/lib/842/842.h @@ -0,0 +1,127 @@ + +#ifndef __842_H__ +#define __842_H__ + +/* The 842 compressed format is made up of multiple blocks, each of + * which have the format: + * + *