From 7fe090bf48b522de8cd6fe85e2b3252ed74e74f8 Mon Sep 17 00:00:00 2001 From: Chen-Yu Tsai Date: Wed, 23 Jul 2014 23:33:06 +0800 Subject: serial: 8250_dw: Add optional reset control support The Allwinner A31 and A23 SoCs have a reset controller maintaining the UART in reset by default. This patch adds optional reset support to the driver. Signed-off-by: Chen-Yu Tsai Acked-by: Maxime Ripard Signed-off-by: Greg Kroah-Hartman --- Documentation/devicetree/bindings/serial/snps-dw-apb-uart.txt | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.txt b/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.txt index 095ac7172ffe..7f76214f728a 100644 --- a/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.txt +++ b/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.txt @@ -15,6 +15,7 @@ The supplying peripheral clock can also be handled, needing a second property Required elements: "baudclk", "apb_pclk" Optional properties: +- resets : phandle to the parent reset controller. - reg-shift : quantity to shift the register offsets by. If this property is not present then the register offsets are not shifted. - reg-io-width : the size (in bytes) of the IO accesses that should be -- cgit v1.2.3