From 7514f64780a47306ebcc26f06b30eeec376b2bf4 Mon Sep 17 00:00:00 2001 From: Louis-Alexis Eyraud Date: Wed, 3 Dec 2025 12:45:34 +0100 Subject: dt-bindings: mmc: mtk-sd: Add support for MT8189 SoC Add a new compatible for MMC IP in MT8189 SoC. Even though this is partially compatible with the one found in MT8196 SoC, the MT8189 SoC register layout has some slight differences and additional features. Signed-off-by: Louis-Alexis Eyraud Acked-by: Krzysztof Kozlowski Signed-off-by: Ulf Hansson --- Documentation/devicetree/bindings/mmc/mtk-sd.yaml | 3 +++ 1 file changed, 3 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mmc/mtk-sd.yaml b/Documentation/devicetree/bindings/mmc/mtk-sd.yaml index 6dd26ad31491..eb3755bdfdf7 100644 --- a/Documentation/devicetree/bindings/mmc/mtk-sd.yaml +++ b/Documentation/devicetree/bindings/mmc/mtk-sd.yaml @@ -25,6 +25,7 @@ properties: - mediatek,mt8135-mmc - mediatek,mt8173-mmc - mediatek,mt8183-mmc + - mediatek,mt8189-mmc - mediatek,mt8196-mmc - mediatek,mt8516-mmc - items: @@ -192,6 +193,7 @@ allOf: - mediatek,mt8183-mmc - mediatek,mt8186-mmc - mediatek,mt8188-mmc + - mediatek,mt8189-mmc - mediatek,mt8195-mmc - mediatek,mt8196-mmc - mediatek,mt8516-mmc @@ -240,6 +242,7 @@ allOf: - mediatek,mt7986-mmc - mediatek,mt7988-mmc - mediatek,mt8183-mmc + - mediatek,mt8189-mmc - mediatek,mt8196-mmc then: properties: -- cgit v1.2.3 From 182b650e4e9c3d68ac636048463db21f8375a057 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Mon, 15 Dec 2025 15:27:27 -0600 Subject: dt-bindings: mmc: cdns,sdhci: Drop required "resets" on AMD Pensando ELBA The AMD Pensando ELBA DT defines no reset for the SDHCI, so it is obviously not required. Signed-off-by: Rob Herring (Arm) Signed-off-by: Ulf Hansson --- Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml | 2 -- 1 file changed, 2 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml b/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml index ac75d694611a..6c7317d13aa6 100644 --- a/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml +++ b/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml @@ -134,8 +134,6 @@ allOf: items: - description: Host controller registers - description: Elba byte-lane enable register for writes - required: - - resets else: properties: reg: -- cgit v1.2.3 From acb52756e90c99648c993e4ea8a550e126d29d9d Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Mon, 15 Dec 2025 15:27:36 -0600 Subject: dt-bindings: mmc: brcm,iproc-sdhci: Allow "dma-coherent" and "iommus" properties The Broadcom iProc SDHCI controller is DMA coherent and/or behind an IOMMU on some Broadcom SoCs, so allow the dma-coherent and iommus properties. Signed-off-by: Rob Herring (Arm) Reviewed-by: Florian Fainelli Signed-off-by: Ulf Hansson --- Documentation/devicetree/bindings/mmc/brcm,iproc-sdhci.yaml | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mmc/brcm,iproc-sdhci.yaml b/Documentation/devicetree/bindings/mmc/brcm,iproc-sdhci.yaml index 2f63f2cdeb71..65bb2f66f8cf 100644 --- a/Documentation/devicetree/bindings/mmc/brcm,iproc-sdhci.yaml +++ b/Documentation/devicetree/bindings/mmc/brcm,iproc-sdhci.yaml @@ -26,9 +26,14 @@ properties: reg: minItems: 1 + dma-coherent: true + interrupts: maxItems: 1 + iommus: + maxItems: 1 + clocks: maxItems: 1 description: -- cgit v1.2.3 From 5962f68603ea74b804f7bb01a475b08846932aad Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Mon, 15 Dec 2025 15:27:50 -0600 Subject: dt-bindings: mmc: arasan,sdhci: Allow "dma-coherent" property The Arasan SDHCI controller is DMA coherent on the APM merlin SoC, so allow the dma-coherent property. No reason implementations can't also be coherent and there's not an SoC specific compatible, so allow it on any platform. Signed-off-by: Rob Herring (Arm) Signed-off-by: Ulf Hansson --- Documentation/devicetree/bindings/mmc/arasan,sdhci.yaml | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mmc/arasan,sdhci.yaml b/Documentation/devicetree/bindings/mmc/arasan,sdhci.yaml index 8e79de97b242..d6b6fa6dcffb 100644 --- a/Documentation/devicetree/bindings/mmc/arasan,sdhci.yaml +++ b/Documentation/devicetree/bindings/mmc/arasan,sdhci.yaml @@ -121,6 +121,8 @@ properties: - const: clk_ahb - const: gate + dma-coherent: true + interrupts: minItems: 1 maxItems: 2 -- cgit v1.2.3 From 4231325cfb87f712fcbe1fcbeea4186d18c78513 Mon Sep 17 00:00:00 2001 From: Yixun Lan Date: Tue, 23 Dec 2025 10:24:49 +0800 Subject: dt-bindings: mmc: spacemit,sdhci: add reset support The SpacemiT SDHCI controller has two reset lines, one connect to AXI bus which shared by all controllers, while another one connect to individual controller separately. Signed-off-by: Yixun Lan Reviewed-by: Javier Martinez Canillas Reviewed-by: Krzysztof Kozlowski Signed-off-by: Ulf Hansson --- Documentation/devicetree/bindings/mmc/spacemit,sdhci.yaml | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mmc/spacemit,sdhci.yaml b/Documentation/devicetree/bindings/mmc/spacemit,sdhci.yaml index 13d9382058fb..de4e9efeb666 100644 --- a/Documentation/devicetree/bindings/mmc/spacemit,sdhci.yaml +++ b/Documentation/devicetree/bindings/mmc/spacemit,sdhci.yaml @@ -32,6 +32,16 @@ properties: - const: core - const: io + resets: + items: + - description: axi reset, connect to AXI bus, shared by all controllers + - description: sdh reset, connect to individual controller separately + + reset-names: + items: + - const: axi + - const: sdh + required: - compatible - reg -- cgit v1.2.3 From c740532de087009b18981ab14be42c45494c246d Mon Sep 17 00:00:00 2001 From: Vladimir Zapolskiy Date: Thu, 25 Dec 2025 20:16:15 +0200 Subject: dt-bindings: mmc: arm,pl18x: Do not use plural form of a proper noun PrimeCell As a proper noun PrimeCell is a single entity and it can not have a plural form, fix the typo. Signed-off-by: Vladimir Zapolskiy Signed-off-by: Ulf Hansson --- Documentation/devicetree/bindings/mmc/arm,pl18x.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mmc/arm,pl18x.yaml b/Documentation/devicetree/bindings/mmc/arm,pl18x.yaml index f90fd73904a2..8d62be4355a0 100644 --- a/Documentation/devicetree/bindings/mmc/arm,pl18x.yaml +++ b/Documentation/devicetree/bindings/mmc/arm,pl18x.yaml @@ -11,7 +11,7 @@ maintainers: - Ulf Hansson description: - The ARM PrimeCells MMCI PL180 and PL181 provides an interface for + The ARM PrimeCell MMCI PL180 and PL181 provides an interface for reading and writing to MultiMedia and SD cards alike. Over the years vendors have use the VHDL code from ARM to create derivative MMC/SD/SDIO host controllers with very similar characteristics. -- cgit v1.2.3 From b4206966e2d48883f04d5a2b2ae6c46b528245d3 Mon Sep 17 00:00:00 2001 From: Yixun Lan Date: Thu, 22 Jan 2026 17:37:30 +0800 Subject: dt-bindings: mmc: spacemit,sdhci: add support for K3 SoC The SDHCI controller found on SpacemiT K3 SoC share the same IP with K1 generation, while fixed the broken 64BIT DMA issue. Introduce a compatible string to enable support for it. Acked-by: Rob Herring (Arm) Signed-off-by: Yixun Lan Signed-off-by: Ulf Hansson --- Documentation/devicetree/bindings/mmc/spacemit,sdhci.yaml | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mmc/spacemit,sdhci.yaml b/Documentation/devicetree/bindings/mmc/spacemit,sdhci.yaml index de4e9efeb666..9a055d963a7f 100644 --- a/Documentation/devicetree/bindings/mmc/spacemit,sdhci.yaml +++ b/Documentation/devicetree/bindings/mmc/spacemit,sdhci.yaml @@ -14,7 +14,9 @@ allOf: properties: compatible: - const: spacemit,k1-sdhci + enum: + - spacemit,k1-sdhci + - spacemit,k3-sdhci reg: maxItems: 1 -- cgit v1.2.3 From d5159623162cc3d462ba1e661f8362c181756d65 Mon Sep 17 00:00:00 2001 From: Albert Yang Date: Fri, 23 Jan 2026 17:53:37 +0800 Subject: dt-bindings: mmc: add binding for BST DWCMSHC SDHCI controller Add device tree bindings for the Black Sesame Technologies DWCMSHC SDHCI controller used in C1200 SoC. The binding describes a Synopsys DesignWare Cores Mobile Storage Host Controller with BST-specific extensions including: - Two register regions (core SDHCI and CRM registers) - Optional memory-region for bounce buffer support - Fixed clock input Signed-off-by: Ge Gordon Signed-off-by: Albert Yang Reviewed-by: Krzysztof Kozlowski Signed-off-by: Ulf Hansson --- .../devicetree/bindings/mmc/bst,c1200-sdhci.yaml | 70 ++++++++++++++++++++++ 1 file changed, 70 insertions(+) create mode 100644 Documentation/devicetree/bindings/mmc/bst,c1200-sdhci.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mmc/bst,c1200-sdhci.yaml b/Documentation/devicetree/bindings/mmc/bst,c1200-sdhci.yaml new file mode 100644 index 000000000000..8358bb70c333 --- /dev/null +++ b/Documentation/devicetree/bindings/mmc/bst,c1200-sdhci.yaml @@ -0,0 +1,70 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mmc/bst,c1200-sdhci.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Black Sesame Technologies DWCMSHC SDHCI Controller + +maintainers: + - Ge Gordon + +allOf: + - $ref: sdhci-common.yaml# + +properties: + compatible: + const: bst,c1200-sdhci + + reg: + items: + - description: Core SDHCI registers + - description: CRM registers + + interrupts: + maxItems: 1 + + clocks: + maxItems: 1 + + clock-names: + items: + - const: core + + memory-region: + maxItems: 1 + + dma-coherent: true + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + +unevaluatedProperties: false + +examples: + - | + #include + #include + + bus { + #address-cells = <2>; + #size-cells = <2>; + + mmc@22200000 { + compatible = "bst,c1200-sdhci"; + reg = <0x0 0x22200000 0x0 0x1000>, + <0x0 0x23006000 0x0 0x1000>; + interrupts = ; + clocks = <&clk_mmc>; + clock-names = "core"; + memory-region = <&mmc0_reserved>; + max-frequency = <200000000>; + bus-width = <8>; + non-removable; + dma-coherent; + }; + }; -- cgit v1.2.3 From 7d608bea4adab7869450442e7985b09fdc84117e Mon Sep 17 00:00:00 2001 From: SriNavmani A Date: Fri, 6 Feb 2026 16:23:07 +0800 Subject: dt-bindings: mmc: arasan,sdhci: Add Axiado AX3000 SoC Add compatible strings for Axiado AX3000 SoC eMMC controller which is based on Arasan eMMC controller. Signed-off-by: SriNavmani A Signed-off-by: Tzu-Hao Wei Acked-by: Rob Herring (Arm) Signed-off-by: Ulf Hansson --- Documentation/devicetree/bindings/mmc/arasan,sdhci.yaml | 3 +++ 1 file changed, 3 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mmc/arasan,sdhci.yaml b/Documentation/devicetree/bindings/mmc/arasan,sdhci.yaml index d6b6fa6dcffb..f343fb78e114 100644 --- a/Documentation/devicetree/bindings/mmc/arasan,sdhci.yaml +++ b/Documentation/devicetree/bindings/mmc/arasan,sdhci.yaml @@ -106,6 +106,9 @@ properties: description: For this device it is strongly suggested to include arasan,soc-ctl-syscon. + - items: + - const: axiado,ax3000-sdhci-5.1-emmc # Axiado AX3000 eMMC controller + - const: arasan,sdhci-5.1 reg: maxItems: 1 -- cgit v1.2.3 From 517b1e3c9455698b5ce7fc479aa0b91731e5d9fa Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Sat, 7 Feb 2026 10:10:41 -0300 Subject: dt-bindings: mmc: rockchip-dw-mshc: Add RV1103B compatible The RV1103B uses the DesignWare MSHC controller compatible with the existing Rockchip RK3288 variant. Add the rockchip,rv1103b-dw-mshc compatible string. Signed-off-by: Fabio Estevam Reviewed-by: Heiko Stuebner Acked-by: Krzysztof Kozlowski Reviewed-by: Shawn Lin Signed-off-by: Ulf Hansson --- Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.yaml b/Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.yaml index acb9fb9a92cd..a75209bd2710 100644 --- a/Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.yaml +++ b/Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.yaml @@ -43,6 +43,7 @@ properties: - rockchip,rk3562-dw-mshc - rockchip,rk3568-dw-mshc - rockchip,rk3588-dw-mshc + - rockchip,rv1103b-dw-mshc - rockchip,rv1108-dw-mshc - rockchip,rv1126-dw-mshc - const: rockchip,rk3288-dw-mshc -- cgit v1.2.3 From 5f7ac24ba232180caf77e9ddd6ccad61b9948706 Mon Sep 17 00:00:00 2001 From: Huan He Date: Thu, 26 Feb 2026 17:26:14 +0800 Subject: dt-bindings: mmc: dwcmshc-sdhci: Fix resets array validation The binding defines tuple-style reset-names items for some compatibles, which implicitly enforces a fixed array length via JSON Schema. Defining global maxItems for resets and reset-names causes these constraints to be intersected via allOf, resulting in an effective minItems equal to the global maxItems. This leads to dtbs_check failures reporting reset arrays as too short, even when the DTS provides the correct number of entries. Fixes: 30009a21f257 ("dt-bindings: mmc: sdhci-of-dwcmshc: Add Eswin EIC7700") Co-developed-by: Pritesh Patel Signed-off-by: Pritesh Patel Signed-off-by: Huan He Acked-by: Conor Dooley Signed-off-by: Ulf Hansson --- Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml | 3 +++ 1 file changed, 3 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml b/Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml index 7e7c55dc2440..5cebe5eb1efb 100644 --- a/Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml +++ b/Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml @@ -50,9 +50,11 @@ properties: maxItems: 1 resets: + minItems: 4 maxItems: 5 reset-names: + minItems: 4 maxItems: 5 rockchip,txclk-tapnum: @@ -146,6 +148,7 @@ allOf: else: properties: resets: + minItems: 5 maxItems: 5 reset-names: items: -- cgit v1.2.3 From bc0d3adf2f47439e8b7ffd228154d71b8acb50e6 Mon Sep 17 00:00:00 2001 From: Josua Mayer Date: Thu, 26 Feb 2026 15:21:15 +0200 Subject: dt-bindings: mmc: renesas,sdhi: Add mux-states property Add mux controller support for data or control lines that are muxed between a host and multiple cards. There are several devices supporting a choice of eMMC or SD on a single board by both dip switch and gpio, e.g. Renesas RZ/G2L SMARC SoM and SolidRun RZ/G2L SoM. In-tree dts for the Renesas boards currently rely on preprocessor macros and gpio hogs to describe the respective cards. By adding mux-states property to sdhi controller description, boards can correctly describe the mux that already exists in hardware - and drivers can coordinate between mux selection and probing for cards. Acked-by: Rob Herring (Arm) Reviewed-by: Wolfram Sang Signed-off-by: Josua Mayer Signed-off-by: Ulf Hansson --- Documentation/devicetree/bindings/mmc/renesas,sdhi.yaml | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mmc/renesas,sdhi.yaml b/Documentation/devicetree/bindings/mmc/renesas,sdhi.yaml index c754ea71f51f..64fac0d11329 100644 --- a/Documentation/devicetree/bindings/mmc/renesas,sdhi.yaml +++ b/Documentation/devicetree/bindings/mmc/renesas,sdhi.yaml @@ -106,6 +106,11 @@ properties: iommus: maxItems: 1 + mux-states: + description: + mux controller node to route the SD/SDIO/eMMC signals from SoC to cards. + maxItems: 1 + power-domains: maxItems: 1 @@ -275,6 +280,7 @@ examples: max-frequency = <195000000>; power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; resets = <&cpg 314>; + mux-states = <&mux 0>; }; sdhi1: mmc@ee120000 { -- cgit v1.2.3 From f1ccb2b0955293766c5f50002299202bf49a4142 Mon Sep 17 00:00:00 2001 From: Binbin Zhou Date: Tue, 3 Mar 2026 19:27:38 +0800 Subject: dt-bindings: mmc: loongson,ls2k0500-mmc: Add compatible for Loongson-2K0300 Add "loongson,ls2k0300-mmc" dedicated compatible to represent the eMMC/SD/SDIO controller interface of the Loongson-2K0300 chip. Its hardware design is similar to that of the Loongson-2K2000, but it suffers from hardware defects such as missing CMD48 interrupts. Signed-off-by: Binbin Zhou Acked-by: Conor Dooley Reviewed-by: Huacai Chen Signed-off-by: Ulf Hansson --- Documentation/devicetree/bindings/mmc/loongson,ls2k0500-mmc.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mmc/loongson,ls2k0500-mmc.yaml b/Documentation/devicetree/bindings/mmc/loongson,ls2k0500-mmc.yaml index c142421bc723..b3e8d3f13592 100644 --- a/Documentation/devicetree/bindings/mmc/loongson,ls2k0500-mmc.yaml +++ b/Documentation/devicetree/bindings/mmc/loongson,ls2k0500-mmc.yaml @@ -22,6 +22,7 @@ allOf: properties: compatible: enum: + - loongson,ls2k0300-mmc - loongson,ls2k0500-mmc - loongson,ls2k1000-mmc - loongson,ls2k2000-mmc -- cgit v1.2.3 From 0f961114e4aca744597390d78fbe462a846ac332 Mon Sep 17 00:00:00 2001 From: Ciprian Marian Costea Date: Mon, 9 Mar 2026 15:34:06 +0100 Subject: dt-bindings: mmc: fsl-imx-esdhc: add S32N79 support Add compatible string "nxp,s32n79-usdhc" for the uSDHC controller found in NXP S32N79 series automotive SoCs. Co-developed-by: Larisa Grigore Signed-off-by: Larisa Grigore Signed-off-by: Ciprian Marian Costea Acked-by: Krzysztof Kozlowski Signed-off-by: Ulf Hansson --- Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.yaml b/Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.yaml index b98a84f93277..014b049baeb6 100644 --- a/Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.yaml +++ b/Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.yaml @@ -35,6 +35,7 @@ properties: - fsl,imx8mm-usdhc - fsl,imxrt1050-usdhc - nxp,s32g2-usdhc + - nxp,s32n79-usdhc - items: - const: fsl,imx50-esdhc - const: fsl,imx53-esdhc -- cgit v1.2.3 From 941717214d0be9f0be5fb0b46a38e429b72f8719 Mon Sep 17 00:00:00 2001 From: Kathiravan Thirumoorthy Date: Wed, 11 Mar 2026 15:15:48 +0530 Subject: dt-bindings: mmc: sdhci-msm: add IPQ5210 compatible The IPQ5210 supports eMMC with an SDHCI controller. Add the appropriate compatible to the documentation. Signed-off-by: Kathiravan Thirumoorthy Acked-by: Krzysztof Kozlowski Signed-off-by: Ulf Hansson --- Documentation/devicetree/bindings/mmc/sdhci-msm.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml b/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml index 938be8228d66..fd1d5b04e755 100644 --- a/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml +++ b/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml @@ -38,6 +38,7 @@ properties: - items: - enum: - qcom,ipq5018-sdhci + - qcom,ipq5210-sdhci - qcom,ipq5332-sdhci - qcom,ipq5424-sdhci - qcom,ipq6018-sdhci -- cgit v1.2.3 From 7ee65cdf54fc9eb4eaf2ffc5c5d1409a90ff4efa Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Fri, 13 Mar 2026 10:08:35 -0300 Subject: dt-bindings: mmc: rockchip-dw-mshc: Fix the RV1103B compatible RV1103B uses the same DesignWare MSHC controller IP version as RK3576. They have no "ciu-drive" nor "ciu-sample" clocks and use the phase tuning inside the controller. Fix it accordingly. Fixes: 517b1e3c9455 ("dt-bindings: mmc: rockchip-dw-mshc: Add RV1103B compatible") Suggested-by: Shawn Lin Signed-off-by: Fabio Estevam Reviewed-by: Heiko Stuebner Signed-off-by: Ulf Hansson --- Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.yaml | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.yaml b/Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.yaml index a75209bd2710..4965bb518c54 100644 --- a/Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.yaml +++ b/Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.yaml @@ -43,11 +43,14 @@ properties: - rockchip,rk3562-dw-mshc - rockchip,rk3568-dw-mshc - rockchip,rk3588-dw-mshc - - rockchip,rv1103b-dw-mshc - rockchip,rv1108-dw-mshc - rockchip,rv1126-dw-mshc - const: rockchip,rk3288-dw-mshc # for Rockchip RK3576 with phase tuning inside the controller + - items: + - enum: + - rockchip,rv1103b-dw-mshc + - const: rockchip,rk3576-dw-mshc - const: rockchip,rk3576-dw-mshc reg: -- cgit v1.2.3 From e65a413a2d4505012fdba2974dca613ac1779d84 Mon Sep 17 00:00:00 2001 From: Nick Hawkins Date: Mon, 16 Mar 2026 10:01:14 -0500 Subject: dt-bindings: mmc: snps,dwcmshc-sdhci: add HPE GSC dwcmshc compatible Add the 'hpe,gsc-dwcmshc' compatible string for the HPE GSC (ARM64 Cortex-A53) BMC SoC eMMC controller. The HPE GSC requires access to the MSHCCS register in the SoC system register block to configure SCG sync disable for HS200 RX delay-line phase selection. The required 'hpe,gxp-sysreg' property takes a phandle to the existing 'hpe,gxp-sysreg' syscon and the MSHCCS register offset within that block. The HPE GSC eMMC interface only exposes a single 'core' clock (no bus clock), so clocks/clock-names are constrained to a single item. Signed-off-by: Nick Hawkins Reviewed-by: Krzysztof Kozlowski Signed-off-by: Ulf Hansson --- .../bindings/mmc/snps,dwcmshc-sdhci.yaml | 32 ++++++++++++++++++++++ 1 file changed, 32 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml b/Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml index 5cebe5eb1efb..539fa3b54b5b 100644 --- a/Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml +++ b/Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml @@ -23,6 +23,7 @@ properties: - const: sophgo,sg2044-dwcmshc - const: sophgo,sg2042-dwcmshc - enum: + - hpe,gsc-dwcmshc - rockchip,rk3568-dwcmshc - rockchip,rk3588-dwcmshc - snps,dwcmshc-sdhci @@ -79,6 +80,17 @@ properties: description: Specifies the drive impedance in Ohm. enum: [33, 40, 50, 66, 100] + hpe,gxp-sysreg: + $ref: /schemas/types.yaml#/definitions/phandle-array + items: + - items: + - description: phandle to HPE GXP SoC system register block (syscon) + - description: offset of the MSHCCS register within the syscon block + description: + Phandle to the HPE GXP SoC system register block (syscon) and + offset of the MSHCCS register used to configure clock + synchronisation for HS200 tuning. + required: - compatible - reg @@ -89,6 +101,26 @@ required: allOf: - $ref: mmc-controller.yaml# + - if: + properties: + compatible: + contains: + const: hpe,gsc-dwcmshc + + then: + properties: + clocks: + items: + - description: core clock + clock-names: + items: + - const: core + required: + - hpe,gxp-sysreg + else: + properties: + hpe,gxp-sysreg: false + - if: properties: compatible: -- cgit v1.2.3 From a137e03f81e241656a4c70ea2a54833e9256de16 Mon Sep 17 00:00:00 2001 From: Jiayu Du Date: Thu, 19 Mar 2026 22:07:03 +0800 Subject: dt-bindings: mmc: Add sdhci support for Canaan k230 The Canaan k230 uses the SDHCI from Synopsys. Add compatible strings to the k230. The k230 has two controllers. MMC0 supports eMMC, while MMC1 supports SDIO. Signed-off-by: Jiayu Du Reviewed-by: Conor Dooley Signed-off-by: Ulf Hansson --- .../bindings/mmc/snps,dwcmshc-sdhci.yaml | 28 ++++++++++++++++++++++ 1 file changed, 28 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml b/Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml index 539fa3b54b5b..cd823a3ef213 100644 --- a/Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml +++ b/Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml @@ -23,6 +23,8 @@ properties: - const: sophgo,sg2044-dwcmshc - const: sophgo,sg2042-dwcmshc - enum: + - canaan,k230-emmc + - canaan,k230-sdio - hpe,gsc-dwcmshc - rockchip,rk3568-dwcmshc - rockchip,rk3588-dwcmshc @@ -58,6 +60,11 @@ properties: minItems: 4 maxItems: 5 + canaan,usb-phy: + $ref: /schemas/types.yaml#/definitions/phandle + description: Phandle to the Canaan K230 USB PHY node required for + k230-emmc/sdio. + rockchip,txclk-tapnum: description: Specify the number of delay for tx sampling. $ref: /schemas/types.yaml#/definitions/uint8 @@ -101,6 +108,27 @@ required: allOf: - $ref: mmc-controller.yaml# + - if: + properties: + compatible: + contains: + enum: + - canaan,k230-emmc + - canaan,k230-sdio + then: + properties: + clocks: + minItems: 5 + clock-names: + items: + - const: core + - const: bus + - const: axi + - const: block + - const: timer + required: + - canaan,usb-phy + - if: properties: compatible: -- cgit v1.2.3 From 918d627c091683203a76badc88c2cd58b420f107 Mon Sep 17 00:00:00 2001 From: Ryan Chen Date: Tue, 24 Mar 2026 09:58:49 +0800 Subject: dt-bindings: mmc: sdhci-of-aspeed: Add AST2700 compatible AST2700 SDHCI controller is fully compatible with AST2600. However, it is necessary to take the AST2700 SD controller out of reset, so require the 'resets' property. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Ryan Chen Signed-off-by: Ulf Hansson --- .../devicetree/bindings/mmc/aspeed,sdhci.yaml | 41 +++++++++++++++++----- 1 file changed, 33 insertions(+), 8 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mmc/aspeed,sdhci.yaml b/Documentation/devicetree/bindings/mmc/aspeed,sdhci.yaml index d24950ccea95..e4a9c2810893 100644 --- a/Documentation/devicetree/bindings/mmc/aspeed,sdhci.yaml +++ b/Documentation/devicetree/bindings/mmc/aspeed,sdhci.yaml @@ -22,10 +22,15 @@ description: |+ properties: compatible: - enum: - - aspeed,ast2400-sd-controller - - aspeed,ast2500-sd-controller - - aspeed,ast2600-sd-controller + oneOf: + - enum: + - aspeed,ast2400-sd-controller + - aspeed,ast2500-sd-controller + - aspeed,ast2600-sd-controller + - items: + - const: aspeed,ast2700-sd-controller + - const: aspeed,ast2600-sd-controller + reg: maxItems: 1 description: Common configuration registers @@ -38,6 +43,9 @@ properties: maxItems: 1 description: The SD/SDIO controller clock gate + resets: + maxItems: 1 + patternProperties: "^sdhci@[0-9a-f]+$": type: object @@ -46,10 +54,15 @@ patternProperties: properties: compatible: - enum: - - aspeed,ast2400-sdhci - - aspeed,ast2500-sdhci - - aspeed,ast2600-sdhci + oneOf: + - enum: + - aspeed,ast2400-sdhci + - aspeed,ast2500-sdhci + - aspeed,ast2600-sdhci + - items: + - const: aspeed,ast2700-sdhci + - const: aspeed,ast2600-sdhci + reg: maxItems: 1 description: The SDHCI registers @@ -78,6 +91,18 @@ required: - ranges - clocks +if: + properties: + compatible: + contains: + const: aspeed,ast2700-sd-controller +then: + required: + - resets +else: + properties: + resets: false + examples: - | #include -- cgit v1.2.3 From 2ce454acfc41d145a0977fdeead9076f84c7b692 Mon Sep 17 00:00:00 2001 From: Ronald Claveau Date: Thu, 26 Mar 2026 10:59:13 +0100 Subject: dt-bindings: mmc: amlogic: Add compatible for T7 mmc Add amlogic,t7-mmc compatible string, falling back to amlogic,meson-axg-mmc as the T7 MMC controller is compatible with the AXG implementation. Acked-by: Conor Dooley Acked-by: Rob Herring (Arm) Reviewed-by: Xianwei Zhao Signed-off-by: Ronald Claveau Signed-off-by: Ulf Hansson --- Documentation/devicetree/bindings/mmc/amlogic,meson-gx-mmc.yaml | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mmc/amlogic,meson-gx-mmc.yaml b/Documentation/devicetree/bindings/mmc/amlogic,meson-gx-mmc.yaml index 57646575a13f..976f36de2091 100644 --- a/Documentation/devicetree/bindings/mmc/amlogic,meson-gx-mmc.yaml +++ b/Documentation/devicetree/bindings/mmc/amlogic,meson-gx-mmc.yaml @@ -19,6 +19,10 @@ allOf: properties: compatible: oneOf: + - items: + - enum: + - amlogic,t7-mmc + - const: amlogic,meson-axg-mmc - const: amlogic,meson-axg-mmc - items: - const: amlogic,meson-gx-mmc -- cgit v1.2.3 From 19fe6c02f480e86962f928e298c3f51040da5411 Mon Sep 17 00:00:00 2001 From: Kathiravan Thirumoorthy Date: Wed, 25 Mar 2026 17:10:19 +0530 Subject: dt-bindings: mmc: sdhci-msm: add IPQ9650 compatible The IPQ9650 supports eMMC with an SDHCI controller. Add the appropriate compatible to the documentation. Signed-off-by: Kathiravan Thirumoorthy Acked-by: Krzysztof Kozlowski Signed-off-by: Ulf Hansson --- Documentation/devicetree/bindings/mmc/sdhci-msm.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml b/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml index fd1d5b04e755..695a95e8f35d 100644 --- a/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml +++ b/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml @@ -43,6 +43,7 @@ properties: - qcom,ipq5424-sdhci - qcom,ipq6018-sdhci - qcom,ipq9574-sdhci + - qcom,ipq9650-sdhci - qcom,kaanapali-sdhci - qcom,milos-sdhci - qcom,qcm2290-sdhci -- cgit v1.2.3 From 49eb823cbe648dba791cfe1c16e4f6fcfd32f5ca Mon Sep 17 00:00:00 2001 From: Bhargav Joshi Date: Thu, 26 Mar 2026 04:24:38 +0530 Subject: dt-bindings: mmc: hisilicon,hi3660-dw-mshc: Convert to DT schema Convert the Hisilicon DesignWare Mobile Storage Host Controller (dw-mshc) bindings from text format to DT schema. As part of this conversion, the binding file is renamed from k3-dw-mshc.txt to hisilicon,hi3660-dw-mshc.yaml to align with compatible string naming conventions. Examples have been updated to pass schema validation. Note: synopsys-dw-mshc binding specifies clock names as "biu" followed by "ciu". However, this Hisilicon binding reverses the order to 'ciu' then 'biu' to match both the legacy text binding and in-kernel Hisilicon DTS board files. Signed-off-by: Bhargav Joshi Acked-by: Zhangfei Gao Reviewed-by: Krzysztof Kozlowski Signed-off-by: Ulf Hansson --- .../bindings/mmc/hisilicon,hi3660-dw-mshc.yaml | 117 +++++++++++++++++++++ .../devicetree/bindings/mmc/k3-dw-mshc.txt | 73 ------------- 2 files changed, 117 insertions(+), 73 deletions(-) create mode 100644 Documentation/devicetree/bindings/mmc/hisilicon,hi3660-dw-mshc.yaml delete mode 100644 Documentation/devicetree/bindings/mmc/k3-dw-mshc.txt (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mmc/hisilicon,hi3660-dw-mshc.yaml b/Documentation/devicetree/bindings/mmc/hisilicon,hi3660-dw-mshc.yaml new file mode 100644 index 000000000000..296bd776488e --- /dev/null +++ b/Documentation/devicetree/bindings/mmc/hisilicon,hi3660-dw-mshc.yaml @@ -0,0 +1,117 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mmc/hisilicon,hi3660-dw-mshc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Hisilicon specific extensions to the Synopsys Designware Mobile Storage Host Controller + +maintainers: + - Zhangfei Gao + +description: + The Synopsys designware mobile storage host controller is used to interface + a SoC with storage medium such as eMMC or SD/MMC cards. This file documents + differences between the core Synopsys dw mshc controller properties described + by synopsys-dw-mshc.txt and the properties used by the Hisilicon specific + extensions to the Synopsys Designware Mobile Storage Host Controller. + +allOf: + - $ref: /schemas/mmc/synopsys-dw-mshc-common.yaml# + +properties: + compatible: + oneOf: + - enum: + - hisilicon,hi3660-dw-mshc + - hisilicon,hi4511-dw-mshc + - hisilicon,hi6220-dw-mshc + - items: + - const: hisilicon,hi3670-dw-mshc + - const: hisilicon,hi3660-dw-mshc + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + items: + - description: card interface unit clock + - description: bus interface unit clock + + clock-names: + items: + - const: ciu + - const: biu + + hisilicon,peripheral-syscon: + $ref: /schemas/types.yaml#/definitions/phandle + description: phandle of syscon used to control peripheral. + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + +unevaluatedProperties: false + +examples: + - | + #include + #include + #include + + mmc@fcd03000 { + compatible = "hisilicon,hi4511-dw-mshc"; + reg = <0xfcd03000 0x1000>; + interrupts = ; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&mmc_clock HI3620_SD_CIUCLK>, <&clock HI3620_DDRC_PER_CLK>; + clock-names = "ciu", "biu"; + vmmc-supply = <&ldo12>; + fifo-depth = <0x100>; + pinctrl-names = "default"; + pinctrl-0 = <&sd_pmx_pins &sd_cfg_func1 &sd_cfg_func2>; + bus-width = <4>; + disable-wp; + cd-gpios = <&gpio10 3 GPIO_ACTIVE_HIGH>; + cap-mmc-highspeed; + cap-sd-highspeed; + }; + + - | + #include + #include + #include + + soc { + #address-cells = <2>; + #size-cells = <2>; + + mmc@f723e000 { + compatible = "hisilicon,hi6220-dw-mshc"; + reg = <0x0 0xf723e000 0x0 0x1000>; + interrupts = ; + clocks = <&clock_sys HI6220_MMC1_CIUCLK>, + <&clock_sys HI6220_MMC1_CLK>; + clock-names = "ciu", "biu"; + bus-width = <4>; + disable-wp; + cap-sd-highspeed; + sd-uhs-sdr12; + sd-uhs-sdr25; + card-detect-delay = <200>; + hisilicon,peripheral-syscon = <&ao_ctrl>; + cd-gpios = <&gpio1 0 GPIO_ACTIVE_LOW>; + pinctrl-names = "default", "idle"; + pinctrl-0 = <&sd_pmx_func &sd_clk_cfg_func &sd_cfg_func>; + pinctrl-1 = <&sd_pmx_idle &sd_clk_cfg_idle &sd_cfg_idle>; + vqmmc-supply = <&ldo7>; + vmmc-supply = <&ldo10>; + }; + }; diff --git a/Documentation/devicetree/bindings/mmc/k3-dw-mshc.txt b/Documentation/devicetree/bindings/mmc/k3-dw-mshc.txt deleted file mode 100644 index 36c4bea675d5..000000000000 --- a/Documentation/devicetree/bindings/mmc/k3-dw-mshc.txt +++ /dev/null @@ -1,73 +0,0 @@ -* Hisilicon specific extensions to the Synopsys Designware Mobile - Storage Host Controller - -Read synopsys-dw-mshc.txt for more details - -The Synopsys designware mobile storage host controller is used to interface -a SoC with storage medium such as eMMC or SD/MMC cards. This file documents -differences between the core Synopsys dw mshc controller properties described -by synopsys-dw-mshc.txt and the properties used by the Hisilicon specific -extensions to the Synopsys Designware Mobile Storage Host Controller. - -Required Properties: - -* compatible: should be one of the following. - - "hisilicon,hi3660-dw-mshc": for controllers with hi3660 specific extensions. - - "hisilicon,hi3670-dw-mshc", "hisilicon,hi3660-dw-mshc": for controllers - with hi3670 specific extensions. - - "hisilicon,hi4511-dw-mshc": for controllers with hi4511 specific extensions. - - "hisilicon,hi6220-dw-mshc": for controllers with hi6220 specific extensions. - -Optional Properties: -- hisilicon,peripheral-syscon: phandle of syscon used to control peripheral. - -Example: - - /* for Hi3620 */ - - /* SoC portion */ - dwmmc_0: dwmmc0@fcd03000 { - compatible = "hisilicon,hi4511-dw-mshc"; - reg = <0xfcd03000 0x1000>; - interrupts = <0 16 4>; - #address-cells = <1>; - #size-cells = <0>; - clocks = <&mmc_clock HI3620_SD_CIUCLK>, <&clock HI3620_DDRC_PER_CLK>; - clock-names = "ciu", "biu"; - }; - - /* Board portion */ - dwmmc0@fcd03000 { - vmmc-supply = <&ldo12>; - fifo-depth = <0x100>; - pinctrl-names = "default"; - pinctrl-0 = <&sd_pmx_pins &sd_cfg_func1 &sd_cfg_func2>; - bus-width = <4>; - disable-wp; - cd-gpios = <&gpio10 3 0>; - cap-mmc-highspeed; - cap-sd-highspeed; - }; - - /* for Hi6220 */ - - dwmmc_1: dwmmc1@f723e000 { - compatible = "hisilicon,hi6220-dw-mshc"; - bus-width = <0x4>; - disable-wp; - cap-sd-highspeed; - sd-uhs-sdr12; - sd-uhs-sdr25; - card-detect-delay = <200>; - hisilicon,peripheral-syscon = <&ao_ctrl>; - reg = <0x0 0xf723e000 0x0 0x1000>; - interrupts = <0x0 0x49 0x4>; - clocks = <&clock_sys HI6220_MMC1_CIUCLK>, <&clock_sys HI6220_MMC1_CLK>; - clock-names = "ciu", "biu"; - cd-gpios = <&gpio1 0 1>; - pinctrl-names = "default", "idle"; - pinctrl-0 = <&sd_pmx_func &sd_clk_cfg_func &sd_cfg_func>; - pinctrl-1 = <&sd_pmx_idle &sd_clk_cfg_idle &sd_cfg_idle>; - vqmmc-supply = <&ldo7>; - vmmc-supply = <&ldo10>; - }; -- cgit v1.2.3