From eed6e344aeacd7cddbffd8e6ff4432f339bcc2bb Mon Sep 17 00:00:00 2001 From: "hdoyu@nvidia.com" Date: Wed, 16 May 2012 19:47:45 +0000 Subject: ARM: tegra{20,30}: Rename "mc" to "memory-controller" Use a more plain english name. Signed-off-by: Hiroshi DOYU [swarren: remove redundant unit address from Tegra30 example] Signed-off-by: Stephen Warren --- Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-mc.txt | 2 +- Documentation/devicetree/bindings/arm/tegra/nvidia,tegra30-mc.txt | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-mc.txt b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-mc.txt index c25a0a55151d..866d93421eba 100644 --- a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-mc.txt +++ b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-mc.txt @@ -8,7 +8,7 @@ Required properties: - interrupts : Should contain MC General interrupt. Example: - mc { + memory-controller@0x7000f000 { compatible = "nvidia,tegra20-mc"; reg = <0x7000f000 0x024 0x7000f03c 0x3c4>; diff --git a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra30-mc.txt b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra30-mc.txt index e47e73f612f4..bdf1a612422b 100644 --- a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra30-mc.txt +++ b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra30-mc.txt @@ -8,7 +8,7 @@ Required properties: - interrupts : Should contain MC General interrupt. Example: - mc { + memory-controller { compatible = "nvidia,tegra30-mc"; reg = <0x7000f000 0x010 0x7000f03c 0x1b4 -- cgit v1.2.3 From 4c5ddd952ef1e534b45218cf4ad74b5496e6406c Mon Sep 17 00:00:00 2001 From: "hdoyu@nvidia.com" Date: Wed, 16 May 2012 19:47:47 +0000 Subject: ARM: tegra20: Rename "emc" to "memory-controller" Use a more plain english name. Signed-off-by: Hiroshi DOYU Signed-off-by: Stephen Warren --- Documentation/devicetree/bindings/arm/tegra/emc.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/tegra/emc.txt b/Documentation/devicetree/bindings/arm/tegra/emc.txt index 09335f8eee00..4c33b29dc660 100644 --- a/Documentation/devicetree/bindings/arm/tegra/emc.txt +++ b/Documentation/devicetree/bindings/arm/tegra/emc.txt @@ -15,7 +15,7 @@ Child device nodes describe the memory settings for different configurations and Example: - emc@7000f400 { + memory-controller@7000f400 { #address-cells = < 1 >; #size-cells = < 0 >; compatible = "nvidia,tegra20-emc"; -- cgit v1.2.3 From f3d549dd5b217d084c9fe6581e0430909440de2b Mon Sep 17 00:00:00 2001 From: Stephen Warren Date: Mon, 21 May 2012 16:05:45 -0600 Subject: dt: name all Tegra binding docs consistently Rename all Tegra binding documentation according to the first or primary compatible value they describe. This provides a clear naming scheme for the files, and prevents any naming conflicts should future SoC versions require their own binding. Signed-off-by: Stephen Warren --- .../devicetree/bindings/arm/tegra/emc.txt | 100 --------------------- .../bindings/arm/tegra/nvidia,tegra20-emc.txt | 100 +++++++++++++++++++++ .../devicetree/bindings/gpio/gpio_nvidia.txt | 40 --------- .../bindings/gpio/nvidia,tegra20-gpio.txt | 40 +++++++++ .../bindings/input/nvidia,tegra20-kbc.txt | 23 +++++ .../devicetree/bindings/input/tegra-kbc.txt | 23 ----- .../bindings/mmc/nvidia,tegra20-sdhci.txt | 27 ++++++ .../devicetree/bindings/mmc/nvidia-sdhci.txt | 27 ------ .../devicetree/bindings/nvec/nvec_nvidia.txt | 9 -- .../devicetree/bindings/nvec/nvidia,nvec.txt | 9 ++ .../bindings/sound/nvidia,tegra-audio-alc5632.txt | 59 ++++++++++++ .../sound/nvidia,tegra-audio-trimslice.txt | 14 +++ .../bindings/sound/nvidia,tegra-audio-wm8753.txt | 54 +++++++++++ .../bindings/sound/nvidia,tegra-audio-wm8903.txt | 71 +++++++++++++++ .../bindings/sound/nvidia,tegra20-das.txt | 12 +++ .../bindings/sound/nvidia,tegra20-i2s.txt | 17 ++++ .../bindings/sound/tegra-audio-alc5632.txt | 59 ------------ .../bindings/sound/tegra-audio-trimslice.txt | 14 --- .../bindings/sound/tegra-audio-wm8753.txt | 54 ----------- .../bindings/sound/tegra-audio-wm8903.txt | 71 --------------- .../devicetree/bindings/sound/tegra20-das.txt | 12 --- .../devicetree/bindings/sound/tegra20-i2s.txt | 17 ---- .../devicetree/bindings/spi/nvidia,tegra20-spi.txt | 5 ++ .../devicetree/bindings/spi/spi_nvidia.txt | 5 -- .../bindings/usb/nvidia,tegra20-ehci.txt | 29 ++++++ .../devicetree/bindings/usb/tegra-usb.txt | 29 ------ 26 files changed, 460 insertions(+), 460 deletions(-) delete mode 100644 Documentation/devicetree/bindings/arm/tegra/emc.txt create mode 100644 Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-emc.txt delete mode 100644 Documentation/devicetree/bindings/gpio/gpio_nvidia.txt create mode 100644 Documentation/devicetree/bindings/gpio/nvidia,tegra20-gpio.txt create mode 100644 Documentation/devicetree/bindings/input/nvidia,tegra20-kbc.txt delete mode 100644 Documentation/devicetree/bindings/input/tegra-kbc.txt create mode 100644 Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.txt delete mode 100644 Documentation/devicetree/bindings/mmc/nvidia-sdhci.txt delete mode 100644 Documentation/devicetree/bindings/nvec/nvec_nvidia.txt create mode 100644 Documentation/devicetree/bindings/nvec/nvidia,nvec.txt create mode 100644 Documentation/devicetree/bindings/sound/nvidia,tegra-audio-alc5632.txt create mode 100644 Documentation/devicetree/bindings/sound/nvidia,tegra-audio-trimslice.txt create mode 100644 Documentation/devicetree/bindings/sound/nvidia,tegra-audio-wm8753.txt create mode 100644 Documentation/devicetree/bindings/sound/nvidia,tegra-audio-wm8903.txt create mode 100644 Documentation/devicetree/bindings/sound/nvidia,tegra20-das.txt create mode 100644 Documentation/devicetree/bindings/sound/nvidia,tegra20-i2s.txt delete mode 100644 Documentation/devicetree/bindings/sound/tegra-audio-alc5632.txt delete mode 100644 Documentation/devicetree/bindings/sound/tegra-audio-trimslice.txt delete mode 100644 Documentation/devicetree/bindings/sound/tegra-audio-wm8753.txt delete mode 100644 Documentation/devicetree/bindings/sound/tegra-audio-wm8903.txt delete mode 100644 Documentation/devicetree/bindings/sound/tegra20-das.txt delete mode 100644 Documentation/devicetree/bindings/sound/tegra20-i2s.txt create mode 100644 Documentation/devicetree/bindings/spi/nvidia,tegra20-spi.txt delete mode 100644 Documentation/devicetree/bindings/spi/spi_nvidia.txt create mode 100644 Documentation/devicetree/bindings/usb/nvidia,tegra20-ehci.txt delete mode 100644 Documentation/devicetree/bindings/usb/tegra-usb.txt (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/tegra/emc.txt b/Documentation/devicetree/bindings/arm/tegra/emc.txt deleted file mode 100644 index 4c33b29dc660..000000000000 --- a/Documentation/devicetree/bindings/arm/tegra/emc.txt +++ /dev/null @@ -1,100 +0,0 @@ -Embedded Memory Controller - -Properties: -- name : Should be emc -- #address-cells : Should be 1 -- #size-cells : Should be 0 -- compatible : Should contain "nvidia,tegra20-emc". -- reg : Offset and length of the register set for the device -- nvidia,use-ram-code : If present, the sub-nodes will be addressed - and chosen using the ramcode board selector. If omitted, only one - set of tables can be present and said tables will be used - irrespective of ram-code configuration. - -Child device nodes describe the memory settings for different configurations and clock rates. - -Example: - - memory-controller@7000f400 { - #address-cells = < 1 >; - #size-cells = < 0 >; - compatible = "nvidia,tegra20-emc"; - reg = <0x7000f4000 0x200>; - } - - -Embedded Memory Controller ram-code table - -If the emc node has the nvidia,use-ram-code property present, then the -next level of nodes below the emc table are used to specify which settings -apply for which ram-code settings. - -If the emc node lacks the nvidia,use-ram-code property, this level is omitted -and the tables are stored directly under the emc node (see below). - -Properties: - -- name : Should be emc-tables -- nvidia,ram-code : the binary representation of the ram-code board strappings - for which this node (and children) are valid. - - - -Embedded Memory Controller configuration table - -This is a table containing the EMC register settings for the various -operating speeds of the memory controller. They are always located as -subnodes of the emc controller node. - -There are two ways of specifying which tables to use: - -* The simplest is if there is just one set of tables in the device tree, - and they will always be used (based on which frequency is used). - This is the preferred method, especially when firmware can fill in - this information based on the specific system information and just - pass it on to the kernel. - -* The slightly more complex one is when more than one memory configuration - might exist on the system. The Tegra20 platform handles this during - early boot by selecting one out of possible 4 memory settings based - on a 2-pin "ram code" bootstrap setting on the board. The values of - these strappings can be read through a register in the SoC, and thus - used to select which tables to use. - -Properties: -- name : Should be emc-table -- compatible : Should contain "nvidia,tegra20-emc-table". -- reg : either an opaque enumerator to tell different tables apart, or - the valid frequency for which the table should be used (in kHz). -- clock-frequency : the clock frequency for the EMC at which this - table should be used (in kHz). -- nvidia,emc-registers : a 46 word array of EMC registers to be programmed - for operation at the 'clock-frequency' setting. - The order and contents of the registers are: - RC, RFC, RAS, RP, R2W, W2R, R2P, W2P, RD_RCD, WR_RCD, RRD, REXT, - WDV, QUSE, QRST, QSAFE, RDV, REFRESH, BURST_REFRESH_NUM, PDEX2WR, - PDEX2RD, PCHG2PDEN, ACT2PDEN, AR2PDEN, RW2PDEN, TXSR, TCKE, TFAW, - TRPAB, TCLKSTABLE, TCLKSTOP, TREFBW, QUSE_EXTRA, FBIO_CFG6, ODT_WRITE, - ODT_READ, FBIO_CFG5, CFG_DIG_DLL, DLL_XFORM_DQS, DLL_XFORM_QUSE, - ZCAL_REF_CNT, ZCAL_WAIT_CNT, AUTO_CAL_INTERVAL, CFG_CLKTRIM_0, - CFG_CLKTRIM_1, CFG_CLKTRIM_2 - - emc-table@166000 { - reg = <166000>; - compatible = "nvidia,tegra20-emc-table"; - clock-frequency = < 166000 >; - nvidia,emc-registers = < 0 0 0 0 0 0 0 0 0 0 0 0 0 0 - 0 0 0 0 0 0 0 0 0 0 0 0 0 0 - 0 0 0 0 0 0 0 0 0 0 0 0 0 0 - 0 0 0 0 >; - }; - - emc-table@333000 { - reg = <333000>; - compatible = "nvidia,tegra20-emc-table"; - clock-frequency = < 333000 >; - nvidia,emc-registers = < 0 0 0 0 0 0 0 0 0 0 0 0 0 0 - 0 0 0 0 0 0 0 0 0 0 0 0 0 0 - 0 0 0 0 0 0 0 0 0 0 0 0 0 0 - 0 0 0 0 >; - }; diff --git a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-emc.txt b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-emc.txt new file mode 100644 index 000000000000..4c33b29dc660 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-emc.txt @@ -0,0 +1,100 @@ +Embedded Memory Controller + +Properties: +- name : Should be emc +- #address-cells : Should be 1 +- #size-cells : Should be 0 +- compatible : Should contain "nvidia,tegra20-emc". +- reg : Offset and length of the register set for the device +- nvidia,use-ram-code : If present, the sub-nodes will be addressed + and chosen using the ramcode board selector. If omitted, only one + set of tables can be present and said tables will be used + irrespective of ram-code configuration. + +Child device nodes describe the memory settings for different configurations and clock rates. + +Example: + + memory-controller@7000f400 { + #address-cells = < 1 >; + #size-cells = < 0 >; + compatible = "nvidia,tegra20-emc"; + reg = <0x7000f4000 0x200>; + } + + +Embedded Memory Controller ram-code table + +If the emc node has the nvidia,use-ram-code property present, then the +next level of nodes below the emc table are used to specify which settings +apply for which ram-code settings. + +If the emc node lacks the nvidia,use-ram-code property, this level is omitted +and the tables are stored directly under the emc node (see below). + +Properties: + +- name : Should be emc-tables +- nvidia,ram-code : the binary representation of the ram-code board strappings + for which this node (and children) are valid. + + + +Embedded Memory Controller configuration table + +This is a table containing the EMC register settings for the various +operating speeds of the memory controller. They are always located as +subnodes of the emc controller node. + +There are two ways of specifying which tables to use: + +* The simplest is if there is just one set of tables in the device tree, + and they will always be used (based on which frequency is used). + This is the preferred method, especially when firmware can fill in + this information based on the specific system information and just + pass it on to the kernel. + +* The slightly more complex one is when more than one memory configuration + might exist on the system. The Tegra20 platform handles this during + early boot by selecting one out of possible 4 memory settings based + on a 2-pin "ram code" bootstrap setting on the board. The values of + these strappings can be read through a register in the SoC, and thus + used to select which tables to use. + +Properties: +- name : Should be emc-table +- compatible : Should contain "nvidia,tegra20-emc-table". +- reg : either an opaque enumerator to tell different tables apart, or + the valid frequency for which the table should be used (in kHz). +- clock-frequency : the clock frequency for the EMC at which this + table should be used (in kHz). +- nvidia,emc-registers : a 46 word array of EMC registers to be programmed + for operation at the 'clock-frequency' setting. + The order and contents of the registers are: + RC, RFC, RAS, RP, R2W, W2R, R2P, W2P, RD_RCD, WR_RCD, RRD, REXT, + WDV, QUSE, QRST, QSAFE, RDV, REFRESH, BURST_REFRESH_NUM, PDEX2WR, + PDEX2RD, PCHG2PDEN, ACT2PDEN, AR2PDEN, RW2PDEN, TXSR, TCKE, TFAW, + TRPAB, TCLKSTABLE, TCLKSTOP, TREFBW, QUSE_EXTRA, FBIO_CFG6, ODT_WRITE, + ODT_READ, FBIO_CFG5, CFG_DIG_DLL, DLL_XFORM_DQS, DLL_XFORM_QUSE, + ZCAL_REF_CNT, ZCAL_WAIT_CNT, AUTO_CAL_INTERVAL, CFG_CLKTRIM_0, + CFG_CLKTRIM_1, CFG_CLKTRIM_2 + + emc-table@166000 { + reg = <166000>; + compatible = "nvidia,tegra20-emc-table"; + clock-frequency = < 166000 >; + nvidia,emc-registers = < 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 >; + }; + + emc-table@333000 { + reg = <333000>; + compatible = "nvidia,tegra20-emc-table"; + clock-frequency = < 333000 >; + nvidia,emc-registers = < 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 >; + }; diff --git a/Documentation/devicetree/bindings/gpio/gpio_nvidia.txt b/Documentation/devicetree/bindings/gpio/gpio_nvidia.txt deleted file mode 100644 index 023c9526e5f8..000000000000 --- a/Documentation/devicetree/bindings/gpio/gpio_nvidia.txt +++ /dev/null @@ -1,40 +0,0 @@ -NVIDIA Tegra GPIO controller - -Required properties: -- compatible : "nvidia,tegra-gpio" -- reg : Physical base address and length of the controller's registers. -- interrupts : The interrupt outputs from the controller. For Tegra20, - there should be 7 interrupts specified, and for Tegra30, there should - be 8 interrupts specified. -- #gpio-cells : Should be two. The first cell is the pin number and the - second cell is used to specify optional parameters: - - bit 0 specifies polarity (0 for normal, 1 for inverted) -- gpio-controller : Marks the device node as a GPIO controller. -- #interrupt-cells : Should be 2. - The first cell is the GPIO number. - The second cell is used to specify flags: - bits[3:0] trigger type and level flags: - 1 = low-to-high edge triggered. - 2 = high-to-low edge triggered. - 4 = active high level-sensitive. - 8 = active low level-sensitive. - Valid combinations are 1, 2, 3, 4, 8. -- interrupt-controller : Marks the device node as an interrupt controller. - -Example: - -gpio: gpio@6000d000 { - compatible = "nvidia,tegra20-gpio"; - reg = < 0x6000d000 0x1000 >; - interrupts = < 0 32 0x04 - 0 33 0x04 - 0 34 0x04 - 0 35 0x04 - 0 55 0x04 - 0 87 0x04 - 0 89 0x04 >; - #gpio-cells = <2>; - gpio-controller; - #interrupt-cells = <2>; - interrupt-controller; -}; diff --git a/Documentation/devicetree/bindings/gpio/nvidia,tegra20-gpio.txt b/Documentation/devicetree/bindings/gpio/nvidia,tegra20-gpio.txt new file mode 100644 index 000000000000..023c9526e5f8 --- /dev/null +++ b/Documentation/devicetree/bindings/gpio/nvidia,tegra20-gpio.txt @@ -0,0 +1,40 @@ +NVIDIA Tegra GPIO controller + +Required properties: +- compatible : "nvidia,tegra-gpio" +- reg : Physical base address and length of the controller's registers. +- interrupts : The interrupt outputs from the controller. For Tegra20, + there should be 7 interrupts specified, and for Tegra30, there should + be 8 interrupts specified. +- #gpio-cells : Should be two. The first cell is the pin number and the + second cell is used to specify optional parameters: + - bit 0 specifies polarity (0 for normal, 1 for inverted) +- gpio-controller : Marks the device node as a GPIO controller. +- #interrupt-cells : Should be 2. + The first cell is the GPIO number. + The second cell is used to specify flags: + bits[3:0] trigger type and level flags: + 1 = low-to-high edge triggered. + 2 = high-to-low edge triggered. + 4 = active high level-sensitive. + 8 = active low level-sensitive. + Valid combinations are 1, 2, 3, 4, 8. +- interrupt-controller : Marks the device node as an interrupt controller. + +Example: + +gpio: gpio@6000d000 { + compatible = "nvidia,tegra20-gpio"; + reg = < 0x6000d000 0x1000 >; + interrupts = < 0 32 0x04 + 0 33 0x04 + 0 34 0x04 + 0 35 0x04 + 0 55 0x04 + 0 87 0x04 + 0 89 0x04 >; + #gpio-cells = <2>; + gpio-controller; + #interrupt-cells = <2>; + interrupt-controller; +}; diff --git a/Documentation/devicetree/bindings/input/nvidia,tegra20-kbc.txt b/Documentation/devicetree/bindings/input/nvidia,tegra20-kbc.txt new file mode 100644 index 000000000000..72683be6de35 --- /dev/null +++ b/Documentation/devicetree/bindings/input/nvidia,tegra20-kbc.txt @@ -0,0 +1,23 @@ +* Tegra keyboard controller + +Required properties: +- compatible: "nvidia,tegra20-kbc" + +Optional properties, in addition to those specified by the shared +matrix-keyboard bindings: + +- linux,fn-keymap: a second keymap, same specification as the + matrix-keyboard-controller spec but to be used when the KEY_FN modifier + key is pressed. +- nvidia,debounce-delay-ms: delay in milliseconds per row scan for debouncing +- nvidia,repeat-delay-ms: delay in milliseconds before repeat starts +- nvidia,ghost-filter: enable ghost filtering for this device +- nvidia,wakeup-source: configure keyboard as a wakeup source for suspend/resume + +Example: + +keyboard: keyboard { + compatible = "nvidia,tegra20-kbc"; + reg = <0x7000e200 0x100>; + nvidia,ghost-filter; +}; diff --git a/Documentation/devicetree/bindings/input/tegra-kbc.txt b/Documentation/devicetree/bindings/input/tegra-kbc.txt deleted file mode 100644 index 72683be6de35..000000000000 --- a/Documentation/devicetree/bindings/input/tegra-kbc.txt +++ /dev/null @@ -1,23 +0,0 @@ -* Tegra keyboard controller - -Required properties: -- compatible: "nvidia,tegra20-kbc" - -Optional properties, in addition to those specified by the shared -matrix-keyboard bindings: - -- linux,fn-keymap: a second keymap, same specification as the - matrix-keyboard-controller spec but to be used when the KEY_FN modifier - key is pressed. -- nvidia,debounce-delay-ms: delay in milliseconds per row scan for debouncing -- nvidia,repeat-delay-ms: delay in milliseconds before repeat starts -- nvidia,ghost-filter: enable ghost filtering for this device -- nvidia,wakeup-source: configure keyboard as a wakeup source for suspend/resume - -Example: - -keyboard: keyboard { - compatible = "nvidia,tegra20-kbc"; - reg = <0x7000e200 0x100>; - nvidia,ghost-filter; -}; diff --git a/Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.txt b/Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.txt new file mode 100644 index 000000000000..f77c3031607f --- /dev/null +++ b/Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.txt @@ -0,0 +1,27 @@ +* NVIDIA Tegra Secure Digital Host Controller + +This controller on Tegra family SoCs provides an interface for MMC, SD, +and SDIO types of memory cards. + +Required properties: +- compatible : Should be "nvidia,-sdhci" +- reg : Should contain SD/MMC registers location and length +- interrupts : Should contain SD/MMC interrupt +- bus-width : Number of data lines, can be <1>, <4>, or <8> + +Optional properties: +- cd-gpios : Specify GPIOs for card detection +- wp-gpios : Specify GPIOs for write protection +- power-gpios : Specify GPIOs for power control + +Example: + +sdhci@c8000200 { + compatible = "nvidia,tegra20-sdhci"; + reg = <0xc8000200 0x200>; + interrupts = <47>; + cd-gpios = <&gpio 69 0>; /* gpio PI5 */ + wp-gpios = <&gpio 57 0>; /* gpio PH1 */ + power-gpios = <&gpio 155 0>; /* gpio PT3 */ + bus-width = <8>; +}; diff --git a/Documentation/devicetree/bindings/mmc/nvidia-sdhci.txt b/Documentation/devicetree/bindings/mmc/nvidia-sdhci.txt deleted file mode 100644 index f77c3031607f..000000000000 --- a/Documentation/devicetree/bindings/mmc/nvidia-sdhci.txt +++ /dev/null @@ -1,27 +0,0 @@ -* NVIDIA Tegra Secure Digital Host Controller - -This controller on Tegra family SoCs provides an interface for MMC, SD, -and SDIO types of memory cards. - -Required properties: -- compatible : Should be "nvidia,-sdhci" -- reg : Should contain SD/MMC registers location and length -- interrupts : Should contain SD/MMC interrupt -- bus-width : Number of data lines, can be <1>, <4>, or <8> - -Optional properties: -- cd-gpios : Specify GPIOs for card detection -- wp-gpios : Specify GPIOs for write protection -- power-gpios : Specify GPIOs for power control - -Example: - -sdhci@c8000200 { - compatible = "nvidia,tegra20-sdhci"; - reg = <0xc8000200 0x200>; - interrupts = <47>; - cd-gpios = <&gpio 69 0>; /* gpio PI5 */ - wp-gpios = <&gpio 57 0>; /* gpio PH1 */ - power-gpios = <&gpio 155 0>; /* gpio PT3 */ - bus-width = <8>; -}; diff --git a/Documentation/devicetree/bindings/nvec/nvec_nvidia.txt b/Documentation/devicetree/bindings/nvec/nvec_nvidia.txt deleted file mode 100644 index 5aeee53ff9f4..000000000000 --- a/Documentation/devicetree/bindings/nvec/nvec_nvidia.txt +++ /dev/null @@ -1,9 +0,0 @@ -NVIDIA compliant embedded controller - -Required properties: -- compatible : should be "nvidia,nvec". -- reg : the iomem of the i2c slave controller -- interrupts : the interrupt line of the i2c slave controller -- clock-frequency : the frequency of the i2c bus -- gpios : the gpio used for ec request -- slave-addr: the i2c address of the slave controller diff --git a/Documentation/devicetree/bindings/nvec/nvidia,nvec.txt b/Documentation/devicetree/bindings/nvec/nvidia,nvec.txt new file mode 100644 index 000000000000..5aeee53ff9f4 --- /dev/null +++ b/Documentation/devicetree/bindings/nvec/nvidia,nvec.txt @@ -0,0 +1,9 @@ +NVIDIA compliant embedded controller + +Required properties: +- compatible : should be "nvidia,nvec". +- reg : the iomem of the i2c slave controller +- interrupts : the interrupt line of the i2c slave controller +- clock-frequency : the frequency of the i2c bus +- gpios : the gpio used for ec request +- slave-addr: the i2c address of the slave controller diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-alc5632.txt b/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-alc5632.txt new file mode 100644 index 000000000000..b77a97c9101e --- /dev/null +++ b/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-alc5632.txt @@ -0,0 +1,59 @@ +NVIDIA Tegra audio complex + +Required properties: +- compatible : "nvidia,tegra-audio-alc5632" +- nvidia,model : The user-visible name of this sound complex. +- nvidia,audio-routing : A list of the connections between audio components. + Each entry is a pair of strings, the first being the connection's sink, + the second being the connection's source. Valid names for sources and + sinks are the ALC5632's pins: + + ALC5632 pins: + + * SPK_OUTP + * SPK_OUTN + * HP_OUT_L + * HP_OUT_R + * AUX_OUT_P + * AUX_OUT_N + * LINE_IN_L + * LINE_IN_R + * PHONE_P + * PHONE_N + * MIC1_P + * MIC1_N + * MIC2_P + * MIC2_N + * MICBIAS1 + * DMICDAT + + Board connectors: + + * Headset Stereophone + * Int Spk + * Headset Mic + * Digital Mic + +- nvidia,i2s-controller : The phandle of the Tegra I2S controller +- nvidia,audio-codec : The phandle of the ALC5632 audio codec + +Example: + +sound { + compatible = "nvidia,tegra-audio-alc5632-paz00", + "nvidia,tegra-audio-alc5632"; + + nvidia,model = "Compal PAZ00"; + + nvidia,audio-routing = + "Int Spk", "SPK_OUTP", + "Int Spk", "SPK_OUTN", + "Headset Mic","MICBIAS1", + "MIC1_N", "Headset Mic", + "MIC1_P", "Headset Mic", + "Headset Stereophone", "HP_OUT_R", + "Headset Stereophone", "HP_OUT_L"; + + nvidia,i2s-controller = <&tegra_i2s1>; + nvidia,audio-codec = <&alc5632>; +}; diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-trimslice.txt b/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-trimslice.txt new file mode 100644 index 000000000000..04b14cfb1f16 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-trimslice.txt @@ -0,0 +1,14 @@ +NVIDIA Tegra audio complex for TrimSlice + +Required properties: +- compatible : "nvidia,tegra-audio-trimslice" +- nvidia,i2s-controller : The phandle of the Tegra I2S1 controller +- nvidia,audio-codec : The phandle of the WM8903 audio codec + +Example: + +sound { + compatible = "nvidia,tegra-audio-trimslice"; + nvidia,i2s-controller = <&tegra_i2s1>; + nvidia,audio-codec = <&codec>; +}; diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-wm8753.txt b/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-wm8753.txt new file mode 100644 index 000000000000..c4dd39ce6165 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-wm8753.txt @@ -0,0 +1,54 @@ +NVIDIA Tegra audio complex + +Required properties: +- compatible : "nvidia,tegra-audio-wm8753" +- nvidia,model : The user-visible name of this sound complex. +- nvidia,audio-routing : A list of the connections between audio components. + Each entry is a pair of strings, the first being the connection's sink, + the second being the connection's source. Valid names for sources and + sinks are the WM8753's pins, and the jacks on the board: + + WM8753 pins: + + * LOUT1 + * LOUT2 + * ROUT1 + * ROUT2 + * MONO1 + * MONO2 + * OUT3 + * OUT4 + * LINE1 + * LINE2 + * RXP + * RXN + * ACIN + * ACOP + * MIC1N + * MIC1 + * MIC2N + * MIC2 + * Mic Bias + + Board connectors: + + * Headphone Jack + * Mic Jack + +- nvidia,i2s-controller : The phandle of the Tegra I2S1 controller +- nvidia,audio-codec : The phandle of the WM8753 audio codec +Example: + +sound { + compatible = "nvidia,tegra-audio-wm8753-whistler", + "nvidia,tegra-audio-wm8753" + nvidia,model = "tegra-wm8753-harmony"; + + nvidia,audio-routing = + "Headphone Jack", "LOUT1", + "Headphone Jack", "ROUT1"; + + nvidia,i2s-controller = <&i2s1>; + nvidia,audio-codec = <&wm8753>; +}; + diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-wm8903.txt b/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-wm8903.txt new file mode 100644 index 000000000000..d5b0da8bf1d8 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-wm8903.txt @@ -0,0 +1,71 @@ +NVIDIA Tegra audio complex + +Required properties: +- compatible : "nvidia,tegra-audio-wm8903" +- nvidia,model : The user-visible name of this sound complex. +- nvidia,audio-routing : A list of the connections between audio components. + Each entry is a pair of strings, the first being the connection's sink, + the second being the connection's source. Valid names for sources and + sinks are the WM8903's pins, and the jacks on the board: + + WM8903 pins: + + * IN1L + * IN1R + * IN2L + * IN2R + * IN3L + * IN3R + * DMICDAT + * HPOUTL + * HPOUTR + * LINEOUTL + * LINEOUTR + * LOP + * LON + * ROP + * RON + * MICBIAS + + Board connectors: + + * Headphone Jack + * Int Spk + * Mic Jack + +- nvidia,i2s-controller : The phandle of the Tegra I2S1 controller +- nvidia,audio-codec : The phandle of the WM8903 audio codec + +Optional properties: +- nvidia,spkr-en-gpios : The GPIO that enables the speakers +- nvidia,hp-mute-gpios : The GPIO that mutes the headphones +- nvidia,hp-det-gpios : The GPIO that detect headphones are plugged in +- nvidia,int-mic-en-gpios : The GPIO that enables the internal microphone +- nvidia,ext-mic-en-gpios : The GPIO that enables the external microphone + +Example: + +sound { + compatible = "nvidia,tegra-audio-wm8903-harmony", + "nvidia,tegra-audio-wm8903" + nvidia,model = "tegra-wm8903-harmony"; + + nvidia,audio-routing = + "Headphone Jack", "HPOUTR", + "Headphone Jack", "HPOUTL", + "Int Spk", "ROP", + "Int Spk", "RON", + "Int Spk", "LOP", + "Int Spk", "LON", + "Mic Jack", "MICBIAS", + "IN1L", "Mic Jack"; + + nvidia,i2s-controller = <&i2s1>; + nvidia,audio-codec = <&wm8903>; + + nvidia,spkr-en-gpios = <&codec 2 0>; + nvidia,hp-det-gpios = <&gpio 178 0>; /* gpio PW2 */ + nvidia,int-mic-en-gpios = <&gpio 184 0>; /*gpio PX0 */ + nvidia,ext-mic-en-gpios = <&gpio 185 0>; /* gpio PX1 */ +}; + diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra20-das.txt b/Documentation/devicetree/bindings/sound/nvidia,tegra20-das.txt new file mode 100644 index 000000000000..6de3a7ee4efb --- /dev/null +++ b/Documentation/devicetree/bindings/sound/nvidia,tegra20-das.txt @@ -0,0 +1,12 @@ +NVIDIA Tegra 20 DAS (Digital Audio Switch) controller + +Required properties: +- compatible : "nvidia,tegra20-das" +- reg : Should contain DAS registers location and length + +Example: + +das@70000c00 { + compatible = "nvidia,tegra20-das"; + reg = <0x70000c00 0x80>; +}; diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra20-i2s.txt b/Documentation/devicetree/bindings/sound/nvidia,tegra20-i2s.txt new file mode 100644 index 000000000000..0df2b5c816e3 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/nvidia,tegra20-i2s.txt @@ -0,0 +1,17 @@ +NVIDIA Tegra 20 I2S controller + +Required properties: +- compatible : "nvidia,tegra20-i2s" +- reg : Should contain I2S registers location and length +- interrupts : Should contain I2S interrupt +- nvidia,dma-request-selector : The Tegra DMA controller's phandle and + request selector for this I2S controller + +Example: + +i2s@70002800 { + compatible = "nvidia,tegra20-i2s"; + reg = <0x70002800 0x200>; + interrupts = < 45 >; + nvidia,dma-request-selector = < &apbdma 2 >; +}; diff --git a/Documentation/devicetree/bindings/sound/tegra-audio-alc5632.txt b/Documentation/devicetree/bindings/sound/tegra-audio-alc5632.txt deleted file mode 100644 index b77a97c9101e..000000000000 --- a/Documentation/devicetree/bindings/sound/tegra-audio-alc5632.txt +++ /dev/null @@ -1,59 +0,0 @@ -NVIDIA Tegra audio complex - -Required properties: -- compatible : "nvidia,tegra-audio-alc5632" -- nvidia,model : The user-visible name of this sound complex. -- nvidia,audio-routing : A list of the connections between audio components. - Each entry is a pair of strings, the first being the connection's sink, - the second being the connection's source. Valid names for sources and - sinks are the ALC5632's pins: - - ALC5632 pins: - - * SPK_OUTP - * SPK_OUTN - * HP_OUT_L - * HP_OUT_R - * AUX_OUT_P - * AUX_OUT_N - * LINE_IN_L - * LINE_IN_R - * PHONE_P - * PHONE_N - * MIC1_P - * MIC1_N - * MIC2_P - * MIC2_N - * MICBIAS1 - * DMICDAT - - Board connectors: - - * Headset Stereophone - * Int Spk - * Headset Mic - * Digital Mic - -- nvidia,i2s-controller : The phandle of the Tegra I2S controller -- nvidia,audio-codec : The phandle of the ALC5632 audio codec - -Example: - -sound { - compatible = "nvidia,tegra-audio-alc5632-paz00", - "nvidia,tegra-audio-alc5632"; - - nvidia,model = "Compal PAZ00"; - - nvidia,audio-routing = - "Int Spk", "SPK_OUTP", - "Int Spk", "SPK_OUTN", - "Headset Mic","MICBIAS1", - "MIC1_N", "Headset Mic", - "MIC1_P", "Headset Mic", - "Headset Stereophone", "HP_OUT_R", - "Headset Stereophone", "HP_OUT_L"; - - nvidia,i2s-controller = <&tegra_i2s1>; - nvidia,audio-codec = <&alc5632>; -}; diff --git a/Documentation/devicetree/bindings/sound/tegra-audio-trimslice.txt b/Documentation/devicetree/bindings/sound/tegra-audio-trimslice.txt deleted file mode 100644 index 04b14cfb1f16..000000000000 --- a/Documentation/devicetree/bindings/sound/tegra-audio-trimslice.txt +++ /dev/null @@ -1,14 +0,0 @@ -NVIDIA Tegra audio complex for TrimSlice - -Required properties: -- compatible : "nvidia,tegra-audio-trimslice" -- nvidia,i2s-controller : The phandle of the Tegra I2S1 controller -- nvidia,audio-codec : The phandle of the WM8903 audio codec - -Example: - -sound { - compatible = "nvidia,tegra-audio-trimslice"; - nvidia,i2s-controller = <&tegra_i2s1>; - nvidia,audio-codec = <&codec>; -}; diff --git a/Documentation/devicetree/bindings/sound/tegra-audio-wm8753.txt b/Documentation/devicetree/bindings/sound/tegra-audio-wm8753.txt deleted file mode 100644 index c4dd39ce6165..000000000000 --- a/Documentation/devicetree/bindings/sound/tegra-audio-wm8753.txt +++ /dev/null @@ -1,54 +0,0 @@ -NVIDIA Tegra audio complex - -Required properties: -- compatible : "nvidia,tegra-audio-wm8753" -- nvidia,model : The user-visible name of this sound complex. -- nvidia,audio-routing : A list of the connections between audio components. - Each entry is a pair of strings, the first being the connection's sink, - the second being the connection's source. Valid names for sources and - sinks are the WM8753's pins, and the jacks on the board: - - WM8753 pins: - - * LOUT1 - * LOUT2 - * ROUT1 - * ROUT2 - * MONO1 - * MONO2 - * OUT3 - * OUT4 - * LINE1 - * LINE2 - * RXP - * RXN - * ACIN - * ACOP - * MIC1N - * MIC1 - * MIC2N - * MIC2 - * Mic Bias - - Board connectors: - - * Headphone Jack - * Mic Jack - -- nvidia,i2s-controller : The phandle of the Tegra I2S1 controller -- nvidia,audio-codec : The phandle of the WM8753 audio codec -Example: - -sound { - compatible = "nvidia,tegra-audio-wm8753-whistler", - "nvidia,tegra-audio-wm8753" - nvidia,model = "tegra-wm8753-harmony"; - - nvidia,audio-routing = - "Headphone Jack", "LOUT1", - "Headphone Jack", "ROUT1"; - - nvidia,i2s-controller = <&i2s1>; - nvidia,audio-codec = <&wm8753>; -}; - diff --git a/Documentation/devicetree/bindings/sound/tegra-audio-wm8903.txt b/Documentation/devicetree/bindings/sound/tegra-audio-wm8903.txt deleted file mode 100644 index d5b0da8bf1d8..000000000000 --- a/Documentation/devicetree/bindings/sound/tegra-audio-wm8903.txt +++ /dev/null @@ -1,71 +0,0 @@ -NVIDIA Tegra audio complex - -Required properties: -- compatible : "nvidia,tegra-audio-wm8903" -- nvidia,model : The user-visible name of this sound complex. -- nvidia,audio-routing : A list of the connections between audio components. - Each entry is a pair of strings, the first being the connection's sink, - the second being the connection's source. Valid names for sources and - sinks are the WM8903's pins, and the jacks on the board: - - WM8903 pins: - - * IN1L - * IN1R - * IN2L - * IN2R - * IN3L - * IN3R - * DMICDAT - * HPOUTL - * HPOUTR - * LINEOUTL - * LINEOUTR - * LOP - * LON - * ROP - * RON - * MICBIAS - - Board connectors: - - * Headphone Jack - * Int Spk - * Mic Jack - -- nvidia,i2s-controller : The phandle of the Tegra I2S1 controller -- nvidia,audio-codec : The phandle of the WM8903 audio codec - -Optional properties: -- nvidia,spkr-en-gpios : The GPIO that enables the speakers -- nvidia,hp-mute-gpios : The GPIO that mutes the headphones -- nvidia,hp-det-gpios : The GPIO that detect headphones are plugged in -- nvidia,int-mic-en-gpios : The GPIO that enables the internal microphone -- nvidia,ext-mic-en-gpios : The GPIO that enables the external microphone - -Example: - -sound { - compatible = "nvidia,tegra-audio-wm8903-harmony", - "nvidia,tegra-audio-wm8903" - nvidia,model = "tegra-wm8903-harmony"; - - nvidia,audio-routing = - "Headphone Jack", "HPOUTR", - "Headphone Jack", "HPOUTL", - "Int Spk", "ROP", - "Int Spk", "RON", - "Int Spk", "LOP", - "Int Spk", "LON", - "Mic Jack", "MICBIAS", - "IN1L", "Mic Jack"; - - nvidia,i2s-controller = <&i2s1>; - nvidia,audio-codec = <&wm8903>; - - nvidia,spkr-en-gpios = <&codec 2 0>; - nvidia,hp-det-gpios = <&gpio 178 0>; /* gpio PW2 */ - nvidia,int-mic-en-gpios = <&gpio 184 0>; /*gpio PX0 */ - nvidia,ext-mic-en-gpios = <&gpio 185 0>; /* gpio PX1 */ -}; - diff --git a/Documentation/devicetree/bindings/sound/tegra20-das.txt b/Documentation/devicetree/bindings/sound/tegra20-das.txt deleted file mode 100644 index 6de3a7ee4efb..000000000000 --- a/Documentation/devicetree/bindings/sound/tegra20-das.txt +++ /dev/null @@ -1,12 +0,0 @@ -NVIDIA Tegra 20 DAS (Digital Audio Switch) controller - -Required properties: -- compatible : "nvidia,tegra20-das" -- reg : Should contain DAS registers location and length - -Example: - -das@70000c00 { - compatible = "nvidia,tegra20-das"; - reg = <0x70000c00 0x80>; -}; diff --git a/Documentation/devicetree/bindings/sound/tegra20-i2s.txt b/Documentation/devicetree/bindings/sound/tegra20-i2s.txt deleted file mode 100644 index 0df2b5c816e3..000000000000 --- a/Documentation/devicetree/bindings/sound/tegra20-i2s.txt +++ /dev/null @@ -1,17 +0,0 @@ -NVIDIA Tegra 20 I2S controller - -Required properties: -- compatible : "nvidia,tegra20-i2s" -- reg : Should contain I2S registers location and length -- interrupts : Should contain I2S interrupt -- nvidia,dma-request-selector : The Tegra DMA controller's phandle and - request selector for this I2S controller - -Example: - -i2s@70002800 { - compatible = "nvidia,tegra20-i2s"; - reg = <0x70002800 0x200>; - interrupts = < 45 >; - nvidia,dma-request-selector = < &apbdma 2 >; -}; diff --git a/Documentation/devicetree/bindings/spi/nvidia,tegra20-spi.txt b/Documentation/devicetree/bindings/spi/nvidia,tegra20-spi.txt new file mode 100644 index 000000000000..6b9e51896693 --- /dev/null +++ b/Documentation/devicetree/bindings/spi/nvidia,tegra20-spi.txt @@ -0,0 +1,5 @@ +NVIDIA Tegra 2 SPI device + +Required properties: +- compatible : should be "nvidia,tegra20-spi". +- gpios : should specify GPIOs used for chipselect. diff --git a/Documentation/devicetree/bindings/spi/spi_nvidia.txt b/Documentation/devicetree/bindings/spi/spi_nvidia.txt deleted file mode 100644 index 6b9e51896693..000000000000 --- a/Documentation/devicetree/bindings/spi/spi_nvidia.txt +++ /dev/null @@ -1,5 +0,0 @@ -NVIDIA Tegra 2 SPI device - -Required properties: -- compatible : should be "nvidia,tegra20-spi". -- gpios : should specify GPIOs used for chipselect. diff --git a/Documentation/devicetree/bindings/usb/nvidia,tegra20-ehci.txt b/Documentation/devicetree/bindings/usb/nvidia,tegra20-ehci.txt new file mode 100644 index 000000000000..e9b005dc7625 --- /dev/null +++ b/Documentation/devicetree/bindings/usb/nvidia,tegra20-ehci.txt @@ -0,0 +1,29 @@ +Tegra SOC USB controllers + +The device node for a USB controller that is part of a Tegra +SOC is as described in the document "Open Firmware Recommended +Practice : Universal Serial Bus" with the following modifications +and additions : + +Required properties : + - compatible : Should be "nvidia,tegra20-ehci" for USB controllers + used in host mode. + - phy_type : Should be one of "ulpi" or "utmi". + - nvidia,vbus-gpio : If present, specifies a gpio that needs to be + activated for the bus to be powered. + +Required properties for phy_type == ulpi: + - nvidia,phy-reset-gpio : The GPIO used to reset the PHY. + +Optional properties: + - dr_mode : dual role mode. Indicates the working mode for + nvidia,tegra20-ehci compatible controllers. Can be "host", "peripheral", + or "otg". Default to "host" if not defined for backward compatibility. + host means this is a host controller + peripheral means it is device controller + otg means it can operate as either ("on the go") + - nvidia,has-legacy-mode : boolean indicates whether this controller can + operate in legacy mode (as APX 2500 / 2600). In legacy mode some + registers are accessed through the APB_MISC base address instead of + the USB controller. Since this is a legacy issue it probably does not + warrant a compatible string of its own. diff --git a/Documentation/devicetree/bindings/usb/tegra-usb.txt b/Documentation/devicetree/bindings/usb/tegra-usb.txt deleted file mode 100644 index e9b005dc7625..000000000000 --- a/Documentation/devicetree/bindings/usb/tegra-usb.txt +++ /dev/null @@ -1,29 +0,0 @@ -Tegra SOC USB controllers - -The device node for a USB controller that is part of a Tegra -SOC is as described in the document "Open Firmware Recommended -Practice : Universal Serial Bus" with the following modifications -and additions : - -Required properties : - - compatible : Should be "nvidia,tegra20-ehci" for USB controllers - used in host mode. - - phy_type : Should be one of "ulpi" or "utmi". - - nvidia,vbus-gpio : If present, specifies a gpio that needs to be - activated for the bus to be powered. - -Required properties for phy_type == ulpi: - - nvidia,phy-reset-gpio : The GPIO used to reset the PHY. - -Optional properties: - - dr_mode : dual role mode. Indicates the working mode for - nvidia,tegra20-ehci compatible controllers. Can be "host", "peripheral", - or "otg". Default to "host" if not defined for backward compatibility. - host means this is a host controller - peripheral means it is device controller - otg means it can operate as either ("on the go") - - nvidia,has-legacy-mode : boolean indicates whether this controller can - operate in legacy mode (as APX 2500 / 2600). In legacy mode some - registers are accessed through the APB_MISC base address instead of - the USB controller. Since this is a legacy issue it probably does not - warrant a compatible string of its own. -- cgit v1.2.3 From c65739437045c351a2a0ddb834719b9d616d4d47 Mon Sep 17 00:00:00 2001 From: Jean-Christophe PLAGNIOL-VILLARD Date: Mon, 9 Apr 2012 19:36:36 +0800 Subject: ARM: at91: aic add dt support for external irqs Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD Signed-off-by: Nicolas Ferre --- Documentation/devicetree/bindings/arm/atmel-aic.txt | 1 + arch/arm/boot/dts/at91sam9260.dtsi | 1 + arch/arm/boot/dts/at91sam9263.dtsi | 1 + arch/arm/boot/dts/at91sam9g45.dtsi | 1 + arch/arm/boot/dts/at91sam9x5.dtsi | 1 + arch/arm/mach-at91/at91sam9x5.c | 2 -- arch/arm/mach-at91/irq.c | 12 ++++++++++++ 7 files changed, 17 insertions(+), 2 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/atmel-aic.txt b/Documentation/devicetree/bindings/arm/atmel-aic.txt index aabca4f83402..1953b0c1b7c5 100644 --- a/Documentation/devicetree/bindings/arm/atmel-aic.txt +++ b/Documentation/devicetree/bindings/arm/atmel-aic.txt @@ -15,6 +15,7 @@ Required properties: Valid combinations are 1, 2, 3, 4, 8. Default flag for internal sources should be set to 4 (active high). - reg: Should contain AIC registers location and length +- atmel,external-irqs: u32 array of external irqs. Examples: /* diff --git a/arch/arm/boot/dts/at91sam9260.dtsi b/arch/arm/boot/dts/at91sam9260.dtsi index f449efc9825f..f2c96430f9cb 100644 --- a/arch/arm/boot/dts/at91sam9260.dtsi +++ b/arch/arm/boot/dts/at91sam9260.dtsi @@ -56,6 +56,7 @@ compatible = "atmel,at91rm9200-aic"; interrupt-controller; reg = <0xfffff000 0x200>; + atmel,external-irqs = <29 30 31>; }; ramc0: ramc@ffffea00 { diff --git a/arch/arm/boot/dts/at91sam9263.dtsi b/arch/arm/boot/dts/at91sam9263.dtsi index 0209913a65a2..c803636ca9f5 100644 --- a/arch/arm/boot/dts/at91sam9263.dtsi +++ b/arch/arm/boot/dts/at91sam9263.dtsi @@ -52,6 +52,7 @@ compatible = "atmel,at91rm9200-aic"; interrupt-controller; reg = <0xfffff000 0x200>; + atmel,external-irqs = <30 31>; }; pmc: pmc@fffffc00 { diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi b/arch/arm/boot/dts/at91sam9g45.dtsi index 7dbccaf199f7..2d01ce2a023f 100644 --- a/arch/arm/boot/dts/at91sam9g45.dtsi +++ b/arch/arm/boot/dts/at91sam9g45.dtsi @@ -57,6 +57,7 @@ compatible = "atmel,at91rm9200-aic"; interrupt-controller; reg = <0xfffff000 0x200>; + atmel,external-irqs = <31>; }; ramc0: ramc@ffffe400 { diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi b/arch/arm/boot/dts/at91sam9x5.dtsi index 6b3ef4339ae7..6a0a0fbb6283 100644 --- a/arch/arm/boot/dts/at91sam9x5.dtsi +++ b/arch/arm/boot/dts/at91sam9x5.dtsi @@ -55,6 +55,7 @@ compatible = "atmel,at91rm9200-aic"; interrupt-controller; reg = <0xfffff000 0x200>; + atmel,external-irqs = <31>; }; ramc0: ramc@ffffe800 { diff --git a/arch/arm/mach-at91/at91sam9x5.c b/arch/arm/mach-at91/at91sam9x5.c index 1b144b4d3ce1..537710b68982 100644 --- a/arch/arm/mach-at91/at91sam9x5.c +++ b/arch/arm/mach-at91/at91sam9x5.c @@ -312,8 +312,6 @@ static void __init at91sam9x5_map_io(void) void __init at91sam9x5_initialize(void) { - at91_extern_irq = (1 << AT91SAM9X5_ID_IRQ0); - /* Register GPIO subsystem (using DT) */ at91_gpio_init(NULL, 0); } diff --git a/arch/arm/mach-at91/irq.c b/arch/arm/mach-at91/irq.c index 2d5d4c88a527..df8605fd7bad 100644 --- a/arch/arm/mach-at91/irq.c +++ b/arch/arm/mach-at91/irq.c @@ -194,6 +194,10 @@ static struct irq_domain_ops at91_aic_irq_ops = { int __init at91_aic_of_init(struct device_node *node, struct device_node *parent) { + struct property *prop; + const __be32 *p; + u32 val; + at91_aic_base = of_iomap(node, 0); at91_aic_np = node; @@ -202,6 +206,14 @@ int __init at91_aic_of_init(struct device_node *node, if (!at91_aic_domain) panic("Unable to add AIC irq domain (DT)\n"); + at91_extern_irq = 0; + of_property_for_each_u32(node, "atmel,external-irqs", prop, p, val) { + if (val > 31) + pr_warn("AIC: external irq %d > 31 skip it\n", val); + else + at91_extern_irq |= (1 << val); + } + irq_set_default_host(at91_aic_domain); at91_aic_hw_init(NR_AIC_IRQS); -- cgit v1.2.3 From f8a073ee378b9893aee0749c3868a6ecfb0c1636 Mon Sep 17 00:00:00 2001 From: Ludovic Desroches Date: Wed, 20 Jun 2012 16:13:30 +0200 Subject: ARM: at91: add of irq priorities support Add a third cell to define irq priority. Signed-off-by: Ludovic Desroches Reviewed-by: Rob Herring Signed-off-by: Nicolas Ferre --- .../devicetree/bindings/arm/atmel-aic.txt | 8 +++-- arch/arm/boot/dts/at91sam9260.dtsi | 36 ++++++++++---------- arch/arm/boot/dts/at91sam9263.dtsi | 30 ++++++++--------- arch/arm/boot/dts/at91sam9g45.dtsi | 38 +++++++++++----------- arch/arm/boot/dts/at91sam9n12.dtsi | 30 ++++++++--------- arch/arm/boot/dts/at91sam9x5.dtsi | 38 +++++++++++----------- arch/arm/mach-at91/include/mach/at91_aic.h | 3 ++ arch/arm/mach-at91/irq.c | 34 +++++++++++++++++-- 8 files changed, 125 insertions(+), 92 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/atmel-aic.txt b/Documentation/devicetree/bindings/arm/atmel-aic.txt index 1953b0c1b7c5..19078bf5cca8 100644 --- a/Documentation/devicetree/bindings/arm/atmel-aic.txt +++ b/Documentation/devicetree/bindings/arm/atmel-aic.txt @@ -4,7 +4,7 @@ Required properties: - compatible: Should be "atmel,-aic" - interrupt-controller: Identifies the node as an interrupt controller. - interrupt-parent: For single AIC system, it is an empty property. -- #interrupt-cells: The number of cells to define the interrupts. It sould be 2. +- #interrupt-cells: The number of cells to define the interrupts. It sould be 3. The first cell is the IRQ number (aka "Peripheral IDentifier" on datasheet). The second cell is used to specify flags: bits[3:0] trigger type and level flags: @@ -14,6 +14,8 @@ Required properties: 8 = active low level-sensitive. Valid combinations are 1, 2, 3, 4, 8. Default flag for internal sources should be set to 4 (active high). + The third cell is used to specify the irq priority from 0 (lowest) to 7 + (highest). - reg: Should contain AIC registers location and length - atmel,external-irqs: u32 array of external irqs. @@ -25,7 +27,7 @@ Examples: compatible = "atmel,at91rm9200-aic"; interrupt-controller; interrupt-parent; - #interrupt-cells = <2>; + #interrupt-cells = <3>; reg = <0xfffff000 0x200>; }; @@ -35,5 +37,5 @@ Examples: dma: dma-controller@ffffec00 { compatible = "atmel,at91sam9g45-dma"; reg = <0xffffec00 0x200>; - interrupts = <21 4>; + interrupts = <21 4 5>; }; diff --git a/arch/arm/boot/dts/at91sam9260.dtsi b/arch/arm/boot/dts/at91sam9260.dtsi index f2c96430f9cb..66389c1c6f62 100644 --- a/arch/arm/boot/dts/at91sam9260.dtsi +++ b/arch/arm/boot/dts/at91sam9260.dtsi @@ -52,7 +52,7 @@ ranges; aic: interrupt-controller@fffff000 { - #interrupt-cells = <2>; + #interrupt-cells = <3>; compatible = "atmel,at91rm9200-aic"; interrupt-controller; reg = <0xfffff000 0x200>; @@ -82,25 +82,25 @@ pit: timer@fffffd30 { compatible = "atmel,at91sam9260-pit"; reg = <0xfffffd30 0xf>; - interrupts = <1 4>; + interrupts = <1 4 7>; }; tcb0: timer@fffa0000 { compatible = "atmel,at91rm9200-tcb"; reg = <0xfffa0000 0x100>; - interrupts = <17 4 18 4 19 4>; + interrupts = <17 4 0 18 4 0 19 4 0>; }; tcb1: timer@fffdc000 { compatible = "atmel,at91rm9200-tcb"; reg = <0xfffdc000 0x100>; - interrupts = <26 4 27 4 28 4>; + interrupts = <26 4 0 27 4 0 28 4 0>; }; pioA: gpio@fffff400 { compatible = "atmel,at91rm9200-gpio"; reg = <0xfffff400 0x100>; - interrupts = <2 4>; + interrupts = <2 4 1>; #gpio-cells = <2>; gpio-controller; interrupt-controller; @@ -109,7 +109,7 @@ pioB: gpio@fffff600 { compatible = "atmel,at91rm9200-gpio"; reg = <0xfffff600 0x100>; - interrupts = <3 4>; + interrupts = <3 4 1>; #gpio-cells = <2>; gpio-controller; interrupt-controller; @@ -118,7 +118,7 @@ pioC: gpio@fffff800 { compatible = "atmel,at91rm9200-gpio"; reg = <0xfffff800 0x100>; - interrupts = <4 4>; + interrupts = <4 4 1>; #gpio-cells = <2>; gpio-controller; interrupt-controller; @@ -127,14 +127,14 @@ dbgu: serial@fffff200 { compatible = "atmel,at91sam9260-usart"; reg = <0xfffff200 0x200>; - interrupts = <1 4>; + interrupts = <1 4 7>; status = "disabled"; }; usart0: serial@fffb0000 { compatible = "atmel,at91sam9260-usart"; reg = <0xfffb0000 0x200>; - interrupts = <6 4>; + interrupts = <6 4 5>; atmel,use-dma-rx; atmel,use-dma-tx; status = "disabled"; @@ -143,7 +143,7 @@ usart1: serial@fffb4000 { compatible = "atmel,at91sam9260-usart"; reg = <0xfffb4000 0x200>; - interrupts = <7 4>; + interrupts = <7 4 5>; atmel,use-dma-rx; atmel,use-dma-tx; status = "disabled"; @@ -152,7 +152,7 @@ usart2: serial@fffb8000 { compatible = "atmel,at91sam9260-usart"; reg = <0xfffb8000 0x200>; - interrupts = <8 4>; + interrupts = <8 4 5>; atmel,use-dma-rx; atmel,use-dma-tx; status = "disabled"; @@ -161,7 +161,7 @@ usart3: serial@fffd0000 { compatible = "atmel,at91sam9260-usart"; reg = <0xfffd0000 0x200>; - interrupts = <23 4>; + interrupts = <23 4 5>; atmel,use-dma-rx; atmel,use-dma-tx; status = "disabled"; @@ -170,7 +170,7 @@ usart4: serial@fffd4000 { compatible = "atmel,at91sam9260-usart"; reg = <0xfffd4000 0x200>; - interrupts = <24 4>; + interrupts = <24 4 5>; atmel,use-dma-rx; atmel,use-dma-tx; status = "disabled"; @@ -179,7 +179,7 @@ usart5: serial@fffd8000 { compatible = "atmel,at91sam9260-usart"; reg = <0xfffd8000 0x200>; - interrupts = <25 4>; + interrupts = <25 4 5>; atmel,use-dma-rx; atmel,use-dma-tx; status = "disabled"; @@ -188,21 +188,21 @@ macb0: ethernet@fffc4000 { compatible = "cdns,at32ap7000-macb", "cdns,macb"; reg = <0xfffc4000 0x100>; - interrupts = <21 4>; + interrupts = <21 4 3>; status = "disabled"; }; usb1: gadget@fffa4000 { compatible = "atmel,at91rm9200-udc"; reg = <0xfffa4000 0x4000>; - interrupts = <10 4>; + interrupts = <10 4 2>; status = "disabled"; }; adc0: adc@fffe0000 { compatible = "atmel,at91sam9260-adc"; reg = <0xfffe0000 0x100>; - interrupts = <5 4>; + interrupts = <5 4 0>; atmel,adc-use-external-triggers; atmel,adc-channels-used = <0xf>; atmel,adc-vref = <3300>; @@ -254,7 +254,7 @@ usb0: ohci@00500000 { compatible = "atmel,at91rm9200-ohci", "usb-ohci"; reg = <0x00500000 0x100000>; - interrupts = <20 4>; + interrupts = <20 4 2>; status = "disabled"; }; }; diff --git a/arch/arm/boot/dts/at91sam9263.dtsi b/arch/arm/boot/dts/at91sam9263.dtsi index c803636ca9f5..b460d6ce9eb5 100644 --- a/arch/arm/boot/dts/at91sam9263.dtsi +++ b/arch/arm/boot/dts/at91sam9263.dtsi @@ -48,7 +48,7 @@ ranges; aic: interrupt-controller@fffff000 { - #interrupt-cells = <2>; + #interrupt-cells = <3>; compatible = "atmel,at91rm9200-aic"; interrupt-controller; reg = <0xfffff000 0x200>; @@ -69,13 +69,13 @@ pit: timer@fffffd30 { compatible = "atmel,at91sam9260-pit"; reg = <0xfffffd30 0xf>; - interrupts = <1 4>; + interrupts = <1 4 7>; }; tcb0: timer@fff7c000 { compatible = "atmel,at91rm9200-tcb"; reg = <0xfff7c000 0x100>; - interrupts = <19 4>; + interrupts = <19 4 0>; }; rstc@fffffd00 { @@ -91,7 +91,7 @@ pioA: gpio@fffff200 { compatible = "atmel,at91rm9200-gpio"; reg = <0xfffff200 0x100>; - interrupts = <2 4>; + interrupts = <2 4 1>; #gpio-cells = <2>; gpio-controller; interrupt-controller; @@ -100,7 +100,7 @@ pioB: gpio@fffff400 { compatible = "atmel,at91rm9200-gpio"; reg = <0xfffff400 0x100>; - interrupts = <3 4>; + interrupts = <3 4 1>; #gpio-cells = <2>; gpio-controller; interrupt-controller; @@ -109,7 +109,7 @@ pioC: gpio@fffff600 { compatible = "atmel,at91rm9200-gpio"; reg = <0xfffff600 0x100>; - interrupts = <4 4>; + interrupts = <4 4 1>; #gpio-cells = <2>; gpio-controller; interrupt-controller; @@ -118,7 +118,7 @@ pioD: gpio@fffff800 { compatible = "atmel,at91rm9200-gpio"; reg = <0xfffff800 0x100>; - interrupts = <4 4>; + interrupts = <4 4 1>; #gpio-cells = <2>; gpio-controller; interrupt-controller; @@ -127,7 +127,7 @@ pioE: gpio@fffffa00 { compatible = "atmel,at91rm9200-gpio"; reg = <0xfffffa00 0x100>; - interrupts = <4 4>; + interrupts = <4 4 1>; #gpio-cells = <2>; gpio-controller; interrupt-controller; @@ -136,14 +136,14 @@ dbgu: serial@ffffee00 { compatible = "atmel,at91sam9260-usart"; reg = <0xffffee00 0x200>; - interrupts = <1 4>; + interrupts = <1 4 7>; status = "disabled"; }; usart0: serial@fff8c000 { compatible = "atmel,at91sam9260-usart"; reg = <0xfff8c000 0x200>; - interrupts = <7 4>; + interrupts = <7 4 5>; atmel,use-dma-rx; atmel,use-dma-tx; status = "disabled"; @@ -152,7 +152,7 @@ usart1: serial@fff90000 { compatible = "atmel,at91sam9260-usart"; reg = <0xfff90000 0x200>; - interrupts = <8 4>; + interrupts = <8 4 5>; atmel,use-dma-rx; atmel,use-dma-tx; status = "disabled"; @@ -161,7 +161,7 @@ usart2: serial@fff94000 { compatible = "atmel,at91sam9260-usart"; reg = <0xfff94000 0x200>; - interrupts = <9 4>; + interrupts = <9 4 5>; atmel,use-dma-rx; atmel,use-dma-tx; status = "disabled"; @@ -170,14 +170,14 @@ macb0: ethernet@fffbc000 { compatible = "cdns,at32ap7000-macb", "cdns,macb"; reg = <0xfffbc000 0x100>; - interrupts = <21 4>; + interrupts = <21 4 3>; status = "disabled"; }; usb1: gadget@fff78000 { compatible = "atmel,at91rm9200-udc"; reg = <0xfff78000 0x4000>; - interrupts = <24 4>; + interrupts = <24 4 2>; status = "disabled"; }; }; @@ -201,7 +201,7 @@ usb0: ohci@00a00000 { compatible = "atmel,at91rm9200-ohci", "usb-ohci"; reg = <0x00a00000 0x100000>; - interrupts = <29 4>; + interrupts = <29 4 2>; status = "disabled"; }; }; diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi b/arch/arm/boot/dts/at91sam9g45.dtsi index 2d01ce2a023f..bafa8806fc17 100644 --- a/arch/arm/boot/dts/at91sam9g45.dtsi +++ b/arch/arm/boot/dts/at91sam9g45.dtsi @@ -53,7 +53,7 @@ ranges; aic: interrupt-controller@fffff000 { - #interrupt-cells = <2>; + #interrupt-cells = <3>; compatible = "atmel,at91rm9200-aic"; interrupt-controller; reg = <0xfffff000 0x200>; @@ -79,7 +79,7 @@ pit: timer@fffffd30 { compatible = "atmel,at91sam9260-pit"; reg = <0xfffffd30 0xf>; - interrupts = <1 4>; + interrupts = <1 4 7>; }; @@ -91,25 +91,25 @@ tcb0: timer@fff7c000 { compatible = "atmel,at91rm9200-tcb"; reg = <0xfff7c000 0x100>; - interrupts = <18 4>; + interrupts = <18 4 0>; }; tcb1: timer@fffd4000 { compatible = "atmel,at91rm9200-tcb"; reg = <0xfffd4000 0x100>; - interrupts = <18 4>; + interrupts = <18 4 0>; }; dma: dma-controller@ffffec00 { compatible = "atmel,at91sam9g45-dma"; reg = <0xffffec00 0x200>; - interrupts = <21 4>; + interrupts = <21 4 0>; }; pioA: gpio@fffff200 { compatible = "atmel,at91rm9200-gpio"; reg = <0xfffff200 0x100>; - interrupts = <2 4>; + interrupts = <2 4 1>; #gpio-cells = <2>; gpio-controller; interrupt-controller; @@ -118,7 +118,7 @@ pioB: gpio@fffff400 { compatible = "atmel,at91rm9200-gpio"; reg = <0xfffff400 0x100>; - interrupts = <3 4>; + interrupts = <3 4 1>; #gpio-cells = <2>; gpio-controller; interrupt-controller; @@ -127,7 +127,7 @@ pioC: gpio@fffff600 { compatible = "atmel,at91rm9200-gpio"; reg = <0xfffff600 0x100>; - interrupts = <4 4>; + interrupts = <4 4 1>; #gpio-cells = <2>; gpio-controller; interrupt-controller; @@ -136,7 +136,7 @@ pioD: gpio@fffff800 { compatible = "atmel,at91rm9200-gpio"; reg = <0xfffff800 0x100>; - interrupts = <5 4>; + interrupts = <5 4 1>; #gpio-cells = <2>; gpio-controller; interrupt-controller; @@ -145,7 +145,7 @@ pioE: gpio@fffffa00 { compatible = "atmel,at91rm9200-gpio"; reg = <0xfffffa00 0x100>; - interrupts = <5 4>; + interrupts = <5 4 1>; #gpio-cells = <2>; gpio-controller; interrupt-controller; @@ -154,14 +154,14 @@ dbgu: serial@ffffee00 { compatible = "atmel,at91sam9260-usart"; reg = <0xffffee00 0x200>; - interrupts = <1 4>; + interrupts = <1 4 7>; status = "disabled"; }; usart0: serial@fff8c000 { compatible = "atmel,at91sam9260-usart"; reg = <0xfff8c000 0x200>; - interrupts = <7 4>; + interrupts = <7 4 5>; atmel,use-dma-rx; atmel,use-dma-tx; status = "disabled"; @@ -170,7 +170,7 @@ usart1: serial@fff90000 { compatible = "atmel,at91sam9260-usart"; reg = <0xfff90000 0x200>; - interrupts = <8 4>; + interrupts = <8 4 5>; atmel,use-dma-rx; atmel,use-dma-tx; status = "disabled"; @@ -179,7 +179,7 @@ usart2: serial@fff94000 { compatible = "atmel,at91sam9260-usart"; reg = <0xfff94000 0x200>; - interrupts = <9 4>; + interrupts = <9 4 5>; atmel,use-dma-rx; atmel,use-dma-tx; status = "disabled"; @@ -188,7 +188,7 @@ usart3: serial@fff98000 { compatible = "atmel,at91sam9260-usart"; reg = <0xfff98000 0x200>; - interrupts = <10 4>; + interrupts = <10 4 5>; atmel,use-dma-rx; atmel,use-dma-tx; status = "disabled"; @@ -197,14 +197,14 @@ macb0: ethernet@fffbc000 { compatible = "cdns,at32ap7000-macb", "cdns,macb"; reg = <0xfffbc000 0x100>; - interrupts = <25 4>; + interrupts = <25 4 3>; status = "disabled"; }; adc0: adc@fffb0000 { compatible = "atmel,at91sam9260-adc"; reg = <0xfffb0000 0x100>; - interrupts = <20 4>; + interrupts = <20 4 0>; atmel,adc-use-external-triggers; atmel,adc-channels-used = <0xff>; atmel,adc-vref = <3300>; @@ -258,14 +258,14 @@ usb0: ohci@00700000 { compatible = "atmel,at91rm9200-ohci", "usb-ohci"; reg = <0x00700000 0x100000>; - interrupts = <22 4>; + interrupts = <22 4 2>; status = "disabled"; }; usb1: ehci@00800000 { compatible = "atmel,at91sam9g45-ehci", "usb-ehci"; reg = <0x00800000 0x100000>; - interrupts = <22 4>; + interrupts = <22 4 2>; status = "disabled"; }; }; diff --git a/arch/arm/boot/dts/at91sam9n12.dtsi b/arch/arm/boot/dts/at91sam9n12.dtsi index cb84de791b5a..bfac0dfc332c 100644 --- a/arch/arm/boot/dts/at91sam9n12.dtsi +++ b/arch/arm/boot/dts/at91sam9n12.dtsi @@ -50,7 +50,7 @@ ranges; aic: interrupt-controller@fffff000 { - #interrupt-cells = <2>; + #interrupt-cells = <3>; compatible = "atmel,at91rm9200-aic"; interrupt-controller; reg = <0xfffff000 0x200>; @@ -74,7 +74,7 @@ pit: timer@fffffe30 { compatible = "atmel,at91sam9260-pit"; reg = <0xfffffe30 0xf>; - interrupts = <1 4>; + interrupts = <1 4 7>; }; shdwc@fffffe10 { @@ -85,25 +85,25 @@ tcb0: timer@f8008000 { compatible = "atmel,at91sam9x5-tcb"; reg = <0xf8008000 0x100>; - interrupts = <17 4>; + interrupts = <17 4 0>; }; tcb1: timer@f800c000 { compatible = "atmel,at91sam9x5-tcb"; reg = <0xf800c000 0x100>; - interrupts = <17 4>; + interrupts = <17 4 0>; }; dma: dma-controller@ffffec00 { compatible = "atmel,at91sam9g45-dma"; reg = <0xffffec00 0x200>; - interrupts = <20 4>; + interrupts = <20 4 0>; }; pioA: gpio@fffff400 { compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; reg = <0xfffff400 0x100>; - interrupts = <2 4>; + interrupts = <2 4 1>; #gpio-cells = <2>; gpio-controller; interrupt-controller; @@ -112,7 +112,7 @@ pioB: gpio@fffff600 { compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; reg = <0xfffff600 0x100>; - interrupts = <2 4>; + interrupts = <2 4 1>; #gpio-cells = <2>; gpio-controller; interrupt-controller; @@ -121,7 +121,7 @@ pioC: gpio@fffff800 { compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; reg = <0xfffff800 0x100>; - interrupts = <3 4>; + interrupts = <3 4 1>; #gpio-cells = <2>; gpio-controller; interrupt-controller; @@ -130,7 +130,7 @@ pioD: gpio@fffffa00 { compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; reg = <0xfffffa00 0x100>; - interrupts = <3 4>; + interrupts = <3 4 1>; #gpio-cells = <2>; gpio-controller; interrupt-controller; @@ -139,14 +139,14 @@ dbgu: serial@fffff200 { compatible = "atmel,at91sam9260-usart"; reg = <0xfffff200 0x200>; - interrupts = <1 4>; + interrupts = <1 4 7>; status = "disabled"; }; usart0: serial@f801c000 { compatible = "atmel,at91sam9260-usart"; reg = <0xf801c000 0x4000>; - interrupts = <5 4>; + interrupts = <5 4 5>; atmel,use-dma-rx; atmel,use-dma-tx; status = "disabled"; @@ -155,7 +155,7 @@ usart1: serial@f8020000 { compatible = "atmel,at91sam9260-usart"; reg = <0xf8020000 0x4000>; - interrupts = <6 4>; + interrupts = <6 4 5>; atmel,use-dma-rx; atmel,use-dma-tx; status = "disabled"; @@ -164,7 +164,7 @@ usart2: serial@f8024000 { compatible = "atmel,at91sam9260-usart"; reg = <0xf8024000 0x4000>; - interrupts = <7 4>; + interrupts = <7 4 5>; atmel,use-dma-rx; atmel,use-dma-tx; status = "disabled"; @@ -173,7 +173,7 @@ usart3: serial@f8028000 { compatible = "atmel,at91sam9260-usart"; reg = <0xf8028000 0x4000>; - interrupts = <8 4>; + interrupts = <8 4 5>; atmel,use-dma-rx; atmel,use-dma-tx; status = "disabled"; @@ -201,7 +201,7 @@ usb0: ohci@00500000 { compatible = "atmel,at91rm9200-ohci", "usb-ohci"; reg = <0x00500000 0x00100000>; - interrupts = <22 4>; + interrupts = <22 4 2>; status = "disabled"; }; }; diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi b/arch/arm/boot/dts/at91sam9x5.dtsi index 6a0a0fbb6283..4a18c393b136 100644 --- a/arch/arm/boot/dts/at91sam9x5.dtsi +++ b/arch/arm/boot/dts/at91sam9x5.dtsi @@ -51,7 +51,7 @@ ranges; aic: interrupt-controller@fffff000 { - #interrupt-cells = <2>; + #interrupt-cells = <3>; compatible = "atmel,at91rm9200-aic"; interrupt-controller; reg = <0xfffff000 0x200>; @@ -81,37 +81,37 @@ pit: timer@fffffe30 { compatible = "atmel,at91sam9260-pit"; reg = <0xfffffe30 0xf>; - interrupts = <1 4>; + interrupts = <1 4 7>; }; tcb0: timer@f8008000 { compatible = "atmel,at91sam9x5-tcb"; reg = <0xf8008000 0x100>; - interrupts = <17 4>; + interrupts = <17 4 0>; }; tcb1: timer@f800c000 { compatible = "atmel,at91sam9x5-tcb"; reg = <0xf800c000 0x100>; - interrupts = <17 4>; + interrupts = <17 4 0>; }; dma0: dma-controller@ffffec00 { compatible = "atmel,at91sam9g45-dma"; reg = <0xffffec00 0x200>; - interrupts = <20 4>; + interrupts = <20 4 0>; }; dma1: dma-controller@ffffee00 { compatible = "atmel,at91sam9g45-dma"; reg = <0xffffee00 0x200>; - interrupts = <21 4>; + interrupts = <21 4 0>; }; pioA: gpio@fffff400 { compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; reg = <0xfffff400 0x100>; - interrupts = <2 4>; + interrupts = <2 4 1>; #gpio-cells = <2>; gpio-controller; interrupt-controller; @@ -120,7 +120,7 @@ pioB: gpio@fffff600 { compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; reg = <0xfffff600 0x100>; - interrupts = <2 4>; + interrupts = <2 4 1>; #gpio-cells = <2>; gpio-controller; interrupt-controller; @@ -129,7 +129,7 @@ pioC: gpio@fffff800 { compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; reg = <0xfffff800 0x100>; - interrupts = <3 4>; + interrupts = <3 4 1>; #gpio-cells = <2>; gpio-controller; interrupt-controller; @@ -138,7 +138,7 @@ pioD: gpio@fffffa00 { compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; reg = <0xfffffa00 0x100>; - interrupts = <3 4>; + interrupts = <3 4 1>; #gpio-cells = <2>; gpio-controller; interrupt-controller; @@ -147,14 +147,14 @@ dbgu: serial@fffff200 { compatible = "atmel,at91sam9260-usart"; reg = <0xfffff200 0x200>; - interrupts = <1 4>; + interrupts = <1 4 7>; status = "disabled"; }; usart0: serial@f801c000 { compatible = "atmel,at91sam9260-usart"; reg = <0xf801c000 0x200>; - interrupts = <5 4>; + interrupts = <5 4 5>; atmel,use-dma-rx; atmel,use-dma-tx; status = "disabled"; @@ -163,7 +163,7 @@ usart1: serial@f8020000 { compatible = "atmel,at91sam9260-usart"; reg = <0xf8020000 0x200>; - interrupts = <6 4>; + interrupts = <6 4 5>; atmel,use-dma-rx; atmel,use-dma-tx; status = "disabled"; @@ -172,7 +172,7 @@ usart2: serial@f8024000 { compatible = "atmel,at91sam9260-usart"; reg = <0xf8024000 0x200>; - interrupts = <7 4>; + interrupts = <7 4 5>; atmel,use-dma-rx; atmel,use-dma-tx; status = "disabled"; @@ -181,21 +181,21 @@ macb0: ethernet@f802c000 { compatible = "cdns,at32ap7000-macb", "cdns,macb"; reg = <0xf802c000 0x100>; - interrupts = <24 4>; + interrupts = <24 4 3>; status = "disabled"; }; macb1: ethernet@f8030000 { compatible = "cdns,at32ap7000-macb", "cdns,macb"; reg = <0xf8030000 0x100>; - interrupts = <27 4>; + interrupts = <27 4 3>; status = "disabled"; }; adc0: adc@f804c000 { compatible = "atmel,at91sam9260-adc"; reg = <0xf804c000 0x100>; - interrupts = <19 4>; + interrupts = <19 4 0>; atmel,adc-use-external; atmel,adc-channels-used = <0xffff>; atmel,adc-vref = <3300>; @@ -249,14 +249,14 @@ usb0: ohci@00600000 { compatible = "atmel,at91rm9200-ohci", "usb-ohci"; reg = <0x00600000 0x100000>; - interrupts = <22 4>; + interrupts = <22 4 2>; status = "disabled"; }; usb1: ehci@00700000 { compatible = "atmel,at91sam9g45-ehci", "usb-ehci"; reg = <0x00700000 0x100000>; - interrupts = <22 4>; + interrupts = <22 4 2>; status = "disabled"; }; }; diff --git a/arch/arm/mach-at91/include/mach/at91_aic.h b/arch/arm/mach-at91/include/mach/at91_aic.h index c1413ed1172d..3af7272a4060 100644 --- a/arch/arm/mach-at91/include/mach/at91_aic.h +++ b/arch/arm/mach-at91/include/mach/at91_aic.h @@ -28,6 +28,9 @@ extern void __iomem *at91_aic_base; .extern at91_aic_base #endif +#define AT91_AIC_IRQ_MIN_PRIORITY 0 +#define AT91_AIC_IRQ_MAX_PRIORITY 7 + #define AT91_AIC_SMR(n) ((n) * 4) /* Source Mode Registers 0-31 */ #define AT91_AIC_PRIOR (7 << 0) /* Priority Level */ #define AT91_AIC_SRCTYPE (3 << 5) /* Interrupt Source Type */ diff --git a/arch/arm/mach-at91/irq.c b/arch/arm/mach-at91/irq.c index df8605fd7bad..db8e14112eda 100644 --- a/arch/arm/mach-at91/irq.c +++ b/arch/arm/mach-at91/irq.c @@ -30,6 +30,7 @@ #include #include #include +#include #include #include @@ -42,6 +43,7 @@ void __iomem *at91_aic_base; static struct irq_domain *at91_aic_domain; static struct device_node *at91_aic_np; +static unsigned int *at91_aic_irq_priorities; static void at91_aic_mask_irq(struct irq_data *d) { @@ -177,8 +179,9 @@ static int at91_aic_irq_map(struct irq_domain *h, unsigned int virq, /* Put virq number in Source Vector Register */ at91_aic_write(AT91_AIC_SVR(hw), virq); - /* Active Low interrupt, without priority */ - at91_aic_write(AT91_AIC_SMR(hw), AT91_AIC_SRCTYPE_LOW); + /* Active Low interrupt, with priority */ + at91_aic_write(AT91_AIC_SMR(hw), + AT91_AIC_SRCTYPE_LOW | at91_aic_irq_priorities[hw]); irq_set_chip_and_handler(virq, &at91_aic_chip, handle_fasteoi_irq); set_irq_flags(virq, IRQF_VALID | IRQF_PROBE); @@ -186,9 +189,28 @@ static int at91_aic_irq_map(struct irq_domain *h, unsigned int virq, return 0; } +static int at91_aic_irq_domain_xlate(struct irq_domain *d, struct device_node *ctrlr, + const u32 *intspec, unsigned int intsize, + irq_hw_number_t *out_hwirq, unsigned int *out_type) +{ + if (WARN_ON(intsize < 3)) + return -EINVAL; + if (WARN_ON(intspec[0] >= NR_AIC_IRQS)) + return -EINVAL; + if (WARN_ON((intspec[2] < AT91_AIC_IRQ_MIN_PRIORITY) + || (intspec[2] > AT91_AIC_IRQ_MAX_PRIORITY))) + return -EINVAL; + + *out_hwirq = intspec[0]; + *out_type = intspec[1] & IRQ_TYPE_SENSE_MASK; + at91_aic_irq_priorities[*out_hwirq] = intspec[2]; + + return 0; +} + static struct irq_domain_ops at91_aic_irq_ops = { .map = at91_aic_irq_map, - .xlate = irq_domain_xlate_twocell, + .xlate = at91_aic_irq_domain_xlate, }; int __init at91_aic_of_init(struct device_node *node, @@ -198,6 +220,12 @@ int __init at91_aic_of_init(struct device_node *node, const __be32 *p; u32 val; + at91_aic_irq_priorities = kzalloc(NR_AIC_IRQS + * sizeof(*at91_aic_irq_priorities), + GFP_KERNEL); + if (!at91_aic_irq_priorities) + return -ENOMEM; + at91_aic_base = of_iomap(node, 0); at91_aic_np = node; -- cgit v1.2.3