From 55b6267efd10b5c332af9dc624a25070fbfe2fc0 Mon Sep 17 00:00:00 2001 From: Zelong Dong Date: Fri, 7 Jan 2022 10:39:29 +0800 Subject: dt-bindings: reset: Add compatible for Meson-S4 Reset Controller Add new compatible for Amlogic's Meson-S4 Reset Controller Signed-off-by: Zelong Dong Acked-by: Rob Herring Reviewed-by: Martin Blumenstingl Signed-off-by: Philipp Zabel Link: https://lore.kernel.org/r/20220107023931.13251-2-zelong.dong@amlogic.com --- Documentation/devicetree/bindings/reset/amlogic,meson-reset.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/reset/amlogic,meson-reset.yaml b/Documentation/devicetree/bindings/reset/amlogic,meson-reset.yaml index 92922d3afd14..494a454928ce 100644 --- a/Documentation/devicetree/bindings/reset/amlogic,meson-reset.yaml +++ b/Documentation/devicetree/bindings/reset/amlogic,meson-reset.yaml @@ -17,6 +17,7 @@ properties: - amlogic,meson-gxbb-reset # Reset Controller on GXBB and compatible SoCs - amlogic,meson-axg-reset # Reset Controller on AXG and compatible SoCs - amlogic,meson-a1-reset # Reset Controller on A1 and compatible SoCs + - amlogic,meson-s4-reset # Reset Controller on S4 and compatible SoCs reg: maxItems: 1 -- cgit v1.2.3 From edb9bd8f857e60be871e4e1cf0f96bfd77f1e604 Mon Sep 17 00:00:00 2001 From: Kunihiko Hayashi Date: Tue, 5 Apr 2022 16:56:18 +0900 Subject: dt-bindings: reset: uniphier-glue: Clean up clocks, resets, and their names using compatible string Instead of "oneOf:" choices, use "allOf:" and "if:" to define clocks, resets, and their names that can be taken by the compatible string. The order of clock-names and reset-names doesn't change here. Signed-off-by: Kunihiko Hayashi Reviewed-by: Rob Herring Signed-off-by: Philipp Zabel Link: https://lore.kernel.org/r/1649145378-30358-1-git-send-email-hayashi.kunihiko@socionext.com --- .../reset/socionext,uniphier-glue-reset.yaml | 52 ++++++++++++++++------ 1 file changed, 38 insertions(+), 14 deletions(-) (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/reset/socionext,uniphier-glue-reset.yaml b/Documentation/devicetree/bindings/reset/socionext,uniphier-glue-reset.yaml index bfbd3e9b4186..0a2c13e1e230 100644 --- a/Documentation/devicetree/bindings/reset/socionext,uniphier-glue-reset.yaml +++ b/Documentation/devicetree/bindings/reset/socionext,uniphier-glue-reset.yaml @@ -38,25 +38,49 @@ properties: minItems: 1 maxItems: 2 - clock-names: - oneOf: - - items: # for Pro4, Pro5 - - const: gio - - const: link - - items: # for others - - const: link + clock-names: true resets: minItems: 1 maxItems: 2 - reset-names: - oneOf: - - items: # for Pro4, Pro5 - - const: gio - - const: link - - items: # for others - - const: link + reset-names: true + +allOf: + - if: + properties: + compatible: + contains: + enum: + - socionext,uniphier-pro4-usb3-reset + - socionext,uniphier-pro5-usb3-reset + - socionext,uniphier-pro4-ahci-reset + then: + properties: + clocks: + minItems: 2 + maxItems: 2 + clock-names: + items: + - const: gio + - const: link + resets: + minItems: 2 + maxItems: 2 + reset-names: + items: + - const: gio + - const: link + else: + properties: + clocks: + maxItems: 1 + clock-names: + const: link + resets: + maxItems: 1 + reset-names: + const: link additionalProperties: false -- cgit v1.2.3 From 5d814b2c3326c939c66bd52e472aabb9254bb2ce Mon Sep 17 00:00:00 2001 From: Philipp Zabel Date: Thu, 7 Apr 2022 17:43:25 +0200 Subject: dt-bindings: reset: amlogic,meson-axg-audio-arb: Convert to yaml Convert the device tree bindings for the Amlogic audio memory arbiter controller to YAML schema to allow participating in DT validation. Signed-off-by: Philipp Zabel Cc: Kevin Hilman Cc: Jerome Brunet Cc: Martin Blumenstingl Reviewed-by: Martin Blumenstingl Reviewed-by: Rob Herring Link: https://lore.kernel.org/r/20220407154338.4190674-1-p.zabel@pengutronix.de --- .../bindings/reset/amlogic,meson-axg-audio-arb.txt | 22 --------- .../reset/amlogic,meson-axg-audio-arb.yaml | 56 ++++++++++++++++++++++ 2 files changed, 56 insertions(+), 22 deletions(-) delete mode 100644 Documentation/devicetree/bindings/reset/amlogic,meson-axg-audio-arb.txt create mode 100644 Documentation/devicetree/bindings/reset/amlogic,meson-axg-audio-arb.yaml (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/reset/amlogic,meson-axg-audio-arb.txt b/Documentation/devicetree/bindings/reset/amlogic,meson-axg-audio-arb.txt deleted file mode 100644 index 43e580ef64ba..000000000000 --- a/Documentation/devicetree/bindings/reset/amlogic,meson-axg-audio-arb.txt +++ /dev/null @@ -1,22 +0,0 @@ -* Amlogic audio memory arbiter controller - -The Amlogic Audio ARB is a simple device which enables or -disables the access of Audio FIFOs to DDR on AXG based SoC. - -Required properties: -- compatible: 'amlogic,meson-axg-audio-arb' or - 'amlogic,meson-sm1-audio-arb' -- reg: physical base address of the controller and length of memory - mapped region. -- clocks: phandle to the fifo peripheral clock provided by the audio - clock controller. -- #reset-cells: must be 1. - -Example on the A113 SoC: - -arb: reset-controller@280 { - compatible = "amlogic,meson-axg-audio-arb"; - reg = <0x0 0x280 0x0 0x4>; - #reset-cells = <1>; - clocks = <&clkc_audio AUD_CLKID_DDR_ARB>; -}; diff --git a/Documentation/devicetree/bindings/reset/amlogic,meson-axg-audio-arb.yaml b/Documentation/devicetree/bindings/reset/amlogic,meson-axg-audio-arb.yaml new file mode 100644 index 000000000000..704a502adc5d --- /dev/null +++ b/Documentation/devicetree/bindings/reset/amlogic,meson-axg-audio-arb.yaml @@ -0,0 +1,56 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +# Copyright 2019 BayLibre, SAS +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/reset/amlogic,meson-axg-audio-arb.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Amlogic audio memory arbiter controller + +maintainers: + - Jerome Brunet + +description: The Amlogic Audio ARB is a simple device which enables or disables + the access of Audio FIFOs to DDR on AXG based SoC. + +properties: + compatible: + enum: + - amlogic,meson-axg-audio-arb + - amlogic,meson-sm1-audio-arb + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + description: | + phandle to the fifo peripheral clock provided by the audio clock + controller. + + "#reset-cells": + const: 1 + +required: + - compatible + - reg + - clocks + - "#reset-cells" + +additionalProperties: false + +examples: + - | + // on the A113 SoC: + #include + bus { + #address-cells = <2>; + #size-cells = <2>; + + arb: reset-controller@280 { + compatible = "amlogic,meson-axg-audio-arb"; + reg = <0x0 0x280 0x0 0x4>; + #reset-cells = <1>; + clocks = <&clkc_audio AUD_CLKID_DDR_ARB>; + }; + }; -- cgit v1.2.3 From 1b4efb23092b7503304c79f2307ae618c6c62d95 Mon Sep 17 00:00:00 2001 From: Philipp Zabel Date: Thu, 7 Apr 2022 17:43:26 +0200 Subject: dt-bindings: reset: ath79: Convert to yaml Convert the device tree bindings for the Qualcomm Atheros AR7xxx/AR9XXX reset controller to YAML schema to allow participating in DT validation. Signed-off-by: Philipp Zabel Cc: Alban Bedel Reviewed-by: Rob Herring Link: https://lore.kernel.org/r/20220407154338.4190674-2-p.zabel@pengutronix.de --- .../devicetree/bindings/reset/ath79-reset.txt | 20 ----------- .../bindings/reset/qca,ar7100-reset.yaml | 40 ++++++++++++++++++++++ 2 files changed, 40 insertions(+), 20 deletions(-) delete mode 100644 Documentation/devicetree/bindings/reset/ath79-reset.txt create mode 100644 Documentation/devicetree/bindings/reset/qca,ar7100-reset.yaml (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/reset/ath79-reset.txt b/Documentation/devicetree/bindings/reset/ath79-reset.txt deleted file mode 100644 index 4c56330bf398..000000000000 --- a/Documentation/devicetree/bindings/reset/ath79-reset.txt +++ /dev/null @@ -1,20 +0,0 @@ -Binding for Qualcomm Atheros AR7xxx/AR9XXX reset controller - -Please also refer to reset.txt in this directory for common reset -controller binding usage. - -Required Properties: -- compatible: has to be "qca,-reset", "qca,ar7100-reset" - as fallback -- reg: Base address and size of the controllers memory area -- #reset-cells : Specifies the number of cells needed to encode reset - line, should be 1 - -Example: - - reset-controller@1806001c { - compatible = "qca,ar9132-reset", "qca,ar7100-reset"; - reg = <0x1806001c 0x4>; - - #reset-cells = <1>; - }; diff --git a/Documentation/devicetree/bindings/reset/qca,ar7100-reset.yaml b/Documentation/devicetree/bindings/reset/qca,ar7100-reset.yaml new file mode 100644 index 000000000000..9be60e55cd71 --- /dev/null +++ b/Documentation/devicetree/bindings/reset/qca,ar7100-reset.yaml @@ -0,0 +1,40 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +# Copyright 2015 Alban Bedel +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/reset/qca,ar7100-reset.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Qualcomm Atheros AR7xxx/AR9XXX reset controller + +maintainers: + - Alban Bedel + +properties: + compatible: + items: + - enum: + - qca,ar9132-reset + - qca,ar9331-reset + - const: qca,ar7100-reset + + reg: + maxItems: 1 + + "#reset-cells": + const: 1 + +required: + - compatible + - reg + - "#reset-cells" + +additionalProperties: false + +examples: + - | + reset-controller@1806001c { + compatible = "qca,ar9132-reset", "qca,ar7100-reset"; + reg = <0x1806001c 0x4>; + #reset-cells = <1>; + }; -- cgit v1.2.3 From 1b6dc00703a2b8c312581ee0678f08468556ed6a Mon Sep 17 00:00:00 2001 From: Philipp Zabel Date: Thu, 7 Apr 2022 17:43:27 +0200 Subject: dt-bindings: reset: berlin: Convert to yaml Convert the device tree bindings for the Marvell Berlin reset controller to YAML schema to allow participating in DT validation. Signed-off-by: Philipp Zabel Cc: Antoine Tenart Reviewed-by: Rob Herring Link: https://lore.kernel.org/r/20220407154338.4190674-3-p.zabel@pengutronix.de --- .../devicetree/bindings/reset/berlin,reset.txt | 23 ------------- .../bindings/reset/marvell,berlin2-reset.yaml | 38 ++++++++++++++++++++++ 2 files changed, 38 insertions(+), 23 deletions(-) delete mode 100644 Documentation/devicetree/bindings/reset/berlin,reset.txt create mode 100644 Documentation/devicetree/bindings/reset/marvell,berlin2-reset.yaml (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/reset/berlin,reset.txt b/Documentation/devicetree/bindings/reset/berlin,reset.txt deleted file mode 100644 index 514fee098b4b..000000000000 --- a/Documentation/devicetree/bindings/reset/berlin,reset.txt +++ /dev/null @@ -1,23 +0,0 @@ -Marvell Berlin reset controller -=============================== - -Please also refer to reset.txt in this directory for common reset -controller binding usage. - -The reset controller node must be a sub-node of the chip controller -node on Berlin SoCs. - -Required properties: -- compatible: should be "marvell,berlin2-reset" -- #reset-cells: must be set to 2 - -Example: - -chip_rst: reset { - compatible = "marvell,berlin2-reset"; - #reset-cells = <2>; -}; - -&usb_phy0 { - resets = <&chip_rst 0x104 12>; -}; diff --git a/Documentation/devicetree/bindings/reset/marvell,berlin2-reset.yaml b/Documentation/devicetree/bindings/reset/marvell,berlin2-reset.yaml new file mode 100644 index 000000000000..d71d0f0a13ee --- /dev/null +++ b/Documentation/devicetree/bindings/reset/marvell,berlin2-reset.yaml @@ -0,0 +1,38 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +# Copyright 2015 Antoine Tenart +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/reset/marvell,berlin2-reset.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Marvell Berlin reset controller + +maintainers: + - Antoine Tenart + +description: The reset controller node must be a sub-node of the chip + controller node on Berlin SoCs. + +properties: + compatible: + const: marvell,berlin2-reset + + "#reset-cells": + const: 2 + +required: + - compatible + - "#reset-cells" + +additionalProperties: false + +examples: + - | + chip: chip-control@ea0000 { + reg = <0xea0000 0x400>; + + chip_rst: reset { + compatible = "marvell,berlin2-reset"; + #reset-cells = <2>; + }; + }; -- cgit v1.2.3 From e2ac01c199b4a9f2d12b55e1c614eba1f03e0eec Mon Sep 17 00:00:00 2001 From: Philipp Zabel Date: Thu, 7 Apr 2022 17:43:28 +0200 Subject: dt-bindings: reset: bitmain,bm1880-reset: Convert to yaml Convert the device tree bindings for the Bitmain BM1880 reset controller to YAML schema to allow participating in DT validation. Signed-off-by: Philipp Zabel Cc: Manivannan Sadhasivam Reviewed-by: Rob Herring Link: https://lore.kernel.org/r/20220407154338.4190674-4-p.zabel@pengutronix.de --- .../bindings/reset/bitmain,bm1880-reset.txt | 18 ----------- .../bindings/reset/bitmain,bm1880-reset.yaml | 36 ++++++++++++++++++++++ 2 files changed, 36 insertions(+), 18 deletions(-) delete mode 100644 Documentation/devicetree/bindings/reset/bitmain,bm1880-reset.txt create mode 100644 Documentation/devicetree/bindings/reset/bitmain,bm1880-reset.yaml (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/reset/bitmain,bm1880-reset.txt b/Documentation/devicetree/bindings/reset/bitmain,bm1880-reset.txt deleted file mode 100644 index a6f8455ae6c4..000000000000 --- a/Documentation/devicetree/bindings/reset/bitmain,bm1880-reset.txt +++ /dev/null @@ -1,18 +0,0 @@ -Bitmain BM1880 SoC Reset Controller -=================================== - -Please also refer to reset.txt in this directory for common reset -controller binding usage. - -Required properties: -- compatible: Should be "bitmain,bm1880-reset" -- reg: Offset and length of reset controller space in SCTRL. -- #reset-cells: Must be 1. - -Example: - - rst: reset-controller@c00 { - compatible = "bitmain,bm1880-reset"; - reg = <0xc00 0x8>; - #reset-cells = <1>; - }; diff --git a/Documentation/devicetree/bindings/reset/bitmain,bm1880-reset.yaml b/Documentation/devicetree/bindings/reset/bitmain,bm1880-reset.yaml new file mode 100644 index 000000000000..f0aca744388c --- /dev/null +++ b/Documentation/devicetree/bindings/reset/bitmain,bm1880-reset.yaml @@ -0,0 +1,36 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +# Copyright 2019 Manivannan Sadhasivam +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/reset/bitmain,bm1880-reset.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Bitmain BM1880 SoC Reset Controller + +maintainers: + - Manivannan Sadhasivam + +properties: + compatible: + const: bitmain,bm1880-reset + + reg: + maxItems: 1 + + "#reset-cells": + const: 1 + +required: + - compatible + - reg + - "#reset-cells" + +additionalProperties: false + +examples: + - | + rst: reset-controller@c00 { + compatible = "bitmain,bm1880-reset"; + reg = <0xc00 0x8>; + #reset-cells = <1>; + }; -- cgit v1.2.3 From 7809a619d41e6c1c43fdf15f0531681b36ad31c0 Mon Sep 17 00:00:00 2001 From: Philipp Zabel Date: Thu, 7 Apr 2022 17:43:29 +0200 Subject: dt-bindings: reset: lantiq,reset: Convert to yaml Convert the device tree bindings for the Lantiq XWAY SoC RCU reset controller to YAML schema to allow participating in DT validation. Signed-off-by: Philipp Zabel Cc: Martin Blumenstingl Reviewed-by: Martin Blumenstingl Reviewed-by: Rob Herring Link: https://lore.kernel.org/r/20220407154338.4190674-5-p.zabel@pengutronix.de --- .../devicetree/bindings/reset/lantiq,reset.txt | 30 ------------- .../devicetree/bindings/reset/lantiq,reset.yaml | 49 ++++++++++++++++++++++ 2 files changed, 49 insertions(+), 30 deletions(-) delete mode 100644 Documentation/devicetree/bindings/reset/lantiq,reset.txt create mode 100644 Documentation/devicetree/bindings/reset/lantiq,reset.yaml (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/reset/lantiq,reset.txt b/Documentation/devicetree/bindings/reset/lantiq,reset.txt deleted file mode 100644 index c6aef36b7d15..000000000000 --- a/Documentation/devicetree/bindings/reset/lantiq,reset.txt +++ /dev/null @@ -1,30 +0,0 @@ -Lantiq XWAY SoC RCU reset controller binding -============================================ - -This binding describes a reset-controller found on the RCU module on Lantiq -XWAY SoCs. - -This node has to be a sub node of the Lantiq RCU block. - -------------------------------------------------------------------------------- -Required properties: -- compatible : Should be one of - "lantiq,danube-reset" - "lantiq,xrx200-reset" -- reg : Defines the following sets of registers in the parent - syscon device - - Offset of the reset set register - - Offset of the reset status register -- #reset-cells : Specifies the number of cells needed to encode the - reset line, should be 2. - The first cell takes the reset set bit and the - second cell takes the status bit. - -------------------------------------------------------------------------------- -Example for the reset-controllers on the xRX200 SoCs: - reset0: reset-controller@10 { - compatible = "lantiq,xrx200-reset"; - reg <0x10 0x04>, <0x14 0x04>; - - #reset-cells = <2>; - }; diff --git a/Documentation/devicetree/bindings/reset/lantiq,reset.yaml b/Documentation/devicetree/bindings/reset/lantiq,reset.yaml new file mode 100644 index 000000000000..15d65a5dd631 --- /dev/null +++ b/Documentation/devicetree/bindings/reset/lantiq,reset.yaml @@ -0,0 +1,49 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/reset/lantiq,reset.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Lantiq XWAY SoC RCU reset controller + +maintainers: + - Martin Blumenstingl + +description: | + This binding describes a reset-controller found on the RCU module on Lantiq + XWAY SoCs. This node has to be a sub node of the Lantiq RCU block. + +properties: + compatible: + enum: + - lantiq,danube-reset + - lantiq,xrx200-reset + + reg: + description: | + Defines the following sets of registers in the parent syscon device + Offset of the reset set register + Offset of the reset status register + maxItems: 2 + + '#reset-cells': + description: | + The first cell takes the reset set bit and the second cell takes the + status bit. + const: 2 + +required: + - compatible + - reg + - '#reset-cells' + +additionalProperties: false + +examples: + - | + // On the xRX200 SoCs: + reset0: reset-controller@10 { + compatible = "lantiq,xrx200-reset"; + reg = <0x10 0x04>, <0x14 0x04>; + #reset-cells = <2>; + }; -- cgit v1.2.3 From 5c9360ea998222abf1fba351fabbaba4a4c599fe Mon Sep 17 00:00:00 2001 From: Philipp Zabel Date: Thu, 7 Apr 2022 17:43:30 +0200 Subject: dt-bindings: reset: nuvoton,npcm-reset: Convert to yaml Convert the device tree bindings for the Nuvoton NPCM reset controller to YAML schema to allow participating in DT validation. Signed-off-by: Philipp Zabel Cc: Avi Fishman Cc: Tomer Maimon Cc: Tali Perry Cc: Patrick Venture Cc: Nancy Yuen Cc: Benjamin Fair Reviewed-by: Rob Herring Link: https://lore.kernel.org/r/20220407154338.4190674-6-p.zabel@pengutronix.de --- .../bindings/reset/nuvoton,npcm-reset.txt | 32 -------------- .../bindings/reset/nuvoton,npcm750-reset.yaml | 50 ++++++++++++++++++++++ 2 files changed, 50 insertions(+), 32 deletions(-) delete mode 100644 Documentation/devicetree/bindings/reset/nuvoton,npcm-reset.txt create mode 100644 Documentation/devicetree/bindings/reset/nuvoton,npcm750-reset.yaml (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/reset/nuvoton,npcm-reset.txt b/Documentation/devicetree/bindings/reset/nuvoton,npcm-reset.txt deleted file mode 100644 index 17b7a6a43a29..000000000000 --- a/Documentation/devicetree/bindings/reset/nuvoton,npcm-reset.txt +++ /dev/null @@ -1,32 +0,0 @@ -Nuvoton NPCM Reset controller - -Required properties: -- compatible : "nuvoton,npcm750-reset" for NPCM7XX BMC -- reg : specifies physical base address and size of the register. -- #reset-cells: must be set to 2 - -Optional property: -- nuvoton,sw-reset-number - Contains the software reset number to restart the SoC. - NPCM7xx contain four software reset that represent numbers 1 to 4. - - If 'nuvoton,sw-reset-number' is not specified software reset is disabled. - -Example: - rstc: rstc@f0801000 { - compatible = "nuvoton,npcm750-reset"; - reg = <0xf0801000 0x70>; - #reset-cells = <2>; - nuvoton,sw-reset-number = <2>; - }; - -Specifying reset lines connected to IP NPCM7XX modules -====================================================== -example: - - spi0: spi@..... { - ... - resets = <&rstc NPCM7XX_RESET_IPSRST2 NPCM7XX_RESET_PSPI1>; - ... - }; - -The index could be found in . diff --git a/Documentation/devicetree/bindings/reset/nuvoton,npcm750-reset.yaml b/Documentation/devicetree/bindings/reset/nuvoton,npcm750-reset.yaml new file mode 100644 index 000000000000..fa5e4ea6400e --- /dev/null +++ b/Documentation/devicetree/bindings/reset/nuvoton,npcm750-reset.yaml @@ -0,0 +1,50 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/reset/nuvoton,npcm750-reset.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Nuvoton NPCM Reset controller + +maintainers: + - Tomer Maimon + +properties: + compatible: + const: nuvoton,npcm750-reset + + reg: + maxItems: 1 + + '#reset-cells': + const: 2 + + nuvoton,sw-reset-number: + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 1 + maximum: 4 + description: | + Contains the software reset number to restart the SoC. + If not specified, software reset is disabled. + +required: + - compatible + - reg + - '#reset-cells' + +additionalProperties: false + +examples: + - | + #include + rstc: rstc@f0801000 { + compatible = "nuvoton,npcm750-reset"; + reg = <0xf0801000 0x70>; + #reset-cells = <2>; + nuvoton,sw-reset-number = <2>; + }; + + // Specifying reset lines connected to IP NPCM7XX modules + spi0: spi { + resets = <&rstc NPCM7XX_RESET_IPSRST2 NPCM7XX_RESET_PSPI1>; + }; -- cgit v1.2.3 From 820f722c05dd08706be1fed2787cd91ed38642e2 Mon Sep 17 00:00:00 2001 From: Philipp Zabel Date: Thu, 7 Apr 2022 17:43:32 +0200 Subject: dt-bindings: reset: snps,axs10x-reset: Convert to yaml Convert the device tree bindings for the AXS10x reset controller to YAML schema to allow participating in DT validation. Signed-off-by: Philipp Zabel Cc: Eugeniy Paltsev Reviewed-by: Rob Herring Link: https://lore.kernel.org/r/20220407154338.4190674-8-p.zabel@pengutronix.de --- .../bindings/reset/snps,axs10x-reset.txt | 33 --------------- .../bindings/reset/snps,axs10x-reset.yaml | 48 ++++++++++++++++++++++ 2 files changed, 48 insertions(+), 33 deletions(-) delete mode 100644 Documentation/devicetree/bindings/reset/snps,axs10x-reset.txt create mode 100644 Documentation/devicetree/bindings/reset/snps,axs10x-reset.yaml (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/reset/snps,axs10x-reset.txt b/Documentation/devicetree/bindings/reset/snps,axs10x-reset.txt deleted file mode 100644 index 32d8435a41df..000000000000 --- a/Documentation/devicetree/bindings/reset/snps,axs10x-reset.txt +++ /dev/null @@ -1,33 +0,0 @@ -Binding for the AXS10x reset controller - -This binding describes the ARC AXS10x boards custom IP-block which allows -to control reset signals of selected peripherals. For example DW GMAC, etc... -This block is controlled via memory-mapped register (AKA CREG) which -represents up-to 32 reset lines. - -As of today only the following lines are used: - - DW GMAC - line 5 - -This binding uses the common reset binding[1]. - -[1] Documentation/devicetree/bindings/reset/reset.txt - -Required properties: -- compatible: should be "snps,axs10x-reset". -- reg: should always contain pair address - length: for creg reset - bits register. -- #reset-cells: from common reset binding; Should always be set to 1. - -Example: - reset: reset-controller@11220 { - compatible = "snps,axs10x-reset"; - #reset-cells = <1>; - reg = <0x11220 0x4>; - }; - -Specifying reset lines connected to IP modules: - ethernet@.... { - .... - resets = <&reset 5>; - .... - }; diff --git a/Documentation/devicetree/bindings/reset/snps,axs10x-reset.yaml b/Documentation/devicetree/bindings/reset/snps,axs10x-reset.yaml new file mode 100644 index 000000000000..a75db3d405af --- /dev/null +++ b/Documentation/devicetree/bindings/reset/snps,axs10x-reset.yaml @@ -0,0 +1,48 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/reset/snps,axs10x-reset.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: AXS10x reset controller + +maintainers: + - Eugeniy Paltsev + +description: | + This binding describes the ARC AXS10x boards custom IP-block which allows + to control reset signals of selected peripherals. For example DW GMAC, etc... + This block is controlled via memory-mapped register (AKA CREG) which + represents up-to 32 reset lines. + As of today only the following lines are used: + - DW GMAC - line 5 + +properties: + compatible: + const: snps,axs10x-reset + + reg: + maxItems: 1 + + '#reset-cells': + const: 1 + +required: + - compatible + - reg + - '#reset-cells' + +additionalProperties: false + +examples: + - | + reset: reset-controller@11220 { + compatible = "snps,axs10x-reset"; + #reset-cells = <1>; + reg = <0x11220 0x4>; + }; + + // Specifying reset lines connected to IP modules: + ethernet { + resets = <&reset 5>; + }; -- cgit v1.2.3 From e54bbcb02aeffda00a31c18372411f88b1615fa2 Mon Sep 17 00:00:00 2001 From: Philipp Zabel Date: Thu, 7 Apr 2022 17:43:35 +0200 Subject: dt-bindings: reset: socfpga: Convert to yaml Convert the device tree bindings for the Altera SOCFPGA reset manager to YAML schema to allow participating in DT validation. Signed-off-by: Philipp Zabel Cc: Dinh Nguyen Reviewed-by: Rob Herring Link: https://lore.kernel.org/r/20220407154338.4190674-11-p.zabel@pengutronix.de --- .../devicetree/bindings/reset/altr,rst-mgr.yaml | 47 ++++++++++++++++++++++ .../devicetree/bindings/reset/socfpga-reset.txt | 16 -------- 2 files changed, 47 insertions(+), 16 deletions(-) create mode 100644 Documentation/devicetree/bindings/reset/altr,rst-mgr.yaml delete mode 100644 Documentation/devicetree/bindings/reset/socfpga-reset.txt (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/reset/altr,rst-mgr.yaml b/Documentation/devicetree/bindings/reset/altr,rst-mgr.yaml new file mode 100644 index 000000000000..4379cec6b35a --- /dev/null +++ b/Documentation/devicetree/bindings/reset/altr,rst-mgr.yaml @@ -0,0 +1,47 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/reset/altr,rst-mgr.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Altera SOCFPGA Reset Manager + +maintainers: + - Dinh Nguyen + +properties: + compatible: + oneOf: + - description: Cyclone5/Arria5/Arria10 + const: altr,rst-mgr + - description: Stratix10 ARM64 SoC + items: + - const: altr,stratix10-rst-mgr + - const: altr,rst-mgr + + reg: + maxItems: 1 + + altr,modrst-offset: + $ref: /schemas/types.yaml#/definitions/uint32 + description: Offset of the first modrst register + + '#reset-cells': + const: 1 + +required: + - compatible + - reg + - altr,modrst-offset + - '#reset-cells' + +additionalProperties: false + +examples: + - | + rstmgr@ffd05000 { + compatible = "altr,rst-mgr"; + reg = <0xffd05000 0x1000>; + altr,modrst-offset = <0x10>; + #reset-cells = <1>; + }; diff --git a/Documentation/devicetree/bindings/reset/socfpga-reset.txt b/Documentation/devicetree/bindings/reset/socfpga-reset.txt deleted file mode 100644 index 38fe34fd8b8a..000000000000 --- a/Documentation/devicetree/bindings/reset/socfpga-reset.txt +++ /dev/null @@ -1,16 +0,0 @@ -Altera SOCFPGA Reset Manager - -Required properties: -- compatible : "altr,rst-mgr" for (Cyclone5/Arria5/Arria10) - "altr,stratix10-rst-mgr","altr,rst-mgr" for Stratix10 ARM64 SoC -- reg : Should contain 1 register ranges(address and length) -- altr,modrst-offset : Should contain the offset of the first modrst register. -- #reset-cells: 1 - -Example: - rstmgr@ffd05000 { - #reset-cells = <1>; - compatible = "altr,rst-mgr"; - reg = <0xffd05000 0x1000>; - altr,modrst-offset = <0x10>; - }; -- cgit v1.2.3 From b550b8a451380965ecf2d0ae1e4b97f8047a8e9a Mon Sep 17 00:00:00 2001 From: Philipp Zabel Date: Thu, 7 Apr 2022 17:43:36 +0200 Subject: dt-bindings: reset: st,sti-picophyreset: Convert to yaml Convert the device tree bindings for the STMicroelectronics STi SoftReset controller to YAML schema to allow participating in DT validation. Signed-off-by: Philipp Zabel Cc: Peter Griffin Reviewed-by: Rob Herring Link: https://lore.kernel.org/r/20220407154338.4190674-12-p.zabel@pengutronix.de --- .../bindings/reset/st,sti-picophyreset.txt | 42 ------------------- .../bindings/reset/st,stih407-picophyreset.yaml | 47 ++++++++++++++++++++++ 2 files changed, 47 insertions(+), 42 deletions(-) delete mode 100644 Documentation/devicetree/bindings/reset/st,sti-picophyreset.txt create mode 100644 Documentation/devicetree/bindings/reset/st,stih407-picophyreset.yaml (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/reset/st,sti-picophyreset.txt b/Documentation/devicetree/bindings/reset/st,sti-picophyreset.txt deleted file mode 100644 index 9ca27761f811..000000000000 --- a/Documentation/devicetree/bindings/reset/st,sti-picophyreset.txt +++ /dev/null @@ -1,42 +0,0 @@ -STMicroelectronics STi family Sysconfig Picophy SoftReset Controller -============================================================================= - -This binding describes a reset controller device that is used to enable and -disable on-chip PicoPHY USB2 phy(s) using "softreset" control bits found in -the STi family SoC system configuration registers. - -The actual action taken when softreset is asserted is hardware dependent. -However, when asserted it may not be possible to access the hardware's -registers and after an assert/deassert sequence the hardware's previous state -may no longer be valid. - -Please refer to Documentation/devicetree/bindings/reset/reset.txt -for common reset controller binding usage. - -Required properties: -- compatible: Should be "st,stih407-picophyreset" -- #reset-cells: 1, see below - -Example: - - picophyreset: picophyreset-controller { - compatible = "st,stih407-picophyreset"; - #reset-cells = <1>; - }; - -Specifying picophyreset control of devices -======================================= - -Device nodes should specify the reset channel required in their "resets" -property, containing a phandle to the picophyreset device node and an -index specifying which channel to use, as described in -Documentation/devicetree/bindings/reset/reset.txt. - -Example: - - usb2_picophy0: usbpicophy@0 { - resets = <&picophyreset STIH407_PICOPHY0_RESET>; - }; - -Macro definitions for the supported reset channels can be found in: -include/dt-bindings/reset/stih407-resets.h diff --git a/Documentation/devicetree/bindings/reset/st,stih407-picophyreset.yaml b/Documentation/devicetree/bindings/reset/st,stih407-picophyreset.yaml new file mode 100644 index 000000000000..329ae4ae1a10 --- /dev/null +++ b/Documentation/devicetree/bindings/reset/st,stih407-picophyreset.yaml @@ -0,0 +1,47 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/reset/st,stih407-picophyreset.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: STMicroelectronics STi family Sysconfig Picophy SoftReset Controller + +maintainers: + - Peter Griffin + +description: | + This binding describes a reset controller device that is used to enable and + disable on-chip PicoPHY USB2 phy(s) using "softreset" control bits found in + the STi family SoC system configuration registers. + + The actual action taken when softreset is asserted is hardware dependent. + However, when asserted it may not be possible to access the hardware's + registers and after an assert/deassert sequence the hardware's previous state + may no longer be valid. + +properties: + compatible: + const: st,stih407-picophyreset + + '#reset-cells': + const: 1 + +required: + - compatible + - '#reset-cells' + +additionalProperties: false + +examples: + - | + #include + + picophyreset: picophyreset-controller { + compatible = "st,stih407-picophyreset"; + #reset-cells = <1>; + }; + + // Specifying picophyreset control of devices + usb2_picophy0: usbpicophy { + resets = <&picophyreset STIH407_PICOPHY0_RESET>; + }; -- cgit v1.2.3 From 2ca065dc9468fa1c60ada1e8cb9c1aa866367ec7 Mon Sep 17 00:00:00 2001 From: Philipp Zabel Date: Thu, 7 Apr 2022 17:43:37 +0200 Subject: dt-bindings: reset: st,sti-powerdown: Convert to yaml Convert the device tree bindings for the STMicroelectronics STi Peripheral Powerdown reset controller to YAML schema to allow participating in DT validation. Signed-off-by: Philipp Zabel Cc: Srinivas Kandagatla Reviewed-by: Rob Herring Link: https://lore.kernel.org/r/20220407154338.4190674-13-p.zabel@pengutronix.de --- .../devicetree/bindings/reset/st,sti-powerdown.txt | 45 -------------------- .../bindings/reset/st,stih407-powerdown.yaml | 49 ++++++++++++++++++++++ 2 files changed, 49 insertions(+), 45 deletions(-) delete mode 100644 Documentation/devicetree/bindings/reset/st,sti-powerdown.txt create mode 100644 Documentation/devicetree/bindings/reset/st,stih407-powerdown.yaml (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/reset/st,sti-powerdown.txt b/Documentation/devicetree/bindings/reset/st,sti-powerdown.txt deleted file mode 100644 index 92527138bc93..000000000000 --- a/Documentation/devicetree/bindings/reset/st,sti-powerdown.txt +++ /dev/null @@ -1,45 +0,0 @@ -STMicroelectronics STi family Sysconfig Peripheral Powerdown Reset Controller -============================================================================= - -This binding describes a reset controller device that is used to enable and -disable on-chip peripheral controllers such as USB and SATA, using -"powerdown" control bits found in the STi family SoC system configuration -registers. These have been grouped together into a single reset controller -device for convenience. - -The actual action taken when powerdown is asserted is hardware dependent. -However, when asserted it may not be possible to access the hardware's -registers and after an assert/deassert sequence the hardware's previous state -may no longer be valid. - -Please refer to reset.txt in this directory for common reset -controller binding usage. - -Required properties: -- compatible: Should be "st,stih407-powerdown" -- #reset-cells: 1, see below - -example: - - powerdown: powerdown-controller { - compatible = "st,stih407-powerdown"; - #reset-cells = <1>; - }; - - -Specifying powerdown control of devices -======================================= - -Device nodes should specify the reset channel required in their "resets" -property, containing a phandle to the powerdown device node and an -index specifying which channel to use, as described in reset.txt - -example: - - st_dwc3: dwc3@8f94000 { - resets = <&powerdown STIH407_USB3_POWERDOWN>, - }; - -Macro definitions for the supported reset channels can be found in: - -include/dt-bindings/reset/stih407-resets.h diff --git a/Documentation/devicetree/bindings/reset/st,stih407-powerdown.yaml b/Documentation/devicetree/bindings/reset/st,stih407-powerdown.yaml new file mode 100644 index 000000000000..d3790e602659 --- /dev/null +++ b/Documentation/devicetree/bindings/reset/st,stih407-powerdown.yaml @@ -0,0 +1,49 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/reset/st,stih407-powerdown.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: STMicroelectronics STi family Sysconfig Peripheral Powerdown Reset Controller + +maintainers: + - Srinivas Kandagatla + +description: | + This binding describes a reset controller device that is used to enable and + disable on-chip peripheral controllers such as USB and SATA, using + "powerdown" control bits found in the STi family SoC system configuration + registers. These have been grouped together into a single reset controller + device for convenience. + + The actual action taken when powerdown is asserted is hardware dependent. + However, when asserted it may not be possible to access the hardware's + registers and after an assert/deassert sequence the hardware's previous state + may no longer be valid. + +properties: + compatible: + const: st,stih407-powerdown + + '#reset-cells': + const: 1 + +required: + - compatible + - '#reset-cells' + +additionalProperties: false + +examples: + - | + #include + + powerdown: powerdown-controller { + compatible = "st,stih407-powerdown"; + #reset-cells = <1>; + }; + + // Specifying powerdown control of devices: + st_dwc3: dwc3 { + resets = <&powerdown STIH407_USB3_POWERDOWN>; + }; -- cgit v1.2.3