From 6e9f2cb45d206549a72f07da4a6c464b028c41a1 Mon Sep 17 00:00:00 2001 From: Pierre-Henry Moussay Date: Mon, 17 Nov 2025 15:29:54 +0000 Subject: dt-bindings: timer: sifive,clint: add pic64gx compatibility As mention in sifive,clint.yaml, a specific compatible should be used for pic64gx, so here it is. Signed-off-by: Pierre-Henry Moussay Acked-by: Conor Dooley Signed-off-by: Conor Dooley --- Documentation/devicetree/bindings/timer/sifive,clint.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/timer/sifive,clint.yaml b/Documentation/devicetree/bindings/timer/sifive,clint.yaml index 3bab40500df9..3c16b260db04 100644 --- a/Documentation/devicetree/bindings/timer/sifive,clint.yaml +++ b/Documentation/devicetree/bindings/timer/sifive,clint.yaml @@ -31,6 +31,7 @@ properties: - enum: - canaan,k210-clint # Canaan Kendryte K210 - eswin,eic7700-clint # ESWIN EIC7700 + - microchip,pic64gx-clint # Microchip PIC64GX - sifive,fu540-c000-clint # SiFive FU540 - spacemit,k1-clint # SpacemiT K1 - spacemit,k3-clint # SpacemiT K3 -- cgit v1.2.3 From 63ddacd42f9eb79582bb47b9236dcf9088b0937d Mon Sep 17 00:00:00 2001 From: Pierre-Henry Moussay Date: Mon, 17 Nov 2025 16:53:22 +0000 Subject: dt-bindings: riscv: microchip: document the PIC64GX curiosity kit Update devicetree bindings document with PIC64GX Curiosity Kit, known by its "Curiosity-GX1000" product code. Signed-off-by: Pierre-Henry Moussay Reviewed-by: Conor Dooley Acked-by: Rob Herring (Arm) Signed-off-by: Conor Dooley --- Documentation/devicetree/bindings/riscv/microchip.yaml | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/riscv/microchip.yaml b/Documentation/devicetree/bindings/riscv/microchip.yaml index 381d6eb6672e..137a6f413430 100644 --- a/Documentation/devicetree/bindings/riscv/microchip.yaml +++ b/Documentation/devicetree/bindings/riscv/microchip.yaml @@ -4,14 +4,14 @@ $id: http://devicetree.org/schemas/riscv/microchip.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Microchip PolarFire SoC-based boards +title: Microchip SoC-based boards maintainers: - Conor Dooley - Daire McNamara description: - Microchip PolarFire SoC-based boards + Microchip SoC-based boards properties: $nodename: @@ -46,6 +46,9 @@ properties: - microchip,mpfs-sev-kit - sundance,polarberry - const: microchip,mpfs + - items: + - const: microchip,pic64gx-curiosity-kit + - const: microchip,pic64gx additionalProperties: true -- cgit v1.2.3 From feb5dba31a36e22c0ce2be2dcf1ecf9b1c8c61fa Mon Sep 17 00:00:00 2001 From: Guodong Xu Date: Sun, 25 Jan 2026 09:36:06 +0800 Subject: dt-bindings: riscv: Add Supm extension description Add description for the Supm extension. Supm indicates support for pointer masking in user mode. Supm is mandatory for RVA23S64. Add dependency check that Supm requires either Smnpm or Ssnpm. The Supm extension is ratified in commit d70011dde6c2 ("Update to ratified state") of riscv-j-extension. Signed-off-by: Guodong Xu Acked-by: Conor Dooley Signed-off-by: Conor Dooley --- .../devicetree/bindings/riscv/extensions.yaml | 27 ++++++++++++++++++++++ 1 file changed, 27 insertions(+) (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/riscv/extensions.yaml b/Documentation/devicetree/bindings/riscv/extensions.yaml index c6ec9290fe07..2b0a8a93bb21 100644 --- a/Documentation/devicetree/bindings/riscv/extensions.yaml +++ b/Documentation/devicetree/bindings/riscv/extensions.yaml @@ -262,6 +262,23 @@ properties: ratified in RISC-V Profiles Version 1.0, with commit b1d806605f87 ("Updated to ratified state.") + - const: supm + description: | + The standard Supm extension for pointer masking support in user + mode (U-mode) as ratified at commit d70011dde6c2 ("Update to + ratified state") of riscv-j-extension. + + Supm represents a combination of underlying hardware capability + (Smnpm or Ssnpm), U-mode consumer privilege level, and M/S-mode + software configuration that enables pointer masking for U-mode. + + DO NOT include this property in device trees targeting privileged + system software (S-mode or M-mode). + + This property is only appropriate in device trees provided to + U-mode software where the next-higher-privilege-mode supports + Smnpm or Ssnpm and enables it for U-mode. + - const: svade description: | The standard Svade supervisor-level extension for SW-managed PTE A/D @@ -907,6 +924,16 @@ properties: then: contains: const: b + # Supm depends on Smnpm or Ssnpm + - if: + contains: + const: supm + then: + oneOf: + - contains: + const: smnpm + - contains: + const: ssnpm # Za64rs and Ziccrse depend on Zalrsc or A - if: contains: -- cgit v1.2.3