From a084c9d2042d43f0b7b514d040e635d8b1fb643a Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Mon, 29 Jun 2020 22:38:59 +0200 Subject: dt-bindings: arm: samsung: Do not require clkout on Exynos5260 and Exynos7 The PMU (Power Management Unit) driver is a clkout clock provider (for clock signal monitoring) only for certain Exynos SoCs. It was never implemented for Exynos5260 and Exynos7. This fixes dtschema validator warnings like: system-controller@105c0000: '#clock-cells' is a required property Signed-off-by: Krzysztof Kozlowski Reviewed-by: Rob Herring --- .../devicetree/bindings/arm/samsung/pmu.yaml | 22 +++++++++++++++++++--- 1 file changed, 19 insertions(+), 3 deletions(-) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/arm/samsung/pmu.yaml b/Documentation/devicetree/bindings/arm/samsung/pmu.yaml index c9651892710e..686c13c14e32 100644 --- a/Documentation/devicetree/bindings/arm/samsung/pmu.yaml +++ b/Documentation/devicetree/bindings/arm/samsung/pmu.yaml @@ -85,12 +85,28 @@ properties: required: - compatible - reg - - '#clock-cells' - - clock-names - - clocks additionalProperties: false +allOf: + - if: + properties: + compatible: + contains: + enum: + - samsung,exynos3250-pmu + - samsung,exynos4210-pmu + - samsung,exynos4412-pmu + - samsung,exynos5250-pmu + - samsung,exynos5410-pmu + - samsung,exynos5420-pmu + - samsung,exynos5433-pmu + then: + required: + - '#clock-cells' + - clock-names + - clocks + examples: - | #include -- cgit v1.2.3 From 7c12a14802a2a5d7fd43fd11db45567bfb5e17b7 Mon Sep 17 00:00:00 2001 From: Álvaro Fernández Rojas Date: Sat, 13 Jun 2020 10:21:32 +0200 Subject: dt-bindings: soc: brcm: add BCM63xx power domain binding MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit BCM6318, BCM6328, BCM6362 and BCM63268 SoCs have a power domain controller to enable/disable certain components in order to save power. Signed-off-by: Álvaro Fernández Rojas Reviewed-by: Florian Fainelli Reviewed-by: Rob Herring Signed-off-by: Florian Fainelli --- .../bindings/power/brcm,bcm63xx-power.yaml | 44 ++++++++++++++++++++++ 1 file changed, 44 insertions(+) create mode 100644 Documentation/devicetree/bindings/power/brcm,bcm63xx-power.yaml (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/power/brcm,bcm63xx-power.yaml b/Documentation/devicetree/bindings/power/brcm,bcm63xx-power.yaml new file mode 100644 index 000000000000..63b15ac6dde4 --- /dev/null +++ b/Documentation/devicetree/bindings/power/brcm,bcm63xx-power.yaml @@ -0,0 +1,44 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/power/brcm,bcm63xx-power.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: BCM63xx power domain driver + +maintainers: + - Álvaro Fernández Rojas + +description: | + BCM6318, BCM6328, BCM6362 and BCM63268 SoCs have a power domain controller + to enable/disable certain components in order to save power. + +properties: + compatible: + items: + - enum: + - brcm,bcm6318-power-controller + - brcm,bcm6328-power-controller + - brcm,bcm6362-power-controller + - brcm,bcm63268-power-controller + + reg: + maxItems: 1 + + "#power-domain-cells": + const: 1 + +required: + - compatible + - reg + - "#power-domain-cells" + +additionalProperties: false + +examples: + - | + periph_pwr: power-controller@10001848 { + compatible = "brcm,bcm6328-power-controller"; + reg = <0x10001848 0x4>; + #power-domain-cells = <1>; + }; -- cgit v1.2.3 From de104a292d07ef63803bc5c496e7cac54d8c16cc Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Thu, 2 Jul 2020 08:45:08 -0700 Subject: dt-bindings: omap: Update PRM binding for genpd The PRM (Power and Reset Module) has a register to enable and disable the related power domain, so let's update the binding for that. Signed-off-by: Tony Lindgren Acked-by: Santosh Shilimkar Acked-by: Rob Herring Cc: devicetree@vger.kernel.org Cc: Rob Herring Signed-off-by: Tony Lindgren --- Documentation/devicetree/bindings/arm/omap/prm-inst.txt | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/arm/omap/prm-inst.txt b/Documentation/devicetree/bindings/arm/omap/prm-inst.txt index fcd3456afbbe..42db138e091a 100644 --- a/Documentation/devicetree/bindings/arm/omap/prm-inst.txt +++ b/Documentation/devicetree/bindings/arm/omap/prm-inst.txt @@ -18,6 +18,7 @@ Required properties: (base address and length) Optional properties: +- #power-domain-cells: Should be 0 if the instance is a power domain provider. - #reset-cells: Should be 1 if the PRM instance in question supports resets. Example: @@ -25,5 +26,6 @@ Example: prm_dsp2: prm@1b00 { compatible = "ti,dra7-prm-inst", "ti,omap-prm-inst"; reg = <0x1b00 0x40>; + #power-domain-cells = <0>; #reset-cells = <1>; }; -- cgit v1.2.3 From bee062810f42a4e1716a619d088118e0cfa157cf Mon Sep 17 00:00:00 2001 From: Michal Vokáč Date: Fri, 31 Jul 2020 14:00:06 +0200 Subject: dt-bindings: arm: fsl: Add Y Soft IOTA Orion board MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add devicetree binding for Orion - new board variant in the Y Soft IOTA family. Signed-off-by: Michal Vokáč Acked-by: Rob Herring Signed-off-by: Shawn Guo --- Documentation/devicetree/bindings/arm/fsl.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml index 6da9d734cdb7..788a8871fb82 100644 --- a/Documentation/devicetree/bindings/arm/fsl.yaml +++ b/Documentation/devicetree/bindings/arm/fsl.yaml @@ -188,6 +188,7 @@ properties: - toradex,colibri_imx6dl-v1_1-eval-v3 # Colibri iMX6 Module V1.1 on Colibri Evaluation Board V3 - ysoft,imx6dl-yapp4-draco # i.MX6 DualLite Y Soft IOTA Draco board - ysoft,imx6dl-yapp4-hydra # i.MX6 DualLite Y Soft IOTA Hydra board + - ysoft,imx6dl-yapp4-orion # i.MX6 DualLite Y Soft IOTA Orion board - ysoft,imx6dl-yapp4-ursa # i.MX6 Solo Y Soft IOTA Ursa board - const: fsl,imx6dl -- cgit v1.2.3 From 32b0aaa59da62a5b4c2f3e7ca44f10853259572b Mon Sep 17 00:00:00 2001 From: Martin Kepplinger Date: Fri, 21 Aug 2020 14:17:55 +0200 Subject: dt-bindings: arm: fsl: Add the librem 5 phone Add entries for the imx8mq based Librem 5 phone. The "Birch" and "Chestnut" hardware revisions are supported by r2. The "Dogwood" revision by r3. See https://puri.sm/products/librem-5/ and https://developer.puri.sm/Librem5/ for the schematics and more information. Signed-off-by: Martin Kepplinger Acked-by: Rob Herring Signed-off-by: Shawn Guo --- Documentation/devicetree/bindings/arm/fsl.yaml | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml index 788a8871fb82..ac6327cf53fd 100644 --- a/Documentation/devicetree/bindings/arm/fsl.yaml +++ b/Documentation/devicetree/bindings/arm/fsl.yaml @@ -369,6 +369,8 @@ properties: - fsl,imx8mq-evk # i.MX8MQ EVK Board - google,imx8mq-phanbell # Google Coral Edge TPU - purism,librem5-devkit # Purism Librem5 devkit + - purism,librem5r2 # Purism Librem5 phone "Chestnut" + - purism,librem5r3 # Purism Librem5 phone "Dogwood" - solidrun,hummingboard-pulse # SolidRun Hummingboard Pulse - technexion,pico-pi-imx8m # TechNexion PICO-PI-8M evk - const: fsl,imx8mq -- cgit v1.2.3 From 4a6c1be2f9d951d61239ec440c17a5c517c730ba Mon Sep 17 00:00:00 2001 From: Jernej Skrabec Date: Mon, 24 Aug 2020 17:04:33 +0200 Subject: dt-bindings: gpu: mali-utgard: Add Allwinner R40 compatible Allwinner R40 SoC contains Mali400, so add its specific compatible to bindings. Signed-off-by: Jernej Skrabec Signed-off-by: Maxime Ripard Link: https://lore.kernel.org/r/20200824150434.951693-2-jernej.skrabec@siol.net --- Documentation/devicetree/bindings/gpu/arm,mali-utgard.yaml | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-utgard.yaml b/Documentation/devicetree/bindings/gpu/arm,mali-utgard.yaml index 6226d31ec4b7..d4d785790eaa 100644 --- a/Documentation/devicetree/bindings/gpu/arm,mali-utgard.yaml +++ b/Documentation/devicetree/bindings/gpu/arm,mali-utgard.yaml @@ -25,6 +25,7 @@ properties: - allwinner,sun4i-a10-mali - allwinner,sun7i-a20-mali - allwinner,sun8i-h3-mali + - allwinner,sun8i-r40-mali - allwinner,sun50i-a64-mali - rockchip,rk3036-mali - rockchip,rk3066-mali @@ -129,6 +130,7 @@ allOf: enum: - allwinner,sun4i-a10-mali - allwinner,sun7i-a20-mali + - allwinner,sun8i-r40-mali - allwinner,sun50i-a64-mali - allwinner,sun50i-h5-mali - amlogic,meson8-mali -- cgit v1.2.3 From 0552942ffded1e30ca561b89d7e615292f4ed5b7 Mon Sep 17 00:00:00 2001 From: Yangtao Li Date: Fri, 24 Jul 2020 15:14:48 +0800 Subject: dt-bindings: irq: sun7i-nmi: fix dt-binding for a80 nmi There is no one use "allwinner,sun9i-a80-sc-nmi". The A80 uses "allwinner,sun9i-a80-nmi". Let's fix it. Signed-off-by: Yangtao Li Signed-off-by: Maxime Ripard Acked-by: Rob Herring Link: https://lore.kernel.org/r/fb081585c4fedcb9b8b95e5f16879dff482c9717.1595572867.git.frank@allwinnertech.com --- .../bindings/interrupt-controller/allwinner,sun7i-a20-sc-nmi.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/interrupt-controller/allwinner,sun7i-a20-sc-nmi.yaml b/Documentation/devicetree/bindings/interrupt-controller/allwinner,sun7i-a20-sc-nmi.yaml index 7cd6b8bacfa0..d8fe2d9a307b 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/allwinner,sun7i-a20-sc-nmi.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/allwinner,sun7i-a20-sc-nmi.yaml @@ -29,7 +29,7 @@ properties: - items: - const: allwinner,sun8i-a83t-r-intc - const: allwinner,sun6i-a31-r-intc - - const: allwinner,sun9i-a80-sc-nmi + - const: allwinner,sun9i-a80-nmi - items: - const: allwinner,sun50i-a64-r-intc - const: allwinner,sun6i-a31-r-intc -- cgit v1.2.3 From 5805c747f4db9ca679391559519c25aac734436b Mon Sep 17 00:00:00 2001 From: Yangtao Li Date: Fri, 24 Jul 2020 15:15:53 +0800 Subject: dt-bindings: irq: sun7i-nmi: Add binding for A100's NMI controller Add a binding for A100's nmi controller. Signed-off-by: Yangtao Li Signed-off-by: Maxime Ripard Acked-by: Rob Herring Link: https://lore.kernel.org/r/953b76413563551b82dd11cadbc99c695f74f721.1595572867.git.frank@allwinnertech.com --- .../bindings/interrupt-controller/allwinner,sun7i-a20-sc-nmi.yaml | 3 +++ 1 file changed, 3 insertions(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/interrupt-controller/allwinner,sun7i-a20-sc-nmi.yaml b/Documentation/devicetree/bindings/interrupt-controller/allwinner,sun7i-a20-sc-nmi.yaml index d8fe2d9a307b..8acca0ae3129 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/allwinner,sun7i-a20-sc-nmi.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/allwinner,sun7i-a20-sc-nmi.yaml @@ -33,6 +33,9 @@ properties: - items: - const: allwinner,sun50i-a64-r-intc - const: allwinner,sun6i-a31-r-intc + - items: + - const: allwinner,sun50i-a100-nmi + - const: allwinner,sun9i-a80-nmi - items: - const: allwinner,sun50i-h6-r-intc - const: allwinner,sun6i-a31-r-intc -- cgit v1.2.3 From 1c09280f0b214dfdb7b78336ff5c871108e5f3a9 Mon Sep 17 00:00:00 2001 From: Yangtao Li Date: Fri, 24 Jul 2020 15:20:12 +0800 Subject: dt-bindings: arm: sunxi: Add Allwinner A100 Perf1 Board bindings Document board compatible names for Allwinner A100 Perf1 Board. Signed-off-by: Yangtao Li Signed-off-by: Maxime Ripard Reviewed-by: Rob Herring Link: https://lore.kernel.org/r/0368996b732f300d0b5719e51dbd4322fa09053d.1595572867.git.frank@allwinnertech.com --- Documentation/devicetree/bindings/arm/sunxi.yaml | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/arm/sunxi.yaml b/Documentation/devicetree/bindings/arm/sunxi.yaml index efc9118233b4..5957a22c2e95 100644 --- a/Documentation/devicetree/bindings/arm/sunxi.yaml +++ b/Documentation/devicetree/bindings/arm/sunxi.yaml @@ -16,6 +16,11 @@ properties: compatible: oneOf: + - description: Allwinner A100 Perf1 Board + items: + - const: allwinner,a100-perf1 + - const: allwinner,sun50i-a100 + - description: Allwinner A23 Evaluation Board items: - const: allwinner,sun8i-a23-evb -- cgit v1.2.3 From 2f704c29699dc3809d80095da8cf2cd5d19b28c4 Mon Sep 17 00:00:00 2001 From: Yangtao Li Date: Fri, 24 Jul 2020 14:56:08 +0800 Subject: dt-bindings: clk: sunxi-ccu: add compatible string for A100 CCU and R-CCU This patch adds binding to a100's ccu clock and r-ccu clock. Signed-off-by: Yangtao Li Signed-off-by: Maxime Ripard Reviewed-by: Rob Herring Link: https://lore.kernel.org/r/5791b0a39e7ca2f1c11d3bade9ebeb7fece31230.1595572867.git.frank@allwinnertech.com --- .../devicetree/bindings/clock/allwinner,sun4i-a10-ccu.yaml | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-ccu.yaml b/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-ccu.yaml index 4d382128b711..3b45344ed758 100644 --- a/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-ccu.yaml +++ b/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-ccu.yaml @@ -36,6 +36,8 @@ properties: - allwinner,sun9i-a80-ccu - allwinner,sun50i-a64-ccu - allwinner,sun50i-a64-r-ccu + - allwinner,sun50i-a100-ccu + - allwinner,sun50i-a100-r-ccu - allwinner,sun50i-h5-ccu - allwinner,sun50i-h6-ccu - allwinner,sun50i-h6-r-ccu @@ -78,6 +80,7 @@ if: - allwinner,sun8i-a83t-r-ccu - allwinner,sun8i-h3-r-ccu - allwinner,sun50i-a64-r-ccu + - allwinner,sun50i-a100-r-ccu - allwinner,sun50i-h6-r-ccu then: @@ -94,7 +97,9 @@ else: if: properties: compatible: - const: allwinner,sun50i-h6-ccu + enum: + - allwinner,sun50i-a100-ccu + - allwinner,sun50i-h6-ccu then: properties: -- cgit v1.2.3 From 4c508a44d400c9e5be7e18733ae0e7377b2fdec6 Mon Sep 17 00:00:00 2001 From: Jernej Skrabec Date: Tue, 25 Aug 2020 12:00:29 +0200 Subject: dt-bindings: dma: allwinner,sun50i-a64-dma: Add R40 compatible R40 has DMA engine which is basically the same as that in A64, with only known difference being number of request sources and number of channels. Add compatible for it. Signed-off-by: Jernej Skrabec Signed-off-by: Maxime Ripard Link: https://lore.kernel.org/r/20200825100030.1145356-2-jernej.skrabec@siol.net --- .../devicetree/bindings/dma/allwinner,sun50i-a64-dma.yaml | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/dma/allwinner,sun50i-a64-dma.yaml b/Documentation/devicetree/bindings/dma/allwinner,sun50i-a64-dma.yaml index 9e53472be194..372679dbd216 100644 --- a/Documentation/devicetree/bindings/dma/allwinner,sun50i-a64-dma.yaml +++ b/Documentation/devicetree/bindings/dma/allwinner,sun50i-a64-dma.yaml @@ -19,9 +19,12 @@ properties: description: The cell is the request line number. compatible: - enum: - - allwinner,sun50i-a64-dma - - allwinner,sun50i-h6-dma + oneOf: + - const: allwinner,sun50i-a64-dma + - const: allwinner,sun50i-h6-dma + - items: + - const: allwinner,sun8i-r40-dma + - const: allwinner,sun50i-a64-dma reg: maxItems: 1 -- cgit v1.2.3 From c05a4bff5c509afda0ee60009d62b5abc0e08311 Mon Sep 17 00:00:00 2001 From: Reto Schneider Date: Sat, 22 Aug 2020 17:10:20 +0200 Subject: dt-bindings: arm: at91: Add GARDENA smart Gateway (Art. 19000) board Document devicetree's bindings for the GARDENA smart Gateway with article number 19000, based on the SAM9G25 Atmel SoC. Signed-off-by: Reto Schneider Signed-off-by: Alexandre Belloni Link: https://lore.kernel.org/r/20200822151023.31629-1-code@reto-schneider.ch --- Documentation/devicetree/bindings/arm/atmel-at91.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/arm/atmel-at91.yaml b/Documentation/devicetree/bindings/arm/atmel-at91.yaml index 31b0c54fa2cf..614c91956798 100644 --- a/Documentation/devicetree/bindings/arm/atmel-at91.yaml +++ b/Documentation/devicetree/bindings/arm/atmel-at91.yaml @@ -41,6 +41,7 @@ properties: - overkiz,kizboxmini-mb # Overkiz kizbox Mini Mother Board - overkiz,kizboxmini-rd # Overkiz kizbox Mini RailDIN - overkiz,smartkiz # Overkiz SmartKiz Board + - gardena,smart-gateway-at91sam # GARDENA smart Gateway (Article No. 19000) - const: atmel,at91sam9g25 - const: atmel,at91sam9x5 - const: atmel,at91sam9 -- cgit v1.2.3 From ef805f217709715b9013d8b247947af404718b9c Mon Sep 17 00:00:00 2001 From: Elliot Berman Date: Tue, 18 Aug 2020 11:54:13 -0700 Subject: dt-bindings: power: reset: Convert reboot-mode to YAML Convert reboot-mode bindings to YAML. Signed-off-by: Elliot Berman Signed-off-by: Sebastian Reichel --- .../bindings/power/reset/reboot-mode.txt | 25 ------------ .../bindings/power/reset/reboot-mode.yaml | 47 ++++++++++++++++++++++ 2 files changed, 47 insertions(+), 25 deletions(-) delete mode 100644 Documentation/devicetree/bindings/power/reset/reboot-mode.txt create mode 100644 Documentation/devicetree/bindings/power/reset/reboot-mode.yaml (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/power/reset/reboot-mode.txt b/Documentation/devicetree/bindings/power/reset/reboot-mode.txt deleted file mode 100644 index de34f27d509e..000000000000 --- a/Documentation/devicetree/bindings/power/reset/reboot-mode.txt +++ /dev/null @@ -1,25 +0,0 @@ -Generic reboot mode core map driver - -This driver get reboot mode arguments and call the write -interface to store the magic value in special register -or ram. Then the bootloader can read it and take different -action according to the argument stored. - -All mode properties are vendor specific, it is a indication to tell -the bootloader what to do when the system reboots, and should be named -as mode-xxx = (xxx is mode name, magic should be a none-zero value). - -For example modes common on Android platform: -- mode-normal: Normal reboot mode, system reboot with command "reboot". -- mode-recovery: Android Recovery mode, it is a mode to format the device or update a new image. -- mode-bootloader: Android fastboot mode, it's a mode to re-flash partitions on the Android based device. -- mode-loader: A bootloader mode, it's a mode used to download image on Rockchip platform, - usually used in development. - -Example: - reboot-mode { - mode-normal = ; - mode-recovery = ; - mode-bootloader = ; - mode-loader = ; - } diff --git a/Documentation/devicetree/bindings/power/reset/reboot-mode.yaml b/Documentation/devicetree/bindings/power/reset/reboot-mode.yaml new file mode 100644 index 000000000000..a6c91026d4cc --- /dev/null +++ b/Documentation/devicetree/bindings/power/reset/reboot-mode.yaml @@ -0,0 +1,47 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/power/reset/reboot-mode.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Generic reboot mode core map + +maintainers: + - Andy Yan + +description: | + This driver get reboot mode arguments and call the write + interface to store the magic value in special register + or ram. Then the bootloader can read it and take different + action according to the argument stored. + + All mode properties are vendor specific, it is a indication to tell + the bootloader what to do when the system reboots, and should be named + as mode-xxx = (xxx is mode name, magic should be a non-zero value). + + For example, modes common Android platform are: + - normal: Normal reboot mode, system reboot with command "reboot". + - recovery: Android Recovery mode, it is a mode to format the device or update a new image. + - bootloader: Android fastboot mode, it's a mode to re-flash partitions on the Android based device. + - loader: A bootloader mode, it's a mode used to download image on Rockchip platform, + usually used in development. + +properties: + mode-normal: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + Default value to set on a reboot if no command was provided. + +patternProperties: + "^mode-.*$": + $ref: /schemas/types.yaml#/definitions/uint32 + +examples: + - | + reboot-mode { + mode-normal = <0>; + mode-recovery = <1>; + mode-bootloader = <2>; + mode-loader = <3>; + }; +... -- cgit v1.2.3 From 873e63267bde605f253b9fee676af918be24e3d7 Mon Sep 17 00:00:00 2001 From: Dmitry Osipenko Date: Fri, 14 Aug 2020 00:34:00 +0300 Subject: dt-bindings: battery: Add temperature properties Document generic battery temperature properties. Signed-off-by: Dmitry Osipenko Reviewed-by: Rob Herring Signed-off-by: Sebastian Reichel --- .../devicetree/bindings/power/supply/battery.yaml | 24 ++++++++++++++++++++++ 1 file changed, 24 insertions(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/power/supply/battery.yaml b/Documentation/devicetree/bindings/power/supply/battery.yaml index 932b736ce5c0..0c7e2e44793b 100644 --- a/Documentation/devicetree/bindings/power/supply/battery.yaml +++ b/Documentation/devicetree/bindings/power/supply/battery.yaml @@ -82,6 +82,27 @@ properties: An array containing the temperature in degree Celsius, for each of the battery capacity lookup table. + operating-range-celsius: + $ref: /schemas/types.yaml#/definitions/uint32-array + description: operating temperature range of a battery + items: + - description: minimum temperature at which battery can operate + - description: maximum temperature at which battery can operate + + ambient-celsius: + $ref: /schemas/types.yaml#/definitions/uint32-array + description: safe range of ambient temperature + items: + - description: alert when ambient temperature is lower than this value + - description: alert when ambient temperature is higher than this value + + alert-celsius: + $ref: /schemas/types.yaml#/definitions/uint32-array + description: safe range of battery temperature + items: + - description: alert when battery temperature is lower than this value + - description: alert when battery temperature is higher than this value + required: - compatible @@ -130,6 +151,9 @@ examples: /* table for 10 degree Celsius */ ocv-capacity-table-2 = <4250000 100>, <4200000 95>, <4185000 90>; resistance-temp-table = <20 100>, <10 90>, <0 80>, <(-10) 60>; + operating-range-celsius = <(-30) 50>; + ambient-celsius = <(-5) 50>; + alert-celsius = <0 40>; }; charger@11 { -- cgit v1.2.3 From c1f90759b3d536f9b1b047484d08dfd04af3c4b1 Mon Sep 17 00:00:00 2001 From: David Heidelberg Date: Fri, 14 Aug 2020 00:34:01 +0300 Subject: dt-bindings: power: supply: Add device-tree binding for Summit SMB3xx Summit SMB3xx series is a Programmable Switching Li+ Battery Charger. This patch adds device-tree binding for Summit SMB345, SMB347 and SMB358 chargers. Signed-off-by: David Heidelberg Signed-off-by: Dmitry Osipenko Reviewed-by: Rob Herring Signed-off-by: Sebastian Reichel --- .../power/supply/summit,smb347-charger.yaml | 152 +++++++++++++++++++++ include/dt-bindings/power/summit,smb347-charger.h | 19 +++ 2 files changed, 171 insertions(+) create mode 100644 Documentation/devicetree/bindings/power/supply/summit,smb347-charger.yaml create mode 100644 include/dt-bindings/power/summit,smb347-charger.h (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/power/supply/summit,smb347-charger.yaml b/Documentation/devicetree/bindings/power/supply/summit,smb347-charger.yaml new file mode 100644 index 000000000000..193a23af2007 --- /dev/null +++ b/Documentation/devicetree/bindings/power/supply/summit,smb347-charger.yaml @@ -0,0 +1,152 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/power/supply/summit,smb347-charger.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Battery charger driver for SMB345, SMB347 and SMB358 + +maintainers: + - David Heidelberg + - Dmitry Osipenko + +properties: + compatible: + enum: + - summit,smb345 + - summit,smb347 + - summit,smb358 + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + monitored-battery: + description: phandle to the battery node + $ref: /schemas/types.yaml#/definitions/phandle + + summit,enable-usb-charging: + type: boolean + description: Enable charging through USB. + + summit,enable-otg-charging: + type: boolean + description: Provide power for USB OTG + + summit,enable-mains-charging: + type: boolean + description: Enable charging through mains + + summit,enable-charge-control: + description: Enable charging control + $ref: /schemas/types.yaml#/definitions/uint32 + enum: + - 0 # SMB3XX_CHG_ENABLE_SW SW (I2C interface) + - 1 # SMB3XX_CHG_ENABLE_PIN_ACTIVE_LOW Pin control (Active Low) + - 2 # SMB3XX_CHG_ENABLE_PIN_ACTIVE_HIGH Pin control (Active High) + + summit,fast-voltage-threshold-microvolt: + description: Voltage threshold to transit to fast charge mode (in uV) + minimum: 2400000 + maximum: 3000000 + + summit,mains-current-limit-microamp: + description: Maximum input current from AC/DC input (in uA) + + summit,usb-current-limit-microamp: + description: Maximum input current from USB input (in uA) + + summit,charge-current-compensation-microamp: + description: Charge current compensation (in uA) + + summit,chip-temperature-threshold-celsius: + description: Chip temperature for thermal regulation in °C. + enum: [100, 110, 120, 130] + + summit,soft-compensation-method: + description: Soft temperature limit compensation method + $ref: /schemas/types.yaml#/definitions/uint32 + enum: + - 0 # SMB3XX_SOFT_TEMP_COMPENSATE_NONE Compensation none + - 1 # SMB3XX_SOFT_TEMP_COMPENSATE_CURRENT Current compensation + - 2 # SMB3XX_SOFT_TEMP_COMPENSATE_VOLTAGE Voltage compensation + +allOf: + - if: + properties: + compatible: + enum: + - summit,smb345 + - summit,smb358 + + then: + properties: + summit,mains-current-limit-microamp: + enum: [ 300000, 500000, 700000, 1000000, + 1500000, 1800000, 2000000] + + summit,usb-current-limit-microamp: + enum: [ 300000, 500000, 700000, 1000000, + 1500000, 1800000, 2000000] + + summit,charge-current-compensation-microamp: + enum: [200000, 450000, 600000, 900000] + + else: + properties: + summit,mains-current-limit-microamp: + enum: [ 300000, 500000, 700000, 900000, 1200000, + 1500000, 1800000, 2000000, 2200000, 2500000] + + summit,usb-current-limit-microamp: + enum: [ 300000, 500000, 700000, 900000, 1200000, + 1500000, 1800000, 2000000, 2200000, 2500000] + + summit,charge-current-compensation-microamp: + enum: [250000, 700000, 900000, 1200000] + +required: + - compatible + - reg + +anyOf: + - required: + - summit,enable-usb-charging + - required: + - summit,enable-otg-charging + - required: + - summit,enable-mains-charging + +additionalProperties: false + +examples: + - | + #include + + i2c { + #address-cells = <1>; + #size-cells = <0>; + + charger@7f { + compatible = "summit,smb347"; + reg = <0x7f>; + + summit,enable-charge-control = ; + summit,chip-temperature-threshold-celsius = <110>; + summit,mains-current-limit-microamp = <2000000>; + summit,usb-current-limit-microamp = <500000>; + summit,enable-usb-charging; + summit,enable-mains-charging; + + monitored-battery = <&battery>; + }; + }; + + battery: battery-cell { + compatible = "simple-battery"; + constant-charge-current-max-microamp = <1800000>; + operating-range-celsius = <0 45>; + alert-celsius = <3 42>; + }; diff --git a/include/dt-bindings/power/summit,smb347-charger.h b/include/dt-bindings/power/summit,smb347-charger.h new file mode 100644 index 000000000000..d918bf321a71 --- /dev/null +++ b/include/dt-bindings/power/summit,smb347-charger.h @@ -0,0 +1,19 @@ +/* SPDX-License-Identifier: (GPL-2.0-or-later or MIT) */ +/* + * Author: David Heidelberg + */ + +#ifndef _DT_BINDINGS_SMB347_CHARGER_H +#define _DT_BINDINGS_SMB347_CHARGER_H + +/* Charging compensation method */ +#define SMB3XX_SOFT_TEMP_COMPENSATE_NONE 0 +#define SMB3XX_SOFT_TEMP_COMPENSATE_CURRENT 1 +#define SMB3XX_SOFT_TEMP_COMPENSATE_VOLTAGE 2 + +/* Charging enable control */ +#define SMB3XX_CHG_ENABLE_SW 0 +#define SMB3XX_CHG_ENABLE_PIN_ACTIVE_LOW 1 +#define SMB3XX_CHG_ENABLE_PIN_ACTIVE_HIGH 2 + +#endif -- cgit v1.2.3 From 8d3c875c9d02dc78e25ad4b1a6cc02ef5df28777 Mon Sep 17 00:00:00 2001 From: "Vineetha G. Jaya Kumaran" Date: Wed, 26 Aug 2020 12:33:41 +0800 Subject: dt-bindings: net: Add bindings for Intel Keem Bay Add Device Tree bindings documentation for the ethernet controller on Intel Keem Bay. Signed-off-by: Vineetha G. Jaya Kumaran Signed-off-by: David S. Miller --- .../devicetree/bindings/net/intel,dwmac-plat.yaml | 130 +++++++++++++++++++++ 1 file changed, 130 insertions(+) create mode 100644 Documentation/devicetree/bindings/net/intel,dwmac-plat.yaml (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/net/intel,dwmac-plat.yaml b/Documentation/devicetree/bindings/net/intel,dwmac-plat.yaml new file mode 100644 index 000000000000..fa3ebba4e635 --- /dev/null +++ b/Documentation/devicetree/bindings/net/intel,dwmac-plat.yaml @@ -0,0 +1,130 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/intel,dwmac-plat.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Intel DWMAC glue layer Device Tree Bindings + +maintainers: + - Vineetha G. Jaya Kumaran + +select: + properties: + compatible: + contains: + enum: + - intel,keembay-dwmac + required: + - compatible + +allOf: + - $ref: "snps,dwmac.yaml#" + +properties: + compatible: + oneOf: + - items: + - enum: + - intel,keembay-dwmac + - const: snps,dwmac-4.10a + + clocks: + items: + - description: GMAC main clock + - description: PTP reference clock + - description: Tx clock + + clock-names: + items: + - const: stmmaceth + - const: ptp_ref + - const: tx_clk + +required: + - compatible + - clocks + - clock-names + +examples: +# FIXME: Remove defines and include the correct header file +# once it is available in mainline. + - | + #include + #include + #define MOVISOC_KMB_PSS_GBE + #define MOVISOC_KMB_PSS_AUX_GBE_PTP + #define MOVISOC_KMB_PSS_AUX_GBE_TX + + stmmac_axi_setup: stmmac-axi-config { + snps,lpi_en; + snps,wr_osr_lmt = <0x0>; + snps,rd_osr_lmt = <0x2>; + snps,blen = <0 0 0 0 16 8 4>; + }; + + mtl_rx_setup: rx-queues-config { + snps,rx-queues-to-use = <2>; + snps,rx-sched-sp; + queue0 { + snps,dcb-algorithm; + snps,map-to-dma-channel = <0x0>; + snps,priority = <0x0>; + }; + + queue1 { + snps,dcb-algorithm; + snps,map-to-dma-channel = <0x1>; + snps,priority = <0x1>; + }; + }; + + mtl_tx_setup: tx-queues-config { + snps,tx-queues-to-use = <2>; + snps,tx-sched-wrr; + queue0 { + snps,weight = <0x10>; + snps,dcb-algorithm; + snps,priority = <0x0>; + }; + + queue1 { + snps,weight = <0x10>; + snps,dcb-algorithm; + snps,priority = <0x1>; + }; + }; + + gmac0: ethernet@3a000000 { + compatible = "intel,keembay-dwmac", "snps,dwmac-4.10a"; + interrupts = ; + interrupt-names = "macirq"; + reg = <0x3a000000 0x8000>; + snps,perfect-filter-entries = <128>; + phy-handle = <ð_phy0>; + phy-mode = "rgmii"; + rx-fifo-depth = <4096>; + tx-fifo-depth = <4096>; + clock-names = "stmmaceth", "ptp_ref", "tx_clk"; + clocks = <&scmi_clk MOVISOC_KMB_PSS_GBE>, + <&scmi_clk MOVISOC_KMB_PSS_AUX_GBE_PTP>, + <&scmi_clk MOVISOC_KMB_PSS_AUX_GBE_TX>; + snps,pbl = <0x4>; + snps,axi-config = <&stmmac_axi_setup>; + snps,mtl-rx-config = <&mtl_rx_setup>; + snps,mtl-tx-config = <&mtl_tx_setup>; + snps,tso; + status = "okay"; + + mdio0 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "snps,dwmac-mdio"; + + ethernet-phy@0 { + reg = <0>; + }; + }; + }; + +... -- cgit v1.2.3 From a2e385f5374d09c76d3e081a847f30e0b91045a6 Mon Sep 17 00:00:00 2001 From: Christian Lamparter Date: Sat, 22 Aug 2020 18:19:18 +0200 Subject: dt-bindings: ARM: add bindings for the Meraki MR32 mark the Meraki MR32 and its SoC (BCM53016) as supported in the bindings documentation file. A quick look on Broadcom BCM5301x series umbrella website reveals: "BCM53012 and BCM53016 with dual-core Cortex-A9 CPU at 1 GHz, 256KB L2 cache, 16-bit DDR2 interface, USB3 integrated switch, GPHYs and packet accelerator". As far as I can tell, Broadcom considers the SoC to be a version of the BCM53012. Signed-off-by: Christian Lamparter Acked-by: Scott Branden Signed-off-by: Florian Fainelli --- Documentation/devicetree/bindings/arm/bcm/brcm,bcm4708.yaml | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/arm/bcm/brcm,bcm4708.yaml b/Documentation/devicetree/bindings/arm/bcm/brcm,bcm4708.yaml index d48313c7ae45..988e0bbb2a62 100644 --- a/Documentation/devicetree/bindings/arm/bcm/brcm,bcm4708.yaml +++ b/Documentation/devicetree/bindings/arm/bcm/brcm,bcm4708.yaml @@ -83,6 +83,8 @@ properties: - brcm,bcm953012er - brcm,bcm953012hr - brcm,bcm953012k + - meraki,mr32 - const: brcm,brcm53012 + - const: brcm,brcm53016 - const: brcm,bcm4708 ... -- cgit v1.2.3 From 2d76f470224617fadfb35853d7d782b5caa56f9a Mon Sep 17 00:00:00 2001 From: Miquel Raynal Date: Thu, 27 Aug 2020 10:51:53 +0200 Subject: dt-bindings: mtd: Document nand-ecc-placement This optional property defines where the ECC bytes are expected to be stored. No value defaults to an unknown location, while these locations can be explicitly set to OOB or interleaved depending if the ECC bytes are entirely stored in the OOB area or mixed with regular data in the main area (also sometimes referred as "syndrome"). Signed-off-by: Miquel Raynal Reviewed-by: Boris Brezillon Acked-by: Rob Herring Link: https://lore.kernel.org/linux-mtd/20200827085208.16276-6-miquel.raynal@bootlin.com --- Documentation/devicetree/bindings/mtd/nand-controller.yaml | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/mtd/nand-controller.yaml b/Documentation/devicetree/bindings/mtd/nand-controller.yaml index 40fc5b0b2b8c..02f0347ff102 100644 --- a/Documentation/devicetree/bindings/mtd/nand-controller.yaml +++ b/Documentation/devicetree/bindings/mtd/nand-controller.yaml @@ -55,6 +55,16 @@ patternProperties: $ref: /schemas/types.yaml#/definitions/string enum: [none, soft, hw, hw_syndrome, hw_oob_first, on-die] + nand-ecc-placement: + allOf: + - $ref: /schemas/types.yaml#/definitions/string + - enum: [ oob, interleaved ] + description: + Location of the ECC bytes. This location is unknown by default + but can be explicitly set to "oob", if all ECC bytes are + known to be stored in the OOB area, or "interleaved" if ECC + bytes will be interleaved with regular data in the main area. + nand-ecc-algo: description: Desired ECC algorithm. -- cgit v1.2.3 From 457700644f58ae4bf97ad35cbdce21710959a7e7 Mon Sep 17 00:00:00 2001 From: Miquel Raynal Date: Thu, 27 Aug 2020 10:51:54 +0200 Subject: dt-bindings: mtd: Document nand-ecc-engine This property is needed to precisely point to the hardware ECC engine to use when there are several of them available. Here, hardware also refers to the on-die possibility. Signed-off-by: Miquel Raynal Reviewed-by: Rob Herring Link: https://lore.kernel.org/linux-mtd/20200827085208.16276-7-miquel.raynal@bootlin.com --- Documentation/devicetree/bindings/mtd/nand-controller.yaml | 13 +++++++++++++ 1 file changed, 13 insertions(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/mtd/nand-controller.yaml b/Documentation/devicetree/bindings/mtd/nand-controller.yaml index 02f0347ff102..ba7f8e4db5a5 100644 --- a/Documentation/devicetree/bindings/mtd/nand-controller.yaml +++ b/Documentation/devicetree/bindings/mtd/nand-controller.yaml @@ -55,6 +55,19 @@ patternProperties: $ref: /schemas/types.yaml#/definitions/string enum: [none, soft, hw, hw_syndrome, hw_oob_first, on-die] + nand-ecc-engine: + allOf: + - $ref: /schemas/types.yaml#/definitions/phandle + description: | + A phandle on the hardware ECC engine if any. There are + basically three possibilities: + 1/ The ECC engine is part of the NAND controller, in this + case the phandle should reference the parent node. + 2/ The ECC engine is part of the NAND part (on-die), in this + case the phandle should reference the node itself. + 3/ The ECC engine is external, in this case the phandle should + reference the specific ECC engine node. + nand-ecc-placement: allOf: - $ref: /schemas/types.yaml#/definitions/string -- cgit v1.2.3 From b440915af2e41daff7ee33e1d0ec29af5c37a1bf Mon Sep 17 00:00:00 2001 From: Miquel Raynal Date: Thu, 27 Aug 2020 10:51:55 +0200 Subject: dt-bindings: mtd: Document boolean NAND ECC properties Document nand-use-soft-ecc-engine and nand-no-ecc-engine properties. The former is here to force software correction, the latter prevents any correction to happen. These properties (along with nand-ecc-engine) are supposed to be more accurate than the current nand-ecc-modes wich is very misleading and very often people think it is mandatory while the core should be relied upon to decide which correction to handle. nand-ecc-mode was already inacurate, but it becomes totally problematic with setups where there are several hardware engines. Signed-off-by: Miquel Raynal Reviewed-by: Rob Herring Link: https://lore.kernel.org/linux-mtd/20200827085208.16276-8-miquel.raynal@bootlin.com --- Documentation/devicetree/bindings/mtd/nand-controller.yaml | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/mtd/nand-controller.yaml b/Documentation/devicetree/bindings/mtd/nand-controller.yaml index ba7f8e4db5a5..e79bb6d2c108 100644 --- a/Documentation/devicetree/bindings/mtd/nand-controller.yaml +++ b/Documentation/devicetree/bindings/mtd/nand-controller.yaml @@ -68,6 +68,14 @@ patternProperties: 3/ The ECC engine is external, in this case the phandle should reference the specific ECC engine node. + nand-use-soft-ecc-engine: + type: boolean + description: Use a software ECC engine. + + nand-no-ecc-engine: + type: boolean + description: Do not use any ECC correction. + nand-ecc-placement: allOf: - $ref: /schemas/types.yaml#/definitions/string -- cgit v1.2.3 From ee30214a4a79f1cea0b71d5412ba366a4b498937 Mon Sep 17 00:00:00 2001 From: Jernej Skrabec Date: Tue, 25 Aug 2020 19:13:56 +0200 Subject: dt-bindings: media: allwinner, sun4i-a10-ir: Add R40 compatible Allwinner R40 has very similar IR core to that found in A31. Add compatible for R40 and while at it, sort compatibles by family. Signed-off-by: Jernej Skrabec Signed-off-by: Maxime Ripard Link: https://lore.kernel.org/r/20200825171358.1286902-2-jernej.skrabec@siol.net --- Documentation/devicetree/bindings/media/allwinner,sun4i-a10-ir.yaml | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/media/allwinner,sun4i-a10-ir.yaml b/Documentation/devicetree/bindings/media/allwinner,sun4i-a10-ir.yaml index 7838804700d6..5fa19d4aeaf3 100644 --- a/Documentation/devicetree/bindings/media/allwinner,sun4i-a10-ir.yaml +++ b/Documentation/devicetree/bindings/media/allwinner,sun4i-a10-ir.yaml @@ -18,10 +18,13 @@ properties: oneOf: - const: allwinner,sun4i-a10-ir - const: allwinner,sun5i-a13-ir + - const: allwinner,sun6i-a31-ir - items: - const: allwinner,sun8i-a83t-ir - const: allwinner,sun6i-a31-ir - - const: allwinner,sun6i-a31-ir + - items: + - const: allwinner,sun8i-r40-ir + - const: allwinner,sun6i-a31-ir - items: - const: allwinner,sun50i-a64-ir - const: allwinner,sun6i-a31-ir -- cgit v1.2.3 From 73225f0b4cd1056baedf73e5aff74108e5e5a4ab Mon Sep 17 00:00:00 2001 From: Jernej Skrabec Date: Tue, 25 Aug 2020 19:35:19 +0200 Subject: dt-bindings: sram: allwinner, sun4i-a10-system-control: Add R40 compatibles Allwinner R40 has system controller similar to that in A10. Add compatibles for system controller and sram c1 region. Signed-off-by: Jernej Skrabec Signed-off-by: Maxime Ripard Link: https://lore.kernel.org/r/20200825173523.1289379-2-jernej.skrabec@siol.net --- .../bindings/sram/allwinner,sun4i-a10-system-control.yaml | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/sram/allwinner,sun4i-a10-system-control.yaml b/Documentation/devicetree/bindings/sram/allwinner,sun4i-a10-system-control.yaml index f5825935fd22..6ebcbc153691 100644 --- a/Documentation/devicetree/bindings/sram/allwinner,sun4i-a10-system-control.yaml +++ b/Documentation/devicetree/bindings/sram/allwinner,sun4i-a10-system-control.yaml @@ -33,6 +33,9 @@ properties: - const: allwinner,sun4i-a10-system-control - const: allwinner,sun8i-a23-system-control - const: allwinner,sun8i-h3-system-control + - items: + - const: allwinner,sun8i-r40-system-control + - const: allwinner,sun4i-a10-system-control - const: allwinner,sun50i-a64-sram-controller deprecated: true - const: allwinner,sun50i-a64-system-control @@ -86,6 +89,9 @@ patternProperties: - items: - const: allwinner,sun8i-h3-sram-c1 - const: allwinner,sun4i-a10-sram-c1 + - items: + - const: allwinner,sun8i-r40-sram-c1 + - const: allwinner,sun4i-a10-sram-c1 - items: - const: allwinner,sun50i-a64-sram-c1 - const: allwinner,sun4i-a10-sram-c1 -- cgit v1.2.3 From be2919d8355e4651386ad2fb61ddb6efe4533b1b Mon Sep 17 00:00:00 2001 From: Sebastian Reichel Date: Sat, 6 Jun 2020 00:44:00 +0200 Subject: power: supply: gpio-charger: add charge-current-limit feature Add new charge-current-limit feature to gpio-charger. Reviewed-by: Linus Walleij Signed-off-by: Sebastian Reichel --- .../bindings/power/supply/gpio-charger.yaml | 31 +++++ drivers/power/supply/gpio-charger.c | 140 +++++++++++++++++++++ 2 files changed, 171 insertions(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/power/supply/gpio-charger.yaml b/Documentation/devicetree/bindings/power/supply/gpio-charger.yaml index 6244b8ee9402..89f8e2bcb2d7 100644 --- a/Documentation/devicetree/bindings/power/supply/gpio-charger.yaml +++ b/Documentation/devicetree/bindings/power/supply/gpio-charger.yaml @@ -39,6 +39,25 @@ properties: maxItems: 1 description: GPIO indicating the charging status + charge-current-limit-gpios: + minItems: 1 + maxItems: 32 + description: GPIOs used for current limiting + + charge-current-limit-mapping: + description: List of tuples with current in uA and a GPIO bitmap (in + this order). The tuples must be provided in descending order of the + current limit. + $ref: /schemas/types.yaml#/definitions/uint32-matrix + items: + items: + - description: + Current limit in uA + - description: + Encoded GPIO setting. Bit 0 represents last GPIO from the + charge-current-limit-gpios property. Bit 1 second to last + GPIO and so on. + required: - compatible @@ -47,6 +66,12 @@ anyOf: - gpios - required: - charge-status-gpios + - required: + - charge-current-limit-gpios + +dependencies: + charge-current-limit-gpios: [ charge-current-limit-mapping ] + charge-current-limit-mapping: [ charge-current-limit-gpios ] additionalProperties: false @@ -60,4 +85,10 @@ examples: gpios = <&gpd 28 GPIO_ACTIVE_LOW>; charge-status-gpios = <&gpc 27 GPIO_ACTIVE_LOW>; + + charge-current-limit-gpios = <&gpioA 11 GPIO_ACTIVE_HIGH>, + <&gpioA 12 GPIO_ACTIVE_HIGH>; + charge-current-limit-mapping = <2500000 0x00>, // 2.5 A => both GPIOs low + <700000 0x01>, // 700 mA => GPIO A.12 high + <0 0x02>; // 0 mA => GPIO A.11 high }; diff --git a/drivers/power/supply/gpio-charger.c b/drivers/power/supply/gpio-charger.c index d7aff28f7e7e..68212b39785b 100644 --- a/drivers/power/supply/gpio-charger.c +++ b/drivers/power/supply/gpio-charger.c @@ -17,7 +17,13 @@ #include +struct gpio_mapping { + u32 limit_ua; + u32 gpiodata; +} __packed; + struct gpio_charger { + struct device *dev; unsigned int irq; unsigned int charge_status_irq; bool wakeup_enabled; @@ -26,6 +32,11 @@ struct gpio_charger { struct power_supply_desc charger_desc; struct gpio_desc *gpiod; struct gpio_desc *charge_status; + + struct gpio_descs *current_limit_gpios; + struct gpio_mapping *current_limit_map; + u32 current_limit_map_size; + u32 charge_current_limit; }; static irqreturn_t gpio_charger_irq(int irq, void *devid) @@ -42,6 +53,35 @@ static inline struct gpio_charger *psy_to_gpio_charger(struct power_supply *psy) return power_supply_get_drvdata(psy); } +static int set_charge_current_limit(struct gpio_charger *gpio_charger, int val) +{ + struct gpio_mapping mapping; + int ndescs = gpio_charger->current_limit_gpios->ndescs; + struct gpio_desc **gpios = gpio_charger->current_limit_gpios->desc; + int i; + + if (!gpio_charger->current_limit_map_size) + return -EINVAL; + + for (i = 0; i < gpio_charger->current_limit_map_size; i++) { + if (gpio_charger->current_limit_map[i].limit_ua <= val) + break; + } + mapping = gpio_charger->current_limit_map[i]; + + for (i = 0; i < ndescs; i++) { + bool val = (mapping.gpiodata >> i) & 1; + gpiod_set_value_cansleep(gpios[ndescs-i-1], val); + } + + gpio_charger->charge_current_limit = mapping.limit_ua; + + dev_dbg(gpio_charger->dev, "set charge current limit to %d (requested: %d)\n", + gpio_charger->charge_current_limit, val); + + return 0; +} + static int gpio_charger_get_property(struct power_supply *psy, enum power_supply_property psp, union power_supply_propval *val) { @@ -57,6 +97,9 @@ static int gpio_charger_get_property(struct power_supply *psy, else val->intval = POWER_SUPPLY_STATUS_NOT_CHARGING; break; + case POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT_MAX: + val->intval = gpio_charger->charge_current_limit; + break; default: return -EINVAL; } @@ -64,6 +107,34 @@ static int gpio_charger_get_property(struct power_supply *psy, return 0; } +static int gpio_charger_set_property(struct power_supply *psy, + enum power_supply_property psp, const union power_supply_propval *val) +{ + struct gpio_charger *gpio_charger = psy_to_gpio_charger(psy); + + switch (psp) { + case POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT_MAX: + return set_charge_current_limit(gpio_charger, val->intval); + default: + return -EINVAL; + } + + return 0; +} + +static int gpio_charger_property_is_writeable(struct power_supply *psy, + enum power_supply_property psp) +{ + switch (psp) { + case POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT_MAX: + return 1; + default: + break; + } + + return 0; +} + static enum power_supply_type gpio_charger_get_type(struct device *dev) { const char *chargetype; @@ -111,6 +182,61 @@ static int gpio_charger_get_irq(struct device *dev, void *dev_id, return irq; } +static int init_charge_current_limit(struct device *dev, + struct gpio_charger *gpio_charger) +{ + int i, len; + u32 cur_limit = U32_MAX; + + gpio_charger->current_limit_gpios = devm_gpiod_get_array_optional(dev, + "charge-current-limit", GPIOD_OUT_LOW); + if (IS_ERR(gpio_charger->current_limit_gpios)) { + dev_err(dev, "error getting current-limit GPIOs\n"); + return PTR_ERR(gpio_charger->current_limit_gpios); + } + + if (!gpio_charger->current_limit_gpios) + return 0; + + len = device_property_read_u32_array(dev, "charge-current-limit-mapping", + NULL, 0); + if (len < 0) + return len; + + if (len == 0 || len % 2) { + dev_err(dev, "invalid charge-current-limit-mapping length\n"); + return -EINVAL; + } + + gpio_charger->current_limit_map = devm_kmalloc_array(dev, + len / 2, sizeof(*gpio_charger->current_limit_map), GFP_KERNEL); + if (!gpio_charger->current_limit_map) + return -ENOMEM; + + gpio_charger->current_limit_map_size = len / 2; + + len = device_property_read_u32_array(dev, "charge-current-limit-mapping", + (u32*) gpio_charger->current_limit_map, len); + if (len < 0) + return len; + + for (i=0; i < gpio_charger->current_limit_map_size; i++) { + if (gpio_charger->current_limit_map[i].limit_ua > cur_limit) { + dev_err(dev, "charge-current-limit-mapping not sorted by current in descending order\n"); + return -EINVAL; + } + + cur_limit = gpio_charger->current_limit_map[i].limit_ua; + } + + /* default to smallest current limitation for safety reasons */ + len = gpio_charger->current_limit_map_size - 1; + set_charge_current_limit(gpio_charger, + gpio_charger->current_limit_map[len].limit_ua); + + return 0; +} + /* * The entries will be overwritten by driver's probe routine depending * on the available features. This list ensures, that the array is big @@ -119,6 +245,7 @@ static int gpio_charger_get_irq(struct device *dev, void *dev_id, static enum power_supply_property gpio_charger_properties[] = { POWER_SUPPLY_PROP_ONLINE, POWER_SUPPLY_PROP_STATUS, + POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT_MAX, }; static int gpio_charger_probe(struct platform_device *pdev) @@ -141,6 +268,7 @@ static int gpio_charger_probe(struct platform_device *pdev) gpio_charger = devm_kzalloc(dev, sizeof(*gpio_charger), GFP_KERNEL); if (!gpio_charger) return -ENOMEM; + gpio_charger->dev = dev; /* * This will fetch a GPIO descriptor from device tree, ACPI or @@ -167,10 +295,22 @@ static int gpio_charger_probe(struct platform_device *pdev) num_props++; } + ret = init_charge_current_limit(dev, gpio_charger); + if (ret < 0) + return ret; + if (gpio_charger->current_limit_map) { + gpio_charger_properties[num_props] = + POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT_MAX; + num_props++; + } + charger_desc = &gpio_charger->charger_desc; charger_desc->properties = gpio_charger_properties; charger_desc->num_properties = num_props; charger_desc->get_property = gpio_charger_get_property; + charger_desc->set_property = gpio_charger_set_property; + charger_desc->property_is_writeable = + gpio_charger_property_is_writeable; psy_cfg.of_node = dev->of_node; psy_cfg.drv_data = gpio_charger; -- cgit v1.2.3 From 7a63d769a8849bbb98dd041c607c1c299f52be71 Mon Sep 17 00:00:00 2001 From: Dan Murphy Date: Thu, 27 Aug 2020 08:45:08 -0500 Subject: dt-bindings: net: dp83822: Add TI dp83822 phy Add a dt binding for the TI dp83822 ethernet phy device. Reviewed-by: Rob Herring Signed-off-by: Dan Murphy Reviewed-by: Andrew Lunn Signed-off-by: David S. Miller --- .../devicetree/bindings/net/ti,dp83822.yaml | 80 ++++++++++++++++++++++ 1 file changed, 80 insertions(+) create mode 100644 Documentation/devicetree/bindings/net/ti,dp83822.yaml (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/net/ti,dp83822.yaml b/Documentation/devicetree/bindings/net/ti,dp83822.yaml new file mode 100644 index 000000000000..55913534cbc2 --- /dev/null +++ b/Documentation/devicetree/bindings/net/ti,dp83822.yaml @@ -0,0 +1,80 @@ +# SPDX-License-Identifier: (GPL-2.0+ OR BSD-2-Clause) +# Copyright (C) 2020 Texas Instruments Incorporated +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/net/ti,dp83822.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: TI DP83822 ethernet PHY + +maintainers: + - Dan Murphy + +description: | + The DP83822 is a low-power, single-port, 10/100 Mbps Ethernet PHY. It + provides all of the physical layer functions needed to transmit and receive + data over standard, twisted-pair cables or to connect to an external, + fiber-optic transceiver. Additionally, the DP83822 provides flexibility to + connect to a MAC through a standard MII, RMII, or RGMII interface + + Specifications about the Ethernet PHY can be found at: + http://www.ti.com/lit/ds/symlink/dp83822i.pdf + +allOf: + - $ref: "ethernet-phy.yaml#" + +properties: + reg: + maxItems: 1 + + ti,link-loss-low: + type: boolean + description: | + DP83822 PHY in Fiber mode only. + Sets the DP83822 to detect a link drop condition when the signal goes + high. If not set then link drop will occur when the signal goes low. + This property is only applicable if the fiber mode support is strapped + to on. + + ti,fiber-mode: + type: boolean + description: | + DP83822 PHY only. + If present the DP83822 PHY is configured to operate in fiber mode + Fiber mode support can also be strapped. If the strap pin is not set + correctly or not set at all then this boolean can be used to enable it. + If the fiber mode is not strapped then signal detection for the PHY + is disabled. + In fiber mode, auto-negotiation is disabled and the PHY can only work in + 100base-fx (full and half duplex) modes. + + rx-internal-delay-ps: + description: | + DP83822 PHY only. + Setting this property to a non-zero number sets the RX internal delay + for the PHY. The internal delay for the PHY is fixed to 3.5ns relative + to receive data. + + tx-internal-delay-ps: + description: | + DP83822 PHY only. + Setting this property to a non-zero number sets the TX internal delay + for the PHY. The internal delay for the PHY is fixed to 3.5ns relative + to transmit data. + +required: + - reg + +examples: + - | + mdio0 { + #address-cells = <1>; + #size-cells = <0>; + ethphy0: ethernet-phy@0 { + reg = <0>; + rx-internal-delay-ps = <1>; + tx-internal-delay-ps = <1>; + }; + }; + +... -- cgit v1.2.3 From d8483f31487c8c8f87fec59c5ee106dd213b177a Mon Sep 17 00:00:00 2001 From: Jonathan Bakker Date: Thu, 14 May 2020 16:04:35 -0700 Subject: dt-bindings: power: supply: Cleanup charger-manager bindings The bindings for charger-manager were very unclear and didn't specify allowable values in many cases. Clean these up to show what each value does and make sure all properties are documented here rather than using wildcards. Signed-off-by: Jonathan Bakker Acked-by: Rob Herring Signed-off-by: Sebastian Reichel --- .../bindings/power/supply/charger-manager.txt | 30 ++++++++++++++-------- 1 file changed, 20 insertions(+), 10 deletions(-) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/power/supply/charger-manager.txt b/Documentation/devicetree/bindings/power/supply/charger-manager.txt index ec4fe9de3137..b5ae9061b7a0 100644 --- a/Documentation/devicetree/bindings/power/supply/charger-manager.txt +++ b/Documentation/devicetree/bindings/power/supply/charger-manager.txt @@ -3,24 +3,32 @@ charger-manager bindings Required properties : - compatible : "charger-manager" - - <>-supply : for regulator consumer - - cm-num-chargers : number of chargers + - <>-supply : for regulator consumer, named according to cm-regulator-name - cm-chargers : name of chargers - cm-fuel-gauge : name of battery fuel gauge - subnode : - cm-regulator-name : name of charger regulator - subnode : - - cm-cable-name : name of charger cable + - cm-cable-name : name of charger cable - one of USB, USB-HOST, + SDP, DCP, CDP, ACA, FAST-CHARGER, SLOW-CHARGER, WPT, + PD, DOCK, JIG, or MECHANICAL - cm-cable-extcon : name of extcon dev (optional) - cm-cable-min : minimum current of cable (optional) - cm-cable-max : maximum current of cable Optional properties : - cm-name : charger manager's name (default : "battery") - - cm-poll-mode : polling mode (enum polling_modes) - - cm-poll-interval : polling interval - - cm-battery-stat : battery status (enum data_source) - - cm-fullbatt-* : data for full battery checking + - cm-poll-mode : polling mode - 0 for disabled, 1 for always, 2 for when + external power is connected, or 3 for when charging. If not present, + then polling is disabled + - cm-poll-interval : polling interval (in ms) + - cm-battery-stat : battery status - 0 for battery always present, 1 for no + battery, 2 to check presence via fuel gauge, or 3 to check presence + via charger + - cm-fullbatt-vchkdrop-volt : voltage drop (in uV) before restarting charging + - cm-fullbatt-voltage : voltage (in uV) of full battery + - cm-fullbatt-soc : state of charge to consider as full battery + - cm-fullbatt-capacity : capcity (in uAh) to consider as full battery - cm-thermal-zone : name of external thermometer's thermal zone - cm-battery-* : threshold battery temperature for charging -cold : critical cold temperature of battery for charging @@ -29,6 +37,10 @@ Optional properties : -temp-diff : temperature difference to allow recharging - cm-dis/charging-max = limits of charging duration +Deprecated properties: + - cm-num-chargers + - cm-fullbatt-vchkdrop-ms + Example : charger-manager@0 { compatible = "charger-manager"; @@ -39,13 +51,11 @@ Example : cm-poll-mode = <1>; cm-poll-interval = <30000>; - cm-fullbatt-vchkdrop-ms = <30000>; cm-fullbatt-vchkdrop-volt = <150000>; cm-fullbatt-soc = <100>; cm-battery-stat = <3>; - cm-num-chargers = <3>; cm-chargers = "charger0", "charger1", "charger2"; cm-fuel-gauge = "fuelgauge0"; @@ -71,7 +81,7 @@ Example : cm-cable-max = <500000>; }; cable@1 { - cm-cable-name = "TA"; + cm-cable-name = "SDP"; cm-cable-extcon = "extcon-dev.0"; cm-cable-min = <650000>; cm-cable-max = <675000>; -- cgit v1.2.3 From c883db9a9306dea5d907287b74b926258ea7422d Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Sun, 23 Aug 2020 19:20:15 +0200 Subject: dt-bindings: arm: fsl: Add Beacon i.MX8M Mini Development Kit binding Document the binding for Beacon EmbeddedWorks i.MX8M Mini Development Kit board. Signed-off-by: Krzysztof Kozlowski Signed-off-by: Shawn Guo --- Documentation/devicetree/bindings/arm/fsl.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml index ac6327cf53fd..7ab9d34159f1 100644 --- a/Documentation/devicetree/bindings/arm/fsl.yaml +++ b/Documentation/devicetree/bindings/arm/fsl.yaml @@ -345,6 +345,7 @@ properties: - description: i.MX8MM based Boards items: - enum: + - beacon,imx8mm-beacon-kit # i.MX8MM Beacon Development Kit - fsl,imx8mm-evk # i.MX8MM EVK Board - const: fsl,imx8mm -- cgit v1.2.3 From 75a0a65a301f557bf0306d7983f8cf31ac91de56 Mon Sep 17 00:00:00 2001 From: Jagan Teki Date: Fri, 7 Aug 2020 15:18:23 +0530 Subject: dt-bindings: arm: rockchip: Update ROCKPi 4 binding ROCKPi 4 has 3 variants of hardware platforms called ROCKPi 4A, 4B, and 4C. - ROCKPi 4A has no Wif/BT. - ROCKPi 4B has AP6256 Wifi/BT, PoE. - ROCKPi 4C has AP6256 Wifi/BT, PoE, miniDP, USB Host enabled GPIO pin change compared to 4B, 4C So, update the existing ROCKPi 4 binding to support ROCKPi 4A/B/C hardware platforms. Signed-off-by: Jagan Teki Acked-by: Rob Herring Link: https://lore.kernel.org/r/20200807094826.12019-1-jagan@amarulasolutions.com Signed-off-by: Heiko Stuebner --- Documentation/devicetree/bindings/arm/rockchip.yaml | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml index db2e35796795..7025d00c06cc 100644 --- a/Documentation/devicetree/bindings/arm/rockchip.yaml +++ b/Documentation/devicetree/bindings/arm/rockchip.yaml @@ -430,8 +430,12 @@ properties: - const: radxa,rock - const: rockchip,rk3188 - - description: Radxa ROCK Pi 4 + - description: Radxa ROCK Pi 4A/B/C items: + - enum: + - radxa,rockpi4a + - radxa,rockpi4b + - radxa,rockpi4c - const: radxa,rockpi4 - const: rockchip,rk3399 -- cgit v1.2.3 From cb1cc137a2c148cbe60e5065afa1a09e176e0269 Mon Sep 17 00:00:00 2001 From: Johan Jonker Date: Sat, 8 Aug 2020 18:06:16 +0200 Subject: dt-bindings: Add vendor prefix for Shenzhen Zkmagic Technology Co., Ltd. Add vendor prefix for Shenzhen Zkmagic Technology Co., Ltd. Signed-off-by: Johan Jonker Acked-by: Rob Herring Link: https://lore.kernel.org/r/20200808160618.15445-2-jbx6244@gmail.com Signed-off-by: Heiko Stuebner --- Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml index 2baee2c817c1..bfdefbd21985 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml @@ -1198,6 +1198,8 @@ patternProperties: description: Shenzhen Zidoo Technology Co., Ltd. "^zii,.*": description: Zodiac Inflight Innovations + "^zkmagic,.*": + description: Shenzhen Zkmagic Technology Co., Ltd. "^zte,.*": description: ZTE Corp. "^zyxel,.*": -- cgit v1.2.3 From 0dc8c62c92d4df35a001b613ebe10f95e4ebf776 Mon Sep 17 00:00:00 2001 From: Johan Jonker Date: Sat, 8 Aug 2020 18:06:17 +0200 Subject: dt-bindings: arm: rockchip: add Zkmagic A95X Z2 description Add Zkmagic A95X Z2 description for a board with rk3318 processor. Signed-off-by: Johan Jonker Acked-by: Rob Herring Link: https://lore.kernel.org/r/20200808160618.15445-3-jbx6244@gmail.com Signed-off-by: Heiko Stuebner --- Documentation/devicetree/bindings/arm/rockchip.yaml | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml index 7025d00c06cc..251c3ca22e1b 100644 --- a/Documentation/devicetree/bindings/arm/rockchip.yaml +++ b/Documentation/devicetree/bindings/arm/rockchip.yaml @@ -559,4 +559,9 @@ properties: items: - const: tronsmart,orion-r68-meta - const: rockchip,rk3368 + + - description: Zkmagic A95X Z2 + items: + - const: zkmagic,a95x-z2 + - const: rockchip,rk3318 ... -- cgit v1.2.3 From 663effe570d1a798b7a5ae5cc614de615b55714a Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Tue, 25 Aug 2020 21:35:31 +0200 Subject: dt-bindings: arm: fsl: Fix Toradex Colibri i.MX 8 binding The Toradex Colibri i.MX 8 Evaluation board has two Toradex compatibles so it needs separate entry. This fixes dtbs_check warning: arch/arm64/boot/dts/freescale/imx8qxp-colibri-eval-v3.dt.yaml: /: compatible: ['toradex,colibri-imx8x-eval-v3', 'toradex,colibri-imx8x', 'fsl,imx8qxp'] is not valid under any of the given schemas (Possible causes of the failure): arch/arm64/boot/dts/freescale/imx8qxp-colibri-eval-v3.dt.yaml: /: compatible: ['toradex,colibri-imx8x-eval-v3', 'toradex,colibri-imx8x', 'fsl,imx8qxp'] is too long Signed-off-by: Krzysztof Kozlowski Reviewed-by: Rob Herring Signed-off-by: Shawn Guo --- Documentation/devicetree/bindings/arm/fsl.yaml | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml index 7ab9d34159f1..9abc0477fb75 100644 --- a/Documentation/devicetree/bindings/arm/fsl.yaml +++ b/Documentation/devicetree/bindings/arm/fsl.yaml @@ -382,7 +382,13 @@ properties: - einfochips,imx8qxp-ai_ml # i.MX8QXP AI_ML Board - fsl,imx8qxp-mek # i.MX8QXP MEK Board - toradex,colibri-imx8x # Colibri iMX8X Module + - const: fsl,imx8qxp + + - description: Toradex Colibri i.MX8 Evaluation Board + items: + - enum: - toradex,colibri-imx8x-eval-v3 # Colibri iMX8X Module on Colibri Evaluation Board V3 + - const: toradex,colibri-imx8x - const: fsl,imx8qxp - description: -- cgit v1.2.3 From 3db8904fa9764041aab7cdef8a935ee857a2bee7 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Tue, 25 Aug 2020 21:35:32 +0200 Subject: dt-bindings: arm: fsl: Add ZII Ultra boards binding Document the binding for Zodiac Inflight Innovations Ultra Boards. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Rob Herring Signed-off-by: Shawn Guo --- Documentation/devicetree/bindings/arm/fsl.yaml | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml index 9abc0477fb75..0596f55aeee9 100644 --- a/Documentation/devicetree/bindings/arm/fsl.yaml +++ b/Documentation/devicetree/bindings/arm/fsl.yaml @@ -376,6 +376,14 @@ properties: - technexion,pico-pi-imx8m # TechNexion PICO-PI-8M evk - const: fsl,imx8mq + - description: Zodiac Inflight Innovations Ultra Boards + items: + - enum: + - zii,imx8mq-ultra-rmb3 + - zii,imx8mq-ultra-zest + - const: zii,imx8mq-ultra + - const: fsl,imx8mq + - description: i.MX8QXP based Boards items: - enum: -- cgit v1.2.3 From 334b6b6638a27e6993b1d9c267b453fb2246b77d Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Mon, 24 Aug 2020 21:18:16 +0200 Subject: dt-bindings: arm: fsl: Add binding for Variscite VAR-SOM-MX8MM module Add a binding for the Variscite VAR-SOM-MX8MM System on Module. Signed-off-by: Krzysztof Kozlowski Signed-off-by: Shawn Guo --- Documentation/devicetree/bindings/arm/fsl.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml index 0596f55aeee9..53d639ce5374 100644 --- a/Documentation/devicetree/bindings/arm/fsl.yaml +++ b/Documentation/devicetree/bindings/arm/fsl.yaml @@ -347,6 +347,7 @@ properties: - enum: - beacon,imx8mm-beacon-kit # i.MX8MM Beacon Development Kit - fsl,imx8mm-evk # i.MX8MM EVK Board + - variscite,var-som-mx8mm # i.MX8MM Variscite VAR-SOM-MX8MM module - const: fsl,imx8mm - description: i.MX8MN based Boards -- cgit v1.2.3 From 97e875b701cf48f4b4398aa58b328f7d892c9b17 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Mon, 24 Aug 2020 21:18:17 +0200 Subject: dt-bindings: arm: fsl: Add binding for Variscite Symphony board with VAR-SOM-MX8MM Add a binding for the Variscite Symphony evaluation kit board with VAR-SOM-MX8MM System on Module. Signed-off-by: Krzysztof Kozlowski Signed-off-by: Shawn Guo --- Documentation/devicetree/bindings/arm/fsl.yaml | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml index 53d639ce5374..37cef8653541 100644 --- a/Documentation/devicetree/bindings/arm/fsl.yaml +++ b/Documentation/devicetree/bindings/arm/fsl.yaml @@ -350,6 +350,12 @@ properties: - variscite,var-som-mx8mm # i.MX8MM Variscite VAR-SOM-MX8MM module - const: fsl,imx8mm + - description: Variscite VAR-SOM-MX8MM based boards + items: + - const: variscite,var-som-mx8mm-symphony + - const: variscite,var-som-mx8mm + - const: fsl,imx8mm + - description: i.MX8MN based Boards items: - enum: -- cgit v1.2.3 From 355d7d0124fd0990ba6da74f959fbfe0ccf09c25 Mon Sep 17 00:00:00 2001 From: Chris Healy Date: Mon, 24 Aug 2020 20:04:06 -0700 Subject: dt-bindings: nvmem: Add syscon to Vybrid OCOTP driver Add syscon compatibility with Vybrid OCOTP driver binding. This is required to access the UID. Fixes: 623069946952 ("nvmem: Add DT binding documentation for Vybrid OCOTP driver") Signed-off-by: Chris Healy Reviewed-by: Stefan Agner Reviewed-by: Fabio Estevam Acked-by: Rob Herring Signed-off-by: Shawn Guo --- Documentation/devicetree/bindings/nvmem/vf610-ocotp.txt | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/nvmem/vf610-ocotp.txt b/Documentation/devicetree/bindings/nvmem/vf610-ocotp.txt index 56ed481c3e26..72ba628f6d0b 100644 --- a/Documentation/devicetree/bindings/nvmem/vf610-ocotp.txt +++ b/Documentation/devicetree/bindings/nvmem/vf610-ocotp.txt @@ -2,7 +2,7 @@ On-Chip OTP Memory for Freescale Vybrid Required Properties: compatible: - - "fsl,vf610-ocotp" for VF5xx/VF6xx + - "fsl,vf610-ocotp", "syscon" for VF5xx/VF6xx #address-cells : Should be 1 #size-cells : Should be 1 reg : Address and length of OTP controller and fuse map registers @@ -11,7 +11,7 @@ Required Properties: Example for Vybrid VF5xx/VF6xx: ocotp: ocotp@400a5000 { - compatible = "fsl,vf610-ocotp"; + compatible = "fsl,vf610-ocotp", "syscon"; #address-cells = <1>; #size-cells = <1>; reg = <0x400a5000 0xCF0>; -- cgit v1.2.3 From af89606924cf8cbf0a81732b63e0ec8768b0fa1b Mon Sep 17 00:00:00 2001 From: Florian Fainelli Date: Tue, 1 Sep 2020 14:43:46 -0700 Subject: dt-bindings: net: Document Broadcom SYSTEMPORT clocks The Broadcom SYSTEMPORT adapters require the use of two clocks for normal operations and during Wake-on-LAN, document those in the binding document. Signed-off-by: Florian Fainelli Signed-off-by: David S. Miller --- Documentation/devicetree/bindings/net/brcm,systemport.txt | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/net/brcm,systemport.txt b/Documentation/devicetree/bindings/net/brcm,systemport.txt index 83f29e0e11ba..75736739bfdd 100644 --- a/Documentation/devicetree/bindings/net/brcm,systemport.txt +++ b/Documentation/devicetree/bindings/net/brcm,systemport.txt @@ -20,6 +20,11 @@ Optional properties: - systemport,num-tier1-arb: number of tier 1 arbiters, an integer - systemport,num-txq: number of HW transmit queues, an integer - systemport,num-rxq: number of HW receive queues, an integer +- clocks: When provided, must be two phandles to the functional clocks nodes of + the SYSTEMPORT block. The first phandle is the main SYSTEMPORT clock used + during normal operation, while the second phandle is the Wake-on-LAN clock. +- clock-names: When provided, names of the functional clock phandles, first + name should be "sw_sysport" and second should be "sw_sysportwol". Example: ethernet@f04a0000 { -- cgit v1.2.3 From e489aea7a6557350a2db0312ed8b89cc26b9744c Mon Sep 17 00:00:00 2001 From: Florian Fainelli Date: Tue, 1 Sep 2020 15:59:11 -0700 Subject: dt-bindings: net: Document Broadcom SF2 switch clocks Describe the two possible clocks feeding into the Broadcom SF2 integrated Ethernet switch. BCM7445 systems have two clocks, one for the main switch core clock, and another for controlling the switch clock divider whereas BCM7278 systems only have the first kind. Signed-off-by: Florian Fainelli Reviewed-by: Andrew Lunn Signed-off-by: David S. Miller --- Documentation/devicetree/bindings/net/brcm,bcm7445-switch-v4.0.txt | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/net/brcm,bcm7445-switch-v4.0.txt b/Documentation/devicetree/bindings/net/brcm,bcm7445-switch-v4.0.txt index 88b57b0ca1f4..97ca62b0e14d 100644 --- a/Documentation/devicetree/bindings/net/brcm,bcm7445-switch-v4.0.txt +++ b/Documentation/devicetree/bindings/net/brcm,bcm7445-switch-v4.0.txt @@ -50,6 +50,13 @@ Optional properties: - reset-names: If the "reset" property is specified, this property should have the value "switch" to denote the switch reset line. +- clocks: when provided, the first phandle is to the switch's main clock and + is valid for both BCM7445 and BCM7278. The second phandle is only applicable + to BCM7445 and is to support dividing the switch core clock. + +- clock-names: when provided, the first phandle must be "sw_switch", and the + second must be named "sw_switch_mdiv". + Port subnodes: Optional properties: -- cgit v1.2.3 From 1bd3fe23ffcab2e271416282fa34a17a7c694c19 Mon Sep 17 00:00:00 2001 From: Andreas Kemnade Date: Wed, 26 Aug 2020 22:42:50 +0200 Subject: dt-bindings: arm: fsl: add compatible string for Tolino Shine 2 HD This adds a compatible string for the Tolino Shine 2 HD eBook reader. Signed-off-by: Andreas Kemnade Acked-by: Rob Herring Signed-off-by: Shawn Guo --- Documentation/devicetree/bindings/arm/fsl.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml index 37cef8653541..685d39f625f9 100644 --- a/Documentation/devicetree/bindings/arm/fsl.yaml +++ b/Documentation/devicetree/bindings/arm/fsl.yaml @@ -216,6 +216,7 @@ properties: items: - enum: - fsl,imx6sl-evk # i.MX6 SoloLite EVK Board + - kobo,tolino-shine2hd - kobo,tolino-shine3 - const: fsl,imx6sl -- cgit v1.2.3 From 612a392fc04eed6b7ed1752f706fb40c6ad0bbb0 Mon Sep 17 00:00:00 2001 From: Jacky Bai Date: Mon, 31 Aug 2020 17:14:12 +0800 Subject: dt-bindings: arm: fsl: Add imx8mm ddr4 evk board Add entry for i.MX8MM DDR4 EVK board and update the comments for imx8mm-evk as it is populated with LPDDR4. Signed-off-by: Jacky Bai Acked-by: Rob Herring Signed-off-by: Shawn Guo --- Documentation/devicetree/bindings/arm/fsl.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml index 685d39f625f9..71acf14da715 100644 --- a/Documentation/devicetree/bindings/arm/fsl.yaml +++ b/Documentation/devicetree/bindings/arm/fsl.yaml @@ -347,6 +347,7 @@ properties: items: - enum: - beacon,imx8mm-beacon-kit # i.MX8MM Beacon Development Kit + - fsl,imx8mm-ddr4-evk # i.MX8MM DDR4 EVK Board - fsl,imx8mm-evk # i.MX8MM EVK Board - variscite,var-som-mx8mm # i.MX8MM Variscite VAR-SOM-MX8MM module - const: fsl,imx8mm -- cgit v1.2.3 From 541b6e6ee7a475538c5d6b0b6ad74752d10e3064 Mon Sep 17 00:00:00 2001 From: Florian Fainelli Date: Fri, 17 Apr 2020 17:11:46 -0700 Subject: dt-bindings: bus: Document breakpoint interrupt for gisb-arb The GISB arbiter can have a third and optional interrupt to handle GISB breakpoints. Signed-off-by: Florian Fainelli --- Documentation/devicetree/bindings/bus/brcm,gisb-arb.txt | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/bus/brcm,gisb-arb.txt b/Documentation/devicetree/bindings/bus/brcm,gisb-arb.txt index 729def62f0c5..10f6d0a8159d 100644 --- a/Documentation/devicetree/bindings/bus/brcm,gisb-arb.txt +++ b/Documentation/devicetree/bindings/bus/brcm,gisb-arb.txt @@ -10,7 +10,8 @@ Required properties: "brcm,bcm7038-gisb-arb" for 130nm chips - reg: specifies the base physical address and size of the registers - interrupts: specifies the two interrupts (timeout and TEA) to be used from - the parent interrupt controller + the parent interrupt controller. A third optional interrupt may be specified + for breakpoints. Optional properties: -- cgit v1.2.3 From 2de82ec8667465236e15f8c6af7cecf8da63fc60 Mon Sep 17 00:00:00 2001 From: Lad Prabhakar Date: Fri, 14 Aug 2020 18:30:33 +0100 Subject: dt-bindings: pci: rcar-pci-ep: Document r8a774a1 and r8a774b1 Document the support for R-Car PCIe EP on R8A774A1 and R8A774B1 SoC devices. Also constify "renesas,rcar-gen3-pcie-ep" so that it can be used as fallback compatible string for R-Car Gen3 and RZ/G2 devices as the PCIe module is identical. Link: https://lore.kernel.org/r/20200814173037.17822-2-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Lad Prabhakar Signed-off-by: Lorenzo Pieralisi Reviewed-by: Biju Das Reviewed-by: Geert Uytterhoeven Reviewed-by: Yoshihiro Shimoda Reviewed-by: Rob Herring --- Documentation/devicetree/bindings/pci/rcar-pci-ep.yaml | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/pci/rcar-pci-ep.yaml b/Documentation/devicetree/bindings/pci/rcar-pci-ep.yaml index aa483c7f27fd..70c45f72ab20 100644 --- a/Documentation/devicetree/bindings/pci/rcar-pci-ep.yaml +++ b/Documentation/devicetree/bindings/pci/rcar-pci-ep.yaml @@ -14,8 +14,11 @@ maintainers: properties: compatible: items: - - const: renesas,r8a774c0-pcie-ep - - const: renesas,rcar-gen3-pcie-ep + - enum: + - renesas,r8a774a1-pcie-ep # RZ/G2M + - renesas,r8a774b1-pcie-ep # RZ/G2N + - renesas,r8a774c0-pcie-ep # RZ/G2E + - const: renesas,rcar-gen3-pcie-ep # R-Car Gen3 and RZ/G2 reg: maxItems: 5 -- cgit v1.2.3 From 5e94083c781445b4b5c00689167558dce694da65 Mon Sep 17 00:00:00 2001 From: Lad Prabhakar Date: Fri, 4 Sep 2020 11:38:49 +0100 Subject: dt-bindings: pci: rcar-pci-ep: Document r8a774e1 Document the support for R-Car PCIe EP on R8A774E1 SoC device. Link: https://lore.kernel.org/r/20200904103851.3946-2-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Lad Prabhakar Signed-off-by: Lorenzo Pieralisi Reviewed-by: Biju Das Reviewed-by: Geert Uytterhoeven --- Documentation/devicetree/bindings/pci/rcar-pci-ep.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/pci/rcar-pci-ep.yaml b/Documentation/devicetree/bindings/pci/rcar-pci-ep.yaml index 70c45f72ab20..a059c96c294b 100644 --- a/Documentation/devicetree/bindings/pci/rcar-pci-ep.yaml +++ b/Documentation/devicetree/bindings/pci/rcar-pci-ep.yaml @@ -18,6 +18,7 @@ properties: - renesas,r8a774a1-pcie-ep # RZ/G2M - renesas,r8a774b1-pcie-ep # RZ/G2N - renesas,r8a774c0-pcie-ep # RZ/G2E + - renesas,r8a774e1-pcie-ep # RZ/G2H - const: renesas,rcar-gen3-pcie-ep # R-Car Gen3 and RZ/G2 reg: -- cgit v1.2.3 From d16d538ff49145b153976bd8e124116d369db266 Mon Sep 17 00:00:00 2001 From: Lad Prabhakar Date: Mon, 10 Aug 2020 18:41:55 +0100 Subject: dt-bindings: PCI: rcar: Add device tree support for r8a7742 Add support for r8a7742. The Renesas RZ/G1H (R8A7742) PCIe controller is identical to the R-Car Gen2 family. Link: https://lore.kernel.org/r/20200810174156.30880-2-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Lad Prabhakar Signed-off-by: Lorenzo Pieralisi Reviewed-by: Chris Paterson Reviewed-by: Geert Uytterhoeven Reviewed-by: Yoshihiro Shimoda Acked-by: Rob Herring --- Documentation/devicetree/bindings/pci/rcar-pci.txt | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/pci/rcar-pci.txt b/Documentation/devicetree/bindings/pci/rcar-pci.txt index 1041c44a614f..14d307deff06 100644 --- a/Documentation/devicetree/bindings/pci/rcar-pci.txt +++ b/Documentation/devicetree/bindings/pci/rcar-pci.txt @@ -1,7 +1,8 @@ * Renesas R-Car PCIe interface Required properties: -compatible: "renesas,pcie-r8a7743" for the R8A7743 SoC; +compatible: "renesas,pcie-r8a7742" for the R8A7742 SoC; + "renesas,pcie-r8a7743" for the R8A7743 SoC; "renesas,pcie-r8a7744" for the R8A7744 SoC; "renesas,pcie-r8a774a1" for the R8A774A1 SoC; "renesas,pcie-r8a774b1" for the R8A774B1 SoC; -- cgit v1.2.3 From 8f1553694551f36441e6c4e66e4ccc24ae891994 Mon Sep 17 00:00:00 2001 From: Rakesh Pillai Date: Fri, 26 Jun 2020 23:31:41 +0530 Subject: dt: bindings: Add new regulator as optional property for WCN3990 Add an additional regulator supply as an optional property for WCN3990. Tested-on: WCN3990 hw1.0 SNOC WLAN.HL.3.1-01040-QCAHLSWMTPLZ-1 Signed-off-by: Rakesh Pillai Reviewed-by: Douglas Anderson Acked-by: Rob Herring Signed-off-by: Kalle Valo Link: https://lore.kernel.org/r/1593194502-13164-2-git-send-email-pillair@codeaurora.org --- Documentation/devicetree/bindings/net/wireless/qcom,ath10k.txt | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/net/wireless/qcom,ath10k.txt b/Documentation/devicetree/bindings/net/wireless/qcom,ath10k.txt index 65ee68efd574..b61c2d5a0ff7 100644 --- a/Documentation/devicetree/bindings/net/wireless/qcom,ath10k.txt +++ b/Documentation/devicetree/bindings/net/wireless/qcom,ath10k.txt @@ -65,7 +65,8 @@ Optional properties: the length can vary between hw versions. - -supply: handle to the regulator device tree node optional "supply-name" are "vdd-0.8-cx-mx", - "vdd-1.8-xo", "vdd-1.3-rfa" and "vdd-3.3-ch0". + "vdd-1.8-xo", "vdd-1.3-rfa", "vdd-3.3-ch0", + and "vdd-3.3-ch1". - memory-region: Usage: optional Value type: @@ -204,6 +205,7 @@ wifi@18000000 { vdd-1.8-xo-supply = <&vreg_l7a_1p8>; vdd-1.3-rfa-supply = <&vreg_l17a_1p3>; vdd-3.3-ch0-supply = <&vreg_l25a_3p3>; + vdd-3.3-ch1-supply = <&vreg_l26a_3p3>; memory-region = <&wifi_msa_mem>; iommus = <&apps_smmu 0x0040 0x1>; qcom,msa-fixed-perm; -- cgit v1.2.3 From e6277308ac214af04516564c516a0ff5f753d009 Mon Sep 17 00:00:00 2001 From: Wolfram Sang Date: Wed, 1 Jul 2020 23:48:30 +0200 Subject: i2c: add binding to mark a bus as SMBus SMBus is largely compatible with I2C but there are some specifics. In case we need them on a bus, we can now use this new binding. Signed-off-by: Wolfram Sang Signed-off-by: Wolfram Sang --- Documentation/devicetree/bindings/i2c/i2c.txt | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/i2c/i2c.txt b/Documentation/devicetree/bindings/i2c/i2c.txt index a21c359b9f02..df41f72afc87 100644 --- a/Documentation/devicetree/bindings/i2c/i2c.txt +++ b/Documentation/devicetree/bindings/i2c/i2c.txt @@ -87,6 +87,11 @@ wants to support one of the below features, it should adapt these bindings. this information to detect a stalled bus more reliably, for example. Can not be combined with 'multi-master'. +- smbus + states that additional SMBus restrictions and features apply to this bus. + Examples of features are SMBusHostNotify and SMBusAlert. Examples of + restrictions are more reserved addresses and timeout definitions. + Required properties (per child device) -------------------------------------- -- cgit v1.2.3 From 83ab016dfac377d1edc3698fb5179196f4f71f02 Mon Sep 17 00:00:00 2001 From: Fabien Parent Date: Sun, 6 Sep 2020 20:09:37 +0200 Subject: dt-bindings: memory: mediatek: Add binding for MT8167 SMI Add device tree bindings documentation for MT8167 SMI. Signed-off-by: Fabien Parent Link: https://lore.kernel.org/r/20200906180938.1117526-1-fparent@baylibre.com Signed-off-by: Krzysztof Kozlowski --- .../devicetree/bindings/memory-controllers/mediatek,smi-common.txt | 3 ++- .../devicetree/bindings/memory-controllers/mediatek,smi-larb.txt | 3 ++- 2 files changed, 4 insertions(+), 2 deletions(-) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-common.txt b/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-common.txt index b64573680b42..dbafffe3f41e 100644 --- a/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-common.txt +++ b/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-common.txt @@ -5,7 +5,7 @@ The hardware block diagram please check bindings/iommu/mediatek,iommu.txt Mediatek SMI have two generations of HW architecture, here is the list which generation the SoCs use: generation 1: mt2701 and mt7623. -generation 2: mt2712, mt6779, mt8173 and mt8183. +generation 2: mt2712, mt6779, mt8167, mt8173 and mt8183. There's slight differences between the two SMI, for generation 2, the register which control the iommu port is at each larb's register base. But @@ -20,6 +20,7 @@ Required properties: "mediatek,mt2712-smi-common" "mediatek,mt6779-smi-common" "mediatek,mt7623-smi-common", "mediatek,mt2701-smi-common" + "mediatek,mt8167-smi-common" "mediatek,mt8173-smi-common" "mediatek,mt8183-smi-common" - reg : the register and size of the SMI block. diff --git a/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.txt b/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.txt index 8f19dfe7d80e..0c5de12b5496 100644 --- a/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.txt +++ b/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.txt @@ -8,6 +8,7 @@ Required properties: "mediatek,mt2712-smi-larb" "mediatek,mt6779-smi-larb" "mediatek,mt7623-smi-larb", "mediatek,mt2701-smi-larb" + "mediatek,mt8167-smi-larb" "mediatek,mt8173-smi-larb" "mediatek,mt8183-smi-larb" - reg : the register and size of this local arbiter. @@ -22,7 +23,7 @@ Required properties: - "gals": the clock for GALS(Global Async Local Sync). Here is the list which has this GALS: mt8183. -Required property for mt2701, mt2712, mt6779 and mt7623: +Required property for mt2701, mt2712, mt6779, mt7623 and mt8167: - mediatek,larb-id :the hardware id of this larb. Example: -- cgit v1.2.3 From ad1edcdf477d4e7228d87018ed27d8f7012f6a84 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Mon, 7 Sep 2020 18:11:17 +0200 Subject: dt-bindings: samsung: pmu: document S5Pv210 Add compatible for the Samsung S5Pv210 SoC PMU. Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20200907161141.31034-2-krzk@kernel.org --- Documentation/devicetree/bindings/arm/samsung/pmu.yaml | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/arm/samsung/pmu.yaml b/Documentation/devicetree/bindings/arm/samsung/pmu.yaml index 686c13c14e32..f67c8851530e 100644 --- a/Documentation/devicetree/bindings/arm/samsung/pmu.yaml +++ b/Documentation/devicetree/bindings/arm/samsung/pmu.yaml @@ -24,6 +24,7 @@ select: - samsung,exynos5420-pmu - samsung,exynos5433-pmu - samsung,exynos7-pmu + - samsung-s5pv210-pmu required: - compatible @@ -40,6 +41,7 @@ properties: - samsung,exynos5420-pmu - samsung,exynos5433-pmu - samsung,exynos7-pmu + - samsung-s5pv210-pmu - const: syscon reg: -- cgit v1.2.3 From 84475a9e048fc9937e2fd19bb2db873a76d17d19 Mon Sep 17 00:00:00 2001 From: Marco Felsch Date: Wed, 9 Sep 2020 15:44:59 +0200 Subject: dt-bindings: net: phy: smsc: document reference clock Add support to specify the reference clock for the phy. Signed-off-by: Marco Felsch Reviewed-by: Florian Fainelli Signed-off-by: David S. Miller --- Documentation/devicetree/bindings/net/smsc-lan87xx.txt | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/net/smsc-lan87xx.txt b/Documentation/devicetree/bindings/net/smsc-lan87xx.txt index 8b7c719b0bb9..a8d0dc9a8c0e 100644 --- a/Documentation/devicetree/bindings/net/smsc-lan87xx.txt +++ b/Documentation/devicetree/bindings/net/smsc-lan87xx.txt @@ -5,6 +5,10 @@ through an Ethernet OF device node. Optional properties: +- clocks: + The clock used as phy reference clock and is connected to phy + pin XTAL1/CLKIN. + - smsc,disable-energy-detect: If set, do not enable energy detect mode for the SMSC phy. default: enable energy detect mode -- cgit v1.2.3 From 152a1b4c3e7c16fe8ea9a3171fcb29c5ce030ebb Mon Sep 17 00:00:00 2001 From: Manivannan Sadhasivam Date: Fri, 4 Sep 2020 12:06:32 +0530 Subject: dt-bindings: arm: qcom: Document SM8250 SoC and boards Document the SM8250 SoC binding and also the boards using it. Signed-off-by: Manivannan Sadhasivam Link: https://lore.kernel.org/r/20200904063637.28632-2-manivannan.sadhasivam@linaro.org Signed-off-by: Bjorn Andersson --- Documentation/devicetree/bindings/arm/qcom.yaml | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml index 6031aee0f5a8..1adc8a33a3e4 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -40,6 +40,7 @@ description: | sdm630 sdm660 sdm845 + sm8250 The 'board' element must be one of the following strings: @@ -165,4 +166,10 @@ properties: - qcom,ipq6018-cp01-c1 - const: qcom,ipq6018 + - items: + - enum: + - qcom,qrb5165-rb5 + - qcom,sm8250-mtp + - const: qcom,sm8250 + ... -- cgit v1.2.3 From 3cc006b395e267b03d42758d6c7c1d03ed7c78d0 Mon Sep 17 00:00:00 2001 From: Yoshihiro Shimoda Date: Mon, 7 Sep 2020 18:19:37 +0900 Subject: dt-bindings: arm: renesas: Document R-Car V3U SoC DT bindings Add device tree bindings documentation for Renesas R-Car V3U (r8a779a0). Signed-off-by: Yoshihiro Shimoda Link: https://lore.kernel.org/r/1599470390-29719-2-git-send-email-yoshihiro.shimoda.uh@renesas.com Signed-off-by: Geert Uytterhoeven --- Documentation/devicetree/bindings/arm/renesas.yaml | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/arm/renesas.yaml b/Documentation/devicetree/bindings/arm/renesas.yaml index 0d4dabb4a164..9f8c33537fc5 100644 --- a/Documentation/devicetree/bindings/arm/renesas.yaml +++ b/Documentation/devicetree/bindings/arm/renesas.yaml @@ -281,6 +281,10 @@ properties: - renesas,draak # Draak (RTP0RC77995SEB0010S) - const: renesas,r8a77995 + - description: R-Car V3U (R8A779A0) + items: + - const: renesas,r8a779a0 + - description: RZ/N1D (R9A06G032) items: - enum: -- cgit v1.2.3 From 2e95492de6d9a289a7c246d8c2f66fc2b53b2b00 Mon Sep 17 00:00:00 2001 From: Yoshihiro Shimoda Date: Mon, 7 Sep 2020 18:19:39 +0900 Subject: dt-bindings: power: renesas,rcar-sysc: Document r8a779a0 SYSC bindings Document bindings for the R-Car V3U (aka R8A779A0) SYSC block. Signed-off-by: Yoshihiro Shimoda Link: https://lore.kernel.org/r/1599470390-29719-4-git-send-email-yoshihiro.shimoda.uh@renesas.com Signed-off-by: Geert Uytterhoeven --- Documentation/devicetree/bindings/power/renesas,rcar-sysc.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/power/renesas,rcar-sysc.yaml b/Documentation/devicetree/bindings/power/renesas,rcar-sysc.yaml index ec2aaeee78dc..99e8042ac111 100644 --- a/Documentation/devicetree/bindings/power/renesas,rcar-sysc.yaml +++ b/Documentation/devicetree/bindings/power/renesas,rcar-sysc.yaml @@ -40,6 +40,7 @@ properties: - renesas,r8a77980-sysc # R-Car V3H - renesas,r8a77990-sysc # R-Car E3 - renesas,r8a77995-sysc # R-Car D3 + - renesas,r8a779a0-sysc # R-Car V3U reg: maxItems: 1 -- cgit v1.2.3 From 461cb5952e35255265df64020344ceaf3d888263 Mon Sep 17 00:00:00 2001 From: Yoshihiro Shimoda Date: Mon, 7 Sep 2020 18:19:41 +0900 Subject: dt-bindings: reset: renesas,rst: Document r8a779a0 reset module Document bindings for the R-Car V3U (R8A779A0) reset module. Signed-off-by: Yoshihiro Shimoda Link: https://lore.kernel.org/r/1599470390-29719-6-git-send-email-yoshihiro.shimoda.uh@renesas.com Signed-off-by: Geert Uytterhoeven --- Documentation/devicetree/bindings/reset/renesas,rst.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/reset/renesas,rst.yaml b/Documentation/devicetree/bindings/reset/renesas,rst.yaml index 2849ce45703c..620cd0538bbe 100644 --- a/Documentation/devicetree/bindings/reset/renesas,rst.yaml +++ b/Documentation/devicetree/bindings/reset/renesas,rst.yaml @@ -47,6 +47,7 @@ properties: - renesas,r8a77980-rst # R-Car V3H - renesas,r8a77990-rst # R-Car E3 - renesas,r8a77995-rst # R-Car D3 + - renesas,r8a779a0-rst # R-Car V3U reg: maxItems: 1 -- cgit v1.2.3 From b08892556b3f19d95d356b33692247de8303fe05 Mon Sep 17 00:00:00 2001 From: Yoshihiro Shimoda Date: Thu, 10 Sep 2020 21:02:49 +0900 Subject: dt-bindings: arm: renesas: Document Renesas Falcon boards Add device tree bindings documentation for Renesas R-Car V3U Falcon CPU and BreakOut boards. Signed-off-by: Yoshihiro Shimoda Link: https://lore.kernel.org/r/1599739372-30669-2-git-send-email-yoshihiro.shimoda.uh@renesas.com Signed-off-by: Geert Uytterhoeven --- Documentation/devicetree/bindings/arm/renesas.yaml | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/arm/renesas.yaml b/Documentation/devicetree/bindings/arm/renesas.yaml index 9f8c33537fc5..01a6d0c571ad 100644 --- a/Documentation/devicetree/bindings/arm/renesas.yaml +++ b/Documentation/devicetree/bindings/arm/renesas.yaml @@ -283,6 +283,14 @@ properties: - description: R-Car V3U (R8A779A0) items: + - enum: + - renesas,falcon-cpu # Falcon CPU board (RTP0RC779A0CPB0010S) + - const: renesas,r8a779a0 + + - items: + - enum: + - renesas,falcon-breakout # Falcon BreakOut board (RTP0RC779A0BOB0010S) + - const: renesas,falcon-cpu - const: renesas,r8a779a0 - description: RZ/N1D (R9A06G032) -- cgit v1.2.3 From 07d20a643084f5cc96370c2490a07a517877dc0a Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 10 Sep 2020 18:12:12 +0200 Subject: dt-bindings: net: nfc: s3fwrn5: Convert to dtschema Convert the Samsung S3FWRN5 NCI NFC controller bindings to dtschema. This is conversion only so it includes properties with invalid prefixes (s3fwrn5,en-gpios) which should be addressed later. Signed-off-by: Krzysztof Kozlowski Signed-off-by: David S. Miller --- .../devicetree/bindings/net/nfc/s3fwrn5.txt | 25 --------- .../bindings/net/nfc/samsung,s3fwrn5.yaml | 61 ++++++++++++++++++++++ MAINTAINERS | 1 + 3 files changed, 62 insertions(+), 25 deletions(-) delete mode 100644 Documentation/devicetree/bindings/net/nfc/s3fwrn5.txt create mode 100644 Documentation/devicetree/bindings/net/nfc/samsung,s3fwrn5.yaml (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/net/nfc/s3fwrn5.txt b/Documentation/devicetree/bindings/net/nfc/s3fwrn5.txt deleted file mode 100644 index f02f6fb7f81c..000000000000 --- a/Documentation/devicetree/bindings/net/nfc/s3fwrn5.txt +++ /dev/null @@ -1,25 +0,0 @@ -* Samsung S3FWRN5 NCI NFC Controller - -Required properties: -- compatible: Should be "samsung,s3fwrn5-i2c". -- reg: address on the bus -- interrupts: GPIO interrupt to which the chip is connected -- s3fwrn5,en-gpios: Output GPIO pin used for enabling/disabling the chip -- s3fwrn5,fw-gpios: Output GPIO pin used to enter firmware mode and - sleep/wakeup control - -Example: - -&hsi2c_4 { - s3fwrn5@27 { - compatible = "samsung,s3fwrn5-i2c"; - - reg = <0x27>; - - interrupt-parent = <&gpa1>; - interrupts = <3 0 0>; - - s3fwrn5,en-gpios = <&gpf1 4 0>; - s3fwrn5,fw-gpios = <&gpj0 2 0>; - }; -}; diff --git a/Documentation/devicetree/bindings/net/nfc/samsung,s3fwrn5.yaml b/Documentation/devicetree/bindings/net/nfc/samsung,s3fwrn5.yaml new file mode 100644 index 000000000000..f43d31a2d94b --- /dev/null +++ b/Documentation/devicetree/bindings/net/nfc/samsung,s3fwrn5.yaml @@ -0,0 +1,61 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/nfc/samsung,s3fwrn5.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Samsung S3FWRN5 NCI NFC Controller + +maintainers: + - Krzysztof Kozlowski + - Krzysztof Opasiak + +properties: + compatible: + const: samsung,s3fwrn5-i2c + + interrupts: + maxItems: 1 + + reg: + maxItems: 1 + + s3fwrn5,en-gpios: + maxItems: 1 + description: + Output GPIO pin used for enabling/disabling the chip + + s3fwrn5,fw-gpios: + maxItems: 1 + description: + Output GPIO pin used to enter firmware mode and sleep/wakeup control + +additionalProperties: false + +required: + - compatible + - interrupts + - reg + - s3fwrn5,en-gpios + - s3fwrn5,fw-gpios + +examples: + - | + #include + #include + + i2c4 { + #address-cells = <1>; + #size-cells = <0>; + + s3fwrn5@27 { + compatible = "samsung,s3fwrn5-i2c"; + reg = <0x27>; + + interrupt-parent = <&gpa1>; + interrupts = <3 IRQ_TYPE_LEVEL_HIGH>; + + s3fwrn5,en-gpios = <&gpf1 4 GPIO_ACTIVE_HIGH>; + s3fwrn5,fw-gpios = <&gpj0 2 GPIO_ACTIVE_HIGH>; + }; + }; diff --git a/MAINTAINERS b/MAINTAINERS index 9a545a631f0d..8a21d28cb878 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -15296,6 +15296,7 @@ M: Robert Baldyga M: Krzysztof Opasiak L: linux-nfc@lists.01.org (moderated for non-subscribers) S: Supported +F: Documentation/devicetree/bindings/net/nfc/samsung,s3fwrn5.yaml F: drivers/nfc/s3fwrn5 SAMSUNG S5C73M3 CAMERA DRIVER -- cgit v1.2.3 From 3a9f89aaee2b42c1ad1bfef69dddf791f781812a Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 10 Sep 2020 18:12:13 +0200 Subject: dt-bindings: net: nfc: s3fwrn5: Remove wrong vendor prefix from GPIOs The device tree property prefix describes the vendor, which in case of S3FWRN5 chip is Samsung. Therefore the "s3fwrn5" prefix for "en-gpios" and "fw-gpios" is not correct and should be deprecated. Introduce properly named properties for these GPIOs and rename the fw-gpios" to "wake-gpios" to better describe its purpose. Signed-off-by: Krzysztof Kozlowski Signed-off-by: David S. Miller --- .../bindings/net/nfc/samsung,s3fwrn5.yaml | 24 ++++++++++++++++------ 1 file changed, 18 insertions(+), 6 deletions(-) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/net/nfc/samsung,s3fwrn5.yaml b/Documentation/devicetree/bindings/net/nfc/samsung,s3fwrn5.yaml index f43d31a2d94b..cb0b8a560282 100644 --- a/Documentation/devicetree/bindings/net/nfc/samsung,s3fwrn5.yaml +++ b/Documentation/devicetree/bindings/net/nfc/samsung,s3fwrn5.yaml @@ -14,30 +14,42 @@ properties: compatible: const: samsung,s3fwrn5-i2c + en-gpios: + maxItems: 1 + description: + Output GPIO pin used for enabling/disabling the chip + interrupts: maxItems: 1 reg: maxItems: 1 + wake-gpios: + maxItems: 1 + description: + Output GPIO pin used to enter firmware mode and sleep/wakeup control + s3fwrn5,en-gpios: maxItems: 1 + deprecated: true description: - Output GPIO pin used for enabling/disabling the chip + Use en-gpios s3fwrn5,fw-gpios: maxItems: 1 + deprecated: true description: - Output GPIO pin used to enter firmware mode and sleep/wakeup control + Use wake-gpios additionalProperties: false required: - compatible + - en-gpios - interrupts - reg - - s3fwrn5,en-gpios - - s3fwrn5,fw-gpios + - wake-gpios examples: - | @@ -55,7 +67,7 @@ examples: interrupt-parent = <&gpa1>; interrupts = <3 IRQ_TYPE_LEVEL_HIGH>; - s3fwrn5,en-gpios = <&gpf1 4 GPIO_ACTIVE_HIGH>; - s3fwrn5,fw-gpios = <&gpj0 2 GPIO_ACTIVE_HIGH>; + en-gpios = <&gpf1 4 GPIO_ACTIVE_HIGH>; + wake-gpios = <&gpj0 2 GPIO_ACTIVE_HIGH>; }; }; -- cgit v1.2.3 From 7b5bd15d23c5690bf93a06dd2d4a2d0d137ef1f5 Mon Sep 17 00:00:00 2001 From: Anilkumar Kolli Date: Tue, 8 Sep 2020 07:55:31 +0000 Subject: dt: bindings: net: update compatible for ath11k Add IPQ6018 wireless driver support, its based on ath11k driver. Signed-off-by: Anilkumar Kolli Reviewed-by: Rob Herring Signed-off-by: Kalle Valo Link: https://lore.kernel.org/r/010101746cb6751a-ca300933-1174-4534-a01b-b1dbf1c1f305-000000@us-west-2.amazonses.com --- Documentation/devicetree/bindings/net/wireless/qcom,ath11k.yaml | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/net/wireless/qcom,ath11k.yaml b/Documentation/devicetree/bindings/net/wireless/qcom,ath11k.yaml index a1717db36dba..4b365c9d9378 100644 --- a/Documentation/devicetree/bindings/net/wireless/qcom,ath11k.yaml +++ b/Documentation/devicetree/bindings/net/wireless/qcom,ath11k.yaml @@ -17,7 +17,9 @@ description: | properties: compatible: - const: qcom,ipq8074-wifi + enum: + - qcom,ipq8074-wifi + - qcom,ipq6018-wifi reg: maxItems: 1 -- cgit v1.2.3 From aee123f48f387ea62002cddb46c7cb04c96628df Mon Sep 17 00:00:00 2001 From: Grygorii Strashko Date: Fri, 11 Sep 2020 21:30:23 -0700 Subject: bindings: soc: ti: soc: ringacc: remove ti,dma-ring-reset-quirk Remove "ti,dma-ring-reset-quirk" DT property as proper w/a handling is implemented now in Ringacc driver using SoC info. Signed-off-by: Grygorii Strashko Signed-off-by: Santosh Shilimkar --- Documentation/devicetree/bindings/soc/ti/k3-ringacc.yaml | 6 ------ 1 file changed, 6 deletions(-) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/soc/ti/k3-ringacc.yaml b/Documentation/devicetree/bindings/soc/ti/k3-ringacc.yaml index ae33fc957141..c3c595e235a8 100644 --- a/Documentation/devicetree/bindings/soc/ti/k3-ringacc.yaml +++ b/Documentation/devicetree/bindings/soc/ti/k3-ringacc.yaml @@ -62,11 +62,6 @@ properties: $ref: /schemas/types.yaml#/definitions/uint32 description: TI-SCI device id of the ring accelerator - ti,dma-ring-reset-quirk: - $ref: /schemas/types.yaml#definitions/flag - description: | - enable ringacc/udma ring state interoperability issue software w/a - required: - compatible - reg @@ -94,7 +89,6 @@ examples: reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target"; ti,num-rings = <818>; ti,sci-rm-range-gp-rings = <0x2>; /* GP ring range */ - ti,dma-ring-reset-quirk; ti,sci = <&dmsc>; ti,sci-dev-id = <187>; msi-parent = <&inta_main_udmass>; -- cgit v1.2.3 From bd691ce0ba9d610018072723307f5983f94f5322 Mon Sep 17 00:00:00 2001 From: Grzegorz Jaszczyk Date: Fri, 11 Sep 2020 21:41:17 -0700 Subject: dt-bindings: soc: ti: Add TI PRUSS bindings This patch adds the bindings for the Programmable Real-Time Unit and Industrial Communication Subsystem (PRU-ICSS) present on various TI SoCs. The IP is present on multiple TI SoC architecture families including the OMAP architecture SoCs such as AM33xx, AM437x and AM57xx; and on a Keystone 2 architecture based 66AK2G SoC. It is also present on the Davinci based OMAPL138 SoCs and K3 architecture based AM65x and J721E SoCs as well. The IP has a number of sub-modules some of which are represented as their own devices. This binding covers only the top-level sub-system devices, and some sub-modules like MDIO, MII_RT (Ethernet MII_RT module with MII ports) and IEP (Industrial Ethernet Peripheral). The remaining sub-modules bindings shall be defined in the respective driver subsystem bindings folders. Couple of full examples have also been added demonstrating the devices on AM335x and AM437x SoCs. Reviewed-by: Rob Herring Signed-off-by: Suman Anna Signed-off-by: Roger Quadros Signed-off-by: Grzegorz Jaszczyk Signed-off-by: Santosh Shilimkar --- .../devicetree/bindings/soc/ti/ti,pruss.yaml | 320 +++++++++++++++++++++ 1 file changed, 320 insertions(+) create mode 100644 Documentation/devicetree/bindings/soc/ti/ti,pruss.yaml (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/soc/ti/ti,pruss.yaml b/Documentation/devicetree/bindings/soc/ti/ti,pruss.yaml new file mode 100644 index 000000000000..482beefaac1f --- /dev/null +++ b/Documentation/devicetree/bindings/soc/ti/ti,pruss.yaml @@ -0,0 +1,320 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/soc/ti/ti,pruss.yaml +$schema: http://devicetree.org/meta-schemas/core.yaml + +title: |+ + TI Programmable Real-Time Unit and Industrial Communication Subsystem + +maintainers: + - Suman Anna + +description: |+ + + The Programmable Real-Time Unit and Industrial Communication Subsystem + (PRU-ICSS a.k.a. PRUSS) is present on various TI SoCs such as AM335x, AM437x, + Keystone 66AK2G, OMAP-L138/DA850 etc. A PRUSS consists of dual 32-bit RISC + cores (Programmable Real-Time Units, or PRUs), shared RAM, data and + instruction RAMs, some internal peripheral modules to facilitate industrial + communication, and an interrupt controller. + + The programmable nature of the PRUs provide flexibility to implement custom + peripheral interfaces, fast real-time responses, or specialized data handling. + The common peripheral modules include the following, + - an Ethernet MII_RT module with two MII ports + - an MDIO port to control external Ethernet PHYs + - an Industrial Ethernet Peripheral (IEP) to manage/generate Industrial + Ethernet functions + - an Enhanced Capture Module (eCAP) + - an Industrial Ethernet Timer with 7/9 capture and 16 compare events + - a 16550-compatible UART to support PROFIBUS + - Enhanced GPIO with async capture and serial support + + A PRU-ICSS subsystem can have up to three shared data memories. A PRU core + acts on a primary Data RAM (there are usually 2 Data RAMs) at its address + 0x0, but also has access to a secondary Data RAM (primary to the other PRU + core) at its address 0x2000. A shared Data RAM, if present, can be accessed + by both the PRU cores. The Interrupt Controller (INTC) and a CFG module are + common to both the PRU cores. Each PRU core also has a private instruction + RAM, and specific register spaces for Control and Debug functionalities. + + Various sub-modules within a PRU-ICSS subsystem are represented as individual + nodes and are defined using a parent-child hierarchy depending on their + integration within the IP and the SoC. These nodes are described in the + following sections. + + + PRU-ICSS Node + ============== + Each PRU-ICSS instance is represented as its own node with the individual PRU + processor cores, the memories node, an INTC node and an MDIO node represented + as child nodes within this PRUSS node. This node shall be a child of the + corresponding interconnect bus nodes or target-module nodes. + + See ../../mfd/syscon.yaml for generic SysCon binding details. + + +properties: + $nodename: + pattern: "^(pruss|icssg)@[0-9a-f]+$" + + compatible: + enum: + - ti,am3356-pruss # for AM335x SoC family + - ti,am4376-pruss0 # for AM437x SoC family and PRUSS unit 0 + - ti,am4376-pruss1 # for AM437x SoC family and PRUSS unit 1 + - ti,am5728-pruss # for AM57xx SoC family + - ti,k2g-pruss # for 66AK2G SoC family + - ti,am654-icssg # for K3 AM65x SoC family + - ti,j721e-icssg # for K3 J721E SoC family + + reg: + maxItems: 1 + + "#address-cells": + const: 1 + + "#size-cells": + const: 1 + + ranges: + maxItems: 1 + + power-domains: + description: | + This property is as per sci-pm-domain.txt. + +patternProperties: + + memories@[a-f0-9]+$: + description: | + The various Data RAMs within a single PRU-ICSS unit are represented as a + single node with the name 'memories'. + + type: object + + properties: + reg: + minItems: 2 # On AM437x one of two PRUSS units don't contain Shared RAM. + maxItems: 3 + items: + - description: Address and size of the Data RAM0. + - description: Address and size of the Data RAM1. + - description: | + Address and size of the Shared Data RAM. Note that on AM437x one + of two PRUSS units don't contain Shared RAM, while the second one + has it. + + reg-names: + minItems: 2 + maxItems: 3 + items: + - const: dram0 + - const: dram1 + - const: shrdram2 + + required: + - reg + - reg-names + + additionalProperties: false + + cfg@[a-f0-9]+$: + description: | + PRU-ICSS configuration space. CFG sub-module represented as a SysCon. + + type: object + + properties: + compatible: + items: + - const: ti,pruss-cfg + - const: syscon + + reg: + maxItems: 1 + + additionalProperties: false + + iep@[a-f0-9]+$: + description: | + Industrial Ethernet Peripheral to manage/generate Industrial Ethernet + functions such as time stamping. Each PRUSS has either 1 IEP (on AM335x, + AM437x, AM57xx & 66AK2G SoCs) or 2 IEPs (on K3 AM65x & J721E SoCs ). IEP + is used for creating PTP clocks and generating PPS signals. + + type: object + + mii-rt@[a-f0-9]+$: + description: | + Real-Time Ethernet to support multiple industrial communication protocols. + MII-RT sub-module represented as a SysCon. + + type: object + + properties: + compatible: + items: + - const: ti,pruss-mii + - const: syscon + + reg: + maxItems: 1 + + additionalProperties: false + + mii-g-rt@[a-f0-9]+$: + description: | + The Real-time Media Independent Interface to support multiple industrial + communication protocols (G stands for Gigabit). MII-G-RT sub-module + represented as a SysCon. + + type: object + + properties: + compatible: + items: + - const: ti,pruss-mii-g + - const: syscon + + reg: + maxItems: 1 + + additionalProperties: false + + interrupt-controller@[a-f0-9]+$: + description: | + PRUSS INTC Node. Each PRUSS has a single interrupt controller instance + that is common to all the PRU cores. This should be represented as an + interrupt-controller node. + + type: object + + mdio@[a-f0-9]+$: + description: | + MDIO Node. Each PRUSS has an MDIO module that can be used to control + external PHYs. The MDIO module used within the PRU-ICSS is an instance of + the MDIO Controller used in TI Davinci SoCs. + + allOf: + - $ref: /schemas/net/ti,davinci-mdio.yaml# + + type: object + + "^(pru|rtu|txpru)@[0-9a-f]+$": + description: | + PRU Node. Each PRUSS has dual PRU cores, each represented as a RemoteProc + device through a PRU child node each. Each node can optionally be rendered + inactive by using the standard DT string property, "status". The ICSSG IP + present on K3 SoCs have additional auxiliary PRU cores with slightly + different IP integration. + + type: object + +required: + - compatible + - reg + - ranges + +additionalProperties: false + +# Due to inability of correctly verifying sub-nodes with an @address through +# the "required" list, the required sub-nodes below are commented out for now. + +#required: +# - memories +# - interrupt-controller +# - pru + +if: + properties: + compatible: + contains: + enum: + - ti,k2g-pruss + - ti,am654-icssg + - ti,j721e-icssg +then: + required: + - power-domains + +examples: + - | + + /* Example 1 AM33xx PRU-ICSS */ + pruss: pruss@0 { + compatible = "ti,am3356-pruss"; + reg = <0x0 0x80000>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + pruss_mem: memories@0 { + reg = <0x0 0x2000>, + <0x2000 0x2000>, + <0x10000 0x3000>; + reg-names = "dram0", "dram1", "shrdram2"; + }; + + pruss_cfg: cfg@26000 { + compatible = "ti,pruss-cfg", "syscon"; + reg = <0x26000 0x2000>; + }; + + pruss_mii_rt: mii-rt@32000 { + compatible = "ti,pruss-mii", "syscon"; + reg = <0x32000 0x58>; + }; + + pruss_mdio: mdio@32400 { + compatible = "ti,davinci_mdio"; + reg = <0x32400 0x90>; + clocks = <&dpll_core_m4_ck>; + clock-names = "fck"; + bus_freq = <1000000>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + + - | + + /* Example 2 AM43xx PRU-ICSS with PRUSS1 node */ + #include + pruss1: pruss@0 { + compatible = "ti,am4376-pruss1"; + reg = <0x0 0x40000>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + pruss1_mem: memories@0 { + reg = <0x0 0x2000>, + <0x2000 0x2000>, + <0x10000 0x8000>; + reg-names = "dram0", "dram1", "shrdram2"; + }; + + pruss1_cfg: cfg@26000 { + compatible = "ti,pruss-cfg", "syscon"; + reg = <0x26000 0x2000>; + }; + + pruss1_mii_rt: mii-rt@32000 { + compatible = "ti,pruss-mii", "syscon"; + reg = <0x32000 0x58>; + }; + + pruss1_mdio: mdio@32400 { + compatible = "ti,davinci_mdio"; + reg = <0x32400 0x90>; + clocks = <&dpll_core_m4_ck>; + clock-names = "fck"; + bus_freq = <1000000>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + +... -- cgit v1.2.3 From 25bafac9408f67873f03909401deecfb16974d84 Mon Sep 17 00:00:00 2001 From: Grzegorz Jaszczyk Date: Fri, 11 Sep 2020 21:47:09 -0700 Subject: dt-bindings: soc: ti: Update TI PRUSS bindings regarding clock-muxes ICSS/ICSSG modules have an IEP clock mux that allow selection of internal IEP clock from 2 clock sources. ICSSG module has a CORE clock mux that allows selection of internal CORE clock from 2 clock sources. Add binding information for these 2 clock muxes. Signed-off-by: Grzegorz Jaszczyk Signed-off-by: Santosh Shilimkar --- .../devicetree/bindings/soc/ti/ti,pruss.yaml | 121 ++++++++++++++++++++- 1 file changed, 120 insertions(+), 1 deletion(-) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/soc/ti/ti,pruss.yaml b/Documentation/devicetree/bindings/soc/ti/ti,pruss.yaml index 482beefaac1f..cf7dc83f724f 100644 --- a/Documentation/devicetree/bindings/soc/ti/ti,pruss.yaml +++ b/Documentation/devicetree/bindings/soc/ti/ti,pruss.yaml @@ -132,10 +132,99 @@ patternProperties: - const: ti,pruss-cfg - const: syscon + "#address-cells": + const: 1 + + "#size-cells": + const: 1 + reg: maxItems: 1 - additionalProperties: false + ranges: + maxItems: 1 + + clocks: + type: object + + properties: + "#address-cells": + const: 1 + + "#size-cells": + const: 0 + + patternProperties: + coreclk-mux@[a-f0-9]+$: + description: | + This is applicable only for ICSSG (K3 SoCs). The ICSSG modules + core clock can be set to one of the 2 sources: ICSSG_CORE_CLK or + ICSSG_ICLK. This node models this clock mux and should have the + name "coreclk-mux". + + type: object + + properties: + '#clock-cells': + const: 0 + + clocks: + items: + - description: ICSSG_CORE Clock + - description: ICSSG_ICLK Clock + + assigned-clocks: + maxItems: 1 + + assigned-clock-parents: + maxItems: 1 + description: | + Standard assigned-clocks-parents definition used for selecting + mux parent (one of the mux input). + + reg: + maxItems: 1 + + required: + - clocks + + additionalProperties: false + + iepclk-mux@[a-f0-9]+$: + description: | + The IEP module can get its clock from 2 sources: ICSSG_IEP_CLK or + CORE_CLK (OCP_CLK in older SoCs). This node models this clock + mux and should have the name "iepclk-mux". + + type: object + + properties: + '#clock-cells': + const: 0 + + clocks: + items: + - description: ICSSG_IEP Clock + - description: Core Clock (OCP Clock in older SoCs) + + assigned-clocks: + maxItems: 1 + + assigned-clock-parents: + maxItems: 1 + description: | + Standard assigned-clocks-parents definition used for selecting + mux parent (one of the mux input). + + reg: + maxItems: 1 + + required: + - clocks + + additionalProperties: false + + additionalProperties: false iep@[a-f0-9]+$: description: | @@ -259,7 +348,22 @@ examples: pruss_cfg: cfg@26000 { compatible = "ti,pruss-cfg", "syscon"; + #address-cells = <1>; + #size-cells = <1>; reg = <0x26000 0x2000>; + ranges = <0x00 0x26000 0x2000>; + + clocks { + #address-cells = <1>; + #size-cells = <0>; + + pruss_iepclk_mux: iepclk-mux@30 { + reg = <0x30>; + #clock-cells = <0>; + clocks = <&l3_gclk>, /* icss_iep */ + <&pruss_ocp_gclk>; /* icss_ocp */ + }; + }; }; pruss_mii_rt: mii-rt@32000 { @@ -298,7 +402,22 @@ examples: pruss1_cfg: cfg@26000 { compatible = "ti,pruss-cfg", "syscon"; + #address-cells = <1>; + #size-cells = <1>; reg = <0x26000 0x2000>; + ranges = <0x00 0x26000 0x2000>; + + clocks { + #address-cells = <1>; + #size-cells = <0>; + + pruss1_iepclk_mux: iepclk-mux@30 { + reg = <0x30>; + #clock-cells = <0>; + clocks = <&sysclk_div>, /* icss_iep */ + <&pruss_ocp_gclk>; /* icss_ocp */ + }; + }; }; pruss1_mii_rt: mii-rt@32000 { -- cgit v1.2.3 From 5a8c1669f3de2181745b5e9bb9c6758dae301a04 Mon Sep 17 00:00:00 2001 From: Kathiravan T Date: Mon, 17 Aug 2020 12:48:39 +0530 Subject: dt-bindings: mailbox: add compatible for the IPQ6018 SoC Add the mailbox compatible for the IPQ6018 SoC. Acked-by: Rob Herring Signed-off-by: Kathiravan T Link: https://lore.kernel.org/r/1597648720-13649-2-git-send-email-kathirav@codeaurora.org Signed-off-by: Bjorn Andersson --- Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml b/Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml index 8f810fc5c183..ffd09b664ff5 100644 --- a/Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml +++ b/Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml @@ -16,6 +16,7 @@ maintainers: properties: compatible: enum: + - qcom,ipq6018-apcs-apps-global - qcom,ipq8074-apcs-apps-global - qcom,msm8916-apcs-kpss-global - qcom,msm8994-apcs-kpss-global -- cgit v1.2.3 From 5f854f096f1979865816a4f51d84e2a0f1095a0f Mon Sep 17 00:00:00 2001 From: Gokul Sriram Palanisamy Date: Thu, 6 Aug 2020 15:02:10 +0530 Subject: dt-bindings: qcom: Add ipq8074 bindings Document the new device-tree bindings for boards HK10-C1 and HK10-C2 based on ipq8074 SoC. Acked-by: Rob Herring Signed-off-by: Gokul Sriram Palanisamy Link: https://lore.kernel.org/r/1596706332-12957-2-git-send-email-gokulsri@codeaurora.org Signed-off-by: Bjorn Andersson --- Documentation/devicetree/bindings/arm/qcom.yaml | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml index 1adc8a33a3e4..e26b1845004f 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -48,6 +48,8 @@ description: | cp01-c1 dragonboard hk01 + hk10-c1 + hk10-c2 idp liquid mtp @@ -149,6 +151,8 @@ properties: - items: - enum: - qcom,ipq8074-hk01 + - qcom,ipq8074-hk10-c1 + - qcom,ipq8074-hk10-c2 - const: qcom,ipq8074 - items: -- cgit v1.2.3 From 27834b02230d8666a7eee78a58284588aaedd082 Mon Sep 17 00:00:00 2001 From: Landen Chao Date: Fri, 11 Sep 2020 21:48:53 +0800 Subject: dt-bindings: net: dsa: add new MT7531 binding to support MT7531 Add devicetree binding to support the compatible mt7531 switch as used in the MediaTek MT7531 switch. Signed-off-by: Sean Wang Signed-off-by: Landen Chao Signed-off-by: David S. Miller --- Documentation/devicetree/bindings/net/dsa/mt7530.txt | 13 +++++++++---- 1 file changed, 9 insertions(+), 4 deletions(-) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/net/dsa/mt7530.txt b/Documentation/devicetree/bindings/net/dsa/mt7530.txt index c5ed5d25f642..560369efad6c 100644 --- a/Documentation/devicetree/bindings/net/dsa/mt7530.txt +++ b/Documentation/devicetree/bindings/net/dsa/mt7530.txt @@ -5,6 +5,7 @@ Required properties: - compatible: may be compatible = "mediatek,mt7530" or compatible = "mediatek,mt7621" + or compatible = "mediatek,mt7531" - #address-cells: Must be 1. - #size-cells: Must be 0. - mediatek,mcm: Boolean; if defined, indicates that either MT7530 is the part @@ -32,10 +33,14 @@ Required properties for the child nodes within ports container: - reg: Port address described must be 6 for CPU port and from 0 to 5 for user ports. -- phy-mode: String, must be either "trgmii" or "rgmii" for port labeled - "cpu". - -Port 5 of the switch is muxed between: +- phy-mode: String, the following values are acceptable for port labeled + "cpu": + If compatible mediatek,mt7530 or mediatek,mt7621 is set, + must be either "trgmii" or "rgmii" + If compatible mediatek,mt7531 is set, + must be either "sgmii", "1000base-x" or "2500base-x" + +Port 5 of mt7530 and mt7621 switch is muxed between: 1. GMAC5: GMAC5 can interface with another external MAC or PHY. 2. PHY of port 0 or port 4: PHY interfaces with an external MAC like 2nd GMAC of the SOC. Used in many setups where port 0/4 becomes the WAN port. -- cgit v1.2.3 From e6f98b292413f175391b52f5e3b20500c5c834c8 Mon Sep 17 00:00:00 2001 From: Jim Quinlan Date: Fri, 11 Sep 2020 13:52:22 -0400 Subject: dt-bindings: PCI: Add bindings for more Brcmstb chips - Add compatible strings for three more Broadcom STB chips: 7278, 7216, 7211 (STB version of RPi4). - Add new property 'brcm,scb-sizes'. - Add new property 'resets'. - Add new property 'reset-names' for 7216 only. - Allow 'ranges' and 'dma-ranges' to have more than one item and update the example to show this. Link: https://lore.kernel.org/r/20200911175232.19016-3-james.quinlan@broadcom.com Signed-off-by: Jim Quinlan Signed-off-by: Lorenzo Pieralisi Reviewed-by: Rob Herring --- .../devicetree/bindings/pci/brcm,stb-pcie.yaml | 56 +++++++++++++++++++--- 1 file changed, 49 insertions(+), 7 deletions(-) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml b/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml index 8680a0f86c5a..807694b4f41f 100644 --- a/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml +++ b/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml @@ -9,12 +9,15 @@ title: Brcmstb PCIe Host Controller Device Tree Bindings maintainers: - Nicolas Saenz Julienne -allOf: - - $ref: /schemas/pci/pci-bus.yaml# - properties: compatible: - const: brcm,bcm2711-pcie # The Raspberry Pi 4 + items: + - enum: + - brcm,bcm2711-pcie # The Raspberry Pi 4 + - brcm,bcm7211-pcie # Broadcom STB version of RPi4 + - brcm,bcm7278-pcie # Broadcom 7278 Arm + - brcm,bcm7216-pcie # Broadcom 7216 Arm + - brcm,bcm7445-pcie # Broadcom 7445 Arm reg: maxItems: 1 @@ -34,10 +37,12 @@ properties: - const: msi ranges: - maxItems: 1 + minItems: 1 + maxItems: 4 dma-ranges: - maxItems: 1 + minItems: 1 + maxItems: 6 clocks: maxItems: 1 @@ -58,8 +63,31 @@ properties: aspm-no-l0s: true + resets: + description: for "brcm,bcm7216-pcie", must be a valid reset + phandle pointing to the RESCAL reset controller provider node. + $ref: "/schemas/types.yaml#/definitions/phandle" + + reset-names: + items: + - const: rescal + + brcm,scb-sizes: + description: u64 giving the 64bit PCIe memory + viewport size of a memory controller. There may be up to + three controllers, and each size must be a power of two + with a size greater or equal to the amount of memory the + controller supports. Note that each memory controller + may have two component regions -- base and extended -- so + this information cannot be deduced from the dma-ranges. + $ref: /schemas/types.yaml#/definitions/uint64-array + items: + minItems: 1 + maxItems: 3 + required: - reg + - ranges - dma-ranges - "#interrupt-cells" - interrupts @@ -68,6 +96,18 @@ required: - interrupt-map - msi-controller +allOf: + - $ref: /schemas/pci/pci-bus.yaml# + - if: + properties: + compatible: + contains: + const: brcm,bcm7216-pcie + then: + required: + - resets + - reset-names + unevaluatedProperties: false examples: @@ -93,7 +133,9 @@ examples: msi-parent = <&pcie0>; msi-controller; ranges = <0x02000000 0x0 0xf8000000 0x6 0x00000000 0x0 0x04000000>; - dma-ranges = <0x02000000 0x0 0x00000000 0x0 0x00000000 0x0 0x80000000>; + dma-ranges = <0x42000000 0x1 0x00000000 0x0 0x40000000 0x0 0x80000000>, + <0x42000000 0x1 0x80000000 0x3 0x00000000 0x0 0x80000000>; brcm,enable-ssc; + brcm,scb-sizes = <0x0000000080000000 0x0000000080000000>; }; }; -- cgit v1.2.3 From a69f802ea1e542bfbb7e3a5958e939138e967210 Mon Sep 17 00:00:00 2001 From: Yoshihiro Shimoda Date: Mon, 7 Sep 2020 18:19:42 +0900 Subject: dt-bindings: clock: renesas,cpg-mssr: Document r8a779a0 Add binding documentation for the R-Car V3U (R8A779A0) Clock Pulse Generator. Signed-off-by: Yoshihiro Shimoda Link: https://lore.kernel.org/r/1599470390-29719-7-git-send-email-yoshihiro.shimoda.uh@renesas.com Acked-by: Rob Herring Signed-off-by: Geert Uytterhoeven --- Documentation/devicetree/bindings/clock/renesas,cpg-mssr.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/clock/renesas,cpg-mssr.yaml b/Documentation/devicetree/bindings/clock/renesas,cpg-mssr.yaml index e13aee8ab61a..9b414fbde6d7 100644 --- a/Documentation/devicetree/bindings/clock/renesas,cpg-mssr.yaml +++ b/Documentation/devicetree/bindings/clock/renesas,cpg-mssr.yaml @@ -47,6 +47,7 @@ properties: - renesas,r8a77980-cpg-mssr # R-Car V3H - renesas,r8a77990-cpg-mssr # R-Car E3 - renesas,r8a77995-cpg-mssr # R-Car D3 + - renesas,r8a779a0-cpg-mssr # R-Car V3U reg: maxItems: 1 -- cgit v1.2.3 From 884d1a334ae8130fabede56f59b224619ad6bca4 Mon Sep 17 00:00:00 2001 From: Corentin Labbe Date: Mon, 7 Sep 2020 19:54:37 +0200 Subject: dt-bindings: crypto: Specify that allwinner, sun8i-a33-crypto needs reset When adding allwinner,sun8i-a33-crypto, I forgot to add that it needs reset. Furthermore, there are no need to use items to list only one compatible in compatible list. Fixes: f81547ba7a98 ("dt-bindings: crypto: add new compatible for A33 SS") Signed-off-by: Corentin Labbe Signed-off-by: Maxime Ripard Link: https://lore.kernel.org/r/20200907175437.4464-1-clabbe.montjoie@gmail.com --- .../devicetree/bindings/crypto/allwinner,sun4i-a10-crypto.yaml | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/crypto/allwinner,sun4i-a10-crypto.yaml b/Documentation/devicetree/bindings/crypto/allwinner,sun4i-a10-crypto.yaml index fc823572bcff..90c6d039b91b 100644 --- a/Documentation/devicetree/bindings/crypto/allwinner,sun4i-a10-crypto.yaml +++ b/Documentation/devicetree/bindings/crypto/allwinner,sun4i-a10-crypto.yaml @@ -23,8 +23,7 @@ properties: - items: - const: allwinner,sun7i-a20-crypto - const: allwinner,sun4i-a10-crypto - - items: - - const: allwinner,sun8i-a33-crypto + - const: allwinner,sun8i-a33-crypto reg: maxItems: 1 @@ -59,7 +58,9 @@ if: properties: compatible: contains: - const: allwinner,sun6i-a31-crypto + enum: + - allwinner,sun6i-a31-crypto + - allwinner,sun8i-a33-crypto then: required: -- cgit v1.2.3 From b7158866c3b8aaff16fbea1a35cbbb4ab068ea3e Mon Sep 17 00:00:00 2001 From: Martin Cerveny Date: Mon, 7 Sep 2020 18:24:57 +0200 Subject: dt-bindings: crypto: Add compatible for V3s Allwinner V3s has crypto engine similar to that in A33. So add compatible. Signed-off-by: Martin Cerveny Signed-off-by: Maxime Ripard Link: https://lore.kernel.org/r/20200907162458.23730-2-m.cerveny@computer.org --- .../devicetree/bindings/crypto/allwinner,sun4i-a10-crypto.yaml | 3 +++ 1 file changed, 3 insertions(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/crypto/allwinner,sun4i-a10-crypto.yaml b/Documentation/devicetree/bindings/crypto/allwinner,sun4i-a10-crypto.yaml index 90c6d039b91b..0429fb774f10 100644 --- a/Documentation/devicetree/bindings/crypto/allwinner,sun4i-a10-crypto.yaml +++ b/Documentation/devicetree/bindings/crypto/allwinner,sun4i-a10-crypto.yaml @@ -24,6 +24,9 @@ properties: - const: allwinner,sun7i-a20-crypto - const: allwinner,sun4i-a10-crypto - const: allwinner,sun8i-a33-crypto + - items: + - const: allwinner,sun8i-v3s-crypto + - const: allwinner,sun8i-a33-crypto reg: maxItems: 1 -- cgit v1.2.3 From 40acc05271abc2852c32622edbebd75698736b9b Mon Sep 17 00:00:00 2001 From: Vadym Kochan Date: Wed, 16 Sep 2020 19:31:02 +0300 Subject: dt-bindings: marvell,prestera: Add description for device-tree bindings Add brief description how to configure base mac address binding in device-tree. Describe requirement for the PCI port which is connected to the ASIC, to allow access to the firmware related registers. Signed-off-by: Vadym Kochan Signed-off-by: David S. Miller --- .../devicetree/bindings/net/marvell,prestera.txt | 34 ++++++++++++++++++++++ 1 file changed, 34 insertions(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/net/marvell,prestera.txt b/Documentation/devicetree/bindings/net/marvell,prestera.txt index 83370ebf5b89..e28938ddfdf5 100644 --- a/Documentation/devicetree/bindings/net/marvell,prestera.txt +++ b/Documentation/devicetree/bindings/net/marvell,prestera.txt @@ -45,3 +45,37 @@ dfx-server { ranges = <0 MBUS_ID(0x08, 0x00) 0 0x100000>; reg = ; }; + +Marvell Prestera SwitchDev bindings +----------------------------------- +Optional properties: +- compatible: must be "marvell,prestera" +- base-mac-provider: describes handle to node which provides base mac address, + might be a static base mac address or nvme cell provider. + +Example: + +eeprom_mac_addr: eeprom-mac-addr { + compatible = "eeprom,mac-addr-cell"; + status = "okay"; + + nvmem = <&eeprom_at24>; +}; + +prestera { + compatible = "marvell,prestera"; + status = "okay"; + + base-mac-provider = <&eeprom_mac_addr>; +}; + +The current implementation of Prestera Switchdev PCI interface driver requires +that BAR2 is assigned to 0xf6000000 as base address from the PCI IO range: + +&cp0_pcie0 { + ranges = <0x81000000 0x0 0xfb000000 0x0 0xfb000000 0x0 0xf0000 + 0x82000000 0x0 0xf6000000 0x0 0xf6000000 0x0 0x2000000 + 0x82000000 0x0 0xf9000000 0x0 0xf9000000 0x0 0x100000>; + phys = <&cp0_comphy0 0>; + status = "okay"; +}; -- cgit v1.2.3 From 54cc33a3a44fc7f7d6743f7cfabc5de086a0e056 Mon Sep 17 00:00:00 2001 From: Thierry Reding Date: Thu, 17 Sep 2020 12:07:39 +0200 Subject: dt-bindings: misc: tegra-apbmisc: Add missing compatible strings The compatible string for the Tegra210 APBMISC block was missing from the bindings. Add it and while at it, rewrite the description of the compatible string to make it clearer. Reviewed-by: Jon Hunter Signed-off-by: Thierry Reding --- .../devicetree/bindings/misc/nvidia,tegra20-apbmisc.txt | 13 ++++++++----- 1 file changed, 8 insertions(+), 5 deletions(-) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/misc/nvidia,tegra20-apbmisc.txt b/Documentation/devicetree/bindings/misc/nvidia,tegra20-apbmisc.txt index 4556359c5876..83f6a251ba3e 100644 --- a/Documentation/devicetree/bindings/misc/nvidia,tegra20-apbmisc.txt +++ b/Documentation/devicetree/bindings/misc/nvidia,tegra20-apbmisc.txt @@ -1,10 +1,13 @@ -NVIDIA Tegra20/Tegra30/Tegr114/Tegra124 apbmisc block +NVIDIA Tegra APBMISC block Required properties: -- compatible : For Tegra20, must be "nvidia,tegra20-apbmisc". For Tegra30, - must be "nvidia,tegra30-apbmisc". Otherwise, must contain - "nvidia,-apbmisc", plus one of the above, where is tegra114, - tegra124, tegra132. +- compatible: Must be: + - Tegra20: "nvidia,tegra20-apbmisc" + - Tegra30: "nvidia,tegra30-apbmisc", "nvidia,tegra20-apbmisc" + - Tegra114: "nvidia,tegra114-apbmisc", "nvidia,tegra20-apbmisc" + - Tegra124: "nvidia,tegra124-apbmisc", "nvidia,tegra20-apbmisc" + - Tegra132: "nvidia,tegra124-apbmisc", "nvidia,tegra20-apbmisc" + - Tegra210: "nvidia,tegra210-apbmisc", "nvidia,tegra20-apbmisc" - reg: Should contain 2 entries: the first entry gives the physical address and length of the registers which contain revision and debug features. The second entry gives the physical address and length of the -- cgit v1.2.3 From c8f413b930058726ad0bb59ac35d9241a375e905 Mon Sep 17 00:00:00 2001 From: Thierry Reding Date: Thu, 17 Sep 2020 12:07:40 +0200 Subject: dt-bindings: misc: tegra186-misc: Add missing compatible string Add the missing compatible string for the Tegra194 MISC block. Reviewed-by: Jon Hunter Signed-off-by: Thierry Reding --- Documentation/devicetree/bindings/misc/nvidia,tegra186-misc.txt | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/misc/nvidia,tegra186-misc.txt b/Documentation/devicetree/bindings/misc/nvidia,tegra186-misc.txt index 892ba4384abc..111dfac70ea7 100644 --- a/Documentation/devicetree/bindings/misc/nvidia,tegra186-misc.txt +++ b/Documentation/devicetree/bindings/misc/nvidia,tegra186-misc.txt @@ -1,11 +1,12 @@ -NVIDIA Tegra186 MISC register block +NVIDIA Tegra186 (and later) MISC register block -The MISC register block found on Tegra186 SoCs contains registers that can be -used to identify a given chip and various strapping options. +The MISC register block found on Tegra186 and later SoCs contains registers +that can be used to identify a given chip and various strapping options. Required properties: - compatible: Must be: - Tegra186: "nvidia,tegra186-misc" + - Tegra194: "nvidia,tegra194-misc" - reg: Should contain 2 entries: The first entry gives the physical address and length of the register region which contains revision and debug features. The second entry specifies the physical address and length -- cgit v1.2.3 From c9e43d13f02785c5dc53ff62c6c94d6df8c6f978 Mon Sep 17 00:00:00 2001 From: Thierry Reding Date: Thu, 17 Sep 2020 12:07:41 +0200 Subject: dt-bindings: misc: tegra186-misc: Add Tegra234 support The MISC block found on Tegra234 is mostly similar to the one on Tegra194 but supports slightly different register sets that make it incompatible. Reviewed-by: Jon Hunter Signed-off-by: Thierry Reding --- Documentation/devicetree/bindings/misc/nvidia,tegra186-misc.txt | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/misc/nvidia,tegra186-misc.txt b/Documentation/devicetree/bindings/misc/nvidia,tegra186-misc.txt index 111dfac70ea7..43d777ed8316 100644 --- a/Documentation/devicetree/bindings/misc/nvidia,tegra186-misc.txt +++ b/Documentation/devicetree/bindings/misc/nvidia,tegra186-misc.txt @@ -7,6 +7,7 @@ Required properties: - compatible: Must be: - Tegra186: "nvidia,tegra186-misc" - Tegra194: "nvidia,tegra194-misc" + - Tegra234: "nvidia,tegra234-misc" - reg: Should contain 2 entries: The first entry gives the physical address and length of the register region which contains revision and debug features. The second entry specifies the physical address and length -- cgit v1.2.3 From b0e0423cfabc1eb407baee52cabbd9df2830feb0 Mon Sep 17 00:00:00 2001 From: Thierry Reding Date: Thu, 17 Sep 2020 12:07:42 +0200 Subject: dt-bindings: tegra: Add Tegra234 VDK compatible The NVIDIA Tegra234 VDK is a simulation platform for the Orin SoC. It supports a subset of the peripherals that will be available in the final chip and serves as a bootstrapping platform. Reviewed-by: Jon Hunter Signed-off-by: Thierry Reding --- Documentation/devicetree/bindings/arm/tegra.yaml | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/arm/tegra.yaml b/Documentation/devicetree/bindings/arm/tegra.yaml index e0b3debaee9e..85006ca503a7 100644 --- a/Documentation/devicetree/bindings/arm/tegra.yaml +++ b/Documentation/devicetree/bindings/arm/tegra.yaml @@ -119,3 +119,7 @@ properties: items: - const: nvidia,p3509-0000+p3668-0000 - const: nvidia,tegra194 + - items: + - enum: + - nvidia,tegra234-vdk + - const: nvidia,tegra234 -- cgit v1.2.3 From e4fb9a715f75efb28e7d92a573bd6216ca5355ac Mon Sep 17 00:00:00 2001 From: Thierry Reding Date: Thu, 17 Sep 2020 12:07:43 +0200 Subject: dt-bindings: fuse: tegra: Add Tegra234 support The Tegra234 FUSE block is very similar to that on prior chips but not completely compatible. Document the new compatible string. Reviewed-by: Jon Hunter Signed-off-by: Thierry Reding --- Documentation/devicetree/bindings/fuse/nvidia,tegra20-fuse.txt | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/fuse/nvidia,tegra20-fuse.txt b/Documentation/devicetree/bindings/fuse/nvidia,tegra20-fuse.txt index 2aaf661c04ee..b109911669e4 100644 --- a/Documentation/devicetree/bindings/fuse/nvidia,tegra20-fuse.txt +++ b/Documentation/devicetree/bindings/fuse/nvidia,tegra20-fuse.txt @@ -7,6 +7,7 @@ Required properties: For Tegra132 must contain "nvidia,tegra132-efuse", "nvidia,tegra124-efuse". For Tegra210 must contain "nvidia,tegra210-efuse". For Tegra186 must contain "nvidia,tegra186-efuse". For Tegra194 must contain "nvidia,tegra194-efuse". + For Tegra234 must contain "nvidia,tegra234-efuse". Details: nvidia,tegra20-efuse: Tegra20 requires using APB DMA to read the fuse data due to a hardware bug. Tegra20 also lacks certain information which is -- cgit v1.2.3 From b198a6ed02562b1a5aaae4f22598706b912c026a Mon Sep 17 00:00:00 2001 From: Thierry Reding Date: Thu, 17 Sep 2020 12:07:44 +0200 Subject: dt-bindings: tegra: pmc: Add Tegra234 support The PMC found on Tegra234 is mostly similar to the one on Tegra194 but supports slightly different I/O pads and wake events. Reviewed-by: Jon Hunter Signed-off-by: Thierry Reding --- Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-pmc.txt | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-pmc.txt b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-pmc.txt index 2d89cdc39eb0..576462fae27f 100644 --- a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-pmc.txt +++ b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-pmc.txt @@ -4,6 +4,7 @@ Required properties: - compatible: Should contain one of the following: - "nvidia,tegra186-pmc": for Tegra186 - "nvidia,tegra194-pmc": for Tegra194 + - "nvidia,tegra234-pmc": for Tegra234 - reg: Must contain an (offset, length) pair of the register set for each entry in reg-names. - reg-names: Must include the following entries: @@ -11,7 +12,7 @@ Required properties: - "wake" - "aotag" - "scratch" - - "misc" (Only for Tegra194) + - "misc" (Only for Tegra194 and later) Optional properties: - nvidia,invert-interrupt: If present, inverts the PMU interrupt signal. -- cgit v1.2.3 From 2312c291f6ac340af88eee0867fdfdfa2299ffc3 Mon Sep 17 00:00:00 2001 From: David Heidelberg Date: Fri, 14 Aug 2020 00:34:01 +0300 Subject: dt-bindings: power: supply: Add device-tree binding for Summit SMB3xx Summit SMB3xx series is a Programmable Switching Li+ Battery Charger. This patch adds device-tree binding for Summit SMB345, SMB347 and SMB358 chargers. Signed-off-by: David Heidelberg Signed-off-by: Dmitry Osipenko Reviewed-by: Rob Herring Signed-off-by: Thierry Reding --- .../power/supply/summit,smb347-charger.yaml | 152 +++++++++++++++++++++ include/dt-bindings/power/summit,smb347-charger.h | 19 +++ 2 files changed, 171 insertions(+) create mode 100644 Documentation/devicetree/bindings/power/supply/summit,smb347-charger.yaml create mode 100644 include/dt-bindings/power/summit,smb347-charger.h (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/power/supply/summit,smb347-charger.yaml b/Documentation/devicetree/bindings/power/supply/summit,smb347-charger.yaml new file mode 100644 index 000000000000..193a23af2007 --- /dev/null +++ b/Documentation/devicetree/bindings/power/supply/summit,smb347-charger.yaml @@ -0,0 +1,152 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/power/supply/summit,smb347-charger.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Battery charger driver for SMB345, SMB347 and SMB358 + +maintainers: + - David Heidelberg + - Dmitry Osipenko + +properties: + compatible: + enum: + - summit,smb345 + - summit,smb347 + - summit,smb358 + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + monitored-battery: + description: phandle to the battery node + $ref: /schemas/types.yaml#/definitions/phandle + + summit,enable-usb-charging: + type: boolean + description: Enable charging through USB. + + summit,enable-otg-charging: + type: boolean + description: Provide power for USB OTG + + summit,enable-mains-charging: + type: boolean + description: Enable charging through mains + + summit,enable-charge-control: + description: Enable charging control + $ref: /schemas/types.yaml#/definitions/uint32 + enum: + - 0 # SMB3XX_CHG_ENABLE_SW SW (I2C interface) + - 1 # SMB3XX_CHG_ENABLE_PIN_ACTIVE_LOW Pin control (Active Low) + - 2 # SMB3XX_CHG_ENABLE_PIN_ACTIVE_HIGH Pin control (Active High) + + summit,fast-voltage-threshold-microvolt: + description: Voltage threshold to transit to fast charge mode (in uV) + minimum: 2400000 + maximum: 3000000 + + summit,mains-current-limit-microamp: + description: Maximum input current from AC/DC input (in uA) + + summit,usb-current-limit-microamp: + description: Maximum input current from USB input (in uA) + + summit,charge-current-compensation-microamp: + description: Charge current compensation (in uA) + + summit,chip-temperature-threshold-celsius: + description: Chip temperature for thermal regulation in °C. + enum: [100, 110, 120, 130] + + summit,soft-compensation-method: + description: Soft temperature limit compensation method + $ref: /schemas/types.yaml#/definitions/uint32 + enum: + - 0 # SMB3XX_SOFT_TEMP_COMPENSATE_NONE Compensation none + - 1 # SMB3XX_SOFT_TEMP_COMPENSATE_CURRENT Current compensation + - 2 # SMB3XX_SOFT_TEMP_COMPENSATE_VOLTAGE Voltage compensation + +allOf: + - if: + properties: + compatible: + enum: + - summit,smb345 + - summit,smb358 + + then: + properties: + summit,mains-current-limit-microamp: + enum: [ 300000, 500000, 700000, 1000000, + 1500000, 1800000, 2000000] + + summit,usb-current-limit-microamp: + enum: [ 300000, 500000, 700000, 1000000, + 1500000, 1800000, 2000000] + + summit,charge-current-compensation-microamp: + enum: [200000, 450000, 600000, 900000] + + else: + properties: + summit,mains-current-limit-microamp: + enum: [ 300000, 500000, 700000, 900000, 1200000, + 1500000, 1800000, 2000000, 2200000, 2500000] + + summit,usb-current-limit-microamp: + enum: [ 300000, 500000, 700000, 900000, 1200000, + 1500000, 1800000, 2000000, 2200000, 2500000] + + summit,charge-current-compensation-microamp: + enum: [250000, 700000, 900000, 1200000] + +required: + - compatible + - reg + +anyOf: + - required: + - summit,enable-usb-charging + - required: + - summit,enable-otg-charging + - required: + - summit,enable-mains-charging + +additionalProperties: false + +examples: + - | + #include + + i2c { + #address-cells = <1>; + #size-cells = <0>; + + charger@7f { + compatible = "summit,smb347"; + reg = <0x7f>; + + summit,enable-charge-control = ; + summit,chip-temperature-threshold-celsius = <110>; + summit,mains-current-limit-microamp = <2000000>; + summit,usb-current-limit-microamp = <500000>; + summit,enable-usb-charging; + summit,enable-mains-charging; + + monitored-battery = <&battery>; + }; + }; + + battery: battery-cell { + compatible = "simple-battery"; + constant-charge-current-max-microamp = <1800000>; + operating-range-celsius = <0 45>; + alert-celsius = <3 42>; + }; diff --git a/include/dt-bindings/power/summit,smb347-charger.h b/include/dt-bindings/power/summit,smb347-charger.h new file mode 100644 index 000000000000..d918bf321a71 --- /dev/null +++ b/include/dt-bindings/power/summit,smb347-charger.h @@ -0,0 +1,19 @@ +/* SPDX-License-Identifier: (GPL-2.0-or-later or MIT) */ +/* + * Author: David Heidelberg + */ + +#ifndef _DT_BINDINGS_SMB347_CHARGER_H +#define _DT_BINDINGS_SMB347_CHARGER_H + +/* Charging compensation method */ +#define SMB3XX_SOFT_TEMP_COMPENSATE_NONE 0 +#define SMB3XX_SOFT_TEMP_COMPENSATE_CURRENT 1 +#define SMB3XX_SOFT_TEMP_COMPENSATE_VOLTAGE 2 + +/* Charging enable control */ +#define SMB3XX_CHG_ENABLE_SW 0 +#define SMB3XX_CHG_ENABLE_PIN_ACTIVE_LOW 1 +#define SMB3XX_CHG_ENABLE_PIN_ACTIVE_HIGH 2 + +#endif -- cgit v1.2.3 From 97de44c5ecd413d3da3d4ace74272a1ad6a409ca Mon Sep 17 00:00:00 2001 From: Neil Armstrong Date: Thu, 17 Sep 2020 08:47:01 +0200 Subject: dt-bindings: power: amlogic, meson-ee-pwrc: add Amlogic AXG power controller bindings This add the bindings of the Power Controller found in the Amlogic AXG SoCs. Signed-off-by: Neil Armstrong Signed-off-by: Kevin Hilman Reviewed-by: Rob Herring Acked-by: Martin Blumenstingl Link: https://lore.kernel.org/r/20200917064702.1459-2-narmstrong@baylibre.com --- .../bindings/power/amlogic,meson-ee-pwrc.yaml | 23 ++++++++++++++++++++-- include/dt-bindings/power/meson-axg-power.h | 14 +++++++++++++ 2 files changed, 35 insertions(+), 2 deletions(-) create mode 100644 include/dt-bindings/power/meson-axg-power.h (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/power/amlogic,meson-ee-pwrc.yaml b/Documentation/devicetree/bindings/power/amlogic,meson-ee-pwrc.yaml index 4f524f822e84..d30f85cc395e 100644 --- a/Documentation/devicetree/bindings/power/amlogic,meson-ee-pwrc.yaml +++ b/Documentation/devicetree/bindings/power/amlogic,meson-ee-pwrc.yaml @@ -27,6 +27,7 @@ properties: - amlogic,meson8b-pwrc - amlogic,meson8m2-pwrc - amlogic,meson-gxbb-pwrc + - amlogic,meson-axg-pwrc - amlogic,meson-g12a-pwrc - amlogic,meson-sm1-pwrc @@ -42,11 +43,11 @@ properties: - const: vapb resets: - minItems: 11 + minItems: 5 maxItems: 12 reset-names: - minItems: 11 + minItems: 5 maxItems: 12 "#power-domain-cells": @@ -107,6 +108,24 @@ allOf: - resets - reset-names + - if: + properties: + compatible: + enum: + - amlogic,meson-axg-pwrc + then: + properties: + reset-names: + items: + - const: viu + - const: venc + - const: vcbus + - const: vencl + - const: vid_lock + required: + - resets + - reset-names + - if: properties: compatible: diff --git a/include/dt-bindings/power/meson-axg-power.h b/include/dt-bindings/power/meson-axg-power.h new file mode 100644 index 000000000000..e5243884b249 --- /dev/null +++ b/include/dt-bindings/power/meson-axg-power.h @@ -0,0 +1,14 @@ +/* SPDX-License-Identifier: (GPL-2.0+ or MIT) */ +/* + * Copyright (c) 2020 BayLibre, SAS + * Author: Neil Armstrong + */ + +#ifndef _DT_BINDINGS_MESON_AXG_POWER_H +#define _DT_BINDINGS_MESON_AXG_POWER_H + +#define PWRC_AXG_VPU_ID 0 +#define PWRC_AXG_ETHERNET_MEM_ID 1 +#define PWRC_AXG_AUDIO_ID 2 + +#endif -- cgit v1.2.3 From 88ba71cdc5497390350c87e68ce35688e88be3e8 Mon Sep 17 00:00:00 2001 From: Christian Hewitt Date: Tue, 15 Sep 2020 17:24:31 +0200 Subject: dt-bindings: arm: amlogic: add support for the ODROID-N2+ HardKernel ODROID-N2+ uses a revised Amlogic S922X v2 chip that supports higher cpu clock speeds than the original ODROID-N2. Signed-off-by: Christian Hewitt Signed-off-by: Neil Armstrong Signed-off-by: Kevin Hilman Acked-by: Rob Herring Acked-by: Martin Blumenstingl Link: https://lore.kernel.org/r/20200915152432.30616-3-narmstrong@baylibre.com --- Documentation/devicetree/bindings/arm/amlogic.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/arm/amlogic.yaml b/Documentation/devicetree/bindings/arm/amlogic.yaml index 5eba9f48823e..12ba8d074370 100644 --- a/Documentation/devicetree/bindings/arm/amlogic.yaml +++ b/Documentation/devicetree/bindings/arm/amlogic.yaml @@ -153,6 +153,7 @@ properties: - azw,gtking - azw,gtking-pro - hardkernel,odroid-n2 + - hardkernel,odroid-n2-plus - khadas,vim3 - ugoos,am6 - const: amlogic,s922x -- cgit v1.2.3 From 0748c77fc8dc6bb20f9af395872ea35d8ac85998 Mon Sep 17 00:00:00 2001 From: Jerome Brunet Date: Tue, 15 Sep 2020 16:19:20 +0200 Subject: dt-bindings: arm: amlogic: add support for libretch s905x cc v2 Add support for the 2nd version of the libretch aml-s905x-cc. Signed-off-by: Jerome Brunet Signed-off-by: Kevin Hilman Link: https://lore.kernel.org/r/20200915141921.57258-2-jbrunet@baylibre.com --- Documentation/devicetree/bindings/arm/amlogic.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/arm/amlogic.yaml b/Documentation/devicetree/bindings/arm/amlogic.yaml index 12ba8d074370..0ee7c5b7b3f6 100644 --- a/Documentation/devicetree/bindings/arm/amlogic.yaml +++ b/Documentation/devicetree/bindings/arm/amlogic.yaml @@ -96,6 +96,7 @@ properties: - hwacom,amazetv - khadas,vim - libretech,aml-s905x-cc + - libretech,aml-s905x-cc-v2 - nexbox,a95x - const: amlogic,s905x - const: amlogic,meson-gxl -- cgit v1.2.3 From 8725e9fc61ebe396df89efd3e0245d15e416bb49 Mon Sep 17 00:00:00 2001 From: Yangbo Lu Date: Fri, 18 Sep 2020 17:48:00 +0800 Subject: dt-binding: ptp_qoriq: support fsl,tmr-fiper3 property Add fsl,tmr-fiper3 property definition which is supported only on DPAA2 and ENETC network controller hardware. Signed-off-by: Yangbo Lu Signed-off-by: David S. Miller --- Documentation/devicetree/bindings/ptp/ptp-qoriq.txt | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/ptp/ptp-qoriq.txt b/Documentation/devicetree/bindings/ptp/ptp-qoriq.txt index d48f9eb3636e..743eda754e65 100644 --- a/Documentation/devicetree/bindings/ptp/ptp-qoriq.txt +++ b/Documentation/devicetree/bindings/ptp/ptp-qoriq.txt @@ -18,6 +18,8 @@ Clock Properties: - fsl,tmr-add Frequency compensation value. - fsl,tmr-fiper1 Fixed interval period pulse generator. - fsl,tmr-fiper2 Fixed interval period pulse generator. + - fsl,tmr-fiper3 Fixed interval period pulse generator. + Supported only on DPAA2 and ENETC hardware. - fsl,max-adj Maximum frequency adjustment in parts per billion. - fsl,extts-fifo The presence of this property indicates hardware support for the external trigger stamp FIFO. -- cgit v1.2.3 From dcca7a97c6bfff2a7a18b928a0b9bf215cc8f4f5 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Sun, 20 Sep 2020 19:32:38 -0700 Subject: Add missing '#' to fix schema errors: $id: 'http://devicetree.org/schemas/soc/ti/ti,pruss.yaml' does not match 'http://devicetree.org/schemas/.*\\.yaml#' $schema: 'http://devicetree.org/meta-schemas/core.yaml' is not one of ['http://devicetree.org/meta-schemas/core.yaml#', 'http://devicetree.org/meta-schemas/base.yaml#'] Documentation/devicetree/bindings/soc/ti/ti,pruss.yaml: ignoring, error in schema: $id Fixes: bd691ce0ba9d ("dt-bindings: soc: ti: Add TI PRUSS bindings") Acked-by: Suman Anna Signed-off-by: Krzysztof Kozlowski Signed-off-by: Santosh Shilimkar --- Documentation/devicetree/bindings/soc/ti/ti,pruss.yaml | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/soc/ti/ti,pruss.yaml b/Documentation/devicetree/bindings/soc/ti/ti,pruss.yaml index cf7dc83f724f..037c51b2f972 100644 --- a/Documentation/devicetree/bindings/soc/ti/ti,pruss.yaml +++ b/Documentation/devicetree/bindings/soc/ti/ti,pruss.yaml @@ -1,8 +1,8 @@ # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- -$id: http://devicetree.org/schemas/soc/ti/ti,pruss.yaml -$schema: http://devicetree.org/meta-schemas/core.yaml +$id: http://devicetree.org/schemas/soc/ti/ti,pruss.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# title: |+ TI Programmable Real-Time Unit and Industrial Communication Subsystem -- cgit v1.2.3 From 14243910a8f6dd81cfe612c5d3ac466b4e41851c Mon Sep 17 00:00:00 2001 From: Marc Kleine-Budde Date: Wed, 16 Sep 2020 00:35:14 +0200 Subject: dt-bindings: can: mcp251x: change example interrupt type to IRQ_TYPE_LEVEL_LOW The MCP2515 datasheet clearly describes a level-triggered interrupt pin. Change example bindings accordingly. Link: https://lore.kernel.org/r/20200915223527.1417033-25-mkl@pengutronix.de Signed-off-by: Marc Kleine-Budde --- Documentation/devicetree/bindings/net/can/microchip,mcp251x.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/net/can/microchip,mcp251x.txt b/Documentation/devicetree/bindings/net/can/microchip,mcp251x.txt index 5a0111d4de58..e689506ac38d 100644 --- a/Documentation/devicetree/bindings/net/can/microchip,mcp251x.txt +++ b/Documentation/devicetree/bindings/net/can/microchip,mcp251x.txt @@ -19,7 +19,7 @@ Example: reg = <1>; clocks = <&clk24m>; interrupt-parent = <&gpio4>; - interrupts = <13 0x2>; + interrupts = <13 IRQ_TYPE_LEVEL_LOW>; vdd-supply = <®5v0>; xceiver-supply = <®5v0>; }; -- cgit v1.2.3 From 864e48ebe93df485a9d9b6d6244ac629d8f25db4 Mon Sep 17 00:00:00 2001 From: Marc Kleine-Budde Date: Wed, 16 Sep 2020 00:35:15 +0200 Subject: dt-bindings: can: mcp251x: document GPIO support MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The next patch adds gpio controller support to the mcp251x driver. This patch updates the binding accordingly. Cc: Timo Schlüßler Link: https://lore.kernel.org/r/20200915223527.1417033-26-mkl@pengutronix.de Signed-off-by: Marc Kleine-Budde --- Documentation/devicetree/bindings/net/can/microchip,mcp251x.txt | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/net/can/microchip,mcp251x.txt b/Documentation/devicetree/bindings/net/can/microchip,mcp251x.txt index e689506ac38d..381f8fb3e865 100644 --- a/Documentation/devicetree/bindings/net/can/microchip,mcp251x.txt +++ b/Documentation/devicetree/bindings/net/can/microchip,mcp251x.txt @@ -12,6 +12,9 @@ Required properties: Optional properties: - vdd-supply: Regulator that powers the CAN controller. - xceiver-supply: Regulator that powers the CAN transceiver. + - gpio-controller: Indicates this device is a GPIO controller. + - #gpio-cells: Should be two. The first cell is the pin number and + the second cell is used to specify the gpio polarity. Example: can0: can@1 { @@ -22,4 +25,6 @@ Example: interrupts = <13 IRQ_TYPE_LEVEL_LOW>; vdd-supply = <®5v0>; xceiver-supply = <®5v0>; + gpio-controller; + #gpio-cells = <2>; }; -- cgit v1.2.3 From 1b5a78e69c1fdae9aa8a62c45acb820639ccad87 Mon Sep 17 00:00:00 2001 From: Oleksij Rempel Date: Fri, 18 Sep 2020 19:25:31 +0200 Subject: dt-binding: can: mcp25xxfd: document device tree bindings This patch adds the device-tree binding documentation for the Microchip MCP25xxFD SPI CAN controller family. Signed-off-by: Oleksij Rempel Signed-off-by: Marc Kleine-Budde Link: https://lore.kernel.org/r/20200918172536.2074504-2-mkl@pengutronix.de --- .../bindings/net/can/microchip,mcp25xxfd.yaml | 79 ++++++++++++++++++++++ 1 file changed, 79 insertions(+) create mode 100644 Documentation/devicetree/bindings/net/can/microchip,mcp25xxfd.yaml (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/net/can/microchip,mcp25xxfd.yaml b/Documentation/devicetree/bindings/net/can/microchip,mcp25xxfd.yaml new file mode 100644 index 000000000000..aa2cad14d6d7 --- /dev/null +++ b/Documentation/devicetree/bindings/net/can/microchip,mcp25xxfd.yaml @@ -0,0 +1,79 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/can/microchip,mcp25xxfd.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: + Microchip MCP2517FD and MCP2518FD stand-alone CAN controller device tree + bindings + +maintainers: + - Marc Kleine-Budde + +properties: + compatible: + oneOf: + - const: microchip,mcp2517fd + description: for MCP2517FD + - const: microchip,mcp2518fd + description: for MCP2518FD + - const: microchip,mcp25xxfd + description: to autodetect chip variant + + reg: + maxItems: 1 + + interrupts-extended: + maxItems: 1 + + clocks: + maxItems: 1 + + vdd-supply: + description: Regulator that powers the CAN controller. + maxItems: 1 + + xceiver-supply: + description: Regulator that powers the CAN transceiver. + maxItems: 1 + + microchip,rx-int-gpios: + description: + GPIO phandle of GPIO connected to to INT1 pin of the MCP25XXFD, which + signals a pending RX interrupt. + maxItems: 1 + + spi-max-frequency: + description: + Must be half or less of "clocks" frequency. + maximum: 20000000 + +required: + - compatible + - reg + - interrupts-extended + - clocks + +examples: + - | + #include + #include + + spi0 { + #address-cells = <1>; + #size-cells = <0>; + + can@0 { + compatible = "microchip,mcp25xxfd"; + reg = <0>; + clocks = <&can0_osc>; + pinctrl-names = "default"; + pinctrl-0 = <&can0_pins>; + spi-max-frequency = <20000000>; + interrupts-extended = <&gpio 13 IRQ_TYPE_LEVEL_LOW>; + microchip,rx-int-gpios = <&gpio 27 GPIO_ACTIVE_LOW>; + vdd-supply = <®5v0>; + xceiver-supply = <®5v0>; + }; + }; -- cgit v1.2.3 From b74b33f5f7eb5e3cdc134b3f7fb3daa224415ffd Mon Sep 17 00:00:00 2001 From: Paul Cercueil Date: Fri, 4 Sep 2020 15:11:50 +0200 Subject: dt-bindings: i2c: ingenic: Add compatible string for the JZ4770 The I2C controller in the JZ4770 SoC seems to work the exact same as in the JZ4780 SoC. We could use "ingenic,jz4780-i2c" as a fallback string in the Device Tree, but that would be awkward, since the JZ4780 is newer. Instead, add a "ingenic,jz4770-i2c" string and use it as fallback for the "ingenic,jz4780-i2c" string. Signed-off-by: Paul Cercueil Reviewed-by: Rob Herring Signed-off-by: Wolfram Sang --- Documentation/devicetree/bindings/i2c/ingenic,i2c.yaml | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/i2c/ingenic,i2c.yaml b/Documentation/devicetree/bindings/i2c/ingenic,i2c.yaml index 682ed1bbf5c6..0e7b4b8a7e48 100644 --- a/Documentation/devicetree/bindings/i2c/ingenic,i2c.yaml +++ b/Documentation/devicetree/bindings/i2c/ingenic,i2c.yaml @@ -17,9 +17,13 @@ properties: pattern: "^i2c@[0-9a-f]+$" compatible: - enum: - - ingenic,jz4780-i2c - - ingenic,x1000-i2c + oneOf: + - enum: + - ingenic,jz4770-i2c + - ingenic,x1000-i2c + - items: + - const: ingenic,jz4780-i2c + - const: ingenic,jz4770-i2c reg: maxItems: 1 @@ -60,7 +64,7 @@ examples: #include #include i2c@10054000 { - compatible = "ingenic,jz4780-i2c"; + compatible = "ingenic,jz4780-i2c", "ingenic,jz4770-i2c"; #address-cells = <1>; #size-cells = <0>; reg = <0x10054000 0x1000>; -- cgit v1.2.3 From 16421e14ad5a4a79f45d8dde18cd4d55e5cce5f1 Mon Sep 17 00:00:00 2001 From: Xiaowei Bao Date: Fri, 18 Sep 2020 16:00:17 +0800 Subject: dt-bindings: pci: layerscape-pci: Add compatible strings for ls1088a and ls2088a Add compatible strings for ls1088a and ls2088a. Link: https://lore.kernel.org/r/20200918080024.13639-6-Zhiqiang.Hou@nxp.com Signed-off-by: Xiaowei Bao Signed-off-by: Hou Zhiqiang Signed-off-by: Lorenzo Pieralisi Acked-by: Rob Herring --- Documentation/devicetree/bindings/pci/layerscape-pci.txt | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/pci/layerscape-pci.txt b/Documentation/devicetree/bindings/pci/layerscape-pci.txt index 99a386ea691c..daa99f7d4c3f 100644 --- a/Documentation/devicetree/bindings/pci/layerscape-pci.txt +++ b/Documentation/devicetree/bindings/pci/layerscape-pci.txt @@ -24,6 +24,8 @@ Required properties: "fsl,ls1028a-pcie" EP mode: "fsl,ls1046a-pcie-ep", "fsl,ls-pcie-ep" + "fsl,ls1088a-pcie-ep", "fsl,ls-pcie-ep" + "fsl,ls2088a-pcie-ep", "fsl,ls-pcie-ep" - reg: base addresses and lengths of the PCIe controller register blocks. - interrupts: A list of interrupt outputs of the controller. Must contain an entry for each entry in the interrupt-names property. -- cgit v1.2.3 From 31026c72f9f29644d130d740e7060f431247085a Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Fri, 4 Sep 2020 16:53:02 +0200 Subject: dt-bindings: arm: fsl: Fix matching Purism Librem5 phones All Purism Librem5 phones have three compatibles so they need their own entry to fix dbts_check warnings like: arch/arm64/boot/dts/freescale/imx8mq-librem5-r2.dt.yaml: /: compatible: ['purism,librem5r2', 'purism,librem5', 'fsl,imx8mq'] is not valid under any of the given schemas arch/arm64/boot/dts/freescale/imx8mq-librem5-r2.dt.yaml: /: compatible: ['purism,librem5r2', 'purism,librem5', 'fsl,imx8mq'] is too long Signed-off-by: Krzysztof Kozlowski Reviewed-by: Rob Herring Signed-off-by: Shawn Guo --- Documentation/devicetree/bindings/arm/fsl.yaml | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml index 71acf14da715..93d82641d15c 100644 --- a/Documentation/devicetree/bindings/arm/fsl.yaml +++ b/Documentation/devicetree/bindings/arm/fsl.yaml @@ -379,12 +379,18 @@ properties: - fsl,imx8mq-evk # i.MX8MQ EVK Board - google,imx8mq-phanbell # Google Coral Edge TPU - purism,librem5-devkit # Purism Librem5 devkit - - purism,librem5r2 # Purism Librem5 phone "Chestnut" - - purism,librem5r3 # Purism Librem5 phone "Dogwood" - solidrun,hummingboard-pulse # SolidRun Hummingboard Pulse - technexion,pico-pi-imx8m # TechNexion PICO-PI-8M evk - const: fsl,imx8mq + - description: Purism Librem5 phones + items: + - enum: + - purism,librem5r2 # Purism Librem5 phone "Chestnut" + - purism,librem5r3 # Purism Librem5 phone "Dogwood" + - const: purism,librem5 + - const: fsl,imx8mq + - description: Zodiac Inflight Innovations Ultra Boards items: - enum: -- cgit v1.2.3 From 928b960fe5aff659de33a3f04ace1ba7d379d5fa Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Sun, 13 Sep 2020 13:29:11 -0300 Subject: dt-bindings: arm: fsl: Add an entry for the i.MX6 LogicPD board Add an entry for the i.MX6 LogicPD board. Signed-off-by: Fabio Estevam Signed-off-by: Shawn Guo --- Documentation/devicetree/bindings/arm/fsl.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml index 93d82641d15c..671f809a42b7 100644 --- a/Documentation/devicetree/bindings/arm/fsl.yaml +++ b/Documentation/devicetree/bindings/arm/fsl.yaml @@ -120,6 +120,7 @@ properties: - fsl,imx6q-sabrelite - fsl,imx6q-sabresd - kontron,imx6q-samx6i # Kontron i.MX6 Dual/Quad SMARC Module + - logicpd,imx6q-logicpd - prt,prti6q # Protonic PRTI6Q board - prt,prtwd2 # Protonic WD2 board - technexion,imx6q-pico-dwarf # TechNexion i.MX6Q Pico-Dwarf -- cgit v1.2.3 From 7b0bb204ee705c3b46d8e48f1893979ea6af4753 Mon Sep 17 00:00:00 2001 From: Stefan Riedmueller Date: Thu, 17 Sep 2020 10:30:02 +0200 Subject: dt-bindings: arm: fsl: Add PHYTEC i.MX6 UL/ULL devicetree bindings Add devicetree bindings for i.MX6 UL/ULL based phyCORE-i.MX6 UL/ULL and phyBOARD-Segin. Signed-off-by: Stefan Riedmueller Reviewed-by: Rob Herring Signed-off-by: Shawn Guo --- Documentation/devicetree/bindings/arm/fsl.yaml | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml index 671f809a42b7..eb0db8dd91ca 100644 --- a/Documentation/devicetree/bindings/arm/fsl.yaml +++ b/Documentation/devicetree/bindings/arm/fsl.yaml @@ -249,6 +249,15 @@ properties: - technexion,imx6ul-pico-pi # TechNexion i.MX6UL Pico-Pi - const: fsl,imx6ul + - description: i.MX6UL PHYTEC phyBOARD-Segin + items: + - enum: + - phytec,imx6ul-pbacd10-emmc + - phytec,imx6ul-pbacd10-nand + - const: phytec,imx6ul-pbacd10 # PHYTEC phyBOARD-Segin with i.MX6 UL + - const: phytec,imx6ul-pcl063 # PHYTEC phyCORE-i.MX 6UL + - const: fsl,imx6ul + - description: Kontron N6310 S Board items: - const: kontron,imx6ul-n6310-s @@ -280,6 +289,15 @@ properties: - toradex,colibri-imx6ull-wifi-eval # Colibri iMX6ULL Wi-Fi / BT Module on Colibri Eval Board - const: fsl,imx6ull + - description: i.MX6ULL PHYTEC phyBOARD-Segin + items: + - enum: + - phytec,imx6ull-pbacd10-emmc + - phytec,imx6ull-pbacd10-nand + - const: phytec,imx6ull-pbacd10 # PHYTEC phyBOARD-Segin with i.MX6 ULL + - const: phytec,imx6ull-pcl063 # PHYTEC phyCORE-i.MX 6ULL + - const: fsl,imx6ull + - description: Kontron N6411 S Board items: - const: kontron,imx6ull-n6411-s -- cgit v1.2.3 From e8c677195cae38175ca45e4ded5b369278a38fec Mon Sep 17 00:00:00 2001 From: Stefan Riedmueller Date: Thu, 17 Sep 2020 10:30:03 +0200 Subject: dt-bindings: arm: fsl: Add PHYTEC i.MX6 devicetree bindings Add devicetree bindings for i.MX6 based phyCORE-i.MX6, phyBOARD-Mira and phyFLEX-i.MX6. Signed-off-by: Stefan Riedmueller Reviewed-by: Rob Herring Signed-off-by: Shawn Guo --- Documentation/devicetree/bindings/arm/fsl.yaml | 37 ++++++++++++++++++++++++++ 1 file changed, 37 insertions(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml index eb0db8dd91ca..14b85166d3bb 100644 --- a/Documentation/devicetree/bindings/arm/fsl.yaml +++ b/Documentation/devicetree/bindings/arm/fsl.yaml @@ -157,6 +157,21 @@ properties: - const: gw,ventana - const: fsl,imx6q + - description: i.MX6Q PHYTEC phyBOARD-Mira + items: + - enum: + - phytec,imx6q-pbac06-emmc # PHYTEC phyBOARD-Mira eMMC RDK + - phytec,imx6q-pbac06-nand # PHYTEC phyBOARD-Mira NAND RDK + - const: phytec,imx6q-pbac06 # PHYTEC phyBOARD-Mira + - const: phytec,imx6qdl-pcm058 # PHYTEC phyCORE-i.MX6 + - const: fsl,imx6q + + - description: i.MX6Q PHYTEC phyFLEX-i.MX6 + items: + - const: phytec,imx6q-pbab01 # PHYTEC phyFLEX carrier board + - const: phytec,imx6q-pfla02 # PHYTEC phyFLEX-i.MX6 Quad + - const: fsl,imx6q + - description: i.MX6QP based Boards items: - enum: @@ -164,6 +179,13 @@ properties: - fsl,imx6qp-sabresd # i.MX6 Quad Plus SABRE Smart Device Board - const: fsl,imx6qp + - description: i.MX6QP PHYTEC phyBOARD-Mira + items: + - const: phytec,imx6qp-pbac06-nand + - const: phytec,imx6qp-pbac06 # PHYTEC phyBOARD-Mira + - const: phytec,imx6qdl-pcm058 # PHYTEC phyCORE-i.MX6 + - const: fsl,imx6qp + - description: i.MX6DL based Boards items: - enum: @@ -213,6 +235,21 @@ properties: - const: gw,ventana - const: fsl,imx6dl + - description: i.MX6DL PHYTEC phyBOARD-Mira + items: + - enum: + - phytec,imx6dl-pbac06-emmc # PHYTEC phyBOARD-Mira eMMC RDK + - phytec,imx6dl-pbac06-nand # PHYTEC phyBOARD-Mira NAND RDK + - const: phytec,imx6dl-pbac06 # PHYTEC phyBOARD-Mira + - const: phytec,imx6qdl-pcm058 # PHYTEC phyCORE-i.MX6 + - const: fsl,imx6dl + + - description: i.MX6DL PHYTEC phyFLEX-i.MX6 + items: + - const: phytec,imx6dl-pbab01 # PHYTEC phyFLEX carrier board + - const: phytec,imx6dl-pfla02 # PHYTEC phyFLEX-i.MX6 Quad + - const: fsl,imx6dl + - description: i.MX6SL based Boards items: - enum: -- cgit v1.2.3 From d684ad5a4c3d85f16a7c72731914de95281a250b Mon Sep 17 00:00:00 2001 From: Matheus Castello Date: Mon, 21 Sep 2020 23:42:59 -0300 Subject: dt-bindings: Add vendor prefix for Caninos Loucos MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The Caninos Loucos Program develops Single Board Computers with an open structure. The Program wants to form a community of developers to use IoT technologies and disseminate the learning of embedded systems in Brazil. It is an initiative of the Technological Integrated Systems Laboratory (LSI-TEC) with the support of Polytechnic School of the University of São Paulo (Poli-USP) and Jon "Maddog" Hall. Signed-off-by: Matheus Castello Acked-by: Rob Herring Reviewed-by: Andreas Färber Signed-off-by: Manivannan Sadhasivam --- Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml index 2baee2c817c1..750aa03f63cc 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml @@ -179,6 +179,8 @@ patternProperties: description: CALAO Systems SAS "^calxeda,.*": description: Calxeda + "^caninos,.*": + description: Caninos Loucos Program "^capella,.*": description: Capella Microsystems, Inc "^cascoda,.*": -- cgit v1.2.3 From ccc3b1ac4ac65870c02087f0727ea70ba02e3e6b Mon Sep 17 00:00:00 2001 From: Matheus Castello Date: Mon, 21 Sep 2020 23:43:00 -0300 Subject: dt-bindings: arm: actions: Document Caninos Loucos Labrador Update the documentation to add the Caninos Loucos Labrador. Labrador project consists of the computer on module Core v2 based on the Actions Semi S500, computer on module Core v3 based on the Actions Semi S700 and the Labrador base boards. Signed-off-by: Matheus Castello Acked-by: Rob Herring Signed-off-by: Manivannan Sadhasivam --- Documentation/devicetree/bindings/arm/actions.yaml | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/arm/actions.yaml b/Documentation/devicetree/bindings/arm/actions.yaml index ace3fdaa8396..1cc66803ce2a 100644 --- a/Documentation/devicetree/bindings/arm/actions.yaml +++ b/Documentation/devicetree/bindings/arm/actions.yaml @@ -19,6 +19,11 @@ properties: - allo,sparky # Allo.com Sparky - cubietech,cubieboard6 # Cubietech CubieBoard6 - const: actions,s500 + - items: + - enum: + - caninos,labrador-base-m # Labrador Base Board M v1 + - const: caninos,labrador-v2 # Labrador Core v2 + - const: actions,s500 - items: - enum: - lemaker,guitar-bb-rev-b # LeMaker Guitar Base Board rev. B @@ -26,6 +31,11 @@ properties: - const: actions,s500 # The Actions Semi S700 is a quad-core ARM Cortex-A53 SoC. + - items: + - enum: + - caninos,labrador-base-m2 # Labrador Base Board M v2 + - const: caninos,labrador-v3 # Labrador Core v3 + - const: actions,s700 - items: - enum: - cubietech,cubieboard7 # Cubietech CubieBoard7 -- cgit v1.2.3 From dde8a1e4426d0c2816162602eb4c9ebba26398ec Mon Sep 17 00:00:00 2001 From: Cristian Ciocaltea Date: Fri, 28 Aug 2020 16:53:18 +0300 Subject: dt-bindings: Add vendor prefix for RoseapplePi.org Add devicetree vendor prefix for RoseapplePi.org Foundation. Website: http://roseapplepi.org/ Signed-off-by: Cristian Ciocaltea Acked-by: Rob Herring Signed-off-by: Manivannan Sadhasivam --- Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml index 750aa03f63cc..8c6832e95103 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml @@ -896,6 +896,8 @@ patternProperties: description: Ronbo Electronics "^roofull,.*": description: Shenzhen Roofull Technology Co, Ltd + "^roseapplepi,.*": + description: RoseapplePi.org "^samsung,.*": description: Samsung Semiconductor "^samtec,.*": -- cgit v1.2.3 From 494eebdc7e9089021192d1642d7c6d542dbc8ec8 Mon Sep 17 00:00:00 2001 From: Cristian Ciocaltea Date: Fri, 28 Aug 2020 16:53:19 +0300 Subject: dt-bindings: arm: actions: Document RoseapplePi Define compatible strings for RoseapplePi, a SBC manufactured in Taiwan, based on Actions Semi S500 reference design. Signed-off-by: Cristian Ciocaltea Reviewed-by: Rob Herring Signed-off-by: Manivannan Sadhasivam --- Documentation/devicetree/bindings/arm/actions.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/arm/actions.yaml b/Documentation/devicetree/bindings/arm/actions.yaml index 1cc66803ce2a..9dd6bd067f4a 100644 --- a/Documentation/devicetree/bindings/arm/actions.yaml +++ b/Documentation/devicetree/bindings/arm/actions.yaml @@ -18,6 +18,7 @@ properties: - enum: - allo,sparky # Allo.com Sparky - cubietech,cubieboard6 # Cubietech CubieBoard6 + - roseapplepi,roseapplepi # RoseapplePi.org RoseapplePi - const: actions,s500 - items: - enum: -- cgit v1.2.3 From 8e5910d2dc391b9e8e3e5831b3524f32c419ef18 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Sat, 19 Sep 2020 16:13:30 +0200 Subject: dt-bindings: arm: fsl: Add binding for Variscite Symphony board with VAR-SOM-MX8MN Add a binding for the Variscite Symphony evaluation kit board with VAR-SOM-MX8MN System on Module. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Rob Herring Signed-off-by: Shawn Guo --- Documentation/devicetree/bindings/arm/fsl.yaml | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml index 14b85166d3bb..1ca9dfa8ce9a 100644 --- a/Documentation/devicetree/bindings/arm/fsl.yaml +++ b/Documentation/devicetree/bindings/arm/fsl.yaml @@ -421,6 +421,12 @@ properties: - fsl,imx8mn-evk # i.MX8MN LPDDR4 EVK Board - const: fsl,imx8mn + - description: Variscite VAR-SOM-MX8MN based boards + items: + - const: variscite,var-som-mx8mn-symphony + - const: variscite,var-som-mx8mn + - const: fsl,imx8mn + - description: i.MX8MP based Boards items: - enum: -- cgit v1.2.3 From 8cfcf3279419acbf2d2c471262bfb18d9e175fc9 Mon Sep 17 00:00:00 2001 From: David Bauer Date: Sun, 20 Sep 2020 17:45:27 +0200 Subject: dt-bindings: Add doc for FriendlyARM NanoPi R2S Add devicetree binding documentation for the FriendlyARM NanoPi R2S. Signed-off-by: David Bauer Reviewed-by: Rob Herring Link: https://lore.kernel.org/r/20200920154528.88185-1-mail@david-bauer.net Signed-off-by: Heiko Stuebner --- Documentation/devicetree/bindings/arm/rockchip.yaml | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml index 251c3ca22e1b..65b4cc2c63f7 100644 --- a/Documentation/devicetree/bindings/arm/rockchip.yaml +++ b/Documentation/devicetree/bindings/arm/rockchip.yaml @@ -104,6 +104,11 @@ properties: - firefly,roc-rk3399-pc-mezzanine - const: rockchip,rk3399 + - description: FriendlyElec NanoPi R2S + items: + - const: friendlyarm,nanopi-r2s + - const: rockchip,rk3328 + - description: FriendlyElec NanoPi4 series boards items: - enum: -- cgit v1.2.3 From b3ff08bc9ba6a2047d7a5812e89a5187cf3e4aa4 Mon Sep 17 00:00:00 2001 From: Nobuhiro Iwamatsu Date: Mon, 27 Apr 2020 09:10:40 +0900 Subject: dt-bindings: arm: toshiba: add Toshiba Visconti ARM SoCs Add device tree bindings for the Toshiba Visconti ARM SoCs. Signed-off-by: Nobuhiro Iwamatsu Reviewed-by: Punit Agrawal Reviewed-by: Rob Herring --- Documentation/devicetree/bindings/arm/toshiba.yaml | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/toshiba.yaml (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/arm/toshiba.yaml b/Documentation/devicetree/bindings/arm/toshiba.yaml new file mode 100644 index 000000000000..efd3f4859669 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/toshiba.yaml @@ -0,0 +1,20 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/toshiba.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Toshiba Visconti Platform Device Tree Bindings + +maintainers: + - Nobuhiro Iwamatsu + +properties: + $nodename: + const: '/' + compatible: + oneOf: + - description: Visconti5 TMPV7708 + items: + - const: toshiba,tmpv7708 +... -- cgit v1.2.3 From a1fd0c367be3a7fd3c19f08aed4126d7cda1ba11 Mon Sep 17 00:00:00 2001 From: Nobuhiro Iwamatsu Date: Wed, 22 Jul 2020 10:50:46 +0900 Subject: dt-bindings: arm: toshiba: Add the TMPV7708 RM main board Add an entry for the Toshiba Visconti TMPV7708 RM main board (tmpv7708-rm-mbrc) to the board/SoC bindings. Signed-off-by: Nobuhiro Iwamatsu Reviewed-by: Punit Agrawal Reviewed-by: Rob Herring --- Documentation/devicetree/bindings/arm/toshiba.yaml | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/arm/toshiba.yaml b/Documentation/devicetree/bindings/arm/toshiba.yaml index efd3f4859669..0e066290238e 100644 --- a/Documentation/devicetree/bindings/arm/toshiba.yaml +++ b/Documentation/devicetree/bindings/arm/toshiba.yaml @@ -16,5 +16,7 @@ properties: oneOf: - description: Visconti5 TMPV7708 items: + - enum: + - toshiba,tmpv7708-rm-mbrc # TMPV7708 RM main board - const: toshiba,tmpv7708 ... -- cgit v1.2.3 From a297104aceeb312600b0efaf8a281ad0f17167d2 Mon Sep 17 00:00:00 2001 From: Sai Krishna Potthuri Date: Wed, 22 Jul 2020 12:46:04 +0530 Subject: dt-bindings: reset: Updated binding for Versal reset driver Added documentation and Versal reset indices to describe about Versal reset driver bindings. In Versal all reset indices includes Class, SubClass, Type, Index information whereas class refers to clock, reset, power etc., Underlying firmware in Versal have such classification and expects the ID to be this way. [13:0] - Index bits [19:14] - Type bits [25:20] - SubClass bits [31:26] - Class bits. Signed-off-by: Sai Krishna Potthuri Reviewed-by: Rob Herring Signed-off-by: Philipp Zabel --- .../bindings/reset/xlnx,zynqmp-reset.txt | 11 ++- include/dt-bindings/reset/xlnx-versal-resets.h | 105 +++++++++++++++++++++ 2 files changed, 112 insertions(+), 4 deletions(-) create mode 100644 include/dt-bindings/reset/xlnx-versal-resets.h (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/reset/xlnx,zynqmp-reset.txt b/Documentation/devicetree/bindings/reset/xlnx,zynqmp-reset.txt index 27a45fe5ecf1..ed836868dbf1 100644 --- a/Documentation/devicetree/bindings/reset/xlnx,zynqmp-reset.txt +++ b/Documentation/devicetree/bindings/reset/xlnx,zynqmp-reset.txt @@ -1,7 +1,7 @@ -------------------------------------------------------------------------- - = Zynq UltraScale+ MPSoC reset driver binding = + = Zynq UltraScale+ MPSoC and Versal reset driver binding = -------------------------------------------------------------------------- -The Zynq UltraScale+ MPSoC has several different resets. +The Zynq UltraScale+ MPSoC and Versal has several different resets. See Chapter 36 of the Zynq UltraScale+ MPSoC TRM (UG) for more information about zynqmp resets. @@ -10,7 +10,8 @@ Please also refer to reset.txt in this directory for common reset controller binding usage. Required Properties: -- compatible: "xlnx,zynqmp-reset" +- compatible: "xlnx,zynqmp-reset" for Zynq UltraScale+ MPSoC platform + "xlnx,versal-reset" for Versal platform - #reset-cells: Specifies the number of cells needed to encode reset line, should be 1 @@ -37,8 +38,10 @@ Device nodes that need access to reset lines should specify them as a reset phandle in their corresponding node as specified in reset.txt. -For list of all valid reset indicies see +For list of all valid reset indices for Zynq UltraScale+ MPSoC see +For list of all valid reset indices for Versal see + Example: diff --git a/include/dt-bindings/reset/xlnx-versal-resets.h b/include/dt-bindings/reset/xlnx-versal-resets.h new file mode 100644 index 000000000000..895424e9b0e5 --- /dev/null +++ b/include/dt-bindings/reset/xlnx-versal-resets.h @@ -0,0 +1,105 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (C) 2020 Xilinx, Inc. + */ + +#ifndef _DT_BINDINGS_VERSAL_RESETS_H +#define _DT_BINDINGS_VERSAL_RESETS_H + +#define VERSAL_RST_PMC_POR (0xc30c001U) +#define VERSAL_RST_PMC (0xc410002U) +#define VERSAL_RST_PS_POR (0xc30c003U) +#define VERSAL_RST_PL_POR (0xc30c004U) +#define VERSAL_RST_NOC_POR (0xc30c005U) +#define VERSAL_RST_FPD_POR (0xc30c006U) +#define VERSAL_RST_ACPU_0_POR (0xc30c007U) +#define VERSAL_RST_ACPU_1_POR (0xc30c008U) +#define VERSAL_RST_OCM2_POR (0xc30c009U) +#define VERSAL_RST_PS_SRST (0xc41000aU) +#define VERSAL_RST_PL_SRST (0xc41000bU) +#define VERSAL_RST_NOC (0xc41000cU) +#define VERSAL_RST_NPI (0xc41000dU) +#define VERSAL_RST_SYS_RST_1 (0xc41000eU) +#define VERSAL_RST_SYS_RST_2 (0xc41000fU) +#define VERSAL_RST_SYS_RST_3 (0xc410010U) +#define VERSAL_RST_FPD (0xc410011U) +#define VERSAL_RST_PL0 (0xc410012U) +#define VERSAL_RST_PL1 (0xc410013U) +#define VERSAL_RST_PL2 (0xc410014U) +#define VERSAL_RST_PL3 (0xc410015U) +#define VERSAL_RST_APU (0xc410016U) +#define VERSAL_RST_ACPU_0 (0xc410017U) +#define VERSAL_RST_ACPU_1 (0xc410018U) +#define VERSAL_RST_ACPU_L2 (0xc410019U) +#define VERSAL_RST_ACPU_GIC (0xc41001aU) +#define VERSAL_RST_RPU_ISLAND (0xc41001bU) +#define VERSAL_RST_RPU_AMBA (0xc41001cU) +#define VERSAL_RST_R5_0 (0xc41001dU) +#define VERSAL_RST_R5_1 (0xc41001eU) +#define VERSAL_RST_SYSMON_PMC_SEQ_RST (0xc41001fU) +#define VERSAL_RST_SYSMON_PMC_CFG_RST (0xc410020U) +#define VERSAL_RST_SYSMON_FPD_CFG_RST (0xc410021U) +#define VERSAL_RST_SYSMON_FPD_SEQ_RST (0xc410022U) +#define VERSAL_RST_SYSMON_LPD (0xc410023U) +#define VERSAL_RST_PDMA_RST1 (0xc410024U) +#define VERSAL_RST_PDMA_RST0 (0xc410025U) +#define VERSAL_RST_ADMA (0xc410026U) +#define VERSAL_RST_TIMESTAMP (0xc410027U) +#define VERSAL_RST_OCM (0xc410028U) +#define VERSAL_RST_OCM2_RST (0xc410029U) +#define VERSAL_RST_IPI (0xc41002aU) +#define VERSAL_RST_SBI (0xc41002bU) +#define VERSAL_RST_LPD (0xc41002cU) +#define VERSAL_RST_QSPI (0xc10402dU) +#define VERSAL_RST_OSPI (0xc10402eU) +#define VERSAL_RST_SDIO_0 (0xc10402fU) +#define VERSAL_RST_SDIO_1 (0xc104030U) +#define VERSAL_RST_I2C_PMC (0xc104031U) +#define VERSAL_RST_GPIO_PMC (0xc104032U) +#define VERSAL_RST_GEM_0 (0xc104033U) +#define VERSAL_RST_GEM_1 (0xc104034U) +#define VERSAL_RST_SPARE (0xc104035U) +#define VERSAL_RST_USB_0 (0xc104036U) +#define VERSAL_RST_UART_0 (0xc104037U) +#define VERSAL_RST_UART_1 (0xc104038U) +#define VERSAL_RST_SPI_0 (0xc104039U) +#define VERSAL_RST_SPI_1 (0xc10403aU) +#define VERSAL_RST_CAN_FD_0 (0xc10403bU) +#define VERSAL_RST_CAN_FD_1 (0xc10403cU) +#define VERSAL_RST_I2C_0 (0xc10403dU) +#define VERSAL_RST_I2C_1 (0xc10403eU) +#define VERSAL_RST_GPIO_LPD (0xc10403fU) +#define VERSAL_RST_TTC_0 (0xc104040U) +#define VERSAL_RST_TTC_1 (0xc104041U) +#define VERSAL_RST_TTC_2 (0xc104042U) +#define VERSAL_RST_TTC_3 (0xc104043U) +#define VERSAL_RST_SWDT_FPD (0xc104044U) +#define VERSAL_RST_SWDT_LPD (0xc104045U) +#define VERSAL_RST_USB (0xc104046U) +#define VERSAL_RST_DPC (0xc208047U) +#define VERSAL_RST_PMCDBG (0xc208048U) +#define VERSAL_RST_DBG_TRACE (0xc208049U) +#define VERSAL_RST_DBG_FPD (0xc20804aU) +#define VERSAL_RST_DBG_TSTMP (0xc20804bU) +#define VERSAL_RST_RPU0_DBG (0xc20804cU) +#define VERSAL_RST_RPU1_DBG (0xc20804dU) +#define VERSAL_RST_HSDP (0xc20804eU) +#define VERSAL_RST_DBG_LPD (0xc20804fU) +#define VERSAL_RST_CPM_POR (0xc30c050U) +#define VERSAL_RST_CPM (0xc410051U) +#define VERSAL_RST_CPMDBG (0xc208052U) +#define VERSAL_RST_PCIE_CFG (0xc410053U) +#define VERSAL_RST_PCIE_CORE0 (0xc410054U) +#define VERSAL_RST_PCIE_CORE1 (0xc410055U) +#define VERSAL_RST_PCIE_DMA (0xc410056U) +#define VERSAL_RST_CMN (0xc410057U) +#define VERSAL_RST_L2_0 (0xc410058U) +#define VERSAL_RST_L2_1 (0xc410059U) +#define VERSAL_RST_ADDR_REMAP (0xc41005aU) +#define VERSAL_RST_CPI0 (0xc41005bU) +#define VERSAL_RST_CPI1 (0xc41005cU) +#define VERSAL_RST_XRAM (0xc30c05dU) +#define VERSAL_RST_AIE_ARRAY (0xc10405eU) +#define VERSAL_RST_AIE_SHIM (0xc10405fU) + +#endif -- cgit v1.2.3 From 66e06509aa37bcf089ce341ec9c027922f105155 Mon Sep 17 00:00:00 2001 From: Lokesh Vutla Date: Mon, 14 Sep 2020 21:52:28 +0530 Subject: dt-bindings: arm: ti: Convert K3 board/soc bindings to DT schema Convert TI K3 Board/SoC bindings to DT schema format. Signed-off-by: Lokesh Vutla Signed-off-by: Nishanth Menon Reviewed-by: Grygorii Strashko Reviewed-by: Rob Herring Reviewed-by: Suman Anna Link: https://lore.kernel.org/r/20200914162231.2535-3-lokeshvutla@ti.com --- Documentation/devicetree/bindings/arm/ti/k3.txt | 26 -------------------- Documentation/devicetree/bindings/arm/ti/k3.yaml | 31 ++++++++++++++++++++++++ MAINTAINERS | 2 +- 3 files changed, 32 insertions(+), 27 deletions(-) delete mode 100644 Documentation/devicetree/bindings/arm/ti/k3.txt create mode 100644 Documentation/devicetree/bindings/arm/ti/k3.yaml (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/arm/ti/k3.txt b/Documentation/devicetree/bindings/arm/ti/k3.txt deleted file mode 100644 index 333e7256126a..000000000000 --- a/Documentation/devicetree/bindings/arm/ti/k3.txt +++ /dev/null @@ -1,26 +0,0 @@ -Texas Instruments K3 Multicore SoC architecture device tree bindings --------------------------------------------------------------------- - -Platforms based on Texas Instruments K3 Multicore SoC architecture -shall follow the following scheme: - -SoCs ----- - -Each device tree root node must specify which exact SoC in K3 Multicore SoC -architecture it uses, using one of the following compatible values: - -- AM654 - compatible = "ti,am654"; - -- J721E - compatible = "ti,j721e"; - -Boards ------- - -In addition, each device tree root node must specify which one or more -of the following board-specific compatible values: - -- AM654 EVM - compatible = "ti,am654-evm", "ti,am654"; diff --git a/Documentation/devicetree/bindings/arm/ti/k3.yaml b/Documentation/devicetree/bindings/arm/ti/k3.yaml new file mode 100644 index 000000000000..c5e3e4aeda8e --- /dev/null +++ b/Documentation/devicetree/bindings/arm/ti/k3.yaml @@ -0,0 +1,31 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/ti/k3.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Texas Instruments K3 Multicore SoC architecture device tree bindings + +maintainers: + - Nishanth Menon + +description: | + Platforms based on Texas Instruments K3 Multicore SoC architecture + shall have the following properties. + +properties: + $nodename: + const: '/' + compatible: + oneOf: + + - description: K3 AM654 SoC + items: + - enum: + - ti,am654-evm + - const: ti,am654 + + - description: K3 J721E SoC + items: + - const: ti,j721e +... diff --git a/MAINTAINERS b/MAINTAINERS index e4647c84c987..076fae9aa75b 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -2636,7 +2636,7 @@ M: Tero Kristo M: Nishanth Menon L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) S: Supported -F: Documentation/devicetree/bindings/arm/ti/k3.txt +F: Documentation/devicetree/bindings/arm/ti/k3.yaml F: arch/arm64/boot/dts/ti/Makefile F: arch/arm64/boot/dts/ti/k3-* F: include/dt-bindings/pinctrl/k3.h -- cgit v1.2.3 From 214b0eb35e55d9d726ad02ffec62f087c09864fb Mon Sep 17 00:00:00 2001 From: Lokesh Vutla Date: Mon, 14 Sep 2020 21:52:29 +0530 Subject: dt-bindings: arm: ti: Add bindings for J7200 SoC The J7200 SoC is a part of the K3 Multicore SoC architecture platform. It is targeted for automotive gateway, vehicle compute systems, Vehicle-to-Vehicle (V2V) and Vehicle-to-Everything (V2X) applications. The SoC aims to meet the complex processing needs of modern embedded products. Some highlights of this SoC are: * Dual Cortex-A72s in a single cluster, two clusters of lockstep capable dual Cortex-R5F MCUs and a Centralized Device Management and Security Controller (DMSC). * Configurable L3 Cache and IO-coherent architecture with high data throughput capable distributed DMA architecture under NAVSS. * Integrated Ethernet switch supporting up to a total of 4 external ports in addition to legacy Ethernet switch of up to 2 ports. * Upto 1 PCIe-GEN3 controller, 1 USB3.0 Dual-role device subsystems, 20 MCANs, 3 McASP, eMMC and SD, OSPI/HyperBus memory controller, I3C and I2C, eCAP/eQEP, eHRPWM among other peripherals. * One hardware accelerator block containing AES/DES/SHA/MD5 called SA2UL management. See J7200 Technical Reference Manual (SPRUIU1, June 2020) for further details: https://www.ti.com/lit/pdf/spruiu1 Signed-off-by: Lokesh Vutla Signed-off-by: Nishanth Menon Reviewed-by: Grygorii Strashko Reviewed-by: Rob Herring Reviewed-by: Suman Anna Link: https://lore.kernel.org/r/20200914162231.2535-4-lokeshvutla@ti.com --- Documentation/devicetree/bindings/arm/ti/k3.yaml | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/arm/ti/k3.yaml b/Documentation/devicetree/bindings/arm/ti/k3.yaml index c5e3e4aeda8e..829751209543 100644 --- a/Documentation/devicetree/bindings/arm/ti/k3.yaml +++ b/Documentation/devicetree/bindings/arm/ti/k3.yaml @@ -28,4 +28,8 @@ properties: - description: K3 J721E SoC items: - const: ti,j721e + + - description: K3 J7200 SoC + items: + - const: ti,j7200 ... -- cgit v1.2.3 From f3a622297b045e03d07a2e1a6661134505fa8a8d Mon Sep 17 00:00:00 2001 From: Marcin Sloniewski Date: Sun, 9 Aug 2020 18:44:48 +0200 Subject: dt-bindings: vendor-prefixes: add Seeed Studio Add the "seeed" vendor prefix for Seeed Technology Co., Ltd Website: https://www.seeedstudio.com/ Signed-off-by: Marcin Sloniewski Acked-by: Rob Herring Signed-off-by: Alexandre Torgue --- Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml index 2baee2c817c1..70cfac65dc55 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml @@ -910,6 +910,8 @@ patternProperties: description: Schindler "^seagate,.*": description: Seagate Technology PLC + "^seeed,.*": + description: Seeed Technology Co., Ltd "^seirobotics,.*": description: Shenzhen SEI Robotics Co., Ltd "^semtech,.*": -- cgit v1.2.3 From 0e2807579a344dff804b4e111c8ccddb0e2e1feb Mon Sep 17 00:00:00 2001 From: Marcin Sloniewski Date: Sun, 9 Aug 2020 18:44:49 +0200 Subject: dt-bindings: arm: stm32: document Odyssey compatible Document device tree bindings of Seeed SoM and carrier board. Signed-off-by: Marcin Sloniewski Reviewed-by: Rob Herring Signed-off-by: Alexandre Torgue --- Documentation/devicetree/bindings/arm/stm32/stm32.yaml | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/arm/stm32/stm32.yaml b/Documentation/devicetree/bindings/arm/stm32/stm32.yaml index 790e6dd48e34..3b318fe15194 100644 --- a/Documentation/devicetree/bindings/arm/stm32/stm32.yaml +++ b/Documentation/devicetree/bindings/arm/stm32/stm32.yaml @@ -50,4 +50,10 @@ properties: - const: st,stm32mp157c-ev1 - const: st,stm32mp157c-ed1 - const: st,stm32mp157 + - description: Odyssey STM32MP1 SoM based Boards + items: + - enum: + - seeed,stm32mp157c-odyssey + - const: seeed,stm32mp157c-odyssey-som + - const: st,stm32mp157 ... -- cgit v1.2.3 From 0142ee3f2e88ef894427e926b3c8ad7c95964b01 Mon Sep 17 00:00:00 2001 From: Marian-Cristian Rotariu Date: Tue, 25 Aug 2020 11:44:54 +0100 Subject: dt-bindings: pwm: renesas,pwm-rcar: Add r8a774e1 support Document RZ/G2H (R8A774E1) SoC bindings. No driver change is needed due to the fallback compatible value "renesas,pwm-rcar". Signed-off-by: Marian-Cristian Rotariu Signed-off-by: Lad Prabhakar Reviewed-by: Geert Uytterhoeven Reviewed-by: Yoshihiro Shimoda Acked-by: Rob Herring Signed-off-by: Thierry Reding --- Documentation/devicetree/bindings/pwm/renesas,pwm-rcar.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/pwm/renesas,pwm-rcar.yaml b/Documentation/devicetree/bindings/pwm/renesas,pwm-rcar.yaml index daadde9ff9c4..5407c11e92a4 100644 --- a/Documentation/devicetree/bindings/pwm/renesas,pwm-rcar.yaml +++ b/Documentation/devicetree/bindings/pwm/renesas,pwm-rcar.yaml @@ -20,6 +20,7 @@ properties: - renesas,pwm-r8a774a1 # RZ/G2M - renesas,pwm-r8a774b1 # RZ/G2N - renesas,pwm-r8a774c0 # RZ/G2E + - renesas,pwm-r8a774e1 # RZ/G2H - renesas,pwm-r8a7778 # R-Car M1A - renesas,pwm-r8a7779 # R-Car H1 - renesas,pwm-r8a7790 # R-Car H2 -- cgit v1.2.3 From 965fe1ceea05de735f63d1c1f90f0310fc830a8d Mon Sep 17 00:00:00 2001 From: Bastian Krause Date: Thu, 17 Sep 2020 20:32:39 +0200 Subject: dt-bindings: rtc: let aux-voltage-chargeable supersede trickle-diode-disable Some RTCs can be equipped with a chargeable battery or supercap. Every RTC allowing this whose driver's implement it are charged by default. To disable this the trickle-diode-disable flag exists. If a driver did not support charging and some time later one wants to add that feature, there is currently no way to do it without breaking dt backwards compatibility. RTCs on boards without the trickle-diode-disable flag in their device tree would suddenly charge their battery/supercap which is a change in behavior. Change that by introducing aux-voltage-chargeable, not as a flag but as a uint32 enum allowing to set "do not charge" (0) or "charge" (1). This dt property is optional, so we can now distinguish these cases. Care must be taken to support the old behavior for device trees without aux-voltage-chargeable nonetheless to stay compatible. Signed-off-by: Bastian Krause Signed-off-by: Alexandre Belloni Reviewed-by: Rob Herring Link: https://lore.kernel.org/r/20200917183246.19446-2-bst@pengutronix.de --- Documentation/devicetree/bindings/rtc/rtc.yaml | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/rtc/rtc.yaml b/Documentation/devicetree/bindings/rtc/rtc.yaml index ee237b2ed66a..6b8a11325691 100644 --- a/Documentation/devicetree/bindings/rtc/rtc.yaml +++ b/Documentation/devicetree/bindings/rtc/rtc.yaml @@ -17,6 +17,15 @@ properties: $nodename: pattern: "^rtc(@.*|-[0-9a-f])*$" + aux-voltage-chargeable: + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [0, 1] + description: | + Tells whether the battery/supercap of the RTC (if any) is + chargeable or not: + 0: not chargeable + 1: chargeable + quartz-load-femtofarads: $ref: /schemas/types.yaml#/definitions/uint32 description: @@ -35,6 +44,7 @@ properties: description: Do not use internal trickle charger diode. Should be given if internal trickle charger diode should be disabled. + deprecated: true trickle-resistor-ohms: $ref: /schemas/types.yaml#/definitions/uint32 -- cgit v1.2.3 From c53cee48670cc623a42e49319a261798d8608b0e Mon Sep 17 00:00:00 2001 From: Bastian Krause Date: Thu, 17 Sep 2020 20:32:40 +0200 Subject: dt-bindings: rtc: ds1307: let aux-voltage-chargeable supersede trickle-diode-disable trickle-diode-disable is deprecated, so reflect that in the driver's binding and add the new aux-voltage-chargeable. Signed-off-by: Bastian Krause Signed-off-by: Alexandre Belloni Reviewed-by: Rob Herring Link: https://lore.kernel.org/r/20200917183246.19446-3-bst@pengutronix.de --- Documentation/devicetree/bindings/rtc/rtc-ds1307.txt | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/rtc/rtc-ds1307.txt b/Documentation/devicetree/bindings/rtc/rtc-ds1307.txt index 66f0a31ae9ce..08ea9734da80 100644 --- a/Documentation/devicetree/bindings/rtc/rtc-ds1307.txt +++ b/Documentation/devicetree/bindings/rtc/rtc-ds1307.txt @@ -31,9 +31,16 @@ Optional properties: Selected resistor for trickle charger Possible values are 250, 2000, 4000 Should be given if trickle charger should be enabled -- trickle-diode-disable : ds1339, ds1340 and ds 1388 only +- aux-voltage-chargeable: ds1339, ds1340 and ds1388 only + Tells whether the battery/supercap of the RTC (if any) is + chargeable or not. + Possible values are 0 (not chargeable), 1 (chargeable) + +Deprecated properties: +- trickle-diode-disable : ds1339, ds1340 and ds1388 only Do not use internal trickle charger diode Should be given if internal trickle charger diode should be disabled + (superseded by aux-voltage-chargeable) Example: ds1339: rtc@68 { -- cgit v1.2.3 From 40d58c9742286ef95ef8dc5885d4043224490c82 Mon Sep 17 00:00:00 2001 From: Bastian Krause Date: Thu, 17 Sep 2020 20:32:41 +0200 Subject: dt-bindings: rtc: ds1307: add rx8130 aux-voltage-chargeable support Epson's RX8130 was not charged before. A related patch will allow optional charging. Signed-off-by: Bastian Krause Signed-off-by: Alexandre Belloni Reviewed-by: Rob Herring Link: https://lore.kernel.org/r/20200917183246.19446-4-bst@pengutronix.de --- Documentation/devicetree/bindings/rtc/rtc-ds1307.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/rtc/rtc-ds1307.txt b/Documentation/devicetree/bindings/rtc/rtc-ds1307.txt index 08ea9734da80..36f610bb051e 100644 --- a/Documentation/devicetree/bindings/rtc/rtc-ds1307.txt +++ b/Documentation/devicetree/bindings/rtc/rtc-ds1307.txt @@ -31,7 +31,7 @@ Optional properties: Selected resistor for trickle charger Possible values are 250, 2000, 4000 Should be given if trickle charger should be enabled -- aux-voltage-chargeable: ds1339, ds1340 and ds1388 only +- aux-voltage-chargeable: ds1339, ds1340, ds1388 and rx8130 only Tells whether the battery/supercap of the RTC (if any) is chargeable or not. Possible values are 0 (not chargeable), 1 (chargeable) -- cgit v1.2.3 From 412b7a521c3094cc0d664dd20d114c717df89896 Mon Sep 17 00:00:00 2001 From: Jon Hunter Date: Wed, 16 Sep 2020 10:49:49 +0100 Subject: dt-bindings: eeprom: at24: Add label property for AT24 Add a label property for the AT24 EEPROM to allow a custom name to be used for identifying the EEPROM on a board. This is useful when there is more than one EEPROM present. Signed-off-by: Jon Hunter Reviewed-by: Rob Herring Signed-off-by: Bartosz Golaszewski --- Documentation/devicetree/bindings/eeprom/at24.yaml | 3 +++ 1 file changed, 3 insertions(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/eeprom/at24.yaml b/Documentation/devicetree/bindings/eeprom/at24.yaml index 4cee72d53318..6edfa705b486 100644 --- a/Documentation/devicetree/bindings/eeprom/at24.yaml +++ b/Documentation/devicetree/bindings/eeprom/at24.yaml @@ -114,6 +114,9 @@ properties: - const: renesas,r1ex24128 - const: atmel,24c128 + label: + description: Descriptive name of the EEPROM. + reg: maxItems: 1 -- cgit v1.2.3 From 2372b506115b411c6127c94798d575e0cf5b58b6 Mon Sep 17 00:00:00 2001 From: "周琰杰 (Zhou Yanjie)" Date: Tue, 22 Sep 2020 09:24:42 +0800 Subject: dt-bindings: MIPS: Add X2000E based CU2000-Neo. MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add bindings for Ingenic X2000E based board, prepare for later dts. Signed-off-by: 周琰杰 (Zhou Yanjie) Signed-off-by: Thomas Bogendoerfer --- Documentation/devicetree/bindings/mips/ingenic/devices.yaml | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/mips/ingenic/devices.yaml b/Documentation/devicetree/bindings/mips/ingenic/devices.yaml index 83c86cbe4716..dc21b4630c25 100644 --- a/Documentation/devicetree/bindings/mips/ingenic/devices.yaml +++ b/Documentation/devicetree/bindings/mips/ingenic/devices.yaml @@ -47,4 +47,9 @@ properties: items: - const: yna,cu1830-neo - const: ingenic,x1830 + + - description: YSH & ATIL General Board, CU2000 Module with Neo Backplane + items: + - const: yna,cu2000-neo + - const: ingenic,x2000e ... -- cgit v1.2.3 From d9becc53b3ade81e234205e1983f2a0240974f89 Mon Sep 17 00:00:00 2001 From: Khalil Blaiech Date: Tue, 22 Sep 2020 18:49:38 -0400 Subject: dt-bindings: i2c: I2C binding for Mellanox BlueField SoC Add device tree bindings documentation for Mellanox BlueField I2C SMBus controller. Signed-off-by: Khalil Blaiech Signed-off-by: Wolfram Sang --- .../devicetree/bindings/i2c/mellanox,i2c-mlxbf.txt | 42 ++++++++++++++++++++++ 1 file changed, 42 insertions(+) create mode 100644 Documentation/devicetree/bindings/i2c/mellanox,i2c-mlxbf.txt (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/i2c/mellanox,i2c-mlxbf.txt b/Documentation/devicetree/bindings/i2c/mellanox,i2c-mlxbf.txt new file mode 100644 index 000000000000..566ea861aa00 --- /dev/null +++ b/Documentation/devicetree/bindings/i2c/mellanox,i2c-mlxbf.txt @@ -0,0 +1,42 @@ +Device tree configuration for the Mellanox I2C SMBus on BlueField SoCs + +Required Properties: + +- compatible : should be "mellanox,i2c-mlxbf1" or "mellanox,i2c-mlxbf2". + +- reg : address offset and length of the device registers. The + registers consist of the following set of resources: + 1) Smbus block registers. + 2) Cause master registers. + 3) Cause slave registers. + 4) Cause coalesce registers (if compatible isn't set + to "mellanox,i2c-mlxbf1"). + +- interrupts : interrupt number. + +Optional Properties: + +- clock-frequency : bus frequency used to configure timing registers; + allowed values are 100000, 400000 and 1000000; + those are expressed in Hz. Default is 100000. + +Example: + +i2c@2804000 { + compatible = "mellanox,i2c-mlxbf1"; + reg = <0x02804000 0x800>, + <0x02801200 0x020>, + <0x02801260 0x020>; + interrupts = <57>; + clock-frequency = <100000>; +}; + +i2c@2808800 { + compatible = "mellanox,i2c-mlxbf2"; + reg = <0x02808800 0x600>, + <0x02808e00 0x020>, + <0x02808e20 0x020>, + <0x02808e40 0x010>; + interrupts = <57>; + clock-frequency = <400000>; +}; -- cgit v1.2.3 From 41c38c272e2cc021c833030c3f5a97945ae2b773 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 17 Sep 2020 21:13:18 +0200 Subject: dt-bindings: i2c: imx-lpi2c: Add properties and use unevaluatedProperties Additional properties actually might appear (e.g. power-domains) so describe all typical properties, reference generic i2c schema and use unevaluatedProperties to fix dtbs_check warnings like: arch/arm64/boot/dts/freescale/imx8qxp-ai_ml.dt.yaml: i2c@5a800000: 'assigned-clock-rates', 'assigned-clocks', 'clock-names', 'power-domains' do not match any of the regexes: 'pinctrl-[0-9]+' arch/arm64/boot/dts/freescale/imx8qxp-colibri-eval-v3.dt.yaml: i2c@5a800000: 'touchscreen@2c' does not match any of the regexes: 'pinctrl-[0-9]+' Signed-off-by: Krzysztof Kozlowski Reviewed-by: Rob Herring Signed-off-by: Wolfram Sang --- .../devicetree/bindings/i2c/i2c-imx-lpi2c.yaml | 18 ++++++++++++++++-- 1 file changed, 16 insertions(+), 2 deletions(-) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/i2c/i2c-imx-lpi2c.yaml b/Documentation/devicetree/bindings/i2c/i2c-imx-lpi2c.yaml index ac0bc5dd64d6..bf68489eecd1 100644 --- a/Documentation/devicetree/bindings/i2c/i2c-imx-lpi2c.yaml +++ b/Documentation/devicetree/bindings/i2c/i2c-imx-lpi2c.yaml @@ -9,6 +9,9 @@ title: Freescale Low Power Inter IC (LPI2C) for i.MX maintainers: - Anson Huang +allOf: + - $ref: /schemas/i2c/i2c-controller.yaml# + properties: compatible: enum: @@ -22,23 +25,34 @@ properties: interrupts: maxItems: 1 + assigned-clock-parents: true + assigned-clock-rates: true + assigned-clocks: true + clock-frequency: true + + clock-names: + maxItems: 1 + clocks: maxItems: 1 + power-domains: + maxItems: 1 + required: - compatible - reg - interrupts - clocks -additionalProperties: false +unevaluatedProperties: false examples: - | #include #include - lpi2c7@40a50000 { + i2c@40a50000 { compatible = "fsl,imx7ulp-lpi2c"; reg = <0x40A50000 0x10000>; interrupt-parent = <&intc>; -- cgit v1.2.3 From 755f6292e3fae4a08ce3d238c9508b84a73ac47d Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 17 Sep 2020 21:13:19 +0200 Subject: dt-bindings: i2c: imx-lpi2c: Fix i.MX 8QXP compatible matching The i.MX 8QXP DTSes use two compatibles so update the binding to fix dtbs_check warnings like: arch/arm64/boot/dts/freescale/imx8qxp-mek.dt.yaml: i2c@5a820000: compatible: ['fsl,imx8qxp-lpi2c', 'fsl,imx7ulp-lpi2c'] is too long Signed-off-by: Krzysztof Kozlowski Reviewed-by: Rob Herring Signed-off-by: Wolfram Sang --- Documentation/devicetree/bindings/i2c/i2c-imx-lpi2c.yaml | 11 +++++++---- 1 file changed, 7 insertions(+), 4 deletions(-) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/i2c/i2c-imx-lpi2c.yaml b/Documentation/devicetree/bindings/i2c/i2c-imx-lpi2c.yaml index bf68489eecd1..29b9447f3b84 100644 --- a/Documentation/devicetree/bindings/i2c/i2c-imx-lpi2c.yaml +++ b/Documentation/devicetree/bindings/i2c/i2c-imx-lpi2c.yaml @@ -14,10 +14,13 @@ allOf: properties: compatible: - enum: - - fsl,imx7ulp-lpi2c - - fsl,imx8qxp-lpi2c - - fsl,imx8qm-lpi2c + oneOf: + - enum: + - fsl,imx7ulp-lpi2c + - fsl,imx8qm-lpi2c + - items: + - const: fsl,imx8qxp-lpi2c + - const: fsl,imx7ulp-lpi2c reg: maxItems: 1 -- cgit v1.2.3 From 37859693f83f9325559d8ec980310b3a13fa5924 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 17 Sep 2020 21:13:20 +0200 Subject: dt-bindings: i2c: imx: Add properties and use unevaluatedProperties Additional properties actually might appear (e.g. power-domains) so describe all typical properties, reference generic i2c schema and use unevaluatedProperties to fix dtbs_check warnings like: arch/arm64/boot/dts/freescale/imx8mn-evk.dt.yaml: i2c@30a20000: '#address-cells', '#size-cells', 'pmic@25' do not match any of the regexes: 'pinctrl-[0-9]+' Signed-off-by: Krzysztof Kozlowski Reviewed-by: Rob Herring Signed-off-by: Wolfram Sang --- Documentation/devicetree/bindings/i2c/i2c-imx.yaml | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/i2c/i2c-imx.yaml b/Documentation/devicetree/bindings/i2c/i2c-imx.yaml index 810536953177..a0c87307ca07 100644 --- a/Documentation/devicetree/bindings/i2c/i2c-imx.yaml +++ b/Documentation/devicetree/bindings/i2c/i2c-imx.yaml @@ -9,6 +9,9 @@ title: Freescale Inter IC (I2C) and High Speed Inter IC (HS-I2C) for i.MX maintainers: - Wolfram Sang +allOf: + - $ref: /schemas/i2c/i2c-controller.yaml# + properties: compatible: oneOf: @@ -75,7 +78,7 @@ required: - interrupts - clocks -additionalProperties: false +unevaluatedProperties: false examples: - | -- cgit v1.2.3 From d0fa235c0a6131925ff1e9839f1135c693e73dfa Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 17 Sep 2020 21:13:21 +0200 Subject: dt-bindings: i2c: imx: Fix i.MX 7 compatible matching The i.MX 7 DTSes use two compatibles so update the binding to fix dtbs_check warnings like: arch/arm/boot/dts/imx7d-cl-som-imx7.dt.yaml: i2c@30a20000: compatible: ['fsl,imx7d-i2c', 'fsl,imx21-i2c'] is not valid under any of the given schemas (Possible causes of the failure): arch/arm/boot/dts/imx7d-cl-som-imx7.dt.yaml: i2c@30a20000: compatible: ['fsl,imx7d-i2c', 'fsl,imx21-i2c'] is too long Signed-off-by: Krzysztof Kozlowski Reviewed-by: Rob Herring Signed-off-by: Wolfram Sang --- Documentation/devicetree/bindings/i2c/i2c-imx.yaml | 3 +++ 1 file changed, 3 insertions(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/i2c/i2c-imx.yaml b/Documentation/devicetree/bindings/i2c/i2c-imx.yaml index a0c87307ca07..f23966b0d6c6 100644 --- a/Documentation/devicetree/bindings/i2c/i2c-imx.yaml +++ b/Documentation/devicetree/bindings/i2c/i2c-imx.yaml @@ -21,6 +21,9 @@ properties: - items: - const: fsl,imx35-i2c - const: fsl,imx1-i2c + - items: + - const: fsl,imx7d-i2c + - const: fsl,imx21-i2c - items: - enum: - fsl,imx25-i2c -- cgit v1.2.3 From 61f4bc990b378d10ee2964c764f92363e1fd6ed4 Mon Sep 17 00:00:00 2001 From: Icenowy Zheng Date: Wed, 23 Sep 2020 09:02:14 +0800 Subject: dt-bindings: arm: sunxi: add Pine64 PineCube binding Document board compatible names for Pine64 PineCube IP camera. Signed-off-by: Icenowy Zheng Signed-off-by: Maxime Ripard Link: https://lore.kernel.org/r/20200923010215.148819-1-icenowy@aosc.io --- Documentation/devicetree/bindings/arm/sunxi.yaml | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/arm/sunxi.yaml b/Documentation/devicetree/bindings/arm/sunxi.yaml index 5957a22c2e95..afa00268c7db 100644 --- a/Documentation/devicetree/bindings/arm/sunxi.yaml +++ b/Documentation/devicetree/bindings/arm/sunxi.yaml @@ -631,6 +631,11 @@ properties: - const: pine64,pine64-plus - const: allwinner,sun50i-a64 + - description: Pine64 PineCube + items: + - const: pine64,pinecube + - const: allwinner,sun8i-s3 + - description: Pine64 PineH64 model A items: - const: pine64,pine-h64 -- cgit v1.2.3 From 7956b0d4694fb4bf75c4b1b4bcb6cf7092bd5195 Mon Sep 17 00:00:00 2001 From: Artur Rojek Date: Mon, 28 Sep 2020 16:09:09 -0700 Subject: dt-bindings: input: Add docs for ADC driven joystick Add documentation for the adc-joystick driver, used to provide support for joysticks connected over ADC. Signed-off-by: Artur Rojek Tested-by: Paul Cercueil Reviewed-by: Rob Herring Link: https://lore.kernel.org/r/20200927123302.31062-1-contact@artur-rojek.eu Signed-off-by: Dmitry Torokhov --- .../devicetree/bindings/input/adc-joystick.yaml | 121 +++++++++++++++++++++ 1 file changed, 121 insertions(+) create mode 100644 Documentation/devicetree/bindings/input/adc-joystick.yaml (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/input/adc-joystick.yaml b/Documentation/devicetree/bindings/input/adc-joystick.yaml new file mode 100644 index 000000000000..054406bbd22b --- /dev/null +++ b/Documentation/devicetree/bindings/input/adc-joystick.yaml @@ -0,0 +1,121 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +# Copyright 2019-2020 Artur Rojek +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/input/adc-joystick.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: ADC attached joystick + +maintainers: + - Artur Rojek + +description: > + Bindings for joystick devices connected to ADC controllers supporting + the Industrial I/O subsystem. + +properties: + compatible: + const: adc-joystick + + io-channels: + minItems: 1 + maxItems: 1024 + description: > + List of phandle and IIO specifier pairs. + Each pair defines one ADC channel to which a joystick axis is connected. + See Documentation/devicetree/bindings/iio/iio-bindings.txt for details. + + '#address-cells': + const: 1 + + '#size-cells': + const: 0 + +required: + - compatible + - io-channels + - '#address-cells' + - '#size-cells' + +additionalProperties: false + +patternProperties: + "^axis@[0-9a-f]+$": + type: object + description: > + Represents a joystick axis bound to the given ADC channel. + For each entry in the io-channels list, one axis subnode with a matching + reg property must be specified. + + properties: + reg: + minimum: 0 + maximum: 1023 + description: Index of an io-channels list entry bound to this axis. + + linux,code: + $ref: /schemas/types.yaml#/definitions/uint32 + description: EV_ABS specific event code generated by the axis. + + abs-range: + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32-array + - items: + - description: minimum value + - description: maximum value + description: > + Minimum and maximum values produced by the axis. + For an ABS_X axis this will be the left-most and right-most + inclination of the joystick. If min > max, it is left to userspace to + treat the axis as inverted. + This property is interpreted as two signed 32 bit values. + + abs-fuzz: + $ref: /schemas/types.yaml#/definitions/uint32 + description: > + Amount of noise in the input value. + Omitting this property indicates the axis is precise. + + abs-flat: + $ref: /schemas/types.yaml#/definitions/uint32 + description: > + Axial "deadzone", or area around the center position, where the axis + is considered to be at rest. + Omitting this property indicates the axis always returns to exactly + the center position. + + required: + - reg + - linux,code + - abs-range + + additionalProperties: false + +examples: + - | + #include + #include + + joystick: adc-joystick { + compatible = "adc-joystick"; + io-channels = <&adc INGENIC_ADC_TOUCH_XP>, + <&adc INGENIC_ADC_TOUCH_YP>; + #address-cells = <1>; + #size-cells = <0>; + + axis@0 { + reg = <0>; + linux,code = ; + abs-range = <3300 0>; + abs-fuzz = <4>; + abs-flat = <200>; + }; + axis@1 { + reg = <1>; + linux,code = ; + abs-range = <0 3300>; + abs-fuzz = <4>; + abs-flat = <200>; + }; + }; -- cgit v1.2.3 From 8d58ca2754f18eed4d0461c99755e844bb5ef4cc Mon Sep 17 00:00:00 2001 From: Artur Rojek Date: Sat, 26 Sep 2020 19:35:28 +0200 Subject: dt-bindings: power: Convert ingenic,battery.txt to YAML Convert the textual documentation of Device Tree bindings for the Ingenic JZ47xx SoCs battery to YAML. Signed-off-by: Artur Rojek Reviewed-by: Rob Herring Signed-off-by: Sebastian Reichel --- .../bindings/power/supply/ingenic,battery.txt | 31 ------------ .../bindings/power/supply/ingenic,battery.yaml | 55 ++++++++++++++++++++++ 2 files changed, 55 insertions(+), 31 deletions(-) delete mode 100644 Documentation/devicetree/bindings/power/supply/ingenic,battery.txt create mode 100644 Documentation/devicetree/bindings/power/supply/ingenic,battery.yaml (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/power/supply/ingenic,battery.txt b/Documentation/devicetree/bindings/power/supply/ingenic,battery.txt deleted file mode 100644 index 66430bf73815..000000000000 --- a/Documentation/devicetree/bindings/power/supply/ingenic,battery.txt +++ /dev/null @@ -1,31 +0,0 @@ -* Ingenic JZ47xx battery bindings - -Required properties: - -- compatible: Must be "ingenic,jz4740-battery". -- io-channels: phandle and IIO specifier pair to the IIO device. - Format described in iio-bindings.txt. -- monitored-battery: phandle to a "simple-battery" compatible node. - -The "monitored-battery" property must be a phandle to a node using the format -described in battery.txt, with the following properties being required: - -- voltage-min-design-microvolt: Drained battery voltage. -- voltage-max-design-microvolt: Fully charged battery voltage. - -Example: - -#include - -simple_battery: battery { - compatible = "simple-battery"; - voltage-min-design-microvolt = <3600000>; - voltage-max-design-microvolt = <4200000>; -}; - -ingenic_battery { - compatible = "ingenic,jz4740-battery"; - io-channels = <&adc INGENIC_ADC_BATTERY>; - io-channel-names = "battery"; - monitored-battery = <&simple_battery>; -}; diff --git a/Documentation/devicetree/bindings/power/supply/ingenic,battery.yaml b/Documentation/devicetree/bindings/power/supply/ingenic,battery.yaml new file mode 100644 index 000000000000..446cd329f527 --- /dev/null +++ b/Documentation/devicetree/bindings/power/supply/ingenic,battery.yaml @@ -0,0 +1,55 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +# Copyright 2019-2020 Artur Rojek +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/power/supply/ingenic,battery.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Ingenic JZ47xx battery bindings + +maintainers: + - Artur Rojek + +properties: + compatible: + const: ingenic,jz4740-battery + + io-channels: + maxItems: 1 + + io-channel-names: + const: battery + + monitored-battery: + description: > + phandle to a "simple-battery" compatible node. + + This property must be a phandle to a node using the format described + in battery.yaml, with the following properties being required: + - voltage-min-design-microvolt: drained battery voltage, + - voltage-max-design-microvolt: fully charged battery voltage. + +required: + - compatible + - io-channels + - io-channel-names + - monitored-battery + +additionalProperties: false + +examples: + - | + #include + + simple_battery: battery { + compatible = "simple-battery"; + voltage-min-design-microvolt = <3600000>; + voltage-max-design-microvolt = <4200000>; + }; + + ingenic-battery { + compatible = "ingenic,jz4740-battery"; + io-channels = <&adc INGENIC_ADC_BATTERY>; + io-channel-names = "battery"; + monitored-battery = <&simple_battery>; + }; -- cgit v1.2.3 From 5fb768a5a47ac7d3a4d0e6747a0751de58c742ea Mon Sep 17 00:00:00 2001 From: Artur Rojek Date: Sat, 26 Sep 2020 19:35:29 +0200 Subject: dt-bindings: power: ingenic,battery: add new compatibles This binding can support Ingenic JZ4725B and JZ4770 SoCs, as they are compatible with Ingenic JZ4740 battery. Introduce the following compatible property combinations: compatible = "ingenic,jz4725b-battery", "ingenic,jz4740-battery", compatible = "ingenic,jz4770-battery", "ingenic,jz4740-battery" Signed-off-by: Artur Rojek Reviewed-by: Rob Herring Signed-off-by: Sebastian Reichel --- .../devicetree/bindings/power/supply/ingenic,battery.yaml | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/power/supply/ingenic,battery.yaml b/Documentation/devicetree/bindings/power/supply/ingenic,battery.yaml index 446cd329f527..867e3e6b7e80 100644 --- a/Documentation/devicetree/bindings/power/supply/ingenic,battery.yaml +++ b/Documentation/devicetree/bindings/power/supply/ingenic,battery.yaml @@ -12,7 +12,13 @@ maintainers: properties: compatible: - const: ingenic,jz4740-battery + oneOf: + - const: ingenic,jz4740-battery + - items: + - enum: + - ingenic,jz4725b-battery + - ingenic,jz4770-battery + - const: ingenic,jz4740-battery io-channels: maxItems: 1 -- cgit v1.2.3 From c8db568375fae4dc4297e8997b4ab0a541c37e5a Mon Sep 17 00:00:00 2001 From: Michał Mirosław Date: Sat, 26 Sep 2020 21:05:34 +0200 Subject: power: supply: bq25890: document IBAT compensation DT properties MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Document new properties for IBAT compensation feature. Signed-off-by: Michał Mirosław Reviewed-by: Rob Herring Signed-off-by: Sebastian Reichel --- Documentation/devicetree/bindings/power/supply/bq25890.txt | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/power/supply/bq25890.txt b/Documentation/devicetree/bindings/power/supply/bq25890.txt index 3b4c69a7fa70..805040c6fff9 100644 --- a/Documentation/devicetree/bindings/power/supply/bq25890.txt +++ b/Documentation/devicetree/bindings/power/supply/bq25890.txt @@ -33,6 +33,10 @@ Optional properties: - ti,thermal-regulation-threshold: integer, temperature above which the charge current is lowered, to avoid overheating (in degrees Celsius). If omitted, the default setting will be used (120 degrees); +- ti,ibatcomp-micro-ohms: integer, value of a resistor in series with + the battery; +- ti,ibatcomp-clamp-microvolt: integer, maximum charging voltage adjustment due + to expected voltage drop on in-series resistor; Example: -- cgit v1.2.3 From 9d5c8df1b93999191856533ead6c4ff21b13c44b Mon Sep 17 00:00:00 2001 From: Oleksij Rempel Date: Wed, 23 Sep 2020 14:53:01 +0200 Subject: dt-binding: can: mcp25xxfd: documentation fixes Apply following fixes: - Use 'interrupts'. (interrupts-extended will automagically be supported by the tools) - *-supply is always a single item. So, drop maxItems=1 - add "additionalProperties: false" flag to detect unneeded properties. Signed-off-by: Oleksij Rempel Link: https://lore.kernel.org/r/20200923125301.27200-1-o.rempel@pengutronix.de Reported-by: Rob Herring Reviewed-by: Rob Herring Fixes: 1b5a78e69c1f ("dt-binding: can: mcp25xxfd: document device tree bindings") Signed-off-by: Marc Kleine-Budde --- .../devicetree/bindings/net/can/microchip,mcp25xxfd.yaml | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/net/can/microchip,mcp25xxfd.yaml b/Documentation/devicetree/bindings/net/can/microchip,mcp25xxfd.yaml index aa2cad14d6d7..5beb00a614bf 100644 --- a/Documentation/devicetree/bindings/net/can/microchip,mcp25xxfd.yaml +++ b/Documentation/devicetree/bindings/net/can/microchip,mcp25xxfd.yaml @@ -24,7 +24,7 @@ properties: reg: maxItems: 1 - interrupts-extended: + interrupts: maxItems: 1 clocks: @@ -32,11 +32,9 @@ properties: vdd-supply: description: Regulator that powers the CAN controller. - maxItems: 1 xceiver-supply: description: Regulator that powers the CAN transceiver. - maxItems: 1 microchip,rx-int-gpios: description: @@ -52,9 +50,11 @@ properties: required: - compatible - reg - - interrupts-extended + - interrupts - clocks +additionalProperties: false + examples: - | #include -- cgit v1.2.3 From 0e051294c03e84e1dcb9c84d105d762aedb27364 Mon Sep 17 00:00:00 2001 From: Thomas Kopp Date: Wed, 30 Sep 2020 11:14:23 +0200 Subject: dt-binding: can: mcp251xfd: narrow down wildcards in device tree bindings to "microchip,mcp251xfd" The wildcard should be narrowed down to prevent existing and future devices that are not compatible from matching. It is very unlikely that incompatible devices will be released that do not match the wildcard. This is the documentation part of the commit. Discussion Reference: https://lore.kernel.org/r/CAMuHMdVkwGjr6dJuMyhQNqFoJqbh6Ec5V2b5LenCshwpM2SDsQ@mail.gmail.com Reported-by: Geert Uytterhoeven Signed-off-by: Thomas Kopp Link: https://lore.kernel.org/r/20200930091423.755-2-thomas.kopp@microchip.com [mkl: rename file, too] Signed-off-by: Marc Kleine-Budde --- .../bindings/net/can/microchip,mcp251xfd.yaml | 79 ++++++++++++++++++++++ .../bindings/net/can/microchip,mcp25xxfd.yaml | 79 ---------------------- 2 files changed, 79 insertions(+), 79 deletions(-) create mode 100644 Documentation/devicetree/bindings/net/can/microchip,mcp251xfd.yaml delete mode 100644 Documentation/devicetree/bindings/net/can/microchip,mcp25xxfd.yaml (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/net/can/microchip,mcp251xfd.yaml b/Documentation/devicetree/bindings/net/can/microchip,mcp251xfd.yaml new file mode 100644 index 000000000000..2a884c1fe0e0 --- /dev/null +++ b/Documentation/devicetree/bindings/net/can/microchip,mcp251xfd.yaml @@ -0,0 +1,79 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/can/microchip,mcp251xfd.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: + Microchip MCP2517FD and MCP2518FD stand-alone CAN controller device tree + bindings + +maintainers: + - Marc Kleine-Budde + +properties: + compatible: + oneOf: + - const: microchip,mcp2517fd + description: for MCP2517FD + - const: microchip,mcp2518fd + description: for MCP2518FD + - const: microchip,mcp251xfd + description: to autodetect chip variant + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + maxItems: 1 + + vdd-supply: + description: Regulator that powers the CAN controller. + + xceiver-supply: + description: Regulator that powers the CAN transceiver. + + microchip,rx-int-gpios: + description: + GPIO phandle of GPIO connected to to INT1 pin of the MCP251XFD, which + signals a pending RX interrupt. + maxItems: 1 + + spi-max-frequency: + description: + Must be half or less of "clocks" frequency. + maximum: 20000000 + +required: + - compatible + - reg + - interrupts + - clocks + +additionalProperties: false + +examples: + - | + #include + #include + + spi0 { + #address-cells = <1>; + #size-cells = <0>; + + can@0 { + compatible = "microchip,mcp251xfd"; + reg = <0>; + clocks = <&can0_osc>; + pinctrl-names = "default"; + pinctrl-0 = <&can0_pins>; + spi-max-frequency = <20000000>; + interrupts-extended = <&gpio 13 IRQ_TYPE_LEVEL_LOW>; + microchip,rx-int-gpios = <&gpio 27 GPIO_ACTIVE_LOW>; + vdd-supply = <®5v0>; + xceiver-supply = <®5v0>; + }; + }; diff --git a/Documentation/devicetree/bindings/net/can/microchip,mcp25xxfd.yaml b/Documentation/devicetree/bindings/net/can/microchip,mcp25xxfd.yaml deleted file mode 100644 index 5beb00a614bf..000000000000 --- a/Documentation/devicetree/bindings/net/can/microchip,mcp25xxfd.yaml +++ /dev/null @@ -1,79 +0,0 @@ -# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) -%YAML 1.2 ---- -$id: http://devicetree.org/schemas/net/can/microchip,mcp25xxfd.yaml# -$schema: http://devicetree.org/meta-schemas/core.yaml# - -title: - Microchip MCP2517FD and MCP2518FD stand-alone CAN controller device tree - bindings - -maintainers: - - Marc Kleine-Budde - -properties: - compatible: - oneOf: - - const: microchip,mcp2517fd - description: for MCP2517FD - - const: microchip,mcp2518fd - description: for MCP2518FD - - const: microchip,mcp25xxfd - description: to autodetect chip variant - - reg: - maxItems: 1 - - interrupts: - maxItems: 1 - - clocks: - maxItems: 1 - - vdd-supply: - description: Regulator that powers the CAN controller. - - xceiver-supply: - description: Regulator that powers the CAN transceiver. - - microchip,rx-int-gpios: - description: - GPIO phandle of GPIO connected to to INT1 pin of the MCP25XXFD, which - signals a pending RX interrupt. - maxItems: 1 - - spi-max-frequency: - description: - Must be half or less of "clocks" frequency. - maximum: 20000000 - -required: - - compatible - - reg - - interrupts - - clocks - -additionalProperties: false - -examples: - - | - #include - #include - - spi0 { - #address-cells = <1>; - #size-cells = <0>; - - can@0 { - compatible = "microchip,mcp25xxfd"; - reg = <0>; - clocks = <&can0_osc>; - pinctrl-names = "default"; - pinctrl-0 = <&can0_pins>; - spi-max-frequency = <20000000>; - interrupts-extended = <&gpio 13 IRQ_TYPE_LEVEL_LOW>; - microchip,rx-int-gpios = <&gpio 27 GPIO_ACTIVE_LOW>; - vdd-supply = <®5v0>; - xceiver-supply = <®5v0>; - }; - }; -- cgit v1.2.3 From 0024bad1f4b19bc11ed40ae3d09d4a83eec209fb Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Thu, 1 Oct 2020 12:10:04 +0200 Subject: dt-bindings: net: ethernet-controller: Add internal delay properties Internal Receive and Transmit Clock Delays are a common setting for RGMII capable devices. While these delays are typically applied by the PHY, some MACs support configuring internal clock delay settings, too. Hence add standardized properties to configure this. This is the MAC counterpart of commit 9150069bf5fc0e86 ("dt-bindings: net: Add tx and rx internal delays"), which applies to the PHY. Signed-off-by: Geert Uytterhoeven Reviewed-by: Rob Herring Reviewed-by: Florian Fainelli Signed-off-by: David S. Miller --- .../devicetree/bindings/net/ethernet-controller.yaml | 14 ++++++++++++++ 1 file changed, 14 insertions(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/net/ethernet-controller.yaml b/Documentation/devicetree/bindings/net/ethernet-controller.yaml index fa2baca8c726..137fbb95c0ea 100644 --- a/Documentation/devicetree/bindings/net/ethernet-controller.yaml +++ b/Documentation/devicetree/bindings/net/ethernet-controller.yaml @@ -120,6 +120,13 @@ properties: and is useful for determining certain configuration settings such as flow control thresholds. + rx-internal-delay-ps: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + RGMII Receive Clock Delay defined in pico seconds. + This is used for controllers that have configurable RX internal delays. + If this property is present then the MAC applies the RX delay. + sfp: $ref: /schemas/types.yaml#definitions/phandle description: @@ -131,6 +138,13 @@ properties: The size of the controller\'s transmit fifo in bytes. This is used for components that can have configurable fifo sizes. + tx-internal-delay-ps: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + RGMII Transmit Clock Delay defined in pico seconds. + This is used for controllers that have configurable TX internal delays. + If this property is present then the MAC applies the TX delay. + managed: description: Specifies the PHY management type. If auto is set and fixed-link -- cgit v1.2.3 From 57197b66d0d68dfe7aa612853efd493c79c4ba3a Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Thu, 1 Oct 2020 12:10:05 +0200 Subject: dt-bindings: net: renesas,ravb: Document internal clock delay properties Some EtherAVB variants support internal clock delay configuration, which can add larger delays than the delays that are typically supported by the PHY (using an "rgmii-*id" PHY mode, and/or "[rt]xc-skew-ps" properties). Add properties for configuring the internal MAC delays. These properties are mandatory, even when specified as zero, to distinguish between old and new DTBs. Update the (bogus) example accordingly. Signed-off-by: Geert Uytterhoeven Reviewed-by: Sergei Shtylyov Reviewed-by: Rob Herring Reviewed-by: Florian Fainelli Signed-off-by: David S. Miller --- .../devicetree/bindings/net/renesas,ravb.txt | 29 ++++++++++++---------- 1 file changed, 16 insertions(+), 13 deletions(-) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/net/renesas,ravb.txt b/Documentation/devicetree/bindings/net/renesas,ravb.txt index 032b76f14f4f..4a62dd11d5c4 100644 --- a/Documentation/devicetree/bindings/net/renesas,ravb.txt +++ b/Documentation/devicetree/bindings/net/renesas,ravb.txt @@ -64,6 +64,18 @@ Optional properties: AVB_LINK signal. - renesas,ether-link-active-low: boolean, specify when the AVB_LINK signal is active-low instead of normal active-high. +- rx-internal-delay-ps: Internal RX clock delay. + This property is mandatory and valid only on R-Car Gen3 + and RZ/G2 SoCs. + Valid values are 0 and 1800. + A non-zero value is allowed only if phy-mode = "rgmii". + Zero is not supported on R-Car D3. +- tx-internal-delay-ps: Internal TX clock delay. + This property is mandatory and valid only on R-Car H3, + M3-W, M3-W+, M3-N, V3M, and V3H, and RZ/G2M and RZ/G2N. + Valid values are 0 and 2000. + A non-zero value is allowed only if phy-mode = "rgmii". + Zero is not supported on R-Car V3H. Example: @@ -105,8 +117,10 @@ Example: "ch24"; clocks = <&cpg CPG_MOD 812>; power-domains = <&cpg>; - phy-mode = "rgmii-id"; + phy-mode = "rgmii"; phy-handle = <&phy0>; + rx-internal-delay-ps = <0>; + tx-internal-delay-ps = <2000>; pinctrl-0 = <ðer_pins>; pinctrl-names = "default"; @@ -115,18 +129,7 @@ Example: #size-cells = <0>; phy0: ethernet-phy@0 { - rxc-skew-ps = <900>; - rxdv-skew-ps = <0>; - rxd0-skew-ps = <0>; - rxd1-skew-ps = <0>; - rxd2-skew-ps = <0>; - rxd3-skew-ps = <0>; - txc-skew-ps = <900>; - txen-skew-ps = <0>; - txd0-skew-ps = <0>; - txd1-skew-ps = <0>; - txd2-skew-ps = <0>; - txd3-skew-ps = <0>; + rxc-skew-ps = <1500>; reg = <0>; interrupt-parent = <&gpio2>; interrupts = <11 IRQ_TYPE_LEVEL_LOW>; -- cgit v1.2.3 From d7adf6331189cbe9d73729052a9ff14fed802667 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Thu, 1 Oct 2020 12:10:06 +0200 Subject: dt-bindings: net: renesas,etheravb: Convert to json-schema Convert the Renesas Ethernet AVB (EthernetAVB-IF) Device Tree binding documentation to json-schema. Add missing properties. Update the example to match reality. Signed-off-by: Geert Uytterhoeven Reviewed-by: Sergei Shtylyov Reviewed-by: Rob Herring Reviewed-by: Florian Fainelli Signed-off-by: David S. Miller --- .../devicetree/bindings/net/renesas,etheravb.yaml | 261 +++++++++++++++++++++ .../devicetree/bindings/net/renesas,ravb.txt | 137 ----------- 2 files changed, 261 insertions(+), 137 deletions(-) create mode 100644 Documentation/devicetree/bindings/net/renesas,etheravb.yaml delete mode 100644 Documentation/devicetree/bindings/net/renesas,ravb.txt (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/net/renesas,etheravb.yaml b/Documentation/devicetree/bindings/net/renesas,etheravb.yaml new file mode 100644 index 000000000000..e13653051b23 --- /dev/null +++ b/Documentation/devicetree/bindings/net/renesas,etheravb.yaml @@ -0,0 +1,261 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/renesas,etheravb.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Renesas Ethernet AVB + +maintainers: + - Sergei Shtylyov + +properties: + compatible: + oneOf: + - items: + - enum: + - renesas,etheravb-r8a7742 # RZ/G1H + - renesas,etheravb-r8a7743 # RZ/G1M + - renesas,etheravb-r8a7744 # RZ/G1N + - renesas,etheravb-r8a7745 # RZ/G1E + - renesas,etheravb-r8a77470 # RZ/G1C + - renesas,etheravb-r8a7790 # R-Car H2 + - renesas,etheravb-r8a7791 # R-Car M2-W + - renesas,etheravb-r8a7792 # R-Car V2H + - renesas,etheravb-r8a7793 # R-Car M2-N + - renesas,etheravb-r8a7794 # R-Car E2 + - const: renesas,etheravb-rcar-gen2 # R-Car Gen2 and RZ/G1 + + - items: + - enum: + - renesas,etheravb-r8a774a1 # RZ/G2M + - renesas,etheravb-r8a774b1 # RZ/G2N + - renesas,etheravb-r8a774c0 # RZ/G2E + - renesas,etheravb-r8a7795 # R-Car H3 + - renesas,etheravb-r8a7796 # R-Car M3-W + - renesas,etheravb-r8a77961 # R-Car M3-W+ + - renesas,etheravb-r8a77965 # R-Car M3-N + - renesas,etheravb-r8a77970 # R-Car V3M + - renesas,etheravb-r8a77980 # R-Car V3H + - renesas,etheravb-r8a77990 # R-Car E3 + - renesas,etheravb-r8a77995 # R-Car D3 + - const: renesas,etheravb-rcar-gen3 # R-Car Gen3 and RZ/G2 + + reg: true + + interrupts: true + + interrupt-names: true + + clocks: + maxItems: 1 + + iommus: + maxItems: 1 + + power-domains: + maxItems: 1 + + resets: + maxItems: 1 + + phy-mode: true + + phy-handle: true + + '#address-cells': + description: Number of address cells for the MDIO bus. + const: 1 + + '#size-cells': + description: Number of size cells on the MDIO bus. + const: 0 + + renesas,no-ether-link: + type: boolean + description: + Specify when a board does not provide a proper AVB_LINK signal. + + renesas,ether-link-active-low: + type: boolean + description: + Specify when the AVB_LINK signal is active-low instead of normal + active-high. + + rx-internal-delay-ps: + enum: [0, 1800] + + tx-internal-delay-ps: + enum: [0, 2000] + +patternProperties: + "^ethernet-phy@[0-9a-f]$": + type: object + $ref: ethernet-phy.yaml# + +required: + - compatible + - reg + - interrupts + - clocks + - power-domains + - resets + - phy-mode + - phy-handle + - '#address-cells' + - '#size-cells' + +allOf: + - $ref: ethernet-controller.yaml# + + - if: + properties: + compatible: + contains: + enum: + - renesas,etheravb-rcar-gen2 + - renesas,etheravb-r8a7795 + - renesas,etheravb-r8a7796 + - renesas,etheravb-r8a77961 + - renesas,etheravb-r8a77965 + then: + properties: + reg: + items: + - description: MAC register block + - description: Stream buffer + else: + properties: + reg: + items: + - description: MAC register block + + - if: + properties: + compatible: + contains: + const: renesas,etheravb-rcar-gen2 + then: + properties: + interrupts: + maxItems: 1 + interrupt-names: + items: + - const: mux + rx-internal-delay-ps: false + else: + properties: + interrupts: + minItems: 25 + maxItems: 25 + interrupt-names: + items: + pattern: '^ch[0-9]+$' + required: + - interrupt-names + - rx-internal-delay-ps + + - if: + properties: + compatible: + contains: + enum: + - renesas,etheravb-r8a774a1 + - renesas,etheravb-r8a774b1 + - renesas,etheravb-r8a7795 + - renesas,etheravb-r8a7796 + - renesas,etheravb-r8a77961 + - renesas,etheravb-r8a77965 + - renesas,etheravb-r8a77970 + - renesas,etheravb-r8a77980 + then: + required: + - tx-internal-delay-ps + else: + properties: + tx-internal-delay-ps: false + + - if: + properties: + compatible: + contains: + const: renesas,etheravb-r8a77995 + then: + properties: + rx-internal-delay-ps: + const: 1800 + + - if: + properties: + compatible: + contains: + const: renesas,etheravb-r8a77980 + then: + properties: + tx-internal-delay-ps: + const: 2000 + +additionalProperties: false + +examples: + - | + #include + #include + #include + #include + aliases { + ethernet0 = &avb; + }; + + avb: ethernet@e6800000 { + compatible = "renesas,etheravb-r8a7795", + "renesas,etheravb-rcar-gen3"; + reg = <0xe6800000 0x800>, <0xe6a00000 0x10000>; + interrupts = , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + ; + interrupt-names = "ch0", "ch1", "ch2", "ch3", "ch4", "ch5", "ch6", + "ch7", "ch8", "ch9", "ch10", "ch11", "ch12", + "ch13", "ch14", "ch15", "ch16", "ch17", "ch18", + "ch19", "ch20", "ch21", "ch22", "ch23", "ch24"; + clocks = <&cpg CPG_MOD 812>; + iommus = <&ipmmu_ds0 16>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; + resets = <&cpg 812>; + phy-mode = "rgmii"; + phy-handle = <&phy0>; + rx-internal-delay-ps = <0>; + tx-internal-delay-ps = <2000>; + #address-cells = <1>; + #size-cells = <0>; + + phy0: ethernet-phy@0 { + rxc-skew-ps = <1500>; + reg = <0>; + interrupt-parent = <&gpio2>; + interrupts = <11 IRQ_TYPE_LEVEL_LOW>; + reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>; + }; + }; diff --git a/Documentation/devicetree/bindings/net/renesas,ravb.txt b/Documentation/devicetree/bindings/net/renesas,ravb.txt deleted file mode 100644 index 4a62dd11d5c4..000000000000 --- a/Documentation/devicetree/bindings/net/renesas,ravb.txt +++ /dev/null @@ -1,137 +0,0 @@ -* Renesas Electronics Ethernet AVB - -This file provides information on what the device node for the Ethernet AVB -interface contains. - -Required properties: -- compatible: Must contain one or more of the following: - - "renesas,etheravb-r8a7742" for the R8A7742 SoC. - - "renesas,etheravb-r8a7743" for the R8A7743 SoC. - - "renesas,etheravb-r8a7744" for the R8A7744 SoC. - - "renesas,etheravb-r8a7745" for the R8A7745 SoC. - - "renesas,etheravb-r8a77470" for the R8A77470 SoC. - - "renesas,etheravb-r8a7790" for the R8A7790 SoC. - - "renesas,etheravb-r8a7791" for the R8A7791 SoC. - - "renesas,etheravb-r8a7792" for the R8A7792 SoC. - - "renesas,etheravb-r8a7793" for the R8A7793 SoC. - - "renesas,etheravb-r8a7794" for the R8A7794 SoC. - - "renesas,etheravb-rcar-gen2" as a fallback for the above - R-Car Gen2 and RZ/G1 devices. - - - "renesas,etheravb-r8a774a1" for the R8A774A1 SoC. - - "renesas,etheravb-r8a774b1" for the R8A774B1 SoC. - - "renesas,etheravb-r8a774c0" for the R8A774C0 SoC. - - "renesas,etheravb-r8a7795" for the R8A7795 SoC. - - "renesas,etheravb-r8a7796" for the R8A77960 SoC. - - "renesas,etheravb-r8a77961" for the R8A77961 SoC. - - "renesas,etheravb-r8a77965" for the R8A77965 SoC. - - "renesas,etheravb-r8a77970" for the R8A77970 SoC. - - "renesas,etheravb-r8a77980" for the R8A77980 SoC. - - "renesas,etheravb-r8a77990" for the R8A77990 SoC. - - "renesas,etheravb-r8a77995" for the R8A77995 SoC. - - "renesas,etheravb-rcar-gen3" as a fallback for the above - R-Car Gen3 and RZ/G2 devices. - - When compatible with the generic version, nodes must list the - SoC-specific version corresponding to the platform first followed by - the generic version. - -- reg: Offset and length of (1) the register block and (2) the stream buffer. - The region for the register block is mandatory. - The region for the stream buffer is optional, as it is only present on - R-Car Gen2 and RZ/G1 SoCs, and on R-Car H3 (R8A7795), M3-W (R8A77960), - M3-W+ (R8A77961), and M3-N (R8A77965). -- interrupts: A list of interrupt-specifiers, one for each entry in - interrupt-names. - If interrupt-names is not present, an interrupt specifier - for a single muxed interrupt. -- phy-mode: see ethernet.txt file in the same directory. -- phy-handle: see ethernet.txt file in the same directory. -- #address-cells: number of address cells for the MDIO bus, must be equal to 1. -- #size-cells: number of size cells on the MDIO bus, must be equal to 0. -- clocks: clock phandle and specifier pair. -- pinctrl-0: phandle, referring to a default pin configuration node. - -Optional properties: -- interrupt-names: A list of interrupt names. - For the R-Car Gen 3 SoCs this property is mandatory; - it should include one entry per channel, named "ch%u", - where %u is the channel number ranging from 0 to 24. - For other SoCs this property is optional; if present - it should contain "mux" for a single muxed interrupt. -- pinctrl-names: pin configuration state name ("default"). -- renesas,no-ether-link: boolean, specify when a board does not provide a proper - AVB_LINK signal. -- renesas,ether-link-active-low: boolean, specify when the AVB_LINK signal is - active-low instead of normal active-high. -- rx-internal-delay-ps: Internal RX clock delay. - This property is mandatory and valid only on R-Car Gen3 - and RZ/G2 SoCs. - Valid values are 0 and 1800. - A non-zero value is allowed only if phy-mode = "rgmii". - Zero is not supported on R-Car D3. -- tx-internal-delay-ps: Internal TX clock delay. - This property is mandatory and valid only on R-Car H3, - M3-W, M3-W+, M3-N, V3M, and V3H, and RZ/G2M and RZ/G2N. - Valid values are 0 and 2000. - A non-zero value is allowed only if phy-mode = "rgmii". - Zero is not supported on R-Car V3H. - -Example: - - ethernet@e6800000 { - compatible = "renesas,etheravb-r8a7795", "renesas,etheravb-rcar-gen3"; - reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>; - interrupt-parent = <&gic>; - interrupts = , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - ; - interrupt-names = "ch0", "ch1", "ch2", "ch3", - "ch4", "ch5", "ch6", "ch7", - "ch8", "ch9", "ch10", "ch11", - "ch12", "ch13", "ch14", "ch15", - "ch16", "ch17", "ch18", "ch19", - "ch20", "ch21", "ch22", "ch23", - "ch24"; - clocks = <&cpg CPG_MOD 812>; - power-domains = <&cpg>; - phy-mode = "rgmii"; - phy-handle = <&phy0>; - rx-internal-delay-ps = <0>; - tx-internal-delay-ps = <2000>; - - pinctrl-0 = <ðer_pins>; - pinctrl-names = "default"; - renesas,no-ether-link; - #address-cells = <1>; - #size-cells = <0>; - - phy0: ethernet-phy@0 { - rxc-skew-ps = <1500>; - reg = <0>; - interrupt-parent = <&gpio2>; - interrupts = <11 IRQ_TYPE_LEVEL_LOW>; - }; - }; -- cgit v1.2.3 From 3e8282a3602953575f6abf420a1ccaf2c22ef8ad Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Sat, 19 Sep 2020 16:04:13 +0200 Subject: dt-bindings: power: bq27xxx: add bq34z100 Add compatible for bq34z100 charger. Signed-off-by: Krzysztof Kozlowski Acked-by: Rob Herring Signed-off-by: Sebastian Reichel --- Documentation/devicetree/bindings/power/supply/bq27xxx.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/power/supply/bq27xxx.yaml b/Documentation/devicetree/bindings/power/supply/bq27xxx.yaml index 82f682705f44..45beefccf31a 100644 --- a/Documentation/devicetree/bindings/power/supply/bq27xxx.yaml +++ b/Documentation/devicetree/bindings/power/supply/bq27xxx.yaml @@ -51,6 +51,7 @@ properties: - ti,bq27621 - ti,bq27z561 - ti,bq28z610 + - ti,bq34z100 reg: maxItems: 1 -- cgit v1.2.3 From a3d0ba883ce05775d53a4db903bafc09ec3ba182 Mon Sep 17 00:00:00 2001 From: Kurt Kanzenbach Date: Fri, 2 Oct 2020 08:20:51 +0200 Subject: dt-bindings: net: dsa: b53: Add missing reg property to example The switch has a certain MDIO address and this needs to be specified using the reg property. Add it to the example. Signed-off-by: Kurt Kanzenbach Reviewed-by: Andrew Lunn Reviewed-by: Florian Fainelli Signed-off-by: David S. Miller --- Documentation/devicetree/bindings/net/dsa/b53.txt | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/net/dsa/b53.txt b/Documentation/devicetree/bindings/net/dsa/b53.txt index cfd1afdc6e94..80437b2fc935 100644 --- a/Documentation/devicetree/bindings/net/dsa/b53.txt +++ b/Documentation/devicetree/bindings/net/dsa/b53.txt @@ -106,6 +106,7 @@ Ethernet switch connected via MDIO to the host, CPU port wired to eth0: switch0: ethernet-switch@30 { compatible = "brcm,bcm53125"; + reg = <30>; #address-cells = <1>; #size-cells = <0>; -- cgit v1.2.3 From 11a2bdc10f5b5e092ee84f8dc2966c78471909fd Mon Sep 17 00:00:00 2001 From: Iskren Chernev Date: Tue, 22 Sep 2020 14:42:33 +0300 Subject: dt-bindings: power: supply: Extend max17040 compatibility Maxim max17040 is a fuel gauge from a larger family utilising the Model Gauge technology. Document all different compatible strings that the max17040 driver recognizes. Some devices in the wild report double the capacity. The maxim,double-soc (from State-Of-Charge) property fixes that. Examples: https://lore.kernel.org/patchwork/patch/1263411/#1468420 Signed-off-by: Iskren Chernev Reviewed-by: Rob Herring Signed-off-by: Sebastian Reichel --- .../devicetree/bindings/power/supply/max17040_battery.txt | 15 ++++++++++++++- 1 file changed, 14 insertions(+), 1 deletion(-) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/power/supply/max17040_battery.txt b/Documentation/devicetree/bindings/power/supply/max17040_battery.txt index 4e0186b8380f..5aa83e797a02 100644 --- a/Documentation/devicetree/bindings/power/supply/max17040_battery.txt +++ b/Documentation/devicetree/bindings/power/supply/max17040_battery.txt @@ -2,7 +2,9 @@ max17040_battery ~~~~~~~~~~~~~~~~ Required properties : - - compatible : "maxim,max17040" or "maxim,max77836-battery" + - compatible : "maxim,max17040", "maxim,max17041", "maxim,max17043", + "maxim,max17044", "maxim,max17048", "maxim,max17049", + "maxim,max17058", "maxim,max17059" or "maxim,max77836-battery" - reg: i2c slave address Optional properties : @@ -11,6 +13,10 @@ Optional properties : generated. Can be configured from 1 up to 32 (%). If skipped the power up default value of 4 (%) will be used. +- maxim,double-soc : Certain devices return double the capacity. + Specify this boolean property to divide the + reported value in 2 and thus normalize it. + SOC == State of Charge == Capacity. - interrupts : Interrupt line see Documentation/devicetree/ bindings/interrupt-controller/interrupts.txt - wakeup-source : This device has wakeup capabilities. Use this @@ -31,3 +37,10 @@ Example: interrupts = <2 IRQ_TYPE_EDGE_FALLING>; wakeup-source; }; + + battery-fuel-gauge@36 { + compatible = "maxim,max17048"; + reg = <0x36>; + maxim,alert-low-soc-level = <10>; + maxim,double-soc; + }; -- cgit v1.2.3 From b973c9d518199bd8362aeae13d208d8889283287 Mon Sep 17 00:00:00 2001 From: Iskren Chernev Date: Tue, 22 Sep 2020 14:42:35 +0300 Subject: dt-bindings: power: supply: max17040: Add maxim,rcomp To compensate for the battery chemistry and operating conditions the chips support a compensation value. Specify one or two byte compensation via the maxim,rcomp byte array. Signed-off-by: Iskren Chernev Reviewed-by: Rob Herring Signed-off-by: Sebastian Reichel --- Documentation/devicetree/bindings/power/supply/max17040_battery.txt | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/power/supply/max17040_battery.txt b/Documentation/devicetree/bindings/power/supply/max17040_battery.txt index 5aa83e797a02..c802f664b508 100644 --- a/Documentation/devicetree/bindings/power/supply/max17040_battery.txt +++ b/Documentation/devicetree/bindings/power/supply/max17040_battery.txt @@ -17,6 +17,11 @@ Optional properties : Specify this boolean property to divide the reported value in 2 and thus normalize it. SOC == State of Charge == Capacity. +- maxim,rcomp : A value to compensate readings for various + battery chemistries and operating temperatures. + max17040,41 have 2 byte rcomp, default to + 0x97 0x00. All other devices have one byte + rcomp, default to 0x97. - interrupts : Interrupt line see Documentation/devicetree/ bindings/interrupt-controller/interrupts.txt - wakeup-source : This device has wakeup capabilities. Use this @@ -41,6 +46,7 @@ Example: battery-fuel-gauge@36 { compatible = "maxim,max17048"; reg = <0x36>; + maxim,rcomp = /bits/ 8 <0x56>; maxim,alert-low-soc-level = <10>; maxim,double-soc; }; -- cgit v1.2.3 From 6d3dd362fa0308fc55337623baec2b02f15b76e2 Mon Sep 17 00:00:00 2001 From: Dan Murphy Date: Mon, 31 Aug 2020 11:48:48 -0500 Subject: dt-binding: bq25980: Add the bq25980 flash charger Add yaml for the bq25980 flash charger. Signed-off-by: Dan Murphy Reviewed-by: Rob Herring Signed-off-by: Sebastian Reichel --- .../devicetree/bindings/power/supply/bq25980.yaml | 114 +++++++++++++++++++++ 1 file changed, 114 insertions(+) create mode 100644 Documentation/devicetree/bindings/power/supply/bq25980.yaml (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/power/supply/bq25980.yaml b/Documentation/devicetree/bindings/power/supply/bq25980.yaml new file mode 100644 index 000000000000..f6b3dd4093ca --- /dev/null +++ b/Documentation/devicetree/bindings/power/supply/bq25980.yaml @@ -0,0 +1,114 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +# Copyright (C) 2020 Texas Instruments Incorporated +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/power/supply/bq25980.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: TI BQ25980 Flash Charger + +maintainers: + - Dan Murphy + - Ricardo Rivera-Matos + +description: | + The BQ25980, BQ25975, and BQ25960 are a series of flash chargers intended + for use in high-power density portable electronics. These inductorless + switching chargers can provide over 97% efficiency by making use of the + switched capacitor architecture. + +allOf: + - $ref: power-supply.yaml# + +properties: + compatible: + enum: + - ti,bq25980 + - ti,bq25975 + - ti,bq25960 + + reg: + maxItems: 1 + + ti,watchdog-timeout-ms: + description: | + Watchdog timer in milli seconds. 0 disables the watchdog. + default: 0 + minimum: 0 + maximum: 300000 + enum: [ 0, 5000, 10000, 50000, 300000] + + ti,sc-ovp-limit-microvolt: + description: | + Minimum input voltage limit in micro volts with a when the charger is in + switch cap mode. 100000 micro volt step. + default: 17800000 + minimum: 14000000 + maximum: 22000000 + + ti,sc-ocp-limit-microamp: + description: | + Maximum input current limit in micro amps with a 100000 micro amp step. + minimum: 100000 + maximum: 3300000 + + ti,bypass-ovp-limit-microvolt: + description: | + Minimum input voltage limit in micro volts with a when the charger is in + switch cap mode. 50000 micro volt step. + minimum: 7000000 + maximum: 12750000 + + ti,bypass-ocp-limit-microamp: + description: | + Maximum input current limit in micro amps with a 100000 micro amp step. + minimum: 100000 + maximum: 3300000 + + ti,bypass-enable: + type: boolean + description: Enables bypass mode at boot time + + interrupts: + description: | + Indicates that the device state has changed. + + monitored-battery: + $ref: /schemas/types.yaml#/definitions/phandle + description: phandle to the battery node being monitored + +required: + - compatible + - reg + - monitored-battery + +unevaluatedProperties: false + +examples: + - | + bat: battery { + compatible = "simple-battery"; + constant-charge-current-max-microamp = <4000000>; + constant-charge-voltage-max-microvolt = <8400000>; + precharge-current-microamp = <160000>; + charge-term-current-microamp = <160000>; + }; + #include + #include + i2c0 { + #address-cells = <1>; + #size-cells = <0>; + + bq25980: charger@65 { + compatible = "ti,bq25980"; + reg = <0x65>; + interrupt-parent = <&gpio1>; + interrupts = <16 IRQ_TYPE_EDGE_FALLING>; + ti,watchdog-timer = <0>; + ti,sc-ocp-limit-microamp = <2000000>; + ti,sc-ovp-limit-microvolt = <17800000>; + monitored-battery = <&bat>; + }; + }; + +... -- cgit v1.2.3 From 536a82ad167b0fe156bcf82de5055af6f26d22e5 Mon Sep 17 00:00:00 2001 From: Kurt Kanzenbach Date: Sat, 3 Oct 2020 11:30:50 +0200 Subject: dt-bindings: net: dsa: b53: Specify unit address in hex The unit address should be 1e, because the unit address is supposed to be in hexadecimal. Suggested-by: Florian Fainelli Signed-off-by: Kurt Kanzenbach Reviewed-by: Florian Fainelli Signed-off-by: David S. Miller --- Documentation/devicetree/bindings/net/dsa/b53.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/net/dsa/b53.txt b/Documentation/devicetree/bindings/net/dsa/b53.txt index 80437b2fc935..3bb4e1086913 100644 --- a/Documentation/devicetree/bindings/net/dsa/b53.txt +++ b/Documentation/devicetree/bindings/net/dsa/b53.txt @@ -104,7 +104,7 @@ Ethernet switch connected via MDIO to the host, CPU port wired to eth0: #address-cells = <1>; #size-cells = <0>; - switch0: ethernet-switch@30 { + switch0: ethernet-switch@1e { compatible = "brcm,bcm53125"; reg = <30>; #address-cells = <1>; -- cgit v1.2.3 From 3a56268ef6ee7c065520e1d73c58dbd2c2c5f3c2 Mon Sep 17 00:00:00 2001 From: Kurt Kanzenbach Date: Sat, 3 Oct 2020 11:30:51 +0200 Subject: dt-bindings: net: dsa: b53: Fix full duplex in example There is no such property as duplex-full. It's called full-duplex. Leading to reduced speed when using the example as base for a real device tree. Signed-off-by: Kurt Kanzenbach Reviewed-by: Florian Fainelli Signed-off-by: David S. Miller --- Documentation/devicetree/bindings/net/dsa/b53.txt | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/net/dsa/b53.txt b/Documentation/devicetree/bindings/net/dsa/b53.txt index 3bb4e1086913..f1487a751b1a 100644 --- a/Documentation/devicetree/bindings/net/dsa/b53.txt +++ b/Documentation/devicetree/bindings/net/dsa/b53.txt @@ -95,7 +95,7 @@ Ethernet switch connected via MDIO to the host, CPU port wired to eth0: fixed-link { speed = <1000>; - duplex-full; + full-duplex; }; }; @@ -129,7 +129,7 @@ Ethernet switch connected via MDIO to the host, CPU port wired to eth0: label = "cable-modem"; fixed-link { speed = <1000>; - duplex-full; + full-duplex; }; phy-mode = "rgmii-txid"; }; @@ -139,7 +139,7 @@ Ethernet switch connected via MDIO to the host, CPU port wired to eth0: label = "cpu"; fixed-link { speed = <1000>; - duplex-full; + full-duplex; }; phy-mode = "rgmii-txid"; ethernet = <ð0>; -- cgit v1.2.3 From 8f445ffa851e999308bbd4d133ea849936f95179 Mon Sep 17 00:00:00 2001 From: Michael Srba Date: Sun, 4 Oct 2020 14:37:18 -0700 Subject: dt-bindings: input/touchscreen: add bindings for zinitix This patch adds dts bindings for the zinitix bt541 touchscreen. Signed-off-by: Michael Srba Reviewed-by: Rob Herring Link: https://lore.kernel.org/r/20201001122949.16846-2-michael.srba@seznam.cz Signed-off-by: Dmitry Torokhov --- .../bindings/input/touchscreen/zinitix.txt | 40 ++++++++++++++++++++++ .../devicetree/bindings/vendor-prefixes.yaml | 2 ++ 2 files changed, 42 insertions(+) create mode 100644 Documentation/devicetree/bindings/input/touchscreen/zinitix.txt (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/input/touchscreen/zinitix.txt b/Documentation/devicetree/bindings/input/touchscreen/zinitix.txt new file mode 100644 index 000000000000..446efb9f5f55 --- /dev/null +++ b/Documentation/devicetree/bindings/input/touchscreen/zinitix.txt @@ -0,0 +1,40 @@ +Device tree bindings for Zinitx BT541 touchscreen controller + +Required properties: + + - compatible : Should be "zinitix,bt541" + - reg : I2C address of the chip. Should be 0x20 + - interrupts : Interrupt to which the chip is connected + +Optional properties: + + - vdd-supply : Analog power supply regulator on VCCA pin + - vddo-supply : Digital power supply regulator on VDD pin + - zinitix,mode : Mode of reporting touch points. Some modes may not work + with a particular ts firmware for unknown reasons. Available + modes are 1 and 2. Mode 2 is the default and preferred. + +The touchscreen-* properties are documented in touchscreen.txt in this +directory. + +Example: + + i2c@00000000 { + /* ... */ + + bt541@20 { + compatible = "zinitix,bt541"; + reg = <0x20>; + interrupt-parent = <&msmgpio>; + interrupts = <13 IRQ_TYPE_EDGE_FALLING>; + pinctrl-names = "default"; + pinctrl-0 = <&tsp_default>; + vdd-supply = <®_vdd_tsp>; + vddo-supply = <&pm8916_l6>; + touchscreen-size-x = <540>; + touchscreen-size-y = <960>; + zinitix,mode = <2>; + }; + + /* ... */ + }; diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml index d3891386d671..bd7b2d404124 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml @@ -1143,6 +1143,8 @@ patternProperties: description: Shenzhen Zidoo Technology Co., Ltd. "^zii,.*": description: Zodiac Inflight Innovations + "^zinitix,.*": + description: Zinitix Co., Ltd "^zte,.*": description: ZTE Corp. "^zyxel,.*": -- cgit v1.2.3 From df73446a2882a4336cad473d8eb9d895e49f092b Mon Sep 17 00:00:00 2001 From: Lad Prabhakar Date: Sun, 16 Aug 2020 20:07:31 +0100 Subject: dt-bindings: can: rcar_can: Add r8a7742 support Document RZ/G1H (r8a7742) SoC specific bindings. The R8A7742 CAN module is identical to R-Car Gen2 family. No driver change is needed due to the fallback compatible value "renesas,rcar-gen2-can". Signed-off-by: Lad Prabhakar Reviewed-by: Chris Paterson Link: https://lore.kernel.org/r/20200816190732.6905-3-prabhakar.mahadev-lad.rj@bp.renesas.com Reviewed-by: Geert Uytterhoeven Acked-by: Rob Herring Signed-off-by: Marc Kleine-Budde --- Documentation/devicetree/bindings/net/can/rcar_can.txt | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/net/can/rcar_can.txt b/Documentation/devicetree/bindings/net/can/rcar_can.txt index 85c6551b602a..2099ce809ae7 100644 --- a/Documentation/devicetree/bindings/net/can/rcar_can.txt +++ b/Documentation/devicetree/bindings/net/can/rcar_can.txt @@ -2,7 +2,8 @@ Renesas R-Car CAN controller Device Tree Bindings ------------------------------------------------- Required properties: -- compatible: "renesas,can-r8a7743" if CAN controller is a part of R8A7743 SoC. +- compatible: "renesas,can-r8a7742" if CAN controller is a part of R8A7742 SoC. + "renesas,can-r8a7743" if CAN controller is a part of R8A7743 SoC. "renesas,can-r8a7744" if CAN controller is a part of R8A7744 SoC. "renesas,can-r8a7745" if CAN controller is a part of R8A7745 SoC. "renesas,can-r8a77470" if CAN controller is a part of R8A77470 SoC. -- cgit v1.2.3 From d131c4b879b63aafac212cd87f20ca2fa0b256a3 Mon Sep 17 00:00:00 2001 From: Lad Prabhakar Date: Mon, 5 Oct 2020 09:13:18 +0100 Subject: dt-bindings: can: rcar_canfd: Document r8a774e1 support Document the support for rcar_canfd on R8A774E1 SoC devices. Signed-off-by: Lad Prabhakar Reviewed-by: Marian-Cristian Rotariu Reviewed-by: Geert Uytterhoeven Acked-by: Rob Herring Link: https://lore.kernel.org/r/20201005081319.29322-2-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Marc Kleine-Budde --- Documentation/devicetree/bindings/net/can/rcar_canfd.txt | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/net/can/rcar_canfd.txt b/Documentation/devicetree/bindings/net/can/rcar_canfd.txt index 13a4e34c0c73..22cf2a889b2c 100644 --- a/Documentation/devicetree/bindings/net/can/rcar_canfd.txt +++ b/Documentation/devicetree/bindings/net/can/rcar_canfd.txt @@ -7,6 +7,7 @@ Required properties: - "renesas,r8a774a1-canfd" for R8A774A1 (RZ/G2M) compatible controller. - "renesas,r8a774b1-canfd" for R8A774B1 (RZ/G2N) compatible controller. - "renesas,r8a774c0-canfd" for R8A774C0 (RZ/G2E) compatible controller. + - "renesas,r8a774e1-canfd" for R8A774E1 (RZ/G2H) compatible controller. - "renesas,r8a7795-canfd" for R8A7795 (R-Car H3) compatible controller. - "renesas,r8a7796-canfd" for R8A7796 (R-Car M3-W) compatible controller. - "renesas,r8a77965-canfd" for R8A77965 (R-Car M3-N) compatible controller. @@ -32,8 +33,8 @@ The name of the child nodes are "channel0" and "channel1" respectively. Each child node supports the "status" property only, which is used to enable/disable the respective channel. -Required properties for R8A774A1, R8A774B1, R8A774C0, R8A7795, R8A7796, -R8A77965, R8A77990, and R8A77995: +Required properties for R8A774A1, R8A774B1, R8A774C0, R8A774E1, R8A7795, +R8A7796, R8A77965, R8A77990, and R8A77995: In the denoted SoCs, canfd clock is a div6 clock and can be used by both CAN and CAN FD controller at the same time. It needs to be scaled to maximum frequency if any of these controllers use it. This is done using the below -- cgit v1.2.3 From f97db2621b41b98e6e8e0fa8271db3a600fa6335 Mon Sep 17 00:00:00 2001 From: Lad Prabhakar Date: Mon, 5 Oct 2020 09:13:19 +0100 Subject: dt-bindings: can: rcar_can: Document r8a774e1 support Document SoC specific bindings for RZ/G2H (R8A774E1) SoC. Signed-off-by: Lad Prabhakar Reviewed-by: Marian-Cristian Rotariu Reviewed-by: Geert Uytterhoeven Acked-by: Rob Herring Link: https://lore.kernel.org/r/20201005081319.29322-3-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Marc Kleine-Budde --- Documentation/devicetree/bindings/net/can/rcar_can.txt | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/net/can/rcar_can.txt b/Documentation/devicetree/bindings/net/can/rcar_can.txt index 2099ce809ae7..6a5956347816 100644 --- a/Documentation/devicetree/bindings/net/can/rcar_can.txt +++ b/Documentation/devicetree/bindings/net/can/rcar_can.txt @@ -10,6 +10,7 @@ Required properties: "renesas,can-r8a774a1" if CAN controller is a part of R8A774A1 SoC. "renesas,can-r8a774b1" if CAN controller is a part of R8A774B1 SoC. "renesas,can-r8a774c0" if CAN controller is a part of R8A774C0 SoC. + "renesas,can-r8a774e1" if CAN controller is a part of R8A774E1 SoC. "renesas,can-r8a7778" if CAN controller is a part of R8A7778 SoC. "renesas,can-r8a7779" if CAN controller is a part of R8A7779 SoC. "renesas,can-r8a7790" if CAN controller is a part of R8A7790 SoC. @@ -38,8 +39,8 @@ Required properties: - pinctrl-0: pin control group to be used for this controller. - pinctrl-names: must be "default". -Required properties for R8A774A1, R8A774B1, R8A774C0, R8A7795, R8A7796, -R8A77965, R8A77990, and R8A77995: +Required properties for R8A774A1, R8A774B1, R8A774C0, R8A774E1, R8A7795, +R8A7796, R8A77965, R8A77990, and R8A77995: For the denoted SoCs, "clkp2" can be CANFD clock. This is a div6 clock and can be used by both CAN and CAN FD controller at the same time. It needs to be scaled to maximum frequency if any of these controllers use it. This is done -- cgit v1.2.3 From a62fc7ff903c1620c0536b6a549d6cf044f17023 Mon Sep 17 00:00:00 2001 From: Michael Walle Date: Thu, 1 Oct 2020 11:11:29 +0200 Subject: dt-bindings: can: flexcan: list supported processors The compatible is a pattern match. Explicitly list all possible values. Also mention that the ls1028ar1 must be followed by lx2160ar1. Signed-off-by: Michael Walle Link: https://lore.kernel.org/r/20201001091131.30514-2-michael@walle.cc Signed-off-by: Marc Kleine-Budde --- Documentation/devicetree/bindings/net/can/fsl-flexcan.txt | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/net/can/fsl-flexcan.txt b/Documentation/devicetree/bindings/net/can/fsl-flexcan.txt index 94c0f8bf4deb..c6152dc2d2d0 100644 --- a/Documentation/devicetree/bindings/net/can/fsl-flexcan.txt +++ b/Documentation/devicetree/bindings/net/can/fsl-flexcan.txt @@ -4,6 +4,12 @@ Required properties: - compatible : Should be "fsl,-flexcan" + where is imx8qm, imx6q, imx28, imx53, imx35, imx25, p1010, + vf610, ls1021ar2, lx2160ar1, ls1028ar1. + + The ls1028ar1 must be followed by lx2160ar1, e.g. + - "fsl,ls1028ar1-flexcan", "fsl,lx2160ar1-flexcan" + An implementation should also claim any of the following compatibles that it is fully backwards compatible with: -- cgit v1.2.3 From e4245bbca91da17c7e8c026d2aecf10687519a2b Mon Sep 17 00:00:00 2001 From: Marc Kleine-Budde Date: Sun, 14 Jun 2020 21:10:38 +0200 Subject: dt-bindings: can: flexcan: remove ack_grp and ack_bit from fsl,stop-mode Since commit: 048e3a34a2e7 can: flexcan: poll MCR_LPM_ACK instead of GPR ACK for stop mode acknowledgment the driver polls the IP core's internal bit MCR[LPM_ACK] as stop mode acknowledge and not the acknowledgment on chip level. This means the 4th and 5th value of the property "fsl,stop-mode" isn't used anymore. It will be removed from the driver in the next patch, so remove it from the binding documentation. Link: http://lore.kernel.org/r/20201006203748.1750156-14-mkl@pengutronix.de Fixes: 048e3a34a2e7 ("can: flexcan: poll MCR_LPM_ACK instead of GPR ACK for stop mode acknowledgment") Cc: devicetree Cc: Joakim Zhang Reviewed-by: Rob Herring Signed-off-by: Marc Kleine-Budde --- Documentation/devicetree/bindings/net/can/fsl-flexcan.txt | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/net/can/fsl-flexcan.txt b/Documentation/devicetree/bindings/net/can/fsl-flexcan.txt index c6152dc2d2d0..e10b6eb955e1 100644 --- a/Documentation/devicetree/bindings/net/can/fsl-flexcan.txt +++ b/Documentation/devicetree/bindings/net/can/fsl-flexcan.txt @@ -31,12 +31,10 @@ Optional properties: endian. - fsl,stop-mode: register bits of stop mode control, the format is - <&gpr req_gpr req_bit ack_gpr ack_bit>. + <&gpr req_gpr req_bit>. gpr is the phandle to general purpose register node. req_gpr is the gpr register offset of CAN stop request. req_bit is the bit offset of CAN stop request. - ack_gpr is the gpr register offset of CAN stop acknowledge. - ack_bit is the bit offset of CAN stop acknowledge. - fsl,clk-source: Select the clock source to the CAN Protocol Engine (PE). It's SoC Implementation dependent. Refer to RM for detailed -- cgit v1.2.3 From 312e95c6e92122fac0251a84efa1cf3914c877a6 Mon Sep 17 00:00:00 2001 From: Lars Povlsen Date: Tue, 6 Oct 2020 22:03:14 +0200 Subject: dt-bindings: reset: ocelot: Add Sparx5 support This adds the support for the Sparx5 SoC. Signed-off-by: Lars Povlsen Acked-by: Rob Herring Signed-off-by: Sebastian Reichel --- Documentation/devicetree/bindings/power/reset/ocelot-reset.txt | 7 +++++-- MAINTAINERS | 1 + 2 files changed, 6 insertions(+), 2 deletions(-) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/power/reset/ocelot-reset.txt b/Documentation/devicetree/bindings/power/reset/ocelot-reset.txt index 1b4213eb3473..4d530d815484 100644 --- a/Documentation/devicetree/bindings/power/reset/ocelot-reset.txt +++ b/Documentation/devicetree/bindings/power/reset/ocelot-reset.txt @@ -1,10 +1,13 @@ Microsemi Ocelot reset controller The DEVCPU_GCB:CHIP_REGS have a SOFT_RST register that can be used to reset the -SoC MIPS core. +SoC core. + +The reset registers are both present in the MSCC vcoreiii MIPS and +microchip Sparx5 armv8 SoC's. Required Properties: - - compatible: "mscc,ocelot-chip-reset" + - compatible: "mscc,ocelot-chip-reset" or "microchip,sparx5-chip-reset" Example: reset@1070008 { diff --git a/MAINTAINERS b/MAINTAINERS index 75b724181c7b..a733a80748ff 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -11515,6 +11515,7 @@ M: Microchip Linux Driver Support L: linux-mips@vger.kernel.org S: Supported F: Documentation/devicetree/bindings/mips/mscc.txt +F: Documentation/devicetree/bindings/power/reset/ocelot-reset.txt F: arch/mips/boot/dts/mscc/ F: arch/mips/configs/generic/board-ocelot.config F: arch/mips/generic/board-ocelot.c -- cgit v1.2.3 From 6a78dfb8facadef74bdf5af5ed84f6c722299fbb Mon Sep 17 00:00:00 2001 From: Lad Prabhakar Date: Tue, 6 Oct 2020 09:19:09 +0100 Subject: dt-bindings: pwm: renesas,tpu-pwm: Document r8a7742 support MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Document r8a7742 specific compatible strings. No driver change is needed as the fallback compatible string "renesas,tpu" activates the right code in the driver. Signed-off-by: Lad Prabhakar Reviewed-by: Marian-Cristian Rotariu Reviewed-by: Geert Uytterhoeven Acked-by: Rob Herring Acked-by: Uwe Kleine-König Signed-off-by: Thierry Reding --- Documentation/devicetree/bindings/pwm/renesas,tpu-pwm.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/pwm/renesas,tpu-pwm.yaml b/Documentation/devicetree/bindings/pwm/renesas,tpu-pwm.yaml index 4bf62a3d5bba..aa9a4570c906 100644 --- a/Documentation/devicetree/bindings/pwm/renesas,tpu-pwm.yaml +++ b/Documentation/devicetree/bindings/pwm/renesas,tpu-pwm.yaml @@ -15,6 +15,7 @@ properties: - enum: - renesas,tpu-r8a73a4 # R-Mobile APE6 - renesas,tpu-r8a7740 # R-Mobile A1 + - renesas,tpu-r8a7742 # RZ/G1H - renesas,tpu-r8a7743 # RZ/G1M - renesas,tpu-r8a7744 # RZ/G1N - renesas,tpu-r8a7745 # RZ/G1E -- cgit v1.2.3 From 3b1954cd57bf7648417c593d60eac1ec661ad514 Mon Sep 17 00:00:00 2001 From: Lad Prabhakar Date: Tue, 6 Oct 2020 09:19:10 +0100 Subject: dt-bindings: pwm: renesas,pwm-rcar: Add r8a7742 support MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Document RZ/G1H (R8A7742) SoC bindings. Signed-off-by: Lad Prabhakar Reviewed-by: Marian-Cristian Rotariu Acked-by: Uwe Kleine-König Reviewed-by: Geert Uytterhoeven Reviewed-by: Yoshihiro Shimoda Acked-by: Rob Herring Signed-off-by: Thierry Reding --- Documentation/devicetree/bindings/pwm/renesas,pwm-rcar.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/pwm/renesas,pwm-rcar.yaml b/Documentation/devicetree/bindings/pwm/renesas,pwm-rcar.yaml index 5407c11e92a4..3c2fa2e93d1b 100644 --- a/Documentation/devicetree/bindings/pwm/renesas,pwm-rcar.yaml +++ b/Documentation/devicetree/bindings/pwm/renesas,pwm-rcar.yaml @@ -13,6 +13,7 @@ properties: compatible: items: - enum: + - renesas,pwm-r8a7742 # RZ/G1H - renesas,pwm-r8a7743 # RZ/G1M - renesas,pwm-r8a7744 # RZ/G1N - renesas,pwm-r8a7745 # RZ/G1E -- cgit v1.2.3 From adfe9285bed09264bf99689c4a6e932f0134cdb1 Mon Sep 17 00:00:00 2001 From: Lad Prabhakar Date: Wed, 15 Jul 2020 12:08:52 +0100 Subject: dt-bindings: thermal: rcar-gen3-thermal: Add r8a774e1 support MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Document RZ/G2H (R8A774E1) SoC bindings. Signed-off-by: Lad Prabhakar Reviewed-by: Geert Uytterhoeven Reviewed-by: Niklas Söderlund Acked-by: Rob Herring Signed-off-by: Daniel Lezcano Link: https://lore.kernel.org/r/1594811350-14066-3-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com --- Documentation/devicetree/bindings/thermal/rcar-gen3-thermal.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/thermal/rcar-gen3-thermal.yaml b/Documentation/devicetree/bindings/thermal/rcar-gen3-thermal.yaml index b1a55ae497de..f386f2a7c06c 100644 --- a/Documentation/devicetree/bindings/thermal/rcar-gen3-thermal.yaml +++ b/Documentation/devicetree/bindings/thermal/rcar-gen3-thermal.yaml @@ -20,6 +20,7 @@ properties: enum: - renesas,r8a774a1-thermal # RZ/G2M - renesas,r8a774b1-thermal # RZ/G2N + - renesas,r8a774e1-thermal # RZ/G2H - renesas,r8a7795-thermal # R-Car H3 - renesas,r8a7796-thermal # R-Car M3-W - renesas,r8a77961-thermal # R-Car M3-W+ -- cgit v1.2.3 From 691f189d817bd513b55154d54d9c378fe368bae3 Mon Sep 17 00:00:00 2001 From: Yangtao Li Date: Fri, 24 Jul 2020 15:10:57 +0800 Subject: dt-bindings: thermal: sun8i: Add binding for A100's THS controller Add a binding for A100's ths controller. Signed-off-by: Yangtao Li Reviewed-by: Rob Herring Acked-by: Maxime Ripard Signed-off-by: Daniel Lezcano Link: https://lore.kernel.org/r/8280af8ad82ed340c0ef1c171684aaad91600679.1595572867.git.frank@allwinnertech.com --- .../devicetree/bindings/thermal/allwinner,sun8i-a83t-ths.yaml | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/thermal/allwinner,sun8i-a83t-ths.yaml b/Documentation/devicetree/bindings/thermal/allwinner,sun8i-a83t-ths.yaml index 44ba6765697d..31edd051295a 100644 --- a/Documentation/devicetree/bindings/thermal/allwinner,sun8i-a83t-ths.yaml +++ b/Documentation/devicetree/bindings/thermal/allwinner,sun8i-a83t-ths.yaml @@ -17,6 +17,7 @@ properties: - allwinner,sun8i-h3-ths - allwinner,sun8i-r40-ths - allwinner,sun50i-a64-ths + - allwinner,sun50i-a100-ths - allwinner,sun50i-h5-ths - allwinner,sun50i-h6-ths @@ -61,7 +62,9 @@ allOf: properties: compatible: contains: - const: allwinner,sun50i-h6-ths + enum: + - allwinner,sun50i-a100-ths + - allwinner,sun50i-h6-ths then: properties: @@ -103,6 +106,7 @@ allOf: - const: allwinner,sun8i-h3-ths - const: allwinner,sun8i-r40-ths - const: allwinner,sun50i-a64-ths + - const: allwinner,sun50i-a100-ths - const: allwinner,sun50i-h5-ths - const: allwinner,sun50i-h6-ths -- cgit v1.2.3 From 9070f35d25ce1781e3b5a3c6f68287ce3b8f937d Mon Sep 17 00:00:00 2001 From: Viresh Kumar Date: Thu, 8 Oct 2020 20:14:49 +0100 Subject: dt-bindings: mailbox : arm,mhu: Convert to Json-schema Convert the DT binding over to Json-schema. Reviewed-by: Rob Herring Signed-off-by: Viresh Kumar Signed-off-by: Sudeep Holla Signed-off-by: Jassi Brar --- .../devicetree/bindings/mailbox/arm,mhu.yaml | 87 ++++++++++++++++++++++ .../devicetree/bindings/mailbox/arm-mhu.txt | 43 ----------- 2 files changed, 87 insertions(+), 43 deletions(-) create mode 100644 Documentation/devicetree/bindings/mailbox/arm,mhu.yaml delete mode 100644 Documentation/devicetree/bindings/mailbox/arm-mhu.txt (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/mailbox/arm,mhu.yaml b/Documentation/devicetree/bindings/mailbox/arm,mhu.yaml new file mode 100644 index 000000000000..2c8df7979c22 --- /dev/null +++ b/Documentation/devicetree/bindings/mailbox/arm,mhu.yaml @@ -0,0 +1,87 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mailbox/arm,mhu.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ARM MHU Mailbox Controller + +maintainers: + - Jassi Brar + +description: | + The ARM's Message-Handling-Unit (MHU) is a mailbox controller that has 3 + independent channels/links to communicate with remote processor(s). MHU links + are hardwired on a platform. A link raises interrupt for any received data. + However, there is no specified way of knowing if the sent data has been read + by the remote. This driver assumes the sender polls STAT register and the + remote clears it after having read the data. The last channel is specified to + be a 'Secure' resource, hence can't be used by Linux running NS. + +# We need a select here so we don't match all nodes with 'arm,primecell' +select: + properties: + compatible: + contains: + const: arm,mhu + required: + - compatible + +properties: + compatible: + items: + - const: arm,mhu + - const: arm,primecell + + reg: + maxItems: 1 + + interrupts: + items: + - description: low-priority non-secure + - description: high-priority non-secure + - description: Secure + maxItems: 3 + + clocks: + maxItems: 1 + + clock-names: + items: + - const: apb_pclk + + '#mbox-cells': + description: Index of the channel. + const: 1 + +required: + - compatible + - reg + - interrupts + - '#mbox-cells' + +additionalProperties: false + +examples: + - | + soc { + #address-cells = <2>; + #size-cells = <2>; + + mhuA: mailbox@2b1f0000 { + #mbox-cells = <1>; + compatible = "arm,mhu", "arm,primecell"; + reg = <0 0x2b1f0000 0 0x1000>; + interrupts = <0 36 4>, /* LP-NonSecure */ + <0 35 4>, /* HP-NonSecure */ + <0 37 4>; /* Secure */ + clocks = <&clock 0 2 1>; + clock-names = "apb_pclk"; + }; + + mhu_client_scb: scb@2e000000 { + compatible = "fujitsu,mb86s70-scb-1.0"; + reg = <0 0x2e000000 0 0x4000>; + mboxes = <&mhuA 1>; /* HP-NonSecure */ + }; + }; diff --git a/Documentation/devicetree/bindings/mailbox/arm-mhu.txt b/Documentation/devicetree/bindings/mailbox/arm-mhu.txt deleted file mode 100644 index 4971f03f0b33..000000000000 --- a/Documentation/devicetree/bindings/mailbox/arm-mhu.txt +++ /dev/null @@ -1,43 +0,0 @@ -ARM MHU Mailbox Driver -====================== - -The ARM's Message-Handling-Unit (MHU) is a mailbox controller that has -3 independent channels/links to communicate with remote processor(s). - MHU links are hardwired on a platform. A link raises interrupt for any -received data. However, there is no specified way of knowing if the sent -data has been read by the remote. This driver assumes the sender polls -STAT register and the remote clears it after having read the data. -The last channel is specified to be a 'Secure' resource, hence can't be -used by Linux running NS. - -Mailbox Device Node: -==================== - -Required properties: --------------------- -- compatible: Shall be "arm,mhu" & "arm,primecell" -- reg: Contains the mailbox register address range (base - address and length) -- #mbox-cells Shall be 1 - the index of the channel needed. -- interrupts: Contains the interrupt information corresponding to - each of the 3 links of MHU. - -Example: --------- - - mhu: mailbox@2b1f0000 { - #mbox-cells = <1>; - compatible = "arm,mhu", "arm,primecell"; - reg = <0 0x2b1f0000 0x1000>; - interrupts = <0 36 4>, /* LP-NonSecure */ - <0 35 4>, /* HP-NonSecure */ - <0 37 4>; /* Secure */ - clocks = <&clock 0 2 1>; - clock-names = "apb_pclk"; - }; - - mhu_client: scb@2e000000 { - compatible = "fujitsu,mb86s70-scb-1.0"; - reg = <0 0x2e000000 0x4000>; - mboxes = <&mhu 1>; /* HP-NonSecure */ - }; -- cgit v1.2.3 From 471de2c027422b372b1bb2578aa3123ee56b7125 Mon Sep 17 00:00:00 2001 From: Sudeep Holla Date: Thu, 8 Oct 2020 20:14:50 +0100 Subject: dt-bindings: mailbox: add doorbell support to ARM MHU The ARM MHU's reference manual states following: "The MHU drives the signal using a 32-bit register, with all 32 bits logically ORed together. The MHU provides a set of registers to enable software to set, clear, and check the status of each of the bits of this register independently. The use of 32 bits for each interrupt line enables software to provide more information about the source of the interrupt. For example, each bit of the register can be associated with a type of event that can contribute to raising the interrupt." This patch thus extends the MHU controller's DT binding to add support for doorbell mode. Though the same MHU hardware controller is used in the two modes, A new compatible string is added here to represent the combination of the MHU hardware and the firmware sitting on the other side (which expects each bit to represent a different signal now). Reviewed-by: Rob Herring Acked-by: Arnd Bergmann Co-developed-by: Viresh Kumar Signed-off-by: Viresh Kumar Signed-off-by: Sudeep Holla Signed-off-by: Jassi Brar --- .../devicetree/bindings/mailbox/arm,mhu.yaml | 60 +++++++++++++++++++--- 1 file changed, 54 insertions(+), 6 deletions(-) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/mailbox/arm,mhu.yaml b/Documentation/devicetree/bindings/mailbox/arm,mhu.yaml index 2c8df7979c22..d43791a2dde7 100644 --- a/Documentation/devicetree/bindings/mailbox/arm,mhu.yaml +++ b/Documentation/devicetree/bindings/mailbox/arm,mhu.yaml @@ -18,20 +18,40 @@ description: | remote clears it after having read the data. The last channel is specified to be a 'Secure' resource, hence can't be used by Linux running NS. + The MHU hardware also allows operations in doorbell mode. The MHU drives the + interrupt signal using a 32-bit register, with all 32-bits logically ORed + together. It provides a set of registers to enable software to set, clear and + check the status of each of the bits of this register independently. The use + of 32 bits per interrupt line enables software to provide more information + about the source of the interrupt. For example, each bit of the register can + be associated with a type of event that can contribute to raising the + interrupt. Each of the 32-bits can be used as "doorbell" to alert the remote + processor. + # We need a select here so we don't match all nodes with 'arm,primecell' select: properties: compatible: contains: - const: arm,mhu + enum: + - arm,mhu + - arm,mhu-doorbell required: - compatible properties: compatible: - items: - - const: arm,mhu - - const: arm,primecell + oneOf: + - description: Data transfer mode + items: + - const: arm,mhu + - const: arm,primecell + + - description: Doorbell mode + items: + - const: arm,mhu-doorbell + - const: arm,primecell + reg: maxItems: 1 @@ -51,8 +71,11 @@ properties: - const: apb_pclk '#mbox-cells': - description: Index of the channel. - const: 1 + description: | + Set to 1 in data transfer mode and represents index of the channel. + Set to 2 in doorbell mode and represents index of the channel and doorbell + number. + enum: [ 1, 2 ] required: - compatible @@ -63,6 +86,7 @@ required: additionalProperties: false examples: + # Data transfer mode. - | soc { #address-cells = <2>; @@ -85,3 +109,27 @@ examples: mboxes = <&mhuA 1>; /* HP-NonSecure */ }; }; + + # Doorbell mode. + - | + soc { + #address-cells = <2>; + #size-cells = <2>; + + mhuB: mailbox@2b2f0000 { + #mbox-cells = <2>; + compatible = "arm,mhu-doorbell", "arm,primecell"; + reg = <0 0x2b2f0000 0 0x1000>; + interrupts = <0 36 4>, /* LP-NonSecure */ + <0 35 4>, /* HP-NonSecure */ + <0 37 4>; /* Secure */ + clocks = <&clock 0 2 1>; + clock-names = "apb_pclk"; + }; + + mhu_client_scpi: scpi@2f000000 { + compatible = "arm,scpi"; + reg = <0 0x2f000000 0 0x200>; + mboxes = <&mhuB 1 4>; /* HP-NonSecure, 5th doorbell */ + }; + }; -- cgit v1.2.3 From 927f56d67f474aa75be877fb548f99b71941c62f Mon Sep 17 00:00:00 2001 From: Kunihiko Hayashi Date: Wed, 30 Sep 2020 14:36:04 +0900 Subject: dt-bindings: PCI: uniphier: Add iATU register description In the dt-bindings, "atu" reg-names is required to get the register space for iATU in Synopsys DWC version 4.80 or later. Link: https://lore.kernel.org/r/1601444167-11316-2-git-send-email-hayashi.kunihiko@socionext.com Signed-off-by: Kunihiko Hayashi Signed-off-by: Lorenzo Pieralisi Acked-by: Rob Herring --- Documentation/devicetree/bindings/pci/uniphier-pcie.txt | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/pci/uniphier-pcie.txt b/Documentation/devicetree/bindings/pci/uniphier-pcie.txt index 1fa2c5906d4d..c4b7381733a0 100644 --- a/Documentation/devicetree/bindings/pci/uniphier-pcie.txt +++ b/Documentation/devicetree/bindings/pci/uniphier-pcie.txt @@ -16,6 +16,7 @@ Required properties: "dbi" - controller configuration registers "link" - SoC-specific glue layer registers "config" - PCIe configuration space + "atu" - iATU registers for DWC version 4.80 or later - clocks: A phandle to the clock gate for PCIe glue layer including the host controller. - resets: A phandle to the reset line for PCIe glue layer including -- cgit v1.2.3 From 1ba415a277c02f650f78fac9d493d6312cd27c47 Mon Sep 17 00:00:00 2001 From: Kunihiko Hayashi Date: Wed, 30 Sep 2020 14:36:05 +0900 Subject: dt-bindings: PCI: uniphier-ep: Add iATU register description In the dt-bindings, "atu" reg-names is required to get the register space for iATU in Synopsis DWC version 4.80 or later. Link: https://lore.kernel.org/r/1601444167-11316-3-git-send-email-hayashi.kunihiko@socionext.com Signed-off-by: Kunihiko Hayashi Signed-off-by: Lorenzo Pieralisi Reviewed-by: Rob Herring --- .../bindings/pci/socionext,uniphier-pcie-ep.yaml | 20 ++++++++++++++------ 1 file changed, 14 insertions(+), 6 deletions(-) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/pci/socionext,uniphier-pcie-ep.yaml b/Documentation/devicetree/bindings/pci/socionext,uniphier-pcie-ep.yaml index f0558b9cf9e9..f4292d2c54e3 100644 --- a/Documentation/devicetree/bindings/pci/socionext,uniphier-pcie-ep.yaml +++ b/Documentation/devicetree/bindings/pci/socionext,uniphier-pcie-ep.yaml @@ -23,14 +23,22 @@ properties: const: socionext,uniphier-pro5-pcie-ep reg: - maxItems: 4 + minItems: 4 + maxItems: 5 reg-names: - items: - - const: dbi - - const: dbi2 - - const: link - - const: addr_space + oneOf: + - items: + - const: dbi + - const: dbi2 + - const: link + - const: addr_space + - items: + - const: dbi + - const: dbi2 + - const: link + - const: addr_space + - const: atu clocks: maxItems: 2 -- cgit v1.2.3 From 8adea9b9459cf2ea9538cd0765a12200306179df Mon Sep 17 00:00:00 2001 From: Fabien Parent Date: Fri, 18 Sep 2020 15:23:02 +0200 Subject: dt-bindings: clock: mediatek: add bindings for MT8167 clocks Add binding documentation for topckgen, apmixedsys, infracfg, audsys, imgsys, mfgcfg, vdecsys on MT8167 SoC. Signed-off-by: Fabien Parent Reviewed-by: Rob Herring Link: https://lore.kernel.org/r/20200918132303.2831815-1-fparent@baylibre.com Signed-off-by: Stephen Boyd --- .../bindings/arm/mediatek/mediatek,apmixedsys.txt | 1 + .../bindings/arm/mediatek/mediatek,audsys.txt | 1 + .../bindings/arm/mediatek/mediatek,imgsys.txt | 1 + .../bindings/arm/mediatek/mediatek,infracfg.txt | 1 + .../bindings/arm/mediatek/mediatek,mfgcfg.txt | 1 + .../bindings/arm/mediatek/mediatek,topckgen.txt | 1 + .../bindings/arm/mediatek/mediatek,vdecsys.txt | 1 + include/dt-bindings/clock/mt8167-clk.h | 131 +++++++++++++++++++++ 8 files changed, 138 insertions(+) create mode 100644 include/dt-bindings/clock/mt8167-clk.h (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,apmixedsys.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,apmixedsys.txt index bd7a0fa5801b..ea827e8763de 100644 --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,apmixedsys.txt +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,apmixedsys.txt @@ -15,6 +15,7 @@ Required Properties: - "mediatek,mt7623-apmixedsys", "mediatek,mt2701-apmixedsys" - "mediatek,mt7629-apmixedsys" - "mediatek,mt8135-apmixedsys" + - "mediatek,mt8167-apmixedsys", "syscon" - "mediatek,mt8173-apmixedsys" - "mediatek,mt8183-apmixedsys", "syscon" - "mediatek,mt8516-apmixedsys" diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,audsys.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,audsys.txt index 38309db115f5..b32d374193c7 100644 --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,audsys.txt +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,audsys.txt @@ -11,6 +11,7 @@ Required Properties: - "mediatek,mt6779-audio", "syscon" - "mediatek,mt7622-audsys", "syscon" - "mediatek,mt7623-audsys", "mediatek,mt2701-audsys", "syscon" + - "mediatek,mt8167-audiosys", "syscon" - "mediatek,mt8183-audiosys", "syscon" - "mediatek,mt8516-audsys", "syscon" - #clock-cells: Must be 1 diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,imgsys.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,imgsys.txt index 1e1f00718a7d..dce4c9241932 100644 --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,imgsys.txt +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,imgsys.txt @@ -12,6 +12,7 @@ Required Properties: - "mediatek,mt6779-imgsys", "syscon" - "mediatek,mt6797-imgsys", "syscon" - "mediatek,mt7623-imgsys", "mediatek,mt2701-imgsys", "syscon" + - "mediatek,mt8167-imgsys", "syscon" - "mediatek,mt8173-imgsys", "syscon" - "mediatek,mt8183-imgsys", "syscon" - #clock-cells: Must be 1 diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.txt index 49a968be1a80..eb3523c7a7be 100644 --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.txt +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.txt @@ -16,6 +16,7 @@ Required Properties: - "mediatek,mt7623-infracfg", "mediatek,mt2701-infracfg", "syscon" - "mediatek,mt7629-infracfg", "syscon" - "mediatek,mt8135-infracfg", "syscon" + - "mediatek,mt8167-infracfg", "syscon" - "mediatek,mt8173-infracfg", "syscon" - "mediatek,mt8183-infracfg", "syscon" - "mediatek,mt8516-infracfg", "syscon" diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mfgcfg.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mfgcfg.txt index ad5f9d2f6818..054424fb64b4 100644 --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mfgcfg.txt +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mfgcfg.txt @@ -8,6 +8,7 @@ Required Properties: - compatible: Should be one of: - "mediatek,mt2712-mfgcfg", "syscon" - "mediatek,mt6779-mfgcfg", "syscon" + - "mediatek,mt8167-mfgcfg", "syscon" - "mediatek,mt8183-mfgcfg", "syscon" - #clock-cells: Must be 1 diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,topckgen.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,topckgen.txt index 9b0394cbbdc9..5ce7578cf274 100644 --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,topckgen.txt +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,topckgen.txt @@ -15,6 +15,7 @@ Required Properties: - "mediatek,mt7623-topckgen", "mediatek,mt2701-topckgen" - "mediatek,mt7629-topckgen" - "mediatek,mt8135-topckgen" + - "mediatek,mt8167-topckgen", "syscon" - "mediatek,mt8173-topckgen" - "mediatek,mt8183-topckgen", "syscon" - "mediatek,mt8516-topckgen" diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,vdecsys.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,vdecsys.txt index 7894558b7a1c..98195169176a 100644 --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,vdecsys.txt +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,vdecsys.txt @@ -11,6 +11,7 @@ Required Properties: - "mediatek,mt6779-vdecsys", "syscon" - "mediatek,mt6797-vdecsys", "syscon" - "mediatek,mt7623-vdecsys", "mediatek,mt2701-vdecsys", "syscon" + - "mediatek,mt8167-vdecsys", "syscon" - "mediatek,mt8173-vdecsys", "syscon" - "mediatek,mt8183-vdecsys", "syscon" - #clock-cells: Must be 1 diff --git a/include/dt-bindings/clock/mt8167-clk.h b/include/dt-bindings/clock/mt8167-clk.h new file mode 100644 index 000000000000..a96158edd817 --- /dev/null +++ b/include/dt-bindings/clock/mt8167-clk.h @@ -0,0 +1,131 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (c) 2020 MediaTek Inc. + * Copyright (c) 2020 BayLibre, SAS. + * Author: James Liao + * Fabien Parent + */ + +#ifndef _DT_BINDINGS_CLK_MT8167_H +#define _DT_BINDINGS_CLK_MT8167_H + +/* MT8167 is based on MT8516 */ +#include + +/* APMIXEDSYS */ + +#define CLK_APMIXED_TVDPLL (CLK_APMIXED_NR_CLK + 0) +#define CLK_APMIXED_LVDSPLL (CLK_APMIXED_NR_CLK + 1) +#define CLK_APMIXED_HDMI_REF (CLK_APMIXED_NR_CLK + 2) +#define MT8167_CLK_APMIXED_NR_CLK (CLK_APMIXED_NR_CLK + 3) + +/* TOPCKGEN */ + +#define CLK_TOP_DSI0_LNTC_DSICK (CLK_TOP_NR_CLK + 0) +#define CLK_TOP_VPLL_DPIX (CLK_TOP_NR_CLK + 1) +#define CLK_TOP_LVDSTX_CLKDIG_CTS (CLK_TOP_NR_CLK + 2) +#define CLK_TOP_HDMTX_CLKDIG_CTS (CLK_TOP_NR_CLK + 3) +#define CLK_TOP_LVDSPLL (CLK_TOP_NR_CLK + 4) +#define CLK_TOP_LVDSPLL_D2 (CLK_TOP_NR_CLK + 5) +#define CLK_TOP_LVDSPLL_D4 (CLK_TOP_NR_CLK + 6) +#define CLK_TOP_LVDSPLL_D8 (CLK_TOP_NR_CLK + 7) +#define CLK_TOP_MIPI_26M (CLK_TOP_NR_CLK + 8) +#define CLK_TOP_TVDPLL (CLK_TOP_NR_CLK + 9) +#define CLK_TOP_TVDPLL_D2 (CLK_TOP_NR_CLK + 10) +#define CLK_TOP_TVDPLL_D4 (CLK_TOP_NR_CLK + 11) +#define CLK_TOP_TVDPLL_D8 (CLK_TOP_NR_CLK + 12) +#define CLK_TOP_TVDPLL_D16 (CLK_TOP_NR_CLK + 13) +#define CLK_TOP_PWM_MM (CLK_TOP_NR_CLK + 14) +#define CLK_TOP_CAM_MM (CLK_TOP_NR_CLK + 15) +#define CLK_TOP_MFG_MM (CLK_TOP_NR_CLK + 16) +#define CLK_TOP_SPM_52M (CLK_TOP_NR_CLK + 17) +#define CLK_TOP_MIPI_26M_DBG (CLK_TOP_NR_CLK + 18) +#define CLK_TOP_SCAM_MM (CLK_TOP_NR_CLK + 19) +#define CLK_TOP_SMI_MM (CLK_TOP_NR_CLK + 20) +#define CLK_TOP_26M_HDMI_SIFM (CLK_TOP_NR_CLK + 21) +#define CLK_TOP_26M_CEC (CLK_TOP_NR_CLK + 22) +#define CLK_TOP_32K_CEC (CLK_TOP_NR_CLK + 23) +#define CLK_TOP_GCPU_B (CLK_TOP_NR_CLK + 24) +#define CLK_TOP_RG_VDEC (CLK_TOP_NR_CLK + 25) +#define CLK_TOP_RG_FDPI0 (CLK_TOP_NR_CLK + 26) +#define CLK_TOP_RG_FDPI1 (CLK_TOP_NR_CLK + 27) +#define CLK_TOP_RG_AXI_MFG (CLK_TOP_NR_CLK + 28) +#define CLK_TOP_RG_SLOW_MFG (CLK_TOP_NR_CLK + 29) +#define CLK_TOP_GFMUX_EMI1X_SEL (CLK_TOP_NR_CLK + 30) +#define CLK_TOP_CSW_MUX_MFG_SEL (CLK_TOP_NR_CLK + 31) +#define CLK_TOP_CAMTG_MM_SEL (CLK_TOP_NR_CLK + 32) +#define CLK_TOP_PWM_MM_SEL (CLK_TOP_NR_CLK + 33) +#define CLK_TOP_SPM_52M_SEL (CLK_TOP_NR_CLK + 34) +#define CLK_TOP_MFG_MM_SEL (CLK_TOP_NR_CLK + 35) +#define CLK_TOP_SMI_MM_SEL (CLK_TOP_NR_CLK + 36) +#define CLK_TOP_SCAM_MM_SEL (CLK_TOP_NR_CLK + 37) +#define CLK_TOP_VDEC_MM_SEL (CLK_TOP_NR_CLK + 38) +#define CLK_TOP_DPI0_MM_SEL (CLK_TOP_NR_CLK + 39) +#define CLK_TOP_DPI1_MM_SEL (CLK_TOP_NR_CLK + 40) +#define CLK_TOP_AXI_MFG_IN_SEL (CLK_TOP_NR_CLK + 41) +#define CLK_TOP_SLOW_MFG_SEL (CLK_TOP_NR_CLK + 42) +#define MT8167_CLK_TOP_NR_CLK (CLK_TOP_NR_CLK + 43) + +/* MFGCFG */ + +#define CLK_MFG_BAXI 0 +#define CLK_MFG_BMEM 1 +#define CLK_MFG_BG3D 2 +#define CLK_MFG_B26M 3 +#define CLK_MFG_NR_CLK 4 + +/* MMSYS */ + +#define CLK_MM_SMI_COMMON 0 +#define CLK_MM_SMI_LARB0 1 +#define CLK_MM_CAM_MDP 2 +#define CLK_MM_MDP_RDMA 3 +#define CLK_MM_MDP_RSZ0 4 +#define CLK_MM_MDP_RSZ1 5 +#define CLK_MM_MDP_TDSHP 6 +#define CLK_MM_MDP_WDMA 7 +#define CLK_MM_MDP_WROT 8 +#define CLK_MM_FAKE_ENG 9 +#define CLK_MM_DISP_OVL0 10 +#define CLK_MM_DISP_RDMA0 11 +#define CLK_MM_DISP_RDMA1 12 +#define CLK_MM_DISP_WDMA 13 +#define CLK_MM_DISP_COLOR 14 +#define CLK_MM_DISP_CCORR 15 +#define CLK_MM_DISP_AAL 16 +#define CLK_MM_DISP_GAMMA 17 +#define CLK_MM_DISP_DITHER 18 +#define CLK_MM_DISP_UFOE 19 +#define CLK_MM_DISP_PWM_MM 20 +#define CLK_MM_DISP_PWM_26M 21 +#define CLK_MM_DSI_ENGINE 22 +#define CLK_MM_DSI_DIGITAL 23 +#define CLK_MM_DPI0_ENGINE 24 +#define CLK_MM_DPI0_PXL 25 +#define CLK_MM_LVDS_PXL 26 +#define CLK_MM_LVDS_CTS 27 +#define CLK_MM_DPI1_ENGINE 28 +#define CLK_MM_DPI1_PXL 29 +#define CLK_MM_HDMI_PXL 30 +#define CLK_MM_HDMI_SPDIF 31 +#define CLK_MM_HDMI_ADSP_BCK 32 +#define CLK_MM_HDMI_PLL 33 +#define CLK_MM_NR_CLK 34 + +/* IMGSYS */ + +#define CLK_IMG_LARB1_SMI 0 +#define CLK_IMG_CAM_SMI 1 +#define CLK_IMG_CAM_CAM 2 +#define CLK_IMG_SEN_TG 3 +#define CLK_IMG_SEN_CAM 4 +#define CLK_IMG_VENC 5 +#define CLK_IMG_NR_CLK 6 + +/* VDECSYS */ + +#define CLK_VDEC_CKEN 0 +#define CLK_VDEC_LARB1_CKEN 1 +#define CLK_VDEC_NR_CLK 2 + +#endif /* _DT_BINDINGS_CLK_MT8167_H */ -- cgit v1.2.3 From 5ee79c2ed5bde842cd29f6e7b84b8d67a0ca73b2 Mon Sep 17 00:00:00 2001 From: Suman Anna Date: Fri, 2 Oct 2020 18:42:31 -0500 Subject: dt-bindings: remoteproc: Add bindings for R5F subsystem on TI K3 SoCs The Texas Instruments K3 family of SoCs have one or more dual-core Arm Cortex R5F processor subsystems/clusters (R5FSS). The clusters can be split between multiple voltage domains as well. Add the device tree bindings document for these R5F subsystem devices. These R5F processors do not have an MMU, and so require fixed memory carveout regions matching the firmware image addresses. The nodes require more than one memory region, with the first memory region used for DMA allocations at runtime. The remaining memory regions are reserved and are used for the loading and running of the R5F remote processors. The R5F processors can also optionally use any internal on-chip SRAM memories either for executing code or using it as fast-access data. The added example illustrates the DT nodes for the single R5FSS device present on K3 AM65x family of SoCs. Signed-off-by: Suman Anna Link: https://lore.kernel.org/r/20201002234234.20704-2-s-anna@ti.com Signed-off-by: Bjorn Andersson --- .../bindings/remoteproc/ti,k3-r5f-rproc.yaml | 281 +++++++++++++++++++++ 1 file changed, 281 insertions(+) create mode 100644 Documentation/devicetree/bindings/remoteproc/ti,k3-r5f-rproc.yaml (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/remoteproc/ti,k3-r5f-rproc.yaml b/Documentation/devicetree/bindings/remoteproc/ti,k3-r5f-rproc.yaml new file mode 100644 index 000000000000..4069f0f5e8fa --- /dev/null +++ b/Documentation/devicetree/bindings/remoteproc/ti,k3-r5f-rproc.yaml @@ -0,0 +1,281 @@ +# SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/remoteproc/ti,k3-r5f-rproc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: TI K3 R5F processor subsystems + +maintainers: + - Suman Anna + +description: | + The TI K3 family of SoCs usually have one or more dual-core Arm Cortex R5F + processor subsystems/clusters (R5FSS). The dual core cluster can be used + either in a LockStep mode providing safety/fault tolerance features or in a + Split mode providing two individual compute cores for doubling the compute + capacity. These are used together with other processors present on the SoC + to achieve various system level goals. + + Each Dual-Core R5F sub-system is represented as a single DTS node + representing the cluster, with a pair of child DT nodes representing + the individual R5F cores. Each node has a number of required or optional + properties that enable the OS running on the host processor to perform + the device management of the remote processor and to communicate with the + remote processor. + +properties: + $nodename: + pattern: "^r5fss(@.*)?" + + compatible: + enum: + - ti,am654-r5fss + - ti,j721e-r5fss + + power-domains: + description: | + Should contain a phandle to a PM domain provider node and an args + specifier containing the R5FSS device id value. + maxItems: 1 + + "#address-cells": + const: 1 + + "#size-cells": + const: 1 + + ranges: + description: | + Standard ranges definition providing address translations for + local R5F TCM address spaces to bus addresses. + +# Optional properties: +# -------------------- + + ti,cluster-mode: + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [0, 1] + description: | + Configuration Mode for the Dual R5F cores within the R5F cluster. + Should be either a value of 1 (LockStep mode) or 0 (Split mode), + default is LockStep mode if omitted. + +# R5F Processor Child Nodes: +# ========================== + +patternProperties: + "^r5f@[a-f0-9]+$": + type: object + description: | + The R5F Sub-System device node should define two R5F child nodes, each + node representing a TI instantiation of the Arm Cortex R5F core. There + are some specific integration differences for the IP like the usage of + a Region Address Translator (RAT) for translating the larger SoC bus + addresses into a 32-bit address space for the processor. + + Each R5F core has an associated 64 KB of Tightly-Coupled Memory (TCM) + internal memories split between two banks - TCMA and TCMB (further + interleaved into two banks TCMB0 and TCMB1). These memories (also called + ATCM and BTCM) provide read/write performance on par with the core's L1 + caches. Each of the TCMs can be enabled or disabled independently and + either of them can be configured to appear at that R5F's address 0x0. + + The cores do not use an MMU, but has a Region Address Translater + (RAT) module that is accessible only from the R5Fs for providing + translations between 32-bit CPU addresses into larger system bus + addresses. Cache and memory access settings are provided through a + Memory Protection Unit (MPU), programmable only from the R5Fs. + + allOf: + - $ref: /schemas/arm/keystone/ti,k3-sci-common.yaml# + + properties: + compatible: + enum: + - ti,am654-r5f + - ti,j721e-r5f + + reg: + items: + - description: Address and Size of the ATCM internal memory region + - description: Address and Size of the BTCM internal memory region + + reg-names: + items: + - const: atcm + - const: btcm + + resets: + description: | + Should contain the phandle to the reset controller node managing the + local resets for this device, and a reset specifier. + maxItems: 1 + + firmware-name: + description: | + Should contain the name of the default firmware image + file located on the firmware search path + +# The following properties are mandatory for R5F Core0 in both LockStep and Split +# modes, and are mandatory for R5F Core1 _only_ in Split mode. They are unused for +# R5F Core1 in LockStep mode: + + mboxes: + description: | + OMAP Mailbox specifier denoting the sub-mailbox, to be used for + communication with the remote processor. This property should match + with the sub-mailbox node used in the firmware image. + maxItems: 1 + + memory-region: + description: | + phandle to the reserved memory nodes to be associated with the + remoteproc device. There should be at least two reserved memory nodes + defined. The reserved memory nodes should be carveout nodes, and + should be defined with a "no-map" property as per the bindings in + Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt + minItems: 2 + maxItems: 8 + items: + - description: region used for dynamic DMA allocations like vrings and + vring buffers + - description: region reserved for firmware image sections + additionalItems: true + + +# Optional properties: +# -------------------- +# The following properties are optional properties for each of the R5F cores: + + ti,atcm-enable: + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [0, 1] + description: | + R5F core configuration mode dictating if ATCM should be enabled. The + R5F address of ATCM is dictated by ti,loczrama property. Should be + either a value of 1 (enabled) or 0 (disabled), default is disabled + if omitted. Recommended to enable it for maximizing TCMs. + + ti,btcm-enable: + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [0, 1] + description: | + R5F core configuration mode dictating if BTCM should be enabled. The + R5F address of BTCM is dictated by ti,loczrama property. Should be + either a value of 1 (enabled) or 0 (disabled), default is enabled if + omitted. + + ti,loczrama: + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [0, 1] + description: | + R5F core configuration mode dictating which TCM should appear at + address 0 (from core's view). Should be either a value of 1 (ATCM + at 0x0) or 0 (BTCM at 0x0), default value is 1 if omitted. + + sram: + $ref: /schemas/types.yaml#/definitions/phandle-array + minItems: 1 + maxItems: 4 + description: | + phandles to one or more reserved on-chip SRAM regions. The regions + should be defined as child nodes of the respective SRAM node, and + should be defined as per the generic bindings in, + Documentation/devicetree/bindings/sram/sram.yaml + + required: + - compatible + - reg + - reg-names + - ti,sci + - ti,sci-dev-id + - ti,sci-proc-ids + - resets + - firmware-name + + unevaluatedProperties: false + +required: + - compatible + - power-domains + - "#address-cells" + - "#size-cells" + - ranges + +additionalProperties: false + +examples: + - | + / { + model = "Texas Instruments K3 AM654 SoC"; + compatible = "ti,am654-evm", "ti,am654"; + #address-cells = <2>; + #size-cells = <2>; + + bus@100000 { + compatible = "simple-bus"; + #address-cells = <2>; + #size-cells = <2>; + ranges = <0x00 0x00100000 0x00 0x00100000 0x00 0x00020000>, /* ctrl mmr */ + <0x00 0x41000000 0x00 0x41000000 0x00 0x00020000>, + <0x00 0x41400000 0x00 0x41400000 0x00 0x00020000>, + <0x00 0x41c00000 0x00 0x41c00000 0x00 0x00080000>; + + bus@28380000 { + compatible = "simple-bus"; + #address-cells = <2>; + #size-cells = <2>; + ranges = <0x00 0x28380000 0x00 0x28380000 0x00 0x03880000>, /* MCU NAVSS */ + <0x00 0x41000000 0x00 0x41000000 0x00 0x00020000>, /* MCU R5F Core0 */ + <0x00 0x41400000 0x00 0x41400000 0x00 0x00020000>, /* MCU R5F Core1 */ + <0x00 0x41c00000 0x00 0x41c00000 0x00 0x00080000>; /* MCU SRAM */ + + /* AM65x MCU R5FSS node */ + mcu_r5fss0: r5fss@41000000 { + compatible = "ti,am654-r5fss"; + power-domains = <&k3_pds 129>; + ti,cluster-mode = <1>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x41000000 0x00 0x41000000 0x20000>, + <0x41400000 0x00 0x41400000 0x20000>; + + mcu_r5f0: r5f@41000000 { + compatible = "ti,am654-r5f"; + reg = <0x41000000 0x00008000>, + <0x41010000 0x00008000>; + reg-names = "atcm", "btcm"; + ti,sci = <&dmsc>; + ti,sci-dev-id = <159>; + ti,sci-proc-ids = <0x01 0xFF>; + resets = <&k3_reset 159 1>; + firmware-name = "am65x-mcu-r5f0_0-fw"; + ti,atcm-enable = <1>; + ti,btcm-enable = <1>; + ti,loczrama = <1>; + mboxes = <&mailbox0 &mbox_mcu_r5fss0_core0>; + memory-region = <&mcu_r5fss0_core0_dma_memory_region>, + <&mcu_r5fss0_core0_memory_region>; + sram = <&mcu_r5fss0_core0_sram>; + }; + + mcu_r5f1: r5f@41400000 { + compatible = "ti,am654-r5f"; + reg = <0x41400000 0x00008000>, + <0x41410000 0x00008000>; + reg-names = "atcm", "btcm"; + ti,sci = <&dmsc>; + ti,sci-dev-id = <245>; + ti,sci-proc-ids = <0x02 0xFF>; + resets = <&k3_reset 245 1>; + firmware-name = "am65x-mcu-r5f0_1-fw"; + ti,atcm-enable = <1>; + ti,btcm-enable = <1>; + ti,loczrama = <1>; + mboxes = <&mailbox1 &mbox_mcu_r5fss0_core1>; + }; + }; + }; + }; + }; -- cgit v1.2.3 From 70d795d2d836e686e2fd4ed1d0abd8fb6ed3ae2a Mon Sep 17 00:00:00 2001 From: Jonathan Marek Date: Wed, 23 Sep 2020 12:06:27 -0400 Subject: dt-bindings: clock: combine qcom,sdm845-videocc and qcom,sc7180-videocc These two bindings are almost identical, so combine them into one. This will make it easier to add the sm8150 and sm8250 videocc bindings. Signed-off-by: Jonathan Marek Reviewed-by: Rob Herring Link: https://lore.kernel.org/r/20200923160635.28370-2-jonathan@marek.ca Signed-off-by: Stephen Boyd --- .../bindings/clock/qcom,sc7180-videocc.yaml | 65 -------------------- .../bindings/clock/qcom,sdm845-videocc.yaml | 65 -------------------- .../devicetree/bindings/clock/qcom,videocc.yaml | 69 ++++++++++++++++++++++ 3 files changed, 69 insertions(+), 130 deletions(-) delete mode 100644 Documentation/devicetree/bindings/clock/qcom,sc7180-videocc.yaml delete mode 100644 Documentation/devicetree/bindings/clock/qcom,sdm845-videocc.yaml create mode 100644 Documentation/devicetree/bindings/clock/qcom,videocc.yaml (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/clock/qcom,sc7180-videocc.yaml b/Documentation/devicetree/bindings/clock/qcom,sc7180-videocc.yaml deleted file mode 100644 index 2feea2b91aa9..000000000000 --- a/Documentation/devicetree/bindings/clock/qcom,sc7180-videocc.yaml +++ /dev/null @@ -1,65 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0-only -%YAML 1.2 ---- -$id: http://devicetree.org/schemas/clock/qcom,sc7180-videocc.yaml# -$schema: http://devicetree.org/meta-schemas/core.yaml# - -title: Qualcomm Video Clock & Reset Controller Binding for SC7180 - -maintainers: - - Taniya Das - -description: | - Qualcomm video clock control module which supports the clocks, resets and - power domains on SC7180. - - See also dt-bindings/clock/qcom,videocc-sc7180.h. - -properties: - compatible: - const: qcom,sc7180-videocc - - clocks: - items: - - description: Board XO source - - clock-names: - items: - - const: bi_tcxo - - '#clock-cells': - const: 1 - - '#reset-cells': - const: 1 - - '#power-domain-cells': - const: 1 - - reg: - maxItems: 1 - -required: - - compatible - - reg - - clocks - - clock-names - - '#clock-cells' - - '#reset-cells' - - '#power-domain-cells' - -additionalProperties: false - -examples: - - | - #include - clock-controller@ab00000 { - compatible = "qcom,sc7180-videocc"; - reg = <0x0ab00000 0x10000>; - clocks = <&rpmhcc RPMH_CXO_CLK>; - clock-names = "bi_tcxo"; - #clock-cells = <1>; - #reset-cells = <1>; - #power-domain-cells = <1>; - }; -... diff --git a/Documentation/devicetree/bindings/clock/qcom,sdm845-videocc.yaml b/Documentation/devicetree/bindings/clock/qcom,sdm845-videocc.yaml deleted file mode 100644 index f7a0cf53d5f0..000000000000 --- a/Documentation/devicetree/bindings/clock/qcom,sdm845-videocc.yaml +++ /dev/null @@ -1,65 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0-only -%YAML 1.2 ---- -$id: http://devicetree.org/schemas/clock/qcom,sdm845-videocc.yaml# -$schema: http://devicetree.org/meta-schemas/core.yaml# - -title: Qualcomm Video Clock & Reset Controller Binding for SDM845 - -maintainers: - - Taniya Das - -description: | - Qualcomm video clock control module which supports the clocks, resets and - power domains on SDM845. - - See also dt-bindings/clock/qcom,videocc-sdm845.h. - -properties: - compatible: - const: qcom,sdm845-videocc - - clocks: - items: - - description: Board XO source - - clock-names: - items: - - const: bi_tcxo - - '#clock-cells': - const: 1 - - '#reset-cells': - const: 1 - - '#power-domain-cells': - const: 1 - - reg: - maxItems: 1 - -required: - - compatible - - reg - - clocks - - clock-names - - '#clock-cells' - - '#reset-cells' - - '#power-domain-cells' - -additionalProperties: false - -examples: - - | - #include - clock-controller@ab00000 { - compatible = "qcom,sdm845-videocc"; - reg = <0x0ab00000 0x10000>; - clocks = <&rpmhcc RPMH_CXO_CLK>; - clock-names = "bi_tcxo"; - #clock-cells = <1>; - #reset-cells = <1>; - #power-domain-cells = <1>; - }; -... diff --git a/Documentation/devicetree/bindings/clock/qcom,videocc.yaml b/Documentation/devicetree/bindings/clock/qcom,videocc.yaml new file mode 100644 index 000000000000..874be03c33f5 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/qcom,videocc.yaml @@ -0,0 +1,69 @@ +# SPDX-License-Identifier: GPL-2.0-only +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/qcom,videocc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Video Clock & Reset Controller Binding + +maintainers: + - Taniya Das + +description: | + Qualcomm video clock control module which supports the clocks, resets and + power domains on SDM845/SC7180. + + See also: + dt-bindings/clock/qcom,videocc-sc7180.h + dt-bindings/clock/qcom,videocc-sdm845.h + +properties: + compatible: + enum: + - qcom,sc7180-videocc + - qcom,sdm845-videocc + + clocks: + items: + - description: Board XO source + + clock-names: + items: + - const: bi_tcxo + + '#clock-cells': + const: 1 + + '#reset-cells': + const: 1 + + '#power-domain-cells': + const: 1 + + reg: + maxItems: 1 + +required: + - compatible + - reg + - clocks + - clock-names + - '#clock-cells' + - '#reset-cells' + - '#power-domain-cells' + +additionalProperties: false + +examples: + - | + #include + clock-controller@ab00000 { + compatible = "qcom,sdm845-videocc"; + reg = <0x0ab00000 0x10000>; + clocks = <&rpmhcc RPMH_CXO_CLK>; + clock-names = "bi_tcxo"; + #clock-cells = <1>; + #reset-cells = <1>; + #power-domain-cells = <1>; + }; +... -- cgit v1.2.3 From df3f61d2cdc9eac4c9c8316ca2d1a2efea39c8a0 Mon Sep 17 00:00:00 2001 From: Jonathan Marek Date: Wed, 23 Sep 2020 12:06:28 -0400 Subject: dt-bindings: clock: add SM8150 QCOM video clock bindings Add device tree bindings for video clock controller for SM8150 SoCs. Signed-off-by: Jonathan Marek Reviewed-by: Rob Herring Link: https://lore.kernel.org/r/20200923160635.28370-3-jonathan@marek.ca Signed-off-by: Stephen Boyd --- .../devicetree/bindings/clock/qcom,videocc.yaml | 4 +++- include/dt-bindings/clock/qcom,videocc-sm8150.h | 25 ++++++++++++++++++++++ 2 files changed, 28 insertions(+), 1 deletion(-) create mode 100644 include/dt-bindings/clock/qcom,videocc-sm8150.h (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/clock/qcom,videocc.yaml b/Documentation/devicetree/bindings/clock/qcom,videocc.yaml index 874be03c33f5..bb1c1a841b68 100644 --- a/Documentation/devicetree/bindings/clock/qcom,videocc.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,videocc.yaml @@ -11,17 +11,19 @@ maintainers: description: | Qualcomm video clock control module which supports the clocks, resets and - power domains on SDM845/SC7180. + power domains on SDM845/SC7180/SM8150. See also: dt-bindings/clock/qcom,videocc-sc7180.h dt-bindings/clock/qcom,videocc-sdm845.h + dt-bindings/clock/qcom,videocc-sm8150.h properties: compatible: enum: - qcom,sc7180-videocc - qcom,sdm845-videocc + - qcom,sm8150-videocc clocks: items: diff --git a/include/dt-bindings/clock/qcom,videocc-sm8150.h b/include/dt-bindings/clock/qcom,videocc-sm8150.h new file mode 100644 index 000000000000..e24ee840cfdb --- /dev/null +++ b/include/dt-bindings/clock/qcom,videocc-sm8150.h @@ -0,0 +1,25 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (c) 2017-2020, The Linux Foundation. All rights reserved. + */ + +#ifndef _DT_BINDINGS_CLK_QCOM_VIDEO_CC_SM8150_H +#define _DT_BINDINGS_CLK_QCOM_VIDEO_CC_SM8150_H + +/* VIDEO_CC clocks */ +#define VIDEO_CC_IRIS_AHB_CLK 0 +#define VIDEO_CC_IRIS_CLK_SRC 1 +#define VIDEO_CC_MVS0_CORE_CLK 2 +#define VIDEO_CC_MVS1_CORE_CLK 3 +#define VIDEO_CC_MVSC_CORE_CLK 4 +#define VIDEO_CC_PLL0 5 + +/* VIDEO_CC Resets */ +#define VIDEO_CC_MVSC_CORE_CLK_BCR 0 + +/* VIDEO_CC GDSCRs */ +#define VENUS_GDSC 0 +#define VCODEC0_GDSC 1 +#define VCODEC1_GDSC 2 + +#endif -- cgit v1.2.3 From dafb992a95e1c19ba62596b111d88f56f20ef887 Mon Sep 17 00:00:00 2001 From: Jonathan Marek Date: Wed, 23 Sep 2020 12:06:29 -0400 Subject: dt-bindings: clock: add SM8250 QCOM video clock bindings Add device tree bindings for video clock controller for SM8250 SoCs. Signed-off-by: Jonathan Marek Reviewed-by: Rob Herring Link: https://lore.kernel.org/r/20200923160635.28370-4-jonathan@marek.ca Signed-off-by: Stephen Boyd --- .../devicetree/bindings/clock/qcom,videocc.yaml | 4 ++- include/dt-bindings/clock/qcom,videocc-sm8250.h | 34 ++++++++++++++++++++++ 2 files changed, 37 insertions(+), 1 deletion(-) create mode 100644 include/dt-bindings/clock/qcom,videocc-sm8250.h (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/clock/qcom,videocc.yaml b/Documentation/devicetree/bindings/clock/qcom,videocc.yaml index bb1c1a841b68..567202942b88 100644 --- a/Documentation/devicetree/bindings/clock/qcom,videocc.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,videocc.yaml @@ -11,12 +11,13 @@ maintainers: description: | Qualcomm video clock control module which supports the clocks, resets and - power domains on SDM845/SC7180/SM8150. + power domains on SDM845/SC7180/SM8150/SM8250. See also: dt-bindings/clock/qcom,videocc-sc7180.h dt-bindings/clock/qcom,videocc-sdm845.h dt-bindings/clock/qcom,videocc-sm8150.h + dt-bindings/clock/qcom,videocc-sm8250.h properties: compatible: @@ -24,6 +25,7 @@ properties: - qcom,sc7180-videocc - qcom,sdm845-videocc - qcom,sm8150-videocc + - qcom,sm8250-videocc clocks: items: diff --git a/include/dt-bindings/clock/qcom,videocc-sm8250.h b/include/dt-bindings/clock/qcom,videocc-sm8250.h new file mode 100644 index 000000000000..2b2b3867af25 --- /dev/null +++ b/include/dt-bindings/clock/qcom,videocc-sm8250.h @@ -0,0 +1,34 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (c) 2018-2020, The Linux Foundation. All rights reserved. + */ + +#ifndef _DT_BINDINGS_CLK_QCOM_VIDEO_CC_SM8250_H +#define _DT_BINDINGS_CLK_QCOM_VIDEO_CC_SM8250_H + +/* VIDEO_CC clocks */ +#define VIDEO_CC_MVS0_CLK_SRC 0 +#define VIDEO_CC_MVS0C_CLK 1 +#define VIDEO_CC_MVS0C_DIV2_DIV_CLK_SRC 2 +#define VIDEO_CC_MVS1_CLK_SRC 3 +#define VIDEO_CC_MVS1_DIV2_CLK 4 +#define VIDEO_CC_MVS1C_CLK 5 +#define VIDEO_CC_MVS1C_DIV2_DIV_CLK_SRC 6 +#define VIDEO_CC_PLL0 7 +#define VIDEO_CC_PLL1 8 + +/* VIDEO_CC resets */ +#define VIDEO_CC_CVP_INTERFACE_BCR 0 +#define VIDEO_CC_CVP_MVS0_BCR 1 +#define VIDEO_CC_MVS0C_CLK_ARES 2 +#define VIDEO_CC_CVP_MVS0C_BCR 3 +#define VIDEO_CC_CVP_MVS1_BCR 4 +#define VIDEO_CC_MVS1C_CLK_ARES 5 +#define VIDEO_CC_CVP_MVS1C_BCR 6 + +#define MVS0C_GDSC 0 +#define MVS1C_GDSC 1 +#define MVS0_GDSC 2 +#define MVS1_GDSC 3 + +#endif -- cgit v1.2.3 From d05a58047c75126a74dc32f3f94cbcd9a6fbad0e Mon Sep 17 00:00:00 2001 From: Jonathan Marek Date: Sun, 27 Sep 2020 15:06:50 -0400 Subject: dt-bindings: clock: add QCOM SM8150 and SM8250 display clock bindings Add device tree bindings for display clock controller for Qualcomm Technology Inc's SM8150 and SM8250 SoCs. Signed-off-by: Jonathan Marek Tested-by: Dmitry Baryshkov (SM8250) Link: https://lore.kernel.org/r/20200927190653.13876-2-jonathan@marek.ca Reviewed-by: Rob Herring Signed-off-by: Stephen Boyd --- .../bindings/clock/qcom,dispcc-sm8x50.yaml | 93 ++++++++++++++++++++++ include/dt-bindings/clock/qcom,dispcc-sm8150.h | 1 + include/dt-bindings/clock/qcom,dispcc-sm8250.h | 66 +++++++++++++++ 3 files changed, 160 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/qcom,dispcc-sm8x50.yaml create mode 120000 include/dt-bindings/clock/qcom,dispcc-sm8150.h create mode 100644 include/dt-bindings/clock/qcom,dispcc-sm8250.h (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/clock/qcom,dispcc-sm8x50.yaml b/Documentation/devicetree/bindings/clock/qcom,dispcc-sm8x50.yaml new file mode 100644 index 000000000000..0cdf53f41f84 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/qcom,dispcc-sm8x50.yaml @@ -0,0 +1,93 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/qcom,dispcc-sm8x50.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Display Clock & Reset Controller Binding for SM8150/SM8250 + +maintainers: + - Jonathan Marek + +description: | + Qualcomm display clock control module which supports the clocks, resets and + power domains on SM8150 and SM8250. + + See also: + dt-bindings/clock/qcom,dispcc-sm8150.h + dt-bindings/clock/qcom,dispcc-sm8250.h + +properties: + compatible: + enum: + - qcom,sm8150-dispcc + - qcom,sm8250-dispcc + + clocks: + items: + - description: Board XO source + - description: Byte clock from DSI PHY0 + - description: Pixel clock from DSI PHY0 + - description: Byte clock from DSI PHY1 + - description: Pixel clock from DSI PHY1 + - description: Link clock from DP PHY + - description: VCO DIV clock from DP PHY + + clock-names: + items: + - const: bi_tcxo + - const: dsi0_phy_pll_out_byteclk + - const: dsi0_phy_pll_out_dsiclk + - const: dsi1_phy_pll_out_byteclk + - const: dsi1_phy_pll_out_dsiclk + - const: dp_phy_pll_link_clk + - const: dp_phy_pll_vco_div_clk + + '#clock-cells': + const: 1 + + '#reset-cells': + const: 1 + + '#power-domain-cells': + const: 1 + + reg: + maxItems: 1 + +required: + - compatible + - reg + - clocks + - clock-names + - '#clock-cells' + - '#reset-cells' + - '#power-domain-cells' + +additionalProperties: false + +examples: + - | + #include + clock-controller@af00000 { + compatible = "qcom,sm8250-dispcc"; + reg = <0x0af00000 0x10000>; + clocks = <&rpmhcc RPMH_CXO_CLK>, + <&dsi0_phy 0>, + <&dsi0_phy 1>, + <&dsi1_phy 0>, + <&dsi1_phy 1>, + <&dp_phy 0>, + <&dp_phy 1>; + clock-names = "bi_tcxo", + "dsi0_phy_pll_out_byteclk", + "dsi0_phy_pll_out_dsiclk", + "dsi1_phy_pll_out_byteclk", + "dsi1_phy_pll_out_dsiclk", + "dp_phy_pll_link_clk", + "dp_phy_pll_vco_div_clk"; + #clock-cells = <1>; + #reset-cells = <1>; + #power-domain-cells = <1>; + }; +... diff --git a/include/dt-bindings/clock/qcom,dispcc-sm8150.h b/include/dt-bindings/clock/qcom,dispcc-sm8150.h new file mode 120000 index 000000000000..0312b4544acb --- /dev/null +++ b/include/dt-bindings/clock/qcom,dispcc-sm8150.h @@ -0,0 +1 @@ +qcom,dispcc-sm8250.h \ No newline at end of file diff --git a/include/dt-bindings/clock/qcom,dispcc-sm8250.h b/include/dt-bindings/clock/qcom,dispcc-sm8250.h new file mode 100644 index 000000000000..fdaca6ad5c85 --- /dev/null +++ b/include/dt-bindings/clock/qcom,dispcc-sm8250.h @@ -0,0 +1,66 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (c) 2018-2020, The Linux Foundation. All rights reserved. + */ + +#ifndef _DT_BINDINGS_CLK_QCOM_DISP_CC_SM8250_H +#define _DT_BINDINGS_CLK_QCOM_DISP_CC_SM8250_H + +/* DISP_CC clock registers */ +#define DISP_CC_MDSS_AHB_CLK 0 +#define DISP_CC_MDSS_AHB_CLK_SRC 1 +#define DISP_CC_MDSS_BYTE0_CLK 2 +#define DISP_CC_MDSS_BYTE0_CLK_SRC 3 +#define DISP_CC_MDSS_BYTE0_DIV_CLK_SRC 4 +#define DISP_CC_MDSS_BYTE0_INTF_CLK 5 +#define DISP_CC_MDSS_BYTE1_CLK 6 +#define DISP_CC_MDSS_BYTE1_CLK_SRC 7 +#define DISP_CC_MDSS_BYTE1_DIV_CLK_SRC 8 +#define DISP_CC_MDSS_BYTE1_INTF_CLK 9 +#define DISP_CC_MDSS_DP_AUX1_CLK 10 +#define DISP_CC_MDSS_DP_AUX1_CLK_SRC 11 +#define DISP_CC_MDSS_DP_AUX_CLK 12 +#define DISP_CC_MDSS_DP_AUX_CLK_SRC 13 +#define DISP_CC_MDSS_DP_LINK1_CLK 14 +#define DISP_CC_MDSS_DP_LINK1_CLK_SRC 15 +#define DISP_CC_MDSS_DP_LINK1_DIV_CLK_SRC 16 +#define DISP_CC_MDSS_DP_LINK1_INTF_CLK 17 +#define DISP_CC_MDSS_DP_LINK_CLK 18 +#define DISP_CC_MDSS_DP_LINK_CLK_SRC 19 +#define DISP_CC_MDSS_DP_LINK_DIV_CLK_SRC 20 +#define DISP_CC_MDSS_DP_LINK_INTF_CLK 21 +#define DISP_CC_MDSS_DP_PIXEL1_CLK 22 +#define DISP_CC_MDSS_DP_PIXEL1_CLK_SRC 23 +#define DISP_CC_MDSS_DP_PIXEL2_CLK 24 +#define DISP_CC_MDSS_DP_PIXEL2_CLK_SRC 25 +#define DISP_CC_MDSS_DP_PIXEL_CLK 26 +#define DISP_CC_MDSS_DP_PIXEL_CLK_SRC 27 +#define DISP_CC_MDSS_ESC0_CLK 28 +#define DISP_CC_MDSS_ESC0_CLK_SRC 29 +#define DISP_CC_MDSS_ESC1_CLK 30 +#define DISP_CC_MDSS_ESC1_CLK_SRC 31 +#define DISP_CC_MDSS_MDP_CLK 32 +#define DISP_CC_MDSS_MDP_CLK_SRC 33 +#define DISP_CC_MDSS_MDP_LUT_CLK 34 +#define DISP_CC_MDSS_NON_GDSC_AHB_CLK 35 +#define DISP_CC_MDSS_PCLK0_CLK 36 +#define DISP_CC_MDSS_PCLK0_CLK_SRC 37 +#define DISP_CC_MDSS_PCLK1_CLK 38 +#define DISP_CC_MDSS_PCLK1_CLK_SRC 39 +#define DISP_CC_MDSS_ROT_CLK 40 +#define DISP_CC_MDSS_ROT_CLK_SRC 41 +#define DISP_CC_MDSS_RSCC_AHB_CLK 42 +#define DISP_CC_MDSS_RSCC_VSYNC_CLK 43 +#define DISP_CC_MDSS_VSYNC_CLK 44 +#define DISP_CC_MDSS_VSYNC_CLK_SRC 45 +#define DISP_CC_PLL0 46 +#define DISP_CC_PLL1 47 + +/* DISP_CC Reset */ +#define DISP_CC_MDSS_CORE_BCR 0 +#define DISP_CC_MDSS_RSCC_BCR 1 + +/* DISP_CC GDSCR */ +#define MDSS_GDSC 0 + +#endif -- cgit v1.2.3 From 7e65fa4a49a6d46fea32a4e6cf8c6dd27c061890 Mon Sep 17 00:00:00 2001 From: Nobuhiro Iwamatsu Date: Mon, 5 Oct 2020 11:30:11 +0900 Subject: watchdog: bindings: Add binding documentation for Toshiba Visconti watchdog device Add documentation for the binding of Toshiba Visconti SoC's watchdog. Signed-off-by: Nobuhiro Iwamatsu Reviewed-by: Punit Agrawal Reviewed-by: Rob Herring Reviewed-by: Guenter Roeck Link: https://lore.kernel.org/r/20201005023012.603026-2-nobuhiro1.iwamatsu@toshiba.co.jp Signed-off-by: Guenter Roeck Signed-off-by: Wim Van Sebroeck --- .../bindings/watchdog/toshiba,visconti-wdt.yaml | 54 ++++++++++++++++++++++ 1 file changed, 54 insertions(+) create mode 100644 Documentation/devicetree/bindings/watchdog/toshiba,visconti-wdt.yaml (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/watchdog/toshiba,visconti-wdt.yaml b/Documentation/devicetree/bindings/watchdog/toshiba,visconti-wdt.yaml new file mode 100644 index 000000000000..690e19ce4b87 --- /dev/null +++ b/Documentation/devicetree/bindings/watchdog/toshiba,visconti-wdt.yaml @@ -0,0 +1,54 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +# Copyright 2020 Toshiba Electronic Devices & Storage Corporation +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/watchdog/toshiba,visconti-wdt.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Toshiba Visconti SoCs PIUWDT Watchdog timer + +maintainers: + - Nobuhiro Iwamatsu + +allOf: + - $ref: watchdog.yaml# + +properties: + compatible: + enum: + - toshiba,visconti-wdt + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + timeout-sec: true + +required: + - compatible + - reg + - clocks + +additionalProperties: false + +examples: + - | + soc { + #address-cells = <2>; + #size-cells = <2>; + + wdt_clk: wdt-clk { + compatible = "fixed-clock"; + clock-frequency = <150000000>; + #clock-cells = <0>; + }; + + watchdog@28330000 { + compatible = "toshiba,visconti-wdt"; + reg = <0 0x28330000 0 0x1000>; + clocks = <&wdt_clk>; + timeout-sec = <20>; + }; + }; -- cgit v1.2.3 From 480017f00c6b8f843b9604a38f544a99881a67b1 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Wed, 26 Aug 2020 10:03:52 +0200 Subject: dt-bindings: fix references to files converted to yaml There were several files converted to yaml, but the .txt file is still referenced somewhere else. Update the references for them to point to the right file. Signed-off-by: Mauro Carvalho Chehab --- .../devicetree/bindings/display/tilcdc/tilcdc.txt | 2 +- .../devicetree/bindings/mailbox/omap-mailbox.txt | 2 +- Documentation/devicetree/bindings/media/i2c/tvp5150.txt | 2 +- .../devicetree/bindings/pwm/google,cros-ec-pwm.yaml | 2 +- .../devicetree/bindings/soc/qcom/qcom,smd-rpm.yaml | 2 +- .../devicetree/bindings/sound/google,cros-ec-codec.yaml | 2 +- MAINTAINERS | 16 ++++++++-------- 7 files changed, 14 insertions(+), 14 deletions(-) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/display/tilcdc/tilcdc.txt b/Documentation/devicetree/bindings/display/tilcdc/tilcdc.txt index 8b2a71395647..3e64075ac7ec 100644 --- a/Documentation/devicetree/bindings/display/tilcdc/tilcdc.txt +++ b/Documentation/devicetree/bindings/display/tilcdc/tilcdc.txt @@ -37,7 +37,7 @@ Optional nodes: supports a single port with a single endpoint. - See also Documentation/devicetree/bindings/display/tilcdc/panel.txt and - Documentation/devicetree/bindings/display/bridge/ti,tfp410.txt for connecting + Documentation/devicetree/bindings/display/bridge/ti,tfp410.yaml for connecting tfp410 DVI encoder or lcd panel to lcdc [1] There is an errata about AM335x color wiring. For 16-bit color mode diff --git a/Documentation/devicetree/bindings/mailbox/omap-mailbox.txt b/Documentation/devicetree/bindings/mailbox/omap-mailbox.txt index 35c3f56b7f7b..5fe80c1c19fc 100644 --- a/Documentation/devicetree/bindings/mailbox/omap-mailbox.txt +++ b/Documentation/devicetree/bindings/mailbox/omap-mailbox.txt @@ -69,7 +69,7 @@ The following are mandatory properties for the K3 AM65x and J721E SoCs only: the interrupt routes between the IP and the main GIC controllers. See the following binding for additional details, - Documentation/devicetree/bindings/interrupt-controller/ti,sci-intr.txt + Documentation/devicetree/bindings/interrupt-controller/ti,sci-intr.yaml Child Nodes: ============ diff --git a/Documentation/devicetree/bindings/media/i2c/tvp5150.txt b/Documentation/devicetree/bindings/media/i2c/tvp5150.txt index 6c88ce858d08..719b2995dc17 100644 --- a/Documentation/devicetree/bindings/media/i2c/tvp5150.txt +++ b/Documentation/devicetree/bindings/media/i2c/tvp5150.txt @@ -56,7 +56,7 @@ Optional Connector Properties: instead of using the autodetection mechnism. Please look at [1] for more information. -[1] Documentation/devicetree/bindings/display/connector/analog-tv-connector.txt. +[1] Documentation/devicetree/bindings/display/connector/analog-tv-connector.yaml. Example - three input sources: #include diff --git a/Documentation/devicetree/bindings/pwm/google,cros-ec-pwm.yaml b/Documentation/devicetree/bindings/pwm/google,cros-ec-pwm.yaml index 41ece1d85315..4cfbffd8414a 100644 --- a/Documentation/devicetree/bindings/pwm/google,cros-ec-pwm.yaml +++ b/Documentation/devicetree/bindings/pwm/google,cros-ec-pwm.yaml @@ -14,7 +14,7 @@ description: | Google's ChromeOS EC PWM is a simple PWM attached to the Embedded Controller (EC) and controlled via a host-command interface. An EC PWM node should be only found as a sub-node of the EC node (see - Documentation/devicetree/bindings/mfd/cros-ec.txt). + Documentation/devicetree/bindings/mfd/google,cros-ec.yaml). properties: compatible: diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm.yaml index 468d658ce3e7..2684f22a1d85 100644 --- a/Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm.yaml +++ b/Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm.yaml @@ -20,7 +20,7 @@ description: | present and this subnode may contain children that designate regulator resources. - Refer to Documentation/devicetree/bindings/regulator/qcom,smd-rpm-regulator.txt + Refer to Documentation/devicetree/bindings/regulator/qcom,smd-rpm-regulator.yaml for information on the regulator subnodes that can exist under the rpm_requests. diff --git a/Documentation/devicetree/bindings/sound/google,cros-ec-codec.yaml b/Documentation/devicetree/bindings/sound/google,cros-ec-codec.yaml index c84e656afb0a..3b9143af2c7c 100644 --- a/Documentation/devicetree/bindings/sound/google,cros-ec-codec.yaml +++ b/Documentation/devicetree/bindings/sound/google,cros-ec-codec.yaml @@ -13,7 +13,7 @@ description: | Google's ChromeOS EC codec is a digital mic codec provided by the Embedded Controller (EC) and is controlled via a host-command interface. An EC codec node should only be found as a sub-node of the EC node (see - Documentation/devicetree/bindings/mfd/cros-ec.txt). + Documentation/devicetree/bindings/mfd/google,cros-ec.yaml). properties: compatible: diff --git a/MAINTAINERS b/MAINTAINERS index 7100c51adf25..ab0361f4bd9f 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1534,7 +1534,7 @@ L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) S: Maintained F: Documentation/devicetree/bindings/arm/actions.yaml F: Documentation/devicetree/bindings/clock/actions,owl-cmu.txt -F: Documentation/devicetree/bindings/dma/owl-dma.txt +F: Documentation/devicetree/bindings/dma/owl-dma.yaml F: Documentation/devicetree/bindings/i2c/i2c-owl.txt F: Documentation/devicetree/bindings/interrupt-controller/actions,owl-sirq.yaml F: Documentation/devicetree/bindings/mmc/owl-mmc.yaml @@ -5849,7 +5849,7 @@ L: linux-renesas-soc@vger.kernel.org S: Supported T: git git://linuxtv.org/pinchartl/media drm/du/next F: Documentation/devicetree/bindings/display/bridge/renesas,dw-hdmi.txt -F: Documentation/devicetree/bindings/display/bridge/renesas,lvds.txt +F: Documentation/devicetree/bindings/display/bridge/renesas,lvds.yaml F: Documentation/devicetree/bindings/display/renesas,du.txt F: drivers/gpu/drm/rcar-du/ F: drivers/gpu/drm/shmobile/ @@ -6974,7 +6974,7 @@ M: Frank Li L: linux-arm-kernel@lists.infradead.org S: Maintained F: Documentation/admin-guide/perf/imx-ddr.rst -F: Documentation/devicetree/bindings/perf/fsl-imx-ddr.txt +F: Documentation/devicetree/bindings/perf/fsl-imx-ddr.yaml F: drivers/perf/fsl_imx8_ddr_perf.c FREESCALE IMX I2C DRIVER @@ -6982,7 +6982,7 @@ M: Oleksij Rempel R: Pengutronix Kernel Team L: linux-i2c@vger.kernel.org S: Maintained -F: Documentation/devicetree/bindings/i2c/i2c-imx.txt +F: Documentation/devicetree/bindings/i2c/i2c-imx.yaml F: drivers/i2c/busses/i2c-imx.c FREESCALE IMX LPI2C DRIVER @@ -6990,7 +6990,7 @@ M: Dong Aisheng L: linux-i2c@vger.kernel.org L: linux-imx@nxp.com S: Maintained -F: Documentation/devicetree/bindings/i2c/i2c-imx-lpi2c.txt +F: Documentation/devicetree/bindings/i2c/i2c-imx-lpi2c.yaml F: drivers/i2c/busses/i2c-imx-lpi2c.c FREESCALE QORIQ DPAA ETHERNET DRIVER @@ -11621,7 +11621,7 @@ MIPS GENERIC PLATFORM M: Paul Burton L: linux-mips@vger.kernel.org S: Supported -F: Documentation/devicetree/bindings/power/mti,mips-cpc.txt +F: Documentation/devicetree/bindings/power/mti,mips-cpc.yaml F: arch/mips/generic/ F: arch/mips/tools/generic-board-config.sh @@ -12484,7 +12484,7 @@ NXP SGTL5000 DRIVER M: Fabio Estevam L: alsa-devel@alsa-project.org (moderated for non-subscribers) S: Maintained -F: Documentation/devicetree/bindings/sound/sgtl5000.txt +F: Documentation/devicetree/bindings/sound/sgtl5000.yaml F: sound/soc/codecs/sgtl5000* NXP SJA1105 ETHERNET SWITCH DRIVER @@ -16782,7 +16782,7 @@ SYNOPSYS DESIGNWARE DMAC DRIVER M: Viresh Kumar R: Andy Shevchenko S: Maintained -F: Documentation/devicetree/bindings/dma/snps-dma.txt +F: Documentation/devicetree/bindings/dma/snps,dma-spear1340.yaml F: drivers/dma/dw/ F: include/dt-bindings/dma/dw-dmac.h F: include/linux/dma/dw.h -- cgit v1.2.3 From 61ee0674bcfd80eaa0173215d38839a48b08b56b Mon Sep 17 00:00:00 2001 From: Alexandre Belloni Date: Tue, 13 Oct 2020 16:41:08 +0200 Subject: dt-bindings: rtc: add trickle-voltage-millivolt Some RTCs have a trickle charge that is able to output different voltages depending on the type of the connected auxiliary power (battery, supercap, ...). Add a property allowing to specify the necessary voltage. Signed-off-by: Alexandre Belloni Reviewed-by: Rob Herring Link: https://lore.kernel.org/r/20201013144110.1942218-1-alexandre.belloni@bootlin.com --- Documentation/devicetree/bindings/rtc/rtc.yaml | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/rtc/rtc.yaml b/Documentation/devicetree/bindings/rtc/rtc.yaml index 6b8a11325691..b1a45d2fc59a 100644 --- a/Documentation/devicetree/bindings/rtc/rtc.yaml +++ b/Documentation/devicetree/bindings/rtc/rtc.yaml @@ -52,6 +52,12 @@ properties: Selected resistor for trickle charger. Should be given if trickle charger should be enabled. + trickle-voltage-millivolt: + description: + Selected voltage for trickle charger. Should be given + if trickle charger should be enabled and the trickle voltage is different + from the RTC main power supply. + wakeup-source: $ref: /schemas/types.yaml#/definitions/flag description: -- cgit v1.2.3 From 5ebe59a50593b1978f16a9bf4a7a887dc7a82b7b Mon Sep 17 00:00:00 2001 From: Alexandre Belloni Date: Tue, 13 Oct 2020 16:41:09 +0200 Subject: dt-bindings: rtc: rv3032: add RV-3032 bindings Document the Microcrystal RV-3032 device tree bindings Signed-off-by: Alexandre Belloni Reviewed-by: Rob Herring Link: https://lore.kernel.org/r/20201013144110.1942218-2-alexandre.belloni@bootlin.com --- .../bindings/rtc/microcrystal,rv3032.yaml | 64 ++++++++++++++++++++++ 1 file changed, 64 insertions(+) create mode 100644 Documentation/devicetree/bindings/rtc/microcrystal,rv3032.yaml (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/rtc/microcrystal,rv3032.yaml b/Documentation/devicetree/bindings/rtc/microcrystal,rv3032.yaml new file mode 100644 index 000000000000..a2c55303810d --- /dev/null +++ b/Documentation/devicetree/bindings/rtc/microcrystal,rv3032.yaml @@ -0,0 +1,64 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/rtc/microcrystal,rv3032.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Microchip RV-3032 RTC Device Tree Bindings + +allOf: + - $ref: "rtc.yaml#" + +maintainers: + - Alexandre Belloni + +properties: + compatible: + const: microcrystal,rv3032 + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + start-year: true + + trickle-resistor-ohms: + enum: + - 1000 + - 2000 + - 7000 + - 11000 + + trickle-voltage-millivolt: + enum: + - 1750 + - 3000 + - 4400 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + #include + i2c { + #address-cells = <1>; + #size-cells = <0>; + + rtc@51 { + compatible = "microcrystal,rv3032"; + reg = <0x51>; + status = "okay"; + pinctrl-0 = <&rtc_nint_pins>; + interrupts-extended = <&gpio1 16 IRQ_TYPE_LEVEL_HIGH>; + trickle-resistor-ohms = <7000>; + trickle-voltage-millivolt = <1750>; + }; + }; + +... -- cgit v1.2.3 From acd7aaf51b20263a7e62d2a26569988c63bdd3d8 Mon Sep 17 00:00:00 2001 From: Ard Biesheuvel Date: Sun, 18 Oct 2020 18:36:25 +0200 Subject: netsec: ignore 'phy-mode' device property on ACPI systems Since commit bbc4d71d63549bc ("net: phy: realtek: fix rtl8211e rx/tx delay config"), the Realtek PHY driver will override any TX/RX delay set by hardware straps if the phy-mode device property does not match. This is causing problems on SynQuacer based platforms (the only SoC that incorporates the netsec hardware), since many were built with this Realtek PHY, and shipped with firmware that defines the phy-mode as 'rgmii', even though the PHY is configured for TX and RX delay using pull-ups. From the driver's perspective, we should not make any assumptions in the general case that the PHY hardware does not require any initial configuration. However, the situation is slightly different for ACPI boot, since it implies rich firmware with AML abstractions to handle hardware details that are not exposed to the OS. So in the ACPI case, it is reasonable to assume that the PHY comes up in the right mode, regardless of whether the mode is set by straps, by boot time firmware or by AML executed by the ACPI interpreter. So let's ignore the 'phy-mode' device property when probing the netsec driver in ACPI mode, and hardcode the mode to PHY_INTERFACE_MODE_NA, which should work with any PHY provided that it is configured by the time the driver attaches to it. While at it, document that omitting the mode is permitted for DT probing as well, by setting the phy-mode DT property to the empty string. Fixes: 533dd11a12f6 ("net: socionext: Add Synquacer NetSec driver") Signed-off-by: Ard Biesheuvel Reviewed-by: Ilias Apalodimas Reviewed-by: Andrew Lunn Link: https://lore.kernel.org/r/20201018163625.2392-1-ardb@kernel.org Signed-off-by: Jakub Kicinski --- .../devicetree/bindings/net/socionext-netsec.txt | 4 +++- drivers/net/ethernet/socionext/netsec.c | 24 +++++++++++++++------- 2 files changed, 20 insertions(+), 8 deletions(-) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/net/socionext-netsec.txt b/Documentation/devicetree/bindings/net/socionext-netsec.txt index 9d6c9feb12ff..a3c1dffaa4bb 100644 --- a/Documentation/devicetree/bindings/net/socionext-netsec.txt +++ b/Documentation/devicetree/bindings/net/socionext-netsec.txt @@ -30,7 +30,9 @@ Optional properties: (See ethernet.txt file in the same directory) - max-frame-size: See ethernet.txt in the same directory. The MAC address will be determined using the optional properties -defined in ethernet.txt. +defined in ethernet.txt. The 'phy-mode' property is required, but may +be set to the empty string if the PHY configuration is programmed by +the firmware or set by hardware straps, and needs to be preserved. Example: eth0: ethernet@522d0000 { diff --git a/drivers/net/ethernet/socionext/netsec.c b/drivers/net/ethernet/socionext/netsec.c index 806eb651cea3..1503cc9ec6e2 100644 --- a/drivers/net/ethernet/socionext/netsec.c +++ b/drivers/net/ethernet/socionext/netsec.c @@ -6,6 +6,7 @@ #include #include #include +#include #include #include #include @@ -1833,6 +1834,14 @@ static const struct net_device_ops netsec_netdev_ops = { static int netsec_of_probe(struct platform_device *pdev, struct netsec_priv *priv, u32 *phy_addr) { + int err; + + err = of_get_phy_mode(pdev->dev.of_node, &priv->phy_interface); + if (err) { + dev_err(&pdev->dev, "missing required property 'phy-mode'\n"); + return err; + } + priv->phy_np = of_parse_phandle(pdev->dev.of_node, "phy-handle", 0); if (!priv->phy_np) { dev_err(&pdev->dev, "missing required property 'phy-handle'\n"); @@ -1859,6 +1868,14 @@ static int netsec_acpi_probe(struct platform_device *pdev, if (!IS_ENABLED(CONFIG_ACPI)) return -ENODEV; + /* ACPI systems are assumed to configure the PHY in firmware, so + * there is really no need to discover the PHY mode from the DSDT. + * Since firmware is known to exist in the field that configures the + * PHY correctly but passes the wrong mode string in the phy-mode + * device property, we have no choice but to ignore it. + */ + priv->phy_interface = PHY_INTERFACE_MODE_NA; + ret = device_property_read_u32(&pdev->dev, "phy-channel", phy_addr); if (ret) { dev_err(&pdev->dev, @@ -1995,13 +2012,6 @@ static int netsec_probe(struct platform_device *pdev) priv->msg_enable = NETIF_MSG_TX_ERR | NETIF_MSG_HW | NETIF_MSG_DRV | NETIF_MSG_LINK | NETIF_MSG_PROBE; - priv->phy_interface = device_get_phy_mode(&pdev->dev); - if ((int)priv->phy_interface < 0) { - dev_err(&pdev->dev, "missing required property 'phy-mode'\n"); - ret = -ENODEV; - goto free_ndev; - } - priv->ioaddr = devm_ioremap(&pdev->dev, mmio_res->start, resource_size(mmio_res)); if (!priv->ioaddr) { -- cgit v1.2.3 From 2580a493a97da4a302cb66251b558bfc04c16e68 Mon Sep 17 00:00:00 2001 From: Guido Günther Date: Tue, 13 Oct 2020 12:32:48 +0200 Subject: dt-binding: display: Require two resets on mantix panel MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit We need to reset both for the panel to show an image. Fixes: b9ab1248d801 ("dt-bindings: Add Mantix MLAF057WE51-X panel bindings") Signed-off-by: Guido Günther Signed-off-by: Sam Ravnborg Reviewed-by: Sam Ravnborg Link: https://patchwork.freedesktop.org/patch/msgid/15d3dc7eb4e031f380be1298ed3ac9085626f26b.1602584953.git.agx@sigxcpu.org --- .../devicetree/bindings/display/panel/mantix,mlaf057we51-x.yaml | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/display/panel/mantix,mlaf057we51-x.yaml b/Documentation/devicetree/bindings/display/panel/mantix,mlaf057we51-x.yaml index 937323cc9aaa..51f423297ec8 100644 --- a/Documentation/devicetree/bindings/display/panel/mantix,mlaf057we51-x.yaml +++ b/Documentation/devicetree/bindings/display/panel/mantix,mlaf057we51-x.yaml @@ -37,6 +37,9 @@ properties: reset-gpios: true + 'mantix,tp-rstn-gpios': + description: second reset line that triggers DSI config load + backlight: true required: @@ -63,6 +66,7 @@ examples: avee-supply = <®_avee>; vddi-supply = <®_1v8_p>; reset-gpios = <&gpio1 29 GPIO_ACTIVE_LOW>; + mantix,tp-rstn-gpios = <&gpio1 24 GPIO_ACTIVE_LOW>; backlight = <&backlight>; }; }; -- cgit v1.2.3 From 194810f78402128fe07676646cf9027fd3ed431c Mon Sep 17 00:00:00 2001 From: Dan Murphy Date: Fri, 16 Oct 2020 06:57:03 -0500 Subject: dt-bindings: leds: Update devicetree documents for ID_RGB Update the leds/common.yaml to indicate that the max color ID is 9. Reflect the same change in the leds-class-multicolor.yaml Reported-by: Zhen Lei Signed-off-by: Dan Murphy Link: https://lore.kernel.org/r/20201016115703.30184-1-dmurphy@ti.com Signed-off-by: Rob Herring --- Documentation/devicetree/bindings/leds/common.yaml | 2 +- .../devicetree/bindings/leds/leds-class-multicolor.yaml | 9 +++++---- 2 files changed, 6 insertions(+), 5 deletions(-) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/leds/common.yaml b/Documentation/devicetree/bindings/leds/common.yaml index 08b6700ca61e..f1211e7045f1 100644 --- a/Documentation/devicetree/bindings/leds/common.yaml +++ b/Documentation/devicetree/bindings/leds/common.yaml @@ -43,7 +43,7 @@ properties: LED_COLOR_ID available, add a new one. $ref: /schemas/types.yaml#definitions/uint32 minimum: 0 - maximum: 8 + maximum: 9 function-enumerator: description: diff --git a/Documentation/devicetree/bindings/leds/leds-class-multicolor.yaml b/Documentation/devicetree/bindings/leds/leds-class-multicolor.yaml index b1a53f054b89..37445c68cdef 100644 --- a/Documentation/devicetree/bindings/leds/leds-class-multicolor.yaml +++ b/Documentation/devicetree/bindings/leds/leds-class-multicolor.yaml @@ -16,7 +16,7 @@ description: | modules. This is achieved by adding multi-led nodes layer to the monochrome LED bindings. The nodes and properties defined in this document are unique to the multicolor - LED class. Common LED nodes and properties are inherited from the common.txt + LED class. Common LED nodes and properties are inherited from the common.yaml within this documentation directory. patternProperties: @@ -25,10 +25,11 @@ patternProperties: description: Represents the LEDs that are to be grouped. properties: color: - const: 8 # LED_COLOR_ID_MULTI description: | - For multicolor LED support this property should be defined as - LED_COLOR_ID_MULTI which can be found in include/linux/leds/common.h. + For multicolor LED support this property should be defined as either + LED_COLOR_ID_RGB or LED_COLOR_ID_MULTI which can be found in + include/linux/leds/common.h. + enum: [ 8, 9 ] $ref: "common.yaml#" -- cgit v1.2.3 From f83b03fc727ab56a77e68713d6e40299698f3c9f Mon Sep 17 00:00:00 2001 From: Fabien Parent Date: Sun, 18 Oct 2020 21:30:16 +0200 Subject: dt-bindings: mailbox: mtk-gce: fix incorrect mbox-cells value As the binding documentation says, #mbox-cells must have a value of 2, but the example use a value 3. The MT8173 device tree correctly use mbox-cells = <2>. This commit fixes the example. Fixes: 19d8e335d58a ("dt-binding: gce: remove atomic_exec in mboxes property") Reviewed-by: Matthias Brugger Signed-off-by: Fabien Parent Link: https://lore.kernel.org/r/20201018193016.3339045-1-fparent@baylibre.com Signed-off-by: Rob Herring --- Documentation/devicetree/bindings/mailbox/mtk-gce.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/mailbox/mtk-gce.txt b/Documentation/devicetree/bindings/mailbox/mtk-gce.txt index cf48cd806e00..7771ecaac586 100644 --- a/Documentation/devicetree/bindings/mailbox/mtk-gce.txt +++ b/Documentation/devicetree/bindings/mailbox/mtk-gce.txt @@ -47,7 +47,7 @@ Example: interrupts = ; clocks = <&infracfg CLK_INFRA_GCE>; clock-names = "gce"; - #mbox-cells = <3>; + #mbox-cells = <2>; }; Example for a client device: -- cgit v1.2.3 From 7d54eb90cd44d809b6da56baa8b55299ca601473 Mon Sep 17 00:00:00 2001 From: Icenowy Zheng Date: Sun, 4 Oct 2020 07:50:18 +0800 Subject: dt-bindings: sram: sunxi-sram: add V3s compatible string Add compatible string for V3s, with H3 one as fallback. This is used in device tree now, but not standardized in DT binding. Signed-off-by: Icenowy Zheng Signed-off-by: Maxime Ripard Link: https://lore.kernel.org/r/20201003235018.1121618-2-icenowy@aosc.io Signed-off-by: Arnd Bergmann --- .../devicetree/bindings/sram/allwinner,sun4i-a10-system-control.yaml | 3 +++ 1 file changed, 3 insertions(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/sram/allwinner,sun4i-a10-system-control.yaml b/Documentation/devicetree/bindings/sram/allwinner,sun4i-a10-system-control.yaml index 6ebcbc153691..b66a07e21d1e 100644 --- a/Documentation/devicetree/bindings/sram/allwinner,sun4i-a10-system-control.yaml +++ b/Documentation/devicetree/bindings/sram/allwinner,sun4i-a10-system-control.yaml @@ -33,6 +33,9 @@ properties: - const: allwinner,sun4i-a10-system-control - const: allwinner,sun8i-a23-system-control - const: allwinner,sun8i-h3-system-control + - items: + - const: allwinner,sun8i-v3s-system-control + - const: allwinner,sun8i-h3-system-control - items: - const: allwinner,sun8i-r40-system-control - const: allwinner,sun4i-a10-system-control -- cgit v1.2.3 From 1acd4577a66f5125ede038ee16c33d05ddcaf153 Mon Sep 17 00:00:00 2001 From: Ricardo Cañuelo Date: Wed, 21 Oct 2020 13:43:06 +0200 Subject: dt-bindings: i2c: convert i2c-cros-ec-tunnel to json-schema MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Convert the google,cros-ec-i2c-tunnel binding to YAML and add it as a property of google,cros-ec.yaml. Reviewed-by: Enric Balletbo i Serra Signed-off-by: Ricardo Cañuelo Link: https://lore.kernel.org/r/20201021114308.25485-2-ricardo.canuelo@collabora.com [robh: add ref to i2c-controller.yaml] Signed-off-by: Rob Herring --- .../bindings/i2c/google,cros-ec-i2c-tunnel.yaml | 66 ++++++++++++++++++++++ .../devicetree/bindings/i2c/i2c-cros-ec-tunnel.txt | 39 ------------- .../devicetree/bindings/mfd/google,cros-ec.yaml | 5 ++ 3 files changed, 71 insertions(+), 39 deletions(-) create mode 100644 Documentation/devicetree/bindings/i2c/google,cros-ec-i2c-tunnel.yaml delete mode 100644 Documentation/devicetree/bindings/i2c/i2c-cros-ec-tunnel.txt (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/i2c/google,cros-ec-i2c-tunnel.yaml b/Documentation/devicetree/bindings/i2c/google,cros-ec-i2c-tunnel.yaml new file mode 100644 index 000000000000..b386e4128a79 --- /dev/null +++ b/Documentation/devicetree/bindings/i2c/google,cros-ec-i2c-tunnel.yaml @@ -0,0 +1,66 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- + +$id: http://devicetree.org/schemas/i2c/google,cros-ec-i2c-tunnel.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: I2C bus that tunnels through the ChromeOS EC (cros-ec) + +maintainers: + - Doug Anderson + - Benson Leung + - Enric Balletbo i Serra + +description: | + On some ChromeOS board designs we've got a connection to the EC + (embedded controller) but no direct connection to some devices on the + other side of the EC (like a battery and PMIC). To get access to + those devices we need to tunnel our i2c commands through the EC. + + The node for this device should be under a cros-ec node like + google,cros-ec-spi or google,cros-ec-i2c. + +allOf: + - $ref: i2c-controller.yaml# + +properties: + compatible: + const: google,cros-ec-i2c-tunnel + + google,remote-bus: + description: The EC bus we'd like to talk to. + $ref: /schemas/types.yaml#/definitions/uint32 + +required: + - compatible + - google,remote-bus + +unevaluatedProperties: false + +examples: + - | + spi0 { + #address-cells = <1>; + #size-cells = <0>; + + cros-ec@0 { + compatible = "google,cros-ec-spi"; + reg = <0>; + spi-max-frequency = <5000000>; + + i2c-tunnel { + compatible = "google,cros-ec-i2c-tunnel"; + #address-cells = <1>; + #size-cells = <0>; + + google,remote-bus = <0>; + + battery: sbs-battery@b { + compatible = "sbs,sbs-battery"; + reg = <0xb>; + sbs,poll-retry-count = <1>; + }; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/i2c/i2c-cros-ec-tunnel.txt b/Documentation/devicetree/bindings/i2c/i2c-cros-ec-tunnel.txt deleted file mode 100644 index 898f030eba62..000000000000 --- a/Documentation/devicetree/bindings/i2c/i2c-cros-ec-tunnel.txt +++ /dev/null @@ -1,39 +0,0 @@ -I2C bus that tunnels through the ChromeOS EC (cros-ec) -====================================================== -On some ChromeOS board designs we've got a connection to the EC (embedded -controller) but no direct connection to some devices on the other side of -the EC (like a battery and PMIC). To get access to those devices we need -to tunnel our i2c commands through the EC. - -The node for this device should be under a cros-ec node like google,cros-ec-spi -or google,cros-ec-i2c. - - -Required properties: -- compatible: google,cros-ec-i2c-tunnel -- google,remote-bus: The EC bus we'd like to talk to. - -Optional child nodes: -- One node per I2C device connected to the tunnelled I2C bus. - - -Example: - cros-ec@0 { - compatible = "google,cros-ec-spi"; - - ... - - i2c-tunnel { - compatible = "google,cros-ec-i2c-tunnel"; - #address-cells = <1>; - #size-cells = <0>; - - google,remote-bus = <0>; - - battery: sbs-battery@b { - compatible = "sbs,sbs-battery"; - reg = <0xb>; - sbs,poll-retry-count = <1>; - }; - }; - } diff --git a/Documentation/devicetree/bindings/mfd/google,cros-ec.yaml b/Documentation/devicetree/bindings/mfd/google,cros-ec.yaml index f49c0d5d31ad..c45cf30ea3aa 100644 --- a/Documentation/devicetree/bindings/mfd/google,cros-ec.yaml +++ b/Documentation/devicetree/bindings/mfd/google,cros-ec.yaml @@ -71,6 +71,11 @@ properties: wakeup-source: description: Button can wake-up the system. +patternProperties: + "^i2c-tunnel[0-9]*$": + type: object + $ref: "/schemas/i2c/google,cros-ec-i2c-tunnel.yaml#" + required: - compatible -- cgit v1.2.3 From 50d68feee01039e74e296c3d8453c0d72b546307 Mon Sep 17 00:00:00 2001 From: Ricardo Cañuelo Date: Wed, 21 Oct 2020 13:43:07 +0200 Subject: dt-bindings: input: convert cros-ec-keyb to json-schema MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Convert the google,cros-ec-keyb binding to YAML and add it as a property of google,cros-ec.yaml Reviewed-by: Enric Balletbo i Serra Signed-off-by: Ricardo Cañuelo Link: https://lore.kernel.org/r/20201021114308.25485-3-ricardo.canuelo@collabora.com Signed-off-by: Rob Herring --- .../devicetree/bindings/input/cros-ec-keyb.txt | 72 ----------------- .../bindings/input/google,cros-ec-keyb.yaml | 92 ++++++++++++++++++++++ .../devicetree/bindings/mfd/google,cros-ec.yaml | 3 + 3 files changed, 95 insertions(+), 72 deletions(-) delete mode 100644 Documentation/devicetree/bindings/input/cros-ec-keyb.txt create mode 100644 Documentation/devicetree/bindings/input/google,cros-ec-keyb.yaml (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/input/cros-ec-keyb.txt b/Documentation/devicetree/bindings/input/cros-ec-keyb.txt deleted file mode 100644 index 0f6355ce39b5..000000000000 --- a/Documentation/devicetree/bindings/input/cros-ec-keyb.txt +++ /dev/null @@ -1,72 +0,0 @@ -ChromeOS EC Keyboard - -Google's ChromeOS EC Keyboard is a simple matrix keyboard implemented on -a separate EC (Embedded Controller) device. It provides a message for reading -key scans from the EC. These are then converted into keycodes for processing -by the kernel. - -This binding is based on matrix-keymap.txt and extends/modifies it as follows: - -Required properties: -- compatible: "google,cros-ec-keyb" - -Optional properties: -- google,needs-ghost-filter: True to enable a ghost filter for the matrix -keyboard. This is recommended if the EC does not have its own logic or -hardware for this. - - -Example: - -cros-ec-keyb { - compatible = "google,cros-ec-keyb"; - keypad,num-rows = <8>; - keypad,num-columns = <13>; - google,needs-ghost-filter; - /* - * Keymap entries take the form of 0xRRCCKKKK where - * RR=Row CC=Column KKKK=Key Code - * The values below are for a US keyboard layout and - * are taken from the Linux driver. Note that the - * 102ND key is not used for US keyboards. - */ - linux,keymap = < - /* CAPSLCK F1 B F10 */ - 0x0001003a 0x0002003b 0x00030030 0x00040044 - /* N = R_ALT ESC */ - 0x00060031 0x0008000d 0x000a0064 0x01010001 - /* F4 G F7 H */ - 0x0102003e 0x01030022 0x01040041 0x01060023 - /* ' F9 BKSPACE L_CTRL */ - 0x01080028 0x01090043 0x010b000e 0x0200001d - /* TAB F3 T F6 */ - 0x0201000f 0x0202003d 0x02030014 0x02040040 - /* ] Y 102ND [ */ - 0x0205001b 0x02060015 0x02070056 0x0208001a - /* F8 GRAVE F2 5 */ - 0x02090042 0x03010029 0x0302003c 0x03030006 - /* F5 6 - \ */ - 0x0304003f 0x03060007 0x0308000c 0x030b002b - /* R_CTRL A D F */ - 0x04000061 0x0401001e 0x04020020 0x04030021 - /* S K J ; */ - 0x0404001f 0x04050025 0x04060024 0x04080027 - /* L ENTER Z C */ - 0x04090026 0x040b001c 0x0501002c 0x0502002e - /* V X , M */ - 0x0503002f 0x0504002d 0x05050033 0x05060032 - /* L_SHIFT / . SPACE */ - 0x0507002a 0x05080035 0x05090034 0x050B0039 - /* 1 3 4 2 */ - 0x06010002 0x06020004 0x06030005 0x06040003 - /* 8 7 0 9 */ - 0x06050009 0x06060008 0x0608000b 0x0609000a - /* L_ALT DOWN RIGHT Q */ - 0x060a0038 0x060b006c 0x060c006a 0x07010010 - /* E R W I */ - 0x07020012 0x07030013 0x07040011 0x07050017 - /* U R_SHIFT P O */ - 0x07060016 0x07070036 0x07080019 0x07090018 - /* UP LEFT */ - 0x070b0067 0x070c0069>; -}; diff --git a/Documentation/devicetree/bindings/input/google,cros-ec-keyb.yaml b/Documentation/devicetree/bindings/input/google,cros-ec-keyb.yaml new file mode 100644 index 000000000000..8e50c14a9d77 --- /dev/null +++ b/Documentation/devicetree/bindings/input/google,cros-ec-keyb.yaml @@ -0,0 +1,92 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- + +$id: http://devicetree.org/schemas/input/google,cros-ec-keyb.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ChromeOS EC Keyboard + +maintainers: + - Simon Glass + - Benson Leung + - Enric Balletbo i Serra + +description: | + Google's ChromeOS EC Keyboard is a simple matrix keyboard + implemented on a separate EC (Embedded Controller) device. It provides + a message for reading key scans from the EC. These are then converted + into keycodes for processing by the kernel. + +allOf: + - $ref: "/schemas/input/matrix-keymap.yaml#" + +properties: + compatible: + const: google,cros-ec-keyb + + google,needs-ghost-filter: + description: + Enable a ghost filter for the matrix keyboard. This is recommended + if the EC does not have its own logic or hardware for this. + type: boolean + +required: + - compatible + +unevaluatedProperties: false + +examples: + - | + cros-ec-keyb { + compatible = "google,cros-ec-keyb"; + keypad,num-rows = <8>; + keypad,num-columns = <13>; + google,needs-ghost-filter; + /* + * Keymap entries take the form of 0xRRCCKKKK where + * RR=Row CC=Column KKKK=Key Code + * The values below are for a US keyboard layout and + * are taken from the Linux driver. Note that the + * 102ND key is not used for US keyboards. + */ + linux,keymap = < + /* CAPSLCK F1 B F10 */ + 0x0001003a 0x0002003b 0x00030030 0x00040044 + /* N = R_ALT ESC */ + 0x00060031 0x0008000d 0x000a0064 0x01010001 + /* F4 G F7 H */ + 0x0102003e 0x01030022 0x01040041 0x01060023 + /* ' F9 BKSPACE L_CTRL */ + 0x01080028 0x01090043 0x010b000e 0x0200001d + /* TAB F3 T F6 */ + 0x0201000f 0x0202003d 0x02030014 0x02040040 + /* ] Y 102ND [ */ + 0x0205001b 0x02060015 0x02070056 0x0208001a + /* F8 GRAVE F2 5 */ + 0x02090042 0x03010029 0x0302003c 0x03030006 + /* F5 6 - \ */ + 0x0304003f 0x03060007 0x0308000c 0x030b002b + /* R_CTRL A D F */ + 0x04000061 0x0401001e 0x04020020 0x04030021 + /* S K J ; */ + 0x0404001f 0x04050025 0x04060024 0x04080027 + /* L ENTER Z C */ + 0x04090026 0x040b001c 0x0501002c 0x0502002e + /* V X , M */ + 0x0503002f 0x0504002d 0x05050033 0x05060032 + /* L_SHIFT / . SPACE */ + 0x0507002a 0x05080035 0x05090034 0x050B0039 + /* 1 3 4 2 */ + 0x06010002 0x06020004 0x06030005 0x06040003 + /* 8 7 0 9 */ + 0x06050009 0x06060008 0x0608000b 0x0609000a + /* L_ALT DOWN RIGHT Q */ + 0x060a0038 0x060b006c 0x060c006a 0x07010010 + /* E R W I */ + 0x07020012 0x07030013 0x07040011 0x07050017 + /* U R_SHIFT P O */ + 0x07060016 0x07070036 0x07080019 0x07090018 + /* UP LEFT */ + 0x070b0067 0x070c0069>; + }; diff --git a/Documentation/devicetree/bindings/mfd/google,cros-ec.yaml b/Documentation/devicetree/bindings/mfd/google,cros-ec.yaml index c45cf30ea3aa..351bfb6d37ba 100644 --- a/Documentation/devicetree/bindings/mfd/google,cros-ec.yaml +++ b/Documentation/devicetree/bindings/mfd/google,cros-ec.yaml @@ -71,6 +71,9 @@ properties: wakeup-source: description: Button can wake-up the system. + keyboard-controller: + $ref: "/schemas/input/google,cros-ec-keyb.yaml#" + patternProperties: "^i2c-tunnel[0-9]*$": type: object -- cgit v1.2.3 From 5c024e68d79b1ed8029afd2cae87c67865426cbe Mon Sep 17 00:00:00 2001 From: Ricardo Cañuelo Date: Wed, 21 Oct 2020 13:43:08 +0200 Subject: mfd: google,cros-ec: add missing properties MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add missing properties that are currently used in the examples of subnode bindings and in many DTs. Also updates the example in sound/google,cros-ec-codec.yaml to comply with the google,cros-ec binding. Reviewed-by: Enric Balletbo i Serra Signed-off-by: Ricardo Cañuelo Link: https://lore.kernel.org/r/20201021114308.25485-4-ricardo.canuelo@collabora.com [robh: Add missing '#address-cells' and '#size-cells'] Signed-off-by: Rob Herring --- .../devicetree/bindings/mfd/google,cros-ec.yaml | 48 ++++++++++++++++++++++ .../bindings/sound/google,cros-ec-codec.yaml | 26 +++++++----- 2 files changed, 64 insertions(+), 10 deletions(-) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/mfd/google,cros-ec.yaml b/Documentation/devicetree/bindings/mfd/google,cros-ec.yaml index 351bfb6d37ba..76bf16ee27ec 100644 --- a/Documentation/devicetree/bindings/mfd/google,cros-ec.yaml +++ b/Documentation/devicetree/bindings/mfd/google,cros-ec.yaml @@ -59,6 +59,14 @@ properties: whether this nvram is present or not. type: boolean + mtk,rpmsg-name: + description: + Must be defined if the cros-ec is a rpmsg device for a Mediatek + ARM Cortex M4 Co-processor. Contains the name pf the rpmsg + device. Used to match the subnode to the rpmsg device announced by + the SCP. + $ref: "/schemas/types.yaml#/definitions/string" + spi-max-frequency: description: Maximum SPI frequency of the device in Hz. @@ -71,14 +79,54 @@ properties: wakeup-source: description: Button can wake-up the system. + '#address-cells': + const: 1 + + '#size-cells': + const: 0 + + typec: + $ref: "/schemas/chrome/google,cros-ec-typec.yaml#" + + ec-pwm: + $ref: "/schemas/pwm/google,cros-ec-pwm.yaml#" + keyboard-controller: $ref: "/schemas/input/google,cros-ec-keyb.yaml#" + codecs: + type: object + additionalProperties: false + + properties: + '#address-cells': + const: 2 + + '#size-cells': + const: 1 + + patternProperties: + "^ec-codec@[a-f0-9]+$": + type: object + $ref: "/schemas/sound/google,cros-ec-codec.yaml#" + + required: + - "#address-cells" + - "#size-cells" + patternProperties: "^i2c-tunnel[0-9]*$": type: object $ref: "/schemas/i2c/google,cros-ec-i2c-tunnel.yaml#" + "^regulator@[0-9]+$": + type: object + $ref: "/schemas/regulator/google,cros-ec-regulator.yaml#" + + "^extcon[0-9]*$": + type: object + $ref: "/schemas/extcon/extcon-usbc-cros-ec.yaml#" + required: - compatible diff --git a/Documentation/devicetree/bindings/sound/google,cros-ec-codec.yaml b/Documentation/devicetree/bindings/sound/google,cros-ec-codec.yaml index 3b9143af2c7c..acfb9db021dc 100644 --- a/Documentation/devicetree/bindings/sound/google,cros-ec-codec.yaml +++ b/Documentation/devicetree/bindings/sound/google,cros-ec-codec.yaml @@ -11,9 +11,10 @@ maintainers: description: | Google's ChromeOS EC codec is a digital mic codec provided by the - Embedded Controller (EC) and is controlled via a host-command interface. - An EC codec node should only be found as a sub-node of the EC node (see - Documentation/devicetree/bindings/mfd/google,cros-ec.yaml). + Embedded Controller (EC) and is controlled via a host-command + interface. An EC codec node should only be found inside the "codecs" + subnode of a cros-ec node. + (see Documentation/devicetree/bindings/mfd/google,cros-ec.yaml). properties: compatible: @@ -54,14 +55,19 @@ examples: #size-cells = <0>; cros-ec@0 { compatible = "google,cros-ec-spi"; - #address-cells = <2>; - #size-cells = <1>; reg = <0>; - cros_ec_codec: ec-codec@10500000 { - compatible = "google,cros-ec-codec"; - #sound-dai-cells = <1>; - reg = <0x0 0x10500000 0x80000>; - memory-region = <&reserved_mem>; + + codecs { + #address-cells = <2>; + #size-cells = <1>; + + cros_ec_codec: ec-codec@10500000 { + compatible = "google,cros-ec-codec"; + #sound-dai-cells = <1>; + reg = <0x0 0x10500000 0x80000>; + memory-region = <&reserved_mem>; + }; + }; }; }; -- cgit v1.2.3 From 6ad8838de4e9ce7ccb19abeec169d224ddb07dde Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Mon, 20 Apr 2020 21:24:47 -0500 Subject: dt-bindings: More whitespace clean-ups in schema files Clean-up incorrect indentation, extra spaces, and missing EOF newline in schema files. Most of the clean-ups are for list indentation which should always be 2 spaces more than the preceding keyword. Found with yamllint (now integrated into the checks). Cc: linux-arm-kernel@lists.infradead.org Cc: dri-devel@lists.freedesktop.org Cc: linux-gpio@vger.kernel.org Cc: linux-i2c@vger.kernel.org Cc: linux-iio@vger.kernel.org Cc: linux-pm@vger.kernel.org Cc: alsa-devel@alsa-project.org Cc: linux-mmc@vger.kernel.org Cc: linux-mtd@lists.infradead.org Cc: linux-serial@vger.kernel.org Cc: linux-usb@vger.kernel.org Acked-by: Wolfram Sang # for I2C Acked-by: Sam Ravnborg # for display Acked-by: Jonathan Cameron #for-iio Signed-off-by: Rob Herring --- .../devicetree/bindings/arm/stm32/stm32.yaml | 8 +- .../bindings/display/bridge/toshiba,tc358775.yaml | 36 ++++---- .../bindings/display/panel/ilitek,ili9881c.yaml | 5 +- Documentation/devicetree/bindings/eeprom/at25.yaml | 6 +- .../bindings/gpio/kontron,sl28cpld-gpio.yaml | 4 +- .../devicetree/bindings/i2c/ingenic,i2c.yaml | 8 +- .../devicetree/bindings/iio/adc/adi,ad7291.yaml | 3 +- .../devicetree/bindings/iio/adc/adi,ad7768-1.yaml | 3 +- .../bindings/iio/adc/cosmic,10001-adc.yaml | 4 +- .../devicetree/bindings/iio/adc/holt,hi8435.yaml | 2 +- .../interrupt-controller/ti,pruss-intc.yaml | 12 +-- .../devicetree/bindings/mfd/ene-kb3930.yaml | 2 +- .../devicetree/bindings/mmc/arasan,sdhci.yaml | 8 +- .../devicetree/bindings/mmc/sdhci-am654.yaml | 15 ++- .../bindings/pci/socionext,uniphier-pcie-ep.yaml | 18 ++-- .../bindings/phy/socionext,uniphier-ahci-phy.yaml | 6 +- .../devicetree/bindings/phy/ti,omap-usb2.yaml | 20 ++-- .../bindings/pinctrl/actions,s500-pinctrl.yaml | 102 ++++++++++----------- .../bindings/pinctrl/pinctrl-mt8192.yaml | 2 +- .../bindings/pinctrl/qcom,msm8226-pinctrl.yaml | 6 +- .../bindings/pinctrl/toshiba,visconti-pinctrl.yaml | 24 ++--- .../bindings/power/reset/reboot-mode.yaml | 6 +- .../bindings/power/supply/ingenic,battery.yaml | 8 +- .../power/supply/summit,smb347-charger.yaml | 16 ++-- .../devicetree/bindings/riscv/sifive-l2-cache.yaml | 4 +- Documentation/devicetree/bindings/rng/imx-rng.yaml | 6 +- .../devicetree/bindings/serial/fsl-imx-uart.yaml | 34 +++---- .../devicetree/bindings/sound/mchp,spdifrx.yaml | 4 +- .../devicetree/bindings/sound/mchp,spdiftx.yaml | 4 +- .../devicetree/bindings/sound/qcom,lpass-cpu.yaml | 40 ++++---- .../devicetree/bindings/timer/arm,sp804.yaml | 12 +-- .../devicetree/bindings/usb/cdns,usb3.yaml | 4 +- .../devicetree/bindings/usb/ti,hd3ss3220.yaml | 2 +- .../devicetree/bindings/w1/fsl-imx-owire.yaml | 8 +- 34 files changed, 223 insertions(+), 219 deletions(-) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/arm/stm32/stm32.yaml b/Documentation/devicetree/bindings/arm/stm32/stm32.yaml index deacb4e686e8..6b87314eb9ed 100644 --- a/Documentation/devicetree/bindings/arm/stm32/stm32.yaml +++ b/Documentation/devicetree/bindings/arm/stm32/stm32.yaml @@ -54,8 +54,8 @@ properties: - const: st,stm32mp157 - description: Odyssey STM32MP1 SoM based Boards items: - - enum: - - seeed,stm32mp157c-odyssey - - const: seeed,stm32mp157c-odyssey-som - - const: st,stm32mp157 + - enum: + - seeed,stm32mp157c-odyssey + - const: seeed,stm32mp157c-odyssey-som + - const: st,stm32mp157 ... diff --git a/Documentation/devicetree/bindings/display/bridge/toshiba,tc358775.yaml b/Documentation/devicetree/bindings/display/bridge/toshiba,tc358775.yaml index 31f085d8ab13..e51d5cccc0e9 100644 --- a/Documentation/devicetree/bindings/display/bridge/toshiba,tc358775.yaml +++ b/Documentation/devicetree/bindings/display/bridge/toshiba,tc358775.yaml @@ -7,17 +7,17 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Toshiba TC358775 DSI to LVDS bridge bindings maintainers: - - Vinay Simha BN + - Vinay Simha BN description: | - This binding supports DSI to LVDS bridge TC358775 + This binding supports DSI to LVDS bridge TC358775 - MIPI DSI-RX Data 4-lane, CLK 1-lane with data rates up to 800 Mbps/lane. - Video frame size: - Up to 1600x1200 24-bit/pixel resolution for single-link LVDS display panel - limited by 135 MHz LVDS speed - Up to WUXGA (1920x1200 24-bit pixels) resolution for dual-link LVDS display - panel, limited by 270 MHz LVDS speed. + MIPI DSI-RX Data 4-lane, CLK 1-lane with data rates up to 800 Mbps/lane. + Video frame size: + Up to 1600x1200 24-bit/pixel resolution for single-link LVDS display panel + limited by 135 MHz LVDS speed + Up to WUXGA (1920x1200 24-bit pixels) resolution for dual-link LVDS display + panel, limited by 270 MHz LVDS speed. properties: compatible: @@ -29,7 +29,7 @@ properties: vdd-supply: maxItems: 1 - description: 1.2V LVDS Power Supply + description: 1.2V LVDS Power Supply vddio-supply: maxItems: 1 @@ -77,16 +77,16 @@ properties: - port@1 required: - - compatible - - reg - - vdd-supply - - vddio-supply - - stby-gpios - - reset-gpios - - ports + - compatible + - reg + - vdd-supply + - vddio-supply + - stby-gpios + - reset-gpios + - ports examples: - - | + - | #include /* For single-link LVDS display panel */ @@ -147,7 +147,7 @@ examples: }; }; - - | + - | /* For dual-link LVDS display panel */ i2c@78b8000 { diff --git a/Documentation/devicetree/bindings/display/panel/ilitek,ili9881c.yaml b/Documentation/devicetree/bindings/display/panel/ilitek,ili9881c.yaml index c60b3bd74337..b2fcec4f22fd 100644 --- a/Documentation/devicetree/bindings/display/panel/ilitek,ili9881c.yaml +++ b/Documentation/devicetree/bindings/display/panel/ilitek,ili9881c.yaml @@ -13,9 +13,8 @@ properties: compatible: items: - enum: - - bananapi,lhr050h41 - - feixin,k101-im2byl02 - + - bananapi,lhr050h41 + - feixin,k101-im2byl02 - const: ilitek,ili9881c backlight: true diff --git a/Documentation/devicetree/bindings/eeprom/at25.yaml b/Documentation/devicetree/bindings/eeprom/at25.yaml index 9810619a2b5c..744973637678 100644 --- a/Documentation/devicetree/bindings/eeprom/at25.yaml +++ b/Documentation/devicetree/bindings/eeprom/at25.yaml @@ -81,14 +81,14 @@ properties: at25,byte-len: $ref: /schemas/types.yaml#/definitions/uint32 description: - Total eeprom size in bytes. Deprecated, use "size" property instead. + Total eeprom size in bytes. Deprecated, use "size" property instead. deprecated: true at25,addr-mode: $ref: /schemas/types.yaml#/definitions/uint32 description: - Addr-mode flags, as defined in include/linux/spi/eeprom.h. - Deprecated, use "address-width" property instead. + Addr-mode flags, as defined in include/linux/spi/eeprom.h. + Deprecated, use "address-width" property instead. deprecated: true at25,page-size: diff --git a/Documentation/devicetree/bindings/gpio/kontron,sl28cpld-gpio.yaml b/Documentation/devicetree/bindings/gpio/kontron,sl28cpld-gpio.yaml index e2d2c10e536a..b032471831e7 100644 --- a/Documentation/devicetree/bindings/gpio/kontron,sl28cpld-gpio.yaml +++ b/Documentation/devicetree/bindings/gpio/kontron,sl28cpld-gpio.yaml @@ -43,8 +43,8 @@ properties: gpio-controller: true gpio-line-names: - minItems: 1 - maxItems: 8 + minItems: 1 + maxItems: 8 required: - compatible diff --git a/Documentation/devicetree/bindings/i2c/ingenic,i2c.yaml b/Documentation/devicetree/bindings/i2c/ingenic,i2c.yaml index 0e7b4b8a7e48..e1e65eb4f795 100644 --- a/Documentation/devicetree/bindings/i2c/ingenic,i2c.yaml +++ b/Documentation/devicetree/bindings/i2c/ingenic,i2c.yaml @@ -19,11 +19,11 @@ properties: compatible: oneOf: - enum: - - ingenic,jz4770-i2c - - ingenic,x1000-i2c + - ingenic,jz4770-i2c + - ingenic,x1000-i2c - items: - - const: ingenic,jz4780-i2c - - const: ingenic,jz4770-i2c + - const: ingenic,jz4780-i2c + - const: ingenic,jz4770-i2c reg: maxItems: 1 diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad7291.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad7291.yaml index 6feafb7e531e..930f9e3904d7 100644 --- a/Documentation/devicetree/bindings/iio/adc/adi,ad7291.yaml +++ b/Documentation/devicetree/bindings/iio/adc/adi,ad7291.yaml @@ -43,4 +43,5 @@ examples: vref-supply = <&adc_vref>; }; }; -... \ No newline at end of file +... + diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad7768-1.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad7768-1.yaml index d3733ad8785a..8f32800fe5b7 100644 --- a/Documentation/devicetree/bindings/iio/adc/adi,ad7768-1.yaml +++ b/Documentation/devicetree/bindings/iio/adc/adi,ad7768-1.yaml @@ -46,7 +46,8 @@ properties: spi-max-frequency: true spi-cpol: true - spi-cpha : true + + spi-cpha: true "#io-channel-cells": const: 1 diff --git a/Documentation/devicetree/bindings/iio/adc/cosmic,10001-adc.yaml b/Documentation/devicetree/bindings/iio/adc/cosmic,10001-adc.yaml index 5d92b477e23f..4e695b97d015 100644 --- a/Documentation/devicetree/bindings/iio/adc/cosmic,10001-adc.yaml +++ b/Documentation/devicetree/bindings/iio/adc/cosmic,10001-adc.yaml @@ -22,8 +22,8 @@ properties: adc-reserved-channels: $ref: /schemas/types.yaml#/definitions/uint32 description: - Bitmask of reserved channels, i.e. channels that cannot be - used by the OS. + Bitmask of reserved channels, i.e. channels that cannot be + used by the OS. clocks: maxItems: 1 diff --git a/Documentation/devicetree/bindings/iio/adc/holt,hi8435.yaml b/Documentation/devicetree/bindings/iio/adc/holt,hi8435.yaml index 9514c3381c42..52490cbb0af0 100644 --- a/Documentation/devicetree/bindings/iio/adc/holt,hi8435.yaml +++ b/Documentation/devicetree/bindings/iio/adc/holt,hi8435.yaml @@ -21,7 +21,7 @@ properties: gpios: description: - GPIO used for controlling the reset pin + GPIO used for controlling the reset pin maxItems: 1 spi-max-frequency: true diff --git a/Documentation/devicetree/bindings/interrupt-controller/ti,pruss-intc.yaml b/Documentation/devicetree/bindings/interrupt-controller/ti,pruss-intc.yaml index bbf79d125675..1c4c009dedd0 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/ti,pruss-intc.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/ti,pruss-intc.yaml @@ -94,12 +94,12 @@ properties: instances. required: - - compatible - - reg - - interrupts - - interrupt-names - - interrupt-controller - - "#interrupt-cells" + - compatible + - reg + - interrupts + - interrupt-names + - interrupt-controller + - "#interrupt-cells" additionalProperties: false diff --git a/Documentation/devicetree/bindings/mfd/ene-kb3930.yaml b/Documentation/devicetree/bindings/mfd/ene-kb3930.yaml index 074243c40891..08af356f5d27 100644 --- a/Documentation/devicetree/bindings/mfd/ene-kb3930.yaml +++ b/Documentation/devicetree/bindings/mfd/ene-kb3930.yaml @@ -17,7 +17,7 @@ properties: compatible: items: - enum: - - dell,wyse-ariel-ec # Dell Wyse Ariel board (3020) + - dell,wyse-ariel-ec # Dell Wyse Ariel board (3020) - const: ene,kb3930 reg: maxItems: 1 diff --git a/Documentation/devicetree/bindings/mmc/arasan,sdhci.yaml b/Documentation/devicetree/bindings/mmc/arasan,sdhci.yaml index 58fe9d02a781..0753289fba84 100644 --- a/Documentation/devicetree/bindings/mmc/arasan,sdhci.yaml +++ b/Documentation/devicetree/bindings/mmc/arasan,sdhci.yaml @@ -32,11 +32,11 @@ allOf: clock-output-names: oneOf: - items: - - const: clk_out_sd0 - - const: clk_in_sd0 + - const: clk_out_sd0 + - const: clk_in_sd0 - items: - - const: clk_out_sd1 - - const: clk_in_sd1 + - const: clk_out_sd1 + - const: clk_in_sd1 properties: compatible: diff --git a/Documentation/devicetree/bindings/mmc/sdhci-am654.yaml b/Documentation/devicetree/bindings/mmc/sdhci-am654.yaml index ac79f3adf20b..2cd859066462 100644 --- a/Documentation/devicetree/bindings/mmc/sdhci-am654.yaml +++ b/Documentation/devicetree/bindings/mmc/sdhci-am654.yaml @@ -3,7 +3,7 @@ %YAML 1.2 --- $id: "http://devicetree.org/schemas/mmc/sdhci-am654.yaml#" -$schema : "http://devicetree.org/meta-schemas/core.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" title: TI AM654 MMC Controller @@ -163,13 +163,12 @@ properties: ti,driver-strength-ohm: description: DLL drive strength in ohms $ref: "/schemas/types.yaml#/definitions/uint32" - oneOf: - - enum: - - 33 - - 40 - - 50 - - 66 - - 100 + enum: + - 33 + - 40 + - 50 + - 66 + - 100 ti,strobe-sel: description: strobe select delay for HS400 speed mode. diff --git a/Documentation/devicetree/bindings/pci/socionext,uniphier-pcie-ep.yaml b/Documentation/devicetree/bindings/pci/socionext,uniphier-pcie-ep.yaml index f4292d2c54e3..d6cf8a560ef0 100644 --- a/Documentation/devicetree/bindings/pci/socionext,uniphier-pcie-ep.yaml +++ b/Documentation/devicetree/bindings/pci/socionext,uniphier-pcie-ep.yaml @@ -29,16 +29,16 @@ properties: reg-names: oneOf: - items: - - const: dbi - - const: dbi2 - - const: link - - const: addr_space + - const: dbi + - const: dbi2 + - const: link + - const: addr_space - items: - - const: dbi - - const: dbi2 - - const: link - - const: addr_space - - const: atu + - const: dbi + - const: dbi2 + - const: link + - const: addr_space + - const: atu clocks: maxItems: 2 diff --git a/Documentation/devicetree/bindings/phy/socionext,uniphier-ahci-phy.yaml b/Documentation/devicetree/bindings/phy/socionext,uniphier-ahci-phy.yaml index bab2ff4d9dc9..34756347a14e 100644 --- a/Documentation/devicetree/bindings/phy/socionext,uniphier-ahci-phy.yaml +++ b/Documentation/devicetree/bindings/phy/socionext,uniphier-ahci-phy.yaml @@ -31,10 +31,10 @@ properties: clock-names: oneOf: - items: # for PXs2 - - const: link + - const: link - items: # for others - - const: link - - const: phy + - const: link + - const: phy resets: maxItems: 2 diff --git a/Documentation/devicetree/bindings/phy/ti,omap-usb2.yaml b/Documentation/devicetree/bindings/phy/ti,omap-usb2.yaml index 15207ca9548f..ab77a65c5c55 100644 --- a/Documentation/devicetree/bindings/phy/ti,omap-usb2.yaml +++ b/Documentation/devicetree/bindings/phy/ti,omap-usb2.yaml @@ -7,23 +7,23 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: OMAP USB2 PHY maintainers: - - Kishon Vijay Abraham I - - Roger Quadros + - Kishon Vijay Abraham I + - Roger Quadros properties: compatible: oneOf: - items: - - enum: - - ti,dra7x-usb2 - - ti,dra7x-usb2-phy2 - - ti,am654-usb2 - - enum: - - ti,omap-usb2 + - enum: + - ti,dra7x-usb2 + - ti,dra7x-usb2-phy2 + - ti,am654-usb2 + - enum: + - ti,omap-usb2 - items: - - const: ti,am437x-usb2 + - const: ti,am437x-usb2 - items: - - const: ti,omap-usb2 + - const: ti,omap-usb2 reg: maxItems: 1 diff --git a/Documentation/devicetree/bindings/pinctrl/actions,s500-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/actions,s500-pinctrl.yaml index 33391d30c00c..ccdd9e3820d7 100644 --- a/Documentation/devicetree/bindings/pinctrl/actions,s500-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/actions,s500-pinctrl.yaml @@ -76,22 +76,22 @@ patternProperties: items: oneOf: - enum: [lcd0_d18_mfp, rmii_crs_dv_mfp, rmii_txd0_mfp, - rmii_txd1_mfp, rmii_txen_mfp, rmii_rxen_mfp, rmii_rxd1_mfp, - rmii_rxd0_mfp, rmii_ref_clk_mfp, i2s_d0_mfp, i2s_pcm1_mfp, - i2s0_pcm0_mfp, i2s1_pcm0_mfp, i2s_d1_mfp, ks_in2_mfp, - ks_in1_mfp, ks_in0_mfp, ks_in3_mfp, ks_out0_mfp, - ks_out1_mfp, ks_out2_mfp, lvds_o_pn_mfp, dsi_dn0_mfp, - dsi_dp2_mfp, lcd0_d17_mfp, dsi_dp3_mfp, dsi_dn3_mfp, - dsi_dp0_mfp, lvds_ee_pn_mfp, spi0_i2c_pcm_mfp, - spi0_i2s_pcm_mfp, dsi_dnp1_cp_mfp, lvds_e_pn_mfp, - dsi_dn2_mfp, uart2_rtsb_mfp, uart2_ctsb_mfp, uart3_rtsb_mfp, - uart3_ctsb_mfp, sd0_d0_mfp, sd0_d1_mfp, sd0_d2_d3_mfp, - sd1_d0_d3_mfp, sd0_cmd_mfp, sd0_clk_mfp, sd1_cmd_mfp, - uart0_rx_mfp, clko_25m_mfp, csi_cn_cp_mfp, sens0_ckout_mfp, - uart0_tx_mfp, i2c0_mfp, csi_dn_dp_mfp, sen0_pclk_mfp, - pcm1_in_mfp, pcm1_clk_mfp, pcm1_sync_mfp, pcm1_out_mfp, - dnand_data_wr_mfp, dnand_acle_ce0_mfp, nand_ceb2_mfp, - nand_ceb3_mfp] + rmii_txd1_mfp, rmii_txen_mfp, rmii_rxen_mfp, rmii_rxd1_mfp, + rmii_rxd0_mfp, rmii_ref_clk_mfp, i2s_d0_mfp, i2s_pcm1_mfp, + i2s0_pcm0_mfp, i2s1_pcm0_mfp, i2s_d1_mfp, ks_in2_mfp, + ks_in1_mfp, ks_in0_mfp, ks_in3_mfp, ks_out0_mfp, + ks_out1_mfp, ks_out2_mfp, lvds_o_pn_mfp, dsi_dn0_mfp, + dsi_dp2_mfp, lcd0_d17_mfp, dsi_dp3_mfp, dsi_dn3_mfp, + dsi_dp0_mfp, lvds_ee_pn_mfp, spi0_i2c_pcm_mfp, + spi0_i2s_pcm_mfp, dsi_dnp1_cp_mfp, lvds_e_pn_mfp, + dsi_dn2_mfp, uart2_rtsb_mfp, uart2_ctsb_mfp, uart3_rtsb_mfp, + uart3_ctsb_mfp, sd0_d0_mfp, sd0_d1_mfp, sd0_d2_d3_mfp, + sd1_d0_d3_mfp, sd0_cmd_mfp, sd0_clk_mfp, sd1_cmd_mfp, + uart0_rx_mfp, clko_25m_mfp, csi_cn_cp_mfp, sens0_ckout_mfp, + uart0_tx_mfp, i2c0_mfp, csi_dn_dp_mfp, sen0_pclk_mfp, + pcm1_in_mfp, pcm1_clk_mfp, pcm1_sync_mfp, pcm1_out_mfp, + dnand_data_wr_mfp, dnand_acle_ce0_mfp, nand_ceb2_mfp, + nand_ceb3_mfp] minItems: 1 maxItems: 32 @@ -100,10 +100,10 @@ patternProperties: Specify the alternative function to be configured for the given gpio pin groups. enum: [nor, eth_rmii, eth_smii, spi0, spi1, spi2, spi3, sens0, - sens1, uart0, uart1, uart2, uart3, uart4, uart5, uart6, i2s0, - i2s1, pcm1, pcm0, ks, jtag, pwm0, pwm1, pwm2, pwm3, pwm4, pwm5, - p0, sd0, sd1, sd2, i2c0, i2c1, i2c3, dsi, lvds, usb30, clko_25m, - mipi_csi, nand, spdif, ts, lcd0] + sens1, uart0, uart1, uart2, uart3, uart4, uart5, uart6, i2s0, + i2s1, pcm1, pcm0, ks, jtag, pwm0, pwm1, pwm2, pwm3, pwm4, pwm5, + p0, sd0, sd1, sd2, i2c0, i2c1, i2c3, dsi, lvds, usb30, clko_25m, + mipi_csi, nand, spdif, ts, lcd0] required: - groups @@ -126,14 +126,14 @@ patternProperties: items: oneOf: - enum: [sirq_drv, rmii_txd01_txen_drv, rmii_rxer_drv, - rmii_crs_drv, rmii_rxd10_drv, rmii_ref_clk_drv, - smi_mdc_mdio_drv, i2s_d0_drv, i2s_bclk0_drv, i2s3_drv, - i2s13_drv, pcm1_drv, ks_in_drv, ks_out_drv, lvds_all_drv, - lcd_dsi_drv, dsi_drv, sd0_d0_d3_drv, sd1_d0_d3_drv, - sd0_cmd_drv, sd0_clk_drv, sd1_cmd_drv, sd1_clk_drv, - spi0_all_drv, uart0_rx_drv, uart0_tx_drv, uart2_all_drv, - i2c0_all_drv, i2c12_all_drv, sens0_pclk_drv, - sens0_ckout_drv, uart3_all_drv] + rmii_crs_drv, rmii_rxd10_drv, rmii_ref_clk_drv, + smi_mdc_mdio_drv, i2s_d0_drv, i2s_bclk0_drv, i2s3_drv, + i2s13_drv, pcm1_drv, ks_in_drv, ks_out_drv, lvds_all_drv, + lcd_dsi_drv, dsi_drv, sd0_d0_d3_drv, sd1_d0_d3_drv, + sd0_cmd_drv, sd0_clk_drv, sd1_cmd_drv, sd1_clk_drv, + spi0_all_drv, uart0_rx_drv, uart0_tx_drv, uart2_all_drv, + i2c0_all_drv, i2c12_all_drv, sens0_pclk_drv, + sens0_ckout_drv, uart3_all_drv] minItems: 1 maxItems: 32 @@ -144,29 +144,29 @@ patternProperties: items: oneOf: - enum: [dnand_dqs, dnand_dqsn, eth_txd0, eth_txd1, eth_txen, - eth_rxer, eth_crs_dv, eth_rxd1, eth_rxd0, eth_ref_clk, - eth_mdc, eth_mdio, sirq0, sirq1, sirq2, i2s_d0, i2s_bclk0, - i2s_lrclk0, i2s_mclk0, i2s_d1, i2s_bclk1, i2s_lrclk1, - i2s_mclk1, ks_in0, ks_in1, ks_in2, ks_in3, ks_out0, ks_out1, - ks_out2, lvds_oep, lvds_oen, lvds_odp, lvds_odn, lvds_ocp, - lvds_ocn, lvds_obp, lvds_obn, lvds_oap, lvds_oan, lvds_eep, - lvds_een, lvds_edp, lvds_edn, lvds_ecp, lvds_ecn, lvds_ebp, - lvds_ebn, lvds_eap, lvds_ean, lcd0_d18, lcd0_d17, dsi_dp3, - dsi_dn3, dsi_dp1, dsi_dn1, dsi_cp, dsi_cn, dsi_dp0, dsi_dn0, - dsi_dp2, dsi_dn2, sd0_d0, sd0_d1, sd0_d2, sd0_d3, sd1_d0, - sd1_d1, sd1_d2, sd1_d3, sd0_cmd, sd0_clk, sd1_cmd, sd1_clk, - spi0_sclk, spi0_ss, spi0_miso, spi0_mosi, uart0_rx, - uart0_tx, i2c0_sclk, i2c0_sdata, sensor0_pclk, - sensor0_ckout, dnand_ale, dnand_cle, dnand_ceb0, dnand_ceb1, - dnand_ceb2, dnand_ceb3, uart2_rx, uart2_tx, uart2_rtsb, - uart2_ctsb, uart3_rx, uart3_tx, uart3_rtsb, uart3_ctsb, - pcm1_in, pcm1_clk, pcm1_sync, pcm1_out, i2c1_sclk, - i2c1_sdata, i2c2_sclk, i2c2_sdata, csi_dn0, csi_dp0, - csi_dn1, csi_dp1, csi_dn2, csi_dp2, csi_dn3, csi_dp3, - csi_cn, csi_cp, dnand_d0, dnand_d1, dnand_d2, dnand_d3, - dnand_d4, dnand_d5, dnand_d6, dnand_d7, dnand_rb, dnand_rdb, - dnand_rdbn, dnand_wrb, porb, clko_25m, bsel, pkg0, pkg1, - pkg2, pkg3] + eth_rxer, eth_crs_dv, eth_rxd1, eth_rxd0, eth_ref_clk, + eth_mdc, eth_mdio, sirq0, sirq1, sirq2, i2s_d0, i2s_bclk0, + i2s_lrclk0, i2s_mclk0, i2s_d1, i2s_bclk1, i2s_lrclk1, + i2s_mclk1, ks_in0, ks_in1, ks_in2, ks_in3, ks_out0, ks_out1, + ks_out2, lvds_oep, lvds_oen, lvds_odp, lvds_odn, lvds_ocp, + lvds_ocn, lvds_obp, lvds_obn, lvds_oap, lvds_oan, lvds_eep, + lvds_een, lvds_edp, lvds_edn, lvds_ecp, lvds_ecn, lvds_ebp, + lvds_ebn, lvds_eap, lvds_ean, lcd0_d18, lcd0_d17, dsi_dp3, + dsi_dn3, dsi_dp1, dsi_dn1, dsi_cp, dsi_cn, dsi_dp0, dsi_dn0, + dsi_dp2, dsi_dn2, sd0_d0, sd0_d1, sd0_d2, sd0_d3, sd1_d0, + sd1_d1, sd1_d2, sd1_d3, sd0_cmd, sd0_clk, sd1_cmd, sd1_clk, + spi0_sclk, spi0_ss, spi0_miso, spi0_mosi, uart0_rx, + uart0_tx, i2c0_sclk, i2c0_sdata, sensor0_pclk, + sensor0_ckout, dnand_ale, dnand_cle, dnand_ceb0, dnand_ceb1, + dnand_ceb2, dnand_ceb3, uart2_rx, uart2_tx, uart2_rtsb, + uart2_ctsb, uart3_rx, uart3_tx, uart3_rtsb, uart3_ctsb, + pcm1_in, pcm1_clk, pcm1_sync, pcm1_out, i2c1_sclk, + i2c1_sdata, i2c2_sclk, i2c2_sdata, csi_dn0, csi_dp0, + csi_dn1, csi_dp1, csi_dn2, csi_dp2, csi_dn3, csi_dp3, + csi_cn, csi_cp, dnand_d0, dnand_d1, dnand_d2, dnand_d3, + dnand_d4, dnand_d5, dnand_d6, dnand_d7, dnand_rb, dnand_rdb, + dnand_rdbn, dnand_wrb, porb, clko_25m, bsel, pkg0, pkg1, + pkg2, pkg3] minItems: 1 maxItems: 64 diff --git a/Documentation/devicetree/bindings/pinctrl/pinctrl-mt8192.yaml b/Documentation/devicetree/bindings/pinctrl/pinctrl-mt8192.yaml index 5556def6b99b..c4c071211611 100644 --- a/Documentation/devicetree/bindings/pinctrl/pinctrl-mt8192.yaml +++ b/Documentation/devicetree/bindings/pinctrl/pinctrl-mt8192.yaml @@ -106,7 +106,7 @@ patternProperties: required: - pinmux - additionalProperties: false + additionalProperties: false required: - compatible diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,msm8226-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,msm8226-pinctrl.yaml index 1f0f5757f9e1..040d2ada3669 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,msm8226-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/qcom,msm8226-pinctrl.yaml @@ -71,9 +71,9 @@ patternProperties: Specify the alternative function to be configured for the specified pins. Functions are only valid for gpio pins. enum: [ gpio, cci_i2c0, blsp_uim1, blsp_uim2, blsp_uim3, blsp_uim5, - blsp_i2c1, blsp_i2c2, blsp_i2c3, blsp_i2c5, blsp_spi1, - blsp_spi2, blsp_spi3, blsp_spi5, blsp_uart1, blsp_uart2, - blsp_uart3, blsp_uart5, cam_mclk0, cam_mclk1, wlan ] + blsp_i2c1, blsp_i2c2, blsp_i2c3, blsp_i2c5, blsp_spi1, + blsp_spi2, blsp_spi3, blsp_spi5, blsp_uart1, blsp_uart2, + blsp_uart3, blsp_uart5, cam_mclk0, cam_mclk1, wlan ] drive-strength: enum: [2, 4, 6, 8, 10, 12, 14, 16] diff --git a/Documentation/devicetree/bindings/pinctrl/toshiba,visconti-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/toshiba,visconti-pinctrl.yaml index d0d1a01140ea..9f1dab0c2430 100644 --- a/Documentation/devicetree/bindings/pinctrl/toshiba,visconti-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/toshiba,visconti-pinctrl.yaml @@ -40,24 +40,24 @@ patternProperties: Function to mux. $ref: "/schemas/types.yaml#/definitions/string" enum: [i2c0, i2c1, i2c2, i2c3, i2c4, i2c5, i2c6, i2c7, i2c8, - spi0, spi1, spi2, spi3, spi4, spi5, spi6, - uart0, uart1, uart2, uart3, pwm, pcmif_out, pcmif_in] + spi0, spi1, spi2, spi3, spi4, spi5, spi6, + uart0, uart1, uart2, uart3, pwm, pcmif_out, pcmif_in] groups: description: Name of the pin group to use for the functions. $ref: "/schemas/types.yaml#/definitions/string" enum: [i2c0_grp, i2c1_grp, i2c2_grp, i2c3_grp, i2c4_grp, - i2c5_grp, i2c6_grp, i2c7_grp, i2c8_grp, - spi0_grp, spi0_cs0_grp, spi0_cs1_grp, spi0_cs2_grp, - spi1_grp, spi2_grp, spi3_grp, spi4_grp, spi5_grp, spi6_grp, - uart0_grp, uart1_grp, uart2_grp, uart3_grp, - pwm0_gpio4_grp, pwm0_gpio8_grp, pwm0_gpio12_grp, - pwm0_gpio16_grp, pwm1_gpio5_grp, pwm1_gpio9_grp, - pwm1_gpio13_grp, pwm1_gpio17_grp, pwm2_gpio6_grp, - pwm2_gpio10_grp, pwm2_gpio14_grp, pwm2_gpio18_grp, - pwm3_gpio7_grp, pwm3_gpio11_grp, pwm3_gpio15_grp, - pwm3_gpio19_grp, pcmif_out_grp, pcmif_in_grp] + i2c5_grp, i2c6_grp, i2c7_grp, i2c8_grp, + spi0_grp, spi0_cs0_grp, spi0_cs1_grp, spi0_cs2_grp, + spi1_grp, spi2_grp, spi3_grp, spi4_grp, spi5_grp, spi6_grp, + uart0_grp, uart1_grp, uart2_grp, uart3_grp, + pwm0_gpio4_grp, pwm0_gpio8_grp, pwm0_gpio12_grp, + pwm0_gpio16_grp, pwm1_gpio5_grp, pwm1_gpio9_grp, + pwm1_gpio13_grp, pwm1_gpio17_grp, pwm2_gpio6_grp, + pwm2_gpio10_grp, pwm2_gpio14_grp, pwm2_gpio18_grp, + pwm3_gpio7_grp, pwm3_gpio11_grp, pwm3_gpio15_grp, + pwm3_gpio19_grp, pcmif_out_grp, pcmif_in_grp] drive-strength: enum: [2, 4, 6, 8, 16, 24, 32] diff --git a/Documentation/devicetree/bindings/power/reset/reboot-mode.yaml b/Documentation/devicetree/bindings/power/reset/reboot-mode.yaml index a6c91026d4cc..a2dca38577f7 100644 --- a/Documentation/devicetree/bindings/power/reset/reboot-mode.yaml +++ b/Documentation/devicetree/bindings/power/reset/reboot-mode.yaml @@ -28,9 +28,9 @@ description: | properties: mode-normal: - $ref: /schemas/types.yaml#/definitions/uint32 - description: | - Default value to set on a reboot if no command was provided. + $ref: /schemas/types.yaml#/definitions/uint32 + description: + Default value to set on a reboot if no command was provided. patternProperties: "^mode-.*$": diff --git a/Documentation/devicetree/bindings/power/supply/ingenic,battery.yaml b/Documentation/devicetree/bindings/power/supply/ingenic,battery.yaml index 867e3e6b7e80..76c227a7cd5c 100644 --- a/Documentation/devicetree/bindings/power/supply/ingenic,battery.yaml +++ b/Documentation/devicetree/bindings/power/supply/ingenic,battery.yaml @@ -15,10 +15,10 @@ properties: oneOf: - const: ingenic,jz4740-battery - items: - - enum: - - ingenic,jz4725b-battery - - ingenic,jz4770-battery - - const: ingenic,jz4740-battery + - enum: + - ingenic,jz4725b-battery + - ingenic,jz4770-battery + - const: ingenic,jz4740-battery io-channels: maxItems: 1 diff --git a/Documentation/devicetree/bindings/power/supply/summit,smb347-charger.yaml b/Documentation/devicetree/bindings/power/supply/summit,smb347-charger.yaml index 193a23af2007..983fc215c1e5 100644 --- a/Documentation/devicetree/bindings/power/supply/summit,smb347-charger.yaml +++ b/Documentation/devicetree/bindings/power/supply/summit,smb347-charger.yaml @@ -84,12 +84,12 @@ allOf: then: properties: summit,mains-current-limit-microamp: - enum: [ 300000, 500000, 700000, 1000000, - 1500000, 1800000, 2000000] + enum: [ 300000, 500000, 700000, 1000000, + 1500000, 1800000, 2000000] summit,usb-current-limit-microamp: - enum: [ 300000, 500000, 700000, 1000000, - 1500000, 1800000, 2000000] + enum: [ 300000, 500000, 700000, 1000000, + 1500000, 1800000, 2000000] summit,charge-current-compensation-microamp: enum: [200000, 450000, 600000, 900000] @@ -97,12 +97,12 @@ allOf: else: properties: summit,mains-current-limit-microamp: - enum: [ 300000, 500000, 700000, 900000, 1200000, - 1500000, 1800000, 2000000, 2200000, 2500000] + enum: [ 300000, 500000, 700000, 900000, 1200000, + 1500000, 1800000, 2000000, 2200000, 2500000] summit,usb-current-limit-microamp: - enum: [ 300000, 500000, 700000, 900000, 1200000, - 1500000, 1800000, 2000000, 2200000, 2500000] + enum: [ 300000, 500000, 700000, 900000, 1200000, + 1500000, 1800000, 2000000, 2200000, 2500000] summit,charge-current-compensation-microamp: enum: [250000, 700000, 900000, 1200000] diff --git a/Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml b/Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml index 3f4a1939554d..efc0198eeb74 100644 --- a/Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml +++ b/Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml @@ -25,8 +25,8 @@ select: properties: compatible: items: - - enum: - - sifive,fu540-c000-ccache + - enum: + - sifive,fu540-c000-ccache required: - compatible diff --git a/Documentation/devicetree/bindings/rng/imx-rng.yaml b/Documentation/devicetree/bindings/rng/imx-rng.yaml index 4ad1e456a801..07f6ff89bcc1 100644 --- a/Documentation/devicetree/bindings/rng/imx-rng.yaml +++ b/Documentation/devicetree/bindings/rng/imx-rng.yaml @@ -19,9 +19,9 @@ properties: - const: fsl,imx21-rnga - items: - enum: - - fsl,imx6sl-rngb - - fsl,imx6sll-rngb - - fsl,imx6ull-rngb + - fsl,imx6sl-rngb + - fsl,imx6sll-rngb + - fsl,imx6ull-rngb - const: fsl,imx25-rngb - const: fsl,imx35-rngc diff --git a/Documentation/devicetree/bindings/serial/fsl-imx-uart.yaml b/Documentation/devicetree/bindings/serial/fsl-imx-uart.yaml index 9ff85bc6859c..9702c07a6b6c 100644 --- a/Documentation/devicetree/bindings/serial/fsl-imx-uart.yaml +++ b/Documentation/devicetree/bindings/serial/fsl-imx-uart.yaml @@ -20,30 +20,30 @@ properties: - const: fsl,imx21-uart - items: - enum: - - fsl,imx25-uart - - fsl,imx27-uart - - fsl,imx31-uart - - fsl,imx35-uart - - fsl,imx50-uart - - fsl,imx51-uart - - fsl,imx53-uart - - fsl,imx6q-uart + - fsl,imx25-uart + - fsl,imx27-uart + - fsl,imx31-uart + - fsl,imx35-uart + - fsl,imx50-uart + - fsl,imx51-uart + - fsl,imx53-uart + - fsl,imx6q-uart - const: fsl,imx21-uart - items: - enum: - - fsl,imx6sl-uart - - fsl,imx6sll-uart - - fsl,imx6sx-uart + - fsl,imx6sl-uart + - fsl,imx6sll-uart + - fsl,imx6sx-uart - const: fsl,imx6q-uart - const: fsl,imx21-uart - items: - enum: - - fsl,imx6ul-uart - - fsl,imx7d-uart - - fsl,imx8mm-uart - - fsl,imx8mn-uart - - fsl,imx8mp-uart - - fsl,imx8mq-uart + - fsl,imx6ul-uart + - fsl,imx7d-uart + - fsl,imx8mm-uart + - fsl,imx8mn-uart + - fsl,imx8mp-uart + - fsl,imx8mq-uart - const: fsl,imx6q-uart reg: diff --git a/Documentation/devicetree/bindings/sound/mchp,spdifrx.yaml b/Documentation/devicetree/bindings/sound/mchp,spdifrx.yaml index 7d8bd4e14434..4a2129005c0f 100644 --- a/Documentation/devicetree/bindings/sound/mchp,spdifrx.yaml +++ b/Documentation/devicetree/bindings/sound/mchp,spdifrx.yaml @@ -10,8 +10,8 @@ maintainers: - Codrin Ciubotariu description: - The Microchip Sony/Philips Digital Interface Receiver is a - serial port compliant with the IEC-60958 standard. + The Microchip Sony/Philips Digital Interface Receiver is a serial port + compliant with the IEC-60958 standard. properties: "#sound-dai-cells": diff --git a/Documentation/devicetree/bindings/sound/mchp,spdiftx.yaml b/Documentation/devicetree/bindings/sound/mchp,spdiftx.yaml index a03b0b871fc9..bdfb63387c53 100644 --- a/Documentation/devicetree/bindings/sound/mchp,spdiftx.yaml +++ b/Documentation/devicetree/bindings/sound/mchp,spdiftx.yaml @@ -10,8 +10,8 @@ maintainers: - Codrin Ciubotariu description: - The Microchip Sony/Philips Digital Interface Transmitter is a - serial port compliant with the IEC-60958 standard. + The Microchip Sony/Philips Digital Interface Transmitter is a serial port + compliant with the IEC-60958 standard. properties: "#sound-dai-cells": diff --git a/Documentation/devicetree/bindings/sound/qcom,lpass-cpu.yaml b/Documentation/devicetree/bindings/sound/qcom,lpass-cpu.yaml index f6f9fb49f385..1e23c0e20bc1 100644 --- a/Documentation/devicetree/bindings/sound/qcom,lpass-cpu.yaml +++ b/Documentation/devicetree/bindings/sound/qcom,lpass-cpu.yaml @@ -26,8 +26,10 @@ properties: reg: maxItems: 2 description: LPAIF core registers + reg-names: - maxItems: 2 + maxItems: 2 + clocks: minItems: 3 maxItems: 6 @@ -39,8 +41,10 @@ properties: interrupts: maxItems: 2 description: LPAIF DMA buffer interrupt + interrupt-names: maxItems: 2 + qcom,adsp: $ref: /schemas/types.yaml#/definitions/phandle description: Phandle for the audio DSP node @@ -141,31 +145,31 @@ allOf: properties: clock-names: oneOf: - - items: #for I2S - - const: pcnoc-sway-clk - - const: audio-core - - const: mclk0 - - const: pcnoc-mport-clk - - const: mi2s-bit-clk0 - - const: mi2s-bit-clk1 - - items: #for HDMI - - const: pcnoc-sway-clk - - const: audio-core - - const: pcnoc-mport-clk + - items: #for I2S + - const: pcnoc-sway-clk + - const: audio-core + - const: mclk0 + - const: pcnoc-mport-clk + - const: mi2s-bit-clk0 + - const: mi2s-bit-clk1 + - items: #for HDMI + - const: pcnoc-sway-clk + - const: audio-core + - const: pcnoc-mport-clk reg-names: anyOf: - items: #for I2S - - const: lpass-lpaif + - const: lpass-lpaif - items: #for I2S and HDMI - - const: lpass-hdmiif - - const: lpass-lpaif + - const: lpass-hdmiif + - const: lpass-lpaif interrupt-names: anyOf: - items: #for I2S - - const: lpass-irq-lpaif + - const: lpass-irq-lpaif - items: #for I2S and HDMI - - const: lpass-irq-lpaif - - const: lpass-irq-hdmi + - const: lpass-irq-lpaif + - const: lpass-irq-hdmi required: - iommus - power-domains diff --git a/Documentation/devicetree/bindings/timer/arm,sp804.yaml b/Documentation/devicetree/bindings/timer/arm,sp804.yaml index e35d3053250a..960e2bd66a97 100644 --- a/Documentation/devicetree/bindings/timer/arm,sp804.yaml +++ b/Documentation/devicetree/bindings/timer/arm,sp804.yaml @@ -33,8 +33,8 @@ properties: compatible: items: - enum: - - arm,sp804 - - hisilicon,sp804 + - arm,sp804 + - hisilicon,sp804 - const: arm,primecell interrupts: @@ -58,11 +58,11 @@ properties: clock is used for all clock inputs. oneOf: - items: - - description: clock for timer 1 - - description: clock for timer 2 - - description: bus clock + - description: clock for timer 1 + - description: clock for timer 2 + - description: bus clock - items: - - description: unified clock for both timers and the bus + - description: unified clock for both timers and the bus clock-names: true # The original binding did not specify any clock names, and there is no diff --git a/Documentation/devicetree/bindings/usb/cdns,usb3.yaml b/Documentation/devicetree/bindings/usb/cdns,usb3.yaml index ac20b98e9910..d6af2794d444 100644 --- a/Documentation/devicetree/bindings/usb/cdns,usb3.yaml +++ b/Documentation/devicetree/bindings/usb/cdns,usb3.yaml @@ -44,8 +44,8 @@ properties: enum: [super-speed, high-speed, full-speed] phys: - minItems: 1 - maxItems: 2 + minItems: 1 + maxItems: 2 phy-names: minItems: 1 diff --git a/Documentation/devicetree/bindings/usb/ti,hd3ss3220.yaml b/Documentation/devicetree/bindings/usb/ti,hd3ss3220.yaml index 5fe9e6211ba2..52ceb07294a3 100644 --- a/Documentation/devicetree/bindings/usb/ti,hd3ss3220.yaml +++ b/Documentation/devicetree/bindings/usb/ti,hd3ss3220.yaml @@ -17,7 +17,7 @@ description: |- properties: compatible: - const: ti,hd3ss3220 + const: ti,hd3ss3220 reg: maxItems: 1 diff --git a/Documentation/devicetree/bindings/w1/fsl-imx-owire.yaml b/Documentation/devicetree/bindings/w1/fsl-imx-owire.yaml index 1aaf3e768c81..55adea827c34 100644 --- a/Documentation/devicetree/bindings/w1/fsl-imx-owire.yaml +++ b/Documentation/devicetree/bindings/w1/fsl-imx-owire.yaml @@ -15,10 +15,10 @@ properties: - const: fsl,imx21-owire - items: - enum: - - fsl,imx27-owire - - fsl,imx50-owire - - fsl,imx51-owire - - fsl,imx53-owire + - fsl,imx27-owire + - fsl,imx50-owire + - fsl,imx51-owire + - fsl,imx53-owire - const: fsl,imx21-owire reg: -- cgit v1.2.3 From 62298364bd489b06d16370fd258c7be6a906729c Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Mon, 5 Oct 2020 13:38:29 -0500 Subject: dt-bindings: Explicitly allow additional properties in board/SoC schemas In order to add meta-schema checks for additional/unevaluatedProperties being present, all schema need to make this explicit. As the top-level board/SoC schemas always have additional properties, add 'additionalProperties: true'. Acked-by: Krzysztof Kozlowski Acked-by: Viresh Kumar Acked-by: Geert Uytterhoeven Signed-off-by: Rob Herring Link: https://lore.kernel.org/r/20201005183830.486085-4-robh@kernel.org Signed-off-by: Rob Herring --- Documentation/devicetree/bindings/arm/actions.yaml | 2 ++ Documentation/devicetree/bindings/arm/altera.yaml | 3 +++ Documentation/devicetree/bindings/arm/amazon,al.yaml | 2 ++ Documentation/devicetree/bindings/arm/amlogic.yaml | 3 +++ Documentation/devicetree/bindings/arm/arm,integrator.yaml | 2 ++ Documentation/devicetree/bindings/arm/arm,realview.yaml | 2 ++ Documentation/devicetree/bindings/arm/arm,versatile.yaml | 2 ++ Documentation/devicetree/bindings/arm/arm,vexpress-juno.yaml | 2 ++ Documentation/devicetree/bindings/arm/atmel-at91.yaml | 2 ++ Documentation/devicetree/bindings/arm/axxia.yaml | 2 ++ Documentation/devicetree/bindings/arm/bcm/bcm2835.yaml | 2 ++ Documentation/devicetree/bindings/arm/bcm/brcm,bcm11351.yaml | 2 ++ Documentation/devicetree/bindings/arm/bcm/brcm,bcm21664.yaml | 2 ++ Documentation/devicetree/bindings/arm/bcm/brcm,bcm23550.yaml | 2 ++ Documentation/devicetree/bindings/arm/bcm/brcm,bcm4708.yaml | 3 +++ Documentation/devicetree/bindings/arm/bcm/brcm,cygnus.yaml | 2 ++ Documentation/devicetree/bindings/arm/bcm/brcm,hr2.yaml | 2 ++ Documentation/devicetree/bindings/arm/bcm/brcm,ns2.yaml | 2 ++ Documentation/devicetree/bindings/arm/bcm/brcm,nsp.yaml | 2 ++ Documentation/devicetree/bindings/arm/bcm/brcm,stingray.yaml | 2 ++ Documentation/devicetree/bindings/arm/bcm/brcm,vulcan-soc.yaml | 2 ++ Documentation/devicetree/bindings/arm/bitmain.yaml | 3 +++ Documentation/devicetree/bindings/arm/calxeda.yaml | 2 ++ Documentation/devicetree/bindings/arm/digicolor.yaml | 2 ++ Documentation/devicetree/bindings/arm/fsl.yaml | 2 ++ Documentation/devicetree/bindings/arm/hisilicon/hisilicon.yaml | 3 +++ Documentation/devicetree/bindings/arm/intel,keembay.yaml | 3 +++ Documentation/devicetree/bindings/arm/intel-ixp4xx.yaml | 2 ++ Documentation/devicetree/bindings/arm/keystone/ti,k3-sci-common.yaml | 2 ++ Documentation/devicetree/bindings/arm/marvell/armada-7k-8k.yaml | 2 ++ Documentation/devicetree/bindings/arm/mediatek.yaml | 3 +++ Documentation/devicetree/bindings/arm/microchip,sparx5.yaml | 2 ++ Documentation/devicetree/bindings/arm/moxart.yaml | 1 + Documentation/devicetree/bindings/arm/mrvl/mrvl.yaml | 3 +++ Documentation/devicetree/bindings/arm/mstar/mstar.yaml | 2 ++ Documentation/devicetree/bindings/arm/nxp/lpc32xx.yaml | 2 ++ Documentation/devicetree/bindings/arm/qcom.yaml | 2 ++ Documentation/devicetree/bindings/arm/rda.yaml | 2 ++ Documentation/devicetree/bindings/arm/realtek.yaml | 3 +++ Documentation/devicetree/bindings/arm/renesas.yaml | 2 ++ Documentation/devicetree/bindings/arm/rockchip.yaml | 3 +++ Documentation/devicetree/bindings/arm/samsung/samsung-boards.yaml | 2 ++ Documentation/devicetree/bindings/arm/sirf.yaml | 3 +++ Documentation/devicetree/bindings/arm/socionext/milbeaut.yaml | 3 +++ Documentation/devicetree/bindings/arm/socionext/uniphier.yaml | 2 ++ Documentation/devicetree/bindings/arm/spear.yaml | 3 +++ Documentation/devicetree/bindings/arm/sprd/sprd.yaml | 2 ++ Documentation/devicetree/bindings/arm/sti.yaml | 3 +++ Documentation/devicetree/bindings/arm/stm32/stm32.yaml | 3 +++ Documentation/devicetree/bindings/arm/sunxi.yaml | 2 ++ Documentation/devicetree/bindings/arm/tegra.yaml | 2 ++ Documentation/devicetree/bindings/arm/ti/k3.yaml | 3 +++ Documentation/devicetree/bindings/arm/ti/nspire.yaml | 3 +++ Documentation/devicetree/bindings/arm/ti/ti,davinci.yaml | 3 +++ Documentation/devicetree/bindings/arm/toshiba.yaml | 3 +++ Documentation/devicetree/bindings/arm/ux500.yaml | 2 ++ Documentation/devicetree/bindings/arm/vt8500.yaml | 3 +++ Documentation/devicetree/bindings/arm/xilinx.yaml | 2 ++ Documentation/devicetree/bindings/arm/zte.yaml | 2 ++ Documentation/devicetree/bindings/mips/ingenic/devices.yaml | 3 +++ Documentation/devicetree/bindings/mips/loongson/devices.yaml | 3 +++ Documentation/devicetree/bindings/riscv/sifive.yaml | 3 +++ 62 files changed, 146 insertions(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/arm/actions.yaml b/Documentation/devicetree/bindings/arm/actions.yaml index fe22c66e9c15..02dc72c97645 100644 --- a/Documentation/devicetree/bindings/arm/actions.yaml +++ b/Documentation/devicetree/bindings/arm/actions.yaml @@ -49,3 +49,5 @@ properties: - enum: - ucrobotics,bubblegum-96 # uCRobotics Bubblegum-96 - const: actions,s900 + +additionalProperties: true diff --git a/Documentation/devicetree/bindings/arm/altera.yaml b/Documentation/devicetree/bindings/arm/altera.yaml index 0bc5020b7539..c15c92fdf2ed 100644 --- a/Documentation/devicetree/bindings/arm/altera.yaml +++ b/Documentation/devicetree/bindings/arm/altera.yaml @@ -19,4 +19,7 @@ properties: - altr,socfpga-arria5 - altr,socfpga-arria10 - const: altr,socfpga + +additionalProperties: true + ... diff --git a/Documentation/devicetree/bindings/arm/amazon,al.yaml b/Documentation/devicetree/bindings/arm/amazon,al.yaml index a3a4d710bd02..0f03135d91b6 100644 --- a/Documentation/devicetree/bindings/arm/amazon,al.yaml +++ b/Documentation/devicetree/bindings/arm/amazon,al.yaml @@ -30,4 +30,6 @@ properties: - amazon,al-alpine-v3-evp - const: amazon,al-alpine-v3 +additionalProperties: true + ... diff --git a/Documentation/devicetree/bindings/arm/amlogic.yaml b/Documentation/devicetree/bindings/arm/amlogic.yaml index 0ee7c5b7b3f6..3341788d1096 100644 --- a/Documentation/devicetree/bindings/arm/amlogic.yaml +++ b/Documentation/devicetree/bindings/arm/amlogic.yaml @@ -173,4 +173,7 @@ properties: - enum: - amlogic,ad401 - const: amlogic,a1 + +additionalProperties: true + ... diff --git a/Documentation/devicetree/bindings/arm/arm,integrator.yaml b/Documentation/devicetree/bindings/arm/arm,integrator.yaml index f0daf990e077..528eee64290a 100644 --- a/Documentation/devicetree/bindings/arm/arm,integrator.yaml +++ b/Documentation/devicetree/bindings/arm/arm,integrator.yaml @@ -83,4 +83,6 @@ required: - compatible - core-module@10000000 +additionalProperties: true + ... diff --git a/Documentation/devicetree/bindings/arm/arm,realview.yaml b/Documentation/devicetree/bindings/arm/arm,realview.yaml index 1d0b4e2bc7d2..4f9b21f49e84 100644 --- a/Documentation/devicetree/bindings/arm/arm,realview.yaml +++ b/Documentation/devicetree/bindings/arm/arm,realview.yaml @@ -120,4 +120,6 @@ required: - compatible - soc +additionalProperties: true + ... diff --git a/Documentation/devicetree/bindings/arm/arm,versatile.yaml b/Documentation/devicetree/bindings/arm/arm,versatile.yaml index 06efd2a075c9..34b437c72751 100644 --- a/Documentation/devicetree/bindings/arm/arm,versatile.yaml +++ b/Documentation/devicetree/bindings/arm/arm,versatile.yaml @@ -68,4 +68,6 @@ required: - compatible - core-module@10000000 +additionalProperties: true + ... diff --git a/Documentation/devicetree/bindings/arm/arm,vexpress-juno.yaml b/Documentation/devicetree/bindings/arm/arm,vexpress-juno.yaml index 26829a803fda..55ef656d1192 100644 --- a/Documentation/devicetree/bindings/arm/arm,vexpress-juno.yaml +++ b/Documentation/devicetree/bindings/arm/arm,vexpress-juno.yaml @@ -216,4 +216,6 @@ allOf: required: - arm,hbi +additionalProperties: true + ... diff --git a/Documentation/devicetree/bindings/arm/atmel-at91.yaml b/Documentation/devicetree/bindings/arm/atmel-at91.yaml index 614c91956798..6fc5a22ad962 100644 --- a/Documentation/devicetree/bindings/arm/atmel-at91.yaml +++ b/Documentation/devicetree/bindings/arm/atmel-at91.yaml @@ -184,4 +184,6 @@ properties: - const: atmel,samv71 - const: atmel,samv7 +additionalProperties: true + ... diff --git a/Documentation/devicetree/bindings/arm/axxia.yaml b/Documentation/devicetree/bindings/arm/axxia.yaml index 3ea5f2fdcd96..e0d2bb71cf50 100644 --- a/Documentation/devicetree/bindings/arm/axxia.yaml +++ b/Documentation/devicetree/bindings/arm/axxia.yaml @@ -18,4 +18,6 @@ properties: - const: lsi,axm5516-amarillo - const: lsi,axm5516 +additionalProperties: true + ... diff --git a/Documentation/devicetree/bindings/arm/bcm/bcm2835.yaml b/Documentation/devicetree/bindings/arm/bcm/bcm2835.yaml index dd52e29b0642..812ae8cc5959 100644 --- a/Documentation/devicetree/bindings/arm/bcm/bcm2835.yaml +++ b/Documentation/devicetree/bindings/arm/bcm/bcm2835.yaml @@ -51,4 +51,6 @@ properties: - raspberrypi,3-compute-module-lite - const: brcm,bcm2837 +additionalProperties: true + ... diff --git a/Documentation/devicetree/bindings/arm/bcm/brcm,bcm11351.yaml b/Documentation/devicetree/bindings/arm/bcm/brcm,bcm11351.yaml index 497600a2ffb9..c60324357435 100644 --- a/Documentation/devicetree/bindings/arm/bcm/brcm,bcm11351.yaml +++ b/Documentation/devicetree/bindings/arm/bcm/brcm,bcm11351.yaml @@ -18,4 +18,6 @@ properties: - brcm,bcm28155-ap - const: brcm,bcm11351 +additionalProperties: true + ... diff --git a/Documentation/devicetree/bindings/arm/bcm/brcm,bcm21664.yaml b/Documentation/devicetree/bindings/arm/bcm/brcm,bcm21664.yaml index e0ee931723dc..b3020757380f 100644 --- a/Documentation/devicetree/bindings/arm/bcm/brcm,bcm21664.yaml +++ b/Documentation/devicetree/bindings/arm/bcm/brcm,bcm21664.yaml @@ -18,4 +18,6 @@ properties: - brcm,bcm21664-garnet - const: brcm,bcm21664 +additionalProperties: true + ... diff --git a/Documentation/devicetree/bindings/arm/bcm/brcm,bcm23550.yaml b/Documentation/devicetree/bindings/arm/bcm/brcm,bcm23550.yaml index 40d12ea56e54..37f3a6fcde76 100644 --- a/Documentation/devicetree/bindings/arm/bcm/brcm,bcm23550.yaml +++ b/Documentation/devicetree/bindings/arm/bcm/brcm,bcm23550.yaml @@ -18,4 +18,6 @@ properties: - brcm,bcm23550-sparrow - const: brcm,bcm23550 +additionalProperties: true + ... diff --git a/Documentation/devicetree/bindings/arm/bcm/brcm,bcm4708.yaml b/Documentation/devicetree/bindings/arm/bcm/brcm,bcm4708.yaml index 988e0bbb2a62..434d3c6db61e 100644 --- a/Documentation/devicetree/bindings/arm/bcm/brcm,bcm4708.yaml +++ b/Documentation/devicetree/bindings/arm/bcm/brcm,bcm4708.yaml @@ -87,4 +87,7 @@ properties: - const: brcm,brcm53012 - const: brcm,brcm53016 - const: brcm,bcm4708 + +additionalProperties: true + ... diff --git a/Documentation/devicetree/bindings/arm/bcm/brcm,cygnus.yaml b/Documentation/devicetree/bindings/arm/bcm/brcm,cygnus.yaml index 9ba7b16e1fc4..432ccf990f9e 100644 --- a/Documentation/devicetree/bindings/arm/bcm/brcm,cygnus.yaml +++ b/Documentation/devicetree/bindings/arm/bcm/brcm,cygnus.yaml @@ -26,4 +26,6 @@ properties: - brcm,bcm58305 - const: brcm,cygnus +additionalProperties: true + ... diff --git a/Documentation/devicetree/bindings/arm/bcm/brcm,hr2.yaml b/Documentation/devicetree/bindings/arm/bcm/brcm,hr2.yaml index ae614b6722c2..294948399f82 100644 --- a/Documentation/devicetree/bindings/arm/bcm/brcm,hr2.yaml +++ b/Documentation/devicetree/bindings/arm/bcm/brcm,hr2.yaml @@ -25,4 +25,6 @@ properties: - const: brcm,bcm53342 - const: brcm,hr2 +additionalProperties: true + ... diff --git a/Documentation/devicetree/bindings/arm/bcm/brcm,ns2.yaml b/Documentation/devicetree/bindings/arm/bcm/brcm,ns2.yaml index 0749adf94c28..c4847abbecd8 100644 --- a/Documentation/devicetree/bindings/arm/bcm/brcm,ns2.yaml +++ b/Documentation/devicetree/bindings/arm/bcm/brcm,ns2.yaml @@ -20,4 +20,6 @@ properties: - brcm,ns2-xmc - const: brcm,ns2 +additionalProperties: true + ... diff --git a/Documentation/devicetree/bindings/arm/bcm/brcm,nsp.yaml b/Documentation/devicetree/bindings/arm/bcm/brcm,nsp.yaml index 8c2cacb2bb4f..476bc23a7f75 100644 --- a/Documentation/devicetree/bindings/arm/bcm/brcm,nsp.yaml +++ b/Documentation/devicetree/bindings/arm/bcm/brcm,nsp.yaml @@ -33,4 +33,6 @@ properties: - brcm,bcm88312 - const: brcm,nsp +additionalProperties: true + ... diff --git a/Documentation/devicetree/bindings/arm/bcm/brcm,stingray.yaml b/Documentation/devicetree/bindings/arm/bcm/brcm,stingray.yaml index c13cb96545a2..c638e04ebae0 100644 --- a/Documentation/devicetree/bindings/arm/bcm/brcm,stingray.yaml +++ b/Documentation/devicetree/bindings/arm/bcm/brcm,stingray.yaml @@ -21,4 +21,6 @@ properties: - brcm,bcm958802a802x - const: brcm,stingray +additionalProperties: true + ... diff --git a/Documentation/devicetree/bindings/arm/bcm/brcm,vulcan-soc.yaml b/Documentation/devicetree/bindings/arm/bcm/brcm,vulcan-soc.yaml index ccdf9f99cb2b..4eba182abd53 100644 --- a/Documentation/devicetree/bindings/arm/bcm/brcm,vulcan-soc.yaml +++ b/Documentation/devicetree/bindings/arm/bcm/brcm,vulcan-soc.yaml @@ -19,4 +19,6 @@ properties: - cavium,thunderx2-cn9900 - const: brcm,vulcan-soc +additionalProperties: true + ... diff --git a/Documentation/devicetree/bindings/arm/bitmain.yaml b/Documentation/devicetree/bindings/arm/bitmain.yaml index 5880083ab8d0..90ba02be48ce 100644 --- a/Documentation/devicetree/bindings/arm/bitmain.yaml +++ b/Documentation/devicetree/bindings/arm/bitmain.yaml @@ -17,4 +17,7 @@ properties: - enum: - bitmain,sophon-edge - const: bitmain,bm1880 + +additionalProperties: true + ... diff --git a/Documentation/devicetree/bindings/arm/calxeda.yaml b/Documentation/devicetree/bindings/arm/calxeda.yaml index aa5571d23c39..46f78addebb0 100644 --- a/Documentation/devicetree/bindings/arm/calxeda.yaml +++ b/Documentation/devicetree/bindings/arm/calxeda.yaml @@ -20,3 +20,5 @@ properties: - enum: - calxeda,highbank - calxeda,ecx-2000 + +additionalProperties: true diff --git a/Documentation/devicetree/bindings/arm/digicolor.yaml b/Documentation/devicetree/bindings/arm/digicolor.yaml index 849e20518339..a35de3c9e284 100644 --- a/Documentation/devicetree/bindings/arm/digicolor.yaml +++ b/Documentation/devicetree/bindings/arm/digicolor.yaml @@ -15,4 +15,6 @@ properties: compatible: const: cnxt,cx92755 +additionalProperties: true + ... diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml index 1ca9dfa8ce9a..934289446abb 100644 --- a/Documentation/devicetree/bindings/arm/fsl.yaml +++ b/Documentation/devicetree/bindings/arm/fsl.yaml @@ -621,4 +621,6 @@ properties: - fsl,s32v234-evb # S32V234-EVB2 Customer Evaluation Board - const: fsl,s32v234 +additionalProperties: true + ... diff --git a/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.yaml b/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.yaml index 43b8ce2227aa..b38458022946 100644 --- a/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.yaml +++ b/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.yaml @@ -64,4 +64,7 @@ properties: items: - const: H836ASDJ - const: hisilicon,sd5203 + +additionalProperties: true + ... diff --git a/Documentation/devicetree/bindings/arm/intel,keembay.yaml b/Documentation/devicetree/bindings/arm/intel,keembay.yaml index 06a7b05f435f..69cd30872928 100644 --- a/Documentation/devicetree/bindings/arm/intel,keembay.yaml +++ b/Documentation/devicetree/bindings/arm/intel,keembay.yaml @@ -16,4 +16,7 @@ properties: - enum: - intel,keembay-evm - const: intel,keembay + +additionalProperties: true + ... diff --git a/Documentation/devicetree/bindings/arm/intel-ixp4xx.yaml b/Documentation/devicetree/bindings/arm/intel-ixp4xx.yaml index f18302efb90e..d72e92bdf7c1 100644 --- a/Documentation/devicetree/bindings/arm/intel-ixp4xx.yaml +++ b/Documentation/devicetree/bindings/arm/intel-ixp4xx.yaml @@ -22,3 +22,5 @@ properties: - enum: - gateworks,gw2358 - const: intel,ixp43x + +additionalProperties: true diff --git a/Documentation/devicetree/bindings/arm/keystone/ti,k3-sci-common.yaml b/Documentation/devicetree/bindings/arm/keystone/ti,k3-sci-common.yaml index 7597bc93a55f..5cbcacaeb441 100644 --- a/Documentation/devicetree/bindings/arm/keystone/ti,k3-sci-common.yaml +++ b/Documentation/devicetree/bindings/arm/keystone/ti,k3-sci-common.yaml @@ -42,3 +42,5 @@ properties: - description: TI-SCI processor id for the remote processor device - description: TI-SCI host id to which processor control ownership should be transferred to + +additionalProperties: true diff --git a/Documentation/devicetree/bindings/arm/marvell/armada-7k-8k.yaml b/Documentation/devicetree/bindings/arm/marvell/armada-7k-8k.yaml index a9828c50c0fb..e9bf3054529f 100644 --- a/Documentation/devicetree/bindings/arm/marvell/armada-7k-8k.yaml +++ b/Documentation/devicetree/bindings/arm/marvell/armada-7k-8k.yaml @@ -59,3 +59,5 @@ properties: - const: marvell,cn9130 - const: marvell,armada-ap807-quad - const: marvell,armada-ap807 + +additionalProperties: true diff --git a/Documentation/devicetree/bindings/arm/mediatek.yaml b/Documentation/devicetree/bindings/arm/mediatek.yaml index 30908963ae26..f736e8c859fa 100644 --- a/Documentation/devicetree/bindings/arm/mediatek.yaml +++ b/Documentation/devicetree/bindings/arm/mediatek.yaml @@ -119,4 +119,7 @@ properties: - const: google,krane-sku176 - const: google,krane - const: mediatek,mt8183 + +additionalProperties: true + ... diff --git a/Documentation/devicetree/bindings/arm/microchip,sparx5.yaml b/Documentation/devicetree/bindings/arm/microchip,sparx5.yaml index ecf6fa12e6ad..6193388c6318 100644 --- a/Documentation/devicetree/bindings/arm/microchip,sparx5.yaml +++ b/Documentation/devicetree/bindings/arm/microchip,sparx5.yaml @@ -62,4 +62,6 @@ required: - compatible - axi@600000000 +additionalProperties: true + ... diff --git a/Documentation/devicetree/bindings/arm/moxart.yaml b/Documentation/devicetree/bindings/arm/moxart.yaml index c068df59fad2..670d24ce8ec5 100644 --- a/Documentation/devicetree/bindings/arm/moxart.yaml +++ b/Documentation/devicetree/bindings/arm/moxart.yaml @@ -16,4 +16,5 @@ properties: - const: moxa,moxart-uc-7112-lx - const: moxa,moxart +additionalProperties: true ... diff --git a/Documentation/devicetree/bindings/arm/mrvl/mrvl.yaml b/Documentation/devicetree/bindings/arm/mrvl/mrvl.yaml index 3235ec9e9bad..d58116136154 100644 --- a/Documentation/devicetree/bindings/arm/mrvl/mrvl.yaml +++ b/Documentation/devicetree/bindings/arm/mrvl/mrvl.yaml @@ -35,4 +35,7 @@ properties: - enum: - dell,wyse-ariel - const: marvell,mmp3 + +additionalProperties: true + ... diff --git a/Documentation/devicetree/bindings/arm/mstar/mstar.yaml b/Documentation/devicetree/bindings/arm/mstar/mstar.yaml index c2f980b00b06..7c787405bb2f 100644 --- a/Documentation/devicetree/bindings/arm/mstar/mstar.yaml +++ b/Documentation/devicetree/bindings/arm/mstar/mstar.yaml @@ -31,3 +31,5 @@ properties: - enum: - 70mai,midrived08 # 70mai midrive d08 - const: mstar,mercury5 + +additionalProperties: true diff --git a/Documentation/devicetree/bindings/arm/nxp/lpc32xx.yaml b/Documentation/devicetree/bindings/arm/nxp/lpc32xx.yaml index f7f024910e71..214c97bc3063 100644 --- a/Documentation/devicetree/bindings/arm/nxp/lpc32xx.yaml +++ b/Documentation/devicetree/bindings/arm/nxp/lpc32xx.yaml @@ -21,4 +21,6 @@ properties: - ea,ea3250 - phytec,phy3250 - const: nxp,lpc3250 + +additionalProperties: true ... diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml index ad25deba4d86..c97d4a580f47 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -178,4 +178,6 @@ properties: - qcom,sm8250-mtp - const: qcom,sm8250 +additionalProperties: true + ... diff --git a/Documentation/devicetree/bindings/arm/rda.yaml b/Documentation/devicetree/bindings/arm/rda.yaml index 9672aa0c760d..a5c0444aa2b4 100644 --- a/Documentation/devicetree/bindings/arm/rda.yaml +++ b/Documentation/devicetree/bindings/arm/rda.yaml @@ -19,4 +19,6 @@ properties: - xunlong,orangepi-i96 # Orange Pi i96 - const: rda,8810pl +additionalProperties: true + ... diff --git a/Documentation/devicetree/bindings/arm/realtek.yaml b/Documentation/devicetree/bindings/arm/realtek.yaml index 845f9c76d6f7..9fb0297fe1ce 100644 --- a/Documentation/devicetree/bindings/arm/realtek.yaml +++ b/Documentation/devicetree/bindings/arm/realtek.yaml @@ -54,4 +54,7 @@ properties: - enum: - realtek,mjolnir # Realtek Mjolnir EVB - const: realtek,rtd1619 + +additionalProperties: true + ... diff --git a/Documentation/devicetree/bindings/arm/renesas.yaml b/Documentation/devicetree/bindings/arm/renesas.yaml index 01a6d0c571ad..ff94c45eefb0 100644 --- a/Documentation/devicetree/bindings/arm/renesas.yaml +++ b/Documentation/devicetree/bindings/arm/renesas.yaml @@ -299,4 +299,6 @@ properties: - renesas,rzn1d400-db # RZN1D-DB (RZ/N1D Demo Board for the RZ/N1D 400 pins package) - const: renesas,r9a06g032 +additionalProperties: true + ... diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml index 65b4cc2c63f7..b621752aaa65 100644 --- a/Documentation/devicetree/bindings/arm/rockchip.yaml +++ b/Documentation/devicetree/bindings/arm/rockchip.yaml @@ -569,4 +569,7 @@ properties: items: - const: zkmagic,a95x-z2 - const: rockchip,rk3318 + +additionalProperties: true + ... diff --git a/Documentation/devicetree/bindings/arm/samsung/samsung-boards.yaml b/Documentation/devicetree/bindings/arm/samsung/samsung-boards.yaml index eb92f9eefaba..272508010b02 100644 --- a/Documentation/devicetree/bindings/arm/samsung/samsung-boards.yaml +++ b/Documentation/devicetree/bindings/arm/samsung/samsung-boards.yaml @@ -180,3 +180,5 @@ properties: required: - compatible + +additionalProperties: true diff --git a/Documentation/devicetree/bindings/arm/sirf.yaml b/Documentation/devicetree/bindings/arm/sirf.yaml index 0b597032c923..b25eb35d1b66 100644 --- a/Documentation/devicetree/bindings/arm/sirf.yaml +++ b/Documentation/devicetree/bindings/arm/sirf.yaml @@ -24,4 +24,7 @@ properties: - items: - const: sirf,prima2-cb - const: sirf,prima2 + +additionalProperties: true + ... diff --git a/Documentation/devicetree/bindings/arm/socionext/milbeaut.yaml b/Documentation/devicetree/bindings/arm/socionext/milbeaut.yaml index 2bd519d2e855..aa1d4afbc510 100644 --- a/Documentation/devicetree/bindings/arm/socionext/milbeaut.yaml +++ b/Documentation/devicetree/bindings/arm/socionext/milbeaut.yaml @@ -19,4 +19,7 @@ properties: - enum: - socionext,milbeaut-m10v-evb - const: socionext,sc2000a + +additionalProperties: true + ... diff --git a/Documentation/devicetree/bindings/arm/socionext/uniphier.yaml b/Documentation/devicetree/bindings/arm/socionext/uniphier.yaml index 6caf1f9be390..8c0e91658474 100644 --- a/Documentation/devicetree/bindings/arm/socionext/uniphier.yaml +++ b/Documentation/devicetree/bindings/arm/socionext/uniphier.yaml @@ -60,3 +60,5 @@ properties: - enum: - socionext,uniphier-pxs3-ref - const: socionext,uniphier-pxs3 + +additionalProperties: true diff --git a/Documentation/devicetree/bindings/arm/spear.yaml b/Documentation/devicetree/bindings/arm/spear.yaml index f6ec731c9531..605ad3f882ef 100644 --- a/Documentation/devicetree/bindings/arm/spear.yaml +++ b/Documentation/devicetree/bindings/arm/spear.yaml @@ -22,4 +22,7 @@ properties: - st,spear320 - st,spear1310 - st,spear1340 + +additionalProperties: true + ... diff --git a/Documentation/devicetree/bindings/arm/sprd/sprd.yaml b/Documentation/devicetree/bindings/arm/sprd/sprd.yaml index 0258a96bfbde..7b6ae3070396 100644 --- a/Documentation/devicetree/bindings/arm/sprd/sprd.yaml +++ b/Documentation/devicetree/bindings/arm/sprd/sprd.yaml @@ -30,4 +30,6 @@ properties: - sprd,sp9863a-1h10 - const: sprd,sc9863a +additionalProperties: true + ... diff --git a/Documentation/devicetree/bindings/arm/sti.yaml b/Documentation/devicetree/bindings/arm/sti.yaml index 47f9b8eebaa0..b1f28d16d3fb 100644 --- a/Documentation/devicetree/bindings/arm/sti.yaml +++ b/Documentation/devicetree/bindings/arm/sti.yaml @@ -20,4 +20,7 @@ properties: - st,stih407 - st,stih410 - st,stih418 + +additionalProperties: true + ... diff --git a/Documentation/devicetree/bindings/arm/stm32/stm32.yaml b/Documentation/devicetree/bindings/arm/stm32/stm32.yaml index 6b87314eb9ed..009b424e456e 100644 --- a/Documentation/devicetree/bindings/arm/stm32/stm32.yaml +++ b/Documentation/devicetree/bindings/arm/stm32/stm32.yaml @@ -58,4 +58,7 @@ properties: - seeed,stm32mp157c-odyssey - const: seeed,stm32mp157c-odyssey-som - const: st,stm32mp157 + +additionalProperties: true + ... diff --git a/Documentation/devicetree/bindings/arm/sunxi.yaml b/Documentation/devicetree/bindings/arm/sunxi.yaml index afa00268c7db..cab8e1b6417b 100644 --- a/Documentation/devicetree/bindings/arm/sunxi.yaml +++ b/Documentation/devicetree/bindings/arm/sunxi.yaml @@ -893,3 +893,5 @@ properties: items: - const: xunlong,orangepi-zero-plus2-h3 - const: allwinner,sun8i-h3 + +additionalProperties: true diff --git a/Documentation/devicetree/bindings/arm/tegra.yaml b/Documentation/devicetree/bindings/arm/tegra.yaml index 8ae44948e873..767e86354c8e 100644 --- a/Documentation/devicetree/bindings/arm/tegra.yaml +++ b/Documentation/devicetree/bindings/arm/tegra.yaml @@ -125,3 +125,5 @@ properties: - enum: - nvidia,tegra234-vdk - const: nvidia,tegra234 + +additionalProperties: true diff --git a/Documentation/devicetree/bindings/arm/ti/k3.yaml b/Documentation/devicetree/bindings/arm/ti/k3.yaml index 829751209543..c6e1c1e63e43 100644 --- a/Documentation/devicetree/bindings/arm/ti/k3.yaml +++ b/Documentation/devicetree/bindings/arm/ti/k3.yaml @@ -32,4 +32,7 @@ properties: - description: K3 J7200 SoC items: - const: ti,j7200 + +additionalProperties: true + ... diff --git a/Documentation/devicetree/bindings/arm/ti/nspire.yaml b/Documentation/devicetree/bindings/arm/ti/nspire.yaml index e372b43da62f..cc2023bb7fa6 100644 --- a/Documentation/devicetree/bindings/arm/ti/nspire.yaml +++ b/Documentation/devicetree/bindings/arm/ti/nspire.yaml @@ -21,4 +21,7 @@ properties: - ti,nspire-tp # Clickpad models - ti,nspire-clp + +additionalProperties: true + ... diff --git a/Documentation/devicetree/bindings/arm/ti/ti,davinci.yaml b/Documentation/devicetree/bindings/arm/ti/ti,davinci.yaml index a8765ba29476..c022d325fc08 100644 --- a/Documentation/devicetree/bindings/arm/ti/ti,davinci.yaml +++ b/Documentation/devicetree/bindings/arm/ti/ti,davinci.yaml @@ -23,4 +23,7 @@ properties: - enbw,cmc # EnBW AM1808 based CMC board - lego,ev3 # LEGO MINDSTORMS EV3 (AM1808 based) - const: ti,da850 + +additionalProperties: true + ... diff --git a/Documentation/devicetree/bindings/arm/toshiba.yaml b/Documentation/devicetree/bindings/arm/toshiba.yaml index 0e066290238e..001bbbcd1432 100644 --- a/Documentation/devicetree/bindings/arm/toshiba.yaml +++ b/Documentation/devicetree/bindings/arm/toshiba.yaml @@ -19,4 +19,7 @@ properties: - enum: - toshiba,tmpv7708-rm-mbrc # TMPV7708 RM main board - const: toshiba,tmpv7708 + +additionalProperties: true + ... diff --git a/Documentation/devicetree/bindings/arm/ux500.yaml b/Documentation/devicetree/bindings/arm/ux500.yaml index accaee906050..5db7cfba81a4 100644 --- a/Documentation/devicetree/bindings/arm/ux500.yaml +++ b/Documentation/devicetree/bindings/arm/ux500.yaml @@ -34,3 +34,5 @@ properties: items: - const: samsung,golden - const: st-ericsson,u8500 + +additionalProperties: true diff --git a/Documentation/devicetree/bindings/arm/vt8500.yaml b/Documentation/devicetree/bindings/arm/vt8500.yaml index 7b25b6fa34e9..29ff399551ca 100644 --- a/Documentation/devicetree/bindings/arm/vt8500.yaml +++ b/Documentation/devicetree/bindings/arm/vt8500.yaml @@ -21,3 +21,6 @@ properties: - wm,wm8650 - wm,wm8750 - wm,wm8850 + +additionalProperties: true + diff --git a/Documentation/devicetree/bindings/arm/xilinx.yaml b/Documentation/devicetree/bindings/arm/xilinx.yaml index c73b1f5c7f49..e0c6787f6e94 100644 --- a/Documentation/devicetree/bindings/arm/xilinx.yaml +++ b/Documentation/devicetree/bindings/arm/xilinx.yaml @@ -111,4 +111,6 @@ properties: - const: xlnx,zynqmp-zcu111 - const: xlnx,zynqmp +additionalProperties: true + ... diff --git a/Documentation/devicetree/bindings/arm/zte.yaml b/Documentation/devicetree/bindings/arm/zte.yaml index 2d3fefdccdff..672f8129cd31 100644 --- a/Documentation/devicetree/bindings/arm/zte.yaml +++ b/Documentation/devicetree/bindings/arm/zte.yaml @@ -23,4 +23,6 @@ properties: - zte,zx296718-evb - const: zte,zx296718 +additionalProperties: true + ... diff --git a/Documentation/devicetree/bindings/mips/ingenic/devices.yaml b/Documentation/devicetree/bindings/mips/ingenic/devices.yaml index dc21b4630c25..ee00d414df10 100644 --- a/Documentation/devicetree/bindings/mips/ingenic/devices.yaml +++ b/Documentation/devicetree/bindings/mips/ingenic/devices.yaml @@ -52,4 +52,7 @@ properties: items: - const: yna,cu2000-neo - const: ingenic,x2000e + +additionalProperties: true + ... diff --git a/Documentation/devicetree/bindings/mips/loongson/devices.yaml b/Documentation/devicetree/bindings/mips/loongson/devices.yaml index d25e80aa8b2a..9fee6708e6f5 100644 --- a/Documentation/devicetree/bindings/mips/loongson/devices.yaml +++ b/Documentation/devicetree/bindings/mips/loongson/devices.yaml @@ -36,4 +36,7 @@ properties: - description: Virtual Loongson64 Quad Core + VirtIO items: - const: loongson,loongson64v-4core-virtio + +additionalProperties: true + ... diff --git a/Documentation/devicetree/bindings/riscv/sifive.yaml b/Documentation/devicetree/bindings/riscv/sifive.yaml index 3ab532713dc1..3a8647d1da4c 100644 --- a/Documentation/devicetree/bindings/riscv/sifive.yaml +++ b/Documentation/devicetree/bindings/riscv/sifive.yaml @@ -22,4 +22,7 @@ properties: - sifive,hifive-unleashed-a00 - const: sifive,fu540-c000 - const: sifive,fu540 + +additionalProperties: true + ... -- cgit v1.2.3 From f84e2c5c528d937564e4a9e3411418e4c914b1fb Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Tue, 6 Oct 2020 12:19:08 -0500 Subject: dt-bindings: Another round of adding missing 'additionalProperties/unevalutatedProperties' Another round of wack-a-mole. The json-schema default is additional unknown properties are allowed, but for DT all properties should be defined. Signed-off-by: Rob Herring --- .../devicetree/bindings/display/bridge/toshiba,tc358775.yaml | 2 ++ Documentation/devicetree/bindings/edac/amazon,al-mc-edac.yaml | 1 + Documentation/devicetree/bindings/iio/adc/lltc,ltc2497.yaml | 2 ++ Documentation/devicetree/bindings/iio/humidity/ti,hdc2010.yaml | 2 ++ .../devicetree/bindings/interrupt-controller/ti,sci-inta.yaml | 2 ++ .../devicetree/bindings/interrupt-controller/ti,sci-intr.yaml | 2 ++ Documentation/devicetree/bindings/leds/backlight/common.yaml | 2 ++ Documentation/devicetree/bindings/leds/leds-lp50xx.yaml | 8 ++++++++ .../devicetree/bindings/mmc/microchip,dw-sparx5-sdhci.yaml | 2 ++ Documentation/devicetree/bindings/mmc/sdhci-am654.yaml | 2 ++ Documentation/devicetree/bindings/net/intel,dwmac-plat.yaml | 2 ++ Documentation/devicetree/bindings/net/ti,dp83822.yaml | 2 ++ Documentation/devicetree/bindings/phy/ti,omap-usb2.yaml | 2 ++ Documentation/devicetree/bindings/power/reset/reboot-mode.yaml | 2 ++ Documentation/devicetree/bindings/regulator/mps,mp886x.yaml | 2 ++ Documentation/devicetree/bindings/regulator/pfuze100.yaml | 2 ++ Documentation/devicetree/bindings/sound/realtek,rt1015p.yaml | 2 ++ 17 files changed, 39 insertions(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/display/bridge/toshiba,tc358775.yaml b/Documentation/devicetree/bindings/display/bridge/toshiba,tc358775.yaml index e51d5cccc0e9..fd3113aa9ccd 100644 --- a/Documentation/devicetree/bindings/display/bridge/toshiba,tc358775.yaml +++ b/Documentation/devicetree/bindings/display/bridge/toshiba,tc358775.yaml @@ -85,6 +85,8 @@ required: - reset-gpios - ports +additionalProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/edac/amazon,al-mc-edac.yaml b/Documentation/devicetree/bindings/edac/amazon,al-mc-edac.yaml index a25387df0865..57e5270a0741 100644 --- a/Documentation/devicetree/bindings/edac/amazon,al-mc-edac.yaml +++ b/Documentation/devicetree/bindings/edac/amazon,al-mc-edac.yaml @@ -48,6 +48,7 @@ required: - "#address-cells" - "#size-cells" +additionalProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/iio/adc/lltc,ltc2497.yaml b/Documentation/devicetree/bindings/iio/adc/lltc,ltc2497.yaml index 6a176f551d75..c1772b568cd1 100644 --- a/Documentation/devicetree/bindings/iio/adc/lltc,ltc2497.yaml +++ b/Documentation/devicetree/bindings/iio/adc/lltc,ltc2497.yaml @@ -28,6 +28,8 @@ required: - reg - vref-supply +additionalProperties: false + examples: - | i2c { diff --git a/Documentation/devicetree/bindings/iio/humidity/ti,hdc2010.yaml b/Documentation/devicetree/bindings/iio/humidity/ti,hdc2010.yaml index dc870eb2875f..7037f82ec753 100644 --- a/Documentation/devicetree/bindings/iio/humidity/ti,hdc2010.yaml +++ b/Documentation/devicetree/bindings/iio/humidity/ti,hdc2010.yaml @@ -32,6 +32,8 @@ required: - compatible - reg +additionalProperties: false + examples: - | i2c0 { diff --git a/Documentation/devicetree/bindings/interrupt-controller/ti,sci-inta.yaml b/Documentation/devicetree/bindings/interrupt-controller/ti,sci-inta.yaml index c7cd05656a3e..f6c3fcc4bdfd 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/ti,sci-inta.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/ti,sci-inta.yaml @@ -79,6 +79,8 @@ required: - ti,sci-dev-id - ti,interrupt-ranges +unevaluatedProperties: false + examples: - | bus { diff --git a/Documentation/devicetree/bindings/interrupt-controller/ti,sci-intr.yaml b/Documentation/devicetree/bindings/interrupt-controller/ti,sci-intr.yaml index cff6a956afb4..e12aee42b126 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/ti,sci-intr.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/ti,sci-intr.yaml @@ -88,6 +88,8 @@ required: - ti,sci-dev-id - ti,interrupt-ranges +unevaluatedProperties: false + examples: - | main_gpio_intr: interrupt-controller0 { diff --git a/Documentation/devicetree/bindings/leds/backlight/common.yaml b/Documentation/devicetree/bindings/leds/backlight/common.yaml index 4e7e95e331a5..bc817f77d2b1 100644 --- a/Documentation/devicetree/bindings/leds/backlight/common.yaml +++ b/Documentation/devicetree/bindings/leds/backlight/common.yaml @@ -32,3 +32,5 @@ properties: that a LED can be made so bright that it gets damaged or causes damage due to restrictions in a specific system, such as mounting conditions. $ref: /schemas/types.yaml#definitions/uint32 + +additionalProperties: true diff --git a/Documentation/devicetree/bindings/leds/leds-lp50xx.yaml b/Documentation/devicetree/bindings/leds/leds-lp50xx.yaml index 947542a253ec..c192b5feadc7 100644 --- a/Documentation/devicetree/bindings/leds/leds-lp50xx.yaml +++ b/Documentation/devicetree/bindings/leds/leds-lp50xx.yaml @@ -46,6 +46,12 @@ properties: vled-supply: description: LED supply. + '#address-cells': + const: 1 + + '#size-cells': + const: 0 + patternProperties: '^multi-led@[0-9a-f]$': type: object @@ -69,6 +75,8 @@ required: - compatible - reg +additionalProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/mmc/microchip,dw-sparx5-sdhci.yaml b/Documentation/devicetree/bindings/mmc/microchip,dw-sparx5-sdhci.yaml index 55883290543b..69ff065c9a39 100644 --- a/Documentation/devicetree/bindings/mmc/microchip,dw-sparx5-sdhci.yaml +++ b/Documentation/devicetree/bindings/mmc/microchip,dw-sparx5-sdhci.yaml @@ -46,6 +46,8 @@ required: - clocks - clock-names +unevaluatedProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/mmc/sdhci-am654.yaml b/Documentation/devicetree/bindings/mmc/sdhci-am654.yaml index 2cd859066462..1ae945434c53 100644 --- a/Documentation/devicetree/bindings/mmc/sdhci-am654.yaml +++ b/Documentation/devicetree/bindings/mmc/sdhci-am654.yaml @@ -186,6 +186,8 @@ required: - clock-names - ti,otap-del-sel-legacy +unevaluatedProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/net/intel,dwmac-plat.yaml b/Documentation/devicetree/bindings/net/intel,dwmac-plat.yaml index fa3ebba4e635..c1948ce00081 100644 --- a/Documentation/devicetree/bindings/net/intel,dwmac-plat.yaml +++ b/Documentation/devicetree/bindings/net/intel,dwmac-plat.yaml @@ -46,6 +46,8 @@ required: - clocks - clock-names +unevaluatedProperties: false + examples: # FIXME: Remove defines and include the correct header file # once it is available in mainline. diff --git a/Documentation/devicetree/bindings/net/ti,dp83822.yaml b/Documentation/devicetree/bindings/net/ti,dp83822.yaml index 55913534cbc2..75e8712e903a 100644 --- a/Documentation/devicetree/bindings/net/ti,dp83822.yaml +++ b/Documentation/devicetree/bindings/net/ti,dp83822.yaml @@ -65,6 +65,8 @@ properties: required: - reg +unevaluatedProperties: false + examples: - | mdio0 { diff --git a/Documentation/devicetree/bindings/phy/ti,omap-usb2.yaml b/Documentation/devicetree/bindings/phy/ti,omap-usb2.yaml index ab77a65c5c55..83d5d0aceb04 100644 --- a/Documentation/devicetree/bindings/phy/ti,omap-usb2.yaml +++ b/Documentation/devicetree/bindings/phy/ti,omap-usb2.yaml @@ -62,6 +62,8 @@ required: - clocks - clock-names +additionalProperties: false + examples: - | usb0_phy: phy@4100000 { diff --git a/Documentation/devicetree/bindings/power/reset/reboot-mode.yaml b/Documentation/devicetree/bindings/power/reset/reboot-mode.yaml index a2dca38577f7..9c6fda6b1dd9 100644 --- a/Documentation/devicetree/bindings/power/reset/reboot-mode.yaml +++ b/Documentation/devicetree/bindings/power/reset/reboot-mode.yaml @@ -36,6 +36,8 @@ patternProperties: "^mode-.*$": $ref: /schemas/types.yaml#/definitions/uint32 +additionalProperties: false + examples: - | reboot-mode { diff --git a/Documentation/devicetree/bindings/regulator/mps,mp886x.yaml b/Documentation/devicetree/bindings/regulator/mps,mp886x.yaml index ba175b30f468..9245b7199439 100644 --- a/Documentation/devicetree/bindings/regulator/mps,mp886x.yaml +++ b/Documentation/devicetree/bindings/regulator/mps,mp886x.yaml @@ -41,6 +41,8 @@ required: - enable-gpios - mps,fb-voltage-divider +unevaluatedProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/regulator/pfuze100.yaml b/Documentation/devicetree/bindings/regulator/pfuze100.yaml index c6de49685db7..f578e72778a7 100644 --- a/Documentation/devicetree/bindings/regulator/pfuze100.yaml +++ b/Documentation/devicetree/bindings/regulator/pfuze100.yaml @@ -80,6 +80,8 @@ required: - compatible - reg +additionalProperties: false + examples: - | i2c { diff --git a/Documentation/devicetree/bindings/sound/realtek,rt1015p.yaml b/Documentation/devicetree/bindings/sound/realtek,rt1015p.yaml index def1db298eac..644b68edf3e1 100644 --- a/Documentation/devicetree/bindings/sound/realtek,rt1015p.yaml +++ b/Documentation/devicetree/bindings/sound/realtek,rt1015p.yaml @@ -26,6 +26,8 @@ properties: required: - compatible +additionalProperties: false + examples: - | #include -- cgit v1.2.3 From ef900cccb864d72292b6f5564850d157036905ea Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Tue, 27 Oct 2020 10:51:21 +0100 Subject: MAINTAINERS: fix broken doc refs due to yaml conversion Several *.txt files got converted to yaml. Update their references at MAINTAINERS file accordingly. Signed-off-by: Mauro Carvalho Chehab Acked-by: Stephen Boyd Link: https://lore.kernel.org/r/3b58afec5195d4ea505ea9b3f74d53f7abed4e6f.1603791716.git.mchehab+huawei@kernel.org Signed-off-by: Jonathan Corbet --- Documentation/devicetree/bindings/clock/hi6220-clock.txt | 2 +- MAINTAINERS | 9 ++++----- .../devicetree/bindings/net/wireless/silabs,wfx.yaml | 2 +- 3 files changed, 6 insertions(+), 7 deletions(-) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/clock/hi6220-clock.txt b/Documentation/devicetree/bindings/clock/hi6220-clock.txt index ef3deb7b86ea..17ac4a3dd26a 100644 --- a/Documentation/devicetree/bindings/clock/hi6220-clock.txt +++ b/Documentation/devicetree/bindings/clock/hi6220-clock.txt @@ -4,7 +4,7 @@ Clock control registers reside in different Hi6220 system controllers, please refer the following document to know more about the binding rules for these system controllers: -Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt +Documentation/devicetree/bindings/arm/hisilicon/hisilicon.yaml Required Properties: diff --git a/MAINTAINERS b/MAINTAINERS index e73636b75f29..4511501cd59c 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -978,7 +978,7 @@ M: Michael Hennerich L: linux-iio@vger.kernel.org S: Supported W: http://ez.analog.com/community/linux-device-drivers -F: Documentation/devicetree/bindings/iio/adc/adi,ad7768-1.txt +F: Documentation/devicetree/bindings/iio/adc/adi,ad7768-1.yaml F: drivers/iio/adc/ad7768-1.c ANALOG DEVICES INC AD7780 DRIVER @@ -3860,7 +3860,7 @@ M: Roger Quadros L: linux-usb@vger.kernel.org S: Maintained T: git git://git.kernel.org/pub/scm/linux/kernel/git/peter.chen/usb.git -F: Documentation/devicetree/bindings/usb/cdns-usb3.txt +F: Documentation/devicetree/bindings/usb/cdns,usb3.yaml F: drivers/usb/cdns3/ CADET FM/AM RADIO RECEIVER DRIVER @@ -7920,7 +7920,7 @@ HISILICON LPC BUS DRIVER M: john.garry@huawei.com S: Maintained W: http://www.hisilicon.com -F: Documentation/devicetree/bindings/arm/hisilicon/hisilicon-low-pin-count.txt +F: Documentation/devicetree/bindings/arm/hisilicon/low-pin-count.yaml F: drivers/bus/hisi_lpc.c HISILICON NETWORK SUBSYSTEM 3 DRIVER (HNS3) @@ -14902,7 +14902,6 @@ RENESAS ETHERNET DRIVERS R: Sergei Shtylyov L: netdev@vger.kernel.org L: linux-renesas-soc@vger.kernel.org -F: Documentation/devicetree/bindings/net/renesas,*.txt F: Documentation/devicetree/bindings/net/renesas,*.yaml F: drivers/net/ethernet/renesas/ F: include/linux/sh_eth.h @@ -18106,7 +18105,7 @@ M: Yu Chen M: Binghui Wang L: linux-usb@vger.kernel.org S: Maintained -F: Documentation/devicetree/bindings/phy/phy-hi3660-usb3.txt +F: Documentation/devicetree/bindings/phy/hisilicon,hi3660-usb3.yaml F: drivers/phy/hisilicon/phy-hi3660-usb3.c USB ISP116X DRIVER diff --git a/drivers/staging/wfx/Documentation/devicetree/bindings/net/wireless/silabs,wfx.yaml b/drivers/staging/wfx/Documentation/devicetree/bindings/net/wireless/silabs,wfx.yaml index 43b5630c0407..510edd12ed19 100644 --- a/drivers/staging/wfx/Documentation/devicetree/bindings/net/wireless/silabs,wfx.yaml +++ b/drivers/staging/wfx/Documentation/devicetree/bindings/net/wireless/silabs,wfx.yaml @@ -24,7 +24,7 @@ description: In addition, it is recommended to declare a mmc-pwrseq on SDIO host above WFx. Without it, you may encounter issues with warm boot. The mmc-pwrseq should be compatible with mmc-pwrseq-simple. Please consult - Documentation/devicetree/bindings/mmc/mmc-pwrseq-simple.txt for more + Documentation/devicetree/bindings/mmc/mmc-pwrseq-simple.yaml for more information. For SPI':' -- cgit v1.2.3 From bb2bd7c7f3d0946acc2104db31df228d10f7b598 Mon Sep 17 00:00:00 2001 From: Peter Ujfalusi Date: Tue, 20 Oct 2020 10:32:42 +0300 Subject: dt-bindings: irqchip: ti, sci-inta: Update for unmapped event handling The new DMA architecture introduced with AM64 introduced new event types: unampped events. These events are mapped within INTA in contrast to other K3 devices where the events with similar function was originating from the UDMAP or ringacc. The ti,unmapped-event-sources should contain phandle array to the devices in the system (typically DMA controllers) from where the unmapped events originate. Signed-off-by: Peter Ujfalusi Signed-off-by: Marc Zyngier Reviewed-by: Rob Herring Link: https://lore.kernel.org/r/20201020073243.19255-2-peter.ujfalusi@ti.com --- .../devicetree/bindings/interrupt-controller/ti,sci-inta.yaml | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/interrupt-controller/ti,sci-inta.yaml b/Documentation/devicetree/bindings/interrupt-controller/ti,sci-inta.yaml index c7cd05656a3e..cc795498488f 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/ti,sci-inta.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/ti,sci-inta.yaml @@ -32,6 +32,11 @@ description: | | | vint | bit | | 0 |.....|63| vintx | | +--------------+ +------------+ | | | + | Unmap | + | +--------------+ | + Unmapped events ----->| | umapidx |-------------------------> Globalevents + | +--------------+ | + | | +-----------------------------------------+ Configuration of these Intmap registers that maps global events to vint is @@ -70,6 +75,11 @@ properties: - description: | "limit" specifies the limit for translation + ti,unmapped-event-sources: + $ref: /schemas/types.yaml#definitions/phandle-array + description: + Array of phandles to DMA controllers where the unmapped events originate. + required: - compatible - reg -- cgit v1.2.3 From 82768a86c64659c7181571ebfbc41ec9f2e52dde Mon Sep 17 00:00:00 2001 From: Peter Ujfalusi Date: Tue, 3 Nov 2020 15:50:04 +0200 Subject: dt-bindings: irqchip: ti, sci-inta: Fix diagram indentation for unmapped events One space has been missing by the diagram update. Fixes: bb2bd7c7f3d0 ("dt-bindings: irqchip: ti, sci-inta: Update for unmapped event handling") Reported-by: Rob Herring Signed-off-by: Peter Ujfalusi Signed-off-by: Thomas Gleixner Acked-by: Rob Herring Cc: Marc Zyngier Link: https://lore.kernel.org/r/20201103135004.2363-1-peter.ujfalusi@ti.com --- Documentation/devicetree/bindings/interrupt-controller/ti,sci-inta.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/interrupt-controller/ti,sci-inta.yaml b/Documentation/devicetree/bindings/interrupt-controller/ti,sci-inta.yaml index cc795498488f..8d90bc593c6e 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/ti,sci-inta.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/ti,sci-inta.yaml @@ -34,7 +34,7 @@ description: | | | | Unmap | | +--------------+ | - Unmapped events ----->| | umapidx |-------------------------> Globalevents + Unmapped events ---->| | umapidx |-------------------------> Globalevents | +--------------+ | | | +-----------------------------------------+ -- cgit v1.2.3 From 1f9234401ce0aa7a05857db43c5aef290d5177e2 Mon Sep 17 00:00:00 2001 From: Oleksij Rempel Date: Thu, 22 Oct 2020 09:52:17 +0200 Subject: dt-bindings: can: add can-controller.yaml For now we have only node name as common rule for all CAN controllers Signed-off-by: Oleksij Rempel Reviewed-by: Rob Herring Link: https://lore.kernel.org/r/20201022075218.11880-2-o.rempel@pengutronix.de Signed-off-by: Marc Kleine-Budde --- .../devicetree/bindings/net/can/can-controller.yaml | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) create mode 100644 Documentation/devicetree/bindings/net/can/can-controller.yaml (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/net/can/can-controller.yaml b/Documentation/devicetree/bindings/net/can/can-controller.yaml new file mode 100644 index 000000000000..9cf2ae097156 --- /dev/null +++ b/Documentation/devicetree/bindings/net/can/can-controller.yaml @@ -0,0 +1,18 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/can/can-controller.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: CAN Controller Generic Binding + +maintainers: + - Marc Kleine-Budde + +properties: + $nodename: + pattern: "^can(@.*)?$" + +additionalProperties: true + +... -- cgit v1.2.3 From e5ab9aa7e49b39c34d110d6303b917c14a277200 Mon Sep 17 00:00:00 2001 From: Oleksij Rempel Date: Thu, 22 Oct 2020 09:52:18 +0200 Subject: dt-bindings: can: flexcan: convert fsl,*flexcan bindings to yaml In order to automate the verification of DT nodes convert fsl-flexcan.txt to fsl,flexcan.yaml Signed-off-by: Oleksij Rempel Reviewed-by: Rob Herring Link: https://lore.kernel.org/r/20201022075218.11880-3-o.rempel@pengutronix.de Signed-off-by: Marc Kleine-Budde --- .../devicetree/bindings/net/can/fsl,flexcan.yaml | 135 +++++++++++++++++++++ .../devicetree/bindings/net/can/fsl-flexcan.txt | 57 --------- 2 files changed, 135 insertions(+), 57 deletions(-) create mode 100644 Documentation/devicetree/bindings/net/can/fsl,flexcan.yaml delete mode 100644 Documentation/devicetree/bindings/net/can/fsl-flexcan.txt (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/net/can/fsl,flexcan.yaml b/Documentation/devicetree/bindings/net/can/fsl,flexcan.yaml new file mode 100644 index 000000000000..43df15ba8fa4 --- /dev/null +++ b/Documentation/devicetree/bindings/net/can/fsl,flexcan.yaml @@ -0,0 +1,135 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/can/fsl,flexcan.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: + Flexcan CAN controller on Freescale's ARM and PowerPC system-on-a-chip (SOC). + +maintainers: + - Marc Kleine-Budde + +allOf: + - $ref: can-controller.yaml# + +properties: + compatible: + oneOf: + - enum: + - fsl,imx8qm-flexcan + - fsl,imx8mp-flexcan + - fsl,imx6q-flexcan + - fsl,imx53-flexcan + - fsl,imx35-flexcan + - fsl,imx28-flexcan + - fsl,imx25-flexcan + - fsl,p1010-flexcan + - fsl,vf610-flexcan + - fsl,ls1021ar2-flexcan + - fsl,lx2160ar1-flexcan + - items: + - enum: + - fsl,imx7d-flexcan + - fsl,imx6ul-flexcan + - fsl,imx6sx-flexcan + - const: fsl,imx6q-flexcan + - items: + - enum: + - fsl,ls1028ar1-flexcan + - const: fsl,lx2160ar1-flexcan + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + maxItems: 2 + + clock-names: + items: + - const: ipg + - const: per + + clock-frequency: + description: | + The oscillator frequency driving the flexcan device, filled in by the + boot loader. This property should only be used the used operating system + doesn't support the clocks and clock-names property. + + xceiver-supply: + description: Regulator that powers the CAN transceiver. + + big-endian: + $ref: /schemas/types.yaml#/definitions/flag + description: | + This means the registers of FlexCAN controller are big endian. This is + optional property.i.e. if this property is not present in device tree + node then controller is assumed to be little endian. If this property is + present then controller is assumed to be big endian. + + fsl,stop-mode: + description: | + Register bits of stop mode control. + + The format should be as follows: + + gpr is the phandle to general purpose register node. + req_gpr is the gpr register offset of CAN stop request. + req_bit is the bit offset of CAN stop request. + $ref: /schemas/types.yaml#/definitions/phandle-array + items: + - description: The 'gpr' is the phandle to general purpose register node. + - description: The 'req_gpr' is the gpr register offset of CAN stop request. + maximum: 0xff + - description: The 'req_bit' is the bit offset of CAN stop request. + maximum: 0x1f + + fsl,clk-source: + description: | + Select the clock source to the CAN Protocol Engine (PE). It's SoC + implementation dependent. Refer to RM for detailed definition. If this + property is not set in device tree node then driver selects clock source 1 + by default. + 0: clock source 0 (oscillator clock) + 1: clock source 1 (peripheral clock) + $ref: /schemas/types.yaml#/definitions/uint32 + default: 1 + minimum: 0 + maximum: 1 + + wakeup-source: + $ref: /schemas/types.yaml#/definitions/flag + description: + Enable CAN remote wakeup. + +required: + - compatible + - reg + - interrupts + +additionalProperties: false + +examples: + - | + can@1c000 { + compatible = "fsl,p1010-flexcan"; + reg = <0x1c000 0x1000>; + interrupts = <48 0x2>; + interrupt-parent = <&mpic>; + clock-frequency = <200000000>; + fsl,clk-source = <0>; + }; + - | + #include + + can@2090000 { + compatible = "fsl,imx6q-flexcan"; + reg = <0x02090000 0x4000>; + interrupts = <0 110 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clks 1>, <&clks 2>; + clock-names = "ipg", "per"; + fsl,stop-mode = <&gpr 0x34 28>; + }; diff --git a/Documentation/devicetree/bindings/net/can/fsl-flexcan.txt b/Documentation/devicetree/bindings/net/can/fsl-flexcan.txt deleted file mode 100644 index e10b6eb955e1..000000000000 --- a/Documentation/devicetree/bindings/net/can/fsl-flexcan.txt +++ /dev/null @@ -1,57 +0,0 @@ -Flexcan CAN controller on Freescale's ARM and PowerPC system-on-a-chip (SOC). - -Required properties: - -- compatible : Should be "fsl,-flexcan" - - where is imx8qm, imx6q, imx28, imx53, imx35, imx25, p1010, - vf610, ls1021ar2, lx2160ar1, ls1028ar1. - - The ls1028ar1 must be followed by lx2160ar1, e.g. - - "fsl,ls1028ar1-flexcan", "fsl,lx2160ar1-flexcan" - - An implementation should also claim any of the following compatibles - that it is fully backwards compatible with: - - - fsl,p1010-flexcan - -- reg : Offset and length of the register set for this device -- interrupts : Interrupt tuple for this device - -Optional properties: - -- clock-frequency : The oscillator frequency driving the flexcan device - -- xceiver-supply: Regulator that powers the CAN transceiver - -- big-endian: This means the registers of FlexCAN controller are big endian. - This is optional property.i.e. if this property is not present in - device tree node then controller is assumed to be little endian. - if this property is present then controller is assumed to be big - endian. - -- fsl,stop-mode: register bits of stop mode control, the format is - <&gpr req_gpr req_bit>. - gpr is the phandle to general purpose register node. - req_gpr is the gpr register offset of CAN stop request. - req_bit is the bit offset of CAN stop request. - -- fsl,clk-source: Select the clock source to the CAN Protocol Engine (PE). - It's SoC Implementation dependent. Refer to RM for detailed - definition. If this property is not set in device tree node - then driver selects clock source 1 by default. - 0: clock source 0 (oscillator clock) - 1: clock source 1 (peripheral clock) - -- wakeup-source: enable CAN remote wakeup - -Example: - - can@1c000 { - compatible = "fsl,p1010-flexcan"; - reg = <0x1c000 0x1000>; - interrupts = <48 0x2>; - interrupt-parent = <&mpic>; - clock-frequency = <200000000>; // filled in by bootloader - fsl,clk-source = <0>; // select clock source 0 for PE - }; -- cgit v1.2.3 From 93bd813c17763177cf87e96c2313bd4dd747d234 Mon Sep 17 00:00:00 2001 From: Jack Yu Date: Thu, 5 Nov 2020 11:08:04 +0800 Subject: ASoC: rt1015: add delay to fix pop noise from speaker Add delay to fix pop noise from speaker. Signed-off-by: Jack Yu Reviewed-by: Pierre-Louis Bossart Link: https://lore.kernel.org/r/20201105030804.31115-1-jack.yu@realtek.com Signed-off-by: Mark Brown --- Documentation/devicetree/bindings/sound/rt1015.txt | 6 ++++++ include/sound/rt1015.h | 15 +++++++++++++++ sound/soc/codecs/rt1015.c | 20 ++++++++++++++++++++ sound/soc/codecs/rt1015.h | 2 ++ 4 files changed, 43 insertions(+) create mode 100644 include/sound/rt1015.h (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/sound/rt1015.txt b/Documentation/devicetree/bindings/sound/rt1015.txt index fcfd02d8d32f..e498966d436f 100644 --- a/Documentation/devicetree/bindings/sound/rt1015.txt +++ b/Documentation/devicetree/bindings/sound/rt1015.txt @@ -8,10 +8,16 @@ Required properties: - reg : The I2C address of the device. +Optional properties: + +- realtek,power-up-delay-ms + Set a delay time for flush work to be completed, + this value is adjustable depending on platform. Example: rt1015: codec@28 { compatible = "realtek,rt1015"; reg = <0x28>; + realtek,power-up-delay-ms = <50>; }; diff --git a/include/sound/rt1015.h b/include/sound/rt1015.h new file mode 100644 index 000000000000..70a7538d4c89 --- /dev/null +++ b/include/sound/rt1015.h @@ -0,0 +1,15 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * linux/sound/rt1015.h -- Platform data for RT1015 + * + * Copyright 2020 Realtek Microelectronics + */ + +#ifndef __LINUX_SND_RT1015_H +#define __LINUX_SND_RT1015_H + +struct rt1015_platform_data { + unsigned int power_up_delay_ms; +}; + +#endif diff --git a/sound/soc/codecs/rt1015.c b/sound/soc/codecs/rt1015.c index 25fe2ddedd54..967193518349 100644 --- a/sound/soc/codecs/rt1015.c +++ b/sound/soc/codecs/rt1015.c @@ -27,10 +27,15 @@ #include #include #include +#include #include "rl6231.h" #include "rt1015.h" +static const struct rt1015_platform_data i2s_default_platform_data = { + .power_up_delay_ms = 50, +}; + static const struct reg_default rt1015_reg[] = { { 0x0000, 0x0000 }, { 0x0004, 0xa000 }, @@ -650,6 +655,7 @@ static int rt1015_amp_drv_event(struct snd_soc_dapm_widget *w, case SND_SOC_DAPM_POST_PMU: if (rt1015->hw_config == RT1015_HW_28) schedule_delayed_work(&rt1015->flush_work, msecs_to_jiffies(10)); + msleep(rt1015->pdata.power_up_delay_ms); break; default: break; @@ -1067,9 +1073,16 @@ static struct acpi_device_id rt1015_acpi_match[] = { MODULE_DEVICE_TABLE(acpi, rt1015_acpi_match); #endif +static void rt1015_parse_dt(struct rt1015_priv *rt1015, struct device *dev) +{ + device_property_read_u32(dev, "realtek,power-up-delay-ms", + &rt1015->pdata.power_up_delay_ms); +} + static int rt1015_i2c_probe(struct i2c_client *i2c, const struct i2c_device_id *id) { + struct rt1015_platform_data *pdata = dev_get_platdata(&i2c->dev); struct rt1015_priv *rt1015; int ret; unsigned int val; @@ -1081,6 +1094,13 @@ static int rt1015_i2c_probe(struct i2c_client *i2c, i2c_set_clientdata(i2c, rt1015); + rt1015->pdata = i2s_default_platform_data; + + if (pdata) + rt1015->pdata = *pdata; + else + rt1015_parse_dt(rt1015, &i2c->dev); + rt1015->regmap = devm_regmap_init_i2c(i2c, &rt1015_regmap); if (IS_ERR(rt1015->regmap)) { ret = PTR_ERR(rt1015->regmap); diff --git a/sound/soc/codecs/rt1015.h b/sound/soc/codecs/rt1015.h index d3fdd30aca6d..15cadb361ec3 100644 --- a/sound/soc/codecs/rt1015.h +++ b/sound/soc/codecs/rt1015.h @@ -12,6 +12,7 @@ #ifndef __RT1015_H__ #define __RT1015_H__ +#include #define RT1015_DEVICE_ID_VAL 0x1011 #define RT1015_DEVICE_ID_VAL2 0x1015 @@ -380,6 +381,7 @@ enum { struct rt1015_priv { struct snd_soc_component *component; + struct rt1015_platform_data pdata; struct regmap *regmap; int sysclk; int sysclk_src; -- cgit v1.2.3 From 49c3e714ff4391144d8bb3fa99d0b460f8dbfd86 Mon Sep 17 00:00:00 2001 From: Marc Kleine-Budde Date: Wed, 11 Nov 2020 14:05:07 +0100 Subject: dt-bindings: can: fsl,flexcan.yaml: fix fsl,stop-mode The fsl,stop-mode property is a phandle-array and should consist of one phandle and two 32 bit integers, e.g.: fsl,stop-mode = <&gpr 0x34 28>; This patch fixes the following errors, which shows up during a dtbs_check: arch/arm/boot/dts/imx6dl-apf6dev.dt.yaml: can@2090000: fsl,stop-mode: [[1, 52, 28]] is too short From schema: Documentation/devicetree/bindings/net/can/fsl,flexcan.yaml Fixes: e5ab9aa7e49b ("dt-bindings: can: flexcan: convert fsl,*flexcan bindings to yaml") Reported-by: Rob Herring Cc: Oleksij Rempel Signed-off-by: Marc Kleine-Budde Link: https://lore.kernel.org/r/20201111130507.1560881-5-mkl@pengutronix.de Signed-off-by: Rob Herring --- Documentation/devicetree/bindings/net/can/fsl,flexcan.yaml | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/net/can/fsl,flexcan.yaml b/Documentation/devicetree/bindings/net/can/fsl,flexcan.yaml index 43df15ba8fa4..3093c22e761c 100644 --- a/Documentation/devicetree/bindings/net/can/fsl,flexcan.yaml +++ b/Documentation/devicetree/bindings/net/can/fsl,flexcan.yaml @@ -81,11 +81,12 @@ properties: req_bit is the bit offset of CAN stop request. $ref: /schemas/types.yaml#/definitions/phandle-array items: - - description: The 'gpr' is the phandle to general purpose register node. - - description: The 'req_gpr' is the gpr register offset of CAN stop request. - maximum: 0xff - - description: The 'req_bit' is the bit offset of CAN stop request. - maximum: 0x1f + items: + - description: The 'gpr' is the phandle to general purpose register node. + - description: The 'req_gpr' is the gpr register offset of CAN stop request. + maximum: 0xff + - description: The 'req_bit' is the bit offset of CAN stop request. + maximum: 0x1f fsl,clk-source: description: | -- cgit v1.2.3 From 3bbb73f8e60f505aced2ae820436cdacdbb19bca Mon Sep 17 00:00:00 2001 From: Marc Kleine-Budde Date: Wed, 11 Nov 2020 14:05:06 +0100 Subject: dt-bindings: can: fsl,flexcan.yaml: fix compatible for i.MX35 and i.MX53 As both the i.MX35 and i.MX53 flexcan IP cores are compatible to the i.MX25, they are listed as: compatible = "fsl,imx35-flexcan", "fsl,imx25-flexcan"; and: compatible = "fsl,imx53-flexcan", "fsl,imx25-flexcan"; in the SoC device trees. This patch fixes the following errors, which shows up during a dtbs_check: arch/arm/boot/dts/imx53-ard.dt.yaml: can@53fc8000: compatible: 'oneOf' conditional failed, one must be fixed: ['fsl,imx53-flexcan', 'fsl,imx25-flexcan'] is too long Additional items are not allowed ('fsl,imx25-flexcan' was unexpected) 'fsl,imx53-flexcan' is not one of ['fsl,imx7d-flexcan', 'fsl,imx6ul-flexcan', 'fsl,imx6sx-flexcan'] 'fsl,imx53-flexcan' is not one of ['fsl,ls1028ar1-flexcan'] 'fsl,imx6q-flexcan' was expected 'fsl,lx2160ar1-flexcan' was expected From schema: Documentation/devicetree/bindings/net/can/fsl,flexcan.yaml Fixes: e5ab9aa7e49b ("dt-bindings: can: flexcan: convert fsl,*flexcan bindings to yaml") Reported-by: Rob Herring Cc: Oleksij Rempel Signed-off-by: Marc Kleine-Budde Link: https://lore.kernel.org/r/20201111130507.1560881-4-mkl@pengutronix.de [robh: drop singular fsl,imx53-flexcan and fsl,imx35-flexcan] Signed-off-by: Rob Herring --- Documentation/devicetree/bindings/net/can/fsl,flexcan.yaml | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/net/can/fsl,flexcan.yaml b/Documentation/devicetree/bindings/net/can/fsl,flexcan.yaml index 3093c22e761c..13875eab2ed6 100644 --- a/Documentation/devicetree/bindings/net/can/fsl,flexcan.yaml +++ b/Documentation/devicetree/bindings/net/can/fsl,flexcan.yaml @@ -20,14 +20,17 @@ properties: - fsl,imx8qm-flexcan - fsl,imx8mp-flexcan - fsl,imx6q-flexcan - - fsl,imx53-flexcan - - fsl,imx35-flexcan - fsl,imx28-flexcan - fsl,imx25-flexcan - fsl,p1010-flexcan - fsl,vf610-flexcan - fsl,ls1021ar2-flexcan - fsl,lx2160ar1-flexcan + - items: + - enum: + - fsl,imx53-flexcan + - fsl,imx35-flexcan + - const: fsl,imx25-flexcan - items: - enum: - fsl,imx7d-flexcan -- cgit v1.2.3 From bdac39a3bd28891fb0ded91c9152459c57773462 Mon Sep 17 00:00:00 2001 From: Marc Kleine-Budde Date: Wed, 11 Nov 2020 22:35:48 +0100 Subject: dt-bindings: clock: imx5: fix example Since commit: 0e030a373df3 ("can: flexcan: fix endianess detection") the fsl,imx53-flexcan isn't compatible with the fsl,p1010-flexcan any more. As the former accesses the IP core in Little Endian mode and the latter uses Big Endian mode. With the conversion of the flexcan DT bindings to yaml, the dt_binding_check this throws the following error: Documentation/devicetree/bindings/clock/imx5-clock.example.dt.yaml: can@53fc8000: compatible: 'oneOf' conditional failed, one must be fixed: ['fsl,imx53-flexcan', 'fsl,p1010-flexcan'] is too long Additional items are not allowed ('fsl,p1010-flexcan' was unexpected) 'fsl,imx53-flexcan' is not one of ['fsl,imx7d-flexcan', 'fsl,imx6ul-flexcan', 'fsl,imx6sx-flexcan'] 'fsl,imx53-flexcan' is not one of ['fsl,ls1028ar1-flexcan'] 'fsl,imx6q-flexcan' was expected 'fsl,lx2160ar1-flexcan' was expected From schema: /builds/robherring/linux-dt-bindings/Documentation/devicetree/bindings/net/can/fsl,flexcan.yaml The error is fixed by replacing the "fsl,p1010-flexcan" compatible (which turned out the be incompatible) with "fsl,imx25-flexcan" in the binding example. Reported-by: Rob Herring Cc: Fabio Estevam Signed-off-by: Marc Kleine-Budde Link: https://lore.kernel.org/r/20201111213548.1621094-1-mkl@pengutronix.de [robh: Add "fsl,imx25-flexcan" as fallback] Signed-off-by: Rob Herring --- Documentation/devicetree/bindings/clock/imx5-clock.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/clock/imx5-clock.yaml b/Documentation/devicetree/bindings/clock/imx5-clock.yaml index 4d9e7c73dce9..90775c2669b8 100644 --- a/Documentation/devicetree/bindings/clock/imx5-clock.yaml +++ b/Documentation/devicetree/bindings/clock/imx5-clock.yaml @@ -57,7 +57,7 @@ examples: }; can@53fc8000 { - compatible = "fsl,imx53-flexcan", "fsl,p1010-flexcan"; + compatible = "fsl,imx53-flexcan", "fsl,imx25-flexcan"; reg = <0x53fc8000 0x4000>; interrupts = <82>; clocks = <&clks IMX5_CLK_CAN1_IPG_GATE>, <&clks IMX5_CLK_CAN1_SERIAL_GATE>; -- cgit v1.2.3