From 93d39737b29eaf1974bf850ccdc903b2418c800b Mon Sep 17 00:00:00 2001 From: Rafał Miłecki Date: Mon, 15 Oct 2018 11:30:13 +0200 Subject: dt-bindings: pinctrl: bcm4708-pinmux: improve example binding MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Broadcom SoC pins are controlled using CRU ("Clock and Reset Unit" or "Central Resource Unit") registers. There are more CRU registers and functions so CRU should be represented as a separated block in DT. Moreover CRU is a sub-block of DMU ("Device Management Unit") so that one should also get its own node. Signed-off-by: Rafał Miłecki Signed-off-by: Linus Walleij --- .../bindings/pinctrl/brcm,bcm4708-pinmux.txt | 31 ++++++++++++++++------ 1 file changed, 23 insertions(+), 8 deletions(-) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/pinctrl/brcm,bcm4708-pinmux.txt b/Documentation/devicetree/bindings/pinctrl/brcm,bcm4708-pinmux.txt index af906f196e8c..4fa9539070cb 100644 --- a/Documentation/devicetree/bindings/pinctrl/brcm,bcm4708-pinmux.txt +++ b/Documentation/devicetree/bindings/pinctrl/brcm,bcm4708-pinmux.txt @@ -30,13 +30,28 @@ For documentation of subnodes see: Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt Example: - pinctrl@1800c1c0 { - compatible = "brcm,bcm4708-pinmux"; - reg = <0x1800c1c0 0x24>; - reg-names = "cru_gpio_control"; - - spi { - function = "spi"; - groups = "spi_grp"; + dmu@1800c000 { + compatible = "simple-bus"; + ranges = <0 0x1800c000 0x1000>; + #address-cells = <1>; + #size-cells = <1>; + + cru@100 { + compatible = "simple-bus"; + reg = <0x100 0x1a4>; + ranges; + #address-cells = <1>; + #size-cells = <1>; + + pin-controller@1c0 { + compatible = "brcm,bcm4708-pinmux"; + reg = <0x1c0 0x24>; + reg-names = "cru_gpio_control"; + + spi-pins { + function = "spi"; + groups = "spi_grp"; + }; + }; }; }; -- cgit v1.2.3