From 07999587b7bbedbb6556c94f70227a99e66f19aa Mon Sep 17 00:00:00 2001 From: Stephen Warren Date: Thu, 7 Nov 2013 10:11:27 -0700 Subject: ARM: tegra: document reset properties in DT bindings Update all the Tegra DT bindings to require resets/reset-names properties where the HW module has reset inputs. Remove any entries from clocks or clock-names that were only required to identify reset inputs, rather than referring to real clocks. This is a DT-ABI-incompatible change. It is the first of two changes required for me to consider the Tegra DT bindings as stable, the other being conversion to the common DMA DT bindings. Signed-off-by: Stephen Warren Acked-By: Terje Bergstrom --- Documentation/devicetree/bindings/sound/nvidia,tegra20-ac97.txt | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'Documentation/devicetree/bindings/sound/nvidia,tegra20-ac97.txt') diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra20-ac97.txt b/Documentation/devicetree/bindings/sound/nvidia,tegra20-ac97.txt index 37f4ebf5b184..2b6817f6e40e 100644 --- a/Documentation/devicetree/bindings/sound/nvidia,tegra20-ac97.txt +++ b/Documentation/devicetree/bindings/sound/nvidia,tegra20-ac97.txt @@ -6,6 +6,10 @@ Required properties: - interrupts : Should contain AC97 interrupt - clocks : Must contain one entry, for the module clock. See ../clocks/clock-bindings.txt for details. +- resets : Must contain an entry for each entry in reset-names. + See ../reset/reset.txt for details. +- reset-names : Must include the following entries: + - ac97 - nvidia,dma-request-selector : The Tegra DMA controller's phandle and request selector for the AC97 controller - nvidia,codec-reset-gpio : The Tegra GPIO controller's phandle and the number @@ -23,4 +27,6 @@ ac97@70002000 { nvidia,codec-reset-gpio = <&gpio 170 0>; nvidia,codec-sync-gpio = <&gpio 120 0>; clocks = <&tegra_car 3>; + resets = <&tegra_car 3>; + reset-names = "ac97"; }; -- cgit v1.2.3