From 9ce86dc474168020a2097cc806fc5f9454859ab8 Mon Sep 17 00:00:00 2001 From: Ivan Mikhaylov Date: Fri, 30 Oct 2020 16:37:07 +0300 Subject: dt-bindings: net: ftgmac100: describe phy-handle and MDIO Add the phy-handle and MDIO description and add the example with PHY and MDIO nodes. Signed-off-by: Ivan Mikhaylov Reviewed-by: Andrew Lunn Signed-off-by: Jakub Kicinski --- .../devicetree/bindings/net/ftgmac100.txt | 25 ++++++++++++++++++++++ 1 file changed, 25 insertions(+) (limited to 'Documentation/devicetree/bindings/net') diff --git a/Documentation/devicetree/bindings/net/ftgmac100.txt b/Documentation/devicetree/bindings/net/ftgmac100.txt index f878c1103463..29234021f601 100644 --- a/Documentation/devicetree/bindings/net/ftgmac100.txt +++ b/Documentation/devicetree/bindings/net/ftgmac100.txt @@ -15,6 +15,7 @@ Required properties: - interrupts: Should contain ethernet controller interrupt Optional properties: +- phy-handle: See ethernet.txt file in the same directory. - phy-mode: See ethernet.txt file in the same directory. If the property is absent, "rgmii" is assumed. Supported values are "rgmii*" and "rmii" for aspeed parts. Other (unknown) parts will accept any value. @@ -32,6 +33,9 @@ Optional properties: - "MACCLK": The MAC IP clock - "RCLK": Clock gate for the RMII RCLK +Optional subnodes: +- mdio: See mdio.txt file in the same directory. + Example: mac0: ethernet@1e660000 { @@ -40,3 +44,24 @@ Example: interrupts = <2>; use-ncsi; }; + +Example with phy-handle: + + mac1: ethernet@1e680000 { + compatible = "aspeed,ast2500-mac", "faraday,ftgmac100"; + reg = <0x1e680000 0x180>; + interrupts = <2>; + + phy-handle = <&phy>; + phy-mode = "rgmii"; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + phy: ethernet-phy@1 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <1>; + }; + }; + }; -- cgit v1.2.3 From 0dbcd49917191c599e33725268892f9a4f006154 Mon Sep 17 00:00:00 2001 From: Ioana Ciornei Date: Fri, 30 Oct 2020 13:35:45 +0200 Subject: dt-bindings: net: add the DPAA2 MAC DTS definition Add a documentation entry for the DTS bindings needed and supported by the dpaa2-mac driver. Signed-off-by: Ioana Ciornei Reviewed-by: Rob Herring Signed-off-by: Shawn Guo --- .../bindings/net/fsl,qoriq-mc-dpmac.yaml | 60 ++++++++++++++++++++++ 1 file changed, 60 insertions(+) create mode 100644 Documentation/devicetree/bindings/net/fsl,qoriq-mc-dpmac.yaml (limited to 'Documentation/devicetree/bindings/net') diff --git a/Documentation/devicetree/bindings/net/fsl,qoriq-mc-dpmac.yaml b/Documentation/devicetree/bindings/net/fsl,qoriq-mc-dpmac.yaml new file mode 100644 index 000000000000..2159b7d1f537 --- /dev/null +++ b/Documentation/devicetree/bindings/net/fsl,qoriq-mc-dpmac.yaml @@ -0,0 +1,60 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/fsl,qoriq-mc-dpmac.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: DPAA2 MAC bindings + +maintainers: + - Ioana Ciornei + +description: + This binding represents the DPAA2 MAC objects found on the fsl-mc bus and + located under the 'dpmacs' node for the fsl-mc bus DTS node. + +allOf: + - $ref: "ethernet-controller.yaml#" + +properties: + compatible: + const: fsl,qoriq-mc-dpmac + + reg: + maxItems: 1 + description: The DPMAC number + + phy-handle: true + + phy-connection-type: true + + phy-mode: true + + pcs-handle: + $ref: /schemas/types.yaml#definitions/phandle + description: + A reference to a node representing a PCS PHY device found on + the internal MDIO bus. + + managed: true + +required: + - reg + +additionalProperties: false + +examples: + - | + dpmacs { + #address-cells = <1>; + #size-cells = <0>; + + ethernet@4 { + compatible = "fsl,qoriq-mc-dpmac"; + reg = <0x4>; + phy-handle = <&mdio1_phy6>; + phy-connection-type = "qsgmii"; + managed = "in-band-status"; + pcs-handle = <&pcs3_1>; + }; + }; -- cgit v1.2.3 From 39d3f3ffe79eb2ee2a93353113923eb837d92458 Mon Sep 17 00:00:00 2001 From: Ioana Ciornei Date: Fri, 30 Oct 2020 13:35:46 +0200 Subject: dt-bindings: net: add the 10gbase-r connection type Add 10gbase-r to the list of accepted PHY connection types between an Ethernet device and a physical PHY. This is available as a valid connection type since commit c114574ebfdf ("net: phy: add PHY_INTERFACE_MODE_10GBASER") Signed-off-by: Ioana Ciornei Acked-by: Rob Herring Signed-off-by: Shawn Guo --- Documentation/devicetree/bindings/net/ethernet-controller.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation/devicetree/bindings/net') diff --git a/Documentation/devicetree/bindings/net/ethernet-controller.yaml b/Documentation/devicetree/bindings/net/ethernet-controller.yaml index fdf709817218..cc93063a8f39 100644 --- a/Documentation/devicetree/bindings/net/ethernet-controller.yaml +++ b/Documentation/devicetree/bindings/net/ethernet-controller.yaml @@ -95,6 +95,7 @@ properties: # 10GBASE-KR, XFI, SFI - 10gbase-kr - usxgmii + - 10gbase-r phy-mode: $ref: "#/properties/phy-connection-type" -- cgit v1.2.3 From d5d29d527a27d1376a2d3773b055cb035c8e0b4f Mon Sep 17 00:00:00 2001 From: Kurt Kanzenbach Date: Tue, 3 Nov 2020 08:11:01 +0100 Subject: dt-bindings: net: dsa: Add documentation for Hellcreek switches Add basic documentation and example. Signed-off-by: Kurt Kanzenbach Reviewed-by: Rob Herring Reviewed-by: Florian Fainelli Signed-off-by: Jakub Kicinski --- .../bindings/net/dsa/hirschmann,hellcreek.yaml | 127 +++++++++++++++++++++ 1 file changed, 127 insertions(+) create mode 100644 Documentation/devicetree/bindings/net/dsa/hirschmann,hellcreek.yaml (limited to 'Documentation/devicetree/bindings/net') diff --git a/Documentation/devicetree/bindings/net/dsa/hirschmann,hellcreek.yaml b/Documentation/devicetree/bindings/net/dsa/hirschmann,hellcreek.yaml new file mode 100644 index 000000000000..5592f58fa6f0 --- /dev/null +++ b/Documentation/devicetree/bindings/net/dsa/hirschmann,hellcreek.yaml @@ -0,0 +1,127 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/dsa/hirschmann,hellcreek.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Hirschmann Hellcreek TSN Switch Device Tree Bindings + +allOf: + - $ref: dsa.yaml# + +maintainers: + - Andrew Lunn + - Florian Fainelli + - Vivien Didelot + - Kurt Kanzenbach + +description: + The Hellcreek TSN Switch IP is a 802.1Q Ethernet compliant switch. It supports + the Precision Time Protocol, Hardware Timestamping as well the Time Aware + Shaper. + +properties: + compatible: + items: + - const: hirschmann,hellcreek-de1soc-r1 + + reg: + description: + The physical base address and size of TSN and PTP memory base + minItems: 2 + maxItems: 2 + + reg-names: + items: + - const: tsn + - const: ptp + + leds: + type: object + properties: + '#address-cells': + const: 1 + '#size-cells': + const: 0 + + patternProperties: + "^led@[01]$": + type: object + description: Hellcreek leds + $ref: ../../leds/common.yaml# + + properties: + reg: + items: + - enum: [0, 1] + description: Led number + + label: true + + default-state: true + + required: + - reg + + additionalProperties: false + + additionalProperties: false + +required: + - compatible + - reg + - reg-names + - ethernet-ports + - leds + +unevaluatedProperties: false + +examples: + - | + switch0: switch@ff240000 { + compatible = "hirschmann,hellcreek-de1soc-r1"; + reg = <0xff240000 0x1000>, + <0xff250000 0x1000>; + reg-names = "tsn", "ptp"; + dsa,member = <0 0>; + + ethernet-ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + label = "cpu"; + ethernet = <&gmac0>; + }; + + port@2 { + reg = <2>; + label = "lan0"; + phy-handle = <&phy1>; + }; + + port@3 { + reg = <3>; + label = "lan1"; + phy-handle = <&phy2>; + }; + }; + + leds { + #address-cells = <1>; + #size-cells = <0>; + + led@0 { + reg = <0>; + label = "sync_good"; + default-state = "on"; + }; + + led@1 { + reg = <1>; + label = "is_gm"; + default-state = "off"; + }; + }; + }; -- cgit v1.2.3 From 77581df8639faf28ae52fea170e48cdf9870468a Mon Sep 17 00:00:00 2001 From: Sven Eckelmann Date: Thu, 15 Oct 2020 15:15:00 +0200 Subject: dt: bindings: add new dt entry for ath11k calibration variant The bus + qmi-chip-id + qmi-board-id is not enough to identify the correct board data file on IPQ6018 based devices. Multiple different boards share the same values. Only the original reference designs can currently be identified and loaded from the board-2.bin. But these will not result in the correct calibration data when combined with the pre-calibration data from the device. An additional "variant" information has to be provided to select the correct board data for a design which was modified by an ODM. This follows the same approach as ath10k. Signed-off-by: Sven Eckelmann Reviewed-by: Rob Herring Signed-off-by: Kalle Valo Link: https://lore.kernel.org/r/20201015131501.1939685-1-sven@narfation.org --- Documentation/devicetree/bindings/net/wireless/qcom,ath11k.yaml | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'Documentation/devicetree/bindings/net') diff --git a/Documentation/devicetree/bindings/net/wireless/qcom,ath11k.yaml b/Documentation/devicetree/bindings/net/wireless/qcom,ath11k.yaml index 4b365c9d9378..6af999191559 100644 --- a/Documentation/devicetree/bindings/net/wireless/qcom,ath11k.yaml +++ b/Documentation/devicetree/bindings/net/wireless/qcom,ath11k.yaml @@ -144,6 +144,12 @@ properties: * reg * reg-names + qcom,ath11k-calibration-variant: + $ref: /schemas/types.yaml#/definitions/string + description: + string to uniquely identify variant of the calibration data in the + board-2.bin for designs with colliding bus and device specific ids + required: - compatible - reg -- cgit v1.2.3 From 4e20b3a1b02eb64c10c2d2c8b7e026a679fdb1c8 Mon Sep 17 00:00:00 2001 From: Marc Kleine-Budde Date: Wed, 11 Nov 2020 09:08:28 +0100 Subject: dt-bindings: can: fsl,flexcan: add uint32 reference to clock-frequency property This patch adds the missing reference to the clock-frequency property. The driver uses a of_property_read_u32() to read the property to mark it as uint32. Fixes: e5ab9aa7e49b ("dt-bindings: can: flexcan: convert fsl,*flexcan bindings to yaml") Link: https://lore.kernel.org/r/20201119073357.2858925-1-mkl@pengutronix.de Cc: Joakim Zhang Cc: Oleksij Rempel Signed-off-by: Marc Kleine-Budde --- Documentation/devicetree/bindings/net/can/fsl,flexcan.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation/devicetree/bindings/net') diff --git a/Documentation/devicetree/bindings/net/can/fsl,flexcan.yaml b/Documentation/devicetree/bindings/net/can/fsl,flexcan.yaml index 13875eab2ed6..0133d777e78e 100644 --- a/Documentation/devicetree/bindings/net/can/fsl,flexcan.yaml +++ b/Documentation/devicetree/bindings/net/can/fsl,flexcan.yaml @@ -57,6 +57,7 @@ properties: - const: per clock-frequency: + $ref: /schemas/types.yaml#/definitions/uint32 description: | The oscillator frequency driving the flexcan device, filled in by the boot loader. This property should only be used the used operating system -- cgit v1.2.3 From 07b6b3e23cbd531977535b4d1bbef741d13af264 Mon Sep 17 00:00:00 2001 From: Joakim Zhang Date: Fri, 6 Nov 2020 18:56:23 +0800 Subject: dt-bindings: can: fsl,flexcan: fix fsl,clk-source property Correct fsl,clk-source example since flexcan driver uses "of_property_read_u8" to get this property. Fixes: 9d733992772d ("dt-bindings: can: flexcan: add PE clock source property to device tree") Signed-off-by: Joakim Zhang Link: https://lore.kernel.org/r/20201106105627.31061-2-qiangqing.zhang@nxp.com Signed-off-by: Marc Kleine-Budde --- Documentation/devicetree/bindings/net/can/fsl,flexcan.yaml | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'Documentation/devicetree/bindings/net') diff --git a/Documentation/devicetree/bindings/net/can/fsl,flexcan.yaml b/Documentation/devicetree/bindings/net/can/fsl,flexcan.yaml index 0133d777e78e..0d2df30f19db 100644 --- a/Documentation/devicetree/bindings/net/can/fsl,flexcan.yaml +++ b/Documentation/devicetree/bindings/net/can/fsl,flexcan.yaml @@ -100,7 +100,7 @@ properties: by default. 0: clock source 0 (oscillator clock) 1: clock source 1 (peripheral clock) - $ref: /schemas/types.yaml#/definitions/uint32 + $ref: /schemas/types.yaml#/definitions/uint8 default: 1 minimum: 0 maximum: 1 @@ -125,7 +125,7 @@ examples: interrupts = <48 0x2>; interrupt-parent = <&mpic>; clock-frequency = <200000000>; - fsl,clk-source = <0>; + fsl,clk-source = /bits/ 8 <0>; }; - | #include -- cgit v1.2.3 From 91d1d92a89e0865c5b0cf76605f2f1581f3f0904 Mon Sep 17 00:00:00 2001 From: Florian Fainelli Date: Mon, 9 Nov 2020 11:38:04 -0800 Subject: dt-bindings: net: dsa: Extend switch nodes pattern Upon discussion with Kurt, Rob and Vladimir it appears that we should be allowing ethernet-switch as a node name, update dsa.yaml accordingly. Reviewed-by: Vladimir Oltean Acked-by: Rob Herring Signed-off-by: Florian Fainelli --- Documentation/devicetree/bindings/net/dsa/dsa.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation/devicetree/bindings/net') diff --git a/Documentation/devicetree/bindings/net/dsa/dsa.yaml b/Documentation/devicetree/bindings/net/dsa/dsa.yaml index a765ceba28c6..5f8f5177938a 100644 --- a/Documentation/devicetree/bindings/net/dsa/dsa.yaml +++ b/Documentation/devicetree/bindings/net/dsa/dsa.yaml @@ -20,7 +20,7 @@ select: false properties: $nodename: - pattern: "^switch(@.*)?$" + pattern: "^(ethernet-)?switch(@.*)?$" dsa,member: minItems: 2 -- cgit v1.2.3 From d2868fc9335c7ec557fe6ec7e485a32bb610e9dc Mon Sep 17 00:00:00 2001 From: Florian Fainelli Date: Mon, 9 Nov 2020 19:12:26 -0800 Subject: dt-bindings: net: dsa: Document sfp and managed properties The 'sfp' and 'managed' properties are commonly used to describe Ethernet switch ports connecting to SFP/SFF cages, describe these two properties as valid that we inherit from ethernet-controller.yaml. Acked-by: Rob Herring Signed-off-by: Florian Fainelli --- Documentation/devicetree/bindings/net/dsa/dsa.yaml | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'Documentation/devicetree/bindings/net') diff --git a/Documentation/devicetree/bindings/net/dsa/dsa.yaml b/Documentation/devicetree/bindings/net/dsa/dsa.yaml index 5f8f5177938a..8e044631bcf7 100644 --- a/Documentation/devicetree/bindings/net/dsa/dsa.yaml +++ b/Documentation/devicetree/bindings/net/dsa/dsa.yaml @@ -78,6 +78,10 @@ patternProperties: mac-address: true + sfp: true + + managed: true + required: - reg -- cgit v1.2.3 From ab7eff24a1e993b649d0383ec831a7fab30fe369 Mon Sep 17 00:00:00 2001 From: Kurt Kanzenbach Date: Sat, 10 Oct 2020 18:46:26 +0200 Subject: dt-bindings: net: dsa: b53: Add YAML bindings Convert the b53 DSA device tree bindings to YAML in order to allow for automatic checking and such. Reviewed-by: Rob Herring Suggested-by: Florian Fainelli Signed-off-by: Kurt Kanzenbach --- Documentation/devicetree/bindings/net/dsa/b53.txt | 149 ------------ .../devicetree/bindings/net/dsa/brcm,b53.yaml | 249 +++++++++++++++++++++ MAINTAINERS | 2 +- 3 files changed, 250 insertions(+), 150 deletions(-) delete mode 100644 Documentation/devicetree/bindings/net/dsa/b53.txt create mode 100644 Documentation/devicetree/bindings/net/dsa/brcm,b53.yaml (limited to 'Documentation/devicetree/bindings/net') diff --git a/Documentation/devicetree/bindings/net/dsa/b53.txt b/Documentation/devicetree/bindings/net/dsa/b53.txt deleted file mode 100644 index f1487a751b1a..000000000000 --- a/Documentation/devicetree/bindings/net/dsa/b53.txt +++ /dev/null @@ -1,149 +0,0 @@ -Broadcom BCM53xx Ethernet switches -================================== - -Required properties: - -- compatible: For external switch chips, compatible string must be exactly one - of: "brcm,bcm5325" - "brcm,bcm53115" - "brcm,bcm53125" - "brcm,bcm53128" - "brcm,bcm5365" - "brcm,bcm5395" - "brcm,bcm5389" - "brcm,bcm5397" - "brcm,bcm5398" - - For the BCM11360 SoC, must be: - "brcm,bcm11360-srab" and the mandatory "brcm,cygnus-srab" string - - For the BCM5310x SoCs with an integrated switch, must be one of: - "brcm,bcm53010-srab" - "brcm,bcm53011-srab" - "brcm,bcm53012-srab" - "brcm,bcm53018-srab" - "brcm,bcm53019-srab" and the mandatory "brcm,bcm5301x-srab" string - - For the BCM5831X/BCM1140x SoCs with an integrated switch, must be one of: - "brcm,bcm11404-srab" - "brcm,bcm11407-srab" - "brcm,bcm11409-srab" - "brcm,bcm58310-srab" - "brcm,bcm58311-srab" - "brcm,bcm58313-srab" and the mandatory "brcm,omega-srab" string - - For the BCM585xx/586XX/88312 SoCs with an integrated switch, must be one of: - "brcm,bcm58522-srab" - "brcm,bcm58523-srab" - "brcm,bcm58525-srab" - "brcm,bcm58622-srab" - "brcm,bcm58623-srab" - "brcm,bcm58625-srab" - "brcm,bcm88312-srab" and the mandatory "brcm,nsp-srab string - - For the BCM63xx/33xx SoCs with an integrated switch, must be one of: - "brcm,bcm3384-switch" - "brcm,bcm6328-switch" - "brcm,bcm6368-switch" and the mandatory "brcm,bcm63xx-switch" - -Required properties for BCM585xx/586xx/88312 SoCs: - - - reg: a total of 3 register base addresses, the first one must be the - Switch Register Access block base, the second is the port 5/4 mux - configuration register and the third one is the SGMII configuration - and status register base address. - - - interrupts: a total of 13 interrupts must be specified, in the following - order: port 0-5, 7-8 link status change, then the integrated PHY interrupt, - then the timestamping interrupt and the sleep timer interrupts for ports - 5,7,8. - -Optional properties for BCM585xx/586xx/88312 SoCs: - - - reg-names: a total of 3 names matching the 3 base register address, must - be in the following order: - "srab" - "mux_config" - "sgmii_config" - - - interrupt-names: a total of 13 names matching the 13 interrupts specified - must be in the following order: - "link_state_p0" - "link_state_p1" - "link_state_p2" - "link_state_p3" - "link_state_p4" - "link_state_p5" - "link_state_p7" - "link_state_p8" - "phy" - "ts" - "imp_sleep_timer_p5" - "imp_sleep_timer_p7" - "imp_sleep_timer_p8" - -See Documentation/devicetree/bindings/net/dsa/dsa.txt for a list of additional -required and optional properties. - -Examples: - -Ethernet switch connected via MDIO to the host, CPU port wired to eth0: - - eth0: ethernet@10001000 { - compatible = "brcm,unimac"; - reg = <0x10001000 0x1000>; - - fixed-link { - speed = <1000>; - full-duplex; - }; - }; - - mdio0: mdio@10000000 { - compatible = "brcm,unimac-mdio"; - #address-cells = <1>; - #size-cells = <0>; - - switch0: ethernet-switch@1e { - compatible = "brcm,bcm53125"; - reg = <30>; - #address-cells = <1>; - #size-cells = <0>; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port0@0 { - reg = <0>; - label = "lan1"; - }; - - port1@1 { - reg = <1>; - label = "lan2"; - }; - - port5@5 { - reg = <5>; - label = "cable-modem"; - fixed-link { - speed = <1000>; - full-duplex; - }; - phy-mode = "rgmii-txid"; - }; - - port8@8 { - reg = <8>; - label = "cpu"; - fixed-link { - speed = <1000>; - full-duplex; - }; - phy-mode = "rgmii-txid"; - ethernet = <ð0>; - }; - }; - }; - }; diff --git a/Documentation/devicetree/bindings/net/dsa/brcm,b53.yaml b/Documentation/devicetree/bindings/net/dsa/brcm,b53.yaml new file mode 100644 index 000000000000..c3c938893ad9 --- /dev/null +++ b/Documentation/devicetree/bindings/net/dsa/brcm,b53.yaml @@ -0,0 +1,249 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/dsa/brcm,b53.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Broadcom BCM53xx Ethernet switches + +allOf: + - $ref: dsa.yaml# + +maintainers: + - Florian Fainelli + +description: + Broadcom BCM53xx Ethernet switches + +properties: + compatible: + oneOf: + - const: brcm,bcm5325 + - const: brcm,bcm53115 + - const: brcm,bcm53125 + - const: brcm,bcm53128 + - const: brcm,bcm5365 + - const: brcm,bcm5395 + - const: brcm,bcm5389 + - const: brcm,bcm5397 + - const: brcm,bcm5398 + - items: + - const: brcm,bcm11360-srab + - const: brcm,cygnus-srab + - items: + - enum: + - brcm,bcm53010-srab + - brcm,bcm53011-srab + - brcm,bcm53012-srab + - brcm,bcm53018-srab + - brcm,bcm53019-srab + - const: brcm,bcm5301x-srab + - items: + - enum: + - brcm,bcm11404-srab + - brcm,bcm11407-srab + - brcm,bcm11409-srab + - brcm,bcm58310-srab + - brcm,bcm58311-srab + - brcm,bcm58313-srab + - const: brcm,omega-srab + - items: + - enum: + - brcm,bcm58522-srab + - brcm,bcm58523-srab + - brcm,bcm58525-srab + - brcm,bcm58622-srab + - brcm,bcm58623-srab + - brcm,bcm58625-srab + - brcm,bcm88312-srab + - const: brcm,nsp-srab + - items: + - enum: + - brcm,bcm3384-switch + - brcm,bcm6328-switch + - brcm,bcm6368-switch + - const: brcm,bcm63xx-switch + +required: + - compatible + - reg + +# BCM585xx/586xx/88312 SoCs +if: + properties: + compatible: + contains: + enum: + - brcm,bcm58522-srab + - brcm,bcm58523-srab + - brcm,bcm58525-srab + - brcm,bcm58622-srab + - brcm,bcm58623-srab + - brcm,bcm58625-srab + - brcm,bcm88312-srab +then: + properties: + reg: + minItems: 3 + maxItems: 3 + reg-names: + items: + - const: srab + - const: mux_config + - const: sgmii_config + interrupts: + minItems: 13 + maxItems: 13 + interrupt-names: + items: + - const: link_state_p0 + - const: link_state_p1 + - const: link_state_p2 + - const: link_state_p3 + - const: link_state_p4 + - const: link_state_p5 + - const: link_state_p7 + - const: link_state_p8 + - const: phy + - const: ts + - const: imp_sleep_timer_p5 + - const: imp_sleep_timer_p7 + - const: imp_sleep_timer_p8 + required: + - interrupts +else: + properties: + reg: + maxItems: 1 + +unevaluatedProperties: false + +examples: + - | + mdio { + #address-cells = <1>; + #size-cells = <0>; + + ethernet-switch@1e { + compatible = "brcm,bcm53125"; + reg = <30>; + + ethernet-ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + label = "lan1"; + }; + + port@1 { + reg = <1>; + label = "lan2"; + }; + + port@5 { + reg = <5>; + label = "cable-modem"; + phy-mode = "rgmii-txid"; + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + + port@8 { + reg = <8>; + label = "cpu"; + phy-mode = "rgmii-txid"; + ethernet = <ð0>; + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + }; + }; + }; + - | + #include + #include + + axi { + #address-cells = <1>; + #size-cells = <1>; + + switch@36000 { + compatible = "brcm,bcm58623-srab", "brcm,nsp-srab"; + reg = <0x36000 0x1000>, + <0x3f308 0x8>, + <0x3f410 0xc>; + reg-names = "srab", "mux_config", "sgmii_config"; + interrupts = , + , + , + , + , + , + , + , + , + , + , + , + ; + interrupt-names = "link_state_p0", + "link_state_p1", + "link_state_p2", + "link_state_p3", + "link_state_p4", + "link_state_p5", + "link_state_p7", + "link_state_p8", + "phy", + "ts", + "imp_sleep_timer_p5", + "imp_sleep_timer_p7", + "imp_sleep_timer_p8"; + + ethernet-ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + label = "port0"; + reg = <0>; + }; + + port@1 { + label = "port1"; + reg = <1>; + }; + + port@2 { + label = "port2"; + reg = <2>; + }; + + port@3 { + label = "port3"; + reg = <3>; + }; + + port@4 { + label = "port4"; + reg = <4>; + }; + + port@8 { + ethernet = <&amac2>; + label = "cpu"; + reg = <8>; + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + }; + }; + }; diff --git a/MAINTAINERS b/MAINTAINERS index e73636b75f29..3786322d0bfb 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -3380,7 +3380,7 @@ M: Florian Fainelli L: netdev@vger.kernel.org L: openwrt-devel@lists.openwrt.org (subscribers-only) S: Supported -F: Documentation/devicetree/bindings/net/dsa/b53.txt +F: Documentation/devicetree/bindings/net/dsa/brcm,b53.yaml F: drivers/net/dsa/b53/* F: include/linux/platform_data/b53.h -- cgit v1.2.3 From 4f36d97786c6ab8fc0f266ef62295b5868b7935e Mon Sep 17 00:00:00 2001 From: Christian Eggers Date: Fri, 20 Nov 2020 12:21:04 +0100 Subject: dt-bindings: net: dsa: convert ksz bindings document to yaml Convert the bindings document for Microchip KSZ Series Ethernet switches from txt to yaml. Removed spi-cpha and spi-cpol flags is this should be handled by the device driver. Signed-off-by: Christian Eggers Signed-off-by: Jakub Kicinski --- Documentation/devicetree/bindings/net/dsa/ksz.txt | 125 ----------------- .../devicetree/bindings/net/dsa/microchip,ksz.yaml | 148 +++++++++++++++++++++ MAINTAINERS | 2 +- 3 files changed, 149 insertions(+), 126 deletions(-) delete mode 100644 Documentation/devicetree/bindings/net/dsa/ksz.txt create mode 100644 Documentation/devicetree/bindings/net/dsa/microchip,ksz.yaml (limited to 'Documentation/devicetree/bindings/net') diff --git a/Documentation/devicetree/bindings/net/dsa/ksz.txt b/Documentation/devicetree/bindings/net/dsa/ksz.txt deleted file mode 100644 index 95e91e84151c..000000000000 --- a/Documentation/devicetree/bindings/net/dsa/ksz.txt +++ /dev/null @@ -1,125 +0,0 @@ -Microchip KSZ Series Ethernet switches -================================== - -Required properties: - -- compatible: For external switch chips, compatible string must be exactly one - of the following: - - "microchip,ksz8765" - - "microchip,ksz8794" - - "microchip,ksz8795" - - "microchip,ksz9477" - - "microchip,ksz9897" - - "microchip,ksz9896" - - "microchip,ksz9567" - - "microchip,ksz8565" - - "microchip,ksz9893" - - "microchip,ksz9563" - - "microchip,ksz8563" - -Optional properties: - -- reset-gpios : Should be a gpio specifier for a reset line -- microchip,synclko-125 : Set if the output SYNCLKO frequency should be set to - 125MHz instead of 25MHz. - -See Documentation/devicetree/bindings/net/dsa/dsa.txt for a list of additional -required and optional properties. - -Examples: - -Ethernet switch connected via SPI to the host, CPU port wired to eth0: - - eth0: ethernet@10001000 { - fixed-link { - speed = <1000>; - full-duplex; - }; - }; - - spi1: spi@f8008000 { - pinctrl-0 = <&pinctrl_spi_ksz>; - cs-gpios = <&pioC 25 0>; - id = <1>; - - ksz9477: ksz9477@0 { - compatible = "microchip,ksz9477"; - reg = <0>; - - spi-max-frequency = <44000000>; - spi-cpha; - spi-cpol; - - ports { - #address-cells = <1>; - #size-cells = <0>; - port@0 { - reg = <0>; - label = "lan1"; - }; - port@1 { - reg = <1>; - label = "lan2"; - }; - port@2 { - reg = <2>; - label = "lan3"; - }; - port@3 { - reg = <3>; - label = "lan4"; - }; - port@4 { - reg = <4>; - label = "lan5"; - }; - port@5 { - reg = <5>; - label = "cpu"; - ethernet = <ð0>; - fixed-link { - speed = <1000>; - full-duplex; - }; - }; - }; - }; - ksz8565: ksz8565@0 { - compatible = "microchip,ksz8565"; - reg = <0>; - - spi-max-frequency = <44000000>; - spi-cpha; - spi-cpol; - - ports { - #address-cells = <1>; - #size-cells = <0>; - port@0 { - reg = <0>; - label = "lan1"; - }; - port@1 { - reg = <1>; - label = "lan2"; - }; - port@2 { - reg = <2>; - label = "lan3"; - }; - port@3 { - reg = <3>; - label = "lan4"; - }; - port@6 { - reg = <6>; - label = "cpu"; - ethernet = <ð0>; - fixed-link { - speed = <1000>; - full-duplex; - }; - }; - }; - }; - }; diff --git a/Documentation/devicetree/bindings/net/dsa/microchip,ksz.yaml b/Documentation/devicetree/bindings/net/dsa/microchip,ksz.yaml new file mode 100644 index 000000000000..9f7d131bbcef --- /dev/null +++ b/Documentation/devicetree/bindings/net/dsa/microchip,ksz.yaml @@ -0,0 +1,148 @@ +# SPDX-License-Identifier: GPL-2.0-only +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/dsa/microchip,ksz.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Microchip KSZ Series Ethernet switches + +maintainers: + - Marek Vasut + - Woojung Huh + +allOf: + - $ref: dsa.yaml# + +properties: + # See Documentation/devicetree/bindings/net/dsa/dsa.yaml for a list of additional + # required and optional properties. + compatible: + enum: + - microchip,ksz8765 + - microchip,ksz8794 + - microchip,ksz8795 + - microchip,ksz9477 + - microchip,ksz9897 + - microchip,ksz9896 + - microchip,ksz9567 + - microchip,ksz8565 + - microchip,ksz9893 + - microchip,ksz9563 + - microchip,ksz8563 + + reset-gpios: + description: + Should be a gpio specifier for a reset line. + maxItems: 1 + + microchip,synclko-125: + $ref: /schemas/types.yaml#/definitions/flag + description: + Set if the output SYNCLKO frequency should be set to 125MHz instead of 25MHz. + +required: + - compatible + - reg + +unevaluatedProperties: false + +examples: + - | + #include + + // Ethernet switch connected via SPI to the host, CPU port wired to eth0: + eth0 { + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + + spi0 { + #address-cells = <1>; + #size-cells = <0>; + + pinctrl-0 = <&pinctrl_spi_ksz>; + cs-gpios = <&pioC 25 0>; + id = <1>; + + ksz9477: switch@0 { + compatible = "microchip,ksz9477"; + reg = <0>; + reset-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>; + + spi-max-frequency = <44000000>; + + ethernet-ports { + #address-cells = <1>; + #size-cells = <0>; + port@0 { + reg = <0>; + label = "lan1"; + }; + port@1 { + reg = <1>; + label = "lan2"; + }; + port@2 { + reg = <2>; + label = "lan3"; + }; + port@3 { + reg = <3>; + label = "lan4"; + }; + port@4 { + reg = <4>; + label = "lan5"; + }; + port@5 { + reg = <5>; + label = "cpu"; + ethernet = <ð0>; + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + }; + }; + + ksz8565: switch@1 { + compatible = "microchip,ksz8565"; + reg = <1>; + + spi-max-frequency = <44000000>; + + ethernet-ports { + #address-cells = <1>; + #size-cells = <0>; + port@0 { + reg = <0>; + label = "lan1"; + }; + port@1 { + reg = <1>; + label = "lan2"; + }; + port@2 { + reg = <2>; + label = "lan3"; + }; + port@3 { + reg = <3>; + label = "lan4"; + }; + port@6 { + reg = <6>; + label = "cpu"; + ethernet = <ð0>; + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + }; + }; + }; +... diff --git a/MAINTAINERS b/MAINTAINERS index d36bee3f1f04..8545e72c495c 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -11487,7 +11487,7 @@ M: Woojung Huh M: Microchip Linux Driver Support L: netdev@vger.kernel.org S: Maintained -F: Documentation/devicetree/bindings/net/dsa/ksz.txt +F: Documentation/devicetree/bindings/net/dsa/microchip,ksz.yaml F: drivers/net/dsa/microchip/* F: include/linux/platform_data/microchip-ksz.h F: net/dsa/tag_ksz.c -- cgit v1.2.3 From 4d521943f76bd0d1e68ea5e02df7aadd30b2838a Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Mon, 26 Oct 2020 16:36:20 +0100 Subject: dt-bindings: net: correct interrupt flags in examples GPIO_ACTIVE_x flags are not correct in the context of interrupt flags. These are simple defines so they could be used in DTS but they will not have the same meaning: 1. GPIO_ACTIVE_HIGH = 0 = IRQ_TYPE_NONE 2. GPIO_ACTIVE_LOW = 1 = IRQ_TYPE_EDGE_RISING Correct the interrupt flags, assuming the author of the code wanted same logical behavior behind the name "ACTIVE_xxx", this is: ACTIVE_LOW => IRQ_TYPE_LEVEL_LOW ACTIVE_HIGH => IRQ_TYPE_LEVEL_HIGH Fixes: a1a8b4594f8d ("NFC: pn544: i2c: Add DTS Documentation") Fixes: 6be88670fc59 ("NFC: nxp-nci_i2c: Add I2C support to NXP NCI driver") Fixes: e3b329221567 ("dt-bindings: can: tcan4x5x: Update binding to use interrupt property") Signed-off-by: Krzysztof Kozlowski Acked-by: Rob Herring Acked-by: Marc Kleine-Budde # for tcan4x5x.txt Link: https://lore.kernel.org/r/20201026153620.89268-1-krzk@kernel.org Signed-off-by: Jakub Kicinski --- Documentation/devicetree/bindings/net/can/tcan4x5x.txt | 2 +- Documentation/devicetree/bindings/net/nfc/nxp-nci.txt | 2 +- Documentation/devicetree/bindings/net/nfc/pn544.txt | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) (limited to 'Documentation/devicetree/bindings/net') diff --git a/Documentation/devicetree/bindings/net/can/tcan4x5x.txt b/Documentation/devicetree/bindings/net/can/tcan4x5x.txt index 3613c2c8f75d..0968b40aef1e 100644 --- a/Documentation/devicetree/bindings/net/can/tcan4x5x.txt +++ b/Documentation/devicetree/bindings/net/can/tcan4x5x.txt @@ -33,7 +33,7 @@ tcan4x5x: tcan4x5x@0 { spi-max-frequency = <10000000>; bosch,mram-cfg = <0x0 0 0 32 0 0 1 1>; interrupt-parent = <&gpio1>; - interrupts = <14 GPIO_ACTIVE_LOW>; + interrupts = <14 IRQ_TYPE_LEVEL_LOW>; device-state-gpios = <&gpio3 21 GPIO_ACTIVE_HIGH>; device-wake-gpios = <&gpio1 15 GPIO_ACTIVE_HIGH>; reset-gpios = <&gpio1 27 GPIO_ACTIVE_HIGH>; diff --git a/Documentation/devicetree/bindings/net/nfc/nxp-nci.txt b/Documentation/devicetree/bindings/net/nfc/nxp-nci.txt index cfaf88998918..9e4dc510a40a 100644 --- a/Documentation/devicetree/bindings/net/nfc/nxp-nci.txt +++ b/Documentation/devicetree/bindings/net/nfc/nxp-nci.txt @@ -25,7 +25,7 @@ Example (for ARM-based BeagleBone with NPC100 NFC controller on I2C2): clock-frequency = <100000>; interrupt-parent = <&gpio1>; - interrupts = <29 GPIO_ACTIVE_HIGH>; + interrupts = <29 IRQ_TYPE_LEVEL_HIGH>; enable-gpios = <&gpio0 30 GPIO_ACTIVE_HIGH>; firmware-gpios = <&gpio0 31 GPIO_ACTIVE_HIGH>; diff --git a/Documentation/devicetree/bindings/net/nfc/pn544.txt b/Documentation/devicetree/bindings/net/nfc/pn544.txt index 92f399ec22b8..2bd82562ce8e 100644 --- a/Documentation/devicetree/bindings/net/nfc/pn544.txt +++ b/Documentation/devicetree/bindings/net/nfc/pn544.txt @@ -25,7 +25,7 @@ Example (for ARM-based BeagleBone with PN544 on I2C2): clock-frequency = <400000>; interrupt-parent = <&gpio1>; - interrupts = <17 GPIO_ACTIVE_HIGH>; + interrupts = <17 IRQ_TYPE_LEVEL_HIGH>; enable-gpios = <&gpio3 21 GPIO_ACTIVE_HIGH>; firmware-gpios = <&gpio3 19 GPIO_ACTIVE_HIGH>; -- cgit v1.2.3 From 59f96cf6ba88c64278c35d11957a36faaca33de7 Mon Sep 17 00:00:00 2001 From: Frieder Schrempf Date: Tue, 1 Dec 2020 12:39:09 +0100 Subject: NFC: nxp-nci: Make firmware GPIO pin optional There are other NXP NCI compatible NFC controllers such as the PN7150 that use an integrated firmware and therefore do not have a GPIO to select firmware downloading mode. To support this kind of controller, let's make the firmware GPIO optional. Signed-off-by: Frieder Schrempf Reviewed-by: Andy Shevchenko Link: https://lore.kernel.org/r/20201201113921.6572-1-frieder.schrempf@kontron.de Signed-off-by: Jakub Kicinski --- Documentation/devicetree/bindings/net/nfc/nxp-nci.txt | 2 +- drivers/nfc/nxp-nci/i2c.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'Documentation/devicetree/bindings/net') diff --git a/Documentation/devicetree/bindings/net/nfc/nxp-nci.txt b/Documentation/devicetree/bindings/net/nfc/nxp-nci.txt index cfaf88998918..cb2385c277d0 100644 --- a/Documentation/devicetree/bindings/net/nfc/nxp-nci.txt +++ b/Documentation/devicetree/bindings/net/nfc/nxp-nci.txt @@ -6,11 +6,11 @@ Required properties: - reg: address on the bus - interrupts: GPIO interrupt to which the chip is connected - enable-gpios: Output GPIO pin used for enabling/disabling the chip -- firmware-gpios: Output GPIO pin used to enter firmware download mode Optional SoC Specific Properties: - pinctrl-names: Contains only one value - "default". - pintctrl-0: Specifies the pin control groups used for this controller. +- firmware-gpios: Output GPIO pin used to enter firmware download mode Example (for ARM-based BeagleBone with NPC100 NFC controller on I2C2): diff --git a/drivers/nfc/nxp-nci/i2c.c b/drivers/nfc/nxp-nci/i2c.c index 9f60e4dc5a90..7e451c10985d 100644 --- a/drivers/nfc/nxp-nci/i2c.c +++ b/drivers/nfc/nxp-nci/i2c.c @@ -286,7 +286,7 @@ static int nxp_nci_i2c_probe(struct i2c_client *client, return PTR_ERR(phy->gpiod_en); } - phy->gpiod_fw = devm_gpiod_get(dev, "firmware", GPIOD_OUT_LOW); + phy->gpiod_fw = devm_gpiod_get_optional(dev, "firmware", GPIOD_OUT_LOW); if (IS_ERR(phy->gpiod_fw)) { nfc_err(dev, "Failed to get FW gpio\n"); return PTR_ERR(phy->gpiod_fw); -- cgit v1.2.3 From 36d076201bd467d6bd22ba14e56e457d55e32be7 Mon Sep 17 00:00:00 2001 From: Bongsu Jeon Date: Wed, 2 Dec 2020 20:47:38 +0900 Subject: dt-bindings: net: nfc: s3fwrn5: Support a UART interface Since S3FWRN82 NFC Chip, The UART interface can be used. S3FWRN82 supports I2C and UART interface. Signed-off-by: Bongsu Jeon Reviewed-by: Krzysztof Kozlowski Signed-off-by: Jakub Kicinski --- .../bindings/net/nfc/samsung,s3fwrn5.yaml | 31 +++++++++++++++++++--- 1 file changed, 28 insertions(+), 3 deletions(-) (limited to 'Documentation/devicetree/bindings/net') diff --git a/Documentation/devicetree/bindings/net/nfc/samsung,s3fwrn5.yaml b/Documentation/devicetree/bindings/net/nfc/samsung,s3fwrn5.yaml index cb0b8a560282..ca3904bf90e0 100644 --- a/Documentation/devicetree/bindings/net/nfc/samsung,s3fwrn5.yaml +++ b/Documentation/devicetree/bindings/net/nfc/samsung,s3fwrn5.yaml @@ -12,7 +12,9 @@ maintainers: properties: compatible: - const: samsung,s3fwrn5-i2c + enum: + - samsung,s3fwrn5-i2c + - samsung,s3fwrn82 en-gpios: maxItems: 1 @@ -47,10 +49,19 @@ additionalProperties: false required: - compatible - en-gpios - - interrupts - - reg - wake-gpios +allOf: + - if: + properties: + compatible: + contains: + const: samsung,s3fwrn5-i2c + then: + required: + - interrupts + - reg + examples: - | #include @@ -71,3 +82,17 @@ examples: wake-gpios = <&gpj0 2 GPIO_ACTIVE_HIGH>; }; }; + # UART example on Raspberry Pi + - | + uart0 { + status = "okay"; + + nfc { + compatible = "samsung,s3fwrn82"; + + en-gpios = <&gpio 20 GPIO_ACTIVE_HIGH>; + wake-gpios = <&gpio 16 GPIO_ACTIVE_HIGH>; + + status = "okay"; + }; + }; -- cgit v1.2.3 From 20b3ba6159ec538103aa33957ba88c2ded112032 Mon Sep 17 00:00:00 2001 From: Claudiu Beznea Date: Wed, 9 Dec 2020 15:03:36 +0200 Subject: dt-bindings: add documentation for sama7g5 ethernet interface Add documentation for SAMA7G5 ethernet interface. Signed-off-by: Claudiu Beznea Reviewed-by: Andrew Lunn Signed-off-by: David S. Miller --- Documentation/devicetree/bindings/net/macb.txt | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation/devicetree/bindings/net') diff --git a/Documentation/devicetree/bindings/net/macb.txt b/Documentation/devicetree/bindings/net/macb.txt index 0b61a90f1592..26543a4e15d5 100644 --- a/Documentation/devicetree/bindings/net/macb.txt +++ b/Documentation/devicetree/bindings/net/macb.txt @@ -16,6 +16,7 @@ Required properties: Use "cdns,zynq-gem" Xilinx Zynq-7xxx SoC. Use "cdns,zynqmp-gem" for Zynq Ultrascale+ MPSoC. Use "sifive,fu540-c000-gem" for SiFive FU540-C000 SoC. + Use "microchip,sama7g5-emac" for Microchip SAMA7G5 ethernet interface. Or the generic form: "cdns,emac". - reg: Address and length of the register set for the device For "sifive,fu540-c000-gem", second range is required to specify the -- cgit v1.2.3 From f5f30cf8ef18be488c9ca1c9c2bd9c32f62c2241 Mon Sep 17 00:00:00 2001 From: Claudiu Beznea Date: Wed, 9 Dec 2020 15:03:37 +0200 Subject: dt-bindings: add documentation for sama7g5 gigabit ethernet interface Add documentation for SAMA7G5 gigabit ethernet interface. Signed-off-by: Claudiu Beznea Reviewed-by: Andrew Lunn Signed-off-by: David S. Miller --- Documentation/devicetree/bindings/net/macb.txt | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation/devicetree/bindings/net') diff --git a/Documentation/devicetree/bindings/net/macb.txt b/Documentation/devicetree/bindings/net/macb.txt index 26543a4e15d5..e08c5a9d53da 100644 --- a/Documentation/devicetree/bindings/net/macb.txt +++ b/Documentation/devicetree/bindings/net/macb.txt @@ -17,6 +17,7 @@ Required properties: Use "cdns,zynqmp-gem" for Zynq Ultrascale+ MPSoC. Use "sifive,fu540-c000-gem" for SiFive FU540-C000 SoC. Use "microchip,sama7g5-emac" for Microchip SAMA7G5 ethernet interface. + Use "microchip,sama7g5-gem" for Microchip SAMA7G5 gigabit ethernet interface. Or the generic form: "cdns,emac". - reg: Address and length of the register set for the device For "sifive,fu540-c000-gem", second range is required to specify the -- cgit v1.2.3 From b783ff46ef4c80c666ed2186f471b7173db63976 Mon Sep 17 00:00:00 2001 From: Bongsu Jeon Date: Tue, 8 Dec 2020 23:10:11 +0900 Subject: dt-bindings: net: nfc: s3fwrn5: Change I2C interrupt trigger type Change interrupt trigger from IRQ_TYPE_LEVEL_HIGH to IRQ_TYPE_EDGE_RISING for stable NFC I2C interrupt handling. Samsung's NFC Firmware sends an i2c frame as below. 1. NFC Firmware sets the GPIO(interrupt pin) high when there is an i2c frame to send. 2. If the CPU's I2C master has received the i2c frame, NFC F/W sets the GPIO low. NFC driver's i2c interrupt handler would be called in the abnormal case as the NFC FW task of number 2 is delayed because of other high priority tasks. In that case, NFC driver will try to receive the i2c frame but there isn't any i2c frame to send in NFC. It would cause an I2C communication problem. This case would hardly happen. But, I changed the interrupt as a defense code. If Driver uses the TRIGGER_RISING instead of the LEVEL trigger, there would be no problem even if the NFC FW task is delayed. Signed-off-by: Bongsu Jeon Signed-off-by: David S. Miller --- Documentation/devicetree/bindings/net/nfc/samsung,s3fwrn5.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation/devicetree/bindings/net') diff --git a/Documentation/devicetree/bindings/net/nfc/samsung,s3fwrn5.yaml b/Documentation/devicetree/bindings/net/nfc/samsung,s3fwrn5.yaml index ca3904bf90e0..477066e2b821 100644 --- a/Documentation/devicetree/bindings/net/nfc/samsung,s3fwrn5.yaml +++ b/Documentation/devicetree/bindings/net/nfc/samsung,s3fwrn5.yaml @@ -76,7 +76,7 @@ examples: reg = <0x27>; interrupt-parent = <&gpa1>; - interrupts = <3 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <3 IRQ_TYPE_EDGE_RISING>; en-gpios = <&gpf1 4 GPIO_ACTIVE_HIGH>; wake-gpios = <&gpj0 2 GPIO_ACTIVE_HIGH>; -- cgit v1.2.3 From a217d8711da5c87fd2862fc36759b6fafa1c4905 Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Thu, 10 Dec 2020 14:03:15 -0600 Subject: dt-bindings: Remove PicoXcell bindings PicoXcell has had nothing but treewide cleanups for at least the last 8 years and no signs of activity. The most recent activity is a yocto vendor kernel based on v3.0 in 2015. Cc: linux-crypto@vger.kernel.org Acked-by: Jamie Iles Link: https://lore.kernel.org/r/20201210200315.2965567-5-robh@kernel.org Signed-off-by: Rob Herring --- .../devicetree/bindings/arm/picoxcell.txt | 24 ---------------------- .../devicetree/bindings/crypto/picochip-spacc.txt | 21 ------------------- Documentation/devicetree/bindings/net/macb.txt | 2 -- .../bindings/timer/snps,dw-apb-timer.yaml | 7 ------- 4 files changed, 54 deletions(-) delete mode 100644 Documentation/devicetree/bindings/arm/picoxcell.txt delete mode 100644 Documentation/devicetree/bindings/crypto/picochip-spacc.txt (limited to 'Documentation/devicetree/bindings/net') diff --git a/Documentation/devicetree/bindings/arm/picoxcell.txt b/Documentation/devicetree/bindings/arm/picoxcell.txt deleted file mode 100644 index e75c0ef51e69..000000000000 --- a/Documentation/devicetree/bindings/arm/picoxcell.txt +++ /dev/null @@ -1,24 +0,0 @@ -Picochip picoXcell device tree bindings. -======================================== - -Required root node properties: - - compatible: - - "picochip,pc7302-pc3x3" : PC7302 development board with PC3X3 device. - - "picochip,pc7302-pc3x2" : PC7302 development board with PC3X2 device. - - "picochip,pc3x3" : picoXcell PC3X3 device based board. - - "picochip,pc3x2" : picoXcell PC3X2 device based board. - -Timers required properties: - - compatible = "picochip,pc3x2-timer" - - interrupts : The single IRQ line for the timer. - - clock-freq : The frequency in HZ of the timer. - - reg : The register bank for the timer. - -Note: two timers are required - one for the scheduler clock and one for the -event tick/NOHZ. - -VIC required properties: - - compatible = "arm,pl192-vic". - - interrupt-controller. - - reg : The register bank for the device. - - #interrupt-cells : Must be 1. diff --git a/Documentation/devicetree/bindings/crypto/picochip-spacc.txt b/Documentation/devicetree/bindings/crypto/picochip-spacc.txt deleted file mode 100644 index df1151f87745..000000000000 --- a/Documentation/devicetree/bindings/crypto/picochip-spacc.txt +++ /dev/null @@ -1,21 +0,0 @@ -Picochip picoXcell SPAcc (Security Protocol Accelerator) bindings - -Picochip picoXcell devices contain crypto offload engines that may be used for -IPSEC and femtocell layer 2 ciphering. - -Required properties: - - compatible : "picochip,spacc-ipsec" for the IPSEC offload engine - "picochip,spacc-l2" for the femtocell layer 2 ciphering engine. - - reg : Offset and length of the register set for this device - - interrupts : The interrupt line from the SPAcc. - - ref-clock : The input clock that drives the SPAcc. - -Example SPAcc node: - -spacc@10000 { - compatible = "picochip,spacc-ipsec"; - reg = <0x100000 0x10000>; - interrupt-parent = <&vic0>; - interrupts = <24>; - ref-clock = <&ipsec_clk>, "ref"; -}; diff --git a/Documentation/devicetree/bindings/net/macb.txt b/Documentation/devicetree/bindings/net/macb.txt index 0b61a90f1592..46dc52c0739a 100644 --- a/Documentation/devicetree/bindings/net/macb.txt +++ b/Documentation/devicetree/bindings/net/macb.txt @@ -7,8 +7,6 @@ Required properties: Use "cdns,sam9x60-macb" for Microchip sam9x60 SoC. Use "cdns,np4-macb" for NP4 SoC devices. Use "cdns,at32ap7000-macb" for other 10/100 usage or use the generic form: "cdns,macb". - Use "cdns,pc302-gem" for Picochip picoXcell pc302 and later devices based on - the Cadence GEM, or the generic form: "cdns,gem". Use "atmel,sama5d2-gem" for the GEM IP (10/100) available on Atmel sama5d2 SoCs. Use "atmel,sama5d3-macb" for the 10/100Mbit IP available on Atmel sama5d3 SoCs. Use "atmel,sama5d3-gem" for the Gigabit IP available on Atmel sama5d3 SoCs. diff --git a/Documentation/devicetree/bindings/timer/snps,dw-apb-timer.yaml b/Documentation/devicetree/bindings/timer/snps,dw-apb-timer.yaml index 2fc617377e2c..d65faf289a83 100644 --- a/Documentation/devicetree/bindings/timer/snps,dw-apb-timer.yaml +++ b/Documentation/devicetree/bindings/timer/snps,dw-apb-timer.yaml @@ -38,13 +38,6 @@ properties: clock-frequency: true - clock-freq: - $ref: "/schemas/types.yaml#/definitions/uint32" - description: | - Has the same meaning as the 'clock-frequency' property - timer clock - frequency in HZ, but is defined only for the backwards compatibility - with the picoxcell platform. - additionalProperties: false required: -- cgit v1.2.3