From f2acae69a2060b6b1029b9923dbef5e98a8a0ba7 Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Wed, 25 Sep 2013 15:44:39 -0700 Subject: ARM: OMAP2+: Always build in board-generic We are moving to device tree based booting, so board-generic should always be built. Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/Kconfig | 10 +++------- 1 file changed, 3 insertions(+), 7 deletions(-) diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig index b5fb5f7992df..f6a1db112168 100644 --- a/arch/arm/mach-omap2/Kconfig +++ b/arch/arm/mach-omap2/Kconfig @@ -94,6 +94,7 @@ config ARCH_OMAP2PLUS select GENERIC_CLOCKEVENTS select GENERIC_IRQ_CHIP select HAVE_CLK + select MACH_OMAP_GENERIC select OMAP_DM_TIMER select PINCTRL select PROC_DEVICETREE if PROC_FS @@ -187,16 +188,11 @@ config OMAP_PACKAGE_CUS config OMAP_PACKAGE_CBP bool -comment "OMAP Board Type" +comment "OMAP Legacy Platform Data Board Type" depends on ARCH_OMAP2PLUS config MACH_OMAP_GENERIC - bool "Generic OMAP2+ board" - depends on ARCH_OMAP2PLUS - default y - help - Support for generic TI OMAP2+ boards using Flattened Device Tree. - More information at Documentation/devicetree + bool config MACH_OMAP2_TUSB6010 bool -- cgit v1.2.3 From 6a08e1e6f7fafa2fa5fb6a129c4c8d9c29f11b62 Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Wed, 25 Sep 2013 15:44:39 -0700 Subject: ARM: OMAP2+: Add quirk support for legacy platform data init We want to drop the board-*.c files but keep things working. Let's make it a bit easier to support legacy platform data init with quirks. This also keeps board-generic.c clean from board specific hacks. For now, the quirks table is empty, that is populated in the later patches. Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/Makefile | 2 +- arch/arm/mach-omap2/board-generic.c | 1 + arch/arm/mach-omap2/common.h | 2 ++ arch/arm/mach-omap2/pdata-quirks.c | 39 +++++++++++++++++++++++++++++++++++++ 4 files changed, 43 insertions(+), 1 deletion(-) create mode 100644 arch/arm/mach-omap2/pdata-quirks.c diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile index afb457c3135b..f8d4a1b83864 100644 --- a/arch/arm/mach-omap2/Makefile +++ b/arch/arm/mach-omap2/Makefile @@ -233,7 +233,7 @@ obj-y += drm.o endif # Specific board support -obj-$(CONFIG_MACH_OMAP_GENERIC) += board-generic.o +obj-$(CONFIG_MACH_OMAP_GENERIC) += board-generic.o pdata-quirks.o obj-$(CONFIG_MACH_OMAP_H4) += board-h4.o obj-$(CONFIG_MACH_OMAP_2430SDP) += board-2430sdp.o obj-$(CONFIG_MACH_OMAP3_BEAGLE) += board-omap3beagle.o diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c index 39c78387ddec..022b0df94e0d 100644 --- a/arch/arm/mach-omap2/board-generic.c +++ b/arch/arm/mach-omap2/board-generic.c @@ -56,6 +56,7 @@ static void __init omap_generic_init(void) omap_sdrc_init(NULL, NULL); of_platform_populate(NULL, omap_dt_match_table, NULL, NULL); + pdata_quirks_init(); /* * HACK: call display setup code for selected boards to enable omapdss. diff --git a/arch/arm/mach-omap2/common.h b/arch/arm/mach-omap2/common.h index 4a5684b96492..fd059e02574d 100644 --- a/arch/arm/mach-omap2/common.h +++ b/arch/arm/mach-omap2/common.h @@ -288,6 +288,8 @@ static inline void omap4_cpu_resume(void) #endif +void pdata_quirks_init(void); + struct omap_sdrc_params; extern void omap_sdrc_init(struct omap_sdrc_params *sdrc_cs0, struct omap_sdrc_params *sdrc_cs1); diff --git a/arch/arm/mach-omap2/pdata-quirks.c b/arch/arm/mach-omap2/pdata-quirks.c new file mode 100644 index 000000000000..e6051998f929 --- /dev/null +++ b/arch/arm/mach-omap2/pdata-quirks.c @@ -0,0 +1,39 @@ +/* + * Legacy platform_data quirks + * + * Copyright (C) 2013 Texas Instruments + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#include +#include +#include + +#include "common.h" +#include "common-board-devices.h" +#include "dss-common.h" + +struct pdata_init { + const char *compatible; + void (*fn)(void); +}; + +static struct pdata_init pdata_quirks[] __initdata = { + { /* sentinel */ }, +}; + +void __init pdata_quirks_init(void) +{ + struct pdata_init *quirks = pdata_quirks; + + while (quirks->compatible) { + if (of_machine_is_compatible(quirks->compatible)) { + if (quirks->fn) + quirks->fn(); + break; + } + quirks++; + } +} -- cgit v1.2.3 From 3e7a318530c3d536972e9a2bb44e0ce0c16eaa4e Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Wed, 25 Sep 2013 15:44:39 -0700 Subject: ARM: OMAP2+: Use pdata quirk support for board-generic.c Let's use platform data quirk support for board-generic.c. This removes all board specific hacks out of board-generic.c. Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/board-generic.c | 32 ----------------------------- arch/arm/mach-omap2/pdata-quirks.c | 41 +++++++++++++++++++++++++++++++++++++ 2 files changed, 41 insertions(+), 32 deletions(-) diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c index 022b0df94e0d..a66575f33973 100644 --- a/arch/arm/mach-omap2/board-generic.c +++ b/arch/arm/mach-omap2/board-generic.c @@ -15,13 +15,10 @@ #include #include #include -#include #include #include "common.h" -#include "common-board-devices.h" -#include "dss-common.h" #if !(defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)) #define intc_of_init NULL @@ -36,41 +33,12 @@ static struct of_device_id omap_dt_match_table[] __initdata = { { } }; -/* - * Create alias for USB host PHY clock. - * Remove this when clock phandle can be provided via DT - */ -static void __init legacy_init_ehci_clk(char *clkname) -{ - int ret; - - ret = clk_add_alias("main_clk", NULL, clkname, NULL); - if (ret) { - pr_err("%s:Failed to add main_clk alias to %s :%d\n", - __func__, clkname, ret); - } -} - static void __init omap_generic_init(void) { omap_sdrc_init(NULL, NULL); of_platform_populate(NULL, omap_dt_match_table, NULL, NULL); pdata_quirks_init(); - - /* - * HACK: call display setup code for selected boards to enable omapdss. - * This will be removed when omapdss supports DT. - */ - if (of_machine_is_compatible("ti,omap4-panda")) { - omap4_panda_display_init_of(); - legacy_init_ehci_clk("auxclk3_ck"); - - } - else if (of_machine_is_compatible("ti,omap4-sdp")) - omap_4430sdp_display_init_of(); - else if (of_machine_is_compatible("ti,omap5-uevm")) - legacy_init_ehci_clk("auxclk1_ck"); } #ifdef CONFIG_SOC_OMAP2420 diff --git a/arch/arm/mach-omap2/pdata-quirks.c b/arch/arm/mach-omap2/pdata-quirks.c index e6051998f929..648d9573aaea 100644 --- a/arch/arm/mach-omap2/pdata-quirks.c +++ b/arch/arm/mach-omap2/pdata-quirks.c @@ -20,7 +20,48 @@ struct pdata_init { void (*fn)(void); }; +/* + * Create alias for USB host PHY clock. + * Remove this when clock phandle can be provided via DT + */ +static void __init __used legacy_init_ehci_clk(char *clkname) +{ + int ret; + + ret = clk_add_alias("main_clk", NULL, clkname, NULL); + if (ret) + pr_err("%s:Failed to add main_clk alias to %s :%d\n", + __func__, clkname, ret); +} + +#ifdef CONFIG_ARCH_OMAP4 +static void __init omap4_sdp_legacy_init(void) +{ + omap_4430sdp_display_init_of(); +} + +static void __init omap4_panda_legacy_init(void) +{ + omap4_panda_display_init_of(); + legacy_init_ehci_clk("auxclk3_ck"); +} +#endif + +#ifdef CONFIG_SOC_OMAP5 +static void __init omap5_uevm_legacy_init(void) +{ + legacy_init_ehci_clk("auxclk1_ck"); +} +#endif + static struct pdata_init pdata_quirks[] __initdata = { +#ifdef CONFIG_ARCH_OMAP4 + { "ti,omap4-sdp", omap4_sdp_legacy_init, }, + { "ti,omap4-panda", omap4_panda_legacy_init, }, +#endif +#ifdef CONFIG_SOC_OMAP5 + { "ti,omap5-uevm", omap5_uevm_legacy_init, }, +#endif { /* sentinel */ }, }; -- cgit v1.2.3 From 5f0a2c6976d0bfaeda1eaba1837f28e5a3146a69 Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Wed, 25 Sep 2013 15:44:40 -0700 Subject: ARM: OMAP2+: Use pdata quirks for wl12xx legacy init Let's use the platform data quirk support for wl12xx and move the board specific code out of devices.c. Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/devices.c | 38 -------------------------------------- arch/arm/mach-omap2/pdata-quirks.c | 33 +++++++++++++++++++++++++++++++++ 2 files changed, 33 insertions(+), 38 deletions(-) diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c index 5c5315ba129b..5336c75926cd 100644 --- a/arch/arm/mach-omap2/devices.c +++ b/arch/arm/mach-omap2/devices.c @@ -19,7 +19,6 @@ #include #include #include -#include #include #include @@ -475,40 +474,6 @@ static void omap_init_vout(void) static inline void omap_init_vout(void) {} #endif -#if IS_ENABLED(CONFIG_WL12XX) - -static struct wl12xx_platform_data wl12xx __initdata; - -void __init omap_init_wl12xx_of(void) -{ - int ret; - - if (!of_have_populated_dt()) - return; - - if (of_machine_is_compatible("ti,omap4-sdp")) { - wl12xx.board_ref_clock = WL12XX_REFCLOCK_26; - wl12xx.board_tcxo_clock = WL12XX_TCXOCLOCK_26; - wl12xx.irq = gpio_to_irq(53); - } else if (of_machine_is_compatible("ti,omap4-panda")) { - wl12xx.board_ref_clock = WL12XX_REFCLOCK_38; - wl12xx.irq = gpio_to_irq(53); - } else { - return; - } - - ret = wl12xx_set_platform_data(&wl12xx); - if (ret) { - pr_err("error setting wl12xx data: %d\n", ret); - return; - } -} -#else -static inline void omap_init_wl12xx_of(void) -{ -} -#endif - /*-------------------------------------------------------------------------*/ static int __init omap2_init_devices(void) @@ -531,9 +496,6 @@ static int __init omap2_init_devices(void) omap_init_sham(); omap_init_aes(); omap_init_rng(); - } else { - /* These can be removed when bindings are done */ - omap_init_wl12xx_of(); } omap_init_sti(); omap_init_vout(); diff --git a/arch/arm/mach-omap2/pdata-quirks.c b/arch/arm/mach-omap2/pdata-quirks.c index 648d9573aaea..04bfa647a934 100644 --- a/arch/arm/mach-omap2/pdata-quirks.c +++ b/arch/arm/mach-omap2/pdata-quirks.c @@ -8,8 +8,10 @@ * published by the Free Software Foundation. */ #include +#include #include #include +#include #include "common.h" #include "common-board-devices.h" @@ -34,16 +36,47 @@ static void __init __used legacy_init_ehci_clk(char *clkname) __func__, clkname, ret); } +#if IS_ENABLED(CONFIG_WL12XX) + +static struct wl12xx_platform_data wl12xx __initdata; + +static void __init __used legacy_init_wl12xx(unsigned ref_clock, + unsigned tcxo_clock, + int gpio) +{ + int res; + + wl12xx.board_ref_clock = ref_clock; + wl12xx.board_tcxo_clock = tcxo_clock; + wl12xx.irq = gpio_to_irq(gpio); + + res = wl12xx_set_platform_data(&wl12xx); + if (res) { + pr_err("error setting wl12xx data: %d\n", res); + return; + } +} +#else +static inline void legacy_init_wl12xx(unsigned ref_clock, + unsigned tcxo_clock, + int gpio) +{ +} +#endif + #ifdef CONFIG_ARCH_OMAP4 static void __init omap4_sdp_legacy_init(void) { omap_4430sdp_display_init_of(); + legacy_init_wl12xx(WL12XX_REFCLOCK_26, + WL12XX_TCXOCLOCK_26, 53); } static void __init omap4_panda_legacy_init(void) { omap4_panda_display_init_of(); legacy_init_ehci_clk("auxclk3_ck"); + legacy_init_wl12xx(WL12XX_REFCLOCK_38, 0, 53); } #endif -- cgit v1.2.3 From faf4bd47b06d8c92610cda8d49bfe4b79f79f74f Mon Sep 17 00:00:00 2001 From: Aaro Koskinen Date: Tue, 24 Sep 2013 22:28:15 +0300 Subject: ARM: OMAP2+: pdata-quirks: set internal clock source for MMC2 on N950/N9 Set internal clock source for MMC2 on N950/N9. Signed-off-by: Aaro Koskinen Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/pdata-quirks.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/arch/arm/mach-omap2/pdata-quirks.c b/arch/arm/mach-omap2/pdata-quirks.c index 04bfa647a934..3d472dbb9205 100644 --- a/arch/arm/mach-omap2/pdata-quirks.c +++ b/arch/arm/mach-omap2/pdata-quirks.c @@ -16,6 +16,7 @@ #include "common.h" #include "common-board-devices.h" #include "dss-common.h" +#include "control.h" struct pdata_init { const char *compatible; @@ -64,6 +65,17 @@ static inline void legacy_init_wl12xx(unsigned ref_clock, } #endif +#ifdef CONFIG_ARCH_OMAP3 +static void __init hsmmc2_internal_input_clk(void) +{ + u32 reg; + + reg = omap_ctrl_readl(OMAP343X_CONTROL_DEVCONF1); + reg |= OMAP2_MMCSDIO2ADPCLKISEL; + omap_ctrl_writel(reg, OMAP343X_CONTROL_DEVCONF1); +} +#endif /* CONFIG_ARCH_OMAP3 */ + #ifdef CONFIG_ARCH_OMAP4 static void __init omap4_sdp_legacy_init(void) { @@ -88,6 +100,10 @@ static void __init omap5_uevm_legacy_init(void) #endif static struct pdata_init pdata_quirks[] __initdata = { +#ifdef CONFIG_ARCH_OMAP3 + { "nokia,omap3-n9", hsmmc2_internal_input_clk, }, + { "nokia,omap3-n950", hsmmc2_internal_input_clk, }, +#endif #ifdef CONFIG_ARCH_OMAP4 { "ti,omap4-sdp", omap4_sdp_legacy_init, }, { "ti,omap4-panda", omap4_panda_legacy_init, }, -- cgit v1.2.3 From a4d4b15363ea31236e557c471d9aa95202fed88a Mon Sep 17 00:00:00 2001 From: Pavel Machek Date: Tue, 13 Aug 2013 15:36:36 +0200 Subject: ARM: dts: N900: Add device tree This adds device tree with necessary support to boot with functional video (on both emulator and real N900 device). Signed-off-by: Pavel Machek Signed-off-by: Aaro Koskinen Signed-off-by: Benoit Cousson --- arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/omap3-n900.dts | 92 ++++++++++++++++++++++++++++++++++++++++ 2 files changed, 93 insertions(+) create mode 100644 arch/arm/boot/dts/omap3-n900.dts diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 802720e3e8fd..a7cae5371489 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -172,6 +172,7 @@ dtb-$(CONFIG_ARCH_OMAP2PLUS) += omap2420-h4.dtb \ omap3-devkit8000.dtb \ omap3-beagle-xm.dtb \ omap3-evm.dtb \ + omap3-n900.dtb \ omap3-tobi.dtb \ omap3-igep0020.dtb \ omap3-igep0030.dtb \ diff --git a/arch/arm/boot/dts/omap3-n900.dts b/arch/arm/boot/dts/omap3-n900.dts new file mode 100644 index 000000000000..d64fa04e83f6 --- /dev/null +++ b/arch/arm/boot/dts/omap3-n900.dts @@ -0,0 +1,92 @@ +/* + * Copyright (C) 2013 Pavel Machek + * Copyright 2013 Aaro Koskinen + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 (or later) as + * published by the Free Software Foundation. + */ + +/dts-v1/; + +#include "omap34xx.dtsi" + +/ { + model = "Nokia N900"; + compatible = "nokia,omap3-n900", "ti,omap3"; + + cpus { + cpu@0 { + cpu0-supply = <&vcc>; + }; + }; + + memory { + device_type = "memory"; + reg = <0x80000000 0x10000000>; /* 256 MB */ + }; + +}; + +&i2c1 { + clock-frequency = <2200000>; + + twl: twl@48 { + reg = <0x48>; + interrupts = <7>; /* SYS_NIRQ cascaded to intc */ + interrupt-parent = <&intc>; + }; +}; + +#include "twl4030.dtsi" + +&twl_gpio { + ti,pullups = <0x0>; + ti,pulldowns = <0x03ff3f>; /* BIT(0..5) | BIT(8..17) */ +}; + +&i2c2 { + clock-frequency = <400000>; +}; + +&i2c3 { + clock-frequency = <100000>; +}; + +&mmc1 { + status = "disabled"; +}; + +&mmc2 { + status = "disabled"; +}; + +&mmc3 { + status = "disabled"; +}; + +&mcspi1 { + /* + * For some reason, touchscreen is necessary for screen to work at + * all on real hw. It works well without it on emulator. + * + * Also... order in the device tree actually matters here. + */ + tsc2005@0 { + compatible = "tsc2005"; + spi-max-frequency = <6000000>; + reg = <0>; + }; + mipid@2 { + compatible = "acx565akm"; + spi-max-frequency = <6000000>; + reg = <2>; + }; +}; + +&usb_otg_hs { + interface-type = <0>; + usb-phy = <&usb2_phy>; + mode = <2>; + power = <50>; +}; -- cgit v1.2.3 From 00964a90728d752abe61ad134dac8c13491c3595 Mon Sep 17 00:00:00 2001 From: Javier Martinez Canillas Date: Thu, 20 Jun 2013 16:42:30 +0200 Subject: ARM: dts: omap3-igep: add pinmux node for GPIO LED configuration IGEP boards have a number of LED connected to OMAP or TWL GPIO lines. The actual wiring is different on each board so each board DT has need to configure the mux correctly. Even though it works with the current DT, the kernel complains with: [2.305023] leds-gpio leds.18: pins are not configured from the driver Add an empty pinmux_leds_pins pinctrl child node so boards can override with the correct mux configuration and not depend on default values for the GPIO LEDs to work. Signed-off-by: Javier Martinez Canillas Signed-off-by: Benoit Cousson --- arch/arm/boot/dts/omap3-igep.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/boot/dts/omap3-igep.dtsi b/arch/arm/boot/dts/omap3-igep.dtsi index 2326d11462a5..0f92224dc4fc 100644 --- a/arch/arm/boot/dts/omap3-igep.dtsi +++ b/arch/arm/boot/dts/omap3-igep.dtsi @@ -77,6 +77,8 @@ 0x1a2 (PIN_INPUT | MUX_MODE4) /* mcspi1_cs2.gpio_176 */ >; }; + + leds_pins: pinmux_leds_pins { }; }; &i2c1 { -- cgit v1.2.3 From bd52e2d274d369182f38d9ddaf8ce910c2a7332f Mon Sep 17 00:00:00 2001 From: Javier Martinez Canillas Date: Thu, 20 Jun 2013 16:42:31 +0200 Subject: ARM: dts: omap3-igep0020: add mux conf for GPIO LEDs The IGEPv2 has a number of GPIO LED connected to OMAP pins. Configure these pins as output GPIO. Signed-off-by: Javier Martinez Canillas Tested-by: Enric Balletbo i Serra Signed-off-by: Benoit Cousson --- arch/arm/boot/dts/omap3-igep0020.dts | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/arch/arm/boot/dts/omap3-igep0020.dts b/arch/arm/boot/dts/omap3-igep0020.dts index e8c48284587c..51c084eeb7bd 100644 --- a/arch/arm/boot/dts/omap3-igep0020.dts +++ b/arch/arm/boot/dts/omap3-igep0020.dts @@ -16,7 +16,10 @@ compatible = "isee,omap3-igep0020", "ti,omap3"; leds { + pinctrl-names = "default"; + pinctrl-0 = <&leds_pins>; compatible = "gpio-leds"; + boot { label = "omap3:green:boot"; gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>; @@ -54,6 +57,14 @@ }; }; +&leds_pins { + pinctrl-single,pins = < + 0x5c4 (PIN_OUTPUT | MUX_MODE4) /* etk_d12.gpio_26 */ + 0x5c6 (PIN_OUTPUT | MUX_MODE4) /* etk_d13.gpio_27 */ + 0x5c8 (PIN_OUTPUT | MUX_MODE4) /* etk_d14.gpio_28 */ + >; +}; + &i2c3 { clock-frequency = <100000>; -- cgit v1.2.3 From 78132036da5e11e9d54ef1d62d41255ccdae1c4f Mon Sep 17 00:00:00 2001 From: Javier Martinez Canillas Date: Thu, 20 Jun 2013 16:42:32 +0200 Subject: ARM: dts: omap3-igep0030: add mux conf for GPIO LED The IGEP COM MOdule has a GPIO LED connected to OMAP pins. Configure this pin as output GPIO. Signed-off-by: Javier Martinez Canillas Tested-by: Enric Balletbo i Serra Signed-off-by: Benoit Cousson --- arch/arm/boot/dts/omap3-igep0030.dts | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm/boot/dts/omap3-igep0030.dts b/arch/arm/boot/dts/omap3-igep0030.dts index 644d05383836..eee3c632b260 100644 --- a/arch/arm/boot/dts/omap3-igep0030.dts +++ b/arch/arm/boot/dts/omap3-igep0030.dts @@ -16,7 +16,10 @@ compatible = "isee,omap3-igep0030", "ti,omap3"; leds { + pinctrl-names = "default"; + pinctrl-0 = <&leds_pins>; compatible = "gpio-leds"; + boot { label = "omap3:green:boot"; gpios = <&twl_gpio 13 GPIO_ACTIVE_LOW>; @@ -43,6 +46,12 @@ }; }; +&leds_pins { + pinctrl-single,pins = < + 0x5b0 (PIN_OUTPUT | MUX_MODE4) /* etk_d2.gpio_16 */ + >; +}; + &gpmc { ranges = <0 0 0x00000000 0x20000000>; -- cgit v1.2.3 From 6797cdbe14b262c3bcb5a65b1488ae46fdc6b4db Mon Sep 17 00:00:00 2001 From: Alexandre Belloni Date: Sat, 3 Aug 2013 20:00:54 +0200 Subject: ARM: dts: AM33XX: Add PMU support ARM Performance Monitor Units are available on the am33xx, add the support in the dtsi. Tested with perf and oprofile on a regular beaglebone. Signed-off-by: Alexandre Belloni Signed-off-by: Benoit Cousson --- arch/arm/boot/dts/am33xx.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi index f9c5da9c7fe1..4d1c6321b252 100644 --- a/arch/arm/boot/dts/am33xx.dtsi +++ b/arch/arm/boot/dts/am33xx.dtsi @@ -57,6 +57,11 @@ }; }; + pmu { + compatible = "arm,cortex-a8-pmu"; + interrupts = <3>; + }; + /* * The soc node represents the soc top level view. It is uses for IPs * that are not memory mapped in the MPU view or for the MPU itself. -- cgit v1.2.3 From 5eac0eb7af0982afae4788441533cc208ede3ff4 Mon Sep 17 00:00:00 2001 From: Lars Poeschel Date: Wed, 7 Aug 2013 13:06:32 +0200 Subject: ARM: dts: AM33xx: Correct gpio #interrupt-cells property Following commit ff5c9059 and therefore other omap platforms using the gpio-omap driver correct the #interrupt-cells property on am33xx too. The omap gpio binding documentaion also states that the #interrupt-cells property should be 2. Signed-off-by: Lars Poeschel Reviewed-by: Javier Martinez Canillas Acked-by: Mark Rutland Signed-off-by: Benoit Cousson --- arch/arm/boot/dts/am33xx.dtsi | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi index 4d1c6321b252..a7731ead0b91 100644 --- a/arch/arm/boot/dts/am33xx.dtsi +++ b/arch/arm/boot/dts/am33xx.dtsi @@ -111,7 +111,7 @@ gpio-controller; #gpio-cells = <2>; interrupt-controller; - #interrupt-cells = <1>; + #interrupt-cells = <2>; reg = <0x44e07000 0x1000>; interrupts = <96>; }; @@ -122,7 +122,7 @@ gpio-controller; #gpio-cells = <2>; interrupt-controller; - #interrupt-cells = <1>; + #interrupt-cells = <2>; reg = <0x4804c000 0x1000>; interrupts = <98>; }; @@ -133,7 +133,7 @@ gpio-controller; #gpio-cells = <2>; interrupt-controller; - #interrupt-cells = <1>; + #interrupt-cells = <2>; reg = <0x481ac000 0x1000>; interrupts = <32>; }; @@ -144,7 +144,7 @@ gpio-controller; #gpio-cells = <2>; interrupt-controller; - #interrupt-cells = <1>; + #interrupt-cells = <2>; reg = <0x481ae000 0x1000>; interrupts = <62>; }; -- cgit v1.2.3 From 9448996c09509dac80b97a1803bd31b2f99cbc5c Mon Sep 17 00:00:00 2001 From: Kishon Vijay Abraham I Date: Mon, 12 Aug 2013 15:07:01 +0530 Subject: ARM: dts: omap5-uevm: Split SMPS10 in two nodes SMPS10 has two outputs OUT1 and OUT2. Hence SMPS10 is modeled as two regulators. The DT node is split to reflect it. Signed-off-by: Kishon Vijay Abraham I Signed-off-by: Benoit Cousson --- arch/arm/boot/dts/omap5-uevm.dts | 13 +++++++++++-- 1 file changed, 11 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/omap5-uevm.dts b/arch/arm/boot/dts/omap5-uevm.dts index 65d7b601651c..05b9b126f084 100644 --- a/arch/arm/boot/dts/omap5-uevm.dts +++ b/arch/arm/boot/dts/omap5-uevm.dts @@ -334,9 +334,18 @@ ti,smps-range = <0x80>; }; - smps10_reg: smps10 { + smps10_out2_reg: smps10_out2 { /* VBUS_5V_OTG */ - regulator-name = "smps10"; + regulator-name = "smps10_out2"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-always-on; + regulator-boot-on; + }; + + smps10_out1_reg: smps10_out1 { + /* VBUS_5V_OTG */ + regulator-name = "smps10_out1"; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; regulator-always-on; -- cgit v1.2.3 From f1d6ed21944fedc6552e46d38a03127aeaef2d41 Mon Sep 17 00:00:00 2001 From: Lee Jones Date: Mon, 22 Jul 2013 11:52:31 +0100 Subject: ARM: dts: Remove '0x's from OMAP2420 H4 DTS file Cc: Tony Lindgren Signed-off-by: Lee Jones Signed-off-by: Benoit Cousson --- arch/arm/boot/dts/omap2420-h4.dts | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm/boot/dts/omap2420-h4.dts b/arch/arm/boot/dts/omap2420-h4.dts index 224c08f472f4..34cdecb4fdda 100644 --- a/arch/arm/boot/dts/omap2420-h4.dts +++ b/arch/arm/boot/dts/omap2420-h4.dts @@ -50,15 +50,15 @@ label = "bootloader"; reg = <0 0x20000>; }; - partition@0x20000 { + partition@20000 { label = "params"; reg = <0x20000 0x20000>; }; - partition@0x40000 { + partition@40000 { label = "kernel"; reg = <0x40000 0x200000>; }; - partition@0x240000 { + partition@240000 { label = "file-system"; reg = <0x240000 0x3dc0000>; }; -- cgit v1.2.3 From 8771c9625b6eec65a2a503b1a48ea6d49fc0d5ca Mon Sep 17 00:00:00 2001 From: Lee Jones Date: Mon, 22 Jul 2013 11:52:32 +0100 Subject: ARM: dts: Remove '0x's from OMAP3 IGEP0020 DTS file Cc: Tony Lindgren Signed-off-by: Lee Jones Signed-off-by: Benoit Cousson --- arch/arm/boot/dts/omap3-igep0020.dts | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm/boot/dts/omap3-igep0020.dts b/arch/arm/boot/dts/omap3-igep0020.dts index 51c084eeb7bd..eedf0d8b42d5 100644 --- a/arch/arm/boot/dts/omap3-igep0020.dts +++ b/arch/arm/boot/dts/omap3-igep0020.dts @@ -110,19 +110,19 @@ label = "SPL"; reg = <0 0x100000>; }; - partition@0x80000 { + partition@80000 { label = "U-Boot"; reg = <0x100000 0x180000>; }; - partition@0x1c0000 { + partition@1c0000 { label = "Environment"; reg = <0x280000 0x100000>; }; - partition@0x280000 { + partition@280000 { label = "Kernel"; reg = <0x380000 0x300000>; }; - partition@0x780000 { + partition@780000 { label = "Filesystem"; reg = <0x680000 0x1f980000>; }; -- cgit v1.2.3 From fa304a88e7664c32118dfb58fe44cfdffc323f59 Mon Sep 17 00:00:00 2001 From: Lee Jones Date: Mon, 22 Jul 2013 11:52:33 +0100 Subject: ARM: dts: Remove '0x's from OMAP3 IGEP0030 DTS file Cc: Tony Lindgren Signed-off-by: Lee Jones Signed-off-by: Benoit Cousson --- arch/arm/boot/dts/omap3-igep0030.dts | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm/boot/dts/omap3-igep0030.dts b/arch/arm/boot/dts/omap3-igep0030.dts index eee3c632b260..525e6d9b0978 100644 --- a/arch/arm/boot/dts/omap3-igep0030.dts +++ b/arch/arm/boot/dts/omap3-igep0030.dts @@ -83,19 +83,19 @@ label = "SPL"; reg = <0 0x100000>; }; - partition@0x80000 { + partition@80000 { label = "U-Boot"; reg = <0x100000 0x180000>; }; - partition@0x1c0000 { + partition@1c0000 { label = "Environment"; reg = <0x280000 0x100000>; }; - partition@0x280000 { + partition@280000 { label = "Kernel"; reg = <0x380000 0x300000>; }; - partition@0x780000 { + partition@780000 { label = "Filesystem"; reg = <0x680000 0x1f980000>; }; -- cgit v1.2.3 From b7317777102e54472e747361a907314a8da1f4e0 Mon Sep 17 00:00:00 2001 From: Lee Jones Date: Mon, 22 Jul 2013 11:52:34 +0100 Subject: ARM: dts: Remove '0x's from OMAP3 DTS file Cc: Tony Lindgren Signed-off-by: Lee Jones Signed-off-by: Benoit Cousson --- arch/arm/boot/dts/omap3.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/omap3.dtsi b/arch/arm/boot/dts/omap3.dtsi index 7d95cda1fae4..16420ae16004 100644 --- a/arch/arm/boot/dts/omap3.dtsi +++ b/arch/arm/boot/dts/omap3.dtsi @@ -111,7 +111,7 @@ pinctrl-single,function-mask = <0x7f1f>; }; - omap3_pmx_wkup: pinmux@0x48002a00 { + omap3_pmx_wkup: pinmux@48002a00 { compatible = "ti,omap3-padconf", "pinctrl-single"; reg = <0x48002a00 0x5c>; #address-cells = <1>; -- cgit v1.2.3 From ee8530b41b42bea58e6c78744bc7a75db2781995 Mon Sep 17 00:00:00 2001 From: Lee Jones Date: Mon, 22 Jul 2013 11:52:35 +0100 Subject: ARM: dts: Remove '0x's from OMAP3430 SDP DTS file Cc: Tony Lindgren Signed-off-by: Lee Jones Signed-off-by: Benoit Cousson --- arch/arm/boot/dts/omap3430-sdp.dts | 22 +++++++++++----------- 1 file changed, 11 insertions(+), 11 deletions(-) diff --git a/arch/arm/boot/dts/omap3430-sdp.dts b/arch/arm/boot/dts/omap3430-sdp.dts index e2249bcc3e63..281914ed0151 100644 --- a/arch/arm/boot/dts/omap3430-sdp.dts +++ b/arch/arm/boot/dts/omap3430-sdp.dts @@ -84,15 +84,15 @@ label = "bootloader-nor"; reg = <0 0x40000>; }; - partition@0x40000 { + partition@40000 { label = "params-nor"; reg = <0x40000 0x40000>; }; - partition@0x80000 { + partition@80000 { label = "kernel-nor"; reg = <0x80000 0x200000>; }; - partition@0x280000 { + partition@280000 { label = "filesystem-nor"; reg = <0x240000 0x7d80000>; }; @@ -125,19 +125,19 @@ label = "xloader-nand"; reg = <0 0x80000>; }; - partition@0x80000 { + partition@80000 { label = "bootloader-nand"; reg = <0x80000 0x140000>; }; - partition@0x1c0000 { + partition@1c0000 { label = "params-nand"; reg = <0x1c0000 0xc0000>; }; - partition@0x280000 { + partition@280000 { label = "kernel-nand"; reg = <0x280000 0x500000>; }; - partition@0x780000 { + partition@780000 { label = "filesystem-nand"; reg = <0x780000 0x7880000>; }; @@ -170,19 +170,19 @@ label = "xloader-onenand"; reg = <0 0x80000>; }; - partition@0x80000 { + partition@80000 { label = "bootloader-onenand"; reg = <0x80000 0x40000>; }; - partition@0xc0000 { + partition@c0000 { label = "params-onenand"; reg = <0xc0000 0x20000>; }; - partition@0xe0000 { + partition@e0000 { label = "kernel-onenand"; reg = <0xe0000 0x200000>; }; - partition@0x2e0000 { + partition@2e0000 { label = "filesystem-onenand"; reg = <0x2e0000 0xfd20000>; }; -- cgit v1.2.3 From 75d71d46106b93d2e08de91347793cebf1132b95 Mon Sep 17 00:00:00 2001 From: Lee Jones Date: Mon, 22 Jul 2013 11:52:36 +0100 Subject: ARM: dts: Remove '0x's from OMAP4 DTS file Cc: Tony Lindgren Signed-off-by: Lee Jones Signed-off-by: Benoit Cousson --- arch/arm/boot/dts/omap4.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi index 22d9f2b593d4..45708e1b7a74 100644 --- a/arch/arm/boot/dts/omap4.dtsi +++ b/arch/arm/boot/dts/omap4.dtsi @@ -56,7 +56,7 @@ cache-level = <2>; }; - local-timer@0x48240600 { + local-timer@48240600 { compatible = "arm,cortex-a9-twd-timer"; reg = <0x48240600 0x20>; interrupts = ; -- cgit v1.2.3 From 8906d654992b472ce270d056f523ec21dd06cd3c Mon Sep 17 00:00:00 2001 From: Lee Jones Date: Mon, 22 Jul 2013 11:52:37 +0100 Subject: ARM: dts: Remove '0x's from OMAP5 DTS file Cc: Tony Lindgren Signed-off-by: Lee Jones Signed-off-by: Benoit Cousson --- arch/arm/boot/dts/omap5.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi index 7cdea1bfea09..ecc06a99fd4d 100644 --- a/arch/arm/boot/dts/omap5.dtsi +++ b/arch/arm/boot/dts/omap5.dtsi @@ -604,7 +604,7 @@ ti,hwmods = "wd_timer2"; }; - emif1: emif@0x4c000000 { + emif1: emif@4c000000 { compatible = "ti,emif-4d5"; ti,hwmods = "emif1"; phy-type = <2>; /* DDR PHY type: Intelli PHY */ @@ -615,7 +615,7 @@ hw-caps-temp-alert; }; - emif2: emif@0x4d000000 { + emif2: emif@4d000000 { compatible = "ti,emif-4d5"; ti,hwmods = "emif2"; phy-type = <2>; /* DDR PHY type: Intelli PHY */ -- cgit v1.2.3 From 06a9ea5d76fdff82d9792d8cc315de4c43086780 Mon Sep 17 00:00:00 2001 From: Ruslan Bilovol Date: Wed, 14 Aug 2013 11:35:47 +0300 Subject: ARM: dts: twl6030: Move common configuration for OMAP4 boards in a separate dtsi file The OMAP4 SoC family uses specially-designed PMIC (power management IC) companion chip for power management needs: TWL6030/TWL6032. Therefore there is a typical connection of PMIC to OMAP4 so we can move it into separate .dtsi file and do not duplicate over board-specific files. Tested on OMAP4 SDP board and Pandaboard ES2. Signed-off-by: Ruslan Bilovol Signed-off-by: Benoit Cousson --- arch/arm/boot/dts/omap4-panda-common.dtsi | 21 +---------------- arch/arm/boot/dts/omap4-sdp.dts | 21 +---------------- arch/arm/boot/dts/twl6030_omap4.dtsi | 38 +++++++++++++++++++++++++++++++ 3 files changed, 40 insertions(+), 40 deletions(-) create mode 100644 arch/arm/boot/dts/twl6030_omap4.dtsi diff --git a/arch/arm/boot/dts/omap4-panda-common.dtsi b/arch/arm/boot/dts/omap4-panda-common.dtsi index 814ab67c8c29..43b7661cfe24 100644 --- a/arch/arm/boot/dts/omap4-panda-common.dtsi +++ b/arch/arm/boot/dts/omap4-panda-common.dtsi @@ -122,23 +122,9 @@ }; }; -&omap4_pmx_wkup { - pinctrl-names = "default"; - pinctrl-0 = < - &twl6030_wkup_pins - >; - - twl6030_wkup_pins: pinmux_twl6030_wkup_pins { - pinctrl-single,pins = < - 0x14 (PIN_OUTPUT | MUX_MODE2) /* fref_clk0_out.sys_drm_msecure */ - >; - }; -}; - &omap4_pmx_core { pinctrl-names = "default"; pinctrl-0 = < - &twl6030_pins &twl6040_pins &mcpdm_pins &mcbsp1_pins @@ -147,12 +133,6 @@ &hsusbb1_pins >; - twl6030_pins: pinmux_twl6030_pins { - pinctrl-single,pins = < - 0x15e (WAKEUP_EN | PIN_INPUT_PULLUP | MUX_MODE0) /* sys_nirq1.sys_nirq1 */ - >; - }; - twl6040_pins: pinmux_twl6040_pins { pinctrl-single,pins = < 0xe0 (PIN_OUTPUT | MUX_MODE3) /* hdq_sio.gpio_127 */ @@ -305,6 +285,7 @@ }; #include "twl6030.dtsi" +#include "twl6030_omap4.dtsi" &i2c2 { pinctrl-names = "default"; diff --git a/arch/arm/boot/dts/omap4-sdp.dts b/arch/arm/boot/dts/omap4-sdp.dts index 4f78380ecdb8..5fc3f43c5a81 100644 --- a/arch/arm/boot/dts/omap4-sdp.dts +++ b/arch/arm/boot/dts/omap4-sdp.dts @@ -155,23 +155,9 @@ }; }; -&omap4_pmx_wkup { - pinctrl-names = "default"; - pinctrl-0 = < - &twl6030_wkup_pins - >; - - twl6030_wkup_pins: pinmux_twl6030_wkup_pins { - pinctrl-single,pins = < - 0x14 (PIN_OUTPUT | MUX_MODE2) /* fref_clk0_out.sys_drm_msecure */ - >; - }; -}; - &omap4_pmx_core { pinctrl-names = "default"; pinctrl-0 = < - &twl6030_pins &twl6040_pins &mcpdm_pins &dmic_pins @@ -206,12 +192,6 @@ >; }; - twl6030_pins: pinmux_twl6030_pins { - pinctrl-single,pins = < - 0x15e (WAKEUP_EN | PIN_INPUT_PULLUP | MUX_MODE0) /* sys_nirq1.sys_nirq1 */ - >; - }; - twl6040_pins: pinmux_twl6040_pins { pinctrl-single,pins = < 0xe0 (PIN_OUTPUT | MUX_MODE3) /* hdq_sio.gpio_127 */ @@ -370,6 +350,7 @@ }; #include "twl6030.dtsi" +#include "twl6030_omap4.dtsi" &i2c2 { pinctrl-names = "default"; diff --git a/arch/arm/boot/dts/twl6030_omap4.dtsi b/arch/arm/boot/dts/twl6030_omap4.dtsi new file mode 100644 index 000000000000..a4fa5703c42b --- /dev/null +++ b/arch/arm/boot/dts/twl6030_omap4.dtsi @@ -0,0 +1,38 @@ +/* + * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/ + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +&twl { + /* + * On most OMAP4 platforms, the twl6030 IRQ line is connected + * to the SYS_NIRQ1 line on OMAP and the twl6030 MSECURE line is + * connected to the fref_clk0_out.sys_drm_msecure line. + * Therefore, configure the defaults for the SYS_NIRQ1 and + * fref_clk0_out.sys_drm_msecure pins here. + */ + pinctrl-names = "default"; + pinctrl-0 = < + &twl6030_pins + &twl6030_wkup_pins + >; +}; + +&omap4_pmx_wkup { + twl6030_wkup_pins: pinmux_twl6030_wkup_pins { + pinctrl-single,pins = < + 0x14 (PIN_OUTPUT | MUX_MODE2) /* fref_clk0_out.sys_drm_msecure */ + >; + }; +}; + +&omap4_pmx_core { + twl6030_pins: pinmux_twl6030_pins { + pinctrl-single,pins = < + 0x15e (WAKEUP_EN | PIN_INPUT_PULLUP | MUX_MODE0) /* sys_nirq1.sys_nirq1 */ + >; + }; +}; -- cgit v1.2.3 From 6e58b8f1daaf1af340fb9309907e5ffa473c7aff Mon Sep 17 00:00:00 2001 From: R Sricharan Date: Wed, 14 Aug 2013 19:08:20 +0530 Subject: ARM: dts: DRA7: Add the dts files for dra7 SoC and dra7-evm board Add minimal device tree source needed for DRA7 based SoCs. Also add a board dts file for the dra7-evm (based on dra752) which contains 1.5G of memory with 1G interleaved and 512MB non-interleaved. Also added in the board file are pin configuration details for i2c, mcspi and uart devices on board. Signed-off-by: R Sricharan Signed-off-by: Rajendra Nayak Signed-off-by: Sourav Poddar Signed-off-by: Benoit Cousson --- arch/arm/boot/dts/Makefile | 3 +- arch/arm/boot/dts/dra7-evm.dts | 140 ++++++++++ arch/arm/boot/dts/dra7.dtsi | 575 ++++++++++++++++++++++++++++++++++++++ include/dt-bindings/pinctrl/dra.h | 50 ++++ 4 files changed, 767 insertions(+), 1 deletion(-) create mode 100644 arch/arm/boot/dts/dra7-evm.dts create mode 100644 arch/arm/boot/dts/dra7.dtsi create mode 100644 include/dt-bindings/pinctrl/dra.h diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index a7cae5371489..b057b0e12d7c 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -189,7 +189,8 @@ dtb-$(CONFIG_ARCH_OMAP2PLUS) += omap2420-h4.dtb \ am335x-boneblack.dtb \ am3517-evm.dtb \ am3517_mt_ventoux.dtb \ - am43x-epos-evm.dtb + am43x-epos-evm.dtb \ + dra7-evm.dtb dtb-$(CONFIG_ARCH_ORION5X) += orion5x-lacie-ethernet-disk-mini-v2.dtb dtb-$(CONFIG_ARCH_PRIMA2) += prima2-evb.dtb dtb-$(CONFIG_ARCH_U8500) += ste-snowball.dtb \ diff --git a/arch/arm/boot/dts/dra7-evm.dts b/arch/arm/boot/dts/dra7-evm.dts new file mode 100644 index 000000000000..ca5dab2214d5 --- /dev/null +++ b/arch/arm/boot/dts/dra7-evm.dts @@ -0,0 +1,140 @@ +/* + * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/ + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +/dts-v1/; + +#include "dra7.dtsi" + +/ { + model = "TI DRA7"; + compatible = "ti,dra7-evm", "ti,dra752", "ti,dra7"; + + memory { + device_type = "memory"; + reg = <0x80000000 0x60000000>; /* 1536 MB */ + }; +}; + +&dra7_pmx_core { + i2c1_pins: pinmux_i2c1_pins { + pinctrl-single,pins = < + 0x400 (PIN_INPUT | MUX_MODE0) /* i2c1_sda */ + 0x404 (PIN_INPUT | MUX_MODE0) /* i2c1_scl */ + >; + }; + + i2c2_pins: pinmux_i2c2_pins { + pinctrl-single,pins = < + 0x408 (PIN_INPUT | MUX_MODE0) /* i2c2_sda */ + 0x40c (PIN_INPUT | MUX_MODE0) /* i2c2_scl */ + >; + }; + + i2c3_pins: pinmux_i2c3_pins { + pinctrl-single,pins = < + 0x410 (PIN_INPUT | MUX_MODE0) /* i2c3_sda */ + 0x414 (PIN_INPUT | MUX_MODE0) /* i2c3_scl */ + >; + }; + + mcspi1_pins: pinmux_mcspi1_pins { + pinctrl-single,pins = < + 0x3a4 (PIN_INPUT | MUX_MODE0) /* spi2_clk */ + 0x3a8 (PIN_INPUT | MUX_MODE0) /* spi2_d1 */ + 0x3ac (PIN_INPUT | MUX_MODE0) /* spi2_d0 */ + 0x3b0 (PIN_INPUT_SLEW | MUX_MODE0) /* spi2_cs0 */ + 0x3b4 (PIN_INPUT_SLEW | MUX_MODE0) /* spi2_cs1 */ + 0x3b8 (PIN_INPUT_SLEW | MUX_MODE6) /* spi2_cs2 */ + 0x3bc (PIN_INPUT_SLEW | MUX_MODE6) /* spi2_cs3 */ + >; + }; + + mcspi2_pins: pinmux_mcspi2_pins { + pinctrl-single,pins = < + 0x3c0 (PIN_INPUT | MUX_MODE0) /* spi2_sclk */ + 0x3c4 (PIN_INPUT_SLEW | MUX_MODE0) /* spi2_d1 */ + 0x3c8 (PIN_INPUT_SLEW | MUX_MODE0) /* spi2_d1 */ + 0x3cc (PIN_INPUT_SLEW | MUX_MODE0) /* spi2_cs0 */ + >; + }; + + uart1_pins: pinmux_uart1_pins { + pinctrl-single,pins = < + 0x3e0 (PIN_INPUT_SLEW | MUX_MODE0) /* uart1_rxd */ + 0x3e4 (PIN_INPUT_SLEW | MUX_MODE0) /* uart1_txd */ + 0x3e8 (PIN_INPUT | MUX_MODE3) /* uart1_ctsn */ + 0x3ec (PIN_INPUT | MUX_MODE3) /* uart1_rtsn */ + >; + }; + + uart2_pins: pinmux_uart2_pins { + pinctrl-single,pins = < + 0x3f0 (PIN_INPUT | MUX_MODE0) /* uart2_rxd */ + 0x3f4 (PIN_INPUT | MUX_MODE0) /* uart2_txd */ + 0x3f8 (PIN_INPUT | MUX_MODE0) /* uart2_ctsn */ + 0x3fc (PIN_INPUT | MUX_MODE0) /* uart2_rtsn */ + >; + }; + + uart3_pins: pinmux_uart3_pins { + pinctrl-single,pins = < + 0x248 (PIN_INPUT_SLEW | MUX_MODE0) /* uart3_rxd */ + 0x24c (PIN_INPUT_SLEW | MUX_MODE0) /* uart3_txd */ + >; + }; +}; + +&i2c1 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins>; + clock-frequency = <400000>; +}; + +&i2c2 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&i2c2_pins>; + clock-frequency = <400000>; +}; + +&i2c3 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&i2c3_pins>; + clock-frequency = <3400000>; +}; + +&mcspi1 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&mcspi1_pins>; +}; + +&mcspi2 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&mcspi2_pins>; +}; + +&uart1 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&uart1_pins>; +}; + +&uart2 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&uart2_pins>; +}; + +&uart3 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&uart3_pins>; +}; diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi new file mode 100644 index 000000000000..c01ef769761f --- /dev/null +++ b/arch/arm/boot/dts/dra7.dtsi @@ -0,0 +1,575 @@ +/* + * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/ + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * Based on "omap4.dtsi" + */ + +#include +#include + +#include "skeleton.dtsi" + +/ { + #address-cells = <1>; + #size-cells = <1>; + + compatible = "ti,dra7xx"; + interrupt-parent = <&gic>; + + aliases { + serial0 = &uart1; + serial1 = &uart2; + serial2 = &uart3; + serial3 = &uart4; + serial4 = &uart5; + serial5 = &uart6; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a15"; + reg = <0>; + }; + cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a15"; + reg = <1>; + }; + }; + + timer { + compatible = "arm,armv7-timer"; + interrupts = , + , + , + ; + }; + + gic: interrupt-controller@48211000 { + compatible = "arm,cortex-a15-gic"; + interrupt-controller; + #interrupt-cells = <3>; + reg = <0x48211000 0x1000>, + <0x48212000 0x1000>, + <0x48214000 0x2000>, + <0x48216000 0x2000>; + interrupts = ; + }; + + /* + * The soc node represents the soc top level view. It is uses for IPs + * that are not memory mapped in the MPU view or for the MPU itself. + */ + soc { + compatible = "ti,omap-infra"; + mpu { + compatible = "ti,omap5-mpu"; + ti,hwmods = "mpu"; + }; + }; + + /* + * XXX: Use a flat representation of the SOC interconnect. + * The real OMAP interconnect network is quite complex. + * Since that will not bring real advantage to represent that in DT for + * the moment, just use a fake OCP bus entry to represent the whole bus + * hierarchy. + */ + ocp { + compatible = "ti,omap4-l3-noc", "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + ti,hwmods = "l3_main_1", "l3_main_2"; + reg = <0x44000000 0x2000>, + <0x44800000 0x3000>; + interrupts = , + ; + + counter32k: counter@4ae04000 { + compatible = "ti,omap-counter32k"; + reg = <0x4ae04000 0x40>; + ti,hwmods = "counter_32k"; + }; + + dra7_pmx_core: pinmux@4a003400 { + compatible = "pinctrl-single"; + reg = <0x4a003400 0x0464>; + #address-cells = <1>; + #size-cells = <0>; + pinctrl-single,register-width = <32>; + pinctrl-single,function-mask = <0x3fffffff>; + }; + + sdma: dma-controller@4a056000 { + compatible = "ti,omap4430-sdma"; + reg = <0x4a056000 0x1000>; + interrupts = , + , + , + ; + #dma-cells = <1>; + #dma-channels = <32>; + #dma-requests = <127>; + }; + + gpio1: gpio@4ae10000 { + compatible = "ti,omap4-gpio"; + reg = <0x4ae10000 0x200>; + interrupts = ; + ti,hwmods = "gpio1"; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <1>; + }; + + gpio2: gpio@48055000 { + compatible = "ti,omap4-gpio"; + reg = <0x48055000 0x200>; + interrupts = ; + ti,hwmods = "gpio2"; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <1>; + }; + + gpio3: gpio@48057000 { + compatible = "ti,omap4-gpio"; + reg = <0x48057000 0x200>; + interrupts = ; + ti,hwmods = "gpio3"; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <1>; + }; + + gpio4: gpio@48059000 { + compatible = "ti,omap4-gpio"; + reg = <0x48059000 0x200>; + interrupts = ; + ti,hwmods = "gpio4"; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <1>; + }; + + gpio5: gpio@4805b000 { + compatible = "ti,omap4-gpio"; + reg = <0x4805b000 0x200>; + interrupts = ; + ti,hwmods = "gpio5"; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <1>; + }; + + gpio6: gpio@4805d000 { + compatible = "ti,omap4-gpio"; + reg = <0x4805d000 0x200>; + interrupts = ; + ti,hwmods = "gpio6"; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <1>; + }; + + gpio7: gpio@48051000 { + compatible = "ti,omap4-gpio"; + reg = <0x48051000 0x200>; + interrupts = ; + ti,hwmods = "gpio7"; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <1>; + }; + + gpio8: gpio@48053000 { + compatible = "ti,omap4-gpio"; + reg = <0x48053000 0x200>; + interrupts = ; + ti,hwmods = "gpio8"; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <1>; + }; + + uart1: serial@4806a000 { + compatible = "ti,omap4-uart"; + reg = <0x4806a000 0x100>; + interrupts = ; + ti,hwmods = "uart1"; + clock-frequency = <48000000>; + status = "disabled"; + }; + + uart2: serial@4806c000 { + compatible = "ti,omap4-uart"; + reg = <0x4806c000 0x100>; + interrupts = ; + ti,hwmods = "uart2"; + clock-frequency = <48000000>; + status = "disabled"; + }; + + uart3: serial@48020000 { + compatible = "ti,omap4-uart"; + reg = <0x48020000 0x100>; + interrupts = ; + ti,hwmods = "uart3"; + clock-frequency = <48000000>; + status = "disabled"; + }; + + uart4: serial@4806e000 { + compatible = "ti,omap4-uart"; + reg = <0x4806e000 0x100>; + interrupts = ; + ti,hwmods = "uart4"; + clock-frequency = <48000000>; + status = "disabled"; + }; + + uart5: serial@48066000 { + compatible = "ti,omap4-uart"; + reg = <0x48066000 0x100>; + interrupts = ; + ti,hwmods = "uart5"; + clock-frequency = <48000000>; + status = "disabled"; + }; + + uart6: serial@48068000 { + compatible = "ti,omap4-uart"; + reg = <0x48068000 0x100>; + interrupts = ; + ti,hwmods = "uart6"; + clock-frequency = <48000000>; + status = "disabled"; + }; + + uart7: serial@48420000 { + compatible = "ti,omap4-uart"; + reg = <0x48420000 0x100>; + ti,hwmods = "uart7"; + clock-frequency = <48000000>; + status = "disabled"; + }; + + uart8: serial@48422000 { + compatible = "ti,omap4-uart"; + reg = <0x48422000 0x100>; + ti,hwmods = "uart8"; + clock-frequency = <48000000>; + status = "disabled"; + }; + + uart9: serial@48424000 { + compatible = "ti,omap4-uart"; + reg = <0x48424000 0x100>; + ti,hwmods = "uart9"; + clock-frequency = <48000000>; + status = "disabled"; + }; + + uart10: serial@4ae2b000 { + compatible = "ti,omap4-uart"; + reg = <0x4ae2b000 0x100>; + ti,hwmods = "uart10"; + clock-frequency = <48000000>; + status = "disabled"; + }; + + timer1: timer@4ae18000 { + compatible = "ti,omap5430-timer"; + reg = <0x4ae18000 0x80>; + interrupts = ; + ti,hwmods = "timer1"; + ti,timer-alwon; + }; + + timer2: timer@48032000 { + compatible = "ti,omap5430-timer"; + reg = <0x48032000 0x80>; + interrupts = ; + ti,hwmods = "timer2"; + }; + + timer3: timer@48034000 { + compatible = "ti,omap5430-timer"; + reg = <0x48034000 0x80>; + interrupts = ; + ti,hwmods = "timer3"; + }; + + timer4: timer@48036000 { + compatible = "ti,omap5430-timer"; + reg = <0x48036000 0x80>; + interrupts = ; + ti,hwmods = "timer4"; + }; + + timer5: timer@48820000 { + compatible = "ti,omap5430-timer"; + reg = <0x48820000 0x80>; + interrupts = ; + ti,hwmods = "timer5"; + ti,timer-dsp; + }; + + timer6: timer@48822000 { + compatible = "ti,omap5430-timer"; + reg = <0x48822000 0x80>; + interrupts = ; + ti,hwmods = "timer6"; + ti,timer-dsp; + ti,timer-pwm; + }; + + timer7: timer@48824000 { + compatible = "ti,omap5430-timer"; + reg = <0x48824000 0x80>; + interrupts = ; + ti,hwmods = "timer7"; + ti,timer-dsp; + }; + + timer8: timer@48826000 { + compatible = "ti,omap5430-timer"; + reg = <0x48826000 0x80>; + interrupts = ; + ti,hwmods = "timer8"; + ti,timer-dsp; + ti,timer-pwm; + }; + + timer9: timer@4803e000 { + compatible = "ti,omap5430-timer"; + reg = <0x4803e000 0x80>; + interrupts = ; + ti,hwmods = "timer9"; + }; + + timer10: timer@48086000 { + compatible = "ti,omap5430-timer"; + reg = <0x48086000 0x80>; + interrupts = ; + ti,hwmods = "timer10"; + }; + + timer11: timer@48088000 { + compatible = "ti,omap5430-timer"; + reg = <0x48088000 0x80>; + interrupts = ; + ti,hwmods = "timer11"; + ti,timer-pwm; + }; + + timer13: timer@48828000 { + compatible = "ti,omap5430-timer"; + reg = <0x48828000 0x80>; + ti,hwmods = "timer13"; + status = "disabled"; + }; + + timer14: timer@4882a000 { + compatible = "ti,omap5430-timer"; + reg = <0x4882a000 0x80>; + ti,hwmods = "timer14"; + status = "disabled"; + }; + + timer15: timer@4882c000 { + compatible = "ti,omap5430-timer"; + reg = <0x4882c000 0x80>; + ti,hwmods = "timer15"; + status = "disabled"; + }; + + timer16: timer@4882e000 { + compatible = "ti,omap5430-timer"; + reg = <0x4882e000 0x80>; + ti,hwmods = "timer16"; + status = "disabled"; + }; + + wdt2: wdt@4ae14000 { + compatible = "ti,omap4-wdt"; + reg = <0x4ae14000 0x80>; + interrupts = ; + ti,hwmods = "wd_timer2"; + }; + + i2c1: i2c@48070000 { + compatible = "ti,omap4-i2c"; + reg = <0x48070000 0x100>; + interrupts = ; + #address-cells = <1>; + #size-cells = <0>; + ti,hwmods = "i2c1"; + status = "disabled"; + }; + + i2c2: i2c@48072000 { + compatible = "ti,omap4-i2c"; + reg = <0x48072000 0x100>; + interrupts = ; + #address-cells = <1>; + #size-cells = <0>; + ti,hwmods = "i2c2"; + status = "disabled"; + }; + + i2c3: i2c@48060000 { + compatible = "ti,omap4-i2c"; + reg = <0x48060000 0x100>; + interrupts = ; + #address-cells = <1>; + #size-cells = <0>; + ti,hwmods = "i2c3"; + status = "disabled"; + }; + + i2c4: i2c@4807a000 { + compatible = "ti,omap4-i2c"; + reg = <0x4807a000 0x100>; + interrupts = ; + #address-cells = <1>; + #size-cells = <0>; + ti,hwmods = "i2c4"; + status = "disabled"; + }; + + i2c5: i2c@4807c000 { + compatible = "ti,omap4-i2c"; + reg = <0x4807c000 0x100>; + interrupts = ; + #address-cells = <1>; + #size-cells = <0>; + ti,hwmods = "i2c5"; + status = "disabled"; + }; + + mmc1: mmc@4809c000 { + compatible = "ti,omap4-hsmmc"; + reg = <0x4809c000 0x400>; + interrupts = ; + ti,hwmods = "mmc1"; + ti,dual-volt; + ti,needs-special-reset; + dmas = <&sdma 61>, <&sdma 62>; + dma-names = "tx", "rx"; + status = "disabled"; + }; + + mmc2: mmc@480b4000 { + compatible = "ti,omap4-hsmmc"; + reg = <0x480b4000 0x400>; + interrupts = ; + ti,hwmods = "mmc2"; + ti,needs-special-reset; + dmas = <&sdma 47>, <&sdma 48>; + dma-names = "tx", "rx"; + status = "disabled"; + }; + + mmc3: mmc@480ad000 { + compatible = "ti,omap4-hsmmc"; + reg = <0x480ad000 0x400>; + interrupts = ; + ti,hwmods = "mmc3"; + ti,needs-special-reset; + dmas = <&sdma 77>, <&sdma 78>; + dma-names = "tx", "rx"; + status = "disabled"; + }; + + mmc4: mmc@480d1000 { + compatible = "ti,omap4-hsmmc"; + reg = <0x480d1000 0x400>; + interrupts = ; + ti,hwmods = "mmc4"; + ti,needs-special-reset; + dmas = <&sdma 57>, <&sdma 58>; + dma-names = "tx", "rx"; + status = "disabled"; + }; + + mcspi1: spi@48098000 { + compatible = "ti,omap4-mcspi"; + reg = <0x48098000 0x200>; + interrupts = ; + #address-cells = <1>; + #size-cells = <0>; + ti,hwmods = "mcspi1"; + ti,spi-num-cs = <4>; + dmas = <&sdma 35>, + <&sdma 36>, + <&sdma 37>, + <&sdma 38>, + <&sdma 39>, + <&sdma 40>, + <&sdma 41>, + <&sdma 42>; + dma-names = "tx0", "rx0", "tx1", "rx1", + "tx2", "rx2", "tx3", "rx3"; + status = "disabled"; + }; + + mcspi2: spi@4809a000 { + compatible = "ti,omap4-mcspi"; + reg = <0x4809a000 0x200>; + interrupts = ; + #address-cells = <1>; + #size-cells = <0>; + ti,hwmods = "mcspi2"; + ti,spi-num-cs = <2>; + dmas = <&sdma 43>, + <&sdma 44>, + <&sdma 45>, + <&sdma 46>; + dma-names = "tx0", "rx0", "tx1", "rx1"; + status = "disabled"; + }; + + mcspi3: spi@480b8000 { + compatible = "ti,omap4-mcspi"; + reg = <0x480b8000 0x200>; + interrupts = ; + #address-cells = <1>; + #size-cells = <0>; + ti,hwmods = "mcspi3"; + ti,spi-num-cs = <2>; + dmas = <&sdma 15>, <&sdma 16>; + dma-names = "tx0", "rx0"; + status = "disabled"; + }; + + mcspi4: spi@480ba000 { + compatible = "ti,omap4-mcspi"; + reg = <0x480ba000 0x200>; + interrupts = ; + #address-cells = <1>; + #size-cells = <0>; + ti,hwmods = "mcspi4"; + ti,spi-num-cs = <1>; + dmas = <&sdma 70>, <&sdma 71>; + dma-names = "tx0", "rx0"; + status = "disabled"; + }; + }; +}; diff --git a/include/dt-bindings/pinctrl/dra.h b/include/dt-bindings/pinctrl/dra.h new file mode 100644 index 000000000000..002a2855c046 --- /dev/null +++ b/include/dt-bindings/pinctrl/dra.h @@ -0,0 +1,50 @@ +/* + * This header provides constants for DRA pinctrl bindings. + * + * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/ + * Author: Rajendra Nayak + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef _DT_BINDINGS_PINCTRL_DRA_H +#define _DT_BINDINGS_PINCTRL_DRA_H + +/* DRA7 mux mode options for each pin. See TRM for options */ +#define MUX_MODE0 0x0 +#define MUX_MODE1 0x1 +#define MUX_MODE2 0x2 +#define MUX_MODE3 0x3 +#define MUX_MODE4 0x4 +#define MUX_MODE5 0x5 +#define MUX_MODE6 0x6 +#define MUX_MODE7 0x7 +#define MUX_MODE8 0x8 +#define MUX_MODE9 0x9 +#define MUX_MODE10 0xa +#define MUX_MODE11 0xb +#define MUX_MODE12 0xc +#define MUX_MODE13 0xd +#define MUX_MODE14 0xe +#define MUX_MODE15 0xf + +#define PULL_ENA (1 << 16) +#define PULL_UP (1 << 17) +#define INPUT_EN (1 << 18) +#define SLEWCONTROL (1 << 19) +#define WAKEUP_EN (1 << 24) +#define WAKEUP_EVENT (1 << 25) + +/* Active pin states */ +#define PIN_OUTPUT 0 +#define PIN_OUTPUT_PULLUP (PIN_OUTPUT | PULL_ENA | PULL_UP) +#define PIN_OUTPUT_PULLDOWN (PIN_OUTPUT | PULL_ENA) +#define PIN_INPUT INPUT_EN +#define PIN_INPUT_SLEW (INPUT_EN | SLEWCONTROL) +#define PIN_INPUT_PULLUP (PULL_ENA | INPUT_EN | PULL_UP) +#define PIN_INPUT_PULLDOWN (PULL_ENA | INPUT_EN) + +#endif + -- cgit v1.2.3 From 738c74090e97854278827637297556e6ae0a7fab Mon Sep 17 00:00:00 2001 From: Afzal Mohammed Date: Fri, 2 Aug 2013 19:16:13 +0530 Subject: ARM: dts: AM4372: cpu(s) node per latest binding Update AM4372 cpu node to the latest cpus/cpu bindings for ARM. Signed-off-by: Afzal Mohammed Acked-by: Mark Rutland Signed-off-by: Benoit Cousson --- arch/arm/boot/dts/am4372.dtsi | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm/boot/dts/am4372.dtsi b/arch/arm/boot/dts/am4372.dtsi index ddc1df77ac52..4635e7f3d129 100644 --- a/arch/arm/boot/dts/am4372.dtsi +++ b/arch/arm/boot/dts/am4372.dtsi @@ -22,8 +22,12 @@ }; cpus { + #address-cells = <1>; + #size-cells = <0>; cpu@0 { compatible = "arm,cortex-a9"; + device_type = "cpu"; + reg = <0>; }; }; -- cgit v1.2.3 From 73456012734b80442b33916406cfd13bf1b73acb Mon Sep 17 00:00:00 2001 From: Afzal Mohammed Date: Fri, 2 Aug 2013 19:16:35 +0530 Subject: ARM: dts: AM4372: add few nodes Populate uarts, timers, rtc, wdt, gpio, i2c, spi, cpsw & pwm nodes. Reason for adding these nodes early - hwmod code required address space of peripherals corresponding to these nodes (as address space details are removed from hwmod database). uart0, timers - 1 & 2 and synctimer were already present, so here the remaining uarts & timers are added. All properties as per the existing binding has been added for uart, timer, rtc, wdt & gpio. Even though that was not the current scope of work, felt adding those would reduce or require no effort later to get these peripherals working. For i2c, spi, cpsw & pwm - only the properties that were sure to be correct has been added (main intention is to make hwmod happy and avoid any later modification to here added properties). While at it add "ti,hwmod" property to already existing nodes. Signed-off-by: Afzal Mohammed Signed-off-by: Benoit Cousson --- arch/arm/boot/dts/am4372.dtsi | 343 ++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 343 insertions(+) diff --git a/arch/arm/boot/dts/am4372.dtsi b/arch/arm/boot/dts/am4372.dtsi index 4635e7f3d129..0fe393ab8920 100644 --- a/arch/arm/boot/dts/am4372.dtsi +++ b/arch/arm/boot/dts/am4372.dtsi @@ -49,6 +49,47 @@ compatible = "ti,am4372-uart","ti,omap2-uart"; reg = <0x44e09000 0x2000>; interrupts = ; + ti,hwmods = "uart1"; + }; + + uart1: serial@48022000 { + compatible = "ti,am4372-uart","ti,omap2-uart"; + reg = <0x48022000 0x2000>; + interrupts = ; + ti,hwmods = "uart2"; + status = "disabled"; + }; + + uart2: serial@48024000 { + compatible = "ti,am4372-uart","ti,omap2-uart"; + reg = <0x48024000 0x2000>; + interrupts = ; + ti,hwmods = "uart3"; + status = "disabled"; + }; + + uart3: serial@481a6000 { + compatible = "ti,am4372-uart","ti,omap2-uart"; + reg = <0x481a6000 0x2000>; + interrupts = ; + ti,hwmods = "uart4"; + status = "disabled"; + }; + + uart4: serial@481a8000 { + compatible = "ti,am4372-uart","ti,omap2-uart"; + reg = <0x481a8000 0x2000>; + interrupts = ; + ti,hwmods = "uart5"; + status = "disabled"; + }; + + uart5: serial@481aa000 { + compatible = "ti,am4372-uart","ti,omap2-uart"; + reg = <0x481aa000 0x2000>; + interrupts = ; + ti,hwmods = "uart6"; + status = "disabled"; }; timer1: timer@44e31000 { @@ -56,17 +97,319 @@ reg = <0x44e31000 0x400>; interrupts = ; ti,timer-alwon; + ti,hwmods = "timer1"; }; timer2: timer@48040000 { compatible = "ti,am4372-timer","ti,am335x-timer"; reg = <0x48040000 0x400>; interrupts = ; + ti,hwmods = "timer2"; + }; + + timer3: timer@48042000 { + compatible = "ti,am4372-timer","ti,am335x-timer"; + reg = <0x48042000 0x400>; + interrupts = ; + ti,hwmods = "timer3"; + status = "disabled"; + }; + + timer4: timer@48044000 { + compatible = "ti,am4372-timer","ti,am335x-timer"; + reg = <0x48044000 0x400>; + interrupts = ; + ti,timer-pwm; + ti,hwmods = "timer4"; + status = "disabled"; + }; + + timer5: timer@48046000 { + compatible = "ti,am4372-timer","ti,am335x-timer"; + reg = <0x48046000 0x400>; + interrupts = ; + ti,timer-pwm; + ti,hwmods = "timer5"; + status = "disabled"; + }; + + timer6: timer@48048000 { + compatible = "ti,am4372-timer","ti,am335x-timer"; + reg = <0x48048000 0x400>; + interrupts = ; + ti,timer-pwm; + ti,hwmods = "timer6"; + status = "disabled"; + }; + + timer7: timer@4804a000 { + compatible = "ti,am4372-timer","ti,am335x-timer"; + reg = <0x4804a000 0x400>; + interrupts = ; + ti,timer-pwm; + ti,hwmods = "timer7"; + status = "disabled"; + }; + + timer8: timer@481c1000 { + compatible = "ti,am4372-timer","ti,am335x-timer"; + reg = <0x481c1000 0x400>; + interrupts = ; + ti,hwmods = "timer8"; + status = "disabled"; + }; + + timer9: timer@4833d000 { + compatible = "ti,am4372-timer","ti,am335x-timer"; + reg = <0x4833d000 0x400>; + interrupts = ; + ti,hwmods = "timer9"; + status = "disabled"; + }; + + timer10: timer@4833f000 { + compatible = "ti,am4372-timer","ti,am335x-timer"; + reg = <0x4833f000 0x400>; + interrupts = ; + ti,hwmods = "timer10"; + status = "disabled"; + }; + + timer11: timer@48341000 { + compatible = "ti,am4372-timer","ti,am335x-timer"; + reg = <0x48341000 0x400>; + interrupts = ; + ti,hwmods = "timer11"; + status = "disabled"; }; counter32k: counter@44e86000 { compatible = "ti,am4372-counter32k","ti,omap-counter32k"; reg = <0x44e86000 0x40>; + ti,hwmods = "counter_32k"; + }; + + rtc@44e3e000 { + compatible = "ti,am4372-rtc","ti,da830-rtc"; + reg = <0x44e3e000 0x1000>; + interrupts = ; + ti,hwmods = "rtc"; + status = "disabled"; + }; + + wdt@44e35000 { + compatible = "ti,am4372-wdt","ti,omap3-wdt"; + reg = <0x44e35000 0x1000>; + interrupts = ; + ti,hwmods = "wd_timer2"; + status = "disabled"; + }; + + gpio0: gpio@44e07000 { + compatible = "ti,am4372-gpio","ti,omap4-gpio"; + reg = <0x44e07000 0x1000>; + interrupts = ; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + ti,hwmods = "gpio1"; + status = "disabled"; + }; + + gpio1: gpio@4804c000 { + compatible = "ti,am4372-gpio","ti,omap4-gpio"; + reg = <0x4804c000 0x1000>; + interrupts = ; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + ti,hwmods = "gpio2"; + status = "disabled"; + }; + + gpio2: gpio@481ac000 { + compatible = "ti,am4372-gpio","ti,omap4-gpio"; + reg = <0x481ac000 0x1000>; + interrupts = ; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + ti,hwmods = "gpio3"; + status = "disabled"; + }; + + gpio3: gpio@481ae000 { + compatible = "ti,am4372-gpio","ti,omap4-gpio"; + reg = <0x481ae000 0x1000>; + interrupts = ; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + ti,hwmods = "gpio4"; + status = "disabled"; + }; + + gpio4: gpio@48320000 { + compatible = "ti,am4372-gpio","ti,omap4-gpio"; + reg = <0x48320000 0x1000>; + interrupts = ; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + ti,hwmods = "gpio5"; + status = "disabled"; + }; + + gpio5: gpio@48322000 { + compatible = "ti,am4372-gpio","ti,omap4-gpio"; + reg = <0x48322000 0x1000>; + interrupts = ; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + ti,hwmods = "gpio6"; + status = "disabled"; + }; + + i2c0: i2c@44e0b000 { + compatible = "ti,am4372-i2c","ti,omap4-i2c"; + reg = <0x44e0b000 0x1000>; + interrupts = ; + ti,hwmods = "i2c1"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + i2c1: i2c@4802a000 { + compatible = "ti,am4372-i2c","ti,omap4-i2c"; + reg = <0x4802a000 0x1000>; + interrupts = ; + ti,hwmods = "i2c2"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + i2c2: i2c@4819c000 { + compatible = "ti,am4372-i2c","ti,omap4-i2c"; + reg = <0x4819c000 0x1000>; + interrupts = ; + ti,hwmods = "i2c3"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + spi0: spi@48030000 { + compatible = "ti,am4372-mcspi","ti,omap4-mcspi"; + reg = <0x48030000 0x400>; + interrupts = ; + ti,hwmods = "spi0"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + spi1: spi@481a0000 { + compatible = "ti,am4372-mcspi","ti,omap4-mcspi"; + reg = <0x481a0000 0x400>; + interrupts = ; + ti,hwmods = "spi1"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + spi2: spi@481a2000 { + compatible = "ti,am4372-mcspi","ti,omap4-mcspi"; + reg = <0x481a2000 0x400>; + interrupts = ; + ti,hwmods = "spi2"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + spi3: spi@481a4000 { + compatible = "ti,am4372-mcspi","ti,omap4-mcspi"; + reg = <0x481a4000 0x400>; + interrupts = ; + ti,hwmods = "spi3"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + spi4: spi@48345000 { + compatible = "ti,am4372-mcspi","ti,omap4-mcspi"; + reg = <0x48345000 0x400>; + interrupts = ; + ti,hwmods = "spi4"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + mac: ethernet@4a100000 { + compatible = "ti,am4372-cpsw","ti,cpsw"; + reg = <0x4a100000 0x800 + 0x4a101200 0x100>; + interrupts = ; + ti,hwmods = "cpgmac0"; + status = "disabled"; + }; + + epwmss0: epwmss@48300000 { + compatible = "ti,am4372-pwmss","ti,am33xx-pwmss"; + reg = <0x48300000 0x10>; + ti,hwmods = "epwmss0"; + status = "disabled"; + }; + + epwmss1: epwmss@48302000 { + compatible = "ti,am4372-pwmss","ti,am33xx-pwmss"; + reg = <0x48302000 0x10>; + ti,hwmods = "epwmss1"; + status = "disabled"; + }; + + epwmss2: epwmss@48304000 { + compatible = "ti,am4372-pwmss","ti,am33xx-pwmss"; + reg = <0x48304000 0x10>; + ti,hwmods = "epwmss2"; + status = "disabled"; + }; + + epwmss3: epwmss@48306000 { + compatible = "ti,am4372-pwmss","ti,am33xx-pwmss"; + reg = <0x48306000 0x10>; + ti,hwmods = "epwmss3"; + status = "disabled"; + }; + + epwmss4: epwmss@48308000 { + compatible = "ti,am4372-pwmss","ti,am33xx-pwmss"; + reg = <0x48308000 0x10>; + ti,hwmods = "epwmss4"; + status = "disabled"; + }; + + epwmss5: epwmss@4830a000 { + compatible = "ti,am4372-pwmss","ti,am33xx-pwmss"; + reg = <0x4830a000 0x10>; + ti,hwmods = "epwmss5"; + status = "disabled"; }; }; }; -- cgit v1.2.3 From adfe1473bda5bfb8d344a94fb17c0a929fcbd852 Mon Sep 17 00:00:00 2001 From: Marek Belisko Date: Thu, 15 Aug 2013 22:43:05 +0200 Subject: ARM: dts: Add devicetree for gta04 board. This adds devicetree for gta04 (Openmoko next generation board) with necessary support for mmc, usb, leds and button. Signed-off-by: Marek Belisko Signed-off-by: Benoit Cousson --- arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/omap3-gta04.dts | 168 ++++++++++++++++++++++++++++++++++++++ 2 files changed, 169 insertions(+) create mode 100644 arch/arm/boot/dts/omap3-gta04.dts diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index b057b0e12d7c..1be0c95391d7 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -174,6 +174,7 @@ dtb-$(CONFIG_ARCH_OMAP2PLUS) += omap2420-h4.dtb \ omap3-evm.dtb \ omap3-n900.dtb \ omap3-tobi.dtb \ + omap3-gta04.dtb \ omap3-igep0020.dtb \ omap3-igep0030.dtb \ omap4-panda.dtb \ diff --git a/arch/arm/boot/dts/omap3-gta04.dts b/arch/arm/boot/dts/omap3-gta04.dts new file mode 100644 index 000000000000..a84684a95891 --- /dev/null +++ b/arch/arm/boot/dts/omap3-gta04.dts @@ -0,0 +1,168 @@ +/* + * Copyright (C) 2013 Marek Belisko + * + * Based on omap3-beagle-xm.dts + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +/dts-v1/; + +#include "omap36xx.dtsi" + +/ { + model = "OMAP3 GTA04"; + compatible = "ti,omap3-gta04", "ti,omap3"; + + cpus { + cpu@0 { + cpu0-supply = <&vcc>; + }; + }; + + memory { + device_type = "memory"; + reg = <0x80000000 0x20000000>; /* 512 MB */ + }; + + gpio-keys { + compatible = "gpio-keys"; + + aux-button { + label = "aux"; + linux,code = <169>; + gpios = <&gpio1 7 GPIO_ACTIVE_LOW>; + gpio-key,wakeup; + }; + }; +}; + +&omap3_pmx_core { + uart1_pins: pinmux_uart1_pins { + pinctrl-single,pins = < + 0x152 (PIN_INPUT | MUX_MODE0) /* uart1_rx.uart1_rx */ + 0x14c (PIN_OUTPUT |MUX_MODE0) /* uart1_tx.uart1_tx */ + >; + }; + + uart2_pins: pinmux_uart2_pins { + pinctrl-single,pins = < + 0x14a (PIN_INPUT | MUX_MODE0) /* uart2_rx.uart2_rx */ + 0x148 (PIN_OUTPUT | MUX_MODE0) /* uart2_tx.uart2_tx */ + >; + }; + + uart3_pins: pinmux_uart3_pins { + pinctrl-single,pins = < + 0x16e (PIN_INPUT | MUX_MODE0) /* uart3_rx.uart3_rx */ + 0x170 (PIN_OUTPUT | MUX_MODE0) /* uart3_tx.uart3_tx */ + >; + }; + + mmc1_pins: pinmux_mmc1_pins { + pinctrl-single,pins = < + 0x114 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk.sdmmc1_clk */ + 0x116 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_cmd.sdmmc1_cmd */ + 0x118 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat0.sdmmc1_dat0 */ + 0x11a (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat1.sdmmc1_dat1 */ + 0x11c (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat2.sdmmc1_dat2 */ + 0x11e (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat3.sdmmc1_dat3 */ + >; + }; +}; + +&i2c1 { + clock-frequency = <2600000>; + + twl: twl@48 { + reg = <0x48>; + interrupts = <7>; /* SYS_NIRQ cascaded to intc */ + interrupt-parent = <&intc>; + }; +}; + +#include "twl4030.dtsi" +#include "twl4030_omap3.dtsi" + +&i2c2 { + clock-frequency = <400000>; + + /* pressure sensor */ + bmp085@77 { + compatible = "bosch,bmp085"; + reg = <0x77>; + }; + + /* leds */ + tca6507@45 { + compatible = "ti,tca6507"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x45>; + + gta04_led0: red_aux@0 { + label = "gta04:red:aux"; + reg = <0x0>; + }; + + gta04_led1: green_aux@1 { + label = "gta04:green:aux"; + reg = <0x1>; + }; + + gta04_led3: red_power@3 { + label = "gta04:red:power"; + reg = <0x3>; + linux,default-trigger = "default-on"; + }; + + gta04_led4: green_power@4 { + label = "gta04:green:power"; + reg = <0x4>; + }; + }; +}; + +&i2c3 { + clock-frequency = <100000>; +}; + +&usb_otg_hs { + interface-type = <0>; + usb-phy = <&usb2_phy>; + mode = <3>; + power = <50>; +}; + +&mmc1 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc1_pins>; + vmmc-supply = <&vmmc1>; + vmmc_aux-supply = <&vsim>; + bus-width = <4>; +}; + +&mmc2 { + status = "disabled"; +}; + +&mmc3 { + status = "disabled"; +}; + +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&uart1_pins>; +}; + +&uart2 { + pinctrl-names = "default"; + pinctrl-0 = <&uart2_pins>; +}; + +&uart3 { + pinctrl-names = "default"; + pinctrl-0 = <&uart3_pins>; +}; + -- cgit v1.2.3 From 36f496ac70cadaadc1b024a74c53013bb2461dd1 Mon Sep 17 00:00:00 2001 From: Roger Quadros Date: Thu, 15 Aug 2013 13:18:28 +0300 Subject: ARM: dts: omap3-beagle: Make USB host pin naming consistent Use a common naming scheme "mode0name.modename flags" for the USB host pins to be consistent. Signed-off-by: Roger Quadros Signed-off-by: Benoit Cousson --- arch/arm/boot/dts/omap3-beagle.dts | 24 ++++++++++++------------ 1 file changed, 12 insertions(+), 12 deletions(-) diff --git a/arch/arm/boot/dts/omap3-beagle.dts b/arch/arm/boot/dts/omap3-beagle.dts index dfd83103657a..2e29e811dd42 100644 --- a/arch/arm/boot/dts/omap3-beagle.dts +++ b/arch/arm/boot/dts/omap3-beagle.dts @@ -101,18 +101,18 @@ hsusbb2_pins: pinmux_hsusbb2_pins { pinctrl-single,pins = < - 0x5c0 (PIN_OUTPUT | MUX_MODE3) /* usbb2_ulpitll_clk.usbb1_ulpiphy_clk */ - 0x5c2 (PIN_OUTPUT | MUX_MODE3) /* usbb2_ulpitll_clk.usbb1_ulpiphy_stp */ - 0x5c4 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* usbb2_ulpitll_clk.usbb1_ulpiphy_dir */ - 0x5c6 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* usbb2_ulpitll_clk.usbb1_ulpiphy_nxt */ - 0x5c8 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* usbb2_ulpitll_clk.usbb1_ulpiphy_dat0 */ - 0x5cA (PIN_INPUT_PULLDOWN | MUX_MODE3) /* usbb2_ulpitll_clk.usbb1_ulpiphy_dat1 */ - 0x1a4 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* usbb2_ulpitll_clk.usbb1_ulpiphy_dat2 */ - 0x1a6 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* usbb2_ulpitll_clk.usbb1_ulpiphy_dat3 */ - 0x1a8 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* usbb2_ulpitll_clk.usbb1_ulpiphy_dat4 */ - 0x1aa (PIN_INPUT_PULLDOWN | MUX_MODE3) /* usbb2_ulpitll_clk.usbb1_ulpiphy_dat5 */ - 0x1ac (PIN_INPUT_PULLDOWN | MUX_MODE3) /* usbb2_ulpitll_clk.usbb1_ulpiphy_dat6 */ - 0x1ae (PIN_INPUT_PULLDOWN | MUX_MODE3) /* usbb2_ulpitll_clk.usbb1_ulpiphy_dat7 */ + 0x5c0 (PIN_OUTPUT | MUX_MODE3) /* etk_d10.hsusb2_clk */ + 0x5c2 (PIN_OUTPUT | MUX_MODE3) /* etk_d11.hsusb2_stp */ + 0x5c4 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d12.hsusb2_dir */ + 0x5c6 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d13.hsusb2_nxt */ + 0x5c8 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d14.hsusb2_data0 */ + 0x5cA (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d15.hsusb2_data1 */ + 0x1a4 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi1_cs3.hsusb2_data2 */ + 0x1a6 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_clk.hsusb2_data7 */ + 0x1a8 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_simo.hsusb2_data4 */ + 0x1aa (PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_somi.hsusb2_data5 */ + 0x1ac (PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_cs0.hsusb2_data6 */ + 0x1ae (PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_cs1.hsusb2_data3 */ >; }; -- cgit v1.2.3 From e3a412c9eed08a246d9542645d102c194059cb2b Mon Sep 17 00:00:00 2001 From: Felipe Balbi Date: Wed, 21 Aug 2013 20:01:32 +0530 Subject: ARM: dts: OMAP5: add palmas-usb node Without this node, there will be no palmas driver to notify dwc3 that a cable has been connected and, without that, dwc3 will never initialize. Signed-off-by: Felipe Balbi [kishon@ti.com: added dt properties for enabling vbus/id interrupts and fixed vbus-supply value after SMPS10 is modeled as 2 regulators] Signed-off-by: Kishon Vijay Abraham I Signed-off-by: Benoit Cousson --- arch/arm/boot/dts/omap5-uevm.dts | 12 ++++++++++++ arch/arm/boot/dts/omap5.dtsi | 2 +- 2 files changed, 13 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/omap5-uevm.dts b/arch/arm/boot/dts/omap5-uevm.dts index 05b9b126f084..da25a14d919f 100644 --- a/arch/arm/boot/dts/omap5-uevm.dts +++ b/arch/arm/boot/dts/omap5-uevm.dts @@ -272,6 +272,13 @@ interrupt-controller; #interrupt-cells = <2>; + extcon_usb3: palmas_usb { + compatible = "ti,palmas-usb-vid"; + ti,enable-vbus-detection; + ti,enable-id-detection; + ti,wakeup; + }; + palmas_pmic { compatible = "ti,palmas-pmic"; interrupt-parent = <&palmas>; @@ -479,6 +486,11 @@ phys = <0 &hsusb2_phy &hsusb3_phy>; }; +&usb3 { + extcon = <&extcon_usb3>; + vbus-supply = <&smps10_out1_reg>; +}; + &mcspi1 { }; diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi index ecc06a99fd4d..6192c458bea1 100644 --- a/arch/arm/boot/dts/omap5.dtsi +++ b/arch/arm/boot/dts/omap5.dtsi @@ -634,7 +634,7 @@ ti,type = <2>; }; - omap_dwc3@4a020000 { + usb3: omap_dwc3@4a020000 { compatible = "ti,dwc3"; ti,hwmods = "usb_otg_ss"; reg = <0x4a020000 0x10000>; -- cgit v1.2.3 From 15c9887e15e874f3c15342a897577e914a781738 Mon Sep 17 00:00:00 2001 From: Javier Martinez Canillas Date: Wed, 9 Oct 2013 11:19:18 +0200 Subject: ARM: OMAP2+: pdata-quirks: add legacy display init for IGEPv2 board IGEPv2 board has both an DVI and TFP410 video interfaces but DSS support for DeviceTree has not yet landed in mainline so is necessary to init the displays using legacy platform code. Signed-off-by: Javier Martinez Canillas Acked-by: Tomi Valkeinen Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/dss-common.c | 44 ++++++++++++++++++++++++++++++++++++++ arch/arm/mach-omap2/dss-common.h | 1 + arch/arm/mach-omap2/pdata-quirks.c | 6 ++++++ 3 files changed, 51 insertions(+) diff --git a/arch/arm/mach-omap2/dss-common.c b/arch/arm/mach-omap2/dss-common.c index bf89effa4c99..365bfd3d9c68 100644 --- a/arch/arm/mach-omap2/dss-common.c +++ b/arch/arm/mach-omap2/dss-common.c @@ -213,3 +213,47 @@ void __init omap_4430sdp_display_init_of(void) platform_device_register(&sdp4430_tpd_device); platform_device_register(&sdp4430_hdmi_connector_device); } + + +/* OMAP3 IGEPv2 data */ + +#define IGEP2_DVI_TFP410_POWER_DOWN_GPIO 170 + +/* DVI Connector */ +static struct connector_dvi_platform_data omap3_igep2_dvi_connector_pdata = { + .name = "dvi", + .source = "tfp410.0", + .i2c_bus_num = 3, +}; + +static struct platform_device omap3_igep2_dvi_connector_device = { + .name = "connector-dvi", + .id = 0, + .dev.platform_data = &omap3_igep2_dvi_connector_pdata, +}; + +/* TFP410 DPI-to-DVI chip */ +static struct encoder_tfp410_platform_data omap3_igep2_tfp410_pdata = { + .name = "tfp410.0", + .source = "dpi.0", + .data_lines = 24, + .power_down_gpio = IGEP2_DVI_TFP410_POWER_DOWN_GPIO, +}; + +static struct platform_device omap3_igep2_tfp410_device = { + .name = "tfp410", + .id = 0, + .dev.platform_data = &omap3_igep2_tfp410_pdata, +}; + +static struct omap_dss_board_info igep2_dss_data = { + .default_display_name = "dvi", +}; + +void __init omap3_igep2_display_init_of(void) +{ + omap_display_init(&igep2_dss_data); + + platform_device_register(&omap3_igep2_tfp410_device); + platform_device_register(&omap3_igep2_dvi_connector_device); +} diff --git a/arch/arm/mach-omap2/dss-common.h b/arch/arm/mach-omap2/dss-common.h index c28fe3c03588..a9becf0d5be8 100644 --- a/arch/arm/mach-omap2/dss-common.h +++ b/arch/arm/mach-omap2/dss-common.h @@ -8,5 +8,6 @@ void __init omap4_panda_display_init_of(void); void __init omap_4430sdp_display_init_of(void); +void __init omap3_igep2_display_init_of(void); #endif diff --git a/arch/arm/mach-omap2/pdata-quirks.c b/arch/arm/mach-omap2/pdata-quirks.c index 3d472dbb9205..9113e7037ae5 100644 --- a/arch/arm/mach-omap2/pdata-quirks.c +++ b/arch/arm/mach-omap2/pdata-quirks.c @@ -74,6 +74,11 @@ static void __init hsmmc2_internal_input_clk(void) reg |= OMAP2_MMCSDIO2ADPCLKISEL; omap_ctrl_writel(reg, OMAP343X_CONTROL_DEVCONF1); } + +static void __init omap3_igep0020_legacy_init(void) +{ + omap3_igep2_display_init_of(); +} #endif /* CONFIG_ARCH_OMAP3 */ #ifdef CONFIG_ARCH_OMAP4 @@ -103,6 +108,7 @@ static struct pdata_init pdata_quirks[] __initdata = { #ifdef CONFIG_ARCH_OMAP3 { "nokia,omap3-n9", hsmmc2_internal_input_clk, }, { "nokia,omap3-n950", hsmmc2_internal_input_clk, }, + { "isee,omap3-igep0020", omap3_igep0020_legacy_init, }, #endif #ifdef CONFIG_ARCH_OMAP4 { "ti,omap4-sdp", omap4_sdp_legacy_init, }, -- cgit v1.2.3 From 68a531a1dec12708817552dad4eefc5968dd333f Mon Sep 17 00:00:00 2001 From: Javier Martinez Canillas Date: Wed, 9 Oct 2013 11:19:19 +0200 Subject: ARM: OMAP2+: igep0020: use display init from dss-common Now that display information and setup is made from dss-common there is no need to have this code in the board file. Signed-off-by: Javier Martinez Canillas Acked-by: Tomi Valkeinen Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/board-igep0020.c | 41 +++--------------------------------- 1 file changed, 3 insertions(+), 38 deletions(-) diff --git a/arch/arm/mach-omap2/board-igep0020.c b/arch/arm/mach-omap2/board-igep0020.c index 06dbb2d3d38b..d648d50d9d24 100644 --- a/arch/arm/mach-omap2/board-igep0020.c +++ b/arch/arm/mach-omap2/board-igep0020.c @@ -43,6 +43,7 @@ #include "board-flash.h" #include "control.h" #include "gpmc-onenand.h" +#include "dss-common.h" #define IGEP2_SMSC911X_CS 5 #define IGEP2_SMSC911X_GPIO 176 @@ -50,7 +51,6 @@ #define IGEP2_GPIO_LED0_GREEN 26 #define IGEP2_GPIO_LED0_RED 27 #define IGEP2_GPIO_LED1_RED 28 -#define IGEP2_GPIO_DVI_PUP 170 #define IGEP2_RB_GPIO_WIFI_NPD 94 #define IGEP2_RB_GPIO_WIFI_NRESET 95 @@ -429,41 +429,6 @@ static struct twl4030_gpio_platform_data igep_twl4030_gpio_pdata = { .setup = igep_twl_gpio_setup, }; -static struct connector_dvi_platform_data omap3stalker_dvi_connector_pdata = { - .name = "dvi", - .source = "tfp410.0", - .i2c_bus_num = 3, -}; - -static struct platform_device omap3stalker_dvi_connector_device = { - .name = "connector-dvi", - .id = 0, - .dev.platform_data = &omap3stalker_dvi_connector_pdata, -}; - -static struct encoder_tfp410_platform_data omap3stalker_tfp410_pdata = { - .name = "tfp410.0", - .source = "dpi.0", - .data_lines = 24, - .power_down_gpio = IGEP2_GPIO_DVI_PUP, -}; - -static struct platform_device omap3stalker_tfp410_device = { - .name = "tfp410", - .id = 0, - .dev.platform_data = &omap3stalker_tfp410_pdata, -}; - -static struct omap_dss_board_info igep2_dss_data = { - .default_display_name = "dvi", -}; - -static struct platform_device *igep_devices[] __initdata = { - &igep_vwlan_device, - &omap3stalker_tfp410_device, - &omap3stalker_dvi_connector_device, -}; - static int igep2_keymap[] = { KEY(0, 0, KEY_LEFT), KEY(0, 1, KEY_RIGHT), @@ -663,7 +628,8 @@ static void __init igep_init(void) /* Register I2C busses and drivers */ igep_i2c_init(); - platform_add_devices(igep_devices, ARRAY_SIZE(igep_devices)); + platform_device_register(&igep_vwlan_device); + omap3_igep2_display_init_of(); omap_serial_init(); omap_sdrc_init(m65kxxxxam_sdrc_params, m65kxxxxam_sdrc_params); @@ -681,7 +647,6 @@ static void __init igep_init(void) igep_wlan_bt_init(); if (machine_is_igep0020()) { - omap_display_init(&igep2_dss_data); igep2_init_smsc911x(); usbhs_init_phys(igep2_phy_data, ARRAY_SIZE(igep2_phy_data)); usbhs_init(&igep2_usbhs_bdata); -- cgit v1.2.3 From 02e483f66deb6bd8df6af450726574614eb53be3 Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Wed, 2 Oct 2013 21:39:39 -0700 Subject: pinctrl: single: Prepare for supporting SoC specific features Let's replace is_pinconf with flags and add struct pcs_soc_data so we can support SoC specific features like pin wake-up events. Done in collaboration with Roger Quadros . Cc: Peter Ujfalusi Cc: Grygorii Strashko Cc: Prakash Manjunathappa Cc: linux-kernel@vger.kernel.org Acked-by: Linus Walleij Acked-by: Haojian Zhuang Reviewed-by: Kevin Hilman Tested-by: Kevin Hilman Signed-off-by: Roger Quadros Signed-off-by: Tony Lindgren --- drivers/pinctrl/pinctrl-single.c | 38 +++++++++++++++++++++++++++++--------- 1 file changed, 29 insertions(+), 9 deletions(-) diff --git a/drivers/pinctrl/pinctrl-single.c b/drivers/pinctrl/pinctrl-single.c index a82ace4d9a20..f88d3d1b2b99 100644 --- a/drivers/pinctrl/pinctrl-single.c +++ b/drivers/pinctrl/pinctrl-single.c @@ -149,6 +149,14 @@ struct pcs_name { char name[PCS_REG_NAME_LEN]; }; +/** + * struct pcs_soc_data - SoC specific settings + * @flags: initial SoC specific PCS_FEAT_xxx values + */ +struct pcs_soc_data { + unsigned flags; +}; + /** * struct pcs_device - pinctrl device instance * @res: resources @@ -156,13 +164,13 @@ struct pcs_name { * @size: size of the ioremapped area * @dev: device entry * @pctl: pin controller device + * @flags: mask of PCS_FEAT_xxx values * @mutex: mutex protecting the lists * @width: bits per mux register * @fmask: function register mask * @fshift: function register shift * @foff: value to turn mux off * @fmax: max number of functions in fmask - * @is_pinconf: whether supports pinconf * @bits_per_pin:number of bits per pin * @names: array of register names for pins * @pins: physical pins on the SoC @@ -183,6 +191,8 @@ struct pcs_device { unsigned size; struct device *dev; struct pinctrl_dev *pctl; + unsigned flags; +#define PCS_FEAT_PINCONF (1 << 0) struct mutex mutex; unsigned width; unsigned fmask; @@ -190,7 +200,6 @@ struct pcs_device { unsigned foff; unsigned fmax; bool bits_per_mux; - bool is_pinconf; unsigned bits_per_pin; struct pcs_name *names; struct pcs_data pins; @@ -206,6 +215,8 @@ struct pcs_device { void (*write)(unsigned val, void __iomem *reg); }; +#define PCS_HAS_PINCONF (pcs->flags & PCS_FEAT_PINCONF) + static int pcs_pinconf_get(struct pinctrl_dev *pctldev, unsigned pin, unsigned long *config); static int pcs_pinconf_set(struct pinctrl_dev *pctldev, unsigned pin, @@ -1060,7 +1071,7 @@ static int pcs_parse_pinconf(struct pcs_device *pcs, struct device_node *np, }; /* If pinconf isn't supported, don't parse properties in below. */ - if (!pcs->is_pinconf) + if (!PCS_HAS_PINCONF) return 0; /* cacluate how much properties are supported in current node */ @@ -1184,7 +1195,7 @@ static int pcs_parse_one_pinctrl_entry(struct pcs_device *pcs, (*map)->data.mux.group = np->name; (*map)->data.mux.function = np->name; - if (pcs->is_pinconf) { + if (PCS_HAS_PINCONF) { res = pcs_parse_pinconf(pcs, np, function, map); if (res) goto free_pingroups; @@ -1305,7 +1316,7 @@ static int pcs_parse_bits_in_pinctrl_entry(struct pcs_device *pcs, (*map)->data.mux.group = np->name; (*map)->data.mux.function = np->name; - if (pcs->is_pinconf) { + if (PCS_HAS_PINCONF) { dev_err(pcs->dev, "pinconf not supported\n"); goto free_pingroups; } @@ -1525,6 +1536,7 @@ static int pcs_probe(struct platform_device *pdev) const struct of_device_id *match; struct resource *res; struct pcs_device *pcs; + const struct pcs_soc_data *soc; int ret; match = of_match_device(pcs_of_match, &pdev->dev); @@ -1541,7 +1553,8 @@ static int pcs_probe(struct platform_device *pdev) INIT_LIST_HEAD(&pcs->pingroups); INIT_LIST_HEAD(&pcs->functions); INIT_LIST_HEAD(&pcs->gpiofuncs); - pcs->is_pinconf = match->data; + soc = match->data; + pcs->flags = soc->flags; PCS_GET_PROP_U32("pinctrl-single,register-width", &pcs->width, "register width not specified\n"); @@ -1610,7 +1623,7 @@ static int pcs_probe(struct platform_device *pdev) pcs->desc.name = DRIVER_NAME; pcs->desc.pctlops = &pcs_pinctrl_ops; pcs->desc.pmxops = &pcs_pinmux_ops; - if (pcs->is_pinconf) + if (PCS_HAS_PINCONF) pcs->desc.confops = &pcs_pinconf_ops; pcs->desc.owner = THIS_MODULE; @@ -1652,9 +1665,16 @@ static int pcs_remove(struct platform_device *pdev) return 0; } +static const struct pcs_soc_data pinctrl_single = { +}; + +static const struct pcs_soc_data pinconf_single = { + .flags = PCS_FEAT_PINCONF, +}; + static struct of_device_id pcs_of_match[] = { - { .compatible = "pinctrl-single", .data = (void *)false }, - { .compatible = "pinconf-single", .data = (void *)true }, + { .compatible = "pinctrl-single", .data = &pinctrl_single }, + { .compatible = "pinconf-single", .data = &pinconf_single }, { }, }; MODULE_DEVICE_TABLE(of, pcs_of_match); -- cgit v1.2.3 From 3e6cee1786a13cb2308609b5f8c020e1754e37cf Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Wed, 2 Oct 2013 21:39:40 -0700 Subject: pinctrl: single: Add support for wake-up interrupts MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The pin control registers can have interrupts for example for device wake-up. These interrupts can be treated as a chained interrupt controller as suggested earlier by Linus Walleij . This patch adds support for interrupts in a way that should be pretty generic, and works for the omaps that support wake-up interrupts. On omaps, there's an interrupt enable and interrupt status bit for each pin. The two pinctrl domains on omaps share a single interrupt from the PRM chained interrupt handler. Support for other similar hardware should be easy to add. Note that this patch does not attempt to handle the wake-up interrupts automatically unlike the earlier patches. This patch allows the device drivers to do a request_irq() on the wake-up pins as needed. I'll try to do also a separate generic patch for handling the wake-up events automatically. Also note that as this patch makes the pinctrl-single an irq controller, the current bindings need some extra trickery to use interrupts from two different interrupt controllers for the same driver. So it might be worth waiting a little on the patches enabling the wake-up interrupts from drivers as there should be a generic way to handle it coming. And also there's been discussion of interrupts-extended binding for using interrupts from multiple interrupt controllers. In any case, this patch should be ready to go allowing handling the wake-up interrupts in a generic way, or separately from the device drivers. Cc: Peter Ujfalusi Cc: Grygorii Strashko Cc: Prakash Manjunathappa Cc: Roger Quadros Cc: linux-kernel@vger.kernel.org Cc: Benoît Cousson Cc: devicetree@vger.kernel.org Acked-by: Linus Walleij Acked-by: Haojian Zhuang Reviewed-by: Kevin Hilman Tested-by: Kevin Hilman Signed-off-by: Tony Lindgren --- .../devicetree/bindings/pinctrl/pinctrl-single.txt | 11 + drivers/pinctrl/pinctrl-single.c | 322 +++++++++++++++++++++ 2 files changed, 333 insertions(+) diff --git a/Documentation/devicetree/bindings/pinctrl/pinctrl-single.txt b/Documentation/devicetree/bindings/pinctrl/pinctrl-single.txt index 5a02e30dd262..7069a0b84e3a 100644 --- a/Documentation/devicetree/bindings/pinctrl/pinctrl-single.txt +++ b/Documentation/devicetree/bindings/pinctrl/pinctrl-single.txt @@ -72,6 +72,13 @@ Optional properties: /* pin base, nr pins & gpio function */ pinctrl-single,gpio-range = <&range 0 3 0 &range 3 9 1>; +- interrupt-controller : standard interrupt controller binding if using + interrupts for wake-up events for example. In this case pinctrl-single + is set up as a chained interrupt controller and the wake-up interrupts + can be requested by the drivers using request_irq(). + +- #interrupt-cells : standard interrupt binding if using interrupts + This driver assumes that there is only one register for each pin (unless the pinctrl-single,bit-per-mux is set), and uses the common pinctrl bindings as specified in the pinctrl-bindings.txt document in this directory. @@ -121,6 +128,8 @@ pmx_core: pinmux@4a100040 { reg = <0x4a100040 0x0196>; #address-cells = <1>; #size-cells = <0>; + #interrupt-cells = <1>; + interrupt-controller; pinctrl-single,register-width = <16>; pinctrl-single,function-mask = <0xffff>; }; @@ -131,6 +140,8 @@ pmx_wkup: pinmux@4a31e040 { reg = <0x4a31e040 0x0038>; #address-cells = <1>; #size-cells = <0>; + #interrupt-cells = <1>; + interrupt-controller; pinctrl-single,register-width = <16>; pinctrl-single,function-mask = <0xffff>; }; diff --git a/drivers/pinctrl/pinctrl-single.c b/drivers/pinctrl/pinctrl-single.c index f88d3d1b2b99..dad65df36f4b 100644 --- a/drivers/pinctrl/pinctrl-single.c +++ b/drivers/pinctrl/pinctrl-single.c @@ -15,10 +15,14 @@ #include #include #include +#include + +#include #include #include #include +#include #include #include @@ -152,9 +156,15 @@ struct pcs_name { /** * struct pcs_soc_data - SoC specific settings * @flags: initial SoC specific PCS_FEAT_xxx values + * @irq: optional interrupt for the controller + * @irq_enable_mask: optional SoC specific interrupt enable mask + * @irq_status_mask: optional SoC specific interrupt status mask */ struct pcs_soc_data { unsigned flags; + int irq; + unsigned irq_enable_mask; + unsigned irq_status_mask; }; /** @@ -165,6 +175,7 @@ struct pcs_soc_data { * @dev: device entry * @pctl: pin controller device * @flags: mask of PCS_FEAT_xxx values + * @lock: spinlock for register access * @mutex: mutex protecting the lists * @width: bits per mux register * @fmask: function register mask @@ -179,6 +190,9 @@ struct pcs_soc_data { * @pingroups: list of pingroups * @functions: list of functions * @gpiofuncs: list of gpio functions + * @irqs: list of interrupt registers + * @chip: chip container for this instance + * @domain: IRQ domain for this instance * @ngroups: number of pingroups * @nfuncs: number of functions * @desc: pin controller descriptor @@ -192,7 +206,11 @@ struct pcs_device { struct device *dev; struct pinctrl_dev *pctl; unsigned flags; +#define PCS_QUIRK_SHARED_IRQ (1 << 2) +#define PCS_FEAT_IRQ (1 << 1) #define PCS_FEAT_PINCONF (1 << 0) + struct pcs_soc_data socdata; + raw_spinlock_t lock; struct mutex mutex; unsigned width; unsigned fmask; @@ -208,6 +226,9 @@ struct pcs_device { struct list_head pingroups; struct list_head functions; struct list_head gpiofuncs; + struct list_head irqs; + struct irq_chip chip; + struct irq_domain *domain; unsigned ngroups; unsigned nfuncs; struct pinctrl_desc desc; @@ -215,6 +236,8 @@ struct pcs_device { void (*write)(unsigned val, void __iomem *reg); }; +#define PCS_QUIRK_HAS_SHARED_IRQ (pcs->flags & PCS_QUIRK_SHARED_IRQ) +#define PCS_HAS_IRQ (pcs->flags & PCS_FEAT_IRQ) #define PCS_HAS_PINCONF (pcs->flags & PCS_FEAT_PINCONF) static int pcs_pinconf_get(struct pinctrl_dev *pctldev, unsigned pin, @@ -440,9 +463,11 @@ static int pcs_enable(struct pinctrl_dev *pctldev, unsigned fselector, for (i = 0; i < func->nvals; i++) { struct pcs_func_vals *vals; + unsigned long flags; unsigned val, mask; vals = &func->vals[i]; + raw_spin_lock_irqsave(&pcs->lock, flags); val = pcs->read(vals->reg); if (pcs->bits_per_mux) @@ -453,6 +478,7 @@ static int pcs_enable(struct pinctrl_dev *pctldev, unsigned fselector, val &= ~mask; val |= (vals->val & mask); pcs->write(val, vals->reg); + raw_spin_unlock_irqrestore(&pcs->lock, flags); } return 0; @@ -494,13 +520,16 @@ static void pcs_disable(struct pinctrl_dev *pctldev, unsigned fselector, for (i = 0; i < func->nvals; i++) { struct pcs_func_vals *vals; + unsigned long flags; unsigned val; vals = &func->vals[i]; + raw_spin_lock_irqsave(&pcs->lock, flags); val = pcs->read(vals->reg); val &= ~pcs->fmask; val |= pcs->foff << pcs->fshift; pcs->write(val, vals->reg); + raw_spin_unlock_irqrestore(&pcs->lock, flags); } } @@ -1450,12 +1479,34 @@ static void pcs_free_pingroups(struct pcs_device *pcs) mutex_unlock(&pcs->mutex); } +/** + * pcs_irq_free() - free interrupt + * @pcs: pcs driver instance + */ +static void pcs_irq_free(struct pcs_device *pcs) +{ + struct pcs_soc_data *pcs_soc = &pcs->socdata; + + if (pcs_soc->irq < 0) + return; + + if (pcs->domain) + irq_domain_remove(pcs->domain); + + if (PCS_QUIRK_HAS_SHARED_IRQ) + free_irq(pcs_soc->irq, pcs_soc); + else + irq_set_chained_handler(pcs_soc->irq, NULL); +} + /** * pcs_free_resources() - free memory used by this driver * @pcs: pcs driver instance */ static void pcs_free_resources(struct pcs_device *pcs) { + pcs_irq_free(pcs); + if (pcs->pctl) pinctrl_unregister(pcs->pctl); @@ -1504,6 +1555,256 @@ static int pcs_add_gpio_func(struct device_node *node, struct pcs_device *pcs) } return ret; } +/** + * @reg: virtual address of interrupt register + * @hwirq: hardware irq number + * @irq: virtual irq number + * @node: list node + */ +struct pcs_interrupt { + void __iomem *reg; + irq_hw_number_t hwirq; + unsigned int irq; + struct list_head node; +}; + +/** + * pcs_irq_set() - enables or disables an interrupt + * + * Note that this currently assumes one interrupt per pinctrl + * register that is typically used for wake-up events. + */ +static inline void pcs_irq_set(struct pcs_soc_data *pcs_soc, + int irq, const bool enable) +{ + struct pcs_device *pcs; + struct list_head *pos; + unsigned mask; + + pcs = container_of(pcs_soc, struct pcs_device, socdata); + list_for_each(pos, &pcs->irqs) { + struct pcs_interrupt *pcswi; + unsigned soc_mask; + + pcswi = list_entry(pos, struct pcs_interrupt, node); + if (irq != pcswi->irq) + continue; + + soc_mask = pcs_soc->irq_enable_mask; + raw_spin_lock(&pcs->lock); + mask = pcs->read(pcswi->reg); + if (enable) + mask |= soc_mask; + else + mask &= ~soc_mask; + pcs->write(mask, pcswi->reg); + raw_spin_unlock(&pcs->lock); + } +} + +/** + * pcs_irq_mask() - mask pinctrl interrupt + * @d: interrupt data + */ +static void pcs_irq_mask(struct irq_data *d) +{ + struct pcs_soc_data *pcs_soc = irq_data_get_irq_chip_data(d); + + pcs_irq_set(pcs_soc, d->irq, false); +} + +/** + * pcs_irq_unmask() - unmask pinctrl interrupt + * @d: interrupt data + */ +static void pcs_irq_unmask(struct irq_data *d) +{ + struct pcs_soc_data *pcs_soc = irq_data_get_irq_chip_data(d); + + pcs_irq_set(pcs_soc, d->irq, true); +} + +/** + * pcs_irq_set_wake() - toggle the suspend and resume wake up + * @d: interrupt data + * @state: wake-up state + * + * Note that this should be called only for suspend and resume. + * For runtime PM, the wake-up events should be enabled by default. + */ +static int pcs_irq_set_wake(struct irq_data *d, unsigned int state) +{ + if (state) + pcs_irq_unmask(d); + else + pcs_irq_mask(d); + + return 0; +} + +/** + * pcs_irq_handle() - common interrupt handler + * @pcs_irq: interrupt data + * + * Note that this currently assumes we have one interrupt bit per + * mux register. This interrupt is typically used for wake-up events. + * For more complex interrupts different handlers can be specified. + */ +static int pcs_irq_handle(struct pcs_soc_data *pcs_soc) +{ + struct pcs_device *pcs; + struct list_head *pos; + int count = 0; + + pcs = container_of(pcs_soc, struct pcs_device, socdata); + list_for_each(pos, &pcs->irqs) { + struct pcs_interrupt *pcswi; + unsigned mask; + + pcswi = list_entry(pos, struct pcs_interrupt, node); + raw_spin_lock(&pcs->lock); + mask = pcs->read(pcswi->reg); + raw_spin_unlock(&pcs->lock); + if (mask & pcs_soc->irq_status_mask) { + generic_handle_irq(irq_find_mapping(pcs->domain, + pcswi->hwirq)); + count++; + } + } + + return count; +} + +/** + * pcs_irq_handler() - handler for the shared interrupt case + * @irq: interrupt + * @d: data + * + * Use this for cases where multiple instances of + * pinctrl-single share a single interrupt like on omaps. + */ +static irqreturn_t pcs_irq_handler(int irq, void *d) +{ + struct pcs_soc_data *pcs_soc = d; + + return pcs_irq_handle(pcs_soc) ? IRQ_HANDLED : IRQ_NONE; +} + +/** + * pcs_irq_handle() - handler for the dedicated chained interrupt case + * @irq: interrupt + * @desc: interrupt descriptor + * + * Use this if you have a separate interrupt for each + * pinctrl-single instance. + */ +static void pcs_irq_chain_handler(unsigned int irq, struct irq_desc *desc) +{ + struct pcs_soc_data *pcs_soc = irq_desc_get_handler_data(desc); + struct irq_chip *chip; + int res; + + chip = irq_get_chip(irq); + chained_irq_enter(chip, desc); + res = pcs_irq_handle(pcs_soc); + /* REVISIT: export and add handle_bad_irq(irq, desc)? */ + chained_irq_exit(chip, desc); + + return; +} + +static int pcs_irqdomain_map(struct irq_domain *d, unsigned int irq, + irq_hw_number_t hwirq) +{ + struct pcs_soc_data *pcs_soc = d->host_data; + struct pcs_device *pcs; + struct pcs_interrupt *pcswi; + + pcs = container_of(pcs_soc, struct pcs_device, socdata); + pcswi = devm_kzalloc(pcs->dev, sizeof(*pcswi), GFP_KERNEL); + if (!pcswi) + return -ENOMEM; + + pcswi->reg = pcs->base + hwirq; + pcswi->hwirq = hwirq; + pcswi->irq = irq; + + mutex_lock(&pcs->mutex); + list_add_tail(&pcswi->node, &pcs->irqs); + mutex_unlock(&pcs->mutex); + + irq_set_chip_data(irq, pcs_soc); + irq_set_chip_and_handler(irq, &pcs->chip, + handle_level_irq); + set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); + + return 0; +} + +static struct irq_domain_ops pcs_irqdomain_ops = { + .map = pcs_irqdomain_map, + .xlate = irq_domain_xlate_onecell, +}; + +/** + * pcs_irq_init_chained_handler() - set up a chained interrupt handler + * @pcs: pcs driver instance + * @np: device node pointer + */ +static int pcs_irq_init_chained_handler(struct pcs_device *pcs, + struct device_node *np) +{ + struct pcs_soc_data *pcs_soc = &pcs->socdata; + const char *name = "pinctrl"; + int num_irqs; + + if (!pcs_soc->irq_enable_mask || + !pcs_soc->irq_status_mask) { + pcs_soc->irq = -1; + return -EINVAL; + } + + INIT_LIST_HEAD(&pcs->irqs); + pcs->chip.name = name; + pcs->chip.irq_ack = pcs_irq_mask; + pcs->chip.irq_mask = pcs_irq_mask; + pcs->chip.irq_unmask = pcs_irq_unmask; + pcs->chip.irq_set_wake = pcs_irq_set_wake; + + if (PCS_QUIRK_HAS_SHARED_IRQ) { + int res; + + res = request_irq(pcs_soc->irq, pcs_irq_handler, + IRQF_SHARED | IRQF_NO_SUSPEND, + name, pcs_soc); + if (res) { + pcs_soc->irq = -1; + return res; + } + } else { + irq_set_handler_data(pcs_soc->irq, pcs_soc); + irq_set_chained_handler(pcs_soc->irq, + pcs_irq_chain_handler); + } + + /* + * We can use the register offset as the hardirq + * number as irq_domain_add_simple maps them lazily. + * This way we can easily support more than one + * interrupt per function if needed. + */ + num_irqs = pcs->size; + + pcs->domain = irq_domain_add_simple(np, num_irqs, 0, + &pcs_irqdomain_ops, + pcs_soc); + if (!pcs->domain) { + irq_set_chained_handler(pcs_soc->irq, NULL); + return -EINVAL; + } + + return 0; +} #ifdef CONFIG_PM static int pinctrl_single_suspend(struct platform_device *pdev, @@ -1549,12 +1850,14 @@ static int pcs_probe(struct platform_device *pdev) return -ENOMEM; } pcs->dev = &pdev->dev; + raw_spin_lock_init(&pcs->lock); mutex_init(&pcs->mutex); INIT_LIST_HEAD(&pcs->pingroups); INIT_LIST_HEAD(&pcs->functions); INIT_LIST_HEAD(&pcs->gpiofuncs); soc = match->data; pcs->flags = soc->flags; + memcpy(&pcs->socdata, soc, sizeof(*soc)); PCS_GET_PROP_U32("pinctrl-single,register-width", &pcs->width, "register width not specified\n"); @@ -1642,6 +1945,16 @@ static int pcs_probe(struct platform_device *pdev) if (ret < 0) goto free; + pcs->socdata.irq = irq_of_parse_and_map(np, 0); + if (pcs->socdata.irq) + pcs->flags |= PCS_FEAT_IRQ; + + if (PCS_HAS_IRQ) { + ret = pcs_irq_init_chained_handler(pcs, np); + if (ret < 0) + dev_warn(pcs->dev, "initialized with no interrupts\n"); + } + dev_info(pcs->dev, "%i pins at pa %p size %u\n", pcs->desc.npins, pcs->base, pcs->size); @@ -1665,6 +1978,12 @@ static int pcs_remove(struct platform_device *pdev) return 0; } +static const struct pcs_soc_data pinctrl_single_omap_wkup = { + .flags = PCS_QUIRK_SHARED_IRQ, + .irq_enable_mask = (1 << 14), /* OMAP_WAKEUP_EN */ + .irq_status_mask = (1 << 15), /* OMAP_WAKEUP_EVENT */ +}; + static const struct pcs_soc_data pinctrl_single = { }; @@ -1673,6 +1992,9 @@ static const struct pcs_soc_data pinconf_single = { }; static struct of_device_id pcs_of_match[] = { + { .compatible = "ti,omap3-padconf", .data = &pinctrl_single_omap_wkup }, + { .compatible = "ti,omap4-padconf", .data = &pinctrl_single_omap_wkup }, + { .compatible = "ti,omap5-padconf", .data = &pinctrl_single_omap_wkup }, { .compatible = "pinctrl-single", .data = &pinctrl_single }, { .compatible = "pinconf-single", .data = &pinconf_single }, { }, -- cgit v1.2.3 From dc7743aa3c49fabbc6dc9edbcf7df74d776ac32e Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Wed, 2 Oct 2013 21:39:40 -0700 Subject: pinctrl: single: Add support for auxdata For omaps, we still have dependencies to the legacy code for handling the PRM (Power Reset Management) interrupts, and also for reconfiguring the io wake-up chain after changes. Let's pass the PRM interrupt and the rearm functions via auxdata. Then when at some point we have a proper PRM driver, we can get the interrupt via device tree and set up the rearm function as exported function in the PRM driver. By using auxdata we can remove a dependency to the wake-up events for converting omap3 to be device tree only. Cc: Peter Ujfalusi Cc: Grygorii Strashko Cc: Prakash Manjunathappa Cc: Roger Quadros Cc: Haojian Zhuang Cc: linux-kernel@vger.kernel.org Reviewed-by: Kevin Hilman Tested-by: Kevin Hilman Acked-by: Linus Walleij Signed-off-by: Tony Lindgren --- drivers/pinctrl/pinctrl-single.c | 23 +++++++++++++++++++++++ include/linux/platform_data/pinctrl-single.h | 12 ++++++++++++ 2 files changed, 35 insertions(+) create mode 100644 include/linux/platform_data/pinctrl-single.h diff --git a/drivers/pinctrl/pinctrl-single.c b/drivers/pinctrl/pinctrl-single.c index dad65df36f4b..c2aada71c915 100644 --- a/drivers/pinctrl/pinctrl-single.c +++ b/drivers/pinctrl/pinctrl-single.c @@ -28,6 +28,8 @@ #include #include +#include + #include "core.h" #include "pinconf.h" @@ -159,12 +161,14 @@ struct pcs_name { * @irq: optional interrupt for the controller * @irq_enable_mask: optional SoC specific interrupt enable mask * @irq_status_mask: optional SoC specific interrupt status mask + * @rearm: optional SoC specific wake-up rearm function */ struct pcs_soc_data { unsigned flags; int irq; unsigned irq_enable_mask; unsigned irq_status_mask; + void (*rearm)(void); }; /** @@ -1622,6 +1626,8 @@ static void pcs_irq_unmask(struct irq_data *d) struct pcs_soc_data *pcs_soc = irq_data_get_irq_chip_data(d); pcs_irq_set(pcs_soc, d->irq, true); + if (pcs_soc->rearm) + pcs_soc->rearm(); } /** @@ -1672,6 +1678,11 @@ static int pcs_irq_handle(struct pcs_soc_data *pcs_soc) } } + /* + * For debugging on omaps, you may want to call pcs_soc->rearm() + * here to see wake-up interrupts during runtime also. + */ + return count; } @@ -1835,6 +1846,7 @@ static int pcs_probe(struct platform_device *pdev) { struct device_node *np = pdev->dev.of_node; const struct of_device_id *match; + struct pcs_pdata *pdata; struct resource *res; struct pcs_device *pcs; const struct pcs_soc_data *soc; @@ -1949,6 +1961,17 @@ static int pcs_probe(struct platform_device *pdev) if (pcs->socdata.irq) pcs->flags |= PCS_FEAT_IRQ; + /* We still need auxdata for some omaps for PRM interrupts */ + pdata = dev_get_platdata(&pdev->dev); + if (pdata) { + if (pdata->rearm) + pcs->socdata.rearm = pdata->rearm; + if (pdata->irq) { + pcs->socdata.irq = pdata->irq; + pcs->flags |= PCS_FEAT_IRQ; + } + } + if (PCS_HAS_IRQ) { ret = pcs_irq_init_chained_handler(pcs, np); if (ret < 0) diff --git a/include/linux/platform_data/pinctrl-single.h b/include/linux/platform_data/pinctrl-single.h new file mode 100644 index 000000000000..72eacda9b360 --- /dev/null +++ b/include/linux/platform_data/pinctrl-single.h @@ -0,0 +1,12 @@ +/** + * irq: optional wake-up interrupt + * rearm: optional soc specific rearm function + * + * Note that the irq and rearm setup should come from device + * tree except for omap where there are still some dependencies + * to the legacy PRM code. + */ +struct pcs_pdata { + int irq; + void (*rearm)(void); +}; -- cgit v1.2.3 From 8651bd8ce36fb324c218167c970d6734dc825f2c Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Thu, 10 Oct 2013 15:45:12 -0700 Subject: ARM: OMAP2+: Add support for auxdata For few things we're still going to be needing platform data for device tree based drivers. Let's set up auxdata handling and do it in pdata-quirks.c so we have all the legacy calls in one place. Reviewed-by: Kevin Hilman Tested-by: Kevin Hilman Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/board-generic.c | 5 +---- arch/arm/mach-omap2/common.h | 3 ++- arch/arm/mach-omap2/pdata-quirks.c | 11 ++++++++++- 3 files changed, 13 insertions(+), 6 deletions(-) diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c index a66575f33973..3017a9d67ac8 100644 --- a/arch/arm/mach-omap2/board-generic.c +++ b/arch/arm/mach-omap2/board-generic.c @@ -35,10 +35,7 @@ static struct of_device_id omap_dt_match_table[] __initdata = { static void __init omap_generic_init(void) { - omap_sdrc_init(NULL, NULL); - - of_platform_populate(NULL, omap_dt_match_table, NULL, NULL); - pdata_quirks_init(); + pdata_quirks_init(omap_dt_match_table); } #ifdef CONFIG_SOC_OMAP2420 diff --git a/arch/arm/mach-omap2/common.h b/arch/arm/mach-omap2/common.h index fd059e02574d..c6aebf0b42d8 100644 --- a/arch/arm/mach-omap2/common.h +++ b/arch/arm/mach-omap2/common.h @@ -288,7 +288,8 @@ static inline void omap4_cpu_resume(void) #endif -void pdata_quirks_init(void); +void pdata_quirks_init(struct of_device_id *); +void omap_pcs_legacy_init(int irq, void (*rearm)(void)); struct omap_sdrc_params; extern void omap_sdrc_init(struct omap_sdrc_params *sdrc_cs0, diff --git a/arch/arm/mach-omap2/pdata-quirks.c b/arch/arm/mach-omap2/pdata-quirks.c index 9113e7037ae5..76abc5b63d6d 100644 --- a/arch/arm/mach-omap2/pdata-quirks.c +++ b/arch/arm/mach-omap2/pdata-quirks.c @@ -11,6 +11,7 @@ #include #include #include +#include #include #include "common.h" @@ -104,6 +105,10 @@ static void __init omap5_uevm_legacy_init(void) } #endif +struct of_dev_auxdata omap_auxdata_lookup[] __initdata = { + { /* sentinel */ }, +}; + static struct pdata_init pdata_quirks[] __initdata = { #ifdef CONFIG_ARCH_OMAP3 { "nokia,omap3-n9", hsmmc2_internal_input_clk, }, @@ -120,10 +125,14 @@ static struct pdata_init pdata_quirks[] __initdata = { { /* sentinel */ }, }; -void __init pdata_quirks_init(void) +void __init pdata_quirks_init(struct of_device_id *omap_dt_match_table) { struct pdata_init *quirks = pdata_quirks; + omap_sdrc_init(NULL, NULL); + of_platform_populate(NULL, omap_dt_match_table, + omap_auxdata_lookup, NULL); + while (quirks->compatible) { if (of_machine_is_compatible(quirks->compatible)) { if (quirks->fn) -- cgit v1.2.3 From 30a69ef785e87c791aab0b4dae76709a7baa3e85 Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Thu, 10 Oct 2013 15:45:13 -0700 Subject: ARM: OMAP: Move DT wake-up event handling over to use pinctrl-single-omap Now pinctrl-single-omap can handle the wake-up events for us now as long as the events are configured in the .dts files. Done in collaboration with Roger Quadros . Cc: Peter Ujfalusi Cc: Grygorii Strashko Cc: Prakash Manjunathappa Cc: Roger Quadros Cc: Haojian Zhuang Cc: Linus Walleij Reviewed-by: Kevin Hilman Tested-by: Kevin Hilman Signed-off-by: Roger Quadros Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/omap3.dtsi | 4 ++++ arch/arm/boot/dts/omap4.dtsi | 4 ++++ arch/arm/mach-omap2/mux.c | 8 ++++++-- arch/arm/mach-omap2/pdata-quirks.c | 18 ++++++++++++++++++ arch/arm/mach-omap2/prm3xxx.h | 8 +++++++- arch/arm/mach-omap2/prm44xx_54xx.h | 8 +++++++- arch/arm/mach-omap2/prm_common.c | 11 +++++++++++ 7 files changed, 57 insertions(+), 4 deletions(-) diff --git a/arch/arm/boot/dts/omap3.dtsi b/arch/arm/boot/dts/omap3.dtsi index 7d95cda1fae4..695e2d34c9c6 100644 --- a/arch/arm/boot/dts/omap3.dtsi +++ b/arch/arm/boot/dts/omap3.dtsi @@ -107,6 +107,8 @@ reg = <0x48002030 0x05cc>; #address-cells = <1>; #size-cells = <0>; + #interrupt-cells = <1>; + interrupt-controller; pinctrl-single,register-width = <16>; pinctrl-single,function-mask = <0x7f1f>; }; @@ -116,6 +118,8 @@ reg = <0x48002a00 0x5c>; #address-cells = <1>; #size-cells = <0>; + #interrupt-cells = <1>; + interrupt-controller; pinctrl-single,register-width = <16>; pinctrl-single,function-mask = <0x7f1f>; }; diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi index 22d9f2b593d4..0415d5ed6014 100644 --- a/arch/arm/boot/dts/omap4.dtsi +++ b/arch/arm/boot/dts/omap4.dtsi @@ -114,6 +114,8 @@ reg = <0x4a100040 0x0196>; #address-cells = <1>; #size-cells = <0>; + #interrupt-cells = <1>; + interrupt-controller; pinctrl-single,register-width = <16>; pinctrl-single,function-mask = <0x7fff>; }; @@ -122,6 +124,8 @@ reg = <0x4a31e040 0x0038>; #address-cells = <1>; #size-cells = <0>; + #interrupt-cells = <1>; + interrupt-controller; pinctrl-single,register-width = <16>; pinctrl-single,function-mask = <0x7fff>; }; diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c index f82cf878d6af..48094b58c88f 100644 --- a/arch/arm/mach-omap2/mux.c +++ b/arch/arm/mach-omap2/mux.c @@ -811,6 +811,12 @@ int __init omap_mux_late_init(void) } } + omap_mux_dbg_init(); + + /* see pinctrl-single-omap for the wake-up interrupt handling */ + if (of_have_populated_dt()) + return 0; + ret = request_irq(omap_prcm_event_to_irq("io"), omap_hwmod_mux_handle_irq, IRQF_SHARED | IRQF_NO_SUSPEND, "hwmod_io", omap_mux_late_init); @@ -818,8 +824,6 @@ int __init omap_mux_late_init(void) if (ret) pr_warning("mux: Failed to setup hwmod io irq %d\n", ret); - omap_mux_dbg_init(); - return 0; } diff --git a/arch/arm/mach-omap2/pdata-quirks.c b/arch/arm/mach-omap2/pdata-quirks.c index 76abc5b63d6d..18afbde020f7 100644 --- a/arch/arm/mach-omap2/pdata-quirks.c +++ b/arch/arm/mach-omap2/pdata-quirks.c @@ -14,6 +14,8 @@ #include #include +#include + #include "common.h" #include "common-board-devices.h" #include "dss-common.h" @@ -105,7 +107,23 @@ static void __init omap5_uevm_legacy_init(void) } #endif +static struct pcs_pdata pcs_pdata; + +void omap_pcs_legacy_init(int irq, void (*rearm)(void)) +{ + pcs_pdata.irq = irq; + pcs_pdata.rearm = rearm; +} + struct of_dev_auxdata omap_auxdata_lookup[] __initdata = { +#ifdef CONFIG_ARCH_OMAP3 + OF_DEV_AUXDATA("ti,omap3-padconf", 0x48002030, "48002030.pinmux", &pcs_pdata), + OF_DEV_AUXDATA("ti,omap3-padconf", 0x48002a00, "48002a00.pinmux", &pcs_pdata), +#endif +#ifdef CONFIG_ARCH_OMAP4 + OF_DEV_AUXDATA("ti,omap4-padconf", 0x4a100040, "4a100040.pinmux", &pcs_pdata), + OF_DEV_AUXDATA("ti,omap4-padconf", 0x4a31e040, "4a31e040.pinmux", &pcs_pdata), +#endif { /* sentinel */ }, }; diff --git a/arch/arm/mach-omap2/prm3xxx.h b/arch/arm/mach-omap2/prm3xxx.h index 277f71794e61..f8eb83323b1a 100644 --- a/arch/arm/mach-omap2/prm3xxx.h +++ b/arch/arm/mach-omap2/prm3xxx.h @@ -144,7 +144,13 @@ extern u32 omap3_prm_vcvp_read(u8 offset); extern void omap3_prm_vcvp_write(u32 val, u8 offset); extern u32 omap3_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset); -extern void omap3xxx_prm_reconfigure_io_chain(void); +#ifdef CONFIG_ARCH_OMAP3 +void omap3xxx_prm_reconfigure_io_chain(void); +#else +static inline void omap3xxx_prm_reconfigure_io_chain(void) +{ +} +#endif /* PRM interrupt-related functions */ extern void omap3xxx_prm_read_pending_irqs(unsigned long *events); diff --git a/arch/arm/mach-omap2/prm44xx_54xx.h b/arch/arm/mach-omap2/prm44xx_54xx.h index 7cd22abb8f15..a085d9cc1f5d 100644 --- a/arch/arm/mach-omap2/prm44xx_54xx.h +++ b/arch/arm/mach-omap2/prm44xx_54xx.h @@ -42,7 +42,13 @@ extern u32 omap4_prm_vcvp_read(u8 offset); extern void omap4_prm_vcvp_write(u32 val, u8 offset); extern u32 omap4_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset); -extern void omap44xx_prm_reconfigure_io_chain(void); +#if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5) +void omap44xx_prm_reconfigure_io_chain(void); +#else +static inline void omap44xx_prm_reconfigure_io_chain(void) +{ +} +#endif /* PRM interrupt-related functions */ extern void omap44xx_prm_read_pending_irqs(unsigned long *events); diff --git a/arch/arm/mach-omap2/prm_common.c b/arch/arm/mach-omap2/prm_common.c index 228b850e632f..a2e1174ad1b6 100644 --- a/arch/arm/mach-omap2/prm_common.c +++ b/arch/arm/mach-omap2/prm_common.c @@ -24,6 +24,7 @@ #include #include +#include "soc.h" #include "prm2xxx_3xxx.h" #include "prm2xxx.h" #include "prm3xxx.h" @@ -322,6 +323,16 @@ int omap_prcm_register_chain_handler(struct omap_prcm_irq_setup *irq_setup) prcm_irq_chips[i] = gc; } + if (of_have_populated_dt()) { + int irq = omap_prcm_event_to_irq("io"); + if (cpu_is_omap34xx()) + omap_pcs_legacy_init(irq, + omap3xxx_prm_reconfigure_io_chain); + else + omap_pcs_legacy_init(irq, + omap44xx_prm_reconfigure_io_chain); + } + return 0; err: -- cgit v1.2.3 From 79b39f7918559da88be9463fc8b6674dd1ca2896 Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Fri, 11 Oct 2013 09:20:54 -0700 Subject: ARM: OMAP2+: Use pdata quirks for wl12xx for omap3 evm and zoom3 As the wl12xx bindings are still pending, this way we can get things working for omap3 evm and zoom platforms. Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/pdata-quirks.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/arm/mach-omap2/pdata-quirks.c b/arch/arm/mach-omap2/pdata-quirks.c index 18afbde020f7..10c71450cf63 100644 --- a/arch/arm/mach-omap2/pdata-quirks.c +++ b/arch/arm/mach-omap2/pdata-quirks.c @@ -82,6 +82,16 @@ static void __init omap3_igep0020_legacy_init(void) { omap3_igep2_display_init_of(); } + +static void __init omap3_evm_legacy_init(void) +{ + legacy_init_wl12xx(WL12XX_REFCLOCK_38, 0, 149); +} + +static void __init omap3_zoom_legacy_init(void) +{ + legacy_init_wl12xx(WL12XX_REFCLOCK_26, 0, 162); +} #endif /* CONFIG_ARCH_OMAP3 */ #ifdef CONFIG_ARCH_OMAP4 @@ -132,6 +142,8 @@ static struct pdata_init pdata_quirks[] __initdata = { { "nokia,omap3-n9", hsmmc2_internal_input_clk, }, { "nokia,omap3-n950", hsmmc2_internal_input_clk, }, { "isee,omap3-igep0020", omap3_igep0020_legacy_init, }, + { "ti,omap3-evm-37xx", omap3_evm_legacy_init, }, + { "ti,omap3-zoom3", omap3_zoom_legacy_init, }, #endif #ifdef CONFIG_ARCH_OMAP4 { "ti,omap4-sdp", omap4_sdp_legacy_init, }, -- cgit v1.2.3 From f2bf0e72d000e76c4a9904cc8230cb2e659a2db4 Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Fri, 11 Oct 2013 09:21:26 -0700 Subject: ARM: OMAP2+: Add minimal 8250 support for GPMC Just initialize things using the bootloader timings like we've been doing for the legacy booting too. It should be possible to patch in the GPMC timings for the based on the TL16CP743C/TL16C754C manual at: http://www.ti.com/lit/ds/slls644g/slls644g.pdf Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/gpmc.c | 38 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 38 insertions(+) diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c index 579697adaae7..51525faa0aec 100644 --- a/arch/arm/mach-omap2/gpmc.c +++ b/arch/arm/mach-omap2/gpmc.c @@ -1521,6 +1521,42 @@ err: return ret; } +/* + * REVISIT: Add timing support from slls644g.pdf + */ +static int gpmc_probe_8250(struct platform_device *pdev, + struct device_node *child) +{ + struct resource res; + unsigned long base; + int ret, cs; + + if (of_property_read_u32(child, "reg", &cs) < 0) { + dev_err(&pdev->dev, "%s has no 'reg' property\n", + child->full_name); + return -ENODEV; + } + + if (of_address_to_resource(child, 0, &res) < 0) { + dev_err(&pdev->dev, "%s has malformed 'reg' property\n", + child->full_name); + return -ENODEV; + } + + ret = gpmc_cs_request(cs, resource_size(&res), &base); + if (ret < 0) { + dev_err(&pdev->dev, "cannot request GPMC CS %d\n", cs); + return ret; + } + + if (of_platform_device_create(child, NULL, &pdev->dev)) + return 0; + + dev_err(&pdev->dev, "failed to create gpmc child %s\n", child->name); + + return -ENODEV; +} + static int gpmc_probe_dt(struct platform_device *pdev) { int ret; @@ -1564,6 +1600,8 @@ static int gpmc_probe_dt(struct platform_device *pdev) else if (of_node_cmp(child->name, "ethernet") == 0 || of_node_cmp(child->name, "nor") == 0) ret = gpmc_probe_generic_child(pdev, child); + else if (of_node_cmp(child->name, "8250") == 0) + ret = gpmc_probe_8250(pdev, child); if (WARN(ret < 0, "%s: probing gpmc child %s failed\n", __func__, child->full_name)) -- cgit v1.2.3 From fb23ba55eaa603279744565caf26a7f64e370517 Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Fri, 11 Oct 2013 09:18:20 -0700 Subject: ARM: OMAP2+: Run make savedefconfig on omap2plus_defconfig to shrink it We can save few tens of lines this way, and it is easier to generate minimal patches against omap2plus_defconfig. Signed-off-by: Tony Lindgren --- arch/arm/configs/omap2plus_defconfig | 92 ++++++++++++------------------------ 1 file changed, 30 insertions(+), 62 deletions(-) diff --git a/arch/arm/configs/omap2plus_defconfig b/arch/arm/configs/omap2plus_defconfig index 254cf0539439..9549d6f29b50 100644 --- a/arch/arm/configs/omap2plus_defconfig +++ b/arch/arm/configs/omap2plus_defconfig @@ -1,14 +1,13 @@ -CONFIG_EXPERIMENTAL=y CONFIG_SYSVIPC=y CONFIG_POSIX_MQUEUE=y +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y CONFIG_BSD_PROCESS_ACCT=y CONFIG_IKCONFIG=y CONFIG_IKCONFIG_PROC=y CONFIG_LOG_BUF_SHIFT=16 CONFIG_BLK_DEV_INITRD=y CONFIG_EXPERT=y -# CONFIG_SYSCTL_SYSCALL is not set -CONFIG_KALLSYMS_EXTRA_PASS=y CONFIG_SLAB=y CONFIG_PROFILING=y CONFIG_OPROFILE=y @@ -20,22 +19,21 @@ CONFIG_MODULE_FORCE_UNLOAD=y CONFIG_MODVERSIONS=y CONFIG_MODULE_SRCVERSION_ALL=y # CONFIG_BLK_DEV_BSG is not set +CONFIG_PARTITION_ADVANCED=y CONFIG_ARCH_MULTI_V6=y -CONFIG_ARCH_OMAP2PLUS=y +CONFIG_OMAP_RESET_CLOCKS=y +CONFIG_OMAP_MUX_DEBUG=y CONFIG_ARCH_OMAP2=y CONFIG_ARCH_OMAP3=y CONFIG_ARCH_OMAP4=y +CONFIG_SOC_OMAP5=y CONFIG_SOC_AM33XX=y -CONFIG_OMAP_RESET_CLOCKS=y -CONFIG_OMAP_MUX_DEBUG=y -CONFIG_ARCH_VEXPRESS_CA9X4=y +CONFIG_SOC_DRA7XX=y CONFIG_ARM_THUMBEE=y CONFIG_ARM_ERRATA_411920=y -CONFIG_NO_HZ=y -CONFIG_HIGH_RES_TIMERS=y CONFIG_SMP=y CONFIG_NR_CPUS=2 -CONFIG_LEDS=y +CONFIG_CMA=y CONFIG_ZBOOT_ROM_TEXT=0x0 CONFIG_ZBOOT_ROM_BSS=0x0 CONFIG_ARM_APPENDED_DTB=y @@ -61,8 +59,6 @@ CONFIG_IP_PNP_RARP=y # CONFIG_IPV6 is not set CONFIG_NETFILTER=y CONFIG_CAN=m -CONFIG_CAN_RAW=m -CONFIG_CAN_BCM=m CONFIG_CAN_C_CAN=m CONFIG_CAN_C_CAN_PLATFORM=m CONFIG_BT=m @@ -77,14 +73,12 @@ CONFIG_MAC80211=m CONFIG_MAC80211_RC_PID=y CONFIG_MAC80211_RC_DEFAULT_PID=y CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" -CONFIG_CMA=y -CONFIG_DMA_CMA=y -CONFIG_CONNECTOR=y CONFIG_DEVTMPFS=y CONFIG_DEVTMPFS_MOUNT=y +CONFIG_DMA_CMA=y +CONFIG_CONNECTOR=y CONFIG_MTD=y CONFIG_MTD_CMDLINE_PARTS=y -CONFIG_MTD_CHAR=y CONFIG_MTD_BLOCK=y CONFIG_MTD_OOPS=y CONFIG_MTD_CFI=y @@ -98,32 +92,32 @@ CONFIG_MTD_UBI=y CONFIG_BLK_DEV_LOOP=y CONFIG_BLK_DEV_RAM=y CONFIG_BLK_DEV_RAM_SIZE=16384 -CONFIG_SENSORS_LIS3LV02D=m CONFIG_SENSORS_TSL2550=m -CONFIG_SENSORS_LIS3_I2C=m CONFIG_BMP085_I2C=m +CONFIG_SENSORS_LIS3_I2C=m CONFIG_SCSI=y CONFIG_BLK_DEV_SD=y CONFIG_SCSI_MULTI_LUN=y CONFIG_SCSI_SCAN_ASYNC=y CONFIG_MD=y CONFIG_NETDEVICES=y -CONFIG_SMSC_PHY=y -CONFIG_NET_ETHERNET=y -CONFIG_SMC91X=y -CONFIG_SMSC911X=y CONFIG_KS8851=y CONFIG_KS8851_MLL=y -CONFIG_LIBERTAS=m -CONFIG_LIBERTAS_USB=m -CONFIG_LIBERTAS_SDIO=m -CONFIG_LIBERTAS_DEBUG=y +CONFIG_SMC91X=y +CONFIG_SMSC911X=y +CONFIG_TI_CPSW=y +CONFIG_AT803X_PHY=y +CONFIG_SMSC_PHY=y CONFIG_USB_USBNET=y CONFIG_USB_NET_SMSC95XX=y CONFIG_USB_ALI_M5632=y CONFIG_USB_AN2720=y CONFIG_USB_EPSON2888=y CONFIG_USB_KC2190=y +CONFIG_LIBERTAS=m +CONFIG_LIBERTAS_USB=m +CONFIG_LIBERTAS_SDIO=m +CONFIG_LIBERTAS_DEBUG=y CONFIG_INPUT_JOYDEV=y CONFIG_INPUT_EVDEV=y CONFIG_KEYBOARD_GPIO=y @@ -133,7 +127,6 @@ CONFIG_INPUT_TOUCHSCREEN=y CONFIG_TOUCHSCREEN_ADS7846=y CONFIG_INPUT_MISC=y CONFIG_INPUT_TWL4030_PWRBUTTON=y -CONFIG_VT_HW_CONSOLE_BINDING=y # CONFIG_LEGACY_PTYS is not set CONFIG_SERIAL_8250=y CONFIG_SERIAL_8250_CONSOLE=y @@ -143,8 +136,6 @@ CONFIG_SERIAL_8250_MANY_PORTS=y CONFIG_SERIAL_8250_SHARE_IRQ=y CONFIG_SERIAL_8250_DETECT_IRQ=y CONFIG_SERIAL_8250_RSA=y -CONFIG_SERIAL_AMBA_PL011=y -CONFIG_SERIAL_AMBA_PL011_CONSOLE=y CONFIG_SERIAL_OMAP=y CONFIG_SERIAL_OMAP_CONSOLE=y CONFIG_HW_RANDOM=y @@ -158,31 +149,29 @@ CONFIG_GPIO_TWL4030=y CONFIG_W1=y CONFIG_POWER_SUPPLY=y CONFIG_SENSORS_LM75=m -CONFIG_WATCHDOG=y CONFIG_THERMAL=y -CONFIG_THERMAL_HWMON=y -CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y CONFIG_THERMAL_GOV_FAIR_SHARE=y -CONFIG_THERMAL_GOV_STEP_WISE=y CONFIG_THERMAL_GOV_USER_SPACE=y -CONFIG_CPU_THERMAL=y +CONFIG_TI_SOC_THERMAL=y +CONFIG_OMAP4_THERMAL=y +CONFIG_OMAP5_THERMAL=y +CONFIG_DRA752_THERMAL=y +CONFIG_WATCHDOG=y CONFIG_OMAP_WATCHDOG=y CONFIG_TWL4030_WATCHDOG=y CONFIG_MFD_TPS65217=y CONFIG_MFD_TPS65910=y CONFIG_TWL6040_CORE=y -CONFIG_REGULATOR_TWL4030=y CONFIG_REGULATOR_TPS65023=y CONFIG_REGULATOR_TPS6507X=y CONFIG_REGULATOR_TPS65217=y CONFIG_REGULATOR_TPS65910=y +CONFIG_REGULATOR_TWL4030=y CONFIG_FB=y CONFIG_FIRMWARE_EDID=y CONFIG_FB_MODE_HELPERS=y CONFIG_FB_TILEBLITTING=y -CONFIG_FB_OMAP_LCD_VGA=y CONFIG_OMAP2_DSS=m -CONFIG_OMAP2_DSS_RFBI=y CONFIG_OMAP2_DSS_SDI=y CONFIG_OMAP2_DSS_DSI=y CONFIG_FB_OMAP2=m @@ -194,12 +183,8 @@ CONFIG_DISPLAY_PANEL_DPI=m CONFIG_BACKLIGHT_LCD_SUPPORT=y CONFIG_LCD_CLASS_DEVICE=y CONFIG_LCD_PLATFORM=y -CONFIG_DISPLAY_SUPPORT=y CONFIG_FRAMEBUFFER_CONSOLE=y CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y -CONFIG_FONTS=y -CONFIG_FONT_8x8=y -CONFIG_FONT_8x16=y CONFIG_LOGO=y CONFIG_SOUND=m CONFIG_SND=m @@ -216,13 +201,10 @@ CONFIG_SND_OMAP_SOC_OMAP3_PANDORA=m CONFIG_USB=y CONFIG_USB_DEBUG=y CONFIG_USB_ANNOUNCE_NEW_DEVICES=y -CONFIG_USB_DEVICEFS=y CONFIG_USB_MON=y CONFIG_USB_WDM=y CONFIG_USB_STORAGE=y -CONFIG_USB_LIBUSUAL=y CONFIG_USB_TEST=y -CONFIG_USB_PHY=y CONFIG_NOP_USB_XCEIV=y CONFIG_USB_GADGET=y CONFIG_USB_GADGET_DEBUG=y @@ -232,7 +214,6 @@ CONFIG_USB_ZERO=m CONFIG_MMC=y CONFIG_MMC_UNSAFE_RESUME=y CONFIG_SDIO_UART=y -CONFIG_MMC_ARMMMCI=y CONFIG_MMC_OMAP=y CONFIG_MMC_OMAP_HS=y CONFIG_NEW_LEDS=y @@ -252,11 +233,6 @@ CONFIG_RTC_DRV_OMAP=y CONFIG_DMADEVICES=y CONFIG_TI_EDMA=y CONFIG_DMA_OMAP=y -CONFIG_TI_SOC_THERMAL=y -CONFIG_TI_THERMAL=y -CONFIG_OMAP4_THERMAL=y -CONFIG_OMAP5_THERMAL=y -CONFIG_DRA752_THERMAL=y CONFIG_EXT2_FS=y CONFIG_EXT3_FS=y # CONFIG_EXT3_FS_XATTR is not set @@ -275,23 +251,18 @@ CONFIG_JFFS2_RUBIN=y CONFIG_UBIFS_FS=y CONFIG_CRAMFS=y CONFIG_NFS_FS=y -CONFIG_NFS_V3=y CONFIG_NFS_V3_ACL=y CONFIG_NFS_V4=y CONFIG_ROOT_NFS=y -CONFIG_PARTITION_ADVANCED=y CONFIG_NLS_CODEPAGE_437=y CONFIG_NLS_ISO8859_1=y CONFIG_PRINTK_TIME=y +CONFIG_DEBUG_INFO=y CONFIG_MAGIC_SYSRQ=y -CONFIG_DEBUG_KERNEL=y CONFIG_SCHEDSTATS=y CONFIG_TIMER_STATS=y CONFIG_PROVE_LOCKING=y -CONFIG_DEBUG_SPINLOCK_SLEEP=y # CONFIG_DEBUG_BUGVERBOSE is not set -CONFIG_DEBUG_INFO=y -# CONFIG_RCU_CPU_STALL_DETECTOR is not set CONFIG_SECURITY=y CONFIG_CRYPTO_MICHAEL_MIC=y # CONFIG_CRYPTO_ANSI_CPRNG is not set @@ -300,9 +271,6 @@ CONFIG_CRC_T10DIF=y CONFIG_CRC_ITU_T=y CONFIG_CRC7=y CONFIG_LIBCRC32C=y -CONFIG_SOC_OMAP5=y -CONFIG_TI_DAVINCI_MDIO=y -CONFIG_TI_DAVINCI_CPDMA=y -CONFIG_TI_CPSW=y -CONFIG_AT803X_PHY=y -CONFIG_SOC_DRA7XX=y +CONFIG_FONTS=y +CONFIG_FONT_8x8=y +CONFIG_FONT_8x16=y -- cgit v1.2.3 From 487e5f2868f16101eb0681ef4781e0c3dc0027b8 Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Fri, 11 Oct 2013 09:18:21 -0700 Subject: ARM: OMAP2+: Add WLAN modules and of_serial to omap2plus_defconfig Many boards have either WL12XX or MWIFIEX, so let's build modules for those by default. This also makes it easier to test WLAN on pandaboard to avoid regressions like we had with the move to device tree based booting. And at least the zoom boards need the of_serial for the UARTs connected to the GPMC bus. Signed-off-by: Tony Lindgren --- arch/arm/configs/omap2plus_defconfig | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm/configs/omap2plus_defconfig b/arch/arm/configs/omap2plus_defconfig index 9549d6f29b50..dad68166520f 100644 --- a/arch/arm/configs/omap2plus_defconfig +++ b/arch/arm/configs/omap2plus_defconfig @@ -118,6 +118,14 @@ CONFIG_LIBERTAS=m CONFIG_LIBERTAS_USB=m CONFIG_LIBERTAS_SDIO=m CONFIG_LIBERTAS_DEBUG=y +CONFIG_WL_TI=y +CONFIG_WL12XX=m +CONFIG_WL18XX=m +CONFIG_WLCORE_SPI=m +CONFIG_WLCORE_SDIO=m +CONFIG_MWIFIEX=m +CONFIG_MWIFIEX_SDIO=m +CONFIG_MWIFIEX_USB=m CONFIG_INPUT_JOYDEV=y CONFIG_INPUT_EVDEV=y CONFIG_KEYBOARD_GPIO=y @@ -136,6 +144,7 @@ CONFIG_SERIAL_8250_MANY_PORTS=y CONFIG_SERIAL_8250_SHARE_IRQ=y CONFIG_SERIAL_8250_DETECT_IRQ=y CONFIG_SERIAL_8250_RSA=y +CONFIG_SERIAL_OF_PLATFORM=y CONFIG_SERIAL_OMAP=y CONFIG_SERIAL_OMAP_CONSOLE=y CONFIG_HW_RANDOM=y -- cgit v1.2.3 From 505975d3802f8d3a3c0905f38056213d06997b36 Mon Sep 17 00:00:00 2001 From: Matt Porter Date: Tue, 10 Sep 2013 14:24:37 -0500 Subject: ARM: dts: AM33XX: Add EDMA support Adds AM33XX EDMA support to the am33xx.dtsi as documented in Documentation/devicetree/bindings/dma/ti-edma.txt [Joel Fernandes ] Drop DT entries that are non-hardware-description as discussed in [1] [1] https://patchwork.kernel.org/patch/2226761/ Signed-off-by: Matt Porter Signed-off-by: Joel A Fernandes Signed-off-by: Benoit Cousson --- arch/arm/boot/dts/am33xx.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi index a7731ead0b91..7a53e07e5a7a 100644 --- a/arch/arm/boot/dts/am33xx.dtsi +++ b/arch/arm/boot/dts/am33xx.dtsi @@ -105,6 +105,18 @@ reg = <0x48200000 0x1000>; }; + edma: edma@49000000 { + compatible = "ti,edma3"; + ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2"; + reg = <0x49000000 0x10000>, + <0x44e10f90 0x10>; + interrupts = <12 13 14>; + #dma-cells = <1>; + dma-channels = <64>; + ti,edma-regions = <4>; + ti,edma-slots = <256>; + }; + gpio0: gpio@44e07000 { compatible = "ti,omap4-gpio"; ti,hwmods = "gpio1"; -- cgit v1.2.3 From f5e2f807b730fa7f0683e515fe7483a5ebff9095 Mon Sep 17 00:00:00 2001 From: Matt Porter Date: Tue, 10 Sep 2013 14:24:38 -0500 Subject: ARM: dts: AM33XX: Add SPI DMA support Adds DMA resources to the AM33XX SPI nodes. Signed-off-by: Matt Porter Signed-off-by: Joel A Fernandes Signed-off-by: Benoit Cousson --- arch/arm/boot/dts/am33xx.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi index 7a53e07e5a7a..9cd60bf5edb5 100644 --- a/arch/arm/boot/dts/am33xx.dtsi +++ b/arch/arm/boot/dts/am33xx.dtsi @@ -340,6 +340,11 @@ interrupts = <65>; ti,spi-num-cs = <2>; ti,hwmods = "spi0"; + dmas = <&edma 16 + &edma 17 + &edma 18 + &edma 19>; + dma-names = "tx0", "rx0", "tx1", "rx1"; status = "disabled"; }; @@ -351,6 +356,11 @@ interrupts = <125>; ti,spi-num-cs = <2>; ti,hwmods = "spi1"; + dmas = <&edma 42 + &edma 43 + &edma 44 + &edma 45>; + dma-names = "tx0", "rx0", "tx1", "rx1"; status = "disabled"; }; -- cgit v1.2.3 From 55b4452b4b7082ecf3cc2095bc21762a901a8ca2 Mon Sep 17 00:00:00 2001 From: Matt Porter Date: Tue, 10 Sep 2013 14:24:39 -0500 Subject: ARM: dts: AM33XX: Add MMC support and documentation Adds AM33XX MMC support for am335x-bone, am335x-evm and am335x-evmsk boards. Also added is the DMA binding definitions based on the generic DMA request binding. Additional changes made to DTS: * Interrupt, reg and compatible properties added * ti,needs-special-hs-handling added Signed-off-by: Matt Porter Acked-by: Tony Lindgren Signed-off-by: Joel Fernandes Signed-off-by: Benoit Cousson --- .../devicetree/bindings/mmc/ti-omap-hsmmc.txt | 26 ++++++++++++++- arch/arm/boot/dts/am335x-bone.dts | 11 +++++++ arch/arm/boot/dts/am335x-evm.dts | 7 ++++ arch/arm/boot/dts/am335x-evmsk.dts | 7 ++++ arch/arm/boot/dts/am33xx.dtsi | 38 ++++++++++++++++++++++ 5 files changed, 88 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt b/Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt index ed271fc255b2..8c8908ab84ba 100644 --- a/Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt +++ b/Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt @@ -20,8 +20,29 @@ ti,dual-volt: boolean, supports dual voltage cards ti,non-removable: non-removable slot (like eMMC) ti,needs-special-reset: Requires a special softreset sequence ti,needs-special-hs-handling: HSMMC IP needs special setting for handling High Speed +dmas: List of DMA specifiers with the controller specific format +as described in the generic DMA client binding. A tx and rx +specifier is required. +dma-names: List of DMA request names. These strings correspond +1:1 with the DMA specifiers listed in dmas. The string naming is +to be "rx" and "tx" for RX and TX DMA requests, respectively. + +Examples: + +[hwmod populated DMA resources] + + mmc1: mmc@0x4809c000 { + compatible = "ti,omap4-hsmmc"; + reg = <0x4809c000 0x400>; + ti,hwmods = "mmc1"; + ti,dual-volt; + bus-width = <4>; + vmmc-supply = <&vmmc>; /* phandle to regulator node */ + ti,non-removable; + }; + +[generic DMA request binding] -Example: mmc1: mmc@0x4809c000 { compatible = "ti,omap4-hsmmc"; reg = <0x4809c000 0x400>; @@ -30,4 +51,7 @@ Example: bus-width = <4>; vmmc-supply = <&vmmc>; /* phandle to regulator node */ ti,non-removable; + dmas = <&edma 24 + &edma 25>; + dma-names = "tx", "rx"; }; diff --git a/arch/arm/boot/dts/am335x-bone.dts b/arch/arm/boot/dts/am335x-bone.dts index 7993c489982c..d5f43fe2bfe1 100644 --- a/arch/arm/boot/dts/am335x-bone.dts +++ b/arch/arm/boot/dts/am335x-bone.dts @@ -9,3 +9,14 @@ #include "am33xx.dtsi" #include "am335x-bone-common.dtsi" + +&ldo3_reg { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; +}; + +&mmc1 { + status = "okay"; + vmmc-supply = <&ldo3_reg>; +}; diff --git a/arch/arm/boot/dts/am335x-evm.dts b/arch/arm/boot/dts/am335x-evm.dts index e8ec8756e498..bc4a69d80fd8 100644 --- a/arch/arm/boot/dts/am335x-evm.dts +++ b/arch/arm/boot/dts/am335x-evm.dts @@ -477,6 +477,8 @@ }; vmmc_reg: regulator@12 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; regulator-always-on; }; }; @@ -517,3 +519,8 @@ ti,adc-channels = <4 5 6 7>; }; }; + +&mmc1 { + status = "okay"; + vmmc-supply = <&vmmc_reg>; +}; diff --git a/arch/arm/boot/dts/am335x-evmsk.dts b/arch/arm/boot/dts/am335x-evmsk.dts index 4f339fa91c57..55fd19487b8c 100644 --- a/arch/arm/boot/dts/am335x-evmsk.dts +++ b/arch/arm/boot/dts/am335x-evmsk.dts @@ -393,6 +393,8 @@ }; vmmc_reg: regulator@12 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; regulator-always-on; }; }; @@ -419,3 +421,8 @@ phy_id = <&davinci_mdio>, <1>; phy-mode = "rgmii-txid"; }; + +&mmc1 { + status = "okay"; + vmmc-supply = <&vmmc_reg>; +}; diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi index 9cd60bf5edb5..553adc6b535e 100644 --- a/arch/arm/boot/dts/am33xx.dtsi +++ b/arch/arm/boot/dts/am33xx.dtsi @@ -245,6 +245,44 @@ status = "disabled"; }; + mmc1: mmc@48060000 { + compatible = "ti,omap4-hsmmc"; + ti,hwmods = "mmc1"; + ti,dual-volt; + ti,needs-special-reset; + ti,needs-special-hs-handling; + dmas = <&edma 24 + &edma 25>; + dma-names = "tx", "rx"; + interrupts = <64>; + interrupt-parent = <&intc>; + reg = <0x48060000 0x1000>; + status = "disabled"; + }; + + mmc2: mmc@481d8000 { + compatible = "ti,omap4-hsmmc"; + ti,hwmods = "mmc2"; + ti,needs-special-reset; + dmas = <&edma 2 + &edma 3>; + dma-names = "tx", "rx"; + interrupts = <28>; + interrupt-parent = <&intc>; + reg = <0x481d8000 0x1000>; + status = "disabled"; + }; + + mmc3: mmc@47810000 { + compatible = "ti,omap4-hsmmc"; + ti,hwmods = "mmc3"; + ti,needs-special-reset; + interrupts = <29>; + interrupt-parent = <&intc>; + reg = <0x47810000 0x1000>; + status = "disabled"; + }; + wdt2: wdt@44e35000 { compatible = "ti,omap3-wdt"; ti,hwmods = "wd_timer2"; -- cgit v1.2.3 From 3045ffffcf5f334216ccb80697ac1a2ee5db179e Mon Sep 17 00:00:00 2001 From: Alexander Holler Date: Thu, 12 Sep 2013 20:35:32 +0200 Subject: ARM: dts: am335x-bone: add CD for mmc1 This enables the use of MMC cards even when no card was inserted at boot. Signed-off-by: Alexander Holler Signed-off-by: Koen Kooi Tested-by: Kevin Hilman Reviewed-by: Nishanth Menon Signed-off-by: Benoit Cousson --- arch/arm/boot/dts/am335x-bone-common.dtsi | 14 ++++++++++++++ arch/arm/boot/dts/am335x-bone.dts | 1 - 2 files changed, 14 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/am335x-bone-common.dtsi b/arch/arm/boot/dts/am335x-bone-common.dtsi index 2f66deda9f5c..0d95d54b6ae9 100644 --- a/arch/arm/boot/dts/am335x-bone-common.dtsi +++ b/arch/arm/boot/dts/am335x-bone-common.dtsi @@ -107,6 +107,12 @@ 0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7) >; }; + + mmc1_pins: pinmux_mmc1_pins { + pinctrl-single,pins = < + 0x160 (PIN_INPUT | MUX_MODE7) /* GPIO0_6 */ + >; + }; }; ocp { @@ -260,3 +266,11 @@ pinctrl-0 = <&davinci_mdio_default>; pinctrl-1 = <&davinci_mdio_sleep>; }; + +&mmc1 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&mmc1_pins>; + cd-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>; + cd-inverted; +}; diff --git a/arch/arm/boot/dts/am335x-bone.dts b/arch/arm/boot/dts/am335x-bone.dts index d5f43fe2bfe1..0d6334875df8 100644 --- a/arch/arm/boot/dts/am335x-bone.dts +++ b/arch/arm/boot/dts/am335x-bone.dts @@ -17,6 +17,5 @@ }; &mmc1 { - status = "okay"; vmmc-supply = <&ldo3_reg>; }; -- cgit v1.2.3 From 1aac4a990373cd53f75691e0901b029e29eb8190 Mon Sep 17 00:00:00 2001 From: Koen Kooi Date: Thu, 12 Sep 2013 20:35:33 +0200 Subject: ARM: dts: am335x-boneblack: add eMMC DT entry The pinmux is specified in am335x-bone-common.dtsi to be reused by the eMMC cape. Signed-off-by: Koen Kooi Tested-by: Kevin Hilman Reviewed-by: Nishanth Menon [bcousson@baylibre.com: Fix traling spaces and useless comments] Signed-off-by: Benoit Cousson --- arch/arm/boot/dts/am335x-bone-common.dtsi | 22 ++++++++++++++++++++++ arch/arm/boot/dts/am335x-boneblack.dts | 13 +++++++++++++ 2 files changed, 35 insertions(+) diff --git a/arch/arm/boot/dts/am335x-bone-common.dtsi b/arch/arm/boot/dts/am335x-bone-common.dtsi index 0d95d54b6ae9..c560cb7d3175 100644 --- a/arch/arm/boot/dts/am335x-bone-common.dtsi +++ b/arch/arm/boot/dts/am335x-bone-common.dtsi @@ -113,6 +113,21 @@ 0x160 (PIN_INPUT | MUX_MODE7) /* GPIO0_6 */ >; }; + + emmc_pins: pinmux_emmc_pins { + pinctrl-single,pins = < + 0x80 (PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */ + 0x84 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_csn2.mmc1_cmd */ + 0x00 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */ + 0x04 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */ + 0x08 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */ + 0x0c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */ + 0x10 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad4.mmc1_dat4 */ + 0x14 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad5.mmc1_dat5 */ + 0x18 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad6.mmc1_dat6 */ + 0x1c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */ + >; + }; }; ocp { @@ -242,6 +257,13 @@ regulator-always-on; }; }; + + vmmcsd_fixed: fixedregulator@0 { + compatible = "regulator-fixed"; + regulator-name = "vmmcsd_fixed"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; }; &cpsw_emac0 { diff --git a/arch/arm/boot/dts/am335x-boneblack.dts b/arch/arm/boot/dts/am335x-boneblack.dts index 197cadf72d2c..16b3bea61d46 100644 --- a/arch/arm/boot/dts/am335x-boneblack.dts +++ b/arch/arm/boot/dts/am335x-boneblack.dts @@ -15,3 +15,16 @@ regulator-max-microvolt = <1800000>; regulator-always-on; }; + +&mmc1 { + vmmc-supply = <&vmmcsd_fixed>; +}; + +&mmc2 { + vmmc-supply = <&vmmcsd_fixed>; + pinctrl-names = "default"; + pinctrl-0 = <&emmc_pins>; + bus-width = <8>; + status = "okay"; + ti,vcc-aux-disable-is-sleep; +}; -- cgit v1.2.3 From 757a90e66c4828ec60a13792c2774488a28ae98d Mon Sep 17 00:00:00 2001 From: Koen Kooi Date: Thu, 12 Sep 2013 20:35:34 +0200 Subject: ARM: dts: am335x-bone-common: switch mmc1 to 4-bit mode The micro-SD slot hooks up all four data pins so lets' use them. Signed-off-by: Koen Kooi Tested-by: Kevin Hilman Reviewed-by: Nishanth Menon Signed-off-by: Benoit Cousson --- arch/arm/boot/dts/am335x-bone-common.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/boot/dts/am335x-bone-common.dtsi b/arch/arm/boot/dts/am335x-bone-common.dtsi index c560cb7d3175..fbb11dd76f08 100644 --- a/arch/arm/boot/dts/am335x-bone-common.dtsi +++ b/arch/arm/boot/dts/am335x-bone-common.dtsi @@ -291,6 +291,7 @@ &mmc1 { status = "okay"; + bus-width = <0x4>; pinctrl-names = "default"; pinctrl-0 = <&mmc1_pins>; cd-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>; -- cgit v1.2.3 From ec8a75979f199fd6fdcf24f8d1c928a48c61483e Mon Sep 17 00:00:00 2001 From: Koen Kooi Date: Thu, 12 Sep 2013 20:35:35 +0200 Subject: ARM: dts: am335x-bone-common: add cpu0 and mmc1 triggers This matches the vendor 3.8.x configuration that is shipping with the boards. The LED layout is now: USR0: heartbeat USR1: mmc0 (micro-SD slot) USR2: cpu0 USR3: mmc1 (eMMC) The cpu0 triggers was put in between the mmc triggers to make is easier to see where the disk activity is. Signed-off-by: Koen Kooi Tested-by: Kevin Hilman Reviewed-by: Nishanth Menon Signed-off-by: Benoit Cousson --- arch/arm/boot/dts/am335x-bone-common.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/boot/dts/am335x-bone-common.dtsi b/arch/arm/boot/dts/am335x-bone-common.dtsi index fbb11dd76f08..56361ceb418b 100644 --- a/arch/arm/boot/dts/am335x-bone-common.dtsi +++ b/arch/arm/boot/dts/am335x-bone-common.dtsi @@ -204,12 +204,14 @@ led@4 { label = "beaglebone:green:usr2"; gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "cpu0"; default-state = "off"; }; led@5 { label = "beaglebone:green:usr3"; gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "mmc1"; default-state = "off"; }; }; -- cgit v1.2.3 From 82d75afcb718dc8fe9fcd71959bff7878df53076 Mon Sep 17 00:00:00 2001 From: Javier Martinez Canillas Date: Fri, 20 Sep 2013 17:00:00 +0200 Subject: ARM: dts: AM33XX: use pinmux node defined in included file am33xx boards DTS include the am33xx.dtsi Device Tree source file that already define a pinmux device node for the AM33XX SoC Pin Multiplex. Redefining this for each board makes the Device Tree files harder to modify and maintain so let's just use what is already defined in the included .dtsi file. Signed-off-by: Javier Martinez Canillas Signed-off-by: Benoit Cousson --- arch/arm/boot/dts/am335x-bone-common.dtsi | 218 ++++++++++++------------- arch/arm/boot/dts/am335x-evm.dts | 254 ++++++++++++++--------------- arch/arm/boot/dts/am335x-evmsk.dts | 258 +++++++++++++++--------------- 3 files changed, 365 insertions(+), 365 deletions(-) diff --git a/arch/arm/boot/dts/am335x-bone-common.dtsi b/arch/arm/boot/dts/am335x-bone-common.dtsi index 56361ceb418b..29799ac3423a 100644 --- a/arch/arm/boot/dts/am335x-bone-common.dtsi +++ b/arch/arm/boot/dts/am335x-bone-common.dtsi @@ -21,115 +21,6 @@ reg = <0x80000000 0x10000000>; /* 256 MB */ }; - am33xx_pinmux: pinmux@44e10800 { - pinctrl-names = "default"; - pinctrl-0 = <&clkout2_pin>; - - user_leds_s0: user_leds_s0 { - pinctrl-single,pins = < - 0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a5.gpio1_21 */ - 0x58 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a6.gpio1_22 */ - 0x5c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a7.gpio1_23 */ - 0x60 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a8.gpio1_24 */ - >; - }; - - i2c0_pins: pinmux_i2c0_pins { - pinctrl-single,pins = < - 0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */ - 0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */ - >; - }; - - uart0_pins: pinmux_uart0_pins { - pinctrl-single,pins = < - 0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */ - 0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */ - >; - }; - - clkout2_pin: pinmux_clkout2_pin { - pinctrl-single,pins = < - 0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */ - >; - }; - - cpsw_default: cpsw_default { - pinctrl-single,pins = < - /* Slave 1 */ - 0x110 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxerr.mii1_rxerr */ - 0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txen.mii1_txen */ - 0x118 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxdv.mii1_rxdv */ - 0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd3.mii1_txd3 */ - 0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd2.mii1_txd2 */ - 0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd1.mii1_txd1 */ - 0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd0.mii1_txd0 */ - 0x12c (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_txclk.mii1_txclk */ - 0x130 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxclk.mii1_rxclk */ - 0x134 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd3.mii1_rxd3 */ - 0x138 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd2.mii1_rxd2 */ - 0x13c (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd1.mii1_rxd1 */ - 0x140 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd0.mii1_rxd0 */ - >; - }; - - cpsw_sleep: cpsw_sleep { - pinctrl-single,pins = < - /* Slave 1 reset value */ - 0x110 (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7) - >; - }; - - davinci_mdio_default: davinci_mdio_default { - pinctrl-single,pins = < - /* MDIO */ - 0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */ - 0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */ - >; - }; - - davinci_mdio_sleep: davinci_mdio_sleep { - pinctrl-single,pins = < - /* MDIO reset value */ - 0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7) - >; - }; - - mmc1_pins: pinmux_mmc1_pins { - pinctrl-single,pins = < - 0x160 (PIN_INPUT | MUX_MODE7) /* GPIO0_6 */ - >; - }; - - emmc_pins: pinmux_emmc_pins { - pinctrl-single,pins = < - 0x80 (PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */ - 0x84 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_csn2.mmc1_cmd */ - 0x00 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */ - 0x04 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */ - 0x08 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */ - 0x0c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */ - 0x10 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad4.mmc1_dat4 */ - 0x14 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad5.mmc1_dat5 */ - 0x18 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad6.mmc1_dat6 */ - 0x1c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */ - >; - }; - }; - ocp { uart0: serial@44e09000 { pinctrl-names = "default"; @@ -217,6 +108,115 @@ }; }; +&am33xx_pinmux { + pinctrl-names = "default"; + pinctrl-0 = <&clkout2_pin>; + + user_leds_s0: user_leds_s0 { + pinctrl-single,pins = < + 0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a5.gpio1_21 */ + 0x58 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a6.gpio1_22 */ + 0x5c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a7.gpio1_23 */ + 0x60 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a8.gpio1_24 */ + >; + }; + + i2c0_pins: pinmux_i2c0_pins { + pinctrl-single,pins = < + 0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */ + 0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */ + >; + }; + + uart0_pins: pinmux_uart0_pins { + pinctrl-single,pins = < + 0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */ + 0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */ + >; + }; + + clkout2_pin: pinmux_clkout2_pin { + pinctrl-single,pins = < + 0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */ + >; + }; + + cpsw_default: cpsw_default { + pinctrl-single,pins = < + /* Slave 1 */ + 0x110 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxerr.mii1_rxerr */ + 0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txen.mii1_txen */ + 0x118 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxdv.mii1_rxdv */ + 0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd3.mii1_txd3 */ + 0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd2.mii1_txd2 */ + 0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd1.mii1_txd1 */ + 0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd0.mii1_txd0 */ + 0x12c (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_txclk.mii1_txclk */ + 0x130 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxclk.mii1_rxclk */ + 0x134 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd3.mii1_rxd3 */ + 0x138 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd2.mii1_rxd2 */ + 0x13c (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd1.mii1_rxd1 */ + 0x140 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd0.mii1_rxd0 */ + >; + }; + + cpsw_sleep: cpsw_sleep { + pinctrl-single,pins = < + /* Slave 1 reset value */ + 0x110 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7) + >; + }; + + davinci_mdio_default: davinci_mdio_default { + pinctrl-single,pins = < + /* MDIO */ + 0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */ + 0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */ + >; + }; + + davinci_mdio_sleep: davinci_mdio_sleep { + pinctrl-single,pins = < + /* MDIO reset value */ + 0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7) + >; + }; + + mmc1_pins: pinmux_mmc1_pins { + pinctrl-single,pins = < + 0x160 (PIN_INPUT | MUX_MODE7) /* GPIO0_6 */ + >; + }; + + emmc_pins: pinmux_emmc_pins { + pinctrl-single,pins = < + 0x80 (PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */ + 0x84 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_csn2.mmc1_cmd */ + 0x00 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */ + 0x04 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */ + 0x08 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */ + 0x0c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */ + 0x10 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad4.mmc1_dat4 */ + 0x14 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad5.mmc1_dat5 */ + 0x18 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad6.mmc1_dat6 */ + 0x1c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */ + >; + }; +}; + /include/ "tps65217.dtsi" &tps { diff --git a/arch/arm/boot/dts/am335x-evm.dts b/arch/arm/boot/dts/am335x-evm.dts index bc4a69d80fd8..1525cd6d4844 100644 --- a/arch/arm/boot/dts/am335x-evm.dts +++ b/arch/arm/boot/dts/am335x-evm.dts @@ -24,133 +24,6 @@ reg = <0x80000000 0x10000000>; /* 256 MB */ }; - am33xx_pinmux: pinmux@44e10800 { - pinctrl-names = "default"; - pinctrl-0 = <&matrix_keypad_s0 &volume_keys_s0 &clkout2_pin>; - - matrix_keypad_s0: matrix_keypad_s0 { - pinctrl-single,pins = < - 0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a5.gpio1_21 */ - 0x58 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a6.gpio1_22 */ - 0x64 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a9.gpio1_25 */ - 0x68 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a10.gpio1_26 */ - 0x6c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a11.gpio1_27 */ - >; - }; - - volume_keys_s0: volume_keys_s0 { - pinctrl-single,pins = < - 0x150 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* spi0_sclk.gpio0_2 */ - 0x154 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* spi0_d0.gpio0_3 */ - >; - }; - - i2c0_pins: pinmux_i2c0_pins { - pinctrl-single,pins = < - 0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */ - 0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */ - >; - }; - - i2c1_pins: pinmux_i2c1_pins { - pinctrl-single,pins = < - 0x158 (PIN_INPUT_PULLUP | MUX_MODE2) /* spi0_d1.i2c1_sda */ - 0x15c (PIN_INPUT_PULLUP | MUX_MODE2) /* spi0_cs0.i2c1_scl */ - >; - }; - - uart0_pins: pinmux_uart0_pins { - pinctrl-single,pins = < - 0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */ - 0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */ - >; - }; - - clkout2_pin: pinmux_clkout2_pin { - pinctrl-single,pins = < - 0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */ - >; - }; - - nandflash_pins_s0: nandflash_pins_s0 { - pinctrl-single,pins = < - 0x0 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad0.gpmc_ad0 */ - 0x4 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad1.gpmc_ad1 */ - 0x8 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad2.gpmc_ad2 */ - 0xc (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad3.gpmc_ad3 */ - 0x10 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad4.gpmc_ad4 */ - 0x14 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad5.gpmc_ad5 */ - 0x18 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad6.gpmc_ad6 */ - 0x1c (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad7.gpmc_ad7 */ - 0x70 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_wait0.gpmc_wait0 */ - 0x74 (PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_wpn.gpio0_30 */ - 0x7c (PIN_OUTPUT | MUX_MODE0) /* gpmc_csn0.gpmc_csn0 */ - 0x90 (PIN_OUTPUT | MUX_MODE0) /* gpmc_advn_ale.gpmc_advn_ale */ - 0x94 (PIN_OUTPUT | MUX_MODE0) /* gpmc_oen_ren.gpmc_oen_ren */ - 0x98 (PIN_OUTPUT | MUX_MODE0) /* gpmc_wen.gpmc_wen */ - 0x9c (PIN_OUTPUT | MUX_MODE0) /* gpmc_be0n_cle.gpmc_be0n_cle */ - >; - }; - - ecap0_pins: backlight_pins { - pinctrl-single,pins = < - 0x164 0x0 /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out MODE0 */ - >; - }; - - cpsw_default: cpsw_default { - pinctrl-single,pins = < - /* Slave 1 */ - 0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txen.rgmii1_tctl */ - 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */ - 0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd3.rgmii1_td3 */ - 0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd2.rgmii1_td2 */ - 0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_td1 */ - 0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_td0 */ - 0x12c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txclk.rgmii1_tclk */ - 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxclk.rgmii1_rclk */ - 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd3.rgmii1_rd3 */ - 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd2.rgmii1_rd2 */ - 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */ - 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */ - >; - }; - - cpsw_sleep: cpsw_sleep { - pinctrl-single,pins = < - /* Slave 1 reset value */ - 0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7) - >; - }; - - davinci_mdio_default: davinci_mdio_default { - pinctrl-single,pins = < - /* MDIO */ - 0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */ - 0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */ - >; - }; - - davinci_mdio_sleep: davinci_mdio_sleep { - pinctrl-single,pins = < - /* MDIO reset value */ - 0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7) - >; - }; - }; - ocp { uart0: serial@44e09000 { pinctrl-names = "default"; @@ -405,6 +278,133 @@ }; }; +&am33xx_pinmux { + pinctrl-names = "default"; + pinctrl-0 = <&matrix_keypad_s0 &volume_keys_s0 &clkout2_pin>; + + matrix_keypad_s0: matrix_keypad_s0 { + pinctrl-single,pins = < + 0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a5.gpio1_21 */ + 0x58 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a6.gpio1_22 */ + 0x64 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a9.gpio1_25 */ + 0x68 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a10.gpio1_26 */ + 0x6c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a11.gpio1_27 */ + >; + }; + + volume_keys_s0: volume_keys_s0 { + pinctrl-single,pins = < + 0x150 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* spi0_sclk.gpio0_2 */ + 0x154 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* spi0_d0.gpio0_3 */ + >; + }; + + i2c0_pins: pinmux_i2c0_pins { + pinctrl-single,pins = < + 0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */ + 0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */ + >; + }; + + i2c1_pins: pinmux_i2c1_pins { + pinctrl-single,pins = < + 0x158 (PIN_INPUT_PULLUP | MUX_MODE2) /* spi0_d1.i2c1_sda */ + 0x15c (PIN_INPUT_PULLUP | MUX_MODE2) /* spi0_cs0.i2c1_scl */ + >; + }; + + uart0_pins: pinmux_uart0_pins { + pinctrl-single,pins = < + 0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */ + 0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */ + >; + }; + + clkout2_pin: pinmux_clkout2_pin { + pinctrl-single,pins = < + 0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */ + >; + }; + + nandflash_pins_s0: nandflash_pins_s0 { + pinctrl-single,pins = < + 0x0 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad0.gpmc_ad0 */ + 0x4 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad1.gpmc_ad1 */ + 0x8 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad2.gpmc_ad2 */ + 0xc (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad3.gpmc_ad3 */ + 0x10 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad4.gpmc_ad4 */ + 0x14 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad5.gpmc_ad5 */ + 0x18 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad6.gpmc_ad6 */ + 0x1c (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad7.gpmc_ad7 */ + 0x70 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_wait0.gpmc_wait0 */ + 0x74 (PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_wpn.gpio0_30 */ + 0x7c (PIN_OUTPUT | MUX_MODE0) /* gpmc_csn0.gpmc_csn0 */ + 0x90 (PIN_OUTPUT | MUX_MODE0) /* gpmc_advn_ale.gpmc_advn_ale */ + 0x94 (PIN_OUTPUT | MUX_MODE0) /* gpmc_oen_ren.gpmc_oen_ren */ + 0x98 (PIN_OUTPUT | MUX_MODE0) /* gpmc_wen.gpmc_wen */ + 0x9c (PIN_OUTPUT | MUX_MODE0) /* gpmc_be0n_cle.gpmc_be0n_cle */ + >; + }; + + ecap0_pins: backlight_pins { + pinctrl-single,pins = < + 0x164 0x0 /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out MODE0 */ + >; + }; + + cpsw_default: cpsw_default { + pinctrl-single,pins = < + /* Slave 1 */ + 0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txen.rgmii1_tctl */ + 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */ + 0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd3.rgmii1_td3 */ + 0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd2.rgmii1_td2 */ + 0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_td1 */ + 0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_td0 */ + 0x12c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txclk.rgmii1_tclk */ + 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxclk.rgmii1_rclk */ + 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd3.rgmii1_rd3 */ + 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd2.rgmii1_rd2 */ + 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */ + 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */ + >; + }; + + cpsw_sleep: cpsw_sleep { + pinctrl-single,pins = < + /* Slave 1 reset value */ + 0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7) + >; + }; + + davinci_mdio_default: davinci_mdio_default { + pinctrl-single,pins = < + /* MDIO */ + 0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */ + 0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */ + >; + }; + + davinci_mdio_sleep: davinci_mdio_sleep { + pinctrl-single,pins = < + /* MDIO reset value */ + 0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7) + >; + }; +}; + #include "tps65910.dtsi" &tps { diff --git a/arch/arm/boot/dts/am335x-evmsk.dts b/arch/arm/boot/dts/am335x-evmsk.dts index 55fd19487b8c..f0066fe5d739 100644 --- a/arch/arm/boot/dts/am335x-evmsk.dts +++ b/arch/arm/boot/dts/am335x-evmsk.dts @@ -31,135 +31,6 @@ reg = <0x80000000 0x10000000>; /* 256 MB */ }; - am33xx_pinmux: pinmux@44e10800 { - pinctrl-names = "default"; - pinctrl-0 = <&gpio_keys_s0 &clkout2_pin>; - - user_leds_s0: user_leds_s0 { - pinctrl-single,pins = < - 0x10 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad4.gpio1_4 */ - 0x14 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad5.gpio1_5 */ - 0x18 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad6.gpio1_6 */ - 0x1c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad7.gpio1_7 */ - >; - }; - - gpio_keys_s0: gpio_keys_s0 { - pinctrl-single,pins = < - 0x94 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_oen_ren.gpio2_3 */ - 0x90 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_advn_ale.gpio2_2 */ - 0x70 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_wait0.gpio0_30 */ - 0x9c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ben0_cle.gpio2_5 */ - >; - }; - - i2c0_pins: pinmux_i2c0_pins { - pinctrl-single,pins = < - 0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */ - 0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */ - >; - }; - - uart0_pins: pinmux_uart0_pins { - pinctrl-single,pins = < - 0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */ - 0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */ - >; - }; - - clkout2_pin: pinmux_clkout2_pin { - pinctrl-single,pins = < - 0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */ - >; - }; - - ecap2_pins: backlight_pins { - pinctrl-single,pins = < - 0x19c 0x4 /* mcasp0_ahclkr.ecap2_in_pwm2_out MODE4 */ - >; - }; - - cpsw_default: cpsw_default { - pinctrl-single,pins = < - /* Slave 1 */ - 0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txen.rgmii1_tctl */ - 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */ - 0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd3.rgmii1_td3 */ - 0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd2.rgmii1_td2 */ - 0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_td1 */ - 0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_td0 */ - 0x12c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txclk.rgmii1_tclk */ - 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxclk.rgmii1_rclk */ - 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd3.rgmii1_rd3 */ - 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd2.rgmii1_rd2 */ - 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */ - 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */ - - /* Slave 2 */ - 0x40 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a0.rgmii2_tctl */ - 0x44 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a1.rgmii2_rctl */ - 0x48 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a2.rgmii2_td3 */ - 0x4c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a3.rgmii2_td2 */ - 0x50 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a4.rgmii2_td1 */ - 0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a5.rgmii2_td0 */ - 0x58 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a6.rgmii2_tclk */ - 0x5c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a7.rgmii2_rclk */ - 0x60 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a8.rgmii2_rd3 */ - 0x64 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a9.rgmii2_rd2 */ - 0x68 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a10.rgmii2_rd1 */ - 0x6c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a11.rgmii2_rd0 */ - >; - }; - - cpsw_sleep: cpsw_sleep { - pinctrl-single,pins = < - /* Slave 1 reset value */ - 0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7) - - /* Slave 2 reset value*/ - 0x40 (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x44 (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x48 (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x4c (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x50 (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x54 (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x58 (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x5c (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x60 (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x64 (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x68 (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x6c (PIN_INPUT_PULLDOWN | MUX_MODE7) - >; - }; - - davinci_mdio_default: davinci_mdio_default { - pinctrl-single,pins = < - /* MDIO */ - 0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */ - 0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */ - >; - }; - - davinci_mdio_sleep: davinci_mdio_sleep { - pinctrl-single,pins = < - /* MDIO reset value */ - 0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7) - >; - }; - }; - ocp { uart0: serial@44e09000 { pinctrl-names = "default"; @@ -321,6 +192,135 @@ }; }; +&am33xx_pinmux { + pinctrl-names = "default"; + pinctrl-0 = <&gpio_keys_s0 &clkout2_pin>; + + user_leds_s0: user_leds_s0 { + pinctrl-single,pins = < + 0x10 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad4.gpio1_4 */ + 0x14 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad5.gpio1_5 */ + 0x18 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad6.gpio1_6 */ + 0x1c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad7.gpio1_7 */ + >; + }; + + gpio_keys_s0: gpio_keys_s0 { + pinctrl-single,pins = < + 0x94 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_oen_ren.gpio2_3 */ + 0x90 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_advn_ale.gpio2_2 */ + 0x70 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_wait0.gpio0_30 */ + 0x9c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ben0_cle.gpio2_5 */ + >; + }; + + i2c0_pins: pinmux_i2c0_pins { + pinctrl-single,pins = < + 0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */ + 0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */ + >; + }; + + uart0_pins: pinmux_uart0_pins { + pinctrl-single,pins = < + 0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */ + 0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */ + >; + }; + + clkout2_pin: pinmux_clkout2_pin { + pinctrl-single,pins = < + 0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */ + >; + }; + + ecap2_pins: backlight_pins { + pinctrl-single,pins = < + 0x19c 0x4 /* mcasp0_ahclkr.ecap2_in_pwm2_out MODE4 */ + >; + }; + + cpsw_default: cpsw_default { + pinctrl-single,pins = < + /* Slave 1 */ + 0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txen.rgmii1_tctl */ + 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */ + 0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd3.rgmii1_td3 */ + 0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd2.rgmii1_td2 */ + 0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_td1 */ + 0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_td0 */ + 0x12c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txclk.rgmii1_tclk */ + 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxclk.rgmii1_rclk */ + 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd3.rgmii1_rd3 */ + 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd2.rgmii1_rd2 */ + 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */ + 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */ + + /* Slave 2 */ + 0x40 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a0.rgmii2_tctl */ + 0x44 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a1.rgmii2_rctl */ + 0x48 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a2.rgmii2_td3 */ + 0x4c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a3.rgmii2_td2 */ + 0x50 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a4.rgmii2_td1 */ + 0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a5.rgmii2_td0 */ + 0x58 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a6.rgmii2_tclk */ + 0x5c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a7.rgmii2_rclk */ + 0x60 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a8.rgmii2_rd3 */ + 0x64 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a9.rgmii2_rd2 */ + 0x68 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a10.rgmii2_rd1 */ + 0x6c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a11.rgmii2_rd0 */ + >; + }; + + cpsw_sleep: cpsw_sleep { + pinctrl-single,pins = < + /* Slave 1 reset value */ + 0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7) + + /* Slave 2 reset value*/ + 0x40 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x44 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x48 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x4c (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x50 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x54 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x58 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x5c (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x60 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x64 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x68 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x6c (PIN_INPUT_PULLDOWN | MUX_MODE7) + >; + }; + + davinci_mdio_default: davinci_mdio_default { + pinctrl-single,pins = < + /* MDIO */ + 0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */ + 0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */ + >; + }; + + davinci_mdio_sleep: davinci_mdio_sleep { + pinctrl-single,pins = < + /* MDIO reset value */ + 0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7) + >; + }; +}; + #include "tps65910.dtsi" &tps { -- cgit v1.2.3 From e0efaafbb5ba9bffe44c0ae838e5fd81632868b7 Mon Sep 17 00:00:00 2001 From: Javier Martinez Canillas Date: Fri, 20 Sep 2013 17:42:19 +0200 Subject: ARM: dts: AM33XX: don't redefine OCP bus and device nodes The On Chip Peripherals (OCP) device node is a simplified representation of the AM33XX SoC interconnect. An OCP dev node is already defined in the am33xx.dtsi Device Tree source file included by am33xx based boards so there is no need to redefine this on each board DT file. Also, the OCP and IP modules directly connected to it are SoC internal details that is better to keep outside of board files. Signed-off-by: Javier Martinez Canillas Signed-off-by: Benoit Cousson --- arch/arm/boot/dts/am335x-bone-common.dtsi | 100 ++++---- arch/arm/boot/dts/am335x-evm.dts | 380 +++++++++++++++--------------- arch/arm/boot/dts/am335x-evmsk.dts | 148 ++++++------ 3 files changed, 311 insertions(+), 317 deletions(-) diff --git a/arch/arm/boot/dts/am335x-bone-common.dtsi b/arch/arm/boot/dts/am335x-bone-common.dtsi index 29799ac3423a..ff5c3cafbdff 100644 --- a/arch/arm/boot/dts/am335x-bone-common.dtsi +++ b/arch/arm/boot/dts/am335x-bone-common.dtsi @@ -21,57 +21,6 @@ reg = <0x80000000 0x10000000>; /* 256 MB */ }; - ocp { - uart0: serial@44e09000 { - pinctrl-names = "default"; - pinctrl-0 = <&uart0_pins>; - - status = "okay"; - }; - - musb: usb@47400000 { - status = "okay"; - - control@44e10000 { - status = "okay"; - }; - - usb-phy@47401300 { - status = "okay"; - }; - - usb-phy@47401b00 { - status = "okay"; - }; - - usb@47401000 { - status = "okay"; - }; - - usb@47401800 { - status = "okay"; - dr_mode = "host"; - }; - - dma-controller@07402000 { - status = "okay"; - }; - }; - - i2c0: i2c@44e0b000 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c0_pins>; - - status = "okay"; - clock-frequency = <400000>; - - tps: tps@24 { - reg = <0x24>; - }; - - }; - }; - leds { pinctrl-names = "default"; pinctrl-0 = <&user_leds_s0>; @@ -217,6 +166,55 @@ }; }; +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pins>; + + status = "okay"; +}; + +&usb { + status = "okay"; + + control@44e10000 { + status = "okay"; + }; + + usb-phy@47401300 { + status = "okay"; + }; + + usb-phy@47401b00 { + status = "okay"; + }; + + usb@47401000 { + status = "okay"; + }; + + usb@47401800 { + status = "okay"; + dr_mode = "host"; + }; + + dma-controller@07402000 { + status = "okay"; + }; +}; + +&i2c0 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c0_pins>; + + status = "okay"; + clock-frequency = <400000>; + + tps: tps@24 { + reg = <0x24>; + }; + +}; + /include/ "tps65217.dtsi" &tps { diff --git a/arch/arm/boot/dts/am335x-evm.dts b/arch/arm/boot/dts/am335x-evm.dts index 1525cd6d4844..23b0a3e32f2e 100644 --- a/arch/arm/boot/dts/am335x-evm.dts +++ b/arch/arm/boot/dts/am335x-evm.dts @@ -24,197 +24,6 @@ reg = <0x80000000 0x10000000>; /* 256 MB */ }; - ocp { - uart0: serial@44e09000 { - pinctrl-names = "default"; - pinctrl-0 = <&uart0_pins>; - - status = "okay"; - }; - - i2c0: i2c@44e0b000 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c0_pins>; - - status = "okay"; - clock-frequency = <400000>; - - tps: tps@2d { - reg = <0x2d>; - }; - }; - - musb: usb@47400000 { - status = "okay"; - - control@44e10000 { - status = "okay"; - }; - - usb-phy@47401300 { - status = "okay"; - }; - - usb-phy@47401b00 { - status = "okay"; - }; - - usb@47401000 { - status = "okay"; - }; - - usb@47401800 { - status = "okay"; - dr_mode = "host"; - }; - - dma-controller@07402000 { - status = "okay"; - }; - }; - - i2c1: i2c@4802a000 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c1_pins>; - - status = "okay"; - clock-frequency = <100000>; - - lis331dlh: lis331dlh@18 { - compatible = "st,lis331dlh", "st,lis3lv02d"; - reg = <0x18>; - Vdd-supply = <&lis3_reg>; - Vdd_IO-supply = <&lis3_reg>; - - st,click-single-x; - st,click-single-y; - st,click-single-z; - st,click-thresh-x = <10>; - st,click-thresh-y = <10>; - st,click-thresh-z = <10>; - st,irq1-click; - st,irq2-click; - st,wakeup-x-lo; - st,wakeup-x-hi; - st,wakeup-y-lo; - st,wakeup-y-hi; - st,wakeup-z-lo; - st,wakeup-z-hi; - st,min-limit-x = <120>; - st,min-limit-y = <120>; - st,min-limit-z = <140>; - st,max-limit-x = <550>; - st,max-limit-y = <550>; - st,max-limit-z = <750>; - }; - - tsl2550: tsl2550@39 { - compatible = "taos,tsl2550"; - reg = <0x39>; - }; - - tmp275: tmp275@48 { - compatible = "ti,tmp275"; - reg = <0x48>; - }; - }; - - elm: elm@48080000 { - status = "okay"; - }; - - epwmss0: epwmss@48300000 { - status = "okay"; - - ecap0: ecap@48300100 { - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&ecap0_pins>; - }; - }; - - gpmc: gpmc@50000000 { - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&nandflash_pins_s0>; - ranges = <0 0 0x08000000 0x10000000>; /* CS0: NAND */ - nand@0,0 { - reg = <0 0 0>; /* CS0, offset 0 */ - nand-bus-width = <8>; - ti,nand-ecc-opt = "bch8"; - gpmc,device-nand = "true"; - gpmc,device-width = <1>; - gpmc,sync-clk-ps = <0>; - gpmc,cs-on-ns = <0>; - gpmc,cs-rd-off-ns = <44>; - gpmc,cs-wr-off-ns = <44>; - gpmc,adv-on-ns = <6>; - gpmc,adv-rd-off-ns = <34>; - gpmc,adv-wr-off-ns = <44>; - gpmc,we-on-ns = <0>; - gpmc,we-off-ns = <40>; - gpmc,oe-on-ns = <0>; - gpmc,oe-off-ns = <54>; - gpmc,access-ns = <64>; - gpmc,rd-cycle-ns = <82>; - gpmc,wr-cycle-ns = <82>; - gpmc,wait-on-read = "true"; - gpmc,wait-on-write = "true"; - gpmc,bus-turnaround-ns = <0>; - gpmc,cycle2cycle-delay-ns = <0>; - gpmc,clk-activation-ns = <0>; - gpmc,wait-monitoring-ns = <0>; - gpmc,wr-access-ns = <40>; - gpmc,wr-data-mux-bus-ns = <0>; - - #address-cells = <1>; - #size-cells = <1>; - elm_id = <&elm>; - - /* MTD partition table */ - partition@0 { - label = "SPL1"; - reg = <0x00000000 0x000020000>; - }; - - partition@1 { - label = "SPL2"; - reg = <0x00020000 0x00020000>; - }; - - partition@2 { - label = "SPL3"; - reg = <0x00040000 0x00020000>; - }; - - partition@3 { - label = "SPL4"; - reg = <0x00060000 0x00020000>; - }; - - partition@4 { - label = "U-boot"; - reg = <0x00080000 0x001e0000>; - }; - - partition@5 { - label = "environment"; - reg = <0x00260000 0x00020000>; - }; - - partition@6 { - label = "Kernel"; - reg = <0x00280000 0x00500000>; - }; - - partition@7 { - label = "File-System"; - reg = <0x00780000 0x0F880000>; - }; - }; - }; - }; - vbat: fixedregulator@0 { compatible = "regulator-fixed"; regulator-name = "vbat"; @@ -405,6 +214,195 @@ }; }; +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pins>; + + status = "okay"; +}; + +&i2c0 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c0_pins>; + + status = "okay"; + clock-frequency = <400000>; + + tps: tps@2d { + reg = <0x2d>; + }; +}; + +&usb { + status = "okay"; + + control@44e10000 { + status = "okay"; + }; + + usb-phy@47401300 { + status = "okay"; + }; + + usb-phy@47401b00 { + status = "okay"; + }; + + usb@47401000 { + status = "okay"; + }; + + usb@47401800 { + status = "okay"; + dr_mode = "host"; + }; + + dma-controller@07402000 { + status = "okay"; + }; +}; + +&i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins>; + + status = "okay"; + clock-frequency = <100000>; + + lis331dlh: lis331dlh@18 { + compatible = "st,lis331dlh", "st,lis3lv02d"; + reg = <0x18>; + Vdd-supply = <&lis3_reg>; + Vdd_IO-supply = <&lis3_reg>; + + st,click-single-x; + st,click-single-y; + st,click-single-z; + st,click-thresh-x = <10>; + st,click-thresh-y = <10>; + st,click-thresh-z = <10>; + st,irq1-click; + st,irq2-click; + st,wakeup-x-lo; + st,wakeup-x-hi; + st,wakeup-y-lo; + st,wakeup-y-hi; + st,wakeup-z-lo; + st,wakeup-z-hi; + st,min-limit-x = <120>; + st,min-limit-y = <120>; + st,min-limit-z = <140>; + st,max-limit-x = <550>; + st,max-limit-y = <550>; + st,max-limit-z = <750>; + }; + + tsl2550: tsl2550@39 { + compatible = "taos,tsl2550"; + reg = <0x39>; + }; + + tmp275: tmp275@48 { + compatible = "ti,tmp275"; + reg = <0x48>; + }; +}; + +&elm { + status = "okay"; +}; + +&epwmss0 { + status = "okay"; + + ecap0: ecap@48300100 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&ecap0_pins>; + }; +}; + +&gpmc { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&nandflash_pins_s0>; + ranges = <0 0 0x08000000 0x10000000>; /* CS0: NAND */ + nand@0,0 { + reg = <0 0 0>; /* CS0, offset 0 */ + nand-bus-width = <8>; + ti,nand-ecc-opt = "bch8"; + gpmc,device-nand = "true"; + gpmc,device-width = <1>; + gpmc,sync-clk-ps = <0>; + gpmc,cs-on-ns = <0>; + gpmc,cs-rd-off-ns = <44>; + gpmc,cs-wr-off-ns = <44>; + gpmc,adv-on-ns = <6>; + gpmc,adv-rd-off-ns = <34>; + gpmc,adv-wr-off-ns = <44>; + gpmc,we-on-ns = <0>; + gpmc,we-off-ns = <40>; + gpmc,oe-on-ns = <0>; + gpmc,oe-off-ns = <54>; + gpmc,access-ns = <64>; + gpmc,rd-cycle-ns = <82>; + gpmc,wr-cycle-ns = <82>; + gpmc,wait-on-read = "true"; + gpmc,wait-on-write = "true"; + gpmc,bus-turnaround-ns = <0>; + gpmc,cycle2cycle-delay-ns = <0>; + gpmc,clk-activation-ns = <0>; + gpmc,wait-monitoring-ns = <0>; + gpmc,wr-access-ns = <40>; + gpmc,wr-data-mux-bus-ns = <0>; + + #address-cells = <1>; + #size-cells = <1>; + elm_id = <&elm>; + + /* MTD partition table */ + partition@0 { + label = "SPL1"; + reg = <0x00000000 0x000020000>; + }; + + partition@1 { + label = "SPL2"; + reg = <0x00020000 0x00020000>; + }; + + partition@2 { + label = "SPL3"; + reg = <0x00040000 0x00020000>; + }; + + partition@3 { + label = "SPL4"; + reg = <0x00060000 0x00020000>; + }; + + partition@4 { + label = "U-boot"; + reg = <0x00080000 0x001e0000>; + }; + + partition@5 { + label = "environment"; + reg = <0x00260000 0x00020000>; + }; + + partition@6 { + label = "Kernel"; + reg = <0x00280000 0x00500000>; + }; + + partition@7 { + label = "File-System"; + reg = <0x00780000 0x0F880000>; + }; + }; +}; + #include "tps65910.dtsi" &tps { diff --git a/arch/arm/boot/dts/am335x-evmsk.dts b/arch/arm/boot/dts/am335x-evmsk.dts index f0066fe5d739..bc93895a6eca 100644 --- a/arch/arm/boot/dts/am335x-evmsk.dts +++ b/arch/arm/boot/dts/am335x-evmsk.dts @@ -31,81 +31,6 @@ reg = <0x80000000 0x10000000>; /* 256 MB */ }; - ocp { - uart0: serial@44e09000 { - pinctrl-names = "default"; - pinctrl-0 = <&uart0_pins>; - - status = "okay"; - }; - - i2c0: i2c@44e0b000 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c0_pins>; - - status = "okay"; - clock-frequency = <400000>; - - tps: tps@2d { - reg = <0x2d>; - }; - - lis331dlh: lis331dlh@18 { - compatible = "st,lis331dlh", "st,lis3lv02d"; - reg = <0x18>; - Vdd-supply = <&lis3_reg>; - Vdd_IO-supply = <&lis3_reg>; - - st,click-single-x; - st,click-single-y; - st,click-single-z; - st,click-thresh-x = <10>; - st,click-thresh-y = <10>; - st,click-thresh-z = <10>; - st,irq1-click; - st,irq2-click; - st,wakeup-x-lo; - st,wakeup-x-hi; - st,wakeup-y-lo; - st,wakeup-y-hi; - st,wakeup-z-lo; - st,wakeup-z-hi; - st,min-limit-x = <120>; - st,min-limit-y = <120>; - st,min-limit-z = <140>; - st,max-limit-x = <550>; - st,max-limit-y = <550>; - st,max-limit-z = <750>; - }; - }; - - musb: usb@47400000 { - status = "okay"; - - control@44e10000 { - status = "okay"; - }; - - usb-phy@47401300 { - status = "okay"; - }; - - usb@47401000 { - status = "okay"; - }; - }; - - epwmss2: epwmss@48304000 { - status = "okay"; - - ecap2: ecap@48304100 { - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&ecap2_pins>; - }; - }; - }; - vbat: fixedregulator@0 { compatible = "regulator-fixed"; regulator-name = "vbat"; @@ -321,6 +246,79 @@ }; }; +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pins>; + + status = "okay"; +}; + +&i2c0 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c0_pins>; + + status = "okay"; + clock-frequency = <400000>; + + tps: tps@2d { + reg = <0x2d>; + }; + + lis331dlh: lis331dlh@18 { + compatible = "st,lis331dlh", "st,lis3lv02d"; + reg = <0x18>; + Vdd-supply = <&lis3_reg>; + Vdd_IO-supply = <&lis3_reg>; + + st,click-single-x; + st,click-single-y; + st,click-single-z; + st,click-thresh-x = <10>; + st,click-thresh-y = <10>; + st,click-thresh-z = <10>; + st,irq1-click; + st,irq2-click; + st,wakeup-x-lo; + st,wakeup-x-hi; + st,wakeup-y-lo; + st,wakeup-y-hi; + st,wakeup-z-lo; + st,wakeup-z-hi; + st,min-limit-x = <120>; + st,min-limit-y = <120>; + st,min-limit-z = <140>; + st,max-limit-x = <550>; + st,max-limit-y = <550>; + st,max-limit-z = <750>; + }; +}; + +&usb { + status = "okay"; + + control@44e10000 { + status = "okay"; + }; + + usb-phy@47401300 { + status = "okay"; + }; + + usb@47401000 { + status = "okay"; + }; +}; + +&epwmss2 { + status = "okay"; + + ecap2: ecap@48304100 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&ecap2_pins>; + }; +}; + #include "tps65910.dtsi" &tps { -- cgit v1.2.3 From 6283513b6ee9caa8e38f9c41fcf95f209d9aebfd Mon Sep 17 00:00:00 2001 From: Aaro Koskinen Date: Sat, 21 Sep 2013 02:40:14 +0300 Subject: ARM: dts: omap3-devkit8000: fix a typo in GMPC node "gpmc,sync-clki-ps" is not defined/documented, it should be "gpmc,sync-clk-ps" instead. Signed-off-by: Aaro Koskinen Signed-off-by: Benoit Cousson --- arch/arm/boot/dts/omap3-devkit8000.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/omap3-devkit8000.dts b/arch/arm/boot/dts/omap3-devkit8000.dts index 7ef282795dd4..4665421bb7bc 100644 --- a/arch/arm/boot/dts/omap3-devkit8000.dts +++ b/arch/arm/boot/dts/omap3-devkit8000.dts @@ -125,7 +125,7 @@ nand-bus-width = <16>; gpmc,device-nand; - gpmc,sync-clki-ps = <0>; + gpmc,sync-clk-ps = <0>; gpmc,cs-on-ns = <0>; gpmc,cs-rd-off-ns = <44>; gpmc,cs-wr-off-ns = <44>; -- cgit v1.2.3 From c56a831ca47e16f54467abc14eb597da87a8614c Mon Sep 17 00:00:00 2001 From: Keerthy Date: Mon, 26 Aug 2013 11:06:51 +0530 Subject: ARM: dts: DRA7: Add TPS659038 PMIC nodes Add DT nodes for TPS659038 PMIC on DRA7 boards. It is based on top of: http://comments.gmane.org/gmane.linux.ports.arm.omap/102459. Documentation: - Documentation/devicetree/bindings/mfd/palmas.txt - Documentation/devicetree/bindings/regulator/palmas-pmic.txt Boot Tested on DRA7 d1 Board. Signed-off-by: Keerthy Acked-by: Nishanth Menon [bcousson@baylibre.com: Fix indentation and changelog] Signed-off-by: Benoit Cousson --- arch/arm/boot/dts/dra7-evm.dts | 112 +++++++++++++++++++++++++++++++++++++++++ 1 file changed, 112 insertions(+) diff --git a/arch/arm/boot/dts/dra7-evm.dts b/arch/arm/boot/dts/dra7-evm.dts index ca5dab2214d5..fbbe40625508 100644 --- a/arch/arm/boot/dts/dra7-evm.dts +++ b/arch/arm/boot/dts/dra7-evm.dts @@ -93,6 +93,118 @@ pinctrl-names = "default"; pinctrl-0 = <&i2c1_pins>; clock-frequency = <400000>; + + tps659038: tps659038@58 { + compatible = "ti,tps659038"; + reg = <0x58>; + + tps659038_pmic { + compatible = "ti,tps659038-pmic"; + + regulators { + smps123_reg: smps123 { + /* VDD_MPU */ + regulator-name = "smps123"; + regulator-min-microvolt = < 850000>; + regulator-max-microvolt = <1250000>; + regulator-always-on; + regulator-boot-on; + }; + + smps45_reg: smps45 { + /* VDD_DSPEVE */ + regulator-name = "smps45"; + regulator-min-microvolt = < 850000>; + regulator-max-microvolt = <1150000>; + regulator-boot-on; + }; + + smps6_reg: smps6 { + /* VDD_GPU - over VDD_SMPS6 */ + regulator-name = "smps6"; + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <12500000>; + regulator-boot-on; + }; + + smps7_reg: smps7 { + /* CORE_VDD */ + regulator-name = "smps7"; + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <1030000>; + regulator-always-on; + regulator-boot-on; + }; + + smps8_reg: smps8 { + /* VDD_IVAHD */ + regulator-name = "smps8"; + regulator-min-microvolt = < 850000>; + regulator-max-microvolt = <1250000>; + regulator-boot-on; + }; + + smps9_reg: smps9 { + /* VDDS1V8 */ + regulator-name = "smps9"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + }; + + ldo1_reg: ldo1 { + /* LDO1_OUT --> SDIO */ + regulator-name = "ldo1"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + }; + + ldo2_reg: ldo2 { + /* VDD_RTCIO */ + /* LDO2 -> VDDSHV5, LDO2 also goes to CAN_PHY_3V3 */ + regulator-name = "ldo2"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + }; + + ldo3_reg: ldo3 { + /* VDDA_1V8_PHY */ + regulator-name = "ldo3"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-boot-on; + }; + + ldo9_reg: ldo9 { + /* VDD_RTC */ + regulator-name = "ldo9"; + regulator-min-microvolt = <1050000>; + regulator-max-microvolt = <1050000>; + regulator-boot-on; + }; + + ldoln_reg: ldoln { + /* VDDA_1V8_PLL */ + regulator-name = "ldoln"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + }; + + ldousb_reg: ldousb { + /* VDDA_3V_USB: VDDA_USBHS33 */ + regulator-name = "ldousb"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + }; + }; + }; + }; }; &i2c2 { -- cgit v1.2.3 From 8170056d3cc99ce6521841cd30c1d50847958f9f Mon Sep 17 00:00:00 2001 From: Dan Murphy Date: Wed, 2 Oct 2013 12:58:33 -0500 Subject: ARM: dts: AM33XX: add ethernet alias's for am33xx Set the alias for ethernet0 and ethernet1 so that uBoot can set the MAC address appropriately. Currently u-boot cannot find the alias and there for does not set the MAC address. Signed-off-by: Dan Murphy Tested-by: Mugunthan V N Signed-off-by: Benoit Cousson --- arch/arm/boot/dts/am33xx.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi index 553adc6b535e..8aabaa0eb264 100644 --- a/arch/arm/boot/dts/am33xx.dtsi +++ b/arch/arm/boot/dts/am33xx.dtsi @@ -30,6 +30,8 @@ usb1 = &usb1; phy0 = &usb0_phy; phy1 = &usb1_phy; + ethernet0 = &cpsw_emac0; + ethernet1 = &cpsw_emac1; }; cpus { -- cgit v1.2.3 From 633b940fc0226aa322d5e8f2464c43efe77aaf31 Mon Sep 17 00:00:00 2001 From: Roger Quadros Date: Tue, 24 Sep 2013 11:53:51 +0300 Subject: ARM: dts: omap3-beagle: Use reset-gpios for hsusb2_reset We no longer need to model the RESET line as a regulator since the USB phy-nop driver accepts "reset-gpios" property. Signed-off-by: Roger Quadros Signed-off-by: Benoit Cousson --- arch/arm/boot/dts/omap3-beagle.dts | 13 +------------ 1 file changed, 1 insertion(+), 12 deletions(-) diff --git a/arch/arm/boot/dts/omap3-beagle.dts b/arch/arm/boot/dts/omap3-beagle.dts index 2e29e811dd42..12378224e46f 100644 --- a/arch/arm/boot/dts/omap3-beagle.dts +++ b/arch/arm/boot/dts/omap3-beagle.dts @@ -44,17 +44,6 @@ }; }; - /* HS USB Port 2 RESET */ - hsusb2_reset: hsusb2_reset_reg { - compatible = "regulator-fixed"; - regulator-name = "hsusb2_reset"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - gpio = <&gpio5 19 0>; /* gpio_147 */ - startup-delay-us = <70000>; - enable-active-high; - }; - /* HS USB Port 2 Power */ hsusb2_power: hsusb2_power_reg { compatible = "regulator-fixed"; @@ -68,7 +57,7 @@ /* HS USB Host PHY on PORT 2 */ hsusb2_phy: hsusb2_phy { compatible = "usb-nop-xceiv"; - reset-supply = <&hsusb2_reset>; + reset-gpios = <&gpio5 19 GPIO_ACTIVE_LOW>; /* gpio_147 */ vcc-supply = <&hsusb2_power>; }; -- cgit v1.2.3 From 4cbdc86d6386765345e0934db256e257c0ef853f Mon Sep 17 00:00:00 2001 From: Roger Quadros Date: Tue, 24 Sep 2013 11:53:52 +0300 Subject: ARM: dts: omap4-panda: Use reset-gpios for hsusb1_reset We no longer need to model the RESET line as a regulator since the USB phy-nop driver accepts "reset-gpios" property. Signed-off-by: Roger Quadros Signed-off-by: Benoit Cousson --- arch/arm/boot/dts/omap4-panda-common.dtsi | 18 +----------------- 1 file changed, 1 insertion(+), 17 deletions(-) diff --git a/arch/arm/boot/dts/omap4-panda-common.dtsi b/arch/arm/boot/dts/omap4-panda-common.dtsi index 43b7661cfe24..3e6801cecd04 100644 --- a/arch/arm/boot/dts/omap4-panda-common.dtsi +++ b/arch/arm/boot/dts/omap4-panda-common.dtsi @@ -60,22 +60,6 @@ "AFMR", "Line In"; }; - /* - * Temp hack: Need to be replaced with the proper gpio-controlled - * reset driver as soon it will be merged. - * http://thread.gmane.org/gmane.linux.drivers.devicetree/36830 - */ - /* HS USB Port 1 RESET */ - hsusb1_reset: hsusb1_reset_reg { - compatible = "regulator-fixed"; - regulator-name = "hsusb1_reset"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - gpio = <&gpio2 30 0>; /* gpio_62 */ - startup-delay-us = <70000>; - enable-active-high; - }; - /* HS USB Port 1 Power */ hsusb1_power: hsusb1_power_reg { compatible = "regulator-fixed"; @@ -97,7 +81,7 @@ /* HS USB Host PHY on PORT 1 */ hsusb1_phy: hsusb1_phy { compatible = "usb-nop-xceiv"; - reset-supply = <&hsusb1_reset>; + reset-gpios = <&gpio2 30 GPIO_ACTIVE_LOW>; /* gpio_62 */ vcc-supply = <&hsusb1_power>; /** * FIXME: -- cgit v1.2.3 From 8ae9b5953c811ea733080194373e56d8a8ef559c Mon Sep 17 00:00:00 2001 From: Roger Quadros Date: Tue, 24 Sep 2013 11:53:53 +0300 Subject: ARM: dts: omap5-uevm: Use reset-gpios for hsusb2/3_reset We no longer need to model the RESET line as a regulator since the USB phy-nop driver accepts "reset-gpios" property. Signed-off-by: Roger Quadros Signed-off-by: Benoit Cousson --- arch/arm/boot/dts/omap5-uevm.dts | 26 ++------------------------ 1 file changed, 2 insertions(+), 24 deletions(-) diff --git a/arch/arm/boot/dts/omap5-uevm.dts b/arch/arm/boot/dts/omap5-uevm.dts index da25a14d919f..748f6bfbeef6 100644 --- a/arch/arm/boot/dts/omap5-uevm.dts +++ b/arch/arm/boot/dts/omap5-uevm.dts @@ -27,21 +27,10 @@ regulator-max-microvolt = <3000000>; }; - /* HS USB Port 2 RESET */ - hsusb2_reset: hsusb2_reset_reg { - compatible = "regulator-fixed"; - regulator-name = "hsusb2_reset"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - gpio = <&gpio3 16 GPIO_ACTIVE_HIGH>; /* gpio3_80 HUB_NRESET */ - startup-delay-us = <70000>; - enable-active-high; - }; - /* HS USB Host PHY on PORT 2 */ hsusb2_phy: hsusb2_phy { compatible = "usb-nop-xceiv"; - reset-supply = <&hsusb2_reset>; + reset-gpios = <&gpio3 16 GPIO_ACTIVE_LOW>; /* gpio3_80 HUB_NRESET */ /** * FIXME * Put the right clock phandle here when available @@ -51,21 +40,10 @@ clock-frequency = <19200000>; }; - /* HS USB Port 3 RESET */ - hsusb3_reset: hsusb3_reset_reg { - compatible = "regulator-fixed"; - regulator-name = "hsusb3_reset"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - gpio = <&gpio3 15 GPIO_ACTIVE_HIGH>; /* gpio3_79 ETH_NRESET */ - startup-delay-us = <70000>; - enable-active-high; - }; - /* HS USB Host PHY on PORT 3 */ hsusb3_phy: hsusb3_phy { compatible = "usb-nop-xceiv"; - reset-supply = <&hsusb3_reset>; + reset-gpios = <&gpio3 15 GPIO_ACTIVE_LOW>; /* gpio3_79 ETH_NRESET */ }; leds { -- cgit v1.2.3 From aaba94429ab3570b7abe4ef2254a75a3a305e358 Mon Sep 17 00:00:00 2001 From: Roger Quadros Date: Tue, 24 Sep 2013 11:53:55 +0300 Subject: ARM: dts: omap3-beagle-xm: Add USB Host support Provide RESET GPIO and Power regulator for the USB PHY, the USB Host port mode and the PHY device for the controller. Also provide pin multiplexer information for USB host pins. We also relocate omap3_pmx_core pin definations so that they are close to omap3_pmx_wkup pin definations. Signed-off-by: Roger Quadros Signed-off-by: Benoit Cousson --- arch/arm/boot/dts/omap3-beagle-xm.dts | 65 ++++++++++++++++++++++++++++++----- 1 file changed, 56 insertions(+), 9 deletions(-) diff --git a/arch/arm/boot/dts/omap3-beagle-xm.dts b/arch/arm/boot/dts/omap3-beagle-xm.dts index 0c514dc8460c..0f7cfc503bf9 100644 --- a/arch/arm/boot/dts/omap3-beagle-xm.dts +++ b/arch/arm/boot/dts/omap3-beagle-xm.dts @@ -69,6 +69,23 @@ }; }; + + /* HS USB Port 2 Power */ + hsusb2_power: hsusb2_power_reg { + compatible = "regulator-fixed"; + regulator-name = "hsusb2_vbus"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&twl_gpio 18 0>; /* GPIO LEDA */ + startup-delay-us = <70000>; + }; + + /* HS USB Host PHY on PORT 2 */ + hsusb2_phy: hsusb2_phy { + compatible = "usb-nop-xceiv"; + reset-gpios = <&gpio5 19 GPIO_ACTIVE_LOW>; /* gpio_147 */ + vcc-supply = <&hsusb2_power>; + }; }; &omap3_pmx_wkup { @@ -79,6 +96,37 @@ }; }; +&omap3_pmx_core { + pinctrl-names = "default"; + pinctrl-0 = < + &hsusbb2_pins + >; + + uart3_pins: pinmux_uart3_pins { + pinctrl-single,pins = < + 0x16e (PIN_INPUT | PIN_OFF_WAKEUPENABLE | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */ + 0x170 (PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx OUTPUT | MODE0 */ + >; + }; + + hsusbb2_pins: pinmux_hsusbb2_pins { + pinctrl-single,pins = < + 0x5c0 (PIN_OUTPUT | MUX_MODE3) /* etk_d10.hsusb2_clk */ + 0x5c2 (PIN_OUTPUT | MUX_MODE3) /* etk_d11.hsusb2_stp */ + 0x5c4 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d12.hsusb2_dir */ + 0x5c6 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d13.hsusb2_nxt */ + 0x5c8 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d14.hsusb2_data0 */ + 0x5cA (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d15.hsusb2_data1 */ + 0x1a4 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi1_cs3.hsusb2_data2 */ + 0x1a6 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_clk.hsusb2_data7 */ + 0x1a8 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_simo.hsusb2_data4 */ + 0x1aa (PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_somi.hsusb2_data5 */ + 0x1ac (PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_cs0.hsusb2_data6 */ + 0x1ae (PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_cs1.hsusb2_data3 */ + >; + }; +}; + &i2c1 { clock-frequency = <2600000>; @@ -148,15 +196,6 @@ power = <50>; }; -&omap3_pmx_core { - uart3_pins: pinmux_uart3_pins { - pinctrl-single,pins = < - 0x16e (PIN_INPUT | PIN_OFF_WAKEUPENABLE | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */ - 0x170 (PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx OUTPUT | MODE0 */ - >; - }; -}; - &uart3 { pinctrl-names = "default"; pinctrl-0 = <&uart3_pins>; @@ -166,3 +205,11 @@ pinctrl-names = "default"; pinctrl-0 = <&gpio1_pins>; }; + +&usbhshost { + port2-mode = "ehci-phy"; +}; + +&usbhsehci { + phys = <0 &hsusb2_phy>; +}; -- cgit v1.2.3 From 816602086b2559271b55af70f22c9fa103af2c20 Mon Sep 17 00:00:00 2001 From: Roger Quadros Date: Tue, 24 Sep 2013 11:53:56 +0300 Subject: ARM: dts: omap3-beagle: Add USB OTG PHY details Add information about the USB OTG PHY. Without this the OTG port on beagle will not work. Signed-off-by: Roger Quadros Signed-off-by: Benoit Cousson --- arch/arm/boot/dts/omap3-beagle.dts | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm/boot/dts/omap3-beagle.dts b/arch/arm/boot/dts/omap3-beagle.dts index 12378224e46f..7669c16259a5 100644 --- a/arch/arm/boot/dts/omap3-beagle.dts +++ b/arch/arm/boot/dts/omap3-beagle.dts @@ -169,3 +169,10 @@ pinctrl-names = "default"; pinctrl-0 = <&gpio1_pins>; }; + +&usb_otg_hs { + interface-type = <0>; + usb-phy = <&usb2_phy>; + mode = <3>; + power = <50>; +}; -- cgit v1.2.3 From ea5b7c10d4dce969fe7cf30a087e30664ad7f6dc Mon Sep 17 00:00:00 2001 From: Nishanth Menon Date: Mon, 30 Sep 2013 09:40:16 -0500 Subject: ARM: dts: am335x-boneblack: move fixed regulator to board level 3.3V fixed regulator does not belong to TPS node - as a result the fixed regulator is never probed and MMC is continually deferred due to lack of regulator. Move the fixed regulator to be at root of platform. Cc: Joel Fernandes Cc: Sekhar Nori Cc: Koen Kooi Signed-off-by: Nishanth Menon Tested-by: Felipe Balbi Tested-by: Balaji T K Signed-off-by: Benoit Cousson --- arch/arm/boot/dts/am335x-bone-common.dtsi | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/arch/arm/boot/dts/am335x-bone-common.dtsi b/arch/arm/boot/dts/am335x-bone-common.dtsi index ff5c3cafbdff..b3e6fcf92a67 100644 --- a/arch/arm/boot/dts/am335x-bone-common.dtsi +++ b/arch/arm/boot/dts/am335x-bone-common.dtsi @@ -55,6 +55,13 @@ default-state = "off"; }; }; + + vmmcsd_fixed: fixedregulator@0 { + compatible = "regulator-fixed"; + regulator-name = "vmmcsd_fixed"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; }; &am33xx_pinmux { @@ -257,13 +264,6 @@ regulator-always-on; }; }; - - vmmcsd_fixed: fixedregulator@0 { - compatible = "regulator-fixed"; - regulator-name = "vmmcsd_fixed"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - }; }; &cpsw_emac0 { -- cgit v1.2.3 From e415245c68754150429aa707075233d3069c8dd7 Mon Sep 17 00:00:00 2001 From: Enric Balletbo i Serra Date: Tue, 10 Sep 2013 16:55:48 +0200 Subject: ARM: dts: AM33XX: Add support for IGEP COM AQUILA The IGEP COM AQUILA is industrial processors SODIMM module with following highlights: o AM3352/AM3354/AM3358/AM3359 Texas Instruments processor o Cortex-A8 ARM CPU o 3.3 volts Inputs / Outputs use industrial o 256 MB DDR3 SDRAM / 128 Megabytes FLASH o MicroSD card reader on-board o Ethernet controller on-board o JTAG debug connector available o Designed for industrial range purposes Signed-off-by: Enric Balletbo i Serra Reviewed-by: Javier Martinez Canillas Signed-off-by: Benoit Cousson --- arch/arm/boot/dts/am335x-igep0033.dtsi | 265 +++++++++++++++++++++++++++++++++ 1 file changed, 265 insertions(+) create mode 100644 arch/arm/boot/dts/am335x-igep0033.dtsi diff --git a/arch/arm/boot/dts/am335x-igep0033.dtsi b/arch/arm/boot/dts/am335x-igep0033.dtsi new file mode 100644 index 000000000000..06eba076bfcd --- /dev/null +++ b/arch/arm/boot/dts/am335x-igep0033.dtsi @@ -0,0 +1,265 @@ +/* + * am335x-igep0033.dtsi - Device Tree file for IGEP COM AQUILA AM335x + * + * Copyright (C) 2013 ISEE 2007 SL - http://www.isee.biz + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +/dts-v1/; + +#include "am33xx.dtsi" + +/ { + cpus { + cpu@0 { + cpu0-supply = <&vdd1_reg>; + }; + }; + + memory { + device_type = "memory"; + reg = <0x80000000 0x10000000>; /* 256 MB */ + }; + + leds { + pinctrl-names = "default"; + pinctrl-0 = <&leds_pins>; + + compatible = "gpio-leds"; + + led@0 { + label = "com:green:user"; + gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>; + default-state = "on"; + }; + }; + + vbat: fixedregulator@0 { + compatible = "regulator-fixed"; + regulator-name = "vbat"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-boot-on; + }; +}; + +&am33xx_pinmux { + i2c0_pins: pinmux_i2c0_pins { + pinctrl-single,pins = < + 0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */ + 0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */ + >; + }; + + nandflash_pins: pinmux_nandflash_pins { + pinctrl-single,pins = < + 0x0 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad0.gpmc_ad0 */ + 0x4 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad1.gpmc_ad1 */ + 0x8 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad2.gpmc_ad2 */ + 0xc (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad3.gpmc_ad3 */ + 0x10 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad4.gpmc_ad4 */ + 0x14 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad5.gpmc_ad5 */ + 0x18 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad6.gpmc_ad6 */ + 0x1c (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad7.gpmc_ad7 */ + 0x70 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_wait0.gpmc_wait0 */ + 0x74 (PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_wpn.gpio0_30 */ + 0x7c (PIN_OUTPUT | MUX_MODE0) /* gpmc_csn0.gpmc_csn0 */ + 0x90 (PIN_OUTPUT | MUX_MODE0) /* gpmc_advn_ale.gpmc_advn_ale */ + 0x94 (PIN_OUTPUT | MUX_MODE0) /* gpmc_oen_ren.gpmc_oen_ren */ + 0x98 (PIN_OUTPUT | MUX_MODE0) /* gpmc_wen.gpmc_wen */ + 0x9c (PIN_OUTPUT | MUX_MODE0) /* gpmc_be0n_cle.gpmc_be0n_cle */ + >; + }; + + uart0_pins: pinmux_uart0_pins { + pinctrl-single,pins = < + 0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */ + 0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */ + >; + }; + + leds_pins: pinmux_leds_pins { + pinctrl-single,pins = < + 0x5c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a7.gpio1_23 */ + >; + }; +}; + +&cpsw_emac0 { + phy_id = <&davinci_mdio>, <0>; +}; + +&cpsw_emac1 { + phy_id = <&davinci_mdio>, <1>; +}; + +&elm { + status = "okay"; +}; + +&gpmc { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&nandflash_pins>; + + ranges = <0 0 0x08000000 0x10000000>; /* CS0: NAND */ + + nand@0,0 { + reg = <0 0 0>; /* CS0, offset 0 */ + nand-bus-width = <8>; + ti,nand-ecc-opt = "bch8"; + gpmc,device-nand = "true"; + gpmc,device-width = <1>; + gpmc,sync-clk-ps = <0>; + gpmc,cs-on-ns = <0>; + gpmc,cs-rd-off-ns = <44>; + gpmc,cs-wr-off-ns = <44>; + gpmc,adv-on-ns = <6>; + gpmc,adv-rd-off-ns = <34>; + gpmc,adv-wr-off-ns = <44>; + gpmc,we-on-ns = <0>; + gpmc,we-off-ns = <40>; + gpmc,oe-on-ns = <0>; + gpmc,oe-off-ns = <54>; + gpmc,access-ns = <64>; + gpmc,rd-cycle-ns = <82>; + gpmc,wr-cycle-ns = <82>; + gpmc,wait-on-read = "true"; + gpmc,wait-on-write = "true"; + gpmc,bus-turnaround-ns = <0>; + gpmc,cycle2cycle-delay-ns = <0>; + gpmc,clk-activation-ns = <0>; + gpmc,wait-monitoring-ns = <0>; + gpmc,wr-access-ns = <40>; + gpmc,wr-data-mux-bus-ns = <0>; + + #address-cells = <1>; + #size-cells = <1>; + elm_id = <&elm>; + + /* MTD partition table */ + partition@0 { + label = "SPL"; + reg = <0x00000000 0x000080000>; + }; + + partition@1 { + label = "U-boot"; + reg = <0x00080000 0x001e0000>; + }; + + partition@2 { + label = "U-Boot Env"; + reg = <0x00260000 0x00020000>; + }; + + partition@3 { + label = "Kernel"; + reg = <0x00280000 0x00500000>; + }; + + partition@4 { + label = "File System"; + reg = <0x00780000 0x007880000>; + }; + }; +}; + +&i2c0 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&i2c0_pins>; + + clock-frequency = <400000>; + + tps: tps@2d { + reg = <0x2d>; + }; +}; + +&uart0 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pins>; +}; + +#include "tps65910.dtsi" + +&tps { + vcc1-supply = <&vbat>; + vcc2-supply = <&vbat>; + vcc3-supply = <&vbat>; + vcc4-supply = <&vbat>; + vcc5-supply = <&vbat>; + vcc6-supply = <&vbat>; + vcc7-supply = <&vbat>; + vccio-supply = <&vbat>; + + regulators { + vrtc_reg: regulator@0 { + regulator-always-on; + }; + + vio_reg: regulator@1 { + regulator-always-on; + }; + + vdd1_reg: regulator@2 { + /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */ + regulator-name = "vdd_mpu"; + regulator-min-microvolt = <912500>; + regulator-max-microvolt = <1312500>; + regulator-boot-on; + regulator-always-on; + }; + + vdd2_reg: regulator@3 { + /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */ + regulator-name = "vdd_core"; + regulator-min-microvolt = <912500>; + regulator-max-microvolt = <1150000>; + regulator-boot-on; + regulator-always-on; + }; + + vdd3_reg: regulator@4 { + regulator-always-on; + }; + + vdig1_reg: regulator@5 { + regulator-always-on; + }; + + vdig2_reg: regulator@6 { + regulator-always-on; + }; + + vpll_reg: regulator@7 { + regulator-always-on; + }; + + vdac_reg: regulator@8 { + regulator-always-on; + }; + + vaux1_reg: regulator@9 { + regulator-always-on; + }; + + vaux2_reg: regulator@10 { + regulator-always-on; + }; + + vaux33_reg: regulator@11 { + regulator-always-on; + }; + + vmmc_reg: regulator@12 { + regulator-always-on; + }; + }; +}; + -- cgit v1.2.3 From 5cda1620f457459240176ab6abc9431a1ad6684a Mon Sep 17 00:00:00 2001 From: Enric Balletbo i Serra Date: Tue, 10 Sep 2013 16:55:49 +0200 Subject: ARM: dts: AM33XX: Add support for IGEP AQUILA EXPANSION board. The IGEP AQUILA EXPANSION board is a development platform for the IGEP COM AQUILA AM335x boards. The board adds the following connectivity: o USB OTG o USB HOST o HDMI o Ethernet o Serial Debug (3.3V) o 2x46 pin headers o EEPROM Signed-off-by: Enric Balletbo i Serra Reviewed-by: Javier Martinez Canillas Signed-off-by: Benoit Cousson --- arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/am335x-base0033.dts | 16 ++++++++++++++++ 2 files changed, 17 insertions(+) create mode 100644 arch/arm/boot/dts/am335x-base0033.dts diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 1be0c95391d7..9df7d2c15e7d 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -188,6 +188,7 @@ dtb-$(CONFIG_ARCH_OMAP2PLUS) += omap2420-h4.dtb \ am335x-evmsk.dtb \ am335x-bone.dtb \ am335x-boneblack.dtb \ + am335x-base0033.dtb \ am3517-evm.dtb \ am3517_mt_ventoux.dtb \ am43x-epos-evm.dtb \ diff --git a/arch/arm/boot/dts/am335x-base0033.dts b/arch/arm/boot/dts/am335x-base0033.dts new file mode 100644 index 000000000000..b4f95c2bbf74 --- /dev/null +++ b/arch/arm/boot/dts/am335x-base0033.dts @@ -0,0 +1,16 @@ +/* + * am335x-base0033.dts - Device Tree file for IGEP AQUILA EXPANSION + * + * Copyright (C) 2013 ISEE 2007 SL - http://www.isee.biz + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include "am335x-igep0033.dtsi" + +/ { + model = "IGEP COM AM335x on AQUILA Expansion"; + compatible = "isee,am335x-base0033", "isee,am335x-igep0033", "ti,am33xx"; +}; -- cgit v1.2.3 From af905b2225fa8905f93cc5a6f24dd116e6e7ada1 Mon Sep 17 00:00:00 2001 From: Balaji T K Date: Fri, 27 Sep 2013 17:05:09 +0530 Subject: ARM: dts: am335x-bone-common: correct mux mode for cmd line Set pinmux_emmc_pins mux mode for cmd line to MODE2 in order to detect eMMC on BBB and BBW + eMMC cape. Signed-off-by: Balaji T K Tested-by: Felipe Balbi Signed-off-by: Benoit Cousson --- arch/arm/boot/dts/am335x-bone-common.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/am335x-bone-common.dtsi b/arch/arm/boot/dts/am335x-bone-common.dtsi index b3e6fcf92a67..e3f27ec31718 100644 --- a/arch/arm/boot/dts/am335x-bone-common.dtsi +++ b/arch/arm/boot/dts/am335x-bone-common.dtsi @@ -160,7 +160,7 @@ emmc_pins: pinmux_emmc_pins { pinctrl-single,pins = < 0x80 (PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */ - 0x84 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_csn2.mmc1_cmd */ + 0x84 (PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn2.mmc1_cmd */ 0x00 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */ 0x04 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */ 0x08 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */ -- cgit v1.2.3 From 0d8d40fc66b3fc08b8cb0e5f241455a4f6465509 Mon Sep 17 00:00:00 2001 From: Balaji T K Date: Fri, 27 Sep 2013 17:05:10 +0530 Subject: ARM: dts: am335x-evm[sdk]: switch mmc1 to 4-bit mode Set bus-width to make SD card operate in 4 bit mode. Signed-off-by: Balaji T K Signed-off-by: Benoit Cousson --- arch/arm/boot/dts/am335x-evm.dts | 1 + arch/arm/boot/dts/am335x-evmsk.dts | 1 + 2 files changed, 2 insertions(+) diff --git a/arch/arm/boot/dts/am335x-evm.dts b/arch/arm/boot/dts/am335x-evm.dts index 23b0a3e32f2e..028ca096d18d 100644 --- a/arch/arm/boot/dts/am335x-evm.dts +++ b/arch/arm/boot/dts/am335x-evm.dts @@ -521,4 +521,5 @@ &mmc1 { status = "okay"; vmmc-supply = <&vmmc_reg>; + bus-width = <4>; }; diff --git a/arch/arm/boot/dts/am335x-evmsk.dts b/arch/arm/boot/dts/am335x-evmsk.dts index bc93895a6eca..563a2b136e0e 100644 --- a/arch/arm/boot/dts/am335x-evmsk.dts +++ b/arch/arm/boot/dts/am335x-evmsk.dts @@ -423,4 +423,5 @@ &mmc1 { status = "okay"; vmmc-supply = <&vmmc_reg>; + bus-width = <4>; }; -- cgit v1.2.3 From dd6317dffc24568df0ce31e0ce4d64541b38d00b Mon Sep 17 00:00:00 2001 From: Joel Fernandes Date: Thu, 11 Jul 2013 18:20:05 -0500 Subject: ARM: dts: OMAP4: Add AES node OMAP4 has an AES module that uses the omap-aes crypto driver. Add DT entries for the same. Signed-off-by: Joel Fernandes Signed-off-by: Benoit Cousson --- arch/arm/boot/dts/omap4.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi index 45708e1b7a74..16a44d60b30e 100644 --- a/arch/arm/boot/dts/omap4.dtsi +++ b/arch/arm/boot/dts/omap4.dtsi @@ -663,5 +663,14 @@ ram-bits = <12>; ti,has-mailbox; }; + + aes: aes@4b501000 { + compatible = "ti,omap4-aes"; + ti,hwmods = "aes"; + reg = <0x4b501000 0xa0>; + interrupts = ; + dmas = <&sdma 111>, <&sdma 110>; + dma-names = "tx", "rx"; + }; }; }; -- cgit v1.2.3 From 806e943153c50a14f107d9a612af1fddc3ceb9da Mon Sep 17 00:00:00 2001 From: Joel Fernandes Date: Tue, 24 Sep 2013 15:23:33 -0500 Subject: ARM: dts: OMAP4: Add DES3DES node OMAP4 has an DES3DES module that uses the omap-des crypto driver. Add DT entries for the same. Signed-off-by: Joel Fernandes Signed-off-by: Benoit Cousson --- arch/arm/boot/dts/omap4.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi index 16a44d60b30e..6be1f5678f1a 100644 --- a/arch/arm/boot/dts/omap4.dtsi +++ b/arch/arm/boot/dts/omap4.dtsi @@ -672,5 +672,14 @@ dmas = <&sdma 111>, <&sdma 110>; dma-names = "tx", "rx"; }; + + des: des@480a5000 { + compatible = "ti,omap4-des"; + ti,hwmods = "des"; + reg = <0x480a5000 0xa0>; + interrupts = ; + dmas = <&sdma 117>, <&sdma 116>; + dma-names = "tx", "rx"; + }; }; }; -- cgit v1.2.3 From f8302e1efa7972b0eb8beefb80d756ddf2f30631 Mon Sep 17 00:00:00 2001 From: "Mark A. Greer" Date: Fri, 23 Aug 2013 14:12:35 -0700 Subject: ARM: dts: AM33XX: Add SHAM data and documentation Add the generic AM33XX SHAM module's device tree data and enable it for the am335x-evm, am335x-evmsk, and am335x-bone platforms. Also add Documentation file describing the data for the SHAM module. Cc: Paul Walmsley Signed-off-by: Mark A. Greer Signed-off-by: Joel Fernandes [joelf@ti.com: Dropped interrupt-parent property, documentation fixups] Acked-by: Mark Rutland Signed-off-by: Benoit Cousson --- .../devicetree/bindings/crypto/omap-sham.txt | 28 ++++++++++++++++++++++ arch/arm/boot/dts/am335x-bone.dts | 4 ++++ arch/arm/boot/dts/am335x-evm.dts | 4 ++++ arch/arm/boot/dts/am335x-evmsk.dts | 4 ++++ arch/arm/boot/dts/am33xx.dtsi | 9 +++++++ 5 files changed, 49 insertions(+) create mode 100644 Documentation/devicetree/bindings/crypto/omap-sham.txt diff --git a/Documentation/devicetree/bindings/crypto/omap-sham.txt b/Documentation/devicetree/bindings/crypto/omap-sham.txt new file mode 100644 index 000000000000..f839acd6f0ee --- /dev/null +++ b/Documentation/devicetree/bindings/crypto/omap-sham.txt @@ -0,0 +1,28 @@ +OMAP SoC SHA crypto Module + +Required properties: + +- compatible : Should contain entries for this and backward compatible + SHAM versions: + - "ti,omap2-sham" for OMAP2 & OMAP3. + - "ti,omap4-sham" for OMAP4 and AM33XX. + Note that these two versions are incompatible. +- ti,hwmods: Name of the hwmod associated with the SHAM module +- reg : Offset and length of the register set for the module +- interrupts : the interrupt-specifier for the SHAM module. + +Optional properties: +- dmas: DMA specifiers for the rx dma. See the DMA client binding, + Documentation/devicetree/bindings/dma/dma.txt +- dma-names: DMA request name. Should be "rx" if a dma is present. + +Example: + /* AM335x */ + sham: sham@53100000 { + compatible = "ti,omap4-sham"; + ti,hwmods = "sham"; + reg = <0x53100000 0x200>; + interrupts = <109>; + dmas = <&edma 36>; + dma-names = "rx"; + }; diff --git a/arch/arm/boot/dts/am335x-bone.dts b/arch/arm/boot/dts/am335x-bone.dts index 0d6334875df8..8a9802ee6380 100644 --- a/arch/arm/boot/dts/am335x-bone.dts +++ b/arch/arm/boot/dts/am335x-bone.dts @@ -19,3 +19,7 @@ &mmc1 { vmmc-supply = <&ldo3_reg>; }; + +&sham { + status = "okay"; +}; diff --git a/arch/arm/boot/dts/am335x-evm.dts b/arch/arm/boot/dts/am335x-evm.dts index 028ca096d18d..09786efc25c1 100644 --- a/arch/arm/boot/dts/am335x-evm.dts +++ b/arch/arm/boot/dts/am335x-evm.dts @@ -523,3 +523,7 @@ vmmc-supply = <&vmmc_reg>; bus-width = <4>; }; + +&sham { + status = "okay"; +}; diff --git a/arch/arm/boot/dts/am335x-evmsk.dts b/arch/arm/boot/dts/am335x-evmsk.dts index 563a2b136e0e..08d5cd9e6457 100644 --- a/arch/arm/boot/dts/am335x-evmsk.dts +++ b/arch/arm/boot/dts/am335x-evmsk.dts @@ -425,3 +425,7 @@ vmmc-supply = <&vmmc_reg>; bus-width = <4>; }; + +&sham { + status = "okay"; +}; diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi index 8aabaa0eb264..5f114a7f9484 100644 --- a/arch/arm/boot/dts/am33xx.dtsi +++ b/arch/arm/boot/dts/am33xx.dtsi @@ -712,5 +712,14 @@ #size-cells = <1>; status = "disabled"; }; + + sham: sham@53100000 { + compatible = "ti,omap4-sham"; + ti,hwmods = "sham"; + reg = <0x53100000 0x200>; + interrupts = <109>; + dmas = <&edma 36>; + dma-names = "rx"; + }; }; }; -- cgit v1.2.3 From 99919e5e1545d819023f44e5e97d2105af0ca613 Mon Sep 17 00:00:00 2001 From: "Mark A. Greer" Date: Fri, 23 Aug 2013 14:12:36 -0700 Subject: ARM: dts: AM33XX: Add AES data and documentation Add the generic AM33XX AES module's device tree data and enable it for the am335x-evm, am335x-evmsk, and am335x-bone platforms. Also add Documentation file describing the data for the AES module. Cc: Paul Walmsley Signed-off-by: Mark A. Greer Signed-off-by: Joel Fernandes [joelf@ti.com: Dropped interrupt-parent property, documentation fixups] Signed-off-by: Benoit Cousson --- .../devicetree/bindings/crypto/omap-aes.txt | 31 ++++++++++++++++++++++ arch/arm/boot/dts/am335x-bone.dts | 4 +++ arch/arm/boot/dts/am335x-evm.dts | 4 +++ arch/arm/boot/dts/am335x-evmsk.dts | 4 +++ arch/arm/boot/dts/am33xx.dtsi | 10 +++++++ 5 files changed, 53 insertions(+) create mode 100644 Documentation/devicetree/bindings/crypto/omap-aes.txt diff --git a/Documentation/devicetree/bindings/crypto/omap-aes.txt b/Documentation/devicetree/bindings/crypto/omap-aes.txt new file mode 100644 index 000000000000..fd9717653cbb --- /dev/null +++ b/Documentation/devicetree/bindings/crypto/omap-aes.txt @@ -0,0 +1,31 @@ +OMAP SoC AES crypto Module + +Required properties: + +- compatible : Should contain entries for this and backward compatible + AES versions: + - "ti,omap2-aes" for OMAP2. + - "ti,omap3-aes" for OMAP3. + - "ti,omap4-aes" for OMAP4 and AM33XX. + Note that the OMAP2 and 3 versions are compatible (OMAP3 supports + more algorithms) but they are incompatible with OMAP4. +- ti,hwmods: Name of the hwmod associated with the AES module +- reg : Offset and length of the register set for the module +- interrupts : the interrupt-specifier for the AES module. + +Optional properties: +- dmas: DMA specifiers for tx and rx dma. See the DMA client binding, + Documentation/devicetree/bindings/dma/dma.txt +- dma-names: DMA request names should include "tx" and "rx" if present. + +Example: + /* AM335x */ + aes: aes@53500000 { + compatible = "ti,omap4-aes"; + ti,hwmods = "aes"; + reg = <0x53500000 0xa0>; + interrupts = <102>; + dmas = <&edma 6>, + <&edma 5>; + dma-names = "tx", "rx"; + }; diff --git a/arch/arm/boot/dts/am335x-bone.dts b/arch/arm/boot/dts/am335x-bone.dts index 8a9802ee6380..94ee427a6db1 100644 --- a/arch/arm/boot/dts/am335x-bone.dts +++ b/arch/arm/boot/dts/am335x-bone.dts @@ -23,3 +23,7 @@ &sham { status = "okay"; }; + +&aes { + status = "okay"; +}; diff --git a/arch/arm/boot/dts/am335x-evm.dts b/arch/arm/boot/dts/am335x-evm.dts index 09786efc25c1..ff834add842d 100644 --- a/arch/arm/boot/dts/am335x-evm.dts +++ b/arch/arm/boot/dts/am335x-evm.dts @@ -527,3 +527,7 @@ &sham { status = "okay"; }; + +&aes { + status = "okay"; +}; diff --git a/arch/arm/boot/dts/am335x-evmsk.dts b/arch/arm/boot/dts/am335x-evmsk.dts index 08d5cd9e6457..5f12b28dd593 100644 --- a/arch/arm/boot/dts/am335x-evmsk.dts +++ b/arch/arm/boot/dts/am335x-evmsk.dts @@ -429,3 +429,7 @@ &sham { status = "okay"; }; + +&aes { + status = "okay"; +}; diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi index 5f114a7f9484..e36aed69a363 100644 --- a/arch/arm/boot/dts/am33xx.dtsi +++ b/arch/arm/boot/dts/am33xx.dtsi @@ -721,5 +721,15 @@ dmas = <&edma 36>; dma-names = "rx"; }; + + aes: aes@53500000 { + compatible = "ti,omap4-aes"; + ti,hwmods = "aes"; + reg = <0x53500000 0xa0>; + interrupts = <102>; + dmas = <&edma 6>, + <&edma 5>; + dma-names = "tx", "rx"; + }; }; }; -- cgit v1.2.3 From 7af8884a175b56851ece09e47c74948c3160c07c Mon Sep 17 00:00:00 2001 From: Joel Fernandes Date: Wed, 17 Jul 2013 19:07:52 -0500 Subject: ARM: dts: AM33XX: Fix AES interrupt number AES interrupts were previously not used, but after recent changes to omap-aes driver, its being used. Correct the interrupt number to have working PIO mode. Signed-off-by: Joel Fernandes Signed-off-by: Benoit Cousson --- arch/arm/boot/dts/am33xx.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi index e36aed69a363..c87bf4b8acf2 100644 --- a/arch/arm/boot/dts/am33xx.dtsi +++ b/arch/arm/boot/dts/am33xx.dtsi @@ -726,7 +726,7 @@ compatible = "ti,omap4-aes"; ti,hwmods = "aes"; reg = <0x53500000 0xa0>; - interrupts = <102>; + interrupts = <103>; dmas = <&edma 6>, <&edma 5>; dma-names = "tx", "rx"; -- cgit v1.2.3 From 6e70a510b4fc7b3e275e29875bb076e1891663d7 Mon Sep 17 00:00:00 2001 From: Joel Fernandes Date: Tue, 24 Sep 2013 14:35:09 -0500 Subject: ARM: dts: AM437X: Add AES node AM437x SoC has AES module similar to the one on OMAP4. Add DT node for the same. Signed-off-by: Joel Fernandes Signed-off-by: Benoit Cousson --- arch/arm/boot/dts/am4372.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm/boot/dts/am4372.dtsi b/arch/arm/boot/dts/am4372.dtsi index 0fe393ab8920..7e9ff75c28b2 100644 --- a/arch/arm/boot/dts/am4372.dtsi +++ b/arch/arm/boot/dts/am4372.dtsi @@ -411,5 +411,12 @@ ti,hwmods = "epwmss5"; status = "disabled"; }; + + aes: aes@53501000 { + compatible = "ti,omap4-aes"; + ti,hwmods = "aes"; + reg = <0x53501000 0xa0>; + interrupts = ; + }; }; }; -- cgit v1.2.3 From 099f3a854832c5d30188783ad48ea9e302fba4f8 Mon Sep 17 00:00:00 2001 From: Joel Fernandes Date: Tue, 24 Sep 2013 14:37:33 -0500 Subject: ARM: dts: AM437X: Add DES node AM437x SoC has a DES3DES module similar to the one on OMAP4. Add DT node for the same. Signed-off-by: Joel Fernandes Signed-off-by: Benoit Cousson --- arch/arm/boot/dts/am4372.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm/boot/dts/am4372.dtsi b/arch/arm/boot/dts/am4372.dtsi index 7e9ff75c28b2..a403172430bc 100644 --- a/arch/arm/boot/dts/am4372.dtsi +++ b/arch/arm/boot/dts/am4372.dtsi @@ -418,5 +418,12 @@ reg = <0x53501000 0xa0>; interrupts = ; }; + + des: des@53701000 { + compatible = "ti,omap4-des"; + ti,hwmods = "des"; + reg = <0x53701000 0xa0>; + interrupts = ; + }; }; }; -- cgit v1.2.3 From d6cfc1e266d34d5b1f8a26bb272d2d2c466d89b8 Mon Sep 17 00:00:00 2001 From: Benoit Parrot Date: Thu, 8 Aug 2013 18:28:14 -0500 Subject: ARM: dts: AM33XX: Add LCDC info into am335x-evm Add LCDC device node in DT for am33xx Add LCDC and Panel info in DT for am335x-evm Changes: - remove redundant/unnecessary SoC specific setting in the board dts - resolved conflicts on for_3.13/dts Signed-off-by: Benoit Parrot Signed-off-by: Joel Fernandes Signed-off-by: Benoit Cousson --- arch/arm/boot/dts/am335x-evm.dts | 71 ++++++++++++++++++++++++++++++++++++++++ arch/arm/boot/dts/am33xx.dtsi | 9 +++++ 2 files changed, 80 insertions(+) diff --git a/arch/arm/boot/dts/am335x-evm.dts b/arch/arm/boot/dts/am335x-evm.dts index ff834add842d..eabacf9b8c31 100644 --- a/arch/arm/boot/dts/am335x-evm.dts +++ b/arch/arm/boot/dts/am335x-evm.dts @@ -85,6 +85,40 @@ brightness-levels = <0 51 53 56 62 75 101 152 255>; default-brightness-level = <8>; }; + + panel { + compatible = "ti,tilcdc,panel"; + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&lcd_pins_s0>; + panel-info { + ac-bias = <255>; + ac-bias-intrpt = <0>; + dma-burst-sz = <16>; + bpp = <32>; + fdd = <0x80>; + sync-edge = <0>; + sync-ctrl = <1>; + raster-order = <0>; + fifo-th = <0>; + }; + + display-timings { + 800x480p62 { + clock-frequency = <30000000>; + hactive = <800>; + vactive = <480>; + hfront-porch = <39>; + hback-porch = <39>; + hsync-len = <47>; + vback-porch = <29>; + vfront-porch = <13>; + vsync-len = <2>; + hsync-active = <1>; + vsync-active = <1>; + }; + }; + }; }; &am33xx_pinmux { @@ -212,6 +246,39 @@ 0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7) >; }; + + lcd_pins_s0: lcd_pins_s0 { + pinctrl-single,pins = < + 0x20 0x01 /* gpmc_ad8.lcd_data16, OUTPUT | MODE1 */ + 0x24 0x01 /* gpmc_ad9.lcd_data17, OUTPUT | MODE1 */ + 0x28 0x01 /* gpmc_ad10.lcd_data18, OUTPUT | MODE1 */ + 0x2c 0x01 /* gpmc_ad11.lcd_data19, OUTPUT | MODE1 */ + 0x30 0x01 /* gpmc_ad12.lcd_data20, OUTPUT | MODE1 */ + 0x34 0x01 /* gpmc_ad13.lcd_data21, OUTPUT | MODE1 */ + 0x38 0x01 /* gpmc_ad14.lcd_data22, OUTPUT | MODE1 */ + 0x3c 0x01 /* gpmc_ad15.lcd_data23, OUTPUT | MODE1 */ + 0xa0 0x00 /* lcd_data0.lcd_data0, OUTPUT | MODE0 */ + 0xa4 0x00 /* lcd_data1.lcd_data1, OUTPUT | MODE0 */ + 0xa8 0x00 /* lcd_data2.lcd_data2, OUTPUT | MODE0 */ + 0xac 0x00 /* lcd_data3.lcd_data3, OUTPUT | MODE0 */ + 0xb0 0x00 /* lcd_data4.lcd_data4, OUTPUT | MODE0 */ + 0xb4 0x00 /* lcd_data5.lcd_data5, OUTPUT | MODE0 */ + 0xb8 0x00 /* lcd_data6.lcd_data6, OUTPUT | MODE0 */ + 0xbc 0x00 /* lcd_data7.lcd_data7, OUTPUT | MODE0 */ + 0xc0 0x00 /* lcd_data8.lcd_data8, OUTPUT | MODE0 */ + 0xc4 0x00 /* lcd_data9.lcd_data9, OUTPUT | MODE0 */ + 0xc8 0x00 /* lcd_data10.lcd_data10, OUTPUT | MODE0 */ + 0xcc 0x00 /* lcd_data11.lcd_data11, OUTPUT | MODE0 */ + 0xd0 0x00 /* lcd_data12.lcd_data12, OUTPUT | MODE0 */ + 0xd4 0x00 /* lcd_data13.lcd_data13, OUTPUT | MODE0 */ + 0xd8 0x00 /* lcd_data14.lcd_data14, OUTPUT | MODE0 */ + 0xdc 0x00 /* lcd_data15.lcd_data15, OUTPUT | MODE0 */ + 0xe0 0x00 /* lcd_vsync.lcd_vsync, OUTPUT | MODE0 */ + 0xe4 0x00 /* lcd_hsync.lcd_hsync, OUTPUT | MODE0 */ + 0xe8 0x00 /* lcd_pclk.lcd_pclk, OUTPUT | MODE0 */ + 0xec 0x00 /* lcd_ac_bias_en.lcd_ac_bias_en, OUTPUT | MODE0 */ + >; + }; }; &uart0 { @@ -308,6 +375,10 @@ }; }; +&lcdc { + status = "okay"; +}; + &elm { status = "okay"; }; diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi index c87bf4b8acf2..7db3c81d1563 100644 --- a/arch/arm/boot/dts/am33xx.dtsi +++ b/arch/arm/boot/dts/am33xx.dtsi @@ -684,6 +684,15 @@ status = "disabled"; }; + lcdc: lcdc@4830e000 { + compatible = "ti,am33xx-tilcdc"; + reg = <0x4830e000 0x1000>; + interrupt-parent = <&intc>; + interrupts = <36>; + ti,hwmods = "lcdc"; + status = "disabled"; + }; + tscadc: tscadc@44e0d000 { compatible = "ti,am3359-tscadc"; reg = <0x44e0d000 0x1000>; -- cgit v1.2.3 From 559a08e89350e269a4bba93629f39da5dd8e4fef Mon Sep 17 00:00:00 2001 From: Darren Etheridge Date: Fri, 20 Sep 2013 15:01:42 -0500 Subject: ARM: dts: AM33XX beagle black: add pinmux and hdmi node to enable display Enable the hdmi output and the LCD Controller on BeagleBone Black. Also configure the correct pinmux for output of video data from the SoC to the HDMI encoder. Signed-off-by: Darren Etheridge Signed-off-by: Joel Fernandes Signed-off-by: Benoit Cousson --- arch/arm/boot/dts/am335x-boneblack.dts | 48 ++++++++++++++++++++++++++++++++++ 1 file changed, 48 insertions(+) diff --git a/arch/arm/boot/dts/am335x-boneblack.dts b/arch/arm/boot/dts/am335x-boneblack.dts index 16b3bea61d46..6b71ad95a5cf 100644 --- a/arch/arm/boot/dts/am335x-boneblack.dts +++ b/arch/arm/boot/dts/am335x-boneblack.dts @@ -28,3 +28,51 @@ status = "okay"; ti,vcc-aux-disable-is-sleep; }; + +&am33xx_pinmux { + nxp_hdmi_bonelt_pins: nxp_hdmi_bonelt_pins { + pinctrl-single,pins = < + 0x1b0 0x03 /* xdma_event_intr0, OMAP_MUX_MODE3 | AM33XX_PIN_OUTPUT */ + 0xa0 0x08 /* lcd_data0.lcd_data0, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ + 0xa4 0x08 /* lcd_data1.lcd_data1, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ + 0xa8 0x08 /* lcd_data2.lcd_data2, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ + 0xac 0x08 /* lcd_data3.lcd_data3, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ + 0xb0 0x08 /* lcd_data4.lcd_data4, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ + 0xb4 0x08 /* lcd_data5.lcd_data5, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ + 0xb8 0x08 /* lcd_data6.lcd_data6, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ + 0xbc 0x08 /* lcd_data7.lcd_data7, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ + 0xc0 0x08 /* lcd_data8.lcd_data8, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ + 0xc4 0x08 /* lcd_data9.lcd_data9, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ + 0xc8 0x08 /* lcd_data10.lcd_data10, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ + 0xcc 0x08 /* lcd_data11.lcd_data11, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ + 0xd0 0x08 /* lcd_data12.lcd_data12, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ + 0xd4 0x08 /* lcd_data13.lcd_data13, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ + 0xd8 0x08 /* lcd_data14.lcd_data14, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ + 0xdc 0x08 /* lcd_data15.lcd_data15, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ + 0xe0 0x00 /* lcd_vsync.lcd_vsync, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT */ + 0xe4 0x00 /* lcd_hsync.lcd_hsync, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT */ + 0xe8 0x00 /* lcd_pclk.lcd_pclk, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT */ + 0xec 0x00 /* lcd_ac_bias_en.lcd_ac_bias_en, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT */ + >; + }; + nxp_hdmi_bonelt_off_pins: nxp_hdmi_bonelt_off_pins { + pinctrl-single,pins = < + 0x1b0 0x03 /* xdma_event_intr0, OMAP_MUX_MODE3 | AM33XX_PIN_OUTPUT */ + >; + }; +}; + +&lcdc { + status = "okay"; +}; + +/ { + hdmi { + compatible = "ti,tilcdc,slave"; + i2c = <&i2c0>; + pinctrl-names = "default", "off"; + pinctrl-0 = <&nxp_hdmi_bonelt_pins>; + pinctrl-1 = <&nxp_hdmi_bonelt_off_pins>; + status = "okay"; + }; +}; -- cgit v1.2.3 From aa496bde78b9e6d1124b69b9f49acf4ee7d6b282 Mon Sep 17 00:00:00 2001 From: Javier Martinez Canillas Date: Mon, 7 Oct 2013 17:12:23 +0200 Subject: ARM: dts: omap3-igep: Add USB OTG support Commit ad871c10b ("ARM: dts: OMAP: Add usb_otg and glue data to O added USB OTG support for most OMAP boards but some OMAP3 boards such as IGEP boards were not updated. This patch adds an USB OTG device node to these board. Signed-off-by: Javier Martinez Canillas Tested-by: Enric Balletbo i Serra Signed-off-by: Benoit Cousson --- arch/arm/boot/dts/omap3-igep.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm/boot/dts/omap3-igep.dtsi b/arch/arm/boot/dts/omap3-igep.dtsi index 0f92224dc4fc..ba1e58b7b7e3 100644 --- a/arch/arm/boot/dts/omap3-igep.dtsi +++ b/arch/arm/boot/dts/omap3-igep.dtsi @@ -143,3 +143,12 @@ &twl_gpio { ti,use-leds; }; + +&usb_otg_hs { + interface-type = <0>; + usb-phy = <&usb2_phy>; + phys = <&usb2_phy>; + phy-names = "usb2-phy"; + mode = <3>; + power = <50>; +}; -- cgit v1.2.3 From 339e834fe06a2367ab8dcc18e57e810997ac9750 Mon Sep 17 00:00:00 2001 From: Javier Martinez Canillas Date: Mon, 7 Oct 2013 17:12:24 +0200 Subject: ARM: dts: omap3-igep0020: Add HS USB Host support Add device nodes for the HS USB Host port 1, USB PHY and its required regulator and also pin mux setup for HS USB1 pins. Signed-off-by: Javier Martinez Canillas Tested-by: Enric Balletbo i Serra Acked-by: Roger Quadros Signed-off-by: Benoit Cousson --- arch/arm/boot/dts/omap3-igep0020.dts | 49 ++++++++++++++++++++++++++++++++++++ 1 file changed, 49 insertions(+) diff --git a/arch/arm/boot/dts/omap3-igep0020.dts b/arch/arm/boot/dts/omap3-igep0020.dts index eedf0d8b42d5..35346f2473b6 100644 --- a/arch/arm/boot/dts/omap3-igep0020.dts +++ b/arch/arm/boot/dts/omap3-igep0020.dts @@ -55,6 +55,47 @@ regulator-name = "vdd33a"; regulator-always-on; }; + + /* HS USB Port 1 Power */ + hsusb1_power: hsusb1_power_reg { + compatible = "regulator-fixed"; + regulator-name = "hsusb1_vbus"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&twl_gpio 18 GPIO_ACTIVE_LOW>; /* GPIO LEDA */ + startup-delay-us = <70000>; + }; + + /* HS USB Host PHY on PORT 1 */ + hsusb1_phy: hsusb1_phy { + compatible = "usb-nop-xceiv"; + reset-gpios = <&gpio1 24 GPIO_ACTIVE_LOW>; /* gpio_24 */ + vcc-supply = <&hsusb1_power>; + }; +}; + +&omap3_pmx_core { + pinctrl-names = "default"; + pinctrl-0 = < + &hsusbb1_pins + >; + + hsusbb1_pins: pinmux_hsusbb1_pins { + pinctrl-single,pins = < + 0x5aa (PIN_OUTPUT | MUX_MODE3) /* etk_ctl.hsusb1_clk */ + 0x5a8 (PIN_OUTPUT | MUX_MODE3) /* etk_clk.hsusb1_stp */ + 0x5bc (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d8.hsusb1_dir */ + 0x5be (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d9.hsusb1_nxt */ + 0x5ac (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d0.hsusb1_data0 */ + 0x5ae (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d1.hsusb1_data1 */ + 0x5b0 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d2.hsusb1_data2 */ + 0x5b2 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d3.hsusb1_data7 */ + 0x5b4 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d4.hsusb1_data4 */ + 0x5b6 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d5.hsusb1_data5 */ + 0x5b8 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d6.hsusb1_data6 */ + 0x5ba (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d7.hsusb1_data3 */ + >; + }; }; &leds_pins { @@ -166,3 +207,11 @@ smsc,save-mac-address; }; }; + +&usbhshost { + port1-mode = "ehci-phy"; +}; + +&usbhsehci { + phys = <&hsusb1_phy>; +}; -- cgit v1.2.3 From 2892aef29f7a08240debbaae9706a29839fd8c03 Mon Sep 17 00:00:00 2001 From: Javier Martinez Canillas Date: Mon, 7 Oct 2013 17:12:25 +0200 Subject: ARM: dts: omap3-igep0020: use standard constant for IRQ flags Commit 840ef8b7 ("ARM: dt: add header to define IRQ flags") added constants for IRQ edge/level triggered types so use it instead of a magic number to enhance the DT readability. Signed-off-by: Javier Martinez Canillas Signed-off-by: Benoit Cousson --- arch/arm/boot/dts/omap3-igep0020.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/omap3-igep0020.dts b/arch/arm/boot/dts/omap3-igep0020.dts index 35346f2473b6..750ce84fc195 100644 --- a/arch/arm/boot/dts/omap3-igep0020.dts +++ b/arch/arm/boot/dts/omap3-igep0020.dts @@ -199,7 +199,7 @@ gpmc,cycle2cycle-diffcsen; interrupt-parent = <&gpio6>; - interrupts = <16 8>; + interrupts = <16 IRQ_TYPE_LEVEL_LOW>; vmmc-supply = <&vddvario>; vmmc_aux-supply = <&vdd33a>; reg-io-width = <4>; -- cgit v1.2.3 From 86583375aaf76fb2a03085100bbc3123c6ced559 Mon Sep 17 00:00:00 2001 From: Nishanth Menon Date: Thu, 19 Sep 2013 14:11:36 -0500 Subject: ARM: dts: omap5-uevm: mark TWL6037 as system-power-controller This allows the palmas pm_power_off to kick in on power off command and switch off the board. Signed-off-by: Nishanth Menon Signed-off-by: Benoit Cousson --- arch/arm/boot/dts/omap5-uevm.dts | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/boot/dts/omap5-uevm.dts b/arch/arm/boot/dts/omap5-uevm.dts index 748f6bfbeef6..d784b3a00410 100644 --- a/arch/arm/boot/dts/omap5-uevm.dts +++ b/arch/arm/boot/dts/omap5-uevm.dts @@ -249,6 +249,7 @@ reg = <0x48>; interrupt-controller; #interrupt-cells = <2>; + ti,system-power-controller; extcon_usb3: palmas_usb { compatible = "ti,palmas-usb-vid"; -- cgit v1.2.3 From bf1788df8f99e5bcd8e9e0bbdacaf193ca2cbb68 Mon Sep 17 00:00:00 2001 From: Balaji T K Date: Mon, 7 Oct 2013 21:55:03 +0530 Subject: ARM: dts: dra7-evm: Add mmc1 node for micro-sd support Add mmc1 dt node to dra7-evm board. Input for ldo1 regulator is controlled by gpio 5 of pcf8575 chip (0x21) on i2c1 bus. When dt support for gpio-pcf857x is available, input supply will be modelled as cascaded regulator. Signed-off-by: Balaji T K Acked-by: Sekhar Nori Signed-off-by: Benoit Cousson --- arch/arm/boot/dts/dra7-evm.dts | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm/boot/dts/dra7-evm.dts b/arch/arm/boot/dts/dra7-evm.dts index fbbe40625508..65cd15a92cb1 100644 --- a/arch/arm/boot/dts/dra7-evm.dts +++ b/arch/arm/boot/dts/dra7-evm.dts @@ -250,3 +250,9 @@ pinctrl-names = "default"; pinctrl-0 = <&uart3_pins>; }; + +&mmc1 { + status = "okay"; + vmmc-supply = <&ldo1_reg>; + bus-width = <4>; +}; -- cgit v1.2.3 From 6cf02dbb4b71f1c0c9acec89ae2df3b2318135f4 Mon Sep 17 00:00:00 2001 From: Balaji T K Date: Mon, 7 Oct 2013 21:55:04 +0530 Subject: ARM: dts: dra7-evm: Add mmc2 node for eMMC support Add mmc2 dt node to dra7-evm board and model eMMC vcc as fixed regulator. Signed-off-by: Balaji T K Acked-by: Sekhar Nori Signed-off-by: Benoit Cousson --- arch/arm/boot/dts/dra7-evm.dts | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/arch/arm/boot/dts/dra7-evm.dts b/arch/arm/boot/dts/dra7-evm.dts index 65cd15a92cb1..3abf5f41e5cc 100644 --- a/arch/arm/boot/dts/dra7-evm.dts +++ b/arch/arm/boot/dts/dra7-evm.dts @@ -17,6 +17,13 @@ device_type = "memory"; reg = <0x80000000 0x60000000>; /* 1536 MB */ }; + + mmc2_3v3: fixedregulator-mmc2 { + compatible = "regulator-fixed"; + regulator-name = "mmc2_3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; }; &dra7_pmx_core { @@ -256,3 +263,9 @@ vmmc-supply = <&ldo1_reg>; bus-width = <4>; }; + +&mmc2 { + status = "okay"; + vmmc-supply = <&mmc2_3v3>; + bus-width = <8>; +}; -- cgit v1.2.3 From 8d71528343c69ce387bd5fdb4fd8dc2b9f69d97c Mon Sep 17 00:00:00 2001 From: Felipe Balbi Date: Fri, 11 Oct 2013 15:41:25 -0700 Subject: ARM: configs: omap2plus_defconfig: enable dwc3 and dependencies DWC3 enables USB3 functionality for OMAP5 boards, it's safe to enable those drivers in omap2plus_defconfig. Signed-off-by: Felipe Balbi Acked-by: Tony Lindgren Signed-off-by: Kishon Vijay Abraham I Signed-off-by: Benoit Cousson [tony@atomide.com: updated against other defconfig changes] Signed-off-by: Tony Lindgren --- arch/arm/configs/omap2plus_defconfig | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm/configs/omap2plus_defconfig b/arch/arm/configs/omap2plus_defconfig index dad68166520f..98a50c309b90 100644 --- a/arch/arm/configs/omap2plus_defconfig +++ b/arch/arm/configs/omap2plus_defconfig @@ -76,6 +76,7 @@ CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" CONFIG_DEVTMPFS=y CONFIG_DEVTMPFS_MOUNT=y CONFIG_DMA_CMA=y +CONFIG_OMAP_OCP2SCP=y CONFIG_CONNECTOR=y CONFIG_MTD=y CONFIG_MTD_CMDLINE_PARTS=y @@ -168,9 +169,11 @@ CONFIG_DRA752_THERMAL=y CONFIG_WATCHDOG=y CONFIG_OMAP_WATCHDOG=y CONFIG_TWL4030_WATCHDOG=y +CONFIG_MFD_PALMAS=y CONFIG_MFD_TPS65217=y CONFIG_MFD_TPS65910=y CONFIG_TWL6040_CORE=y +CONFIG_REGULATOR_PALMAS=y CONFIG_REGULATOR_TPS65023=y CONFIG_REGULATOR_TPS6507X=y CONFIG_REGULATOR_TPS65217=y @@ -213,8 +216,11 @@ CONFIG_USB_ANNOUNCE_NEW_DEVICES=y CONFIG_USB_MON=y CONFIG_USB_WDM=y CONFIG_USB_STORAGE=y +CONFIG_USB_DWC3=m CONFIG_USB_TEST=y CONFIG_NOP_USB_XCEIV=y +CONFIG_OMAP_USB2=y +CONFIG_OMAP_USB3=y CONFIG_USB_GADGET=y CONFIG_USB_GADGET_DEBUG=y CONFIG_USB_GADGET_DEBUG_FILES=y @@ -242,6 +248,8 @@ CONFIG_RTC_DRV_OMAP=y CONFIG_DMADEVICES=y CONFIG_TI_EDMA=y CONFIG_DMA_OMAP=y +CONFIG_EXTCON=y +CONFIG_EXTCON_PALMAS=y CONFIG_EXT2_FS=y CONFIG_EXT3_FS=y # CONFIG_EXT3_FS_XATTR is not set -- cgit v1.2.3