From ca3a0ff80faa7ee043fd615c9d9394757e2acb09 Mon Sep 17 00:00:00 2001 From: Daniel Vetter Date: Thu, 14 Feb 2013 16:54:22 +0100 Subject: drm/i915: split up fdi_set_m_n into computation and hw setup MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit And also move the computed m_n values into the pipe_config. This is a prep step to move the fdi state computation completely into the prepare phase of the modeset sequence. Which will allow us to handle fdi link bw constraints in a better way. Reviewed-by: Ville Syrjälä Signed-off-by: Daniel Vetter --- drivers/gpu/drm/i915/intel_display.c | 26 +++++++++++++++----------- drivers/gpu/drm/i915/intel_drv.h | 3 ++- 2 files changed, 17 insertions(+), 12 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 63975c7f9668..0f1e17a7b757 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -5499,13 +5499,11 @@ void intel_cpu_transcoder_set_m_n(struct intel_crtc *crtc, } } -static void ironlake_fdi_set_m_n(struct drm_crtc *crtc) +static void ironlake_fdi_compute_config(struct intel_crtc *intel_crtc) { - struct drm_device *dev = crtc->dev; - struct intel_crtc *intel_crtc = to_intel_crtc(crtc); + struct drm_device *dev = intel_crtc->base.dev; struct drm_display_mode *adjusted_mode = &intel_crtc->config.adjusted_mode; - struct intel_link_m_n m_n = {0}; int target_clock, lane, link_bw; /* FDI is a binary signal running at ~2.7GHz, encoding @@ -5530,9 +5528,7 @@ static void ironlake_fdi_set_m_n(struct drm_crtc *crtc) if (intel_crtc->config.pixel_multiplier > 1) link_bw *= intel_crtc->config.pixel_multiplier; intel_link_compute_m_n(intel_crtc->config.pipe_bpp, lane, target_clock, - link_bw, &m_n); - - intel_cpu_transcoder_set_m_n(intel_crtc, &m_n); + link_bw, &intel_crtc->config.fdi_m_n); } static bool ironlake_needs_fb_cb_tune(struct dpll *dpll, int factor) @@ -5753,8 +5749,12 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc, /* Note, this also computes intel_crtc->fdi_lanes which is used below in * ironlake_check_fdi_lanes. */ intel_crtc->config.fdi_lanes = 0; - if (intel_crtc->config.has_pch_encoder) - ironlake_fdi_set_m_n(crtc); + if (intel_crtc->config.has_pch_encoder) { + ironlake_fdi_compute_config(intel_crtc); + + intel_cpu_transcoder_set_m_n(intel_crtc, + &intel_crtc->config.fdi_m_n); + } fdi_config_ok = ironlake_check_fdi_lanes(intel_crtc); @@ -5884,8 +5884,12 @@ static int haswell_crtc_mode_set(struct drm_crtc *crtc, intel_set_pipe_timings(intel_crtc, mode, adjusted_mode); - if (intel_crtc->config.has_pch_encoder) - ironlake_fdi_set_m_n(crtc); + if (intel_crtc->config.has_pch_encoder) { + ironlake_fdi_compute_config(intel_crtc); + + intel_cpu_transcoder_set_m_n(intel_crtc, + &intel_crtc->config.fdi_m_n); + } haswell_set_pipeconf(crtc); diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index cc075a312ea3..48f309eaf7aa 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h @@ -250,8 +250,9 @@ struct intel_crtc_config { u32 size; } pch_pfit; - /* FDI lanes used, only valid if has_pch_encoder is set. */ + /* FDI configuration, only valid if has_pch_encoder is set. */ int fdi_lanes; + struct intel_link_m_n fdi_m_n; }; struct intel_crtc { -- cgit v1.2.3