From c4a11bf423ec84a16f7df0773041c29f2f305cc1 Mon Sep 17 00:00:00 2001 From: Paul Cercueil Date: Sat, 16 Oct 2021 14:33:21 +0100 Subject: dt-bindings: Rename Ingenic CGU headers to ingenic,*.h Tidy up a bit the tree, by prefixing all include/dt-bindings/clock/ files related to Ingenic SoCs with 'ingenic,'. Signed-off-by: Paul Cercueil Acked-by: Rob Herring Acked-by: Stephen Boyd Signed-off-by: Rob Herring Link: https://lore.kernel.org/r/20211016133322.40771-1-paul@crapouillou.net --- .../devicetree/bindings/clock/ingenic,cgu.yaml | 2 +- .../devicetree/bindings/display/ingenic,ipu.yaml | 2 +- .../devicetree/bindings/display/ingenic,lcd.yaml | 4 +- .../devicetree/bindings/dma/ingenic,dma.yaml | 2 +- .../devicetree/bindings/i2c/ingenic,i2c.yaml | 2 +- .../devicetree/bindings/iio/adc/ingenic,adc.yaml | 2 +- .../bindings/memory-controllers/ingenic,nemc.yaml | 2 +- .../bindings/mips/ingenic/ingenic,cpu.yaml | 2 +- .../devicetree/bindings/mmc/ingenic,mmc.yaml | 2 +- .../devicetree/bindings/mtd/ingenic,nand.yaml | 2 +- .../devicetree/bindings/net/ingenic,mac.yaml | 2 +- .../bindings/nvmem/ingenic,jz4780-efuse.yaml | 2 +- .../devicetree/bindings/phy/ingenic,phy-usb.yaml | 2 +- .../bindings/remoteproc/ingenic,vpu.yaml | 2 +- .../devicetree/bindings/rng/ingenic,trng.yaml | 2 +- .../devicetree/bindings/rtc/ingenic,rtc.yaml | 2 +- .../devicetree/bindings/serial/ingenic,uart.yaml | 2 +- .../devicetree/bindings/sound/ingenic,aic.yaml | 2 +- .../devicetree/bindings/sound/ingenic,codec.yaml | 2 +- .../devicetree/bindings/spi/ingenic,spi.yaml | 2 +- .../devicetree/bindings/timer/ingenic,sysost.yaml | 2 +- .../devicetree/bindings/timer/ingenic,tcu.yaml | 2 +- .../devicetree/bindings/usb/ingenic,musb.yaml | 2 +- arch/mips/boot/dts/ingenic/jz4725b.dtsi | 2 +- arch/mips/boot/dts/ingenic/jz4740.dtsi | 2 +- arch/mips/boot/dts/ingenic/jz4770.dtsi | 2 +- arch/mips/boot/dts/ingenic/jz4780.dtsi | 2 +- arch/mips/boot/dts/ingenic/x1000.dtsi | 2 +- arch/mips/boot/dts/ingenic/x1830.dtsi | 2 +- drivers/clk/ingenic/jz4725b-cgu.c | 2 +- drivers/clk/ingenic/jz4740-cgu.c | 2 +- drivers/clk/ingenic/jz4760-cgu.c | 2 +- drivers/clk/ingenic/jz4770-cgu.c | 2 +- drivers/clk/ingenic/jz4780-cgu.c | 2 +- drivers/clk/ingenic/x1000-cgu.c | 2 +- drivers/clk/ingenic/x1830-cgu.c | 2 +- include/dt-bindings/clock/ingenic,jz4725b-cgu.h | 36 +++++++++ include/dt-bindings/clock/ingenic,jz4740-cgu.h | 39 ++++++++++ include/dt-bindings/clock/ingenic,jz4760-cgu.h | 54 +++++++++++++ include/dt-bindings/clock/ingenic,jz4770-cgu.h | 58 ++++++++++++++ include/dt-bindings/clock/ingenic,jz4780-cgu.h | 91 ++++++++++++++++++++++ include/dt-bindings/clock/ingenic,x1000-cgu.h | 54 +++++++++++++ include/dt-bindings/clock/ingenic,x1830-cgu.h | 57 ++++++++++++++ include/dt-bindings/clock/jz4725b-cgu.h | 36 --------- include/dt-bindings/clock/jz4740-cgu.h | 39 ---------- include/dt-bindings/clock/jz4760-cgu.h | 54 ------------- include/dt-bindings/clock/jz4770-cgu.h | 58 -------------- include/dt-bindings/clock/jz4780-cgu.h | 91 ---------------------- include/dt-bindings/clock/x1000-cgu.h | 54 ------------- include/dt-bindings/clock/x1830-cgu.h | 57 -------------- 50 files changed, 426 insertions(+), 426 deletions(-) create mode 100644 include/dt-bindings/clock/ingenic,jz4725b-cgu.h create mode 100644 include/dt-bindings/clock/ingenic,jz4740-cgu.h create mode 100644 include/dt-bindings/clock/ingenic,jz4760-cgu.h create mode 100644 include/dt-bindings/clock/ingenic,jz4770-cgu.h create mode 100644 include/dt-bindings/clock/ingenic,jz4780-cgu.h create mode 100644 include/dt-bindings/clock/ingenic,x1000-cgu.h create mode 100644 include/dt-bindings/clock/ingenic,x1830-cgu.h delete mode 100644 include/dt-bindings/clock/jz4725b-cgu.h delete mode 100644 include/dt-bindings/clock/jz4740-cgu.h delete mode 100644 include/dt-bindings/clock/jz4760-cgu.h delete mode 100644 include/dt-bindings/clock/jz4770-cgu.h delete mode 100644 include/dt-bindings/clock/jz4780-cgu.h delete mode 100644 include/dt-bindings/clock/x1000-cgu.h delete mode 100644 include/dt-bindings/clock/x1830-cgu.h diff --git a/Documentation/devicetree/bindings/clock/ingenic,cgu.yaml b/Documentation/devicetree/bindings/clock/ingenic,cgu.yaml index 6e80dbc8b8b9..aa1df03ef4a6 100644 --- a/Documentation/devicetree/bindings/clock/ingenic,cgu.yaml +++ b/Documentation/devicetree/bindings/clock/ingenic,cgu.yaml @@ -104,7 +104,7 @@ additionalProperties: false examples: - | - #include + #include cgu: clock-controller@10000000 { compatible = "ingenic,jz4770-cgu", "simple-mfd"; reg = <0x10000000 0x100>; diff --git a/Documentation/devicetree/bindings/display/ingenic,ipu.yaml b/Documentation/devicetree/bindings/display/ingenic,ipu.yaml index e679f48a3886..3f93def2c5a2 100644 --- a/Documentation/devicetree/bindings/display/ingenic,ipu.yaml +++ b/Documentation/devicetree/bindings/display/ingenic,ipu.yaml @@ -45,7 +45,7 @@ additionalProperties: false examples: - | - #include + #include ipu@13080000 { compatible = "ingenic,jz4770-ipu", "ingenic,jz4760-ipu"; reg = <0x13080000 0x800>; diff --git a/Documentation/devicetree/bindings/display/ingenic,lcd.yaml b/Documentation/devicetree/bindings/display/ingenic,lcd.yaml index 50d2b0a50e8a..0049010b37ca 100644 --- a/Documentation/devicetree/bindings/display/ingenic,lcd.yaml +++ b/Documentation/devicetree/bindings/display/ingenic,lcd.yaml @@ -88,7 +88,7 @@ additionalProperties: false examples: - | - #include + #include lcd-controller@13050000 { compatible = "ingenic,jz4740-lcd"; reg = <0x13050000 0x1000>; @@ -107,7 +107,7 @@ examples: }; - | - #include + #include lcd-controller@13050000 { compatible = "ingenic,jz4725b-lcd"; reg = <0x13050000 0x1000>; diff --git a/Documentation/devicetree/bindings/dma/ingenic,dma.yaml b/Documentation/devicetree/bindings/dma/ingenic,dma.yaml index ac4d59494fc8..dc059d6fd037 100644 --- a/Documentation/devicetree/bindings/dma/ingenic,dma.yaml +++ b/Documentation/devicetree/bindings/dma/ingenic,dma.yaml @@ -68,7 +68,7 @@ unevaluatedProperties: false examples: - | - #include + #include dma: dma-controller@13420000 { compatible = "ingenic,jz4780-dma"; reg = <0x13420000 0x400>, <0x13421000 0x40>; diff --git a/Documentation/devicetree/bindings/i2c/ingenic,i2c.yaml b/Documentation/devicetree/bindings/i2c/ingenic,i2c.yaml index e1e65eb4f795..febde6cc5f69 100644 --- a/Documentation/devicetree/bindings/i2c/ingenic,i2c.yaml +++ b/Documentation/devicetree/bindings/i2c/ingenic,i2c.yaml @@ -60,7 +60,7 @@ unevaluatedProperties: false examples: - | - #include + #include #include #include i2c@10054000 { diff --git a/Documentation/devicetree/bindings/iio/adc/ingenic,adc.yaml b/Documentation/devicetree/bindings/iio/adc/ingenic,adc.yaml index 3eb7aa8822c3..698beb896f76 100644 --- a/Documentation/devicetree/bindings/iio/adc/ingenic,adc.yaml +++ b/Documentation/devicetree/bindings/iio/adc/ingenic,adc.yaml @@ -74,7 +74,7 @@ additionalProperties: false examples: - | - #include + #include #include adc@10070000 { diff --git a/Documentation/devicetree/bindings/memory-controllers/ingenic,nemc.yaml b/Documentation/devicetree/bindings/memory-controllers/ingenic,nemc.yaml index fe0ce191a851..24f9e1982028 100644 --- a/Documentation/devicetree/bindings/memory-controllers/ingenic,nemc.yaml +++ b/Documentation/devicetree/bindings/memory-controllers/ingenic,nemc.yaml @@ -84,7 +84,7 @@ additionalProperties: false examples: - | - #include + #include #include nemc: memory-controller@13410000 { compatible = "ingenic,jz4780-nemc"; diff --git a/Documentation/devicetree/bindings/mips/ingenic/ingenic,cpu.yaml b/Documentation/devicetree/bindings/mips/ingenic/ingenic,cpu.yaml index 6df1a9470d8f..b7e7fa715437 100644 --- a/Documentation/devicetree/bindings/mips/ingenic/ingenic,cpu.yaml +++ b/Documentation/devicetree/bindings/mips/ingenic/ingenic,cpu.yaml @@ -44,7 +44,7 @@ additionalProperties: false examples: - | - #include + #include cpus { #address-cells = <1>; diff --git a/Documentation/devicetree/bindings/mmc/ingenic,mmc.yaml b/Documentation/devicetree/bindings/mmc/ingenic,mmc.yaml index 546480f41141..01d5c6da0eeb 100644 --- a/Documentation/devicetree/bindings/mmc/ingenic,mmc.yaml +++ b/Documentation/devicetree/bindings/mmc/ingenic,mmc.yaml @@ -61,7 +61,7 @@ unevaluatedProperties: false examples: - | - #include + #include #include mmc0: mmc@13450000 { compatible = "ingenic,jz4780-mmc"; diff --git a/Documentation/devicetree/bindings/mtd/ingenic,nand.yaml b/Documentation/devicetree/bindings/mtd/ingenic,nand.yaml index 89aa3ceda592..9de8ef6e59ca 100644 --- a/Documentation/devicetree/bindings/mtd/ingenic,nand.yaml +++ b/Documentation/devicetree/bindings/mtd/ingenic,nand.yaml @@ -55,7 +55,7 @@ unevaluatedProperties: false examples: - | - #include + #include memory-controller@13410000 { compatible = "ingenic,jz4780-nemc"; reg = <0x13410000 0x10000>; diff --git a/Documentation/devicetree/bindings/net/ingenic,mac.yaml b/Documentation/devicetree/bindings/net/ingenic,mac.yaml index d08a88125a5c..8e52b2e683b8 100644 --- a/Documentation/devicetree/bindings/net/ingenic,mac.yaml +++ b/Documentation/devicetree/bindings/net/ingenic,mac.yaml @@ -58,7 +58,7 @@ additionalProperties: false examples: - | - #include + #include mac: ethernet@134b0000 { compatible = "ingenic,x1000-mac"; diff --git a/Documentation/devicetree/bindings/nvmem/ingenic,jz4780-efuse.yaml b/Documentation/devicetree/bindings/nvmem/ingenic,jz4780-efuse.yaml index 1485d3fbabfd..bf84768228f5 100644 --- a/Documentation/devicetree/bindings/nvmem/ingenic,jz4780-efuse.yaml +++ b/Documentation/devicetree/bindings/nvmem/ingenic,jz4780-efuse.yaml @@ -33,7 +33,7 @@ unevaluatedProperties: false examples: - | - #include + #include efuse@134100d0 { compatible = "ingenic,jz4780-efuse"; diff --git a/Documentation/devicetree/bindings/phy/ingenic,phy-usb.yaml b/Documentation/devicetree/bindings/phy/ingenic,phy-usb.yaml index 0fd93d71fe5a..5cab21648632 100644 --- a/Documentation/devicetree/bindings/phy/ingenic,phy-usb.yaml +++ b/Documentation/devicetree/bindings/phy/ingenic,phy-usb.yaml @@ -46,7 +46,7 @@ additionalProperties: false examples: - | - #include + #include otg_phy: usb-phy@3c { compatible = "ingenic,jz4770-phy"; reg = <0x3c 0x10>; diff --git a/Documentation/devicetree/bindings/remoteproc/ingenic,vpu.yaml b/Documentation/devicetree/bindings/remoteproc/ingenic,vpu.yaml index d0aa91bbf5e5..aaaaabad46ea 100644 --- a/Documentation/devicetree/bindings/remoteproc/ingenic,vpu.yaml +++ b/Documentation/devicetree/bindings/remoteproc/ingenic,vpu.yaml @@ -58,7 +58,7 @@ additionalProperties: false examples: - | - #include + #include vpu: video-decoder@132a0000 { compatible = "ingenic,jz4770-vpu-rproc"; diff --git a/Documentation/devicetree/bindings/rng/ingenic,trng.yaml b/Documentation/devicetree/bindings/rng/ingenic,trng.yaml index 808f247c8421..044d9a065650 100644 --- a/Documentation/devicetree/bindings/rng/ingenic,trng.yaml +++ b/Documentation/devicetree/bindings/rng/ingenic,trng.yaml @@ -32,7 +32,7 @@ additionalProperties: false examples: - | - #include + #include dtrng: trng@10072000 { compatible = "ingenic,x1830-dtrng"; diff --git a/Documentation/devicetree/bindings/rtc/ingenic,rtc.yaml b/Documentation/devicetree/bindings/rtc/ingenic,rtc.yaml index 60e93e86ad9d..b235b2441997 100644 --- a/Documentation/devicetree/bindings/rtc/ingenic,rtc.yaml +++ b/Documentation/devicetree/bindings/rtc/ingenic,rtc.yaml @@ -72,7 +72,7 @@ unevaluatedProperties: false examples: - | - #include + #include rtc_dev: rtc@10003000 { compatible = "ingenic,jz4740-rtc"; reg = <0x10003000 0x40>; diff --git a/Documentation/devicetree/bindings/serial/ingenic,uart.yaml b/Documentation/devicetree/bindings/serial/ingenic,uart.yaml index b432d4dff730..9ca7a18ecd8b 100644 --- a/Documentation/devicetree/bindings/serial/ingenic,uart.yaml +++ b/Documentation/devicetree/bindings/serial/ingenic,uart.yaml @@ -71,7 +71,7 @@ unevaluatedProperties: false examples: - | - #include + #include #include #include serial@10032000 { diff --git a/Documentation/devicetree/bindings/sound/ingenic,aic.yaml b/Documentation/devicetree/bindings/sound/ingenic,aic.yaml index cdc0fdaab30a..d607325f2f15 100644 --- a/Documentation/devicetree/bindings/sound/ingenic,aic.yaml +++ b/Documentation/devicetree/bindings/sound/ingenic,aic.yaml @@ -71,7 +71,7 @@ required: examples: - | - #include + #include aic: audio-controller@10020000 { compatible = "ingenic,jz4740-i2s"; reg = <0x10020000 0x38>; diff --git a/Documentation/devicetree/bindings/sound/ingenic,codec.yaml b/Documentation/devicetree/bindings/sound/ingenic,codec.yaml index 97d5f3819b27..48aae54dd643 100644 --- a/Documentation/devicetree/bindings/sound/ingenic,codec.yaml +++ b/Documentation/devicetree/bindings/sound/ingenic,codec.yaml @@ -48,7 +48,7 @@ required: examples: - | - #include + #include codec: audio-codec@10020080 { compatible = "ingenic,jz4740-codec"; reg = <0x10020080 0x8>; diff --git a/Documentation/devicetree/bindings/spi/ingenic,spi.yaml b/Documentation/devicetree/bindings/spi/ingenic,spi.yaml index cf56cc484b19..5b1c7a2a6a31 100644 --- a/Documentation/devicetree/bindings/spi/ingenic,spi.yaml +++ b/Documentation/devicetree/bindings/spi/ingenic,spi.yaml @@ -55,7 +55,7 @@ unevaluatedProperties: false examples: - | - #include + #include spi@10043000 { compatible = "ingenic,jz4770-spi", "ingenic,jz4750-spi"; reg = <0x10043000 0x1c>; diff --git a/Documentation/devicetree/bindings/timer/ingenic,sysost.yaml b/Documentation/devicetree/bindings/timer/ingenic,sysost.yaml index df3eb76045e0..98648bf9e151 100644 --- a/Documentation/devicetree/bindings/timer/ingenic,sysost.yaml +++ b/Documentation/devicetree/bindings/timer/ingenic,sysost.yaml @@ -46,7 +46,7 @@ additionalProperties: false examples: - | - #include + #include ost: timer@12000000 { compatible = "ingenic,x1000-ost"; diff --git a/Documentation/devicetree/bindings/timer/ingenic,tcu.yaml b/Documentation/devicetree/bindings/timer/ingenic,tcu.yaml index 8165df4599cf..7fb37eae9da7 100644 --- a/Documentation/devicetree/bindings/timer/ingenic,tcu.yaml +++ b/Documentation/devicetree/bindings/timer/ingenic,tcu.yaml @@ -237,7 +237,7 @@ additionalProperties: false examples: - | - #include + #include #include tcu: timer@10002000 { compatible = "ingenic,jz4770-tcu", "ingenic,jz4760-tcu", "simple-mfd"; diff --git a/Documentation/devicetree/bindings/usb/ingenic,musb.yaml b/Documentation/devicetree/bindings/usb/ingenic,musb.yaml index f506225a4d57..59212358fcce 100644 --- a/Documentation/devicetree/bindings/usb/ingenic,musb.yaml +++ b/Documentation/devicetree/bindings/usb/ingenic,musb.yaml @@ -58,7 +58,7 @@ additionalProperties: false examples: - | - #include + #include usb_phy: usb-phy { compatible = "usb-nop-xceiv"; #phy-cells = <0>; diff --git a/arch/mips/boot/dts/ingenic/jz4725b.dtsi b/arch/mips/boot/dts/ingenic/jz4725b.dtsi index a1f0b71c9223..0c6a5a4266f4 100644 --- a/arch/mips/boot/dts/ingenic/jz4725b.dtsi +++ b/arch/mips/boot/dts/ingenic/jz4725b.dtsi @@ -1,5 +1,5 @@ // SPDX-License-Identifier: GPL-2.0 -#include +#include #include / { diff --git a/arch/mips/boot/dts/ingenic/jz4740.dtsi b/arch/mips/boot/dts/ingenic/jz4740.dtsi index c1afdfdaa8a3..772542e1f266 100644 --- a/arch/mips/boot/dts/ingenic/jz4740.dtsi +++ b/arch/mips/boot/dts/ingenic/jz4740.dtsi @@ -1,5 +1,5 @@ // SPDX-License-Identifier: GPL-2.0 -#include +#include #include / { diff --git a/arch/mips/boot/dts/ingenic/jz4770.dtsi b/arch/mips/boot/dts/ingenic/jz4770.dtsi index 05c00b93088e..dfe74328ae5d 100644 --- a/arch/mips/boot/dts/ingenic/jz4770.dtsi +++ b/arch/mips/boot/dts/ingenic/jz4770.dtsi @@ -1,5 +1,5 @@ // SPDX-License-Identifier: GPL-2.0 -#include +#include #include / { diff --git a/arch/mips/boot/dts/ingenic/jz4780.dtsi b/arch/mips/boot/dts/ingenic/jz4780.dtsi index 28adc3d93975..b0a4e2e019c3 100644 --- a/arch/mips/boot/dts/ingenic/jz4780.dtsi +++ b/arch/mips/boot/dts/ingenic/jz4780.dtsi @@ -1,5 +1,5 @@ // SPDX-License-Identifier: GPL-2.0 -#include +#include #include #include diff --git a/arch/mips/boot/dts/ingenic/x1000.dtsi b/arch/mips/boot/dts/ingenic/x1000.dtsi index dec7909d4baa..8bd27edef216 100644 --- a/arch/mips/boot/dts/ingenic/x1000.dtsi +++ b/arch/mips/boot/dts/ingenic/x1000.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 #include -#include +#include #include / { diff --git a/arch/mips/boot/dts/ingenic/x1830.dtsi b/arch/mips/boot/dts/ingenic/x1830.dtsi index 215257f8bb1a..2595df8671c7 100644 --- a/arch/mips/boot/dts/ingenic/x1830.dtsi +++ b/arch/mips/boot/dts/ingenic/x1830.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 #include -#include +#include #include / { diff --git a/drivers/clk/ingenic/jz4725b-cgu.c b/drivers/clk/ingenic/jz4725b-cgu.c index 5154b0cf8ad6..744d136b721b 100644 --- a/drivers/clk/ingenic/jz4725b-cgu.c +++ b/drivers/clk/ingenic/jz4725b-cgu.c @@ -10,7 +10,7 @@ #include #include -#include +#include #include "cgu.h" #include "pm.h" diff --git a/drivers/clk/ingenic/jz4740-cgu.c b/drivers/clk/ingenic/jz4740-cgu.c index cd878f08aca3..43ffb62c42bb 100644 --- a/drivers/clk/ingenic/jz4740-cgu.c +++ b/drivers/clk/ingenic/jz4740-cgu.c @@ -11,7 +11,7 @@ #include #include -#include +#include #include "cgu.h" #include "pm.h" diff --git a/drivers/clk/ingenic/jz4760-cgu.c b/drivers/clk/ingenic/jz4760-cgu.c index 14483797a4db..080d492ac95c 100644 --- a/drivers/clk/ingenic/jz4760-cgu.c +++ b/drivers/clk/ingenic/jz4760-cgu.c @@ -12,7 +12,7 @@ #include -#include +#include #include "cgu.h" #include "pm.h" diff --git a/drivers/clk/ingenic/jz4770-cgu.c b/drivers/clk/ingenic/jz4770-cgu.c index 2321742b3471..8c6c1208f462 100644 --- a/drivers/clk/ingenic/jz4770-cgu.c +++ b/drivers/clk/ingenic/jz4770-cgu.c @@ -10,7 +10,7 @@ #include #include -#include +#include #include "cgu.h" #include "pm.h" diff --git a/drivers/clk/ingenic/jz4780-cgu.c b/drivers/clk/ingenic/jz4780-cgu.c index 0268d23ebe2e..e357c228e0f1 100644 --- a/drivers/clk/ingenic/jz4780-cgu.c +++ b/drivers/clk/ingenic/jz4780-cgu.c @@ -13,7 +13,7 @@ #include #include -#include +#include #include "cgu.h" #include "pm.h" diff --git a/drivers/clk/ingenic/x1000-cgu.c b/drivers/clk/ingenic/x1000-cgu.c index 9aa20b52e1c3..3c4d5a77ccbd 100644 --- a/drivers/clk/ingenic/x1000-cgu.c +++ b/drivers/clk/ingenic/x1000-cgu.c @@ -9,7 +9,7 @@ #include #include -#include +#include #include "cgu.h" #include "pm.h" diff --git a/drivers/clk/ingenic/x1830-cgu.c b/drivers/clk/ingenic/x1830-cgu.c index 950aee243364..e01ec2dc7a1a 100644 --- a/drivers/clk/ingenic/x1830-cgu.c +++ b/drivers/clk/ingenic/x1830-cgu.c @@ -9,7 +9,7 @@ #include #include -#include +#include #include "cgu.h" #include "pm.h" diff --git a/include/dt-bindings/clock/ingenic,jz4725b-cgu.h b/include/dt-bindings/clock/ingenic,jz4725b-cgu.h new file mode 100644 index 000000000000..31f1ab0fe42c --- /dev/null +++ b/include/dt-bindings/clock/ingenic,jz4725b-cgu.h @@ -0,0 +1,36 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * This header provides clock numbers for the ingenic,jz4725b-cgu DT binding. + */ + +#ifndef __DT_BINDINGS_CLOCK_JZ4725B_CGU_H__ +#define __DT_BINDINGS_CLOCK_JZ4725B_CGU_H__ + +#define JZ4725B_CLK_EXT 0 +#define JZ4725B_CLK_OSC32K 1 +#define JZ4725B_CLK_PLL 2 +#define JZ4725B_CLK_PLL_HALF 3 +#define JZ4725B_CLK_CCLK 4 +#define JZ4725B_CLK_HCLK 5 +#define JZ4725B_CLK_PCLK 6 +#define JZ4725B_CLK_MCLK 7 +#define JZ4725B_CLK_IPU 8 +#define JZ4725B_CLK_LCD 9 +#define JZ4725B_CLK_I2S 10 +#define JZ4725B_CLK_SPI 11 +#define JZ4725B_CLK_MMC_MUX 12 +#define JZ4725B_CLK_UDC 13 +#define JZ4725B_CLK_UART 14 +#define JZ4725B_CLK_DMA 15 +#define JZ4725B_CLK_ADC 16 +#define JZ4725B_CLK_I2C 17 +#define JZ4725B_CLK_AIC 18 +#define JZ4725B_CLK_MMC0 19 +#define JZ4725B_CLK_MMC1 20 +#define JZ4725B_CLK_BCH 21 +#define JZ4725B_CLK_TCU 22 +#define JZ4725B_CLK_EXT512 23 +#define JZ4725B_CLK_RTC 24 +#define JZ4725B_CLK_UDC_PHY 25 + +#endif /* __DT_BINDINGS_CLOCK_JZ4725B_CGU_H__ */ diff --git a/include/dt-bindings/clock/ingenic,jz4740-cgu.h b/include/dt-bindings/clock/ingenic,jz4740-cgu.h new file mode 100644 index 000000000000..e82d77028581 --- /dev/null +++ b/include/dt-bindings/clock/ingenic,jz4740-cgu.h @@ -0,0 +1,39 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * This header provides clock numbers for the ingenic,jz4740-cgu DT binding. + * + * They are roughly ordered as: + * - external clocks + * - PLLs + * - muxes/dividers in the order they appear in the jz4740 programmers manual + * - gates in order of their bit in the CLKGR* registers + */ + +#ifndef __DT_BINDINGS_CLOCK_JZ4740_CGU_H__ +#define __DT_BINDINGS_CLOCK_JZ4740_CGU_H__ + +#define JZ4740_CLK_EXT 0 +#define JZ4740_CLK_RTC 1 +#define JZ4740_CLK_PLL 2 +#define JZ4740_CLK_PLL_HALF 3 +#define JZ4740_CLK_CCLK 4 +#define JZ4740_CLK_HCLK 5 +#define JZ4740_CLK_PCLK 6 +#define JZ4740_CLK_MCLK 7 +#define JZ4740_CLK_LCD 8 +#define JZ4740_CLK_LCD_PCLK 9 +#define JZ4740_CLK_I2S 10 +#define JZ4740_CLK_SPI 11 +#define JZ4740_CLK_MMC 12 +#define JZ4740_CLK_UHC 13 +#define JZ4740_CLK_UDC 14 +#define JZ4740_CLK_UART0 15 +#define JZ4740_CLK_UART1 16 +#define JZ4740_CLK_DMA 17 +#define JZ4740_CLK_IPU 18 +#define JZ4740_CLK_ADC 19 +#define JZ4740_CLK_I2C 20 +#define JZ4740_CLK_AIC 21 +#define JZ4740_CLK_TCU 22 + +#endif /* __DT_BINDINGS_CLOCK_JZ4740_CGU_H__ */ diff --git a/include/dt-bindings/clock/ingenic,jz4760-cgu.h b/include/dt-bindings/clock/ingenic,jz4760-cgu.h new file mode 100644 index 000000000000..4bb2e19c4743 --- /dev/null +++ b/include/dt-bindings/clock/ingenic,jz4760-cgu.h @@ -0,0 +1,54 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * This header provides clock numbers for the ingenic,jz4760-cgu DT binding. + */ + +#ifndef __DT_BINDINGS_CLOCK_JZ4760_CGU_H__ +#define __DT_BINDINGS_CLOCK_JZ4760_CGU_H__ + +#define JZ4760_CLK_EXT 0 +#define JZ4760_CLK_OSC32K 1 +#define JZ4760_CLK_PLL0 2 +#define JZ4760_CLK_PLL0_HALF 3 +#define JZ4760_CLK_PLL1 4 +#define JZ4760_CLK_CCLK 5 +#define JZ4760_CLK_HCLK 6 +#define JZ4760_CLK_SCLK 7 +#define JZ4760_CLK_H2CLK 8 +#define JZ4760_CLK_MCLK 9 +#define JZ4760_CLK_PCLK 10 +#define JZ4760_CLK_MMC_MUX 11 +#define JZ4760_CLK_MMC0 12 +#define JZ4760_CLK_MMC1 13 +#define JZ4760_CLK_MMC2 14 +#define JZ4760_CLK_CIM 15 +#define JZ4760_CLK_UHC 16 +#define JZ4760_CLK_GPU 17 +#define JZ4760_CLK_GPS 18 +#define JZ4760_CLK_SSI_MUX 19 +#define JZ4760_CLK_PCM 20 +#define JZ4760_CLK_I2S 21 +#define JZ4760_CLK_OTG 22 +#define JZ4760_CLK_SSI0 23 +#define JZ4760_CLK_SSI1 24 +#define JZ4760_CLK_SSI2 25 +#define JZ4760_CLK_DMA 26 +#define JZ4760_CLK_I2C0 27 +#define JZ4760_CLK_I2C1 28 +#define JZ4760_CLK_UART0 29 +#define JZ4760_CLK_UART1 30 +#define JZ4760_CLK_UART2 31 +#define JZ4760_CLK_UART3 32 +#define JZ4760_CLK_IPU 33 +#define JZ4760_CLK_ADC 34 +#define JZ4760_CLK_AIC 35 +#define JZ4760_CLK_VPU 36 +#define JZ4760_CLK_UHC_PHY 37 +#define JZ4760_CLK_OTG_PHY 38 +#define JZ4760_CLK_EXT512 39 +#define JZ4760_CLK_RTC 40 +#define JZ4760_CLK_LPCLK_DIV 41 +#define JZ4760_CLK_TVE 42 +#define JZ4760_CLK_LPCLK 43 + +#endif /* __DT_BINDINGS_CLOCK_JZ4760_CGU_H__ */ diff --git a/include/dt-bindings/clock/ingenic,jz4770-cgu.h b/include/dt-bindings/clock/ingenic,jz4770-cgu.h new file mode 100644 index 000000000000..d68a7695a1f8 --- /dev/null +++ b/include/dt-bindings/clock/ingenic,jz4770-cgu.h @@ -0,0 +1,58 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * This header provides clock numbers for the ingenic,jz4770-cgu DT binding. + */ + +#ifndef __DT_BINDINGS_CLOCK_JZ4770_CGU_H__ +#define __DT_BINDINGS_CLOCK_JZ4770_CGU_H__ + +#define JZ4770_CLK_EXT 0 +#define JZ4770_CLK_OSC32K 1 +#define JZ4770_CLK_PLL0 2 +#define JZ4770_CLK_PLL1 3 +#define JZ4770_CLK_CCLK 4 +#define JZ4770_CLK_H0CLK 5 +#define JZ4770_CLK_H1CLK 6 +#define JZ4770_CLK_H2CLK 7 +#define JZ4770_CLK_C1CLK 8 +#define JZ4770_CLK_PCLK 9 +#define JZ4770_CLK_MMC0_MUX 10 +#define JZ4770_CLK_MMC0 11 +#define JZ4770_CLK_MMC1_MUX 12 +#define JZ4770_CLK_MMC1 13 +#define JZ4770_CLK_MMC2_MUX 14 +#define JZ4770_CLK_MMC2 15 +#define JZ4770_CLK_CIM 16 +#define JZ4770_CLK_UHC 17 +#define JZ4770_CLK_GPU 18 +#define JZ4770_CLK_BCH 19 +#define JZ4770_CLK_LPCLK_MUX 20 +#define JZ4770_CLK_GPS 21 +#define JZ4770_CLK_SSI_MUX 22 +#define JZ4770_CLK_PCM_MUX 23 +#define JZ4770_CLK_I2S 24 +#define JZ4770_CLK_OTG 25 +#define JZ4770_CLK_SSI0 26 +#define JZ4770_CLK_SSI1 27 +#define JZ4770_CLK_SSI2 28 +#define JZ4770_CLK_PCM0 29 +#define JZ4770_CLK_PCM1 30 +#define JZ4770_CLK_DMA 31 +#define JZ4770_CLK_I2C0 32 +#define JZ4770_CLK_I2C1 33 +#define JZ4770_CLK_I2C2 34 +#define JZ4770_CLK_UART0 35 +#define JZ4770_CLK_UART1 36 +#define JZ4770_CLK_UART2 37 +#define JZ4770_CLK_UART3 38 +#define JZ4770_CLK_IPU 39 +#define JZ4770_CLK_ADC 40 +#define JZ4770_CLK_AIC 41 +#define JZ4770_CLK_AUX 42 +#define JZ4770_CLK_VPU 43 +#define JZ4770_CLK_UHC_PHY 44 +#define JZ4770_CLK_OTG_PHY 45 +#define JZ4770_CLK_EXT512 46 +#define JZ4770_CLK_RTC 47 + +#endif /* __DT_BINDINGS_CLOCK_JZ4770_CGU_H__ */ diff --git a/include/dt-bindings/clock/ingenic,jz4780-cgu.h b/include/dt-bindings/clock/ingenic,jz4780-cgu.h new file mode 100644 index 000000000000..85cf8eb5081b --- /dev/null +++ b/include/dt-bindings/clock/ingenic,jz4780-cgu.h @@ -0,0 +1,91 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * This header provides clock numbers for the ingenic,jz4780-cgu DT binding. + * + * They are roughly ordered as: + * - external clocks + * - PLLs + * - muxes/dividers in the order they appear in the jz4780 programmers manual + * - gates in order of their bit in the CLKGR* registers + */ + +#ifndef __DT_BINDINGS_CLOCK_JZ4780_CGU_H__ +#define __DT_BINDINGS_CLOCK_JZ4780_CGU_H__ + +#define JZ4780_CLK_EXCLK 0 +#define JZ4780_CLK_RTCLK 1 +#define JZ4780_CLK_APLL 2 +#define JZ4780_CLK_MPLL 3 +#define JZ4780_CLK_EPLL 4 +#define JZ4780_CLK_VPLL 5 +#define JZ4780_CLK_OTGPHY 6 +#define JZ4780_CLK_SCLKA 7 +#define JZ4780_CLK_CPUMUX 8 +#define JZ4780_CLK_CPU 9 +#define JZ4780_CLK_L2CACHE 10 +#define JZ4780_CLK_AHB0 11 +#define JZ4780_CLK_AHB2PMUX 12 +#define JZ4780_CLK_AHB2 13 +#define JZ4780_CLK_PCLK 14 +#define JZ4780_CLK_DDR 15 +#define JZ4780_CLK_VPU 16 +#define JZ4780_CLK_I2SPLL 17 +#define JZ4780_CLK_I2S 18 +#define JZ4780_CLK_LCD0PIXCLK 19 +#define JZ4780_CLK_LCD1PIXCLK 20 +#define JZ4780_CLK_MSCMUX 21 +#define JZ4780_CLK_MSC0 22 +#define JZ4780_CLK_MSC1 23 +#define JZ4780_CLK_MSC2 24 +#define JZ4780_CLK_UHC 25 +#define JZ4780_CLK_SSIPLL 26 +#define JZ4780_CLK_SSI 27 +#define JZ4780_CLK_CIMMCLK 28 +#define JZ4780_CLK_PCMPLL 29 +#define JZ4780_CLK_PCM 30 +#define JZ4780_CLK_GPU 31 +#define JZ4780_CLK_HDMI 32 +#define JZ4780_CLK_BCH 33 +#define JZ4780_CLK_NEMC 34 +#define JZ4780_CLK_OTG0 35 +#define JZ4780_CLK_SSI0 36 +#define JZ4780_CLK_SMB0 37 +#define JZ4780_CLK_SMB1 38 +#define JZ4780_CLK_SCC 39 +#define JZ4780_CLK_AIC 40 +#define JZ4780_CLK_TSSI0 41 +#define JZ4780_CLK_OWI 42 +#define JZ4780_CLK_KBC 43 +#define JZ4780_CLK_SADC 44 +#define JZ4780_CLK_UART0 45 +#define JZ4780_CLK_UART1 46 +#define JZ4780_CLK_UART2 47 +#define JZ4780_CLK_UART3 48 +#define JZ4780_CLK_SSI1 49 +#define JZ4780_CLK_SSI2 50 +#define JZ4780_CLK_PDMA 51 +#define JZ4780_CLK_GPS 52 +#define JZ4780_CLK_MAC 53 +#define JZ4780_CLK_SMB2 54 +#define JZ4780_CLK_CIM 55 +#define JZ4780_CLK_LCD 56 +#define JZ4780_CLK_TVE 57 +#define JZ4780_CLK_IPU 58 +#define JZ4780_CLK_DDR0 59 +#define JZ4780_CLK_DDR1 60 +#define JZ4780_CLK_SMB3 61 +#define JZ4780_CLK_TSSI1 62 +#define JZ4780_CLK_COMPRESS 63 +#define JZ4780_CLK_AIC1 64 +#define JZ4780_CLK_GPVLC 65 +#define JZ4780_CLK_OTG1 66 +#define JZ4780_CLK_UART4 67 +#define JZ4780_CLK_AHBMON 68 +#define JZ4780_CLK_SMB4 69 +#define JZ4780_CLK_DES 70 +#define JZ4780_CLK_X2D 71 +#define JZ4780_CLK_CORE1 72 +#define JZ4780_CLK_EXCLK_DIV512 73 +#define JZ4780_CLK_RTC 74 + +#endif /* __DT_BINDINGS_CLOCK_JZ4780_CGU_H__ */ diff --git a/include/dt-bindings/clock/ingenic,x1000-cgu.h b/include/dt-bindings/clock/ingenic,x1000-cgu.h new file mode 100644 index 000000000000..f187e0719fd3 --- /dev/null +++ b/include/dt-bindings/clock/ingenic,x1000-cgu.h @@ -0,0 +1,54 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * This header provides clock numbers for the ingenic,x1000-cgu DT binding. + * + * They are roughly ordered as: + * - external clocks + * - PLLs + * - muxes/dividers in the order they appear in the x1000 programmers manual + * - gates in order of their bit in the CLKGR* registers + */ + +#ifndef __DT_BINDINGS_CLOCK_X1000_CGU_H__ +#define __DT_BINDINGS_CLOCK_X1000_CGU_H__ + +#define X1000_CLK_EXCLK 0 +#define X1000_CLK_RTCLK 1 +#define X1000_CLK_APLL 2 +#define X1000_CLK_MPLL 3 +#define X1000_CLK_OTGPHY 4 +#define X1000_CLK_SCLKA 5 +#define X1000_CLK_CPUMUX 6 +#define X1000_CLK_CPU 7 +#define X1000_CLK_L2CACHE 8 +#define X1000_CLK_AHB0 9 +#define X1000_CLK_AHB2PMUX 10 +#define X1000_CLK_AHB2 11 +#define X1000_CLK_PCLK 12 +#define X1000_CLK_DDR 13 +#define X1000_CLK_MAC 14 +#define X1000_CLK_LCD 15 +#define X1000_CLK_MSCMUX 16 +#define X1000_CLK_MSC0 17 +#define X1000_CLK_MSC1 18 +#define X1000_CLK_OTG 19 +#define X1000_CLK_SSIPLL 20 +#define X1000_CLK_SSIPLL_DIV2 21 +#define X1000_CLK_SSIMUX 22 +#define X1000_CLK_EMC 23 +#define X1000_CLK_EFUSE 24 +#define X1000_CLK_SFC 25 +#define X1000_CLK_I2C0 26 +#define X1000_CLK_I2C1 27 +#define X1000_CLK_I2C2 28 +#define X1000_CLK_UART0 29 +#define X1000_CLK_UART1 30 +#define X1000_CLK_UART2 31 +#define X1000_CLK_TCU 32 +#define X1000_CLK_SSI 33 +#define X1000_CLK_OST 34 +#define X1000_CLK_PDMA 35 +#define X1000_CLK_EXCLK_DIV512 36 +#define X1000_CLK_RTC 37 + +#endif /* __DT_BINDINGS_CLOCK_X1000_CGU_H__ */ diff --git a/include/dt-bindings/clock/ingenic,x1830-cgu.h b/include/dt-bindings/clock/ingenic,x1830-cgu.h new file mode 100644 index 000000000000..88455376a950 --- /dev/null +++ b/include/dt-bindings/clock/ingenic,x1830-cgu.h @@ -0,0 +1,57 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * This header provides clock numbers for the ingenic,x1830-cgu DT binding. + * + * They are roughly ordered as: + * - external clocks + * - PLLs + * - muxes/dividers in the order they appear in the x1830 programmers manual + * - gates in order of their bit in the CLKGR* registers + */ + +#ifndef __DT_BINDINGS_CLOCK_X1830_CGU_H__ +#define __DT_BINDINGS_CLOCK_X1830_CGU_H__ + +#define X1830_CLK_EXCLK 0 +#define X1830_CLK_RTCLK 1 +#define X1830_CLK_APLL 2 +#define X1830_CLK_MPLL 3 +#define X1830_CLK_EPLL 4 +#define X1830_CLK_VPLL 5 +#define X1830_CLK_OTGPHY 6 +#define X1830_CLK_SCLKA 7 +#define X1830_CLK_CPUMUX 8 +#define X1830_CLK_CPU 9 +#define X1830_CLK_L2CACHE 10 +#define X1830_CLK_AHB0 11 +#define X1830_CLK_AHB2PMUX 12 +#define X1830_CLK_AHB2 13 +#define X1830_CLK_PCLK 14 +#define X1830_CLK_DDR 15 +#define X1830_CLK_MAC 16 +#define X1830_CLK_LCD 17 +#define X1830_CLK_MSCMUX 18 +#define X1830_CLK_MSC0 19 +#define X1830_CLK_MSC1 20 +#define X1830_CLK_SSIPLL 21 +#define X1830_CLK_SSIPLL_DIV2 22 +#define X1830_CLK_SSIMUX 23 +#define X1830_CLK_EMC 24 +#define X1830_CLK_EFUSE 25 +#define X1830_CLK_OTG 26 +#define X1830_CLK_SSI0 27 +#define X1830_CLK_SMB0 28 +#define X1830_CLK_SMB1 29 +#define X1830_CLK_SMB2 30 +#define X1830_CLK_UART0 31 +#define X1830_CLK_UART1 32 +#define X1830_CLK_SSI1 33 +#define X1830_CLK_SFC 34 +#define X1830_CLK_PDMA 35 +#define X1830_CLK_TCU 36 +#define X1830_CLK_DTRNG 37 +#define X1830_CLK_OST 38 +#define X1830_CLK_EXCLK_DIV512 39 +#define X1830_CLK_RTC 40 + +#endif /* __DT_BINDINGS_CLOCK_X1830_CGU_H__ */ diff --git a/include/dt-bindings/clock/jz4725b-cgu.h b/include/dt-bindings/clock/jz4725b-cgu.h deleted file mode 100644 index 31f1ab0fe42c..000000000000 --- a/include/dt-bindings/clock/jz4725b-cgu.h +++ /dev/null @@ -1,36 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * This header provides clock numbers for the ingenic,jz4725b-cgu DT binding. - */ - -#ifndef __DT_BINDINGS_CLOCK_JZ4725B_CGU_H__ -#define __DT_BINDINGS_CLOCK_JZ4725B_CGU_H__ - -#define JZ4725B_CLK_EXT 0 -#define JZ4725B_CLK_OSC32K 1 -#define JZ4725B_CLK_PLL 2 -#define JZ4725B_CLK_PLL_HALF 3 -#define JZ4725B_CLK_CCLK 4 -#define JZ4725B_CLK_HCLK 5 -#define JZ4725B_CLK_PCLK 6 -#define JZ4725B_CLK_MCLK 7 -#define JZ4725B_CLK_IPU 8 -#define JZ4725B_CLK_LCD 9 -#define JZ4725B_CLK_I2S 10 -#define JZ4725B_CLK_SPI 11 -#define JZ4725B_CLK_MMC_MUX 12 -#define JZ4725B_CLK_UDC 13 -#define JZ4725B_CLK_UART 14 -#define JZ4725B_CLK_DMA 15 -#define JZ4725B_CLK_ADC 16 -#define JZ4725B_CLK_I2C 17 -#define JZ4725B_CLK_AIC 18 -#define JZ4725B_CLK_MMC0 19 -#define JZ4725B_CLK_MMC1 20 -#define JZ4725B_CLK_BCH 21 -#define JZ4725B_CLK_TCU 22 -#define JZ4725B_CLK_EXT512 23 -#define JZ4725B_CLK_RTC 24 -#define JZ4725B_CLK_UDC_PHY 25 - -#endif /* __DT_BINDINGS_CLOCK_JZ4725B_CGU_H__ */ diff --git a/include/dt-bindings/clock/jz4740-cgu.h b/include/dt-bindings/clock/jz4740-cgu.h deleted file mode 100644 index e82d77028581..000000000000 --- a/include/dt-bindings/clock/jz4740-cgu.h +++ /dev/null @@ -1,39 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * This header provides clock numbers for the ingenic,jz4740-cgu DT binding. - * - * They are roughly ordered as: - * - external clocks - * - PLLs - * - muxes/dividers in the order they appear in the jz4740 programmers manual - * - gates in order of their bit in the CLKGR* registers - */ - -#ifndef __DT_BINDINGS_CLOCK_JZ4740_CGU_H__ -#define __DT_BINDINGS_CLOCK_JZ4740_CGU_H__ - -#define JZ4740_CLK_EXT 0 -#define JZ4740_CLK_RTC 1 -#define JZ4740_CLK_PLL 2 -#define JZ4740_CLK_PLL_HALF 3 -#define JZ4740_CLK_CCLK 4 -#define JZ4740_CLK_HCLK 5 -#define JZ4740_CLK_PCLK 6 -#define JZ4740_CLK_MCLK 7 -#define JZ4740_CLK_LCD 8 -#define JZ4740_CLK_LCD_PCLK 9 -#define JZ4740_CLK_I2S 10 -#define JZ4740_CLK_SPI 11 -#define JZ4740_CLK_MMC 12 -#define JZ4740_CLK_UHC 13 -#define JZ4740_CLK_UDC 14 -#define JZ4740_CLK_UART0 15 -#define JZ4740_CLK_UART1 16 -#define JZ4740_CLK_DMA 17 -#define JZ4740_CLK_IPU 18 -#define JZ4740_CLK_ADC 19 -#define JZ4740_CLK_I2C 20 -#define JZ4740_CLK_AIC 21 -#define JZ4740_CLK_TCU 22 - -#endif /* __DT_BINDINGS_CLOCK_JZ4740_CGU_H__ */ diff --git a/include/dt-bindings/clock/jz4760-cgu.h b/include/dt-bindings/clock/jz4760-cgu.h deleted file mode 100644 index 4bb2e19c4743..000000000000 --- a/include/dt-bindings/clock/jz4760-cgu.h +++ /dev/null @@ -1,54 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * This header provides clock numbers for the ingenic,jz4760-cgu DT binding. - */ - -#ifndef __DT_BINDINGS_CLOCK_JZ4760_CGU_H__ -#define __DT_BINDINGS_CLOCK_JZ4760_CGU_H__ - -#define JZ4760_CLK_EXT 0 -#define JZ4760_CLK_OSC32K 1 -#define JZ4760_CLK_PLL0 2 -#define JZ4760_CLK_PLL0_HALF 3 -#define JZ4760_CLK_PLL1 4 -#define JZ4760_CLK_CCLK 5 -#define JZ4760_CLK_HCLK 6 -#define JZ4760_CLK_SCLK 7 -#define JZ4760_CLK_H2CLK 8 -#define JZ4760_CLK_MCLK 9 -#define JZ4760_CLK_PCLK 10 -#define JZ4760_CLK_MMC_MUX 11 -#define JZ4760_CLK_MMC0 12 -#define JZ4760_CLK_MMC1 13 -#define JZ4760_CLK_MMC2 14 -#define JZ4760_CLK_CIM 15 -#define JZ4760_CLK_UHC 16 -#define JZ4760_CLK_GPU 17 -#define JZ4760_CLK_GPS 18 -#define JZ4760_CLK_SSI_MUX 19 -#define JZ4760_CLK_PCM 20 -#define JZ4760_CLK_I2S 21 -#define JZ4760_CLK_OTG 22 -#define JZ4760_CLK_SSI0 23 -#define JZ4760_CLK_SSI1 24 -#define JZ4760_CLK_SSI2 25 -#define JZ4760_CLK_DMA 26 -#define JZ4760_CLK_I2C0 27 -#define JZ4760_CLK_I2C1 28 -#define JZ4760_CLK_UART0 29 -#define JZ4760_CLK_UART1 30 -#define JZ4760_CLK_UART2 31 -#define JZ4760_CLK_UART3 32 -#define JZ4760_CLK_IPU 33 -#define JZ4760_CLK_ADC 34 -#define JZ4760_CLK_AIC 35 -#define JZ4760_CLK_VPU 36 -#define JZ4760_CLK_UHC_PHY 37 -#define JZ4760_CLK_OTG_PHY 38 -#define JZ4760_CLK_EXT512 39 -#define JZ4760_CLK_RTC 40 -#define JZ4760_CLK_LPCLK_DIV 41 -#define JZ4760_CLK_TVE 42 -#define JZ4760_CLK_LPCLK 43 - -#endif /* __DT_BINDINGS_CLOCK_JZ4760_CGU_H__ */ diff --git a/include/dt-bindings/clock/jz4770-cgu.h b/include/dt-bindings/clock/jz4770-cgu.h deleted file mode 100644 index d68a7695a1f8..000000000000 --- a/include/dt-bindings/clock/jz4770-cgu.h +++ /dev/null @@ -1,58 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * This header provides clock numbers for the ingenic,jz4770-cgu DT binding. - */ - -#ifndef __DT_BINDINGS_CLOCK_JZ4770_CGU_H__ -#define __DT_BINDINGS_CLOCK_JZ4770_CGU_H__ - -#define JZ4770_CLK_EXT 0 -#define JZ4770_CLK_OSC32K 1 -#define JZ4770_CLK_PLL0 2 -#define JZ4770_CLK_PLL1 3 -#define JZ4770_CLK_CCLK 4 -#define JZ4770_CLK_H0CLK 5 -#define JZ4770_CLK_H1CLK 6 -#define JZ4770_CLK_H2CLK 7 -#define JZ4770_CLK_C1CLK 8 -#define JZ4770_CLK_PCLK 9 -#define JZ4770_CLK_MMC0_MUX 10 -#define JZ4770_CLK_MMC0 11 -#define JZ4770_CLK_MMC1_MUX 12 -#define JZ4770_CLK_MMC1 13 -#define JZ4770_CLK_MMC2_MUX 14 -#define JZ4770_CLK_MMC2 15 -#define JZ4770_CLK_CIM 16 -#define JZ4770_CLK_UHC 17 -#define JZ4770_CLK_GPU 18 -#define JZ4770_CLK_BCH 19 -#define JZ4770_CLK_LPCLK_MUX 20 -#define JZ4770_CLK_GPS 21 -#define JZ4770_CLK_SSI_MUX 22 -#define JZ4770_CLK_PCM_MUX 23 -#define JZ4770_CLK_I2S 24 -#define JZ4770_CLK_OTG 25 -#define JZ4770_CLK_SSI0 26 -#define JZ4770_CLK_SSI1 27 -#define JZ4770_CLK_SSI2 28 -#define JZ4770_CLK_PCM0 29 -#define JZ4770_CLK_PCM1 30 -#define JZ4770_CLK_DMA 31 -#define JZ4770_CLK_I2C0 32 -#define JZ4770_CLK_I2C1 33 -#define JZ4770_CLK_I2C2 34 -#define JZ4770_CLK_UART0 35 -#define JZ4770_CLK_UART1 36 -#define JZ4770_CLK_UART2 37 -#define JZ4770_CLK_UART3 38 -#define JZ4770_CLK_IPU 39 -#define JZ4770_CLK_ADC 40 -#define JZ4770_CLK_AIC 41 -#define JZ4770_CLK_AUX 42 -#define JZ4770_CLK_VPU 43 -#define JZ4770_CLK_UHC_PHY 44 -#define JZ4770_CLK_OTG_PHY 45 -#define JZ4770_CLK_EXT512 46 -#define JZ4770_CLK_RTC 47 - -#endif /* __DT_BINDINGS_CLOCK_JZ4770_CGU_H__ */ diff --git a/include/dt-bindings/clock/jz4780-cgu.h b/include/dt-bindings/clock/jz4780-cgu.h deleted file mode 100644 index 85cf8eb5081b..000000000000 --- a/include/dt-bindings/clock/jz4780-cgu.h +++ /dev/null @@ -1,91 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * This header provides clock numbers for the ingenic,jz4780-cgu DT binding. - * - * They are roughly ordered as: - * - external clocks - * - PLLs - * - muxes/dividers in the order they appear in the jz4780 programmers manual - * - gates in order of their bit in the CLKGR* registers - */ - -#ifndef __DT_BINDINGS_CLOCK_JZ4780_CGU_H__ -#define __DT_BINDINGS_CLOCK_JZ4780_CGU_H__ - -#define JZ4780_CLK_EXCLK 0 -#define JZ4780_CLK_RTCLK 1 -#define JZ4780_CLK_APLL 2 -#define JZ4780_CLK_MPLL 3 -#define JZ4780_CLK_EPLL 4 -#define JZ4780_CLK_VPLL 5 -#define JZ4780_CLK_OTGPHY 6 -#define JZ4780_CLK_SCLKA 7 -#define JZ4780_CLK_CPUMUX 8 -#define JZ4780_CLK_CPU 9 -#define JZ4780_CLK_L2CACHE 10 -#define JZ4780_CLK_AHB0 11 -#define JZ4780_CLK_AHB2PMUX 12 -#define JZ4780_CLK_AHB2 13 -#define JZ4780_CLK_PCLK 14 -#define JZ4780_CLK_DDR 15 -#define JZ4780_CLK_VPU 16 -#define JZ4780_CLK_I2SPLL 17 -#define JZ4780_CLK_I2S 18 -#define JZ4780_CLK_LCD0PIXCLK 19 -#define JZ4780_CLK_LCD1PIXCLK 20 -#define JZ4780_CLK_MSCMUX 21 -#define JZ4780_CLK_MSC0 22 -#define JZ4780_CLK_MSC1 23 -#define JZ4780_CLK_MSC2 24 -#define JZ4780_CLK_UHC 25 -#define JZ4780_CLK_SSIPLL 26 -#define JZ4780_CLK_SSI 27 -#define JZ4780_CLK_CIMMCLK 28 -#define JZ4780_CLK_PCMPLL 29 -#define JZ4780_CLK_PCM 30 -#define JZ4780_CLK_GPU 31 -#define JZ4780_CLK_HDMI 32 -#define JZ4780_CLK_BCH 33 -#define JZ4780_CLK_NEMC 34 -#define JZ4780_CLK_OTG0 35 -#define JZ4780_CLK_SSI0 36 -#define JZ4780_CLK_SMB0 37 -#define JZ4780_CLK_SMB1 38 -#define JZ4780_CLK_SCC 39 -#define JZ4780_CLK_AIC 40 -#define JZ4780_CLK_TSSI0 41 -#define JZ4780_CLK_OWI 42 -#define JZ4780_CLK_KBC 43 -#define JZ4780_CLK_SADC 44 -#define JZ4780_CLK_UART0 45 -#define JZ4780_CLK_UART1 46 -#define JZ4780_CLK_UART2 47 -#define JZ4780_CLK_UART3 48 -#define JZ4780_CLK_SSI1 49 -#define JZ4780_CLK_SSI2 50 -#define JZ4780_CLK_PDMA 51 -#define JZ4780_CLK_GPS 52 -#define JZ4780_CLK_MAC 53 -#define JZ4780_CLK_SMB2 54 -#define JZ4780_CLK_CIM 55 -#define JZ4780_CLK_LCD 56 -#define JZ4780_CLK_TVE 57 -#define JZ4780_CLK_IPU 58 -#define JZ4780_CLK_DDR0 59 -#define JZ4780_CLK_DDR1 60 -#define JZ4780_CLK_SMB3 61 -#define JZ4780_CLK_TSSI1 62 -#define JZ4780_CLK_COMPRESS 63 -#define JZ4780_CLK_AIC1 64 -#define JZ4780_CLK_GPVLC 65 -#define JZ4780_CLK_OTG1 66 -#define JZ4780_CLK_UART4 67 -#define JZ4780_CLK_AHBMON 68 -#define JZ4780_CLK_SMB4 69 -#define JZ4780_CLK_DES 70 -#define JZ4780_CLK_X2D 71 -#define JZ4780_CLK_CORE1 72 -#define JZ4780_CLK_EXCLK_DIV512 73 -#define JZ4780_CLK_RTC 74 - -#endif /* __DT_BINDINGS_CLOCK_JZ4780_CGU_H__ */ diff --git a/include/dt-bindings/clock/x1000-cgu.h b/include/dt-bindings/clock/x1000-cgu.h deleted file mode 100644 index f187e0719fd3..000000000000 --- a/include/dt-bindings/clock/x1000-cgu.h +++ /dev/null @@ -1,54 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * This header provides clock numbers for the ingenic,x1000-cgu DT binding. - * - * They are roughly ordered as: - * - external clocks - * - PLLs - * - muxes/dividers in the order they appear in the x1000 programmers manual - * - gates in order of their bit in the CLKGR* registers - */ - -#ifndef __DT_BINDINGS_CLOCK_X1000_CGU_H__ -#define __DT_BINDINGS_CLOCK_X1000_CGU_H__ - -#define X1000_CLK_EXCLK 0 -#define X1000_CLK_RTCLK 1 -#define X1000_CLK_APLL 2 -#define X1000_CLK_MPLL 3 -#define X1000_CLK_OTGPHY 4 -#define X1000_CLK_SCLKA 5 -#define X1000_CLK_CPUMUX 6 -#define X1000_CLK_CPU 7 -#define X1000_CLK_L2CACHE 8 -#define X1000_CLK_AHB0 9 -#define X1000_CLK_AHB2PMUX 10 -#define X1000_CLK_AHB2 11 -#define X1000_CLK_PCLK 12 -#define X1000_CLK_DDR 13 -#define X1000_CLK_MAC 14 -#define X1000_CLK_LCD 15 -#define X1000_CLK_MSCMUX 16 -#define X1000_CLK_MSC0 17 -#define X1000_CLK_MSC1 18 -#define X1000_CLK_OTG 19 -#define X1000_CLK_SSIPLL 20 -#define X1000_CLK_SSIPLL_DIV2 21 -#define X1000_CLK_SSIMUX 22 -#define X1000_CLK_EMC 23 -#define X1000_CLK_EFUSE 24 -#define X1000_CLK_SFC 25 -#define X1000_CLK_I2C0 26 -#define X1000_CLK_I2C1 27 -#define X1000_CLK_I2C2 28 -#define X1000_CLK_UART0 29 -#define X1000_CLK_UART1 30 -#define X1000_CLK_UART2 31 -#define X1000_CLK_TCU 32 -#define X1000_CLK_SSI 33 -#define X1000_CLK_OST 34 -#define X1000_CLK_PDMA 35 -#define X1000_CLK_EXCLK_DIV512 36 -#define X1000_CLK_RTC 37 - -#endif /* __DT_BINDINGS_CLOCK_X1000_CGU_H__ */ diff --git a/include/dt-bindings/clock/x1830-cgu.h b/include/dt-bindings/clock/x1830-cgu.h deleted file mode 100644 index 88455376a950..000000000000 --- a/include/dt-bindings/clock/x1830-cgu.h +++ /dev/null @@ -1,57 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * This header provides clock numbers for the ingenic,x1830-cgu DT binding. - * - * They are roughly ordered as: - * - external clocks - * - PLLs - * - muxes/dividers in the order they appear in the x1830 programmers manual - * - gates in order of their bit in the CLKGR* registers - */ - -#ifndef __DT_BINDINGS_CLOCK_X1830_CGU_H__ -#define __DT_BINDINGS_CLOCK_X1830_CGU_H__ - -#define X1830_CLK_EXCLK 0 -#define X1830_CLK_RTCLK 1 -#define X1830_CLK_APLL 2 -#define X1830_CLK_MPLL 3 -#define X1830_CLK_EPLL 4 -#define X1830_CLK_VPLL 5 -#define X1830_CLK_OTGPHY 6 -#define X1830_CLK_SCLKA 7 -#define X1830_CLK_CPUMUX 8 -#define X1830_CLK_CPU 9 -#define X1830_CLK_L2CACHE 10 -#define X1830_CLK_AHB0 11 -#define X1830_CLK_AHB2PMUX 12 -#define X1830_CLK_AHB2 13 -#define X1830_CLK_PCLK 14 -#define X1830_CLK_DDR 15 -#define X1830_CLK_MAC 16 -#define X1830_CLK_LCD 17 -#define X1830_CLK_MSCMUX 18 -#define X1830_CLK_MSC0 19 -#define X1830_CLK_MSC1 20 -#define X1830_CLK_SSIPLL 21 -#define X1830_CLK_SSIPLL_DIV2 22 -#define X1830_CLK_SSIMUX 23 -#define X1830_CLK_EMC 24 -#define X1830_CLK_EFUSE 25 -#define X1830_CLK_OTG 26 -#define X1830_CLK_SSI0 27 -#define X1830_CLK_SMB0 28 -#define X1830_CLK_SMB1 29 -#define X1830_CLK_SMB2 30 -#define X1830_CLK_UART0 31 -#define X1830_CLK_UART1 32 -#define X1830_CLK_SSI1 33 -#define X1830_CLK_SFC 34 -#define X1830_CLK_PDMA 35 -#define X1830_CLK_TCU 36 -#define X1830_CLK_DTRNG 37 -#define X1830_CLK_OST 38 -#define X1830_CLK_EXCLK_DIV512 39 -#define X1830_CLK_RTC 40 - -#endif /* __DT_BINDINGS_CLOCK_X1830_CGU_H__ */ -- cgit v1.2.3