From c87f820bc4748fdd4d50969e8930cd88d1b61582 Mon Sep 17 00:00:00 2001 From: Kartik Rajput Date: Wed, 8 Oct 2025 16:46:18 +0530 Subject: soc/tegra: fuse: Do not register SoC device on ACPI boot On Tegra platforms using ACPI, the SMCCC driver already registers the SoC device. This makes the registration performed by the Tegra fuse driver redundant. When booted via ACPI, skip registering the SoC device and suppress printing SKU information from the Tegra fuse driver, as this information is already provided by the SMCCC driver. Fixes: 972167c69080 ("soc/tegra: fuse: Add ACPI support for Tegra194 and Tegra234") Cc: stable@vger.kernel.org Signed-off-by: Kartik Rajput Signed-off-by: Thierry Reding --- drivers/soc/tegra/fuse/fuse-tegra.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/soc/tegra/fuse/fuse-tegra.c b/drivers/soc/tegra/fuse/fuse-tegra.c index d27667283846..74d2fedea71c 100644 --- a/drivers/soc/tegra/fuse/fuse-tegra.c +++ b/drivers/soc/tegra/fuse/fuse-tegra.c @@ -182,8 +182,6 @@ static int tegra_fuse_probe(struct platform_device *pdev) } fuse->soc->init(fuse); - tegra_fuse_print_sku_info(&tegra_sku_info); - tegra_soc_device_register(); err = tegra_fuse_add_lookups(fuse); if (err) -- cgit v1.2.3 From e13c1f34aa8675363f45593e85c125e15b9a4410 Mon Sep 17 00:00:00 2001 From: Bruno Sobreira França Date: Fri, 24 Oct 2025 01:35:14 +0000 Subject: soc/tegra: Resolve a spelling error in the tegra194-cbb.c MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Fix a typo spotted during code reading. Signed-off-by: Bruno Sobreira França Reviewed-by: Jon Hunter Acked-by: Uwe Kleine-König Reviewed-by: Herve Codina Signed-off-by: Thierry Reding --- drivers/soc/tegra/cbb/tegra194-cbb.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/soc/tegra/cbb/tegra194-cbb.c b/drivers/soc/tegra/cbb/tegra194-cbb.c index c1bdea8c853f..ab75d50cc85c 100644 --- a/drivers/soc/tegra/cbb/tegra194-cbb.c +++ b/drivers/soc/tegra/cbb/tegra194-cbb.c @@ -1836,7 +1836,7 @@ print_errlog1_2(struct seq_file *file, struct tegra194_cbb *cbb, } /* - * Print transcation type, error code and description from ErrLog0 for all + * Print transaction type, error code and description from ErrLog0 for all * errors. For NOC target errors, all relevant error info is printed using * ErrLog0 only. But additional information is printed for errors from * APB targets because for them: -- cgit v1.2.3 From ce27c9c2129679551c4e5fe71c1c5d42fff399c2 Mon Sep 17 00:00:00 2001 From: Aaron Kling Date: Tue, 23 Sep 2025 11:58:05 -0500 Subject: soc/tegra: fuse: speedo-tegra210: Update speedo IDs Existing code only sets CPU and GPU speedo IDs 0 and 1. The CPU DVFS code supports 11 IDs and nouveau supports 5. This aligns with what the downstream vendor kernel supports. Align SKUs with the downstream list. The Tegra210 CVB tables were added in the first referenced fixes commit. Since then, all Tegra210 SoCs have tried to scale to 1.9 GHz, when the supported devkits are only supposed to scale to 1.5 or 1.7 GHZ. Overclocking should not be the default state. Fixes: 2b2dbc2f94e5 ("clk: tegra: dfll: add CVB tables for Tegra210") Fixes: 579db6e5d9b8 ("arm64: tegra: Enable DFLL support on Jetson Nano") Signed-off-by: Aaron Kling Signed-off-by: Thierry Reding --- drivers/soc/tegra/fuse/speedo-tegra210.c | 62 ++++++++++++++++++++++---------- 1 file changed, 43 insertions(+), 19 deletions(-) diff --git a/drivers/soc/tegra/fuse/speedo-tegra210.c b/drivers/soc/tegra/fuse/speedo-tegra210.c index 695d0b7f9a8a..a8cc36329772 100644 --- a/drivers/soc/tegra/fuse/speedo-tegra210.c +++ b/drivers/soc/tegra/fuse/speedo-tegra210.c @@ -65,27 +65,51 @@ static void __init rev_sku_to_speedo_ids(struct tegra_sku_info *sku_info, sku_info->gpu_speedo_id = 0; *threshold = THRESHOLD_INDEX_0; - switch (sku) { - case 0x00: /* Engineering SKU */ - case 0x01: /* Engineering SKU */ - case 0x07: - case 0x17: - case 0x27: - if (speedo_rev >= 2) + if (sku_info->revision >= TEGRA_REVISION_A02) { + switch (sku) { + case 0x00: /* Engineering SKU */ + case 0x01: /* Engineering SKU */ + case 0x13: + sku_info->cpu_speedo_id = 5; + sku_info->gpu_speedo_id = 2; + break; + + case 0x07: + case 0x17: + case 0x1F: + sku_info->cpu_speedo_id = 7; + sku_info->gpu_speedo_id = 2; + break; + + case 0x27: + sku_info->cpu_speedo_id = 1; + sku_info->gpu_speedo_id = 2; + break; + + case 0x83: + sku_info->cpu_speedo_id = 3; + sku_info->gpu_speedo_id = 3; + break; + + case 0x87: + sku_info->cpu_speedo_id = 2; sku_info->gpu_speedo_id = 1; - break; - - case 0x13: - if (speedo_rev >= 2) - sku_info->gpu_speedo_id = 1; - - sku_info->cpu_speedo_id = 1; - break; - - default: + break; + + case 0x8F: + sku_info->cpu_speedo_id = 9; + sku_info->gpu_speedo_id = 2; + break; + + default: + pr_err("Tegra210: unknown revision 2 or newer SKU %#04x\n", sku); + /* Using the default for the error case */ + break; + } + } else if (sku == 0x00 || sku == 0x01 || sku == 0x07 || sku == 0x13 || sku == 0x17) { + sku_info->gpu_speedo_id = 1; + } else { pr_err("Tegra210: unknown SKU %#04x\n", sku); - /* Using the default for the error case */ - break; } } -- cgit v1.2.3 From 688dfe40b4d7b33047cfa009f4f88a9526265126 Mon Sep 17 00:00:00 2001 From: Aaron Kling Date: Tue, 21 Oct 2025 22:11:15 -0500 Subject: soc/tegra: fuse: speedo-tegra210: Add SoC speedo 2 The Jetson Nano series of modules only have 2 EMC table entries, different from other SoC SKUs. As the EMC driver uses the SoC speedo ID to populate the EMC OPP tables, add a new speedo ID to uniquely identify this. Signed-off-by: Aaron Kling Reviewed-by: Mikko Perttunen Signed-off-by: Thierry Reding --- drivers/soc/tegra/fuse/speedo-tegra210.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/soc/tegra/fuse/speedo-tegra210.c b/drivers/soc/tegra/fuse/speedo-tegra210.c index a8cc36329772..06c2bcbee573 100644 --- a/drivers/soc/tegra/fuse/speedo-tegra210.c +++ b/drivers/soc/tegra/fuse/speedo-tegra210.c @@ -97,6 +97,7 @@ static void __init rev_sku_to_speedo_ids(struct tegra_sku_info *sku_info, break; case 0x8F: + sku_info->soc_speedo_id = 2; sku_info->cpu_speedo_id = 9; sku_info->gpu_speedo_id = 2; break; -- cgit v1.2.3 From 1c458bbe4b335d1675c47d64df0c8cd34961d2bf Mon Sep 17 00:00:00 2001 From: Prathamesh Shete Date: Fri, 14 Nov 2025 16:17:11 +0000 Subject: soc/tegra: pmc: Don't fail if "aotag" is not present The "aotog" is an optional aperture, so if that aperture is not defined for a given device, then initialise the 'aotag' pointer to NULL instead of returning an error. Note that the PMC driver will not use 'aotag' pointer if initialised to NULL. Co-developed-by: Shardar Mohammed Signed-off-by: Shardar Mohammed Signed-off-by: Prathamesh Shete Signed-off-by: Jon Hunter Signed-off-by: Thierry Reding --- drivers/soc/tegra/pmc.c | 13 ++++++++++--- 1 file changed, 10 insertions(+), 3 deletions(-) diff --git a/drivers/soc/tegra/pmc.c b/drivers/soc/tegra/pmc.c index 034a2a535a1e..d8c8894a8f38 100644 --- a/drivers/soc/tegra/pmc.c +++ b/drivers/soc/tegra/pmc.c @@ -2897,9 +2897,16 @@ static int tegra_pmc_probe(struct platform_device *pdev) if (IS_ERR(pmc->wake)) return PTR_ERR(pmc->wake); - pmc->aotag = devm_platform_ioremap_resource_byname(pdev, "aotag"); - if (IS_ERR(pmc->aotag)) - return PTR_ERR(pmc->aotag); + /* "aotag" is an optional aperture */ + res = platform_get_resource_byname(pdev, IORESOURCE_MEM, + "aotag"); + if (res) { + pmc->aotag = devm_ioremap_resource(&pdev->dev, res); + if (IS_ERR(pmc->aotag)) + return PTR_ERR(pmc->aotag); + } else { + pmc->aotag = NULL; + } /* "scratch" is an optional aperture */ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, -- cgit v1.2.3 From aaca2e9933a362bcd89ec563b3e89de18460335f Mon Sep 17 00:00:00 2001 From: Thierry Reding Date: Wed, 29 Oct 2025 16:10:33 +0100 Subject: soc/tegra: pmc: Document tegra_pmc.syscore field This eliminates a warning from the documentation build targets. Signed-off-by: Thierry Reding --- drivers/soc/tegra/pmc.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/soc/tegra/pmc.c b/drivers/soc/tegra/pmc.c index d8c8894a8f38..3f2ae5fe3135 100644 --- a/drivers/soc/tegra/pmc.c +++ b/drivers/soc/tegra/pmc.c @@ -423,6 +423,7 @@ struct tegra_pmc_soc { * @wake_sw_status_map: Bitmap to hold raw status of wakes without mask * @wake_cntrl_level_map: Bitmap to hold wake levels to be programmed in * cntrl register associated with each wake during system suspend. + * @syscore: syscore suspend/resume callbacks */ struct tegra_pmc { struct device *dev; -- cgit v1.2.3 From dd03d34d6d8e7a3f62450fb7a1408d86fb35487c Mon Sep 17 00:00:00 2001 From: Haotien Hsu Date: Mon, 11 Aug 2025 15:45:57 +0800 Subject: soc/tegra: pmc: Add USB wake events for Tegra234 Add USB wake events for Tegra234 so that system can be woken up from suspend when USB devices hot-plug/unplug event is detected. Signed-off-by: Haotien Hsu Signed-off-by: Thierry Reding --- drivers/soc/tegra/pmc.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/soc/tegra/pmc.c b/drivers/soc/tegra/pmc.c index 3f2ae5fe3135..ad19efade196 100644 --- a/drivers/soc/tegra/pmc.c +++ b/drivers/soc/tegra/pmc.c @@ -4222,6 +4222,13 @@ static const struct tegra_wake_event tegra234_wake_events[] = { TEGRA_WAKE_GPIO("power", 29, 1, TEGRA234_AON_GPIO(EE, 4)), TEGRA_WAKE_GPIO("mgbe", 56, 0, TEGRA234_MAIN_GPIO(Y, 3)), TEGRA_WAKE_IRQ("rtc", 73, 10), + TEGRA_WAKE_IRQ("usb3-port-0", 76, 167), + TEGRA_WAKE_IRQ("usb3-port-1", 77, 167), + TEGRA_WAKE_IRQ("usb3-port-2-3", 78, 167), + TEGRA_WAKE_IRQ("usb2-port-0", 79, 167), + TEGRA_WAKE_IRQ("usb2-port-1", 80, 167), + TEGRA_WAKE_IRQ("usb2-port-2", 81, 167), + TEGRA_WAKE_IRQ("usb2-port-3", 82, 167), TEGRA_WAKE_IRQ("sw-wake", SW_WAKE_ID, 179), }; -- cgit v1.2.3