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2020-08-18ASoC: Intel: Skylake: (cosmetic) align function parametersPierre-Louis Bossart1-1/+1
Fix cppcheck warnings and align headers with code. Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Link: https://lore.kernel.org/r/20200813200147.61990-22-pierre-louis.bossart@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2020-05-12ASoC: Intel: Skylake: Replace zero-length array with flexible-arrayGustavo A. R. Silva1-1/+1
The current codebase makes use of the zero-length array language extension to the C90 standard, but the preferred mechanism to declare variable-length types such as these ones is a flexible array member[1][2], introduced in C99: struct foo { int stuff; struct boo array[]; }; By making use of the mechanism above, we will get a compiler warning in case the flexible array does not occur last in the structure, which will help us prevent some kind of undefined behavior bugs from being inadvertently introduced[3] to the codebase from now on. Also, notice that, dynamic memory allocations won't be affected by this change: "Flexible array members have incomplete type, and so the sizeof operator may not be applied. As a quirk of the original implementation of zero-length arrays, sizeof evaluates to zero."[1] sizeof(flexible-array-member) triggers a warning because flexible array members have incomplete type[1]. There are some instances of code in which the sizeof operator is being incorrectly/erroneously applied to zero-length arrays and the result is zero. Such instances may be hiding some bugs. So, this work (flexible-array member conversions) will also help to get completely rid of those sorts of issues. This issue was found with the help of Coccinelle. [1] https://gcc.gnu.org/onlinedocs/gcc/Zero-Length.html [2] https://github.com/KSPP/linux/issues/21 [3] commit 76497732932f ("cxgb3/l2t: Fix undefined behaviour") Signed-off-by: Gustavo A. R. Silva <gustavoars@kernel.org> Acked-by: Cezary Rojewski <cezary.rojewski@intel.com> Link: https://lore.kernel.org/r/20200511174647.GA17318@embeddedor Signed-off-by: Mark Brown <broonie@kernel.org>
2019-08-27ASoC: Intel: Skylake: Release topology when we are done with itAmadeusz Sławiński1-1/+0
Currently topology is kept in memory while driver is running. It's unnecessary, as it's only needed during parsing. Signed-off-by: Amadeusz Sławiński <amadeuszx.slawinski@linux.intel.com> Link: https://lore.kernel.org/r/20190827141712.21015-6-amadeuszx.slawinski@linux.intel.com Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2019-08-09Merge branch 'topic/hda-dmic' of ↵Mark Brown1-4/+0
https://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound into asoc-5.4
2019-07-31ASoC: Intel: Skylake: use common NHLT modulePierre-Louis Bossart1-3/+0
No functionality change, only use common functions now. Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Signed-off-by: Takashi Iwai <tiwai@suse.de>
2019-07-31ASoC: Intel: Skylake: move NHLT header to common directoryPierre-Louis Bossart1-1/+0
Prepare move from NHLT code to common directory, starting with header. Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Signed-off-by: Takashi Iwai <tiwai@suse.de>
2019-07-24ASoC: Intel: Skylake: Remove memory available checkCezary Rojewski1-6/+0
Current memory availability check is a stub, while actual memory management takes place in firmware. Leave this task to firmware entirely and remove redundant code. Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com> Link: https://lore.kernel.org/r/20190723145854.8527-5-cezary.rojewski@intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-07-24ASoC: Intel: Skylake: Remove MCPS available checkCezary Rojewski1-2/+0
The entire logic for MCPS calculation and DSP scheduling is found within DSP firmware. Currently driver implements simplistic, inaccurate logic itself which may prevent pipeline creation despite firmware being completely fine its parameters. Remove that logic and leave the MCPS calculation to DSP alone. Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com> Link: https://lore.kernel.org/r/20190723145854.8527-4-cezary.rojewski@intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-07-24ASoC: Intel: Skylake: Merge skl_sst and skl into skl_dev structCezary Rojewski1-24/+70
Skylake driver is divided into two modules: - snd_soc_skl - snd_soc_skl_ipc and nothing would be wrong if not for the fact that both cannot exist without one another. IPC module is not some kind of extension, as it is the case for snd_hda_ext_core which is separated from snd_hda_core - legacy hda interface. It's as much core Skylake module as snd_soc_skl is. Statement backed up by existence of circular dependency between this two. To eliminate said problem, struct skl_sst has been created. From that very momment, Skylake has been plagued by header errors (incomplete structs, unknown references etc.) whenever something new is to be added or code is cleaned up. As this design is being corrected, struct skl_sst is no longer needed, so combine it with struct skl. To avoid ambiguity when searching for skl stuff (struct skl *skl) it has also been renamed to skl_dev. No functional changes. Signed-off-by: Piotr Maziarz <piotrx.maziarz@intel.com> Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com> Link: https://lore.kernel.org/r/20190723145854.8527-2-cezary.rojewski@intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-07-06Merge branch 'asoc-5.3' into asoc-nextMark Brown1-0/+5
2019-07-06Merge branch 'asoc-5.2' into asoc-linusMark Brown1-0/+1
2019-06-26Merge tag 'v5.2-rc6' into asoc-5.3Mark Brown1-10/+1
Linux 5.2-rc6
2019-06-25ASoC: Intel: Skylake: Add function to cleanup debugfs interfaceAmadeusz Sławiński1-0/+5
Currently debugfs has no cleanup function. Add skl_debufs_exit function so we can clean after ourselves properly. Signed-off-by: Amadeusz Sławiński <amadeuszx.slawinski@linux.intel.com> Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2019-06-18ASoC: Intel: Skylake: Fix incorrect capture position reportingCezary Rojewski1-0/+1
HW recommends to set DUM bit on device power up, so that DPIB write request occurs every frame regardless of whether DPIB has changed or not. This addresses incorrect position reporting for capture streams. Signed-off-by: Leoni Prodduvaka <leoni.prodduvaka@intel.com> Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2019-06-05treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 285Thomas Gleixner1-10/+1
Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation version 2 of the license this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 100 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Alexios Zavras <alexios.zavras@intel.com> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190529141900.918357685@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2018-11-20ASoC: Intel: fix interface for Chromebook machine driversPierre-Louis Bossart1-3/+0
The changes for HDaudio overlooked the fact that the machine drivers used for Chromebooks rely on the dmic number information passed as pdata. Add dmic_num field to standard interface and use standard interface instead of SKL-specific one. Also clean-up pdata definition to remove fields that are no longer used. Fixes: 842bb5135f10 ('ASoC: Intel: use standard interface for Hdaudio machine driver') Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-08-28ASoC: Intel: Skylake: use hda_bus instead of hdac_busRakesh Ughreja1-3/+7
Use hda_bus instead of hdac_bus in the SKL ASoC platform driver to enable reuse of legacy HDA codec drivers. Signed-off-by: Rakesh Ughreja <rakesh.a.ughreja@intel.com> Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-08-28ASoC: Intel: Boards: Machine driver for SKL+ w/ HDAudio codecsRakesh Ughreja1-0/+2
Add machine driver for Intel platforms (SKL/KBL/BXT/APL) with HDA and iDisp codecs. This patch adds support for only iDisp (HDMI/DP) codec. In the following patches support for HDA codecs will be added. This should work for other Intel platforms as well e.g. GLK,CNL however this series is not tested on all the platforms. Signed-off-by: Rakesh Ughreja <rakesh.a.ughreja@intel.com> Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-06-28ALSA: hdac: Remove usage of struct hdac_ext_bus and use hdac_bus insteadRakesh Ughreja1-4/+3
This patch removes the hdac_ext_bus structure. The legacy and enhanced HDaudio capabilities can be handled in a backward-compatible way without separate definitions. Follow-up patches in this series handle the driver definition. Signed-off-by: Rakesh Ughreja <rakesh.a.ughreja@intel.com> Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Signed-off-by: Takashi Iwai <tiwai@suse.de>
2018-03-13ASoC: Intel: Skylake: Disable clock and power gating during FW/LIB downloadSanyog Kale1-0/+4
In order to achieve better DMA performance and reduce download time for firmware and library, it is recommended to disable dynamic clock and power gating. In some scenarios, DMA may wait to accumulate more data and last chunk of data never gets completed if dynamic clock and power gating is kept enabled. This patch adds support to disable/enable dynamic clock and power gating and use it during firmware and library download. Signed-off-by: Rakesh Ughreja <rakesh.a.ughreja@intel.com> Signed-off-by: Sanyog Kale <sanyog.r.kale@intel.com> Signed-off-by: Guneshwor Singh <guneshwor.o.singh@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-02-12ASoC: intel: skylake: replace platform to componentKuninori Morimoto1-1/+1
Now platform can be replaced to component, let's do it. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Tested-by: "Kp, Jeeja" <jeeja.kp@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-01-26ASoC: Intel: Skylake: Add ssp clock driverSriram Periyasamy1-0/+6
For certain platforms, it is required to start the clocks (mclk/sclk/fs) before the stream start. Example: for few chrome systems, codec needs the mclk/sclk to be enabled early for a successful clock synchronization and for few IVI platforms, clock need to be enabled at boot and should be ON always. Add the required structures and create set_dma_control ipc to enable or disable the clock. To enable sclk without fs, mclk ipc structure is used, else sclkfs ipc structure is used. Clock prepare/unprepare are used to enable/disable the clock as the IPC will be sent in non-atomic context. The clk set_dma_control IPC structures are populated during the set_rate callback and IPC is sent to enable the clock during prepare callback. This patch creates virtual clock driver, which allows the machine driver to use the clock interface to send IPCs to DSP to enable/disable the clocks. Signed-off-by: Sriram Periyasamy <sriramx.periyasamy@intel.com> Signed-off-by: Jaikrishna Nemallapudi <jaikrishnax.nemallapudi@intel.com> Signed-off-by: Subhransu S. Prusty <subhransu.s.prusty@intel.com> Acked-by: Vinod Koul <vinod.koul@intel.com> Reviewed-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Mark Brown <broonie@kernel.org>
2017-12-20ASoC: Intel: Skylake: Ensure dai and dailink registration happens in sequence.Pankaj Bharadiya1-0/+1
Platform registration happens in probe work handler whereas machine device is registered during skl_probe. This sometimes results in cpu dais not found if the work handler is sufficiently delayed due to system load, even with deferred probe of machine driver. So move machine device registration after registering platform. Signed-off-by: Pankaj Bharadiya <pankaj.laxminarayan.bharadiya@intel.com> Signed-off-by: Subhransu S. Prusty <subhransu.s.prusty@intel.com> Signed-off-by: Guneshwor Singh <guneshwor.o.singh@intel.com> Acked-By: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2017-12-06ASoC: Intel: Skylake: Parse vendor tokens to build A-State tablePradeep Tewani1-0/+17
A-State table is a power management table which allows the driver to configure the DSP clock source corresponding to various load thresholds. The table contains upto 3 A-State entries. The patch adds and parses the corresponding A-State tokens to build the table. Signed-off-by: Pradeep Tewani <pradeep.d.tewani@intel.com> Signed-off-by: Guneshwor Singh <guneshwor.o.singh@intel.com> Acked-By: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2017-11-29ASoC: Intel: Skylake: Parse nhlt and register clock deviceSriram Periyasamy1-0/+4
When NHLT endpoint is present for a SSP then we create clock for that SSP. MCLK is consistent across endpoints and configuration for an SSP, so query only for first endpoint for an SSP. For SCLK/SCLKFS, the best fit is queried from the NHLT configurations which matches the clock rate requested. Best fit is decided based on below: 1. If rate matches with multiple configurations, then the first configuration is selected. 2. If for a selected fs and bits_per_sample, there are multiple endpoint configuration match, then the configuration with max number of channels is selected. So, the user has to set the rate which fits max number of channels So we create a platform device and pass clock information parsed as platform data. Signed-off-by: Sriram Periyasamy <sriramx.periyasamy@intel.com> Signed-off-by: Jaikrishna Nemallapudi <jaikrishnax.nemallapudi@intel.com> Signed-off-by: Subhransu S. Prusty <subhransu.s.prusty@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2017-10-13ASoC: Intel: Skylake: Add flag to check to register FE dais from topologyGuneshwor Singh1-1/+3
Since FE dais can come from topology, split the FE dais from existing dai array so that FE dais need not be registered if they come from topology. Add use_tplg_pcm flag to check whether FE dais will be registered from topology during dai driver component registration. Signed-off-by: Guneshwor Singh <guneshwor.o.singh@intel.com> Acked-By: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2017-08-25ASoC: Intel: Skylake: Add driver structures to be filled from topology manifestShreyas NC1-0/+2
The topology manifest would include module common data including resource and interface table. The resource table consists of resources required by the dsp module such as buffer size, cycles per second, number of input/output pins. And, the interface table consists of pcm parameters per module which can be referenced later. So define the structures accordingly to represent topology manifest data in the driver. Signed-off-by: Shreyas NC <shreyas.nc@intel.com> Signed-off-by: Guneshwor Singh <guneshwor.o.singh@intel.com> Acked-By: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2017-08-03ASoC: Intel: Skylake: Add num of cores in dsp opsDharageswari R1-0/+1
Number of dsp cores may differ for different platforms hence adding it in dsp ops. Signed-off-by: Dharageswari R <dharageswari.r@intel.com> Signed-off-by: Guneshwor Singh <guneshwor.o.singh@intel.com> Acked-By: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2017-07-03ASoC: Intel: Skylake: Remove driver debugfs exitVinod Koul1-3/+0
For driver debugfs, debugfs_remove_recursive() is called which is not needed as it is already done in ASoC core debugfs. And a device managed memory need not be freed explicitly as device core frees it up. So remove unnecessary skl_debugfs_exit(). Fixes: 5cdf6c09ca9d ASoC: ("Intel: Skylake: Add debugfs support") Reported-by: Julia Lawall <julia.lawall@lip6.fr> Reported-by: kbuild test robot <fengguang.wu@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Guneshwor Singh <guneshwor.o.singh@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2017-06-30ASoC: Intel: Skylake: Debugfs facility to dump module configVinod Koul1-0/+10
Driver modules have lot of information represented in struct skl_module_cfg. Knowing this is useful for debug, so enable debugfs for this structure. Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Vunny Sodhi <vunnyx.sodhi@intel.com> Signed-off-by: Guneshwor Singh <guneshwor.o.singh@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2017-06-30ASoC: Intel: Skylake: Add debugfs supportVinod Koul1-0/+16
For debug, the kernel debugfs mechanism is available. We can add various debug options for driver like module configuration read, firmware register read etc. This patch adds debugfs as a child to asoc plaform component and caller is added for skylake driver to do init and cleanup of debugfs. Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Vunny Sodhi <vunnyx.sodhi@intel.com> Signed-off-by: Guneshwor Singh <guneshwor.o.singh@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2017-05-14ASoC: Intel: Skylake: Move i915 registration to worker threadVinod Koul1-1/+3
The i915 component framework expects the caller to be invoking snd_hdac_i915_init() from a thread context. Otherwise it results in lockups on drm side. So move the registering of component interface and probing of codecs on this bus to a worker thread. init_failed in skl structure is not used currently, so renamed to init_done and used to track the initialization done in worker thread. Reported-by: Imre Deak <imre.deak@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Sodhi, VunnyX <vunnyx.sodhi@intel.com> Signed-off-by: Subhransu S. Prusty <subhransu.s.prusty@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2017-05-02Merge tag 'asoc-v4.12' of ↵Takashi Iwai1-0/+1
git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound into for-linus ASoC: Updates for v4.12 A quiet release for the core, but lots of new drivers this time around: - A new, generalized, API for hooking up jacks which makes it easier to write generic machine drivers for simple cases. - Continuing fixes for issues with the x86 CPU drivers. - New drivers for Cirrus CS35L35, DIO DIO2125, Everest ES7132, HiSilicon hi6210, Maxim MAX98927, MT2701 systems with WM8960, Nuvoton NAU8824, Odroid systems, ST STM32 SAI controllers and x86 systems with DA7213
2017-04-12ASoC: Intel: Skylake: Add support for deferred DSP module bindJeeja KP1-0/+1
Module at the end of DSP pipeline that needs to be connected to a module in another pipeline are represented as a PGA(leaf node) and in PGA event handler these modules are bound/unbounded. Modules other than PGA leaf can be connected directly or via switch to a module in another pipeline. Example: reference path. To support the deferred DSP module bind, following changes are done: o When the path is enabled, the destination module that needs to be bound may not be initialized. If the module is not initialized, add these modules in a deferred bind list. o When the destination module is initialized, check for these modules in deferred bind list. If found, bind them. o When the destination module is deleted, Unbind the modules. o When the source module is deleted, remove the entry from the deferred bind list. Signed-off-by: Jeeja KP <jeeja.kp@intel.com> Acked-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2017-04-03ALSA: hda - Move SKL+ vendor specific register definitions to hda_register.hTakashi Iwai1-21/+0
They may be used by both legacy and ASoC drivers. Acked-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Takashi Iwai <tiwai@suse.de>
2017-02-16ASoC: Intel: Skylake: Check device type to get endpoint configurationSenthilnathan Veppur1-1/+2
Geminilake has two different devices connected to the same SSP, so use device_type check to get correct device configuration. Signed-off-by: Senthilnathan Veppur <senthilnathanx.veppur@intel.com> Signed-off-by: Subhransu S. Prusty <subhransu.s.prusty@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2017-02-04ASoC: Intel: Skylake: Report Platform ID info from NHLTSubhransu S. Prusty1-0/+2
This patch create entry in sysfs file system to report the platform_id = "pci-id-oem_id-oem_table_id-oem_revision" for board identification. Signed-off-by: Subhransu S. Prusty <subhransu.s.prusty@intel.com> Signed-off-by: Sodhi, VunnyX <vunnyx.sodhi@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-11-09ASoC: Intel: Skylake: Flush pending D0i3 request on suspendJayachandran B1-0/+1
While going to suspend, if we have any pending D0i3 work scheduled, flush that and force the DSP to goto D0i3 mode before going to suspend. Signed-off-by: Jayachandran B <jayachandran.b@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-11-03ASoC: Intel: Skylake: Add support for programming D0i3CPardha Saradhi K1-0/+5
To set the controller in D0i3 mode, the driver needs to set D0i3C register after DSP is quiesced. Since the D0iX entry/exit is done by IPC, add this as callback so that it can be invoked from IPC module. Signed-off-by: Pardha Saradhi K <pardha.saradhi.kesapragada@intel.com> Signed-off-by: Jayachandran B <jayachandran.b@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-08-08ASoC: Intel: Skylake: split fw and dsp initializationVinod Koul1-0/+1
The DSP instance creation also loads the firmware on DSPs. For library load the firmware names come from topology so can't be loaded at object creation. So split the firmware load and object creation. FW load is now called after topology init in platform probe. Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-08-08ASoC: Intel: Skylake: modify skl_get_dsp_ops()Vinod Koul1-0/+1
To query the ops used for a platform, we use skl_get_dsp_ops() which return index and then we load the ops. Rather than this return the ops, this way it cna be used later to query the ops in rest of the driver. Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-06-07ASoC: Intel: Skylake: Clean up of driver resources in suspendDharageswari R1-0/+2
On suspend firmware is re-initialized so resources are reset inside firmware. Driver should also clear the firmware counters at this time. Signed-off-by: Dharageswari R <dharageswari.r@intel.com> Signed-off-by: Jeeja KP <jeeja.kp@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-06-07ASoC: Intel: Skylake: Disable SRAM Retention before D3Dharageswari R1-0/+2
SW needs to set the PGCTL.LSRMD = 1 to disable LPSRAM retention feature,otherwise it may lead to SRAM ECC Errors. Signed-off-by: Dharageswari R <dharageswari.r@intel.com> Signed-off-by: Jeeja KP <jeeja.kp@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-05-30ASoC: Intel: Skylake: Add api to retrieve dmic array info from nhltYong Zhi1-0/+6
Skylake can be configured with either both 2 and 4 channel DMIC array, or 2 channel DMIC array only, this patch provides an API to retrieve the DMIC info from nhlt. Signed-off-by: Yong Zhi <yong.zhi@intel.com> Acked-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-05-05ASoC: Intel: Skylake: Fix memory leak in nhlt initJeeja KP1-3/+3
During skl_nhlt_init(), acpi obj pointer is allocated and never freed and remap address is not unmapped. To fix this we should release the ACPI obj and also unmap the nhlt address during cleanup of driver. Signed-off-by: Jeeja KP <jeeja.kp@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-03-12ASoC: Intel: Skylake: Move Skylake dsp ops & loader opsJeeja KP1-1/+11
The code loading for Skylake and other platforms is different, so add a dsp_ops and a loader_ops which can be defined for each platform. Move the dsp init, cleanup and loader ops (alloc and free dma) to these ops Signed-off-by: Jeeja KP <jeeja.kp@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-02-19ASoC: Intel: Skylake: Generate topology name for NHLT table headerVinod Koul1-0/+3
NHLT table [1] header has fields like oem_id, oem_table_id and oem_revision. Use that to load a unique topology binary specific to that platform NHLT Table is documented at: [1]: https://01.org/blogs/2016/intel-smart-sound-technology-audio-dsp Signed-off-by: Yang A Fang <yang.a.fang@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-01-11Merge tag 'asoc-v4.4-rc8' of ↵Takashi Iwai1-0/+3
git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound into for-next ASoC: Last updates for v4.5 A bunch more updates for v4.5, mainly driver work: - More topology API enhancements from Mengdong Lin working towards making everything more component based and being able to specify PCM links via topology. - Large sets driver updates from Cirrus, Intel (mainly more Skylake support) and Renesas. - New driver for AMD ACP - Rename PCM1792a driver to be generic pcm179x
2016-01-10ASoC: Intel: Skylake: fix reset controller sequencingJayachandran B1-0/+3
MISCBDCGE is a new register for Misc Backbone clock gate control which is useful to control while resetting the link and ensuring controller is in required state so add API to control it HW recommends that we reset with CGCTL.MISCBDCGE disabled, so add that while doing init chip and reset sequence. Signed-off-by: Jayachandran B <jayachandran.b@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-01-06Merge branch 'for-linus' into for-nextTakashi Iwai1-0/+1
Conflicts: drivers/gpu/drm/i915/intel_display.c sound/soc/intel/skylake/skl.h