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path: root/sound/soc/intel/skylake/skl-messages.c
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2018-12-13ASoC: Intel: Skylake: Add CFL-S supportTakashi Iwai1-0/+8
It's with CNP, supposed to be equivalent with CNL entry. Keep the existing declaration style for now, at a later point we may transition and use PCI_DEVICE_DATA(). Signed-off-by: Takashi Iwai <tiwai@suse.de> Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-06-28ALSA: hdac: Remove usage of struct hdac_ext_bus and use hdac_bus insteadRakesh Ughreja1-28/+22
This patch removes the hdac_ext_bus structure. The legacy and enhanced HDaudio capabilities can be handled in a backward-compatible way without separate definitions. Follow-up patches in this series handle the driver definition. Signed-off-by: Rakesh Ughreja <rakesh.a.ughreja@intel.com> Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Signed-off-by: Takashi Iwai <tiwai@suse.de>
2018-06-01ASoC: topology: Move skl-tplg-interface.h to uapiGuenter Roeck1-1/+1
skl-tplg-interface.h describes firmware format details for Skylake topology files. It is part of the ABI and should reside in the uapi directory. While moving the file, also replace the license boilerplate with the SPDX License Identifier. No functional change. Signed-off-by: Guenter Roeck <groeck@chromium.org> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-04-17ASoC: Intel: Skylake: Unify the fw ops for SKL and KBLPradeep Tewani1-1/+1
SKL and KBL driver used separate set of fw ops for library loading. However, with the unification of fw binary, use the common set of fw ops for both Signed-off-by: Pradeep Tewani <pradeep.d.tewani@intel.com> Signed-off-by: Sriram Periyasamy <sriramx.periyasamy@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-03-13ASoC: Intel: Skylake: Disable clock and power gating during FW/LIB downloadSanyog Kale1-1/+6
In order to achieve better DMA performance and reduce download time for firmware and library, it is recommended to disable dynamic clock and power gating. In some scenarios, DMA may wait to accumulate more data and last chunk of data never gets completed if dynamic clock and power gating is kept enabled. This patch adds support to disable/enable dynamic clock and power gating and use it during firmware and library download. Signed-off-by: Rakesh Ughreja <rakesh.a.ughreja@intel.com> Signed-off-by: Sanyog Kale <sanyog.r.kale@intel.com> Signed-off-by: Guneshwor Singh <guneshwor.o.singh@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-03-05ASoC: Intel: Skylake: Fix typoAbhijeet Kumar1-1/+1
Spelling mistake in state. So fixing it. Signed-off-by: Abhijeet Kumar <abhijeet.kumar@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-01-26ASoC: Intel: Skylake: Add ssp clock driverSriram Periyasamy1-0/+1
For certain platforms, it is required to start the clocks (mclk/sclk/fs) before the stream start. Example: for few chrome systems, codec needs the mclk/sclk to be enabled early for a successful clock synchronization and for few IVI platforms, clock need to be enabled at boot and should be ON always. Add the required structures and create set_dma_control ipc to enable or disable the clock. To enable sclk without fs, mclk ipc structure is used, else sclkfs ipc structure is used. Clock prepare/unprepare are used to enable/disable the clock as the IPC will be sent in non-atomic context. The clk set_dma_control IPC structures are populated during the set_rate callback and IPC is sent to enable the clock during prepare callback. This patch creates virtual clock driver, which allows the machine driver to use the clock interface to send IPCs to DSP to enable/disable the clocks. Signed-off-by: Sriram Periyasamy <sriramx.periyasamy@intel.com> Signed-off-by: Jaikrishna Nemallapudi <jaikrishnax.nemallapudi@intel.com> Signed-off-by: Subhransu S. Prusty <subhransu.s.prusty@intel.com> Acked-by: Vinod Koul <vinod.koul@intel.com> Reviewed-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-01-08Merge branch 'fix/intel' of ↵Mark Brown1-8/+1
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound into asoc-intel
2018-01-03ASoC: Intel: Skylake: Disable clock gating during firmware and library downloadPardha Saradhi K1-0/+4
During firmware and library download, sometimes it is observed that firmware and library download is timed-out resulting into probe failure. This patch disables dynamic clock gating while firmware and library download. Signed-off-by: Pardha Saradhi K <pardha.saradhi.kesapragada@intel.com> Signed-off-by: Sanyog Kale <sanyog.r.kale@intel.com> Signed-off-by: Guneshwor Singh <guneshwor.o.singh@intel.com> Acked-By: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2017-12-06ASoC: Intel: Skylake: Configure DSP clock sourcePradeep Tewani1-0/+18
DSP clock source is configured by sending the A-State table to the FW. Add the large config set IPC to configure the desired clock source Signed-off-by: Pradeep Tewani <pradeep.d.tewani@intel.com> Signed-off-by: Guneshwor Singh <guneshwor.o.singh@intel.com> Acked-By: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2017-11-11Merge remote-tracking branch 'asoc/topic/intel' into asoc-nextMark Brown1-9/+14
2017-11-08ASoC: Intel: Skylake: Add channel map in updown mixer module IPCGuneshwor Singh1-0/+1
DSP expects channel map to be sent in the IPC for updown mixer module. So add ch_map info in updown mixer module config. Signed-off-by: Guneshwor Singh <guneshwor.o.singh@intel.com> Acked-By: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2017-11-08ASoC: Intel: Skylake: Fix updown mixer module formatGuneshwor Singh1-8/+0
DSP expects length of the coefficient for updown mixer module to be 8. So fix the max coefficient length and since we are using default values for coefficient select which is zero, we need not explicitly initialize it. Signed-off-by: Guneshwor Singh <guneshwor.o.singh@intel.com> Acked-By: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2017-10-09ASoC: Intel: Skylake: Modify skl_dsp_set_dma_control API argumentsJaikrishna Nemallapudi1-9/+14
Set dma control ipc can be used to set the M/N divider, enable the clks. It takes different payload for different configuration. So modify the skl_dsp_set_dma_control API to take the size and node_id as argument. Signed-off-by: Jaikrishna Nemallapudi <jaikrishnax.nemallapudi@intel.com> Signed-off-by: Subhransu S. Prusty <subhransu.s.prusty@intel.com> Acked-By: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2017-09-01ASoC: Intel: Skylake: Add IPC to configure the copier secondary pinsPradeep Tewani1-5/+48
Copier can support upto 4 output pins. However, only pin 0 is configured as a part of copier initialization. Configuring rest of pins require the separate IPC to be sent to fw. Signed-off-by: Pradeep Tewani <pradeep.d.tewani@intel.com> Acked-By: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2017-08-25ASoC: Intel: Skylake: Parse and update module config structureRamesh Babu1-19/+40
A dsp path and the modules in the path can support various pcm configurations. The list of supported pcm configurations from topology manifest would be stored and later selected runtime based on the hw pcm params. For legacy, module data is filled in the 0th index of resource and interface table. To accommodate both models, change the relevant structures and populate them by parsing newly defined tokens. This change is backward compatible with the existing model where driver computes the resources required by each dsp module. Signed-off-by: Ramesh Babu <ramesh.babu@intel.com> Signed-off-by: Shreyas NC <shreyas.nc@intel.com> Signed-off-by: Guneshwor Singh <guneshwor.o.singh@intel.com> Acked-By: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2017-08-23ASoC: Intel: Skylake: Fix uninitialized returnSubhransu S. Prusty1-1/+1
On failure to get dsp_ops, dsp_init returns error without assigning ret. ret is assigned in code path which will never be executed. Fix it. Fixes: f77d443c4c29 ("ASoC: Intel: Skylake: Fix to free resources for dsp_init failure" Reported-by: kbuild test robot <fengguang.wu@intel.com> Signed-off-by: Subhransu S. Prusty <subhransu.s.prusty@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2017-08-23ASoC: Intel: Skylake: Fix to free resources for dsp_init failureSubhransu S. Prusty1-7/+19
unmap mmio and free memory resources if dsp_init fails. Signed-off-by: Subhransu S. Prusty <subhransu.s.prusty@intel.com> Acked-By: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2017-08-03ASoC: Intel: cnl: add dsp ops for cannonlakeGuneshwor Singh1-0/+9
Add cannonlake dsp support by adding its dsp_ops. Signed-off-by: Guneshwor Singh <guneshwor.o.singh@intel.com> Acked-By: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2017-08-03ASoC: Intel: Skylake: Use num_core to allocate instead of macroGuneshwor Singh1-1/+17
For different platforms, number of dsp cores can vary. So instead of creating array of size SKL_DSP_CORES_MAX, use num_core in dsp_ops() of the respective platform to allocate core usage counts and states. Signed-off-by: Guneshwor Singh <guneshwor.o.singh@intel.com> Acked-By: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2017-08-03ASoC: Intel: Skylake: Add num of cores in dsp opsDharageswari R1-0/+6
Number of dsp cores may differ for different platforms hence adding it in dsp ops. Signed-off-by: Dharageswari R <dharageswari.r@intel.com> Signed-off-by: Guneshwor Singh <guneshwor.o.singh@intel.com> Acked-By: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2017-07-17ASoC: Intel: Skylake: fix type in debug messageColin Ian King1-1/+1
Trivial fix to typo in debug message, dst_instacne should be dst_instance Signed-off-by: Colin Ian King <colin.king@canonical.com> Acked-By: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2017-07-10ASoC: Intel: Skylake: Fix default dma_buffer_sizeSubhransu S. Prusty1-0/+8
If the dma_buffer_size is not defined in topology, fix it to 2ms default value to make backward compatible. Fixes: f6e6ab1d16ec ("ASoC: Intel: Skylake: Fix dma buffer size calculation") Signed-off-by: Subhransu S. Prusty <subhransu.s.prusty@intel.com> Acked-By: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2017-06-19ASoC: Intel: Skylake: Fix dma buffer size calculationRamesh Babu1-4/+25
DMA buffer size for gateway copier will be calculated based on: For host DMA copier: Input buffer size (ibs) for output direction (playback) Output buffer size (obs) for input direction (capture) For link DMA copier: IBS for input direction (capture) OBS for output direction (playback) Update the driver to use the above. Signed-off-by: Ramesh Babu <ramesh.babu@intel.com> Signed-off-by: Subhransu S. Prusty <subhransu.s.prusty@intel.com> Acked-By: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2017-06-06ASoC: Intel: Skylake: Add mic-select module typeDharageswari R1-0/+2
mic-select module is a DSP module, which is used to select one or more input channels. This patch adds mic-select module type. Signed-off-by: Dharageswari R <dharageswari.r@intel.com> Signed-off-by: Subhransu S. Prusty <subhransu.s.prusty@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2017-04-26ASoC: Intel: Skylake: Register dsp_fw_ops for kabylakeSubhransu S. Prusty1-1/+1
For audio kabylake is same as skylake except the module load approach. This patch registers different dsp_fw_ops for kabylake and next patch adds the module load support for kabylake. Signed-off-by: Subhransu S. Prusty <subhransu.s.prusty@intel.com> Acked-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2017-03-29ASoC: Intel: Skylake: Fix module state after unbind and deleteJeeja KP1-1/+1
When DSP module is unbound, the module state needs to be in INIT_DONE state instead of UNINT. Also the state needs to be set to UNINIT after module is deleted from DSP pipeline. So, set the module state to INIT_DONE after unbind and then UNINIT after module is deleted. Signed-off-by: Jeeja KP <jeeja.kp@intel.com> Acked-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2017-03-15ASoC: Intel: Skylake: Remove get dsp_ops in cleanup routineG Kranthi1-6/+2
dsp ops is already set in init, so use this in cleanup routine instead of again retrieving it. Also constify struct skl_dsp_ops. Signed-off-by: G Kranthi <gudishax.kranthikumar@intel.com> Signed-off-by: Jeeja KP <jeeja.kp@intel.com> Acked-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2017-03-15ASoC: Intel: Skylake: Disable notifications at boot after DSP FW initG Kranthi1-1/+1
DSP firmware sends notification every 1ms, which is disabled in runtime suspend. But if a system has no runtime pm, we keep getting notification, so disable after FW init as well. Signed-off-by: G Kranthi <gudishax.kranthikumar@intel.com> Signed-off-by: Jeeja KP <jeeja.kp@intel.com> Acked-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2017-03-15ASoC: Intel: Skylake: Fix to delete DSP pipe after stopping pipeJeeja KP1-1/+1
DSP pipe needs to stopped before deleting the pipe. Currently check is for pipe state > STARTED, which is incorrect. So changed to include pipe state STARTED to stop the pipe if it started. Signed-off-by: Jeeja KP <jeeja.kp@intel.com> Acked-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2017-02-16ASoC: Intel: Skylake: Add Geminlake IDsVinod Koul1-0/+7
Geminilake is next gen SoC, so add the IDs for Geminilake. Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Subhransu S. Prusty <subhransu.s.prusty@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-11-25ASoC: Intel: Skylake: Don't use dma I2S config structure in kernelGuruprasadX Pawse1-6/+3
I2S blob config structure can change between DSP copier module versions. We are not modifying these structures anyway and NHLT blobs specify them properly, so use the blob directly to send the dma_control ipc instead of using the predefined I2S blob config structure. Signed-off-by: GuruprasadX Pawse <guruprasadx.pawse@intel.com> Signed-off-by: Jeeja KP <jeeja.kp@intel.com> Acked-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-11-09ASoC: Intel: Skylake: Flush pending D0i3 request on suspendJayachandran B1-0/+27
While going to suspend, if we have any pending D0i3 work scheduled, flush that and force the DSP to goto D0i3 mode before going to suspend. Signed-off-by: Jayachandran B <jayachandran.b@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-11-03ASoC: Intel: Skylake: Add support for LPModeVinod Koul1-1/+2
For D0i3, we need to tell DSP to run the pipelines in LP mode. This information is kept in topology and passed to driver as an attribute for pipe. So add a new tuple for lpmode and program the pipe based on value set. Signed-off-by: Jayachandran B <jayachandran.b@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-09-24ASoC: Intel: Skylake: Update to use instance ids generatedDharageswari R1-0/+2
Post bind parameters of KPB module contains the instance id's of neighbouring modules in the sink path Now that module instance ids are generated dynamically we need to update these parameters as well, so use the table created and update the ids Signed-off-by: Dharageswari R <dharageswari.r@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-09-24ASoC: Intel: Skylake: Use private instance id of modules in IPCDharageswari R1-10/+12
Use private id's of module instances that are generated during init_module for the IPC messages to DSP. These id's are freed up during delete pipeline. Signed-off-by: Dharageswari R <dharageswari.r@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-08-09Merge branch 'topic/hda-link-time' of ↵Mark Brown1-2/+2
git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound into asoc-intel
2016-08-09ALSA: convert users to core bus_parse_capabilitiesVinod Koul1-2/+2
Now that we have the bus parse capabilities moved to core, we need to convert users. The SKL driver and HDA extended lib needs to converted in single patch, otherwise we regress on the functionality. Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Takashi Iwai <tiwai@suse.de>
2016-08-08ASoC: Intel: Skylake: Add module processing domain supportSenthilnathan Veppur1-0/+1
A module can be scheduled in deferent processing domains in DSP. Topology specifies the module domain. Signed-off-by: Senthilnathan Veppur <senthilnathanx.veppur@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-08-08ASoC: Intel: Skylake: split fw and dsp initializationVinod Koul1-1/+7
The DSP instance creation also loads the firmware on DSPs. For library load the firmware names come from topology so can't be loaded at object creation. So split the firmware load and object creation. FW load is now called after topology init in platform probe. Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-08-08ASoC: Intel: Skylake: modify skl_get_dsp_ops()Vinod Koul1-14/+16
To query the ops used for a platform, we use skl_get_dsp_ops() which return index and then we load the ops. Rather than this return the ops, this way it cna be used later to query the ops in rest of the driver. Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-07-12ASoC: Intel: add kablake device IDsVinod Koul1-0/+6
Kabylake is next generation Intel platform which has similar audio controller to Skylake, so add the ID and driver data in SKL driver. Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-06-27ASoC: Intel: Skylake: Increase loglevel of debug messages.Vedang Patel1-1/+1
There is log spam while doing playback, record or reloading the audio firmware. print_hex_dump uses printk(KERN_DEBUG,... which is different from dev_dbg used elsewhere in the driver: it's always enabled at compile-time. Change it to print_hex_dump_debug for logging consistency. For consistency with other log statements, change dev_info to dev_dbg for a kernel print which is frequently printed by the driver. Signed-off-by: Vedang Patel <vedang.patel@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-06-07ASoC: Intel: Skylake: Don't pause stopped pipeline while deletingDharageswari R1-9/+11
If pipeline is not STARTED, we do not need to pause pipeline while deleting. Signed-off-by: Dharageswari R <dharageswari.r@intel.com> Signed-off-by: Jeeja KP <jeeja.kp@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-06-07ASoC: Intel: Skylake: Set the pipe state to paused when pausedJeeja KP1-1/+1
When pipe is stopped/Paused, set the pipe state to paused instead of created. Signed-off-by: Jeeja KP <jeeja.kp@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-06-07ASoC: Intel: Skylake: Reset DSP pipe when host/link DMA is resetJeeja KP1-0/+23
In case of XRUN recovery PCM prepare will be called. In this case Host/Link DMAs are reset and reconfigured, hence the corresponding FE/BE pipe needs to be reset in order to get to a clean state. Signed-off-by: Jeeja KP <jeeja.kp@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-05-02ASoC: Intel: Skylake: Fix memory leak during init instanceMousumi Jana1-1/+1
param_data variable is allocated during set module format of init instance is not getting freed and hence can cause a memory leak. So free it up. Signed-off-by: Mousumi Jana <mousumix.jana@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-03-31ASoC: Intel: Bxtn: Add Broxton DSP supportJeeja KP1-0/+120
Broxton DSP is mostly similar to Skylake one but with subtle differences like no Code Load DMA and uses HDA DMA for code loading, DSP D0 and D3 sequences are different. These changes are comprehended by adding different DSP power up and down handlers, and new loader ops and also adding prepare and trigger which HDA DSP DMA requires Signed-off-by: Jeeja KP <jeeja.kp@intel.com> Signed-off-by: Jayachandran B <jayachandran.b@intel.com> Signed-off-by: GuruprasadX Pawse <guruprasadx.pawse@intel.com> Signed-off-by: Kranthi G <gudishax.kranthikumar@intel.com> Signed-off-by: Dharageswari R <dharageswari.r@intel.com> Signed-off-by: Ramesh Babu <ramesh.babu@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-03-12ASoC: Intel: Skylake: Move Skylake dsp ops & loader opsJeeja KP1-9/+53
The code loading for Skylake and other platforms is different, so add a dsp_ops and a loader_ops which can be defined for each platform. Move the dsp init, cleanup and loader ops (alloc and free dma) to these ops Signed-off-by: Jeeja KP <jeeja.kp@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-02-08ASoC: Intel: Skylake: Add MCLK configurationDharageswari.R1-0/+40
The SoC has MCLK output which is typically required by codecs. The MCLK is controlled by DSP FW, so driver can configure that by sending DMA_CONTROL IPC. The configuration for MCLK is present in the endpoint blob. So if block has this configuration, send IPC to DSP for MCLK configuration. This is done by new function skl_dsp_set_dma_control() which is invoked by BE prepare. Signed-off-by: Dharageswari R <dharageswari.r@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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