Age | Commit message (Collapse) | Author | Files | Lines |
|
Newly added catpt solution found in sound/soc/intel/catpt is a direct
replacement to sound/soc/intel/haswell. It covers all features supported
by it and more - by aligning to recommended flows and requirement list
based on Windows driver equivalent. No harm is done to userspace as
catpt - similarly to haswell - loads no extenal topology files while
sharing the exact same ADSP firmware binary.
Given the above, existing haswell code is redundant so remove it.
Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Liam Girdwood <liam.r.girdwood@intel.com>
Link: https://lore.kernel.org/r/20201006064907.16277-2-cezary.rojewski@intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
|
|
While addressing existing power-cycle limitations for
sound/soc/intel/haswell solution, change brings regression for standard
audio userspace flows e.g.: when using PulseAudio.
Occasional sound-card initialization fail is still better than
permanent audio distortions, so revert the change.
Fixes: 8ec7d6043263 ("ASoC: Intel: haswell: Power transition refactor")
Reported-by: Christian Bundy <christianbundy@fraction.io>
Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com>
Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Link: https://lore.kernel.org/r/20200901153041.14771-1-cezary.rojewski@intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
|
|
Update D0 <-> D3 sequence to correctly transition hardware and DSP core
from and to D3. On top of that, set SHIM registers to their recommended
defaults during D0 and D3 proceduces as HW does not reset registers for
us.
Connected to:
[alsa-devel][BUG] bdw-rt5650 DSP boot timeout
https://mailman.alsa-project.org/pipermail/alsa-devel/2019-July/153098.html
Github issue ticket reference:
https://github.com/thesofproject/linux/pull/1842
Tested on:
- BDW-Y RVP with rt286
- SAMUS with rt5677
Proposed solution (both in July 2019 and on github):
'Revert "ASoC: Intel: Work around to fix HW d3 potential crash issue"'
is NAKed as it only covers the problem up and actually brings back the
undefined behavior: some registers (e.g.: APLLSE) are describing LPT
offsets rather than WPT ones. In consequence, during power-transitions
driver issues incorrect writes and leaves the regs of interest alone.
Existing patch - the non-revert - does not resolve the HW D3 issue at
all as it ignores the recommended sequence and does not initialize
hardware registers as expected. And thus, leaving things as are is also
unacceptable.
Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com>
Tested-by: Ross Zwisler <zwisler@google.com>
Link: https://lore.kernel.org/r/20200330194520.13253-1-cezary.rojewski@intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
|
|
Based on 1 normalized pattern(s):
this program is free software you can redistribute it and or modify
it under the terms of the gnu general public license version 2 as
published by the free software foundation this program is
distributed in the hope that it will be useful but without any
warranty without even the implied warranty of merchantability or
fitness for a particular purpose see the gnu general public license
for more details
extracted by the scancode license scanner the SPDX license identifier
GPL-2.0-only
has been chosen to replace the boilerplate/reference in 655 file(s).
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Allison Randal <allison@lohutok.net>
Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Reviewed-by: Richard Fontana <rfontana@redhat.com>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190527070034.575739538@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
|
|
Make all Sparse warnings go away by using le16/32_to_cpu.
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
|
|
The sst_block_ops structure is never modified, and is thus declared as
const.
Done with the help of Coccinelle.
Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr>
Acked-by: Jie Yang <yang.jie@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
|
|
Restructure the sound/soc/intel/ directory: create haswell folder, and
move haswell platform files here.
Signed-off-by: Jie Yang <yang.jie@intel.com>
Reviewed-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
|