summaryrefslogtreecommitdiff
path: root/sound/soc/codecs/rl6231.c
AgeCommit message (Collapse)AuthorFilesLines
2020-06-15ASoC: rl6231: Add new supports on rl6231derek.fang1-0/+2
Add pll preset maps for Realtek codecs' PLL2 freq conversions. Signed-off-by: derek.fang <derek.fang@realtek.com> Link: https://lore.kernel.org/r/1591938925-1070-2-git-send-email-derek.fang@realtek.com Signed-off-by: Mark Brown <broonie@kernel.org>
2020-06-04ASoC: rl6231: Modify the target DMIC clock rateOder Chiou1-2/+2
Some DMIC components will not work correctly in the clock rate 3.072MHz. We recommend the clock rate 1.536MHz in the gerenal case. Signed-off-by: Oder Chiou <oder_chiou@realtek.com> Link: https://lore.kernel.org/r/20200604071016.3981-1-oder_chiou@realtek.com Signed-off-by: Mark Brown <broonie@kernel.org>
2020-05-04ASoC: rl6231: Add the K bypass for the PLL parametersOder Chiou1-10/+19
The patch adds the K bypass for the PLL parameters. Signed-off-by: Oder Chiou <oder_chiou@realtek.com> Link: https://lore.kernel.org/r/20200504074007.13002-2-oder_chiou@realtek.com Signed-off-by: Mark Brown <broonie@kernel.org>
2020-02-11ASoC: rl6231: Add new supports on rl6231Derek Fang1-0/+1
1. Increases the max limit of PLL input frequency on RL6231 shared support. 2. Add a new pll preset map. Signed-off-by: Derek Fang <derek.fang@realtek.com> Link: https://lore.kernel.org/r/1580970133-14089-1-git-send-email-derek.fang@realtek.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-06-19treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500Thomas Gleixner1-4/+1
Based on 2 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation # extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 4122 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Enrico Weigelt <info@metux.net> Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190604081206.933168790@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-12-21ASoC: rl6231: remove never matched if conditionBard Liao1-2/+0
(in_t < 0) will never be true since in_t is unsigned. Signed-off-by: Bard Liao <bardliao@realtek.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2017-12-19ASoC: rl6231: get better PLL parametersBard Liao1-29/+66
For those which can only get approximation PLL out cases, this patch will use higher resolution to get a better PLL parameter. Signed-off-by: Bard Liao <bardliao@realtek.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2017-09-20ASoC: rl6231: make arrays div and pd static const, reduces object code sizeColin Ian King1-2/+3
Don't populate the read-only arrays div and pd on the stack, instead make them static const. Makes the object code smaller by 210 bytes: Before: text data bss dec hex filename 2869 720 0 3589 e05 sound/soc/codecs/rl6231.o After: text data bss dec hex filename 2495 880 0 3375 d2f sound/soc/codecs/rl6231.o Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-11-15ASoC: rl6231: add 19.2M to 4.096M pll preset tableBard Liao1-0/+1
Add a pll mapping table for 19.2M in and 4.096M out. Signed-off-by: Bard Liao <bardliao@realtek.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2015-11-16ASoC: rl6231: fix range of DMIC clockJohn Lin1-2/+2
The maximum DMIC clock rate is 3.072 MHz for most DMIC. And it will get better performance in higher clock rate. If we set maximum to 3 MHz in driver, we will get a clock rate which is not even close to 3 MHz. For example, if DMIC clock source is 24.576 MHz, the DMIC clock will be about 1.5 MHz in current code. But it will be 3.072 MHz with this patch. Signed-off-by: John Lin <john.lin@realtek.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2015-11-10ASoC: rl6231: avoid using divisible by 3 for DMIC clkBard Liao1-0/+2
Few codecs will meet no DMIC clock output issue when select a divided number which is divisible by 3. To prevent this issue, the patch ignore the numbers when calculating the DMIC clock divider. Signed-off-by: Bard Liao <bardliao@realtek.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2015-08-06ASoC: rl6231: Simplify DMIC divider calculation expressionAnatol Pomozov1-15/+15
Existing implementation checks all divider values and tracks 'red' proximity value for the frequency. But as divider array is monotonically increasing the first divider that gives DMIC rate in 3MHz range is the best one we should use. No need for 'red' zone tracking. Additionally make sure that DMIC frequency is higher 1MHz. Signed-off-by: Anatol Pomozov <anatol.pomozov@gmail.com> Acked-by: Oder Chiou <oder_chiou@realtek.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2015-08-05ASoC: Add function "rl6231_get_pre_div" to correct the dmic clock calculationOder Chiou1-0/+47
Signed-off-by: Bard Liao <bardliao@realtek.com> Signed-off-by: Oder Chiou <oder_chiou@realtek.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2015-07-23ASoC: rl6231: add pll preset tableBard Liao1-1/+26
Currently, rl6231_pll_calc provide a working PLL parameters for given freq_in and freq_out. However, in some cases it is not the perfect parameter. For example if freq_in = 19200000 and freq_out = 24576000, the calculated parameter will gengrate 24.5647 MHz which is not exactly the same as what we need. But the PLL can output 24.576 MHz as exactly what we expect if we set the best PLL parameter. To improve it, we put the best match parameters in a preset table. We can search the preset table first, if there is no preset parameter for the given freq_in and freq_out, we can still calculate a working PLL parameter. Signed-off-by: Bard Liao <bardliao@realtek.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2014-06-10ASoC: rl6231: Remove unneeded inclusion of header filesAxel Lin1-19/+0
Signed-off-by: Axel Lin <axel.lin@ingics.com> Tested-by: Oder Chiou <oder_chiou@realtek.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-06-01ASoC: rt5640: Add the function "get_clk_info" to RL6231 shared supportOder Chiou1-0/+16
The patch adds the function "get_clk_info" to RL6231 shared support. Signed-off-by: Oder Chiou <oder_chiou@realtek.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-06-01ASoC: rt5640: Add the function of the PLL clock calculation to RL6231 shared ↵Oder Chiou1-0/+69
support The patch adds the function of the PLL clock calculation to RL6231 shared support. Signed-off-by: Oder Chiou <oder_chiou@realtek.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-06-01ASoC: rt5640: Add RL6231 class device shared support for RT5640, RT5645 and ↵Oder Chiou1-0/+67
RT5651 The patch adds the RL6231 class device shared support for RT5640, RT5645 and RT5651. The function of the DMIC clock calculation can be shared by RL6231 shared support. Signed-off-by: Oder Chiou <oder_chiou@realtek.com> Signed-off-by: Mark Brown <broonie@linaro.org>
generated by cgit v1.2.3 (git 2.39.0) at 2024-10-22 10:28:41 +0300