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When the controller is powered up but the HDMI codec is powered down
on Skylake, the power well is turned off. When the codec is then
powered up again, we need to poke the codec a little extra to make
sure it wakes up. Otherwise we'll get sad "no response from codec"
messages and broken audio.
This also changes azx_runtime_resume to actually call
snd_hdac_set_codec_wakeup for Skylake (before STATETS read).
(Otherwise it would only have been called for Haswell and Broadwell,
which both do not need it, so this probably was not the author's
intention.)
Signed-off-by: David Henningsson <david.henningsson@canonical.com>
Reviewed-by: Libin Yang <libin.yang@intel.com>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
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Add the missing NULL checks so that snd_hdac_i915*() can be called
even after the binding with i915 failed.
Signed-off-by: Takashi Iwai <tiwai@suse.de>
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The file is moved to hda core and renamed to hdac_i915.c, so can be used
by both legacy HDA driver and new Skylake audio driver.
- Add snd_hdac_ prefix to the public APIs.
- The i915 audio component is moved to core bus and dynamically allocated.
- A static pointer hdac_acomp is used to help bind/unbind callbacks to get
this component, because the sound card's private_data is used by the azx
chip pointer, which is a legacy structure. It could be removed if private
_data changes to some core structure which can be extended to find the
bus.
- snd_hdac_get_display_clk() is added to get the display core clock for
HSW/BDW.
- haswell_set_bclk() is moved to hda_intel.c because it needs to write the
controller registers EM4/EM5, and only legacy HD-A needs it for HSW/BDW.
- Move definition of HSW/BDW-specific registers EM4/EM5 to hda_register.h
and rename them to HSW_EM4/HSW_EM5, because other HD-A controllers have
different layout for the extended mode registers.
Signed-off-by: Mengdong Lin <mengdong.lin@intel.com>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
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