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The event mapping function can be used in event info function to find out
the corresponding SBI PMU event encoding during the get_event_info function
as well. Refactor and export it so that it can be invoked from kvm and
internal driver.
Signed-off-by: Atish Patra <atishp@rivosinc.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Acked-by: Paul Walmsley <pjw@kernel.org>
Link: https://lore.kernel.org/r/20250909-pmu_event_info-v6-5-d8f80cacb884@rivosinc.com
Signed-off-by: Anup Patel <anup@brainfault.org>
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callers have no business modifying the paths they get
Reviewed-by: Christian Brauner <brauner@kernel.org>
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
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... and use that to constify the pointers in callers
Reviewed-by: Christian Brauner <brauner@kernel.org>
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
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for the method and its sole instance...
Reviewed-by: Jan Kara <jack@suse.cz>
Reviewed-by: Christian Brauner <brauner@kernel.org>
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
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Reviewed-by: Jan Kara <jack@suse.cz>
Reviewed-by: Christian Brauner <brauner@kernel.org>
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
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Callers never use the resulting pointer to modify the struct path it
points to (nor should they).
Reviewed-by: Jan Kara <jack@suse.cz>
Reviewed-by: Christian Brauner <brauner@kernel.org>
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
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During the connection establishment, a peer can tell the other one that
it cannot establish new subflows to the initial IP address and port by
setting the 'C' flag [1]. Doing so makes sense when the sender is behind
a strict NAT, operating behind a legacy Layer 4 load balancer, or using
anycast IP address for example.
When this 'C' flag is set, the path-managers must then not try to
establish new subflows to the other peer's initial IP address and port.
The in-kernel PM has access to this info, but the userspace PM didn't.
The RFC8684 [1] is strict about that:
(...) therefore the receiver MUST NOT try to open any additional
subflows toward this address and port.
So it is important to tell the userspace about that as it is responsible
for the respect of this flag.
When a new connection is created and established, the Netlink events
now contain the existing but not currently used 'flags' attribute. When
MPTCP_PM_EV_FLAG_DENY_JOIN_ID0 is set, it means no other subflows
to the initial IP address and port -- info that are also part of the
event -- can be established.
Link: https://datatracker.ietf.org/doc/html/rfc8684#section-3.1-20.6 [1]
Fixes: 702c2f646d42 ("mptcp: netlink: allow userspace-driven subflow establishment")
Reported-by: Marek Majkowski <marek@cloudflare.com>
Closes: https://github.com/multipath-tcp/mptcp_net-next/issues/532
Reviewed-by: Mat Martineau <martineau@kernel.org>
Signed-off-by: Matthieu Baerts (NGI0) <matttbe@kernel.org>
Link: https://patch.msgid.link/20250912-net-mptcp-pm-uspace-deny_join_id0-v1-2-40171884ade8@kernel.org
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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Turn d_name into an anon union of const struct qstr d_name with
struct qstr __d_name. Very few places need to modify it (all
in fs/dcache.c); those are switched to use of ->__d_name.
Note that ->d_name can actually change under you unless you have
the right locking environment; this const just prohibits accidentally
doing stores without being easily spotted.
Reviewed-by: Christian Brauner <brauner@kernel.org>
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
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Reviewed-by: Christian Brauner <brauner@kernel.org>
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
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Nothing outside of fs/dcache.c has any business modifying
dentry names; passing &dentry->d_name as an argument should
have that argument declared as a const pointer.
Acked-by: Casey Schaufler <casey@schaufler-ca.com> # smack part
Acked-by: Paul Moore <paul@paul-moore.com>
Reviewed-by: Christian Brauner <brauner@kernel.org>
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
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Add device tree binding support for RZ/T2H and RZ/N2H SoCs to the
existing RZ/N1 MIIC converter binding. These SoCs share similar MIIC
functionality but have architectural differences that require schema
updates.
Add new compatible strings "renesas,r9a09g077-miic" for RZ/T2H and
"renesas,r9a09g087-miic" for RZ/N2H, with the latter falling back to
the RZ/T2H variant. The new SoCs require reset support with two reset
lines for converter register reset and converter reset, which are not
present on RZ/N1.
Update port configurations to accommodate the different architectures.
RZ/N1 supports 5 ports numbered 1-5 with complex input mappings
covering indices 0-13, while RZ/T2H and RZ/N2H support 4 ports
numbered 0-3 with simplified input mappings covering indices 0-8.
Extend the switch port configuration property to support value 0 for
the new SoCs.
Add a new dt-bindings header file with media interface connection
matrix constants that map GMAC, ESC, and ETHSW ports to numeric
identifiers for use with RZ/T2H and RZ/N2H device trees.
Update DT schema validation to ensure proper port numbering and input
mappings per SoC variant.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://patch.msgid.link/20250910204132.319975-2-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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At present the parameters to compute timeout time for split transaction is
protected by card-wide spin lock, while it is not necessarily convenient
in a point to narrower critical section.
This commit adds and uses another spin lock specific for the purpose.
Link: https://lore.kernel.org/r/20250915234747.915922-6-o-takashi@sakamocchi.jp
Signed-off-by: Takashi Sakamoto <o-takashi@sakamocchi.jp>
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The list of instance for asynchronous transaction to wait for response
subaction is maintained as a member of fw_card structure. The card-wide
spinlock is used at present for any operation over the list, however it
is not necessarily suited for the purpose.
This commit adds and uses the spin lock specific to maintain the list.
Link: https://lore.kernel.org/r/20250915234747.915922-5-o-takashi@sakamocchi.jp
Signed-off-by: Takashi Sakamoto <o-takashi@sakamocchi.jp>
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At present, the operation for read transaction to topology map register is
not protected by any kind of lock primitives. This causes a potential
problem to result in the mixed content of topology map.
This commit adds and uses spin lock specific to topology map.
Link: https://lore.kernel.org/r/20250915234747.915922-4-o-takashi@sakamocchi.jp
Signed-off-by: Takashi Sakamoto <o-takashi@sakamocchi.jp>
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The list of receivers for phy packet is used only by cdev layer, while it
is maintained as a member of fw_card structure.
This commit maintains the list locally in cdev layer.
Link: https://lore.kernel.org/r/20250915234747.915922-3-o-takashi@sakamocchi.jp
Signed-off-by: Takashi Sakamoto <o-takashi@sakamocchi.jp>
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The following patches will modify ECN helpers and add AccECN herlpers,
and this patch moves the existing ones into a separated include file.
No functional changes.
Signed-off-by: Chia-Yu Chang <chia-yu.chang@nokia-bell-labs.com>
Acked-by: Paolo Abeni <pabeni@redhat.com>
Reviewed-by: Eric Dumazet <edumazet@google.com>
Link: https://patch.msgid.link/20250911110642.87529-5-chia-yu.chang@nokia-bell-labs.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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Use the first 3-byte hole at the beginning of the tcp_sock_write_txrx
group for 'noneagle'/'rate_app_limited' to fill in the existing hole
in later patches. Therefore, the group size of tcp_sock_write_txrx is
reduced from 92 + 4 to 91 + 4. In addition, the group size of
tcp_sock_write_rx is changed to 96 to fit in the pahole outcome.
Below are the trimmed pahole outcomes before and after this patch:
[BEFORE THIS PATCH]
struct tcp_sock {
[...]
__cacheline_group_begin__tcp_sock_write_txrx[0]; /* 2521 0 */
/* XXX 3 bytes hole, try to pack */
[...]
struct tcp_options_received rx_opt; /* 2588 24 */
u8 nonagle:4; /* 2612: 0 1 */
u8 rate_app_limited:1; /* 2612: 4 1 */
/* XXX 3 bits hole, try to pack */
__cacheline_group_end__tcp_sock_write_txrx[0]; /* 2613 0 */
/* XXX 3 bytes hole, try to pack */
__cacheline_group_begin__tcp_sock_write_rx[0] __attribute__((__aligned__(8))); /* 2616 0 */
[...]
__cacheline_group_end__tcp_sock_write_rx[0]; /* 2712 0 */
[...]
/* size: 3200, cachelines: 50, members: 161 */
}
[AFTER THIS PATCH]
struct tcp_sock {
[...]
__cacheline_group_begin__tcp_sock_write_txrx[0]; /* 2521 0 */
u8 nonagle:4; /* 2521: 0 1 */
u8 rate_app_limited:1; /* 2521: 4 1 */
/* XXX 3 bits hole, try to pack */
/* XXX 2 bytes hole, try to pack */
[...]
struct tcp_options_received rx_opt; /* 2588 24 */
__cacheline_group_end__tcp_sock_write_txrx[0]; /* 2612 0 */
/* XXX 4 bytes hole, try to pack */
__cacheline_group_begin__tcp_sock_write_rx[0] __attribute__((__aligned__(8))); /* 2616 0 */
[...]
__cacheline_group_end__tcp_sock_write_rx[0]; /* 2712 0 */
[...]
/* size: 3200, cachelines: 50, members: 161 */
}
Signed-off-by: Chia-Yu Chang <chia-yu.chang@nokia-bell-labs.com>
Reviewed-by: Eric Dumazet <edumazet@google.com>
Link: https://patch.msgid.link/20250911110642.87529-4-chia-yu.chang@nokia-bell-labs.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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The following patch will use tcp_ecn_mode_accecn(),
TCP_ACCECN_CEP_INIT_OFFSET, TCP_ACCECN_CEP_ACE_MASK in
__tcp_fast_path_on() to make new flag for AccECN.
No functional changes.
Signed-off-by: Ilpo Järvinen <ij@kernel.org>
Signed-off-by: Chia-Yu Chang <chia-yu.chang@nokia-bell-labs.com>
Reviewed-by: Eric Dumazet <edumazet@google.com>
Link: https://patch.msgid.link/20250911110642.87529-3-chia-yu.chang@nokia-bell-labs.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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Add a UAPI flag indicating if gang submit is supported or not.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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The bpf_cgroup_from_id kfunc relies on cgroup_get_from_id to obtain the
cgroup corresponding to a given cgroup ID. This helper can be called in
a lot of contexts where the current thread can be random. A recent
example was its use in sched_ext's ops.tick(), to obtain the root cgroup
pointer. Since the current task can be whatever random user space task
preempted by the timer tick, this makes the behavior of the helper
unreliable.
Refactor out __cgroup_get_from_id as the non-namespace aware version of
cgroup_get_from_id, and change bpf_cgroup_from_id to make use of it.
There is no compatibility breakage here, since changing the namespace
against which the lookup is being done to the root cgroup namespace only
permits a wider set of lookups to succeed now. The cgroup IDs across
namespaces are globally unique, and thus don't need to be retranslated.
Reported-by: Dan Schatzberg <dschatzberg@meta.com>
Signed-off-by: Kumar Kartikeya Dwivedi <memxor@gmail.com>
Acked-by: Tejun Heo <tj@kernel.org>
Link: https://lore.kernel.org/r/20250915032618.1551762-2-memxor@gmail.com
Signed-off-by: Alexei Starovoitov <ast@kernel.org>
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Introduce qcomtee_object, which represents an object in both QTEE and
the kernel. QTEE clients can invoke an instance of qcomtee_object to
access QTEE services. If this invocation produces a new object in QTEE,
an instance of qcomtee_object will be returned.
Similarly, QTEE can request services from by issuing a callback
request, which invokes an instance of qcomtee_object.
Implement initial support for exporting qcomtee_object to userspace
and QTEE, enabling the invocation of objects hosted in QTEE and userspace
through the TEE subsystem.
Tested-by: Neil Armstrong <neil.armstrong@linaro.org>
Tested-by: Harshal Dev <quic_hdev@quicinc.com>
Acked-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Signed-off-by: Amirreza Zarrabi <amirreza.zarrabi@oss.qualcomm.com>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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Increase TEE_MAX_ARG_SIZE to accommodate worst-case scenarios where
additional buffer space is required to pass all arguments to TEE.
This change is necessary for upcoming support for Qualcomm TEE, which
requires a larger buffer for argument marshaling.
Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Tested-by: Harshal Dev <quic_hdev@quicinc.com>
Signed-off-by: Amirreza Zarrabi <amirreza.zarrabi@oss.qualcomm.com>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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The TEE subsystem allows session-based access to trusted services,
requiring a session to be established to receive a service. This
is not suitable for an environment that represents services as objects.
An object supports various operations that a client can invoke,
potentially generating a result or a new object that can be invoked
independently of the original object.
Add TEE_IOCTL_PARAM_ATTR_TYPE_OBJREF_INPUT/OUTPUT/INOUT to represent an
object. Objects may reside in either TEE or userspace. To invoke an
object in TEE, introduce a new ioctl. Use the existing SUPPL_RECV and
SUPPL_SEND to invoke an object in userspace.
Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Tested-by: Neil Armstrong <neil.armstrong@linaro.org>
Tested-by: Harshal Dev <quic_hdev@quicinc.com>
Signed-off-by: Amirreza Zarrabi <amirreza.zarrabi@oss.qualcomm.com>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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For drivers that can transfer data to the TEE without using shared
memory from client, it is necessary to receive the user address
directly, bypassing any processing by the TEE subsystem. Introduce
TEE_IOCTL_PARAM_ATTR_TYPE_UBUF_INPUT/OUTPUT/INOUT to represent
userspace buffers.
Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Tested-by: Neil Armstrong <neil.armstrong@linaro.org>
Tested-by: Harshal Dev <quic_hdev@quicinc.com>
Signed-off-by: Amirreza Zarrabi <amirreza.zarrabi@oss.qualcomm.com>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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The tee_context can be used to manage TEE user resources, including
those allocated by the driver for the TEE on behalf of the user.
The release() callback is invoked only when all resources, such as
tee_shm, are released and there are no references to the tee_context.
When a user closes the device file, the driver should notify the
TEE to release any resources it may hold and drop the context
references. To achieve this, a close_context() callback is
introduced to initiate resource release in the TEE driver when
the device file is closed.
Relocate teedev_ctx_get, teedev_ctx_put, tee_device_get, and
tee_device_get functions to tee_core.h to make them accessible
outside the TEE subsystem.
Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Tested-by: Neil Armstrong <neil.armstrong@linaro.org>
Tested-by: Harshal Dev <quic_hdev@quicinc.com>
Signed-off-by: Amirreza Zarrabi <amirreza.zarrabi@oss.qualcomm.com>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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'20250911-qcom-tee-using-tee-ss-without-mem-obj-v12-2-17f07a942b8d@oss.qualcomm.com' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux
firmware: qcom: tzmem: export shm_bridge create/delete
firmware: qcom: scm: add support for object invocation
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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The !CONFIG_IO_URING signature is wrong, fix that up. The non stub
signature got updated for the io_br_sel changes that happened before
this patch went in, but the stub one did not.
Fixes: 620a50c92700 ("io_uring: uring_cmd: add multishot support")
Signed-off-by: Jens Axboe <axboe@kernel.dk>
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Add a driver for the AMD Versal NET DDR memory controller which supports
single bit error correction, double bit error detection and other system
errors from various IP subsystems (e.g., RPU, NOCs, HNICX, PL).
The driver listens for notifications from the NMC (Network management
controller) using RPMsg (Remote Processor Messaging).
The channel used for communicating to RPMsg is named "error_edac". Upon
receipt of a notification, the driver sends a RAS event trace.
[ bp:
- Fixup title
- Rewrite commit message
- Fixup Kconfig text
- Zap unused defines and align them
- Simplify rpmsg_cb() considerably
- Drop silly double-brackets in conditionals
- Use proper void * type in mcdi_request()
- Do not clear chinfo in rpmsg_probe() unnecessarily
- Fix indentation
- Do a proper err unwind path in init_versalnet()
- Redo the error unwind path in mc_probe() properly
- Fix the ordering in mc_remove()
]
Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@amd.com>
Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
Link: https://lore.kernel.org/20250908115649.22903-1-shubhrajyoti.datta@amd.com
Link: https://lore.kernel.org/r/20250703173105.GLaGa-WQCESDNsqygm@fat_crate.local
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git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into soc/drivers
Arm SCMI updates/fixes for v6.18
These SCMI changes bring a mix of improvements, fixes, and cleanups:
1. Device Tree bindings - allow multiple SCMI instances by suffixing
node names (Nikunj Kela).
2. Code hardening - constify both scmi_{transport,voltage_proto}_ops
so they reside in read-only memory (Christophe JAILLET).
3. VirtIO transport initialization - set DRIVER_OK before SCMI probing
to prevent potential stalls; while recent rework removes the practical
risk, this ensures correctness (Junnan Wu).
4. Quirk handling - fix a critical bug by preventing writes to string
constants, avoiding faults in read-only memory (Johan Hovold).
5. i.MX SCMI MISC protocol - extend support to discover board info,
retrieve configuration and build data, and document the new
MISC_BOARD_INFO command; all handled gracefully if unsupported (Peng Fan).
6. Logging cleanup - simplify device tree node name logging by using
the %pOF format to print full paths (Krzysztof Kozlowski).
* tag 'scmi-updates-6.18' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
firmware: arm_scmi: Simplify printks with pOF format
firmware: arm_scmi: imx: Discover MISC board info from the system manager
firmware: arm_scmi: imx: Support retrieving MISC protocol configuration info
firmware: arm_scmi: imx: Discover MISC build info from the system manager
firmware: arm_scmi: imx: Add documentation for MISC_BOARD_INFO
firmware: arm_scmi: quirk: Prevent writes to string constants
firmware: arm_scmi: Fix function name typo in scmi_perf_proto_ops struct
firmware: arm_scmi: Mark VirtIO ready before registering scmi_virtio_driver
firmware: arm_scmi: Constify struct scmi_transport_ops
firmware: arm_scmi: Constify struct scmi_voltage_proto_ops
dt-bindings: firmware: arm,scmi: Allow multiple instances
Link: https://lore.kernel.org/r/20250915101341.2987516-1-sudeep.holla@arm.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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The cdx_mcdi_init(), cdx_mcdi_process_cmd(), and cdx_mcdi_rpc() functions are
needed by the VersalNET EDAC module that interact with the MCDI (Management
Controller Direct Interface) framework. These functions facilitate
communication between different hardware components by enabling command
execution and status management.
Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@amd.com>
Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
Acked-by: Nikhil Agarwal <nikhil.agarwal@amd.com>
Link: https://lore.kernel.org/20250908115649.22903-1-shubhrajyoti.datta@amd.com
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git://git.kernel.org/pub/scm/linux/kernel/git/jenswi/linux-tee into soc/drivers
TEE protected DMA-bufs for v6.18
- Allocates protected DMA-bufs from a DMA-heap instantiated from the TEE
subsystem.
- The DMA-heap uses a protected memory pool provided by the backend TEE
driver, allowing it to choose how to allocate the protected physical
memory.
- Three use-cases (Secure Video Playback, Trusted UI, and Secure Video
Recording) have been identified so far to serve as examples of what
can be expected.
- The use-cases have predefined DMA-heap names,
"protected,secure-video", "protected,trusted-ui", and
"protected,secure-video-record". The backend driver registers protected
memory pools for the use-cases it supports.
* tag 'tee-prot-dma-buf-for-v6.18' of git://git.kernel.org/pub/scm/linux/kernel/git/jenswi/linux-tee:
optee: smc abi: dynamic protected memory allocation
optee: FF-A: dynamic protected memory allocation
optee: support protected memory allocation
tee: add tee_shm_alloc_dma_mem()
tee: new ioctl to a register tee_shm from a dmabuf file descriptor
tee: refactor params_from_user()
tee: implement protected DMA-heap
dma-buf: dma-heap: export declared functions
optee: sync secure world ABI headers
Link: https://lore.kernel.org/r/20250912101752.GA1453408@rayden
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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generic_delete_inode() is rather misleading for what the routine is
doing. inode_just_drop() should be much clearer.
The new naming is inconsistent with generic_drop_inode(), so rename that
one as well with inode_ as the suffix.
No functional changes.
Signed-off-by: Mateusz Guzik <mjguzik@gmail.com>
Reviewed-by: Jan Kara <jack@suse.cz>
Signed-off-by: Christian Brauner <brauner@kernel.org>
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https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/drivers
Qualcomm driver updates for v6.18
Allowlist the uefisec application, to provide UEFI variable access on
Dell Inspiron 7441 and Latitude 7455, the Hamoa EVK, and the Lenovo
Thinkbook 16.
Disable tzmem on the SC7180 platform, as this causes problems with
rmtfs.
Clean up unused, lingering, parameters in the MDT loader API.
Unconditinally clear TCS trigger bit, to avoid false completion IRQs in
the RPMh/RSC driver. Fix endianess issue in SMEM driver.
Add pd-mapper support for SM8750.
* tag 'qcom-drivers-for-6.18' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
firmware: qcom: tzmem: disable sc7180 platform
soc: qcom: use devm_kcalloc() for array space allocation
dt-bindings: firmware: qcom,scm: Add MSM8937
firmware: qcom: scm: Allow QSEECOM on Dell Inspiron 7441 / Latitude 7455
firmware: qcom: scm: Allow QSEECOM on Lenovo Thinkbook 16
soc: qcom: rpmh-rsc: Unconditionally clear _TRIGGER bit for TCS
soc: qcom: pd-mapper: Add SM8750 compatible
soc: qcom: icc-bwmon: Fix handling dev_pm_opp_find_bw_*() errors
soc: remove unneeded 'fast_io' parameter in regmap_config
soc: qcom: smem: Fix endian-unaware access of num_entries
dt-bindings: soc: qcom,rpmh-rsc: Remove double colon from description
dt-bindings: sram: qcom,imem: Document IPQ5424 compatible
firmware: qcom: scm: Allow QSEECOM on HAMOA-IOT-EVK
soc: qcom: mdt_loader: Remove unused parameter
soc: qcom: mdt_loader: Remove pas id parameter
soc: qcom: mdt_loader: Remove unused parameter
firmware: qcom: scm: preserve assign_mem() error return value
Link: https://lore.kernel.org/r/20250911215017.3020481-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Move bitfield.h from the CDX controller directory to include/linux/cdx to make
them accessible to other drivers.
As part of this refactoring, split mcdi.h into two headers:
- mcdi.h: retains interface-level declarations
- mcdid.h: contains internal definitions and macros
This is in preparation for VersalNET EDAC driver that relies on it.
Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@amd.com>
Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
Acked-by: Nikhil Agarwal <nikhil.agarwal@amd.com>
Link: https://lore.kernel.org/20250908115649.22903-1-shubhrajyoti.datta@amd.com
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into soc/drivers
This pull request contains Broadcom SoC drivers updates for 6.18:
- Andrea adds the missing MIPI DSI clock defines for the RP1 and then
continues to implement the remaining clocks for the RP1 chip (ADC,
I2S, Audio in/out, DMA, MIPI, PWM, SDIO, UART, encoder)
- Akhilesh fixes a spelling typo in the bcm47xx_sprom driver
- Brian converts the RP1 clock driver to use the new determine_rate()
API
* tag 'arm-soc/for-6.18/drivers' of https://github.com/Broadcom/stblinux:
clk: rp1: convert from round_rate() to determine_rate()
drivers: firmware: bcm47xx_sprom: fix spelling
clk: rp1: Implement remaining clock tree
dt-bindings: clock: rp1: Add missing MIPI DSI defines
Link: https://lore.kernel.org/r/20250910171910.666401-4-florian.fainelli@broadcom.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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soc/drivers
Reset controller updates for v6.18
* Fix the reset tree git repository link in MAINTAINERS.
* Add support for bcm63xx ephy reset control to reset-bcm6345.
* Add support for the AST2700 reset controller, as an auxiliary
device driver to the corresponding clock controller driver.
* Add support for the remaining TH1520 VO subsystem reset controls to
reset-th1520.
* Drop unnecessary .fast_io setting from MMIO regmap_configs.
* tag 'reset-for-v6.18' of https://git.pengutronix.de/git/pza/linux:
reset: remove unneeded 'fast_io' parameter in regmap_config
reset: th1520: add resets for display pipeline
dt-bindings: reset: thead,th1520-reset: add more VOSYS resets
reset: aspeed: register AST2700 reset auxiliary bus device
reset: bcm6345: add support for bcm63xx ephy control register
dt-bindings: reset: add compatible for bcm63xx ephy control
MAINTAINERS: Use https:// protocol for Reset Controller Framework tree
Link: https://lore.kernel.org/r/20250904154135.2385905-1-p.zabel@pengutronix.de
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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'20250911-qcom-tee-using-tee-ss-without-mem-obj-v12-2-17f07a942b8d@oss.qualcomm.com' into drivers-for-6.18
Merge the addition of support for object invocation into the SCM driver
though a topic branch, to enable sharing this with TEE subsystem.
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Qualcomm TEE (QTEE) hosts Trusted Applications (TAs) and services in
the secure world, accessed via objects. A QTEE client can invoke these
objects to request services. Similarly, QTEE can request services from
the nonsecure world using objects exported to the secure world.
Add low-level primitives to facilitate the invocation of objects hosted
in QTEE, as well as those hosted in the nonsecure world.
If support for object invocation is available, the qcom_scm allocates
a dedicated child platform device. The driver for this device communicates
with QTEE using low-level primitives.
Tested-by: Neil Armstrong <neil.armstrong@linaro.org>
Tested-by: Harshal Dev <quic_hdev@quicinc.com>
Signed-off-by: Amirreza Zarrabi <amirreza.zarrabi@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250911-qcom-tee-using-tee-ss-without-mem-obj-v12-2-17f07a942b8d@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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Anyone with access to contiguous physical memory should be able to
share memory with QTEE using shm_bridge.
Tested-by: Neil Armstrong <neil.armstrong@linaro.org>
Tested-by: Harshal Dev <quic_hdev@quicinc.com>
Reviewed-by: Kuldeep Singh <quic_kuldsing@quicinc.com>
Signed-off-by: Amirreza Zarrabi <amirreza.zarrabi@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250911-qcom-tee-using-tee-ss-without-mem-obj-v12-1-17f07a942b8d@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into soc/dt
dt-bindings: Changes for v6.18-rc1
Support for the Tegra264 generation of I2C is documented as well as some
older Tegra devices, such as the Xiaomi Mi Pad and the ASUS 101 devices.
Contained are also some additions to existing bindings for Tegra114 and
a fix for the power supply feeding VI/CSI.
* tag 'tegra-for-6.18-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
dt-bindings: arm: tegra: Add ASUS TF101G and SL101
dt-bindings: reset: Add Tegra114 CAR header
dt-bindings: arm: tegra: Add Xiaomi Mi Pad (A0101)
dt-bindings: clock: tegra30: Add IDs for CSI pad clocks
dt-bindings: display: tegra: Move avdd-dsi-csi-supply from VI to CSI
dt-bindings: i2c: nvidia,tegra20-i2c: Document Tegra264 I2C
Link: https://lore.kernel.org/r/20250914063927.89981-1-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/dt
Qualcomm Arm64 DeviceTree updates for v6.18
Add support for Lenovo Thinkbook 16, Dell Inspiron 7441, Dell Latitude
7455, Samsung Galaxy S20, Billion Capture+, the Monaco EVK and the
Lemans EVK.
The SDM845 Cheza development boards are removed, as they are not longer
in use.
For IPQ5018 crypto, tsens, rng, SPI NAND support is dded, the two MDIO
buses are added and the internal GE PHY.
IPQ5424 gets CPU frequency scaling and a missing UART.
The SA8775P SoC is remaned Lemans, to reduce confusion about the chip
name. The IoT memory map introduced and made the default, GDSP FastRPC
and GPR nodes are added.
Touch keys are enabled on the BQ Aquaris X5 Plus.
On QCM2290 the video accelerator is enabled, so is HS timing modes for
eMMC.
The QCS615 platform is renamed SM6150. CPU frequency scaling and the WiFi
PCIe controller is introduced.
On Monaco (QCS8300) scaling of L3 and DDR bandwidth is introduced. So is
eMMC support and generic packer router (GPR).
On the Monaco Ride board, the eMMC controller is enabled.
On QRB220 RB1, the venus video accelerator is enabled.
For SC7280 the first PCIe controller and PHY is introduced. SoundWire,
LPASS, and USB offload support is added, the codecs and sound card is
then described on the QCM6490 IDP. The MDSS core reset is introduced, to
clear bootloader configuration on SC7280-based devices.
On Fairphone5, USB audio offload is added.
AudioReach support on SC7280 (QCS6490) is introduced and used to
enable sound on the RB3Gen2 board.
The video clock controller is added to SC8180X.
On SC8280XP the GPI DMA controllers are described and enabled.
Display and GPU is enabled for the Fairphone 3 and charging is enabled
on the Google Pixel 3a.
The routing for the second USB connector on the Lenovo Yoga C630 is
described.
On SM6150 ADSP and CDSP FastRPC is introduced, as is the video
encoder/decoder (venus).
On SM6350 RPMh statistics is enabled, the USB audio offload DAI is
introduced and on Fairphone4 the USB audio offload support is enabled.
On SM8450 QRD the PMIC GLINK is described, to add USB Type-C and battery
functionality.
On SM8650 ACD levels are added for the GPU.
Camera and video clock controllers power-domains are updated on SM8450,
SM8550, and SM8650, now that support for multiple power-domains is
accepted.
SM8750 gains bwmon support for dynamic bus scaling, and PCIe nodes.
The DWC3 glue and core nodes are flattened on a number of platforms.
USB Type-C DisplayPort support is extended to 4 lanes (from 2) on a
variety of platforms, now that the QMP PHY driver supports this.
Platform specific RPMh PD constants are replaced with generic constants
wherever possible.
On X Elite the PM8010 is disabled by default, removing boot splats
on a variety of boards without this PMIC, the video clock controller is
added.
For the X Elite and X Plus CRDs, and the Lenovo Thinkpad T14s, HBR3 is
marked as valid for the external DisplayPorts. The fingerprint reader
found on the CRDs are enabled. The PCIe x8 slot on the QCP is enabled.
The two Microsoft Surface Laptop 7 gains WiFi and Bluetooth support.
GPU support is added for the X Plus SoC.
* tag 'qcom-arm64-for-6.18' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (208 commits)
arm64: dts: qcom: x1e80100: Update GPU OPP table
arm64: dts: qcom: sm8650: Drop redundant status from PMK8550 RTC
arm64: dts: qcom: add initial support for Samsung Galaxy S20
dt-bindings: arm: qcom: document x1q board binding
arm64: dts: qcom: sm8250-samsung-r8q: Move common parts to dtsi
arm64: dts: qcom: lemans-evk: Add sound card
arm64: dts: qcom: lemans: Add gpr node
arm64: dts: qcom: x1e78100-t14s-oled: Add eDP panel
arm64: dts: qcom: qcs615-ride: enable venus node to initialize video codec
arm64: dts: qcom: sm6150: add venus node to devicetree
arm64: dts: qcom: x1e80100-romulus: Add WCN7850 Wi-Fi/BT
arm64: dts: qcom: qrb2210-rb1: Enable Venus
arm64: dts: qcom: qcm2290: Add Venus video node
arm64: dts: qcom: monaco-evk: Add sound card
arm64: dts: qcom: qcs8300: Add gpr node
arm64: dts: qcom: qcs8300: Add Monaco EVK board
dt-bindings: arm: qcom: Add Monaco EVK support
arm64: dts: qcom: qcm6490-idp: Add sound card
arm64: dts: qcom: qcm6490-idp: Add WSA8830 speakers and WCD9370 headset codec
arm64: dts: qcom: qcs6490-rb3gen2: Add sound card
...
Link: https://lore.kernel.org/r/20250911233600.3033675-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Add a flag to generate ABS_PRESSURE as sum of ABS_MT_PRESSURE across
all slots.
This flag should be set if one knows a device reports true force and would
like to report total force to the userspace.
Signed-off-by: Angela Czubak <aczubak@google.com>
Co-developed-by: Jonathan Denose <jdenose@google.com>
Signed-off-by: Jonathan Denose <jdenose@google.com>
Acked-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Signed-off-by: Benjamin Tissoires <bentiss@kernel.org>
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INPUT_PROP_HAPTIC_TOUCHPAD property is to be set for a device with simple
haptic capabilities.
Signed-off-by: Angela Czubak <aczubak@google.com>
Co-developed-by: Jonathan Denose <jdenose@google.com>
Signed-off-by: Jonathan Denose <jdenose@google.com>
Acked-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Reviewed-by: Randy Dunlap <rdunlap@infradead.org>
Signed-off-by: Benjamin Tissoires <bentiss@kernel.org>
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FF_HAPTIC effect type can be used to trigger haptic feedback with HID
simple haptic usages.
Signed-off-by: Angela Czubak <aczubak@google.com>
Co-developed-by: Jonathan Denose <jdenose@google.com>
Signed-off-by: Jonathan Denose <jdenose@google.com>
Acked-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Signed-off-by: Benjamin Tissoires <bentiss@kernel.org>
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Introduce haptic usages as defined in HID Usage Tables specification.
Add HID units for newton and gram.
Signed-off-by: Angela Czubak <aczubak@google.com>
Co-developed-by: Jonathan Denose <jdenose@google.com>
Signed-off-by: Jonathan Denose <jdenose@google.com>
Signed-off-by: Benjamin Tissoires <bentiss@kernel.org>
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This commit documents the implicit RCU readers that are implied by the
this_cpu_inc() and atomic_long_inc() operations in __srcu_read_lock_fast()
and __srcu_read_unlock_fast(). While in the area, fix the documentation
of the memory pairing of atomic_long_inc() in __srcu_read_lock_fast().
[ paulmck: Apply Joel Fernandes feedback. ]
Signed-off-by: Paul E. McKenney <paulmck@kernel.org>
Cc: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>
Cc: Steven Rostedt <rostedt@goodmis.org>
Cc: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Cc: <bpf@vger.kernel.org>
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Validate extensible ioctls stricter than we do now.
Reviewed-by: Aleksa Sarai <cyphar@cyphar.com>
Reviewed-by: Jan Kara <jack@suse.cz>
Signed-off-by: Christian Brauner <brauner@kernel.org>
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Add support for Exynos7870's DSIM IP block in the bridge driver.
Signed-off-by: Kaustabh Chakraborty <kauschluss@disroot.org>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
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Presently, all devices refer to clock names from a single array. The
only controlling parameter is the number of clocks (num_clks field of
samsung_dsim_driver_data) which uses the first n clocks of that array.
As new devices are added, this approach turns out to be cumbersome.
Separate the clock names in individual arrays required by each variant,
in a struct clk_bulk_data. Add a pointer field to the driver data struct
which points to their respective clock names, and rework the clock usage
code to use the clk_bulk_* API instead.
Signed-off-by: Kaustabh Chakraborty <kauschluss@disroot.org>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
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The PLL_STABLE bit of DSIM_DPHY_STATUS is hardcoded to BIT(31), but
Exynos7870's DSIM has it in BIT(24) as per downstream kernel sources.
In order to support both, move this bit value to the driver data struct
and define it for every driver compatible. Reference the value from
there instead, in functions wherever required.
Signed-off-by: Kaustabh Chakraborty <kauschluss@disroot.org>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
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