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2021-12-27dt-bindings: phy: cadence-torrent: Rename SSC macros to use generic namesSwapnil Jakhade1-4/+4
Rename SSC macros to use generic names instead of PHY specific names, so that they can be used to specify SSC modes for both Torrent and Sierra. Renaming the macros should not affect the things as these are not being used in any DTS file yet. Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20211223060137.9252-4-sjakhade@cadence.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-12-27Merge tag 'icc-5.17-rc1' of ↵Greg Kroah-Hartman3-0/+428
git://git.kernel.org/pub/scm/linux/kernel/git/djakov/icc into char-misc-next Georgi writes: interconnect changes for 5.17 Here are the interconnect changes for the 5.17-rc1 merge window consisting of new drivers, minor changes and fixes. New drivers: - New driver for MSM8996 platforms - New driver for SC7280 EPSS L3 hardware - New driver for QCM2290 platforms - New driver for SM8450 platforms Driver changes: - dt-bindings: interconnect: Combine SDM660 bindings into RPM schema - icc-rpm: Add support for bus power domain - icc-rpm: Use NOC_QOS_MODE_INVALID for qos_mode check - icc-rpm: Define ICC device type - icc-rpm: Add QNOC type QoS support - icc-rpm: Support child NoC device probe - icc-rpm: Prevent integer overflow in rate - icc-rpmh: Add BCMs to commit list in pre_aggregate Signed-off-by: Georgi Djakov <djakov@kernel.org> * tag 'icc-5.17-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/djakov/icc: interconnect: qcom: Add QCM2290 driver support dt-bindings: interconnect: Add Qualcomm QCM2290 NoC support interconnect: icc-rpm: Support child NoC device probe interconnect: icc-rpm: Add QNOC type QoS support interconnect: icc-rpm: Define ICC device type interconnect: qcom: Add SM8450 interconnect provider driver dt-bindings: interconnect: Add Qualcomm SM8450 DT bindings interconnect: qcom: rpm: Prevent integer overflow in rate interconnect: icc-rpm: Use NOC_QOS_MODE_INVALID for qos_mode check interconnect: qcom: icc-rpmh: Add BCMs to commit list in pre_aggregate interconnect: qcom: Add MSM8996 interconnect provider driver dt-bindings: interconnect: Add Qualcomm MSM8996 DT bindings interconnect: icc-rpm: Add support for bus power domain dt-bindings: interconnect: Combine SDM660 bindings into RPM schema interconnect: qcom: Add EPSS L3 support on SC7280 dt-bindings: interconnect: Add EPSS L3 DT binding on SC7280
2021-12-23dt-bindings: gpio: Add Tegra241 supportAkhil R1-0/+42
Add the port definitions for the main and AON GPIO controllers found on Tegra241 (Grace). Signed-off-by: Akhil R <akhilrajeev@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2021-12-22Merge tag 'qcom-arm64-for-5.17-1' of ↵Arnd Bergmann1-0/+244
git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/dt Qualcomm ARM64 DeviceTree updates for v5.17 This introduces initial support for the brand new Snapdragon 8 Gen 1, aka SM8450 platform, with SMP, CPUfreq, cluster idling, low speed buses, TLMM pinctrl, SMMU, regulators, clocks, power-domains, UFS storage and USB currently supported. SDM845 adds new support for Sony Xperia XZ2, XZ2C and XZ3. The Lenovo Yoga C630 gains a few audio related fixes. The PMIC's VADC channels are described as thermal zones. OnePlus devices gains msm-id and board-id, to facilitate a single firmware image for the multiple devices. On SM8350 the Sony Xperia 1 III and 5 III, as well as initial description of Microsoft's Surface Duo 2 are introduced. On the platform side, LLCC, QUP nodes, redistributor stride and all the low-speed QUPs are added MSM8996 gained various regulator fixes, and adsp firmware name to faciliate pushing firmware to linux-firmware. Xiaomi Mi Note 2 gained touchkey controller definition. On SDM660 the Xiaomi Redmi Note 7 gained power and volume keys, RPM and regulator definitions, USB, eMMC and SD-card and a simple-framebuffer description. MSM8916 has the mmc aliases corrected, to stop the storage devices to move around and the RPM sleep stats memory is described. Support for the Samsung J5 2015 smartphone is introduced. SM6350 validation errors are fixed and and description of the audio, compute and modem remoteprocs are added. A couple new revisions of the SC7180 based Google devices are added. The SC7280 platform gains venus and a few fixes. The CRD development device is introduced, with the EC, touchscreen and touchpad. On SM8250 CPU opp-tables, for scaling L3 cache and DDR frequency based on CPU frequency, are added. As is TX, RX macros and SoundWire blocks and used to enable audio on the SM8350 MTP. * tag 'qcom-arm64-for-5.17-1' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (92 commits) arm64: dts: qcom: sm6125: Avoid using missing SM6125_VDDCX arm64: dts: qcom: sm8450-qrd: Enable USB nodes arm64: dts: qcom: sm8450: Add usb nodes arm64: dts: qcom: sm8450: add i2c13 and i2c14 device nodes arm64: dts: qcom: sm8450: add cpufreq support arm64: dts: qcom: sm8450: Add rpmhpd node arm64: dts: qcom: sm8450-qrd: enable ufs nodes arm64: dts: qcom: sm8450: add ufs nodes arm64: dts: qcom: sm8450-qrd: Add rpmh regulator nodes arm64: dts: qcom: Add base SM8450 QRD DTS arm64: dts: qcom: sm8450: add smmu nodes arm64: dts: qcom: sm8450: Add reserved memory nodes arm64: dts: qcom: sm8450: Add tlmm nodes arm64: dts: qcom: Add base SM8450 DTSI arm64: dts: qcom: ipq6018: Fix gpio-ranges property arm64: dts: qcom: sdm845: add QFPROM chipset specific compatible arm64: dts: qcom: sdm845: mtp: Add vadc channels and thermal zones arm64: dts: qcom: pm8998: Add ADC Thermal Monitor node arm64: qcom: dts: drop legacy property #stream-id-cells Revert "arm64: dts: qcom: sm8350: Specify clock-frequency for arch timer" ... Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-12-22clk: ti: Move dra7 clock devices out of the legacy sectionTony Lindgren1-7/+7
I accidentally added some dra7 clock defines to the legacy section that we want to stop using. Let's move the defines to the right location. Note that this is just a cosmetic fix. Cc: linux-clk@vger.kernel.org Cc: Stephen Boyd <sboyd@kernel.org> Cc: Tero Kristo <kristo@kernel.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-12-21Merge tag 'qcom-dts-for-5.17' of ↵Arnd Bergmann1-0/+122
git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/dt Qualcomm DeviceTree updates for v5.17 To SDX55 this introduces the description of the IPA, PCIe PHY and PCIe endpoint controller, as well as enables these for the FN960 device. The SDX65 5G platform is introduced, currently with definitions necessary to boot to a shell. The undocumented property "input-name" is dropped throughout the dts files, dwc3 nodes throughout gains more specific compatibles and lastly building of the Dragonboard 410c DTB on ARM32 is enabled, in addition to its normal operation in 64-bit mode. * tag 'qcom-dts-for-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: ARM: dts: qcom: Drop input-name property ARM: dts: qcom: sdx65: Add pincontrol node ARM: dts: qcom: Add SDX65 platform and MTP board support dt-bindings: arm: qcom: Document SDX65 platform and boards dt-bindings: clock: Add SDX65 GCC clock bindings ARM: dts: qcom: Build apq8016-sbc/DragonBoard 410c DTB on ARM32 ARM: dts: qcom: sdx55-t55: Enable IPA ARM: dts: qcom: sdx55-fn980: Enable IPA ARM: dts: qcom: sdx55-fn980: Enable PCIe EP ARM: dts: qcom: sdx55: Add support for PCIe EP ARM: dts: qcom: sdx55-fn980: Enable PCIE0 PHY ARM: dts: qcom: sdx55: Add support for PCIe PHY ARM: dts: qcom: update USB nodes with new platform specific compatible Link: https://lore.kernel.org/r/20211221042154.3621955-1-bjorn.andersson@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-12-21Merge tag 'qcom-drivers-for-5.17' of ↵Arnd Bergmann1-0/+33
git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/drivers Qualcomm driver updates for v5.17 This introduces RPM power-domain support for the SM8450, SM6125 and QCM2290 platforms. It them clean up the platform-based naming of the resources definitions throughout the RPMh PD driver. The last-level cache controller driver gains SM8350 support. The RPM sleep stats driver gains support for several older systems that had a slightly different memory layout for this information. The socinfo gains SM8450, SM6350 and SM7227 definitions. In addition to the DeviceTree binding updates related to these changes new compatibles was added to describe the SM8450 and the Kryo 780 CPU. Lastly a few typo and style fixes are introduced. * tag 'qcom-drivers-for-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (27 commits) soc: qcom: rpmh-rsc: Fix typo in a comment soc: qcom: socinfo: Add SM6350 and SM7225 dt-bindings: arm: msm: Don't mark LLCC interrupt as required dt-bindings: firmware: scm: Add SM6350 compatible dt-bindings: arm: msm: Add LLCC for SM6350 soc: qcom: rpmhpd: Sort power-domain definitions and lists soc: qcom: rpmhpd: Remove mx/cx relationship on sc7280 soc: qcom: rpmhpd: Rename rpmhpd struct names soc: qcom: rpmhpd: sm8450: Add the missing .peer for sm8450_cx_ao soc: qcom: socinfo: add SM8450 ID soc: qcom: rpmhpd: Add SM8450 power domains dt-bindings: power: rpmpd: Add SM8450 to rpmpd binding soc: qcom: smem: Update max processor count dt-bindings: arm: qcom: Document SM8450 SoC and boards dt-bindings: firmware: scm: Add SM8450 compatible dt-bindings: arm: cpus: Add kryo780 compatible soc: qcom: rpmpd: Add support for sm6125 dt-bindings: qcom-rpmpd: Add sm6125 power domains soc: qcom: aoss: constify static struct thermal_cooling_device_ops PM: AVS: qcom-cpr: Use div64_ul instead of do_div ... Link: https://lore.kernel.org/r/20211221040452.3620633-1-bjorn.andersson@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-12-21dt-bindings: power: rpmpd: Add SM8450 to rpmpd bindingDmitry Baryshkov1-0/+15
Add compatible and constants for the power domains exposed by the RPMH in the Qualcomm SM8450 platform. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211201072745.3969077-6-vkoul@kernel.org
2021-12-21dt-bindings: qcom-rpmpd: Add sm6125 power domainsMartin Botka1-0/+8
Add dt-bindings for sm6125 SoC RPM Power Domains Signed-off-by: Martin Botka <martin.botka@somainline.org> [bjorn: Added compatible to binding as well] Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211130212332.25401-1-martin.botka@somainline.org
2021-12-20Merge tag 'samsung-dt64-5.17' of ↵Arnd Bergmann2-1/+29
git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt Samsung DTS ARM64 changes for v5.17 1. Add bindings for: Exynos USI, Samsung Galaxy A8 (2018) board, WinLink E850-96 board and WinLink vendor prefix. 2. Add pinctrl definitions used for Exynos850. 3. Minor fixes and improvements. 4. Convert serial on ExynosAutov9 to new hierarchy where serial is part of USI node. * tag 'samsung-dt64-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: dt-bindings: pinctrl: samsung: Add pin drive definitions for Exynos850 dt-bindings: arm: samsung: Document E850-96 board binding dt-bindings: Add vendor prefix for WinLink dt-bindings: arm: samsung: document jackpotlte board binding dt-bindings: soc: samsung: Fix I2C clocks order in USI binding example arm64: dts: exynos: convert serial_0 to USI on ExynosAutov9 dt-bindings: soc: samsung: Add Exynos USI bindings arm64: dts: exynos: Rename hsi2c nodes to i2c for Exynos5433 and Exynos7 Link: https://lore.kernel.org/r/20211220115530.30961-2-krzysztof.kozlowski@canonical.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-12-20Merge tag 'imx-dt64-5.17' of ↵Arnd Bergmann1-0/+26
git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt i.MX arm64 device tree change for 5.17: - New SoC support: i.MX8 ULP. - New board support: i.MX8MM/MN based TQMa8Mx boards, iMX8MN BSH SMM S2, i.MX8 ULP EVK. - A series from Adam Ford to enable Camera and USB support for imx8mm-beacon device. - Add overlays for various serdes protocols on LS1028A QDS board using different PHY cards. - A series from Biwen Li to update LS1028A devices around RTC, flextimer and PWM support. - A series from Joakim Zhang to update ENET/FEC suppport on i.MX8M devices. - A couple of changes from Lucas Stach to update nitrogen8-som Ethernet PHY and I2C1 pad configuration. - A series from Martin Kepplinger to split out a shared imx8mq-librem5-r3 dtsi for Librem5 devices. - Add cache descriptions for i.MX8 SoCs. - A series from Vladimir Oltean to update ls1028a-rdb device tree in order to share the DTS between Linux and U-Boot. - Random device addtion to various i.MX8 and LX2160A based devices. * tag 'imx-dt64-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (56 commits) arm64: dts: imx8mp-evk: configure multiple queues on eqos arm64: dts: ls1028a-qds: add overlays for various serdes protocols arm64: dts: ls1028a-qds: enable lpuart1 arm64: dts: ls1028a-qds: move rtc node to the correct i2c bus arm64: dts: ls1028a-rdb: enable pwm0 arm64: dts: ls1028a: add flextimer based pwm nodes arm64: dts: ls1028a: add ftm_alarm1 node to be used as wakeup source arm64: dts: ls1028a: Add PCIe EP nodes arm64: dts: lx2162a-qds: add interrupt line for RTC node arm64: dts: lx2162a-qds: support SD UHS-I and eMMC HS400 modes arm64: dts: lx2160a: enable usb3-lpm-capable for usb3 nodes arm64: dts: lx2160a-qds: Add mdio mux nodes arm64: dts: lx2160a: add optee-tz node arm64: dts: lx2160a-rdb: Add Inphi PHY node arm64: dts: imx8mm: don't assign PLL2 in SoC dtsi arm64: dts: nitrogen8-som: correct i2c1 pad-ctrl arm64: dts: nitrogen8-som: correct network PHY reset arm64: dts: imx8mn-bsh-smm-s2/pro: Add iMX8MN BSH SMM S2 boards arm64: dts: imx8mm/n: Remove the 'pm-ignore-notify' property arm64: dts: imx8ulp: add power domain entry for usdhc ... Link: https://lore.kernel.org/r/20211218071427.26745-5-shawnguo@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-12-20Merge tag 'ti-k3-dt-for-v5.17' of ↵Arnd Bergmann1-0/+3
git://git.kernel.org/pub/scm/linux/kernel/git/ti/linux into arm/dt Devicetree changes for TI K3 platforms for v5.17 merge window: * New Platforms: - J721s2 SoC, SoM and Common Processor Board support * New features: - CAN support on AM64 EVM and SK - TimeSync Router on AM64 * Fixes: - Correct d-cache-sets info on J7200 - Fix L2 cache-sets value for J721e/J7200/AM64 - Fixes for dtbs_check warnings wrt serdes_ln_ctrl node on J721e/J7200 - Disable McASP on IoT2050 board to fix dtbs_check warnings * tag 'ti-k3-dt-for-v5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/ti/linux: arch: arm64: ti: Add support J721S2 Common Processor Board arm64: dts: ti: Add initial support for J721S2 System on Module arm64: dts: ti: Add initial support for J721S2 SoC dt-bindings: pinctrl: k3: Introduce pinmux definitions for J721S2 dt-bindings: arm: ti: Add bindings for J721s2 SoC arm64: dts: ti: iot2050: Disable mcasp nodes at dtsi level arm64: dts: ti: k3-am642-evm/sk: Add support for main domain mcan nodes in EVM and disable them on SK arm64: dts: ti: k3-am64-main: Add support for MCAN arm64: dts: ti: k3-j721e-common-proc-board: Add support for mcu and main mcan nodes arm64: dts: ti: k3-j721e: Add support for MCAN nodes arm64: dts: ti: am654-base-board/am65-iot2050-common: Disable mcan nodes arm64: dts: ti: k3-am65-mcu: Add Support for MCAN arm64: dts: ti: k3-am64-main: add timesync router node arm64: dts: ti: k3-j7200: Correct the d-cache-sets info arm64: dts: ti: k3-j721e: Fix the L2 cache sets arm64: dts: ti: k3-j7200: Fix the L2 cache sets arm64: dts: ti: k3-am642: Fix the L2 cache sets arm64: dts: ti: j721e-main: Fix 'dtbs_check' in serdes_ln_ctrl node arm64: dts: ti: j7200-main: Fix 'dtbs_check' serdes_ln_ctrl node arm64: dts: ti: k3-j721e: correct cache-sets info Link: https://lore.kernel.org/r/20211217172806.10023-2-vigneshr@ti.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-12-20dt-bindings: gpio: msc313: Add offsets for ssd20xdDaniel Palmer1-0/+71
Add the gpio offsets for the SSD201 and SSD202D chips. Signed-off-by: Daniel Palmer <daniel@0x0f.com> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2021-12-20Merge tag 'tegra-for-5.17-dt-bindings' of ↵Arnd Bergmann3-5/+65
git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt dt-bindings: Changes for v5.17-rc1 This contains a bunch of json-schema conversions for various Tegra- related DT bindings and additions for new SoC and board support. * tag 'tegra-for-5.17-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: (30 commits) media: dt: bindings: tegra-vde: Document OPP and power domain media: dt: bindings: tegra-vde: Convert to schema dt-bindings: host1x: Document Memory Client resets of Host1x, GR2D and GR3D dt-bindings: host1x: Document OPP and power domain properties dt-bindings: clock: tegra-car: Document new clock sub-nodes dt-bindings: ARM: tegra: Document Pegatron Chagall dt-bindings: ARM: tegra: Document ASUS Transformers dt-bindings: usb: tegra-xudc: Document interconnects and iommus properties dt-bindings: serial: Document Tegra234 TCU dt-bindings: serial: tegra-tcu: Convert to json-schema dt-bindings: thermal: tegra186-bpmp: Convert to json-schema dt-bindings: firmware: tegra: Convert to json-schema dt-bindings: tegra: pmc: Convert to json-schema dt-bindings: serial: 8250: Document Tegra234 UART dt-bindings: mmc: tegra: Document Tegra234 SDHCI dt-bindings: fuse: tegra: Document Tegra234 FUSE dt-bindings: fuse: tegra: Convert to json-schema dt-bindings: rtc: tegra: Document Tegra234 RTC dt-bindings: rtc: tegra: Convert to json-schema dt-bindings: mailbox: tegra: Document Tegra234 HSP ... Link: https://lore.kernel.org/r/20211217162253.1801077-3-thierry.reding@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-12-20Merge tag 'samsung-drivers-5.17' of ↵Arnd Bergmann1-0/+17
git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/drivers Samsung SoC drivers changes for v5.17 1. Exynos ChipID: add Exynos7885 support. 2. Exynos PMU: add Exynos850 support. 3. Minor bindings cleanup. 4. Add Exynos USIv2 (Universal Serial Interface) driver. The USI block is a shared IP block between I2C, UART/serial and SPI. Basically one has to choose which feature the USI block will support and later the regular I2C/serial/SPI driver will bind and work. This merges also one commit with dt-binding headers from my dts64 pull request. Together with a future serial driver change, this will break the ABI. Affected: Serial on ExynosAutov9 SADK and out-of-tree ExynosAutov9 boards Why: To properly and efficiently support the USI with new hierarchy of USI-{serial,SPI,I2C} devicetree nodes. Rationale: Recently added serial and USI support was short-sighted and did not allow to smooth support of other features (SPI and I2C). Adding support for USI-SPI and USI-I2C would effect in code duplication. Adding support for different USI versions (currently supported is USIv2 but support for v1 is planned) would cause even more code duplication and create a solution difficult to maintain. Since USI-serial and ExynosAutov9 have been added recently, are considered fresh development features and there are no supported products using them, the code/solution is being refactored in non-backwards compatible way. The compatibility is not broken yet. It will be when serial driver changes are accepted. The ABI break was discussed with only known users of ExynosAutov9 and received their permission. * tag 'samsung-drivers-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: dt-bindings: soc: samsung: keep SoC driver bindings together soc: samsung: Add USI driver dt-bindings: soc: samsung: Add Exynos USI bindings soc: samsung: exynos-pmu: Add Exynos850 support dt-bindings: samsung: pmu: Document Exynos850 soc: samsung: exynos-chipid: add Exynos7885 SoC support soc: samsung: exynos-chipid: describe which SoCs go with compatibles Link: https://lore.kernel.org/r/20211220115405.30434-2-krzysztof.kozlowski@canonical.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-12-20Merge tag 'imx-drivers-5.17' of ↵Arnd Bergmann1-0/+5
git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/drivers i.MX drivers update for 5.17: - A number of patches from Adam Ford to update gpcv2 and blk-ctrl driver to keep i.MX8MM VPU-H1 and i.MX8MN GPUMIX bus clocks active, and add i.MX8MN display related domain support. - Add optional continuous burst clock support for imx-weim bus driver. - Call pm_runtime_put_sync_suspend() instead of pm_runtime_put() in gpcv2 driver to prevent a sequence issue seen with i.MX8MM GPU and MIX domain. * tag 'imx-drivers-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: soc: imx: imx8m-blk-ctrl: add i.MX8MN DISP blk-ctrl dt-bindings: power: imx8mn: add defines for DISP blk-ctrl domains soc: imx: gpcv2: Add dispmix and mipi domains to imx8mn soc: imx: gpcv2: keep i.MX8MN gpumix bus clock enabled bus: imx-weim: optionally enable continuous burst clock soc: imx: gpcv2: keep i.MX8MM VPU-H1 bus clock active soc: imx: gpcv2: Synchronously suspend MIX domains Link: https://lore.kernel.org/r/20211218071427.26745-1-shawnguo@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-12-20ASoC: tlv320adc3xxx: New codec bindingsRicard Wanderlof1-0/+28
DT bindings for Texas Instruments TLV320ADC3001 and TLV320ADC3101 audio ADCs. Signed-off-by: Ricard Wanderlof <ricardw@axis.com> Link: https://lore.kernel.org/r/alpine.DEB.2.21.2112151759170.27889@lap5cg0092dnk.se.axis.com Signed-off-by: Mark Brown <broonie@kernel.org>
2021-12-20dt-bindings: pinctrl: samsung: Add pin drive definitions for Exynos850Sam Protsenko1-1/+12
All Exynos850 GPIO blocks can use EXYNOS5420_PIN_DRV* definitions, except GPIO_HSI block. Add pin drive strength definitions for GPIO_HSI block correspondingly. Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20211217161549.24836-6-semen.protsenko@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-12-20dt-bindings: clock: Add bindings definitions for Exynos7885 CMUDavid Virag1-0/+115
Just like on Exynos850, the clock controller driver is designed to have separate instances for each particular CMU, so clock IDs start from 1 for each CMU in this bindings header too. Signed-off-by: David Virag <virag.david003@gmail.com> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20211206153124.427102-2-virag.david003@gmail.com
2021-12-20dt-bindings: clock: Add bindings for Exynos850 sysreg clocksSam Protsenko1-3/+9
System Register is used to configure system behavior, like USI protocol, etc. SYSREG clocks should be provided to corresponding syscon nodes, to make it possible to modify SYSREG registers. While at it, add also missing PMU and GPIO clocks, which looks necessary and might be needed for corresponding Exynos850 features soon. Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Chanwoo Choi <cw00.choi@samsung.com> Link: https://lore.kernel.org/r/20211217161549.24836-2-semen.protsenko@linaro.org
2021-12-17Merge tag 'renesas-arm-dt-for-v5.17-tag2' of ↵Arnd Bergmann2-0/+94
git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt Renesas ARM DT updates for v5.17 (take two) - Initial support for the R-Car S4-8 SoC on the Spider CPU and BreakOut boards, - MIPI DSI display support for the R-Car V3u SoC and the Falcon board stack, - Thermal and GPU support for the RZ/G2L SoC and the RZ/G2L SMARC EVK development board, - Miscellaneous fixes and improvements. * tag 'renesas-arm-dt-for-v5.17-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: arm64: dts: renesas: Fix pin controller node names arm64: dts: renesas: rzg2l-smarc-som: Add vdd core regulator arm64: dts: renesas: r9a07g044: Add Mali-G31 GPU node arm64: dts: renesas: r9a07g044: Create thermal zone to support IPA arm64: dts: renesas: r9a07g044: Add TSU node arm64: dts: renesas: falcon-cpu: Add DSI display output arm64: dts: renesas: r8a779a0: Add DSI encoders arm64: dts: renesas: Add Renesas Spider boards support arm64: dts: renesas: Add Renesas R8A779F0 SoC support dt-bindings: clock: Add r8a779f0 CPG Core Clock Definitions dt-bindings: power: Add r8a779f0 SYSC power domain definitions arm64: dts: renesas: Fix thermal bindings Link: https://lore.kernel.org/r/cover.1639736718.git.geert+renesas@glider.be Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-12-17dt-bindings: gpio: Add Tegra234 supportPrathamesh Shete1-0/+63
Extend the existing Tegra186 GPIO controller device tree bindings with support for the GPIO controller found on Tegra234. The number of pins is slightly different, but the programming model remains the same. Signed-off-by: Prathamesh Shete <pshete@nvidia.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> [treding@nvidia.com: update device tree bindings] Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2021-12-17dt-bindings: power: imx8mn: add defines for DISP blk-ctrl domainsAdam Ford1-0/+5
This adds the defines for the power domains provided by the DISP blk-ctrl. Signed-off-by: Adam Ford <aford173@gmail.com> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-12-16dt-bindings: clk: qcom: Document MSM8976 Global Clock ControllerMarijn Suijten1-0/+240
Document the required properties and firmware clocks for gcc-msm8976 to operate nominally, and add header definitions for referencing the clocks from firmware. Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211208091036.132334-2-marijn.suijten@somainline.org
2021-12-16Merge tag '20211207114003.100693-2-vkoul@kernel.org' into clk-for-5.17Bjorn Andersson1-0/+244
v5.16-rc1 + 20211207114003.100693-2-vkoul@kernel.org The immutable branch contains the DT binding and clock defines as need for the Qualcomm SM8450 global clock controller driver.
2021-12-16dt-bindings: pinctrl: Add StarFive pinctrl definitionsEmil Renner Berthing1-0/+275
Add definitons for pins and GPIO input, output and output enable signals on the StarFive JH7100 SoC. Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
2021-12-16dt-bindings: reset: Add StarFive JH7100 reset definitionsGeert Uytterhoeven1-0/+126
Add all resets for the StarFive JH7100 reset controller. Based on work by Ahmad Fatoum for Barebox, with "JH7100_" prefixes added to all definitions. Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
2021-12-16dt-bindings: clock: starfive: Add JH7100 clock definitionsGeert Uytterhoeven1-0/+202
Add all clock outputs for the StarFive JH7100 clock generator. Based on work by Ahmad Fatoum for Barebox, with "JH7100_" prefixes added to all definitions. Acked-by: Rob Herring <robh@kernel.org> Acked-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
2021-12-16dt-bindings: memory: tegra: Add Tegra234 supportThierry Reding2-0/+41
Document the variant of the memory controller and external memory controllers found on Tegra234 and add some memory client and SMMU stream ID definitions for use in device tree files. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16dt-bindings: Update headers for Tegra234Mikko Perttunen2-5/+24
Add a few more clocks that will be used in follow-up patches to enable more functionality on Tegra234. Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-15Merge branch 'icc-qcm2290' into icc-nextGeorgi Djakov1-0/+94
Add support for QCM2290 including a few prep changes. * icc-qcm2290 interconnect: icc-rpm: Define ICC device type interconnect: icc-rpm: Add QNOC type QoS support interconnect: icc-rpm: Support child NoC device probe dt-bindings: interconnect: Add Qualcomm QCM2290 NoC support interconnect: qcom: Add QCM2290 driver support Link: https://lore.kernel.org/r/20211215002324.1727-1-shawn.guo@linaro.org Signed-off-by: Georgi Djakov <djakov@kernel.org>
2021-12-15dt-bindings: interconnect: Add Qualcomm QCM2290 NoC supportShawn Guo1-0/+94
Add bindings for Qualcomm QCM2290 Network-On-Chip interconnect devices. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20211215002324.1727-5-shawn.guo@linaro.org Signed-off-by: Georgi Djakov <djakov@kernel.org>
2021-12-15dt-bindings: clock: Add SM8450 GCC clock bindingsVinod Koul1-0/+244
Add device tree bindings for global clock controller on SM8450 SoCs. Signed-off-by: Vinod Koul <vkoul@kernel.org> Reviewed-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211207114003.100693-2-vkoul@kernel.org
2021-12-15dt-bindings: clock: Add SDX65 GCC clock bindingsVamsi krishna Lanka1-0/+122
Add device tree bindings for global clock controller on SDX65 SOCs. Signed-off-by: Vamsi Krishna Lanka <quic_vamslank@quicinc.com> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/e15509b2b7c9b600ab38c5269d4fac609c077b5b.1638861860.git.quic_vamslank@quicinc.com
2021-12-15Merge branch 'icc-sm8450' into icc-nextGeorgi Djakov1-0/+171
This add device tree binding and driver for interconnect providers found in SM8450 SoC. * icc-sm8450 dt-bindings: interconnect: Add Qualcomm SM8450 DT bindings interconnect: qcom: Add SM8450 interconnect provider driver Link: https://lore.kernel.org/r/20211209084842.189627-1-vkoul@kernel.org Signed-off-by: Georgi Djakov <djakov@kernel.org>
2021-12-15dt-bindings: interconnect: Add Qualcomm SM8450 DT bindingsVinod Koul1-0/+171
The Qualcomm SM8450 SoC has several bus fabrics that could be controlled and tuned dynamically according to the bandwidth demand Signed-off-by: Vinod Koul <vkoul@kernel.org> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20211209084842.189627-2-vkoul@kernel.org Signed-off-by: Georgi Djakov <djakov@kernel.org>
2021-12-14dt-bindings: phy: phy-imx8-pcie: Add binding for the pad modes of imx8 pcie phyRichard Zhu1-0/+14
Add binding for reference clock PAD modes of the i.MX8 PCIe PHY. Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com> Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Tim Harvey <tharvey@gateworks.com> Tested-by: Tim Harvey <tharvey@gateworks.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/1638432158-4119-2-git-send-email-hongxing.zhu@nxp.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-12-14dt-bindings: power: imx8ulp: add power domain header filePeng Fan1-0/+26
Add i.MX8ULP power domain header file Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-12-13dt-bindings: pinctrl: k3: Introduce pinmux definitions for J721S2Aswath Govindraju1-0/+3
Add pinctrl macros for J721S2 SoC. These macro definitions are similar to that of J721E, but adding new definitions to avoid any naming confusions in the soc dts files. checkpatch insists the following error exists: ERROR: Macros with complex values should be enclosed in parentheses However, we do not need parentheses enclosing the values for this macro as we do intend it to generate two separate values as has been done for other similar platforms. Signed-off-by: Aswath Govindraju <a-govindraju@ti.com> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by: Kishon Vijay Abraham I <kishon@ti.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20211207080904.14324-3-a-govindraju@ti.com
2021-12-13dt-bindings: soc: samsung: Add Exynos USI bindingsSam Protsenko1-0/+17
Add constants for choosing USIv2 configuration mode in device tree. Those are further used in USI driver to figure out which value to write into SW_CONF register. Also document USIv2 IP-core bindings. Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20211204195757.8600-2-semen.protsenko@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-12-12dt-bindings: iio: add AD74413RCosmin Tanislav1-0/+21
The AD74412R and AD74413R are quad-channel, software configurable, input/output solutions for building and process control applications. They contain functionality for analog output, analog input, digital input, resistance temperature detector, and thermocouple measurements integrated into a single chip solution with an SPI interface. The devices feature a 16-bit ADC and four configurable 13-bit DACs to provide four configurable input/output channels and a suite of diagnostic functions. The AD74413R differentiates itself from the AD74412R by being HART-compatible. Signed-off-by: Cosmin Tanislav <cosmin.tanislav@analog.com> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20211205114045.173612-3-cosmin.tanislav@analog.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2021-12-08dt-bindings: clock: lan966x: Extend includes with clock gatesHoratiu Vultur1-1/+7
On lan966x it is allow to control the clock to some peripherals like USB. So extend the include file with these clocks. Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20211103085102.1656081-4-horatiu.vultur@microchip.com
2021-12-08dt-bindings: clock: lan966x: Add binding includes for lan966x SoC clock IDsKavyasree Kotagiri1-0/+28
LAN966X supports 14 clock outputs for its peripherals. This include file is introduced to use identifiers for clocks. Signed-off-by: Kavyasree Kotagiri <kavyasree.kotagiri@microchip.com> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20211103061935.25677-2-kavyasree.kotagiri@microchip.com
2021-12-07dt-bindings: clock: Add r8a779f0 CPG Core Clock DefinitionsYoshihiro Shimoda1-0/+64
Add all Clock Pulse Generator Core Clock Outputs for the Renesas R-Car S4-8 (R8A779F0) SoC. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20211201073308.1003945-4-yoshihiro.shimoda.uh@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-12-07dt-bindings: power: Add r8a779f0 SYSC power domain definitionsYoshihiro Shimoda1-0/+30
Add power domain indices for R-Car S4-8 (r8a779f0). Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20211201073308.1003945-3-yoshihiro.shimoda.uh@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-11-25ASoC: rt5640: Add the binding include file for the HDA header supportOder Chiou1-0/+1
The patch adds the binding include file for the HDA header support. Signed-off-by: Oder Chiou <oder_chiou@realtek.com> Link: https://lore.kernel.org/r/20211125055812.8911-1-oder_chiou@realtek.com Signed-off-by: Mark Brown <broonie@kernel.org>
2021-11-23dt-bindings: clock: sunxi: Export CLK_DRAM for devfreqSamuel Holland2-2/+2
The MBUS node needs to reference the CLK_DRAM clock, as the MBUS hardware implements memory dynamic frequency scaling using this clock. Export this clock for SoCs which will be getting a devfreq driver. Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com> Signed-off-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/20211118031841.42315-2-samuel@sholland.org
2021-11-23dt-bindings: clk: Add compatibles for D1 CCUsSamuel Holland4-0/+268
The D1 has a CCU and a R_CCU (PRCM CCU) like most other sunxi SoCs, with 3 and 4 clock inputs, respectively. Add the compatibles and bindings. Signed-off-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/20211119043545.4010-2-samuel@sholland.org
2021-11-23dt-bindings: phy: Add constants for lan966x serdesHoratiu Vultur1-0/+14
Lan966x has: 2 integrated PHYs, 3 SerDes and 2 RGMII interfaces. Which requires to be muxed based on the HW representation. So add constants for each interface to be able to distinguish them. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com> Link: https://lore.kernel.org/r/20211116100818.1615762-3-horatiu.vultur@microchip.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-11-22dt-bindings: interconnect: Add Qualcomm MSM8996 DT bindingsYassine Oudjana1-0/+163
Add bindings for interconnects on Qualcomm MSM8996. Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Tested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> #db820c Link: https://lore.kernel.org/r/20211021132329.234942-4-y.oudjana@protonmail.com Signed-off-by: Georgi Djakov <djakov@kernel.org>
generated by cgit v1.2.3 (git 2.39.0) at 2025-10-03 10:52:36 +0300