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2022-01-14Merge tag 'char-misc-5.17-rc1' of ↵Linus Torvalds8-4/+504
git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc Pull char/misc and other driver updates from Greg KH: "Here is the large set of char, misc, and other "small" driver subsystem changes for 5.17-rc1. Lots of different things are in here for char/misc drivers such as: - habanalabs driver updates - mei driver updates - lkdtm driver updates - vmw_vmci driver updates - android binder driver updates - other small char/misc driver updates Also smaller driver subsystems have also been updated, including: - fpga subsystem updates - iio subsystem updates - soundwire subsystem updates - extcon subsystem updates - gnss subsystem updates - phy subsystem updates - coresight subsystem updates - firmware subsystem updates - comedi subsystem updates - mhi subsystem updates - speakup subsystem updates - rapidio subsystem updates - spmi subsystem updates - virtual driver updates - counter subsystem updates Too many individual changes to summarize, the shortlog contains the full details. All of these have been in linux-next for a while with no reported issues" * tag 'char-misc-5.17-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (406 commits) counter: 104-quad-8: Fix use-after-free by quad8_irq_handler dt-bindings: mux: Document mux-states property dt-bindings: ti-serdes-mux: Add defines for J721S2 SoC counter: remove old and now unused registration API counter: ti-eqep: Convert to new counter registration counter: stm32-lptimer-cnt: Convert to new counter registration counter: stm32-timer-cnt: Convert to new counter registration counter: microchip-tcb-capture: Convert to new counter registration counter: ftm-quaddec: Convert to new counter registration counter: intel-qep: Convert to new counter registration counter: interrupt-cnt: Convert to new counter registration counter: 104-quad-8: Convert to new counter registration counter: Update documentation for new counter registration functions counter: Provide alternative counter registration functions counter: stm32-timer-cnt: Convert to counter_priv() wrapper counter: stm32-lptimer-cnt: Convert to counter_priv() wrapper counter: ti-eqep: Convert to counter_priv() wrapper counter: ftm-quaddec: Convert to counter_priv() wrapper counter: intel-qep: Convert to counter_priv() wrapper counter: microchip-tcb-capture: Convert to counter_priv() wrapper ...
2022-01-14Merge tag 'sound-5.17-rc1' of ↵Linus Torvalds2-0/+29
git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound Pull sound updates from Takashi Iwai: "It's a relatively calm development cycle, but still lots of updates in the driver side like Intel SOF. Below are some highlights: ALSA / ASoC core: - A new kselftest for ALSA control API - PCM NO_REWINDS support - Potential race fixes around control removals - Unify x86 SG-buffer memory allocation code - Cleanups and race fixes for ASoC DPCM locking ASoC: - Refinements and cleanups around the delay() APIs - Wider use of dev_err_probe(). - Continuing cleanups and improvements to the SOF code - Support for pin switches in simple-card derived cards - Support for AMD Renoir ACP, Asahi Kasei Microdevices AKM4375, Intel systems using NAU8825 and MAX98390, Mediatek MT8915, nVidia Tegra20 S/PDIF, Qualcomm systems using ALC5682I-VS and Texas Instruments TLV320ADC3xxx HD-audio / USB-audio: - Fix deadlock at HD-audio codec unbinding - Fixes for Tegra194 HD-audio, new HDA support for CS35L41 codec - Quirks for Lenovo and HP machines, Gigabyte mobo, Bose device Misc: - Fix virmidi drain behavior Note that the merge of CS35L41 codec support is still half-baked, and at least one ACPI change is missing. Although this won't hinder the kernel build itself, we're going to catch up before RC1" * tag 'sound-5.17-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound: (415 commits) ALSA: hda: intel-dsp-config: reorder the config table ALSA: hda: intel-dsp-config: add JasperLake support ALSA: hda: cs35l41: fix double free on error in probe() ALSA: hda: Fix dependencies of CS35L41 on SPI/I2C buses ALSA: hda: Fix dependency on ASoC cs35l41 codec ASoC: cs35l41: Add support for hibernate memory retention mode ASoC: cs35l41: Update handling of test key registers ALSA: intel_hdmi: Check for error num after setting mask ASoC: wcd9335: Keep a RX port value for each SLIM RX mux ASoC: amd: acp: acp-mach: Change default RT1019 amp dev id ALSA: virmidi: Remove duplicated code ALSA: seq: virmidi: Add a drain operation ASoC: topology: Fix typo ASoC: fsl_asrc: refine the check of available clock divider ASoC: Intel: bytcr_rt5640: Add support for external GPIO jack-detect ASoC: Intel: bytcr_rt5640: Support retrieving the codec IRQ from the AMCR0F28 ACPI dev ASoC: rt5640: Add support for boards with an external jack-detect GPIO ASoC: rt5640: Allow snd_soc_component_set_jack() to override the codec IRQ ASoC: rt5640: Change jack_work to a delayed_work ASoC: rt5640: Fix possible NULL pointer deref on resume ...
2022-01-13Merge tag 'mailbox-v5.17' of ↵Linus Torvalds1-0/+2
git://git.linaro.org/landing-teams/working/fujitsu/integration Pull mailbox updates from Jassi Brar: - qcom: misc updates to qcom-ipcc driver - mpfs: change compatible string - pcc: - fix handling of subtypes - avoid uninitialized variable - mtk: - add missing of_node_put - enable control_by_sw - silent probe-defer prints - fix gce_num for mt8192 - zynq: add missing of_node_put - imx: check for NULL instead of IS_ERR - appple: switch to generic compatibles - hi3660: convert comments to kernel-doc notation * tag 'mailbox-v5.17' of git://git.linaro.org/landing-teams/working/fujitsu/integration: dt-bindings: mailbox: Add more protocol and client ID mailbox: qcom-ipcc: Support interrupt wake up from suspend mailbox: qcom-ipcc: Support more IPCC instance mailbox: qcom-ipcc: Dynamic alloc for channel arrangement mailbox: change mailbox-mpfs compatible string mailbox: pcc: Handle all PCC subtypes correctly in pcc_mbox_irq mailbox: pcc: Avoid using the uninitialized variable 'dev' mailbox: mtk: add missing of_node_put before return mailbox: zynq: add missing of_node_put before return mailbox: imx: Fix an IS_ERR() vs NULL bug mailbox: hi3660: convert struct comments to kernel-doc notation mailbox: add control_by_sw for mt8195 mailbox: mtk-cmdq: Silent EPROBE_DEFER errors for clks mailbox: fix gce_num of mt8192 driver data mailbox: apple: Bind to generic compatibles dt-bindings: mailbox: apple,mailbox: Add generic and t6000 compatibles
2022-01-13Merge tag 'clk-for-linus' of ↵Linus Torvalds16-5/+1109
git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux Pull clk updates from Stephen Boyd: "We have a couple patches in the framework core this time around but they're mostly minor cleanups and some debugfs stuff. The real work that's in here is the typical pile of clk driver updates and new SoC support. Per usual (or maybe just recent trends), Qualcomm gains a handful of SoC drivers additions and has the largest diffstat. After that there are quite a few updates to the Allwinner (sunxi) drivers to support modular drivers and Renesas is heavily updated to add more support for various clks. Overall it looks pretty normal. New Drivers: - Add MDMA and BDMA clks to Ingenic JZ4760 and JZ4770 - MediaTek mt7986 SoC basic support - Clock and reset driver for Toshiba Visconti SoCs - Initial clock driver for the Exynos7885 SoC (Samsung Galaxy A8) - Allwinner D1 clks - Lan966x Generic Clock Controller driver and associated DT bindings - Qualcomm SDX65, SM8450, and MSM8976 GCC clks - Qualcomm SDX65 and SM8450 RPMh clks Updates: - Set suppress_bind_attrs to true for i.MX8ULP driver - Switch from do_div to div64_ul for throughout all i.MX drivers - Fix imx8mn_clko1_sels for i.MX8MN - Remove unused IPG_AUDIO_ROOT from i.MX8MP - Switch parent for audio_root_clk to audio ahb in i.MX8MP driver - Removal of all remaining uses of __clk_lookup() in drivers/clk/samsung - Refactoring of the CPU clocks registration to use common interface - An update of the Exynos850 driver (support for more clock domains) required by the E850-96 development board - Prep for runtime PM and generic power domains on Tegra - Support modular Allwinner clk drivers via platform bus - Lan966x clock driver extended to support clock gating - Add serial (SCI1), watchdog (WDT), timer (OSTM), SPI (RSPI), and thermal (TSU) clocks and resets on Renesas RZ/G2L - Rework SDHI clock handling in the Renesas R-Car Gen3 and RZ/G2 clock drivers, and in the Renesas SDHI driver - Make the Cortex-A55 (I) clock on Renesas RZ/G2L programmable - Document support for the new Renesas R-Car S4-8 (R8A779F0) SoC - Add support for the new Renesas R-Car S4-8 (R8A779F0) SoC - Add GPU clock and resets on Renesas RZ/G2L - Add clk-provider.h to various Qualcomm clk drivers - devm version of clk_hw_register_gate() - kerneldoc fixes in a couple drivers" * tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (131 commits) clk: visconti: Remove pointless NULL check in visconti_pll_add_lookup() clk: mediatek: add mt7986 clock support clk: mediatek: add mt7986 clock IDs dt-bindings: clock: mediatek: document clk bindings for mediatek mt7986 SoC clk: mediatek: clk-gate: Use regmap_{set/clear}_bits helpers clk: mediatek: clk-gate: Shrink by adding clockgating bit check helper clk: x86: Fix clk_gate_flags for RV_CLK_GATE clk: x86: Use dynamic con_id string during clk registration ACPI: APD: Add a fmw property clk-name drivers: acpi: acpi_apd: Remove unused device property "is-rv" x86: clk: clk-fch: Add support for newer family of AMD's SOC clk: ingenic: Add MDMA and BDMA clocks dt-bindings: clk/ingenic: Add MDMA and BDMA clocks clk: bm1880: remove kfrees on static allocations clk: Drop unused COMMON_CLK_STM32MP157_SCMI config clk: st: clkgen-mux: search reg within node or parent clk: st: clkgen-fsyn: search reg within node or parent clk: Enable/Disable runtime PM for clk_summary MAINTAINERS: Add entries for Toshiba Visconti PLL and clock controller clk: visconti: Add support common clock driver and reset driver ...
2022-01-12dt-bindings: mailbox: Add more protocol and client IDHuang Yiwei1-0/+2
Add more protocol and client ID which can be used in device tree properties. Signed-off-by: Huang Yiwei <quic_hyiwei@quicinc.com> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-01-12Merge branches 'clk-ingenic' and 'clk-mediatek' into clk-nextStephen Boyd3-0/+172
- Add MDMA and BDMA clks to Ingenic JZ4760 and JZ4770 - MediaTek mt7986 SoC basic support * clk-ingenic: clk: ingenic: Add MDMA and BDMA clocks dt-bindings: clk/ingenic: Add MDMA and BDMA clocks * clk-mediatek: clk: mediatek: add mt7986 clock support clk: mediatek: add mt7986 clock IDs dt-bindings: clock: mediatek: document clk bindings for mediatek mt7986 SoC clk: mediatek: clk-gate: Use regmap_{set/clear}_bits helpers clk: mediatek: clk-gate: Shrink by adding clockgating bit check helper
2022-01-12Merge branches 'clk-socfpga', 'clk-toshiba', 'clk-st' and 'clk-bitmain' into ↵Stephen Boyd2-0/+222
clk-next - Clock and reset driver for Toshiba Visconti SoCs * clk-socfpga: clk: socfpga: s10: Make use of the helper function devm_platform_ioremap_resource() clk: socfpga: agilex: Make use of the helper function devm_platform_ioremap_resource() clk: socfpga: remove redundant assignment after a mask operation clk: socfpga: remove redundant assignment on division * clk-toshiba: clk: visconti: Remove pointless NULL check in visconti_pll_add_lookup() MAINTAINERS: Add entries for Toshiba Visconti PLL and clock controller clk: visconti: Add support common clock driver and reset driver dt-bindings: clock: Add DT bindings for SMU of Toshiba Visconti TMPV770x SoC dt-bindings: clock: Add DT bindings for PLL of Toshiba Visconti TMPV770x SoC * clk-st: clk: Drop unused COMMON_CLK_STM32MP157_SCMI config clk: st: clkgen-mux: search reg within node or parent clk: st: clkgen-fsyn: search reg within node or parent * clk-bitmain: clk: bm1880: remove kfrees on static allocations
2022-01-12Merge branches 'clk-nvidia', 'clk-imx', 'clk-samsung' and 'clk-qcom' into ↵Stephen Boyd8-5/+779
clk-next * clk-nvidia: clk: tegra: Support runtime PM and power domain clk: tegra: Make vde a child of pll_p on tegra114 * clk-imx: clk: imx8mp: Fix the parent clk of the audio_root_clk clk: imx8mp: Remove IPG_AUDIO_ROOT from imx8mp-clock.h clk: imx8mn: Fix imx8mn_clko1_sels clk: imx: Use div64_ul instead of do_div clk: imx: imx8ulp: set suppress_bind_attrs to true * clk-samsung: clk: samsung: Add initial Exynos7885 clock driver clk: samsung: clk-pll: Add support for pll1417x clk: samsung: Make exynos850_register_cmu shared dt-bindings: clock: Document Exynos7885 CMU bindings dt-bindings: clock: Add bindings definitions for Exynos7885 CMU clk: samsung: exynos850: Add missing sysreg clocks dt-bindings: clock: Add bindings for Exynos850 sysreg clocks clk: samsung: exynos850: Register clocks early clk: samsung: exynos850: Keep some crucial clocks running clk: samsung: exynos850: Implement CMU_CMGP domain dt-bindings: clock: Add bindings for Exynos850 CMU_CMGP clk: samsung: exynos850: Implement CMU_APM domain dt-bindings: clock: Add bindings for Exynos850 CMU_APM clk: samsung: Update CPU clk registration clk: samsung: Remove meaningless __init and extern from header files clk: samsung: remove __clk_lookup() usage dt-bindings: clock: samsung: add IDs for some core clocks * clk-qcom: (25 commits) clk: qcom: gcc-sc7280: Mark gcc_cfg_noc_lpass_clk always enabled clk: qcom: clk-alpha-pll: Increase PLL lock detect poll time clk: qcom: turingcc-qcs404: explicitly include clk-provider.h clk: qcom: q6sstop-qcs404: explicitly include clk-provider.h clk: qcom: mmcc-apq8084: explicitly include clk-provider.h clk: qcom: lpasscc-sdm845: explicitly include clk-provider.h clk: qcom: lpasscc-sc7280: explicitly include clk-provider.h clk: qcom: gcc-sm6350: explicitly include clk-provider.h clk: qcom: gcc-msm8994: explicitly include clk-provider.h clk: qcom: gcc-sm8350: explicitly include clk-provider.h clk: qcom: Add MSM8976/56 Global Clock Controller (GCC) driver dt-bindings: clk: qcom: Document MSM8976 Global Clock Controller clk: qcom: Add clock driver for SM8450 clk: qcom: Add SDX65 GCC support clk: qcom: Add LUCID_EVO PLL type for SDX65 dt-bindings: clock: Add SM8450 GCC clock bindings dt-bindings: clock: Add SDX65 GCC clock bindings clk: qcom: rpmh: add support for SM8450 rpmh clocks dt-bindings: clock: Add RPMHCC bindings for SM8450 clk: qcom: smd-rpm: Drop binary value handling for buffered clock ...
2022-01-12Merge branches 'clk-x86', 'clk-stm', 'clk-amlogic' and 'clk-allwinner' into ↵Stephen Boyd4-0/+268
clk-next * clk-x86: clk: x86: Fix clk_gate_flags for RV_CLK_GATE clk: x86: Use dynamic con_id string during clk registration ACPI: APD: Add a fmw property clk-name drivers: acpi: acpi_apd: Remove unused device property "is-rv" x86: clk: clk-fch: Add support for newer family of AMD's SOC clk: Introduce clk-tps68470 driver platform/x86: int3472: Deal with probe ordering issues platform/x86: int3472: Pass tps68470_regulator_platform_data to the tps68470-regulator MFD-cell platform/x86: int3472: Pass tps68470_clk_platform_data to the tps68470-regulator MFD-cell platform/x86: int3472: Add get_sensor_adev_and_name() helper platform/x86: int3472: Split into 2 drivers platform_data: Add linux/platform_data/tps68470.h file i2c: acpi: Add i2c_acpi_new_device_by_fwnode() function i2c: acpi: Use acpi_dev_ready_for_enumeration() helper ACPI: delay enumeration of devices with a _DEP pointing to an INT3472 device * clk-stm: clk: stm32: Fix ltdc's clock turn off by clk_disable_unused() after system enter shell * clk-amlogic: clk: meson: gxbb: Fix the SDM_EN bit for MPLL0 on GXBB * clk-allwinner: clk: sunxi-ng: Add support for the D1 SoC clocks clk: sunxi-ng: gate: Add macros for gates with fixed dividers clk: sunxi-ng: mux: Add macros using clk_parent_data and clk_hw clk: sunxi-ng: mp: Add macros using clk_parent_data and clk_hw clk: sunxi-ng: div: Add macros using clk_parent_data and clk_hw dt-bindings: clk: Add compatibles for D1 CCUs clk: sunxi-ng: Allow the CCU core to be built as a module clk: sunxi-ng: Convert early providers to platform drivers clk: sunxi-ng: Allow drivers to be built as modules clk: sunxi-ng: Export symbols used by CCU drivers
2022-01-12Merge branches 'clk-doc', 'clk-renesas', 'clk-at91', 'clk-cleanup' and ↵Stephen Boyd3-0/+128
'clk-debugfs' into clk-next * clk-doc: clk: Gemini: fix struct name in kernel-doc clk: zynq: pll: Fix kernel-doc warnings clk: imx: pllv1: fix kernel-doc notation for struct clk_pllv1 * clk-renesas: (31 commits) clk: renesas: r9a07g044: Add GPU clock and reset entries clk: renesas: r9a07g044: Add mux and divider for G clock clk: renesas: r9a07g044: Rename CLK_PLL3_DIV4 macro clk: renesas: cpg-mssr: Add support for R-Car S4-8 clk: renesas: rcar-gen4: Introduce R-Car Gen4 CPG driver dt-bindings: clock: Add r8a779f0 CPG Core Clock Definitions dt-bindings: power: Add r8a779f0 SYSC power domain definitions clk: renesas: r9a07g044: Add TSU clock and reset entry mmc: renesas_sdhi: Simplify an expression mmc: renesas_sdhi: Use devm_clk_get_optional() to obtain CD clock dt-bindings: clock: renesas,cpg-mssr: Document r8a779f0 clk: renesas: cpg-mssr: propagate return value of_genpd_add_provider_simple() clk: renesas: cpg-mssr: Check return value of pm_genpd_init() clk: renesas: rzg2l: propagate return value of_genpd_add_provider_simple() clk: renesas: rzg2l: Check return value of pm_genpd_init() clk: renesas: r9a07g044: Add RSPI clock and reset entries clk: renesas: r9a07g044: Change core clock "I" from DEF_FIXED->DEF_DIV clk: renesas: rzg2l: Add CPG_PL1_DDIV macro mmc: renesas_sdhi: Parse DT for SDnH mmc: renesas_sdhi: Use dev_err_probe when getting clock fails ... * clk-at91: clk: lan966x: Extend lan966x clock driver for clock gating support dt-bindings: clock: lan966x: Extend includes with clock gates dt-bindings: clock: lan966x: Extend for clock gate support clk: gate: Add devm_clk_hw_register_gate() clk: lan966x: Add lan966x SoC clock driver dt-bindings: clock: lan966x: Add LAN966X Clock Controller dt-bindings: clock: lan966x: Add binding includes for lan966x SoC clock IDs * clk-cleanup: clk: stm32mp1: remove redundant assignment to pointer data clk: __clk_core_init() never takes NULL clk: clk_core_get() can also return NULL clk/ti/adpll: Make const pointer error a static const array * clk-debugfs: clk: Enable/Disable runtime PM for clk_summary clk: Emit a stern warning with writable debugfs enabled clk: Add write operation for clk_parent debugfs node
2022-01-11Merge tag 'gpio-updates-for-v5.17' of ↵Linus Torvalds3-0/+176
git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux Pull gpio updates from Bartosz Golaszewski: "The gpio-sim module is back, this time without any changes to configfs. This results in a less elegant user-space interface but I never got any follow-up on the committable items and didn't want to delay this module for several more months. Other than that we have support for several new models and some support going away. We started working on converting GPIO drivers to using fwnode exclusively in order to limit references to OF symbols to gpiolib-of.c exclusively. We also have regular tweaks and improvements all over the place. Summary: - new testing module: gpio-sim that is scheduled to replace gpio-mockup - initial changes aiming at converting all GPIO drivers to using the fwnode interface and limiting any references to OF symbols to gpiolib-of.c - add support for Tegra234 and Tegra241 to gpio-tegra186 - add support for new models (SSD201 and SSD202D) to gpio-msc313 - add basic support for interrupts to gpio-aggregator - add support for AMDIF031 HID device to gpio-amdpt - drop support for unused platforms in gpio-xlp - cleanup leftovers from the removal of the legacy Samsung Exynos GPIO driver - use raw spinlocks in gpio-aspeed and gpio-aspeed-sgpio to make PREEMPT_RT happy - generalize the common 'ngpios' device property by reading it in the core gpiolib code so that we can remove duplicate reads from drivers - allow line names from device properties to override names set by drivers - code shrink in gpiod_add_lookup_table() - add new model to the DT bindings for gpio-vf610 - convert DT bindings for tegra devices to YAML - improvements to interrupt handling in gpio-rcar and gpio-rockchip - updates to intel drivers from Andy (details in the merge commit) - some minor tweaks, improvements and coding-style fixes all around the subsystem" * tag 'gpio-updates-for-v5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux: (59 commits) gpio: rcar: Propagate errors from devm_request_irq() gpio: rcar: Use platform_get_irq() to get the interrupt gpio: ts5500: Use platform_get_irq() to get the interrupt gpio: dwapb: Switch to use fwnode instead of of_node gpiolib: acpi: make fwnode take precedence in struct gpio_chip dt-bindings: gpio: samsung: drop unused bindings gpio: max3191x: Use bitmap_free() to free bitmap gpio: regmap: Switch to use fwnode instead of of_node gpio: tegra186: Add support for Tegra241 dt-bindings: gpio: Add Tegra241 support gpio: brcmstb: Use local variable to access OF node gpio: Remove unused local OF node pointers gpio: sim: add missing fwnode_handle_put() in gpio_sim_probe() gpio: msc313: Add support for SSD201 and SSD202D gpio: msc313: Code clean ups dt-bindings: gpio: msc313: Add offsets for ssd20xd dt-bindings: gpio: msc313: Add compatible for ssd20xd gpio: sim: fix uninitialized ret variable gpio: Propagate firmware node from a parent device gpio: Setup parent device and get rid of unnecessary of_node assignment ...
2022-01-10Merge tag 'newsoc-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/socLinus Torvalds3-0/+603
Pull RISC-V SoC updates from Arnd Bergmann: "Add support for StarFive JH7100 RISC-V SoC This adds support for the StarFive JH7100, including the necessary device drivers and DT files for the BeagleV Starlight prototype board, with additional boards to be added later. This SoC promises to be the first usable low-cost platform for RISC-V. I've taken this through the SoC tree in the anticipation of adding a few other Arm based SoCs as well, but those did not pass the review in time, so it's only this one" * tag 'newsoc-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: reset: starfive-jh7100: Fix 32bit compilation RISC-V: Add BeagleV Starlight Beta device tree RISC-V: Add initial StarFive JH7100 device tree serial: 8250_dw: Add StarFive JH7100 quirk dt-bindings: serial: snps-dw-apb-uart: Add JH7100 uarts pinctrl: starfive: Add pinctrl driver for StarFive SoCs dt-bindings: pinctrl: Add StarFive JH7100 bindings dt-bindings: pinctrl: Add StarFive pinctrl definitions reset: starfive-jh7100: Add StarFive JH7100 reset driver dt-bindings: reset: Add Starfive JH7100 reset bindings dt-bindings: reset: Add StarFive JH7100 reset definitions clk: starfive: Add JH7100 clock generator driver dt-bindings: clock: starfive: Add JH7100 bindings dt-bindings: clock: starfive: Add JH7100 clock definitions dt-bindings: interrupt-controller: Add StarFive JH7100 plic dt-bindings: timer: Add StarFive JH7100 clint RISC-V: Add StarFive SoC Kconfig option
2022-01-10Merge tag 'dt-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/socLinus Torvalds10-8/+474
Pull ARM SoC devicetree updates from Arnd Bergmann: "As usual, this is the bulk of the updates for the SoC tree, adding more devices to existing files, addressing issues from ever improving automated checking, and fixing minor issues. The most interesting bits as usual are the new platforms. All the newly supported SoCs belong into existing families this time: - Qualcomm gets support for two newly announced platforms, both of which can now work in production environments: the SDX65 5G modem that can run a minimal Linux on its Cortex-A7 core, and the Snapdragon 8 Gen 1, their latest high-end phone SoC. - Renesas adds support for R-Car S4-8, the most recent automotive Server/Communication SoC. - TI adds support for J721s2, a new automotive SoC in the K3 family. - Mediatek MT7986a/b is a SoC used in Wifi routers, the latest generation following their popular MT76xx series. Only basic support is added for now. - NXP i.MX8 ULP8 is a new low-power variant of the widespread i.MX8 series. - TI SPEAr320s is a minor variant of the old SPEAr320 SoC that we have supported for a long time. New boards with the existing SoCs include - Aspeed AST2500/AST2600 BMCs in TYAN, Facebook and Yadro servers - AT91/SAMA5 based evaluation board - NXP gains twenty new development and industrial boards for their i.MX and Layerscape SoCs - Intel IXP4xx now supports the final two machines in device tree that were previously only supported in old style board files. - Mediatek MT6589 is used in the Fairphone FP1 phone from 2013, while MT8183 is used in the Acer Chromebook 314. - Qualcomm gains support for the reference machines using the two new SoCs, plus a number of Chromebook variants and phones based on the Snapdragon 7c, 845 and 888 SoCs, including various Sony Xperia devices and the Microsoft Surface Duo 2. - ST STM32 now supports the Engicam i.Core STM32MP1 carrier board. - Tegra now boots various older Android devices based on 32-bit chips out of the box, including a number of ASUS Transformer tablets. There is also a new Jetson AGX Orin developer kit. - Apple support adds the missing device trees for all the remaining M1 Macbook and iMac variants, though not yet the M1 Pro/Max versions. - Allwinner now supports another version of the Tanix TX6 set-top box based on the H6 SoC. - Broadcom gains support for the Netgear RAXE500 Wireless router based on BCM4908" * tag 'dt-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (574 commits) Revert "ARM: dts: BCM5301X: define RTL8365MB switch on Asus RT-AC88U" arm64: dts: qcom: sm6125: Avoid using missing SM6125_VDDCX arm64: dts: qcom: sm8450-qrd: Enable USB nodes arm64: dts: qcom: sm8450: Add usb nodes ARM: dts: aspeed: add LCLK setting into LPC KCS nodes dt-bindings: ipmi: bt-bmc: add 'clocks' as a required property ARM: dts: aspeed: add LCLK setting into LPC IBT node ARM: dts: aspeed: p10: Add TPM device ARM: dts: aspeed: p10: Enable USB host ports ARM: dts: aspeed: Add TYAN S8036 BMC machine ARM: dts: aspeed: tyan-s7106: Add uart_routing and fix vuart config ARM: dts: aspeed: Adding Facebook Bletchley BMC ARM: dts: aspeed: g220a: Enable secondary flash ARM: dts: Add openbmc-flash-layout-64-alt.dtsi ARM: dts: aspeed: Add secure boot controller node dt-bindings: aspeed: Add Secure Boot Controller bindings ARM: dts: Remove "spidev" nodes dt-bindings: pinctrl: samsung: Add pin drive definitions for Exynos850 dt-bindings: arm: samsung: Document E850-96 board binding dt-bindings: Add vendor prefix for WinLink ...
2022-01-07clk: mediatek: add mt7986 clock IDsSam Shih1-0/+169
Add MT7986 clock dt-bindings, include topckgen, apmixedsys, infracfg, and ethernet subsystem clocks. Signed-off-by: Sam Shih <sam.shih@mediatek.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20211217121148.6753-3-sam.shih@mediatek.com Reviewed-by: Ryder Lee <ryder.lee@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-01-07dt-bindings: clk/ingenic: Add MDMA and BDMA clocksPaul Cercueil2-0/+3
The Ingenic JZ4760 and JZ4770 both have an extra DMA core named BDMA dedicated to the NAND and BCH controller, but which can also do memory-to-memory transfers. The JZ4760 additionally has a DMA core named MDMA dedicated to memory-to-memory transfers. The programming manual for the JZ4770 does have a bit for a MDMA clock, but does not seem to have the hardware wired in. Add macros for the MDMA and BDMA clocks to the dt-bindings include files, so that they can be used within Device Tree files. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Link: https://lore.kernel.org/r/20211220193319.114974-2-paul@crapouillou.net Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-01-06dt-bindings: clock: Add DT bindings for SMU of Toshiba Visconti TMPV770x SoCNobuhiro Iwamatsu2-0/+222
Add device tree bindings for SMU (System Management Unit) controller of Toshiba Visconti TMPV770x SoC series. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20211025031038.4180686-3-nobuhiro1.iwamatsu@toshiba.co.jp Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-01-03dt-bindings: ti-serdes-mux: Add defines for J721S2 SoCAswath Govindraju1-0/+22
There are 4 lanes in the single instance of J721S2 SERDES. Each SERDES lane mux can select upto 4 different IPs. Define all the possible functions. Signed-off-by: Aswath Govindraju <a-govindraju@ti.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Peter Rosin <peda@axentia.se> Link: https://lore.kernel.org/r/0571fd6b-ec4d-71b3-5cf7-6fa48ed5592c@axentia.se Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2021-12-30Merge tag 'phy-for-5.17' of ↵Greg Kroah-Hartman3-4/+33
git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy into char-misc-next Vinod writes: phy-for-5.17 - New support: - Qualcomm eDP PHY driver - Qualcomm SM8450 UFS, USB2, USB3, PCIe0 and PCIe1 phy support - Lan966x ethernet serdes PHY driver - Support for uniphier NXI & Pro4 SoC - Qualcomm SM6350 USB2 support - Amlogic Meson8 HDMI TX PHY driver - Rockchip rk3568 usb2 support - Intel Thunder Bay eMMC PHY driver - Freescale IMX8 PCIe phy driver - Updates: - Cadence Sierra driver updates for multilink configurations - Bcm usb2 updates for Phy reg space * tag 'phy-for-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy: (72 commits) phy: cadence: Sierra: Add support for derived reference clock output dt-bindings: phy: cadence-sierra: Add clock ID for derived reference clock phy: cadence: Sierra: Add PCIe + QSGMII PHY multilink configuration phy: cadence: Sierra: Add support for PHY multilink configurations phy: cadence: Sierra: Fix to get correct parent for mux clocks phy: cadence: Sierra: Update single link PCIe register configuration phy: cadence: Sierra: Check PIPE mode PHY status to be ready for operation phy: cadence: Sierra: Check cmn_ready assertion during PHY power on phy: cadence: Sierra: Add PHY PCS common register configurations phy: cadence: Sierra: Rename some regmap variables to be in sync with Sierra documentation phy: cadence: Sierra: Add support to get SSC type from device tree dt-bindings: phy: cadence-sierra: Add binding to specify SSC mode dt-bindings: phy: cadence-torrent: Rename SSC macros to use generic names phy: cadence: Sierra: Prepare driver to add support for multilink configurations phy: cadence: Sierra: Use of_device_get_match_data() to get driver data phy: mediatek: Fix missing check in mtk_mipi_tx_probe phy: uniphier-usb3ss: fix unintended writing zeros to PHY register phy: phy-mtk-tphy: use new io helpers to access register phy: phy-mtk-xsphy: use new io helpers to access register phy: mediatek: add helpers to update bits of registers ...
2021-12-27dt-bindings: phy: cadence-sierra: Add clock ID for derived reference clockSwapnil Jakhade1-0/+1
Add clock ID for Sierra derived reference clock. Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20211223060137.9252-15-sjakhade@cadence.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-12-27dt-bindings: phy: cadence-torrent: Rename SSC macros to use generic namesSwapnil Jakhade1-4/+4
Rename SSC macros to use generic names instead of PHY specific names, so that they can be used to specify SSC modes for both Torrent and Sierra. Renaming the macros should not affect the things as these are not being used in any DTS file yet. Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20211223060137.9252-4-sjakhade@cadence.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-12-27Merge tag 'icc-5.17-rc1' of ↵Greg Kroah-Hartman3-0/+428
git://git.kernel.org/pub/scm/linux/kernel/git/djakov/icc into char-misc-next Georgi writes: interconnect changes for 5.17 Here are the interconnect changes for the 5.17-rc1 merge window consisting of new drivers, minor changes and fixes. New drivers: - New driver for MSM8996 platforms - New driver for SC7280 EPSS L3 hardware - New driver for QCM2290 platforms - New driver for SM8450 platforms Driver changes: - dt-bindings: interconnect: Combine SDM660 bindings into RPM schema - icc-rpm: Add support for bus power domain - icc-rpm: Use NOC_QOS_MODE_INVALID for qos_mode check - icc-rpm: Define ICC device type - icc-rpm: Add QNOC type QoS support - icc-rpm: Support child NoC device probe - icc-rpm: Prevent integer overflow in rate - icc-rpmh: Add BCMs to commit list in pre_aggregate Signed-off-by: Georgi Djakov <djakov@kernel.org> * tag 'icc-5.17-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/djakov/icc: interconnect: qcom: Add QCM2290 driver support dt-bindings: interconnect: Add Qualcomm QCM2290 NoC support interconnect: icc-rpm: Support child NoC device probe interconnect: icc-rpm: Add QNOC type QoS support interconnect: icc-rpm: Define ICC device type interconnect: qcom: Add SM8450 interconnect provider driver dt-bindings: interconnect: Add Qualcomm SM8450 DT bindings interconnect: qcom: rpm: Prevent integer overflow in rate interconnect: icc-rpm: Use NOC_QOS_MODE_INVALID for qos_mode check interconnect: qcom: icc-rpmh: Add BCMs to commit list in pre_aggregate interconnect: qcom: Add MSM8996 interconnect provider driver dt-bindings: interconnect: Add Qualcomm MSM8996 DT bindings interconnect: icc-rpm: Add support for bus power domain dt-bindings: interconnect: Combine SDM660 bindings into RPM schema interconnect: qcom: Add EPSS L3 support on SC7280 dt-bindings: interconnect: Add EPSS L3 DT binding on SC7280
2021-12-23dt-bindings: gpio: Add Tegra241 supportAkhil R1-0/+42
Add the port definitions for the main and AON GPIO controllers found on Tegra241 (Grace). Signed-off-by: Akhil R <akhilrajeev@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2021-12-22Merge tag 'qcom-arm64-for-5.17-1' of ↵Arnd Bergmann1-0/+244
git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/dt Qualcomm ARM64 DeviceTree updates for v5.17 This introduces initial support for the brand new Snapdragon 8 Gen 1, aka SM8450 platform, with SMP, CPUfreq, cluster idling, low speed buses, TLMM pinctrl, SMMU, regulators, clocks, power-domains, UFS storage and USB currently supported. SDM845 adds new support for Sony Xperia XZ2, XZ2C and XZ3. The Lenovo Yoga C630 gains a few audio related fixes. The PMIC's VADC channels are described as thermal zones. OnePlus devices gains msm-id and board-id, to facilitate a single firmware image for the multiple devices. On SM8350 the Sony Xperia 1 III and 5 III, as well as initial description of Microsoft's Surface Duo 2 are introduced. On the platform side, LLCC, QUP nodes, redistributor stride and all the low-speed QUPs are added MSM8996 gained various regulator fixes, and adsp firmware name to faciliate pushing firmware to linux-firmware. Xiaomi Mi Note 2 gained touchkey controller definition. On SDM660 the Xiaomi Redmi Note 7 gained power and volume keys, RPM and regulator definitions, USB, eMMC and SD-card and a simple-framebuffer description. MSM8916 has the mmc aliases corrected, to stop the storage devices to move around and the RPM sleep stats memory is described. Support for the Samsung J5 2015 smartphone is introduced. SM6350 validation errors are fixed and and description of the audio, compute and modem remoteprocs are added. A couple new revisions of the SC7180 based Google devices are added. The SC7280 platform gains venus and a few fixes. The CRD development device is introduced, with the EC, touchscreen and touchpad. On SM8250 CPU opp-tables, for scaling L3 cache and DDR frequency based on CPU frequency, are added. As is TX, RX macros and SoundWire blocks and used to enable audio on the SM8350 MTP. * tag 'qcom-arm64-for-5.17-1' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (92 commits) arm64: dts: qcom: sm6125: Avoid using missing SM6125_VDDCX arm64: dts: qcom: sm8450-qrd: Enable USB nodes arm64: dts: qcom: sm8450: Add usb nodes arm64: dts: qcom: sm8450: add i2c13 and i2c14 device nodes arm64: dts: qcom: sm8450: add cpufreq support arm64: dts: qcom: sm8450: Add rpmhpd node arm64: dts: qcom: sm8450-qrd: enable ufs nodes arm64: dts: qcom: sm8450: add ufs nodes arm64: dts: qcom: sm8450-qrd: Add rpmh regulator nodes arm64: dts: qcom: Add base SM8450 QRD DTS arm64: dts: qcom: sm8450: add smmu nodes arm64: dts: qcom: sm8450: Add reserved memory nodes arm64: dts: qcom: sm8450: Add tlmm nodes arm64: dts: qcom: Add base SM8450 DTSI arm64: dts: qcom: ipq6018: Fix gpio-ranges property arm64: dts: qcom: sdm845: add QFPROM chipset specific compatible arm64: dts: qcom: sdm845: mtp: Add vadc channels and thermal zones arm64: dts: qcom: pm8998: Add ADC Thermal Monitor node arm64: qcom: dts: drop legacy property #stream-id-cells Revert "arm64: dts: qcom: sm8350: Specify clock-frequency for arch timer" ... Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-12-21Merge tag 'qcom-dts-for-5.17' of ↵Arnd Bergmann1-0/+122
git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/dt Qualcomm DeviceTree updates for v5.17 To SDX55 this introduces the description of the IPA, PCIe PHY and PCIe endpoint controller, as well as enables these for the FN960 device. The SDX65 5G platform is introduced, currently with definitions necessary to boot to a shell. The undocumented property "input-name" is dropped throughout the dts files, dwc3 nodes throughout gains more specific compatibles and lastly building of the Dragonboard 410c DTB on ARM32 is enabled, in addition to its normal operation in 64-bit mode. * tag 'qcom-dts-for-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: ARM: dts: qcom: Drop input-name property ARM: dts: qcom: sdx65: Add pincontrol node ARM: dts: qcom: Add SDX65 platform and MTP board support dt-bindings: arm: qcom: Document SDX65 platform and boards dt-bindings: clock: Add SDX65 GCC clock bindings ARM: dts: qcom: Build apq8016-sbc/DragonBoard 410c DTB on ARM32 ARM: dts: qcom: sdx55-t55: Enable IPA ARM: dts: qcom: sdx55-fn980: Enable IPA ARM: dts: qcom: sdx55-fn980: Enable PCIe EP ARM: dts: qcom: sdx55: Add support for PCIe EP ARM: dts: qcom: sdx55-fn980: Enable PCIE0 PHY ARM: dts: qcom: sdx55: Add support for PCIe PHY ARM: dts: qcom: update USB nodes with new platform specific compatible Link: https://lore.kernel.org/r/20211221042154.3621955-1-bjorn.andersson@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-12-21Merge tag 'qcom-drivers-for-5.17' of ↵Arnd Bergmann1-0/+33
git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/drivers Qualcomm driver updates for v5.17 This introduces RPM power-domain support for the SM8450, SM6125 and QCM2290 platforms. It them clean up the platform-based naming of the resources definitions throughout the RPMh PD driver. The last-level cache controller driver gains SM8350 support. The RPM sleep stats driver gains support for several older systems that had a slightly different memory layout for this information. The socinfo gains SM8450, SM6350 and SM7227 definitions. In addition to the DeviceTree binding updates related to these changes new compatibles was added to describe the SM8450 and the Kryo 780 CPU. Lastly a few typo and style fixes are introduced. * tag 'qcom-drivers-for-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (27 commits) soc: qcom: rpmh-rsc: Fix typo in a comment soc: qcom: socinfo: Add SM6350 and SM7225 dt-bindings: arm: msm: Don't mark LLCC interrupt as required dt-bindings: firmware: scm: Add SM6350 compatible dt-bindings: arm: msm: Add LLCC for SM6350 soc: qcom: rpmhpd: Sort power-domain definitions and lists soc: qcom: rpmhpd: Remove mx/cx relationship on sc7280 soc: qcom: rpmhpd: Rename rpmhpd struct names soc: qcom: rpmhpd: sm8450: Add the missing .peer for sm8450_cx_ao soc: qcom: socinfo: add SM8450 ID soc: qcom: rpmhpd: Add SM8450 power domains dt-bindings: power: rpmpd: Add SM8450 to rpmpd binding soc: qcom: smem: Update max processor count dt-bindings: arm: qcom: Document SM8450 SoC and boards dt-bindings: firmware: scm: Add SM8450 compatible dt-bindings: arm: cpus: Add kryo780 compatible soc: qcom: rpmpd: Add support for sm6125 dt-bindings: qcom-rpmpd: Add sm6125 power domains soc: qcom: aoss: constify static struct thermal_cooling_device_ops PM: AVS: qcom-cpr: Use div64_ul instead of do_div ... Link: https://lore.kernel.org/r/20211221040452.3620633-1-bjorn.andersson@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-12-21dt-bindings: power: rpmpd: Add SM8450 to rpmpd bindingDmitry Baryshkov1-0/+15
Add compatible and constants for the power domains exposed by the RPMH in the Qualcomm SM8450 platform. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211201072745.3969077-6-vkoul@kernel.org
2021-12-21dt-bindings: qcom-rpmpd: Add sm6125 power domainsMartin Botka1-0/+8
Add dt-bindings for sm6125 SoC RPM Power Domains Signed-off-by: Martin Botka <martin.botka@somainline.org> [bjorn: Added compatible to binding as well] Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211130212332.25401-1-martin.botka@somainline.org
2021-12-20Merge tag 'samsung-dt64-5.17' of ↵Arnd Bergmann2-1/+29
git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt Samsung DTS ARM64 changes for v5.17 1. Add bindings for: Exynos USI, Samsung Galaxy A8 (2018) board, WinLink E850-96 board and WinLink vendor prefix. 2. Add pinctrl definitions used for Exynos850. 3. Minor fixes and improvements. 4. Convert serial on ExynosAutov9 to new hierarchy where serial is part of USI node. * tag 'samsung-dt64-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: dt-bindings: pinctrl: samsung: Add pin drive definitions for Exynos850 dt-bindings: arm: samsung: Document E850-96 board binding dt-bindings: Add vendor prefix for WinLink dt-bindings: arm: samsung: document jackpotlte board binding dt-bindings: soc: samsung: Fix I2C clocks order in USI binding example arm64: dts: exynos: convert serial_0 to USI on ExynosAutov9 dt-bindings: soc: samsung: Add Exynos USI bindings arm64: dts: exynos: Rename hsi2c nodes to i2c for Exynos5433 and Exynos7 Link: https://lore.kernel.org/r/20211220115530.30961-2-krzysztof.kozlowski@canonical.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-12-20Merge tag 'imx-dt64-5.17' of ↵Arnd Bergmann1-0/+26
git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt i.MX arm64 device tree change for 5.17: - New SoC support: i.MX8 ULP. - New board support: i.MX8MM/MN based TQMa8Mx boards, iMX8MN BSH SMM S2, i.MX8 ULP EVK. - A series from Adam Ford to enable Camera and USB support for imx8mm-beacon device. - Add overlays for various serdes protocols on LS1028A QDS board using different PHY cards. - A series from Biwen Li to update LS1028A devices around RTC, flextimer and PWM support. - A series from Joakim Zhang to update ENET/FEC suppport on i.MX8M devices. - A couple of changes from Lucas Stach to update nitrogen8-som Ethernet PHY and I2C1 pad configuration. - A series from Martin Kepplinger to split out a shared imx8mq-librem5-r3 dtsi for Librem5 devices. - Add cache descriptions for i.MX8 SoCs. - A series from Vladimir Oltean to update ls1028a-rdb device tree in order to share the DTS between Linux and U-Boot. - Random device addtion to various i.MX8 and LX2160A based devices. * tag 'imx-dt64-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (56 commits) arm64: dts: imx8mp-evk: configure multiple queues on eqos arm64: dts: ls1028a-qds: add overlays for various serdes protocols arm64: dts: ls1028a-qds: enable lpuart1 arm64: dts: ls1028a-qds: move rtc node to the correct i2c bus arm64: dts: ls1028a-rdb: enable pwm0 arm64: dts: ls1028a: add flextimer based pwm nodes arm64: dts: ls1028a: add ftm_alarm1 node to be used as wakeup source arm64: dts: ls1028a: Add PCIe EP nodes arm64: dts: lx2162a-qds: add interrupt line for RTC node arm64: dts: lx2162a-qds: support SD UHS-I and eMMC HS400 modes arm64: dts: lx2160a: enable usb3-lpm-capable for usb3 nodes arm64: dts: lx2160a-qds: Add mdio mux nodes arm64: dts: lx2160a: add optee-tz node arm64: dts: lx2160a-rdb: Add Inphi PHY node arm64: dts: imx8mm: don't assign PLL2 in SoC dtsi arm64: dts: nitrogen8-som: correct i2c1 pad-ctrl arm64: dts: nitrogen8-som: correct network PHY reset arm64: dts: imx8mn-bsh-smm-s2/pro: Add iMX8MN BSH SMM S2 boards arm64: dts: imx8mm/n: Remove the 'pm-ignore-notify' property arm64: dts: imx8ulp: add power domain entry for usdhc ... Link: https://lore.kernel.org/r/20211218071427.26745-5-shawnguo@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-12-20Merge tag 'ti-k3-dt-for-v5.17' of ↵Arnd Bergmann1-0/+3
git://git.kernel.org/pub/scm/linux/kernel/git/ti/linux into arm/dt Devicetree changes for TI K3 platforms for v5.17 merge window: * New Platforms: - J721s2 SoC, SoM and Common Processor Board support * New features: - CAN support on AM64 EVM and SK - TimeSync Router on AM64 * Fixes: - Correct d-cache-sets info on J7200 - Fix L2 cache-sets value for J721e/J7200/AM64 - Fixes for dtbs_check warnings wrt serdes_ln_ctrl node on J721e/J7200 - Disable McASP on IoT2050 board to fix dtbs_check warnings * tag 'ti-k3-dt-for-v5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/ti/linux: arch: arm64: ti: Add support J721S2 Common Processor Board arm64: dts: ti: Add initial support for J721S2 System on Module arm64: dts: ti: Add initial support for J721S2 SoC dt-bindings: pinctrl: k3: Introduce pinmux definitions for J721S2 dt-bindings: arm: ti: Add bindings for J721s2 SoC arm64: dts: ti: iot2050: Disable mcasp nodes at dtsi level arm64: dts: ti: k3-am642-evm/sk: Add support for main domain mcan nodes in EVM and disable them on SK arm64: dts: ti: k3-am64-main: Add support for MCAN arm64: dts: ti: k3-j721e-common-proc-board: Add support for mcu and main mcan nodes arm64: dts: ti: k3-j721e: Add support for MCAN nodes arm64: dts: ti: am654-base-board/am65-iot2050-common: Disable mcan nodes arm64: dts: ti: k3-am65-mcu: Add Support for MCAN arm64: dts: ti: k3-am64-main: add timesync router node arm64: dts: ti: k3-j7200: Correct the d-cache-sets info arm64: dts: ti: k3-j721e: Fix the L2 cache sets arm64: dts: ti: k3-j7200: Fix the L2 cache sets arm64: dts: ti: k3-am642: Fix the L2 cache sets arm64: dts: ti: j721e-main: Fix 'dtbs_check' in serdes_ln_ctrl node arm64: dts: ti: j7200-main: Fix 'dtbs_check' serdes_ln_ctrl node arm64: dts: ti: k3-j721e: correct cache-sets info Link: https://lore.kernel.org/r/20211217172806.10023-2-vigneshr@ti.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-12-20dt-bindings: gpio: msc313: Add offsets for ssd20xdDaniel Palmer1-0/+71
Add the gpio offsets for the SSD201 and SSD202D chips. Signed-off-by: Daniel Palmer <daniel@0x0f.com> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2021-12-20Merge tag 'tegra-for-5.17-dt-bindings' of ↵Arnd Bergmann3-5/+65
git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt dt-bindings: Changes for v5.17-rc1 This contains a bunch of json-schema conversions for various Tegra- related DT bindings and additions for new SoC and board support. * tag 'tegra-for-5.17-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: (30 commits) media: dt: bindings: tegra-vde: Document OPP and power domain media: dt: bindings: tegra-vde: Convert to schema dt-bindings: host1x: Document Memory Client resets of Host1x, GR2D and GR3D dt-bindings: host1x: Document OPP and power domain properties dt-bindings: clock: tegra-car: Document new clock sub-nodes dt-bindings: ARM: tegra: Document Pegatron Chagall dt-bindings: ARM: tegra: Document ASUS Transformers dt-bindings: usb: tegra-xudc: Document interconnects and iommus properties dt-bindings: serial: Document Tegra234 TCU dt-bindings: serial: tegra-tcu: Convert to json-schema dt-bindings: thermal: tegra186-bpmp: Convert to json-schema dt-bindings: firmware: tegra: Convert to json-schema dt-bindings: tegra: pmc: Convert to json-schema dt-bindings: serial: 8250: Document Tegra234 UART dt-bindings: mmc: tegra: Document Tegra234 SDHCI dt-bindings: fuse: tegra: Document Tegra234 FUSE dt-bindings: fuse: tegra: Convert to json-schema dt-bindings: rtc: tegra: Document Tegra234 RTC dt-bindings: rtc: tegra: Convert to json-schema dt-bindings: mailbox: tegra: Document Tegra234 HSP ... Link: https://lore.kernel.org/r/20211217162253.1801077-3-thierry.reding@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-12-20Merge tag 'samsung-drivers-5.17' of ↵Arnd Bergmann1-0/+17
git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/drivers Samsung SoC drivers changes for v5.17 1. Exynos ChipID: add Exynos7885 support. 2. Exynos PMU: add Exynos850 support. 3. Minor bindings cleanup. 4. Add Exynos USIv2 (Universal Serial Interface) driver. The USI block is a shared IP block between I2C, UART/serial and SPI. Basically one has to choose which feature the USI block will support and later the regular I2C/serial/SPI driver will bind and work. This merges also one commit with dt-binding headers from my dts64 pull request. Together with a future serial driver change, this will break the ABI. Affected: Serial on ExynosAutov9 SADK and out-of-tree ExynosAutov9 boards Why: To properly and efficiently support the USI with new hierarchy of USI-{serial,SPI,I2C} devicetree nodes. Rationale: Recently added serial and USI support was short-sighted and did not allow to smooth support of other features (SPI and I2C). Adding support for USI-SPI and USI-I2C would effect in code duplication. Adding support for different USI versions (currently supported is USIv2 but support for v1 is planned) would cause even more code duplication and create a solution difficult to maintain. Since USI-serial and ExynosAutov9 have been added recently, are considered fresh development features and there are no supported products using them, the code/solution is being refactored in non-backwards compatible way. The compatibility is not broken yet. It will be when serial driver changes are accepted. The ABI break was discussed with only known users of ExynosAutov9 and received their permission. * tag 'samsung-drivers-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: dt-bindings: soc: samsung: keep SoC driver bindings together soc: samsung: Add USI driver dt-bindings: soc: samsung: Add Exynos USI bindings soc: samsung: exynos-pmu: Add Exynos850 support dt-bindings: samsung: pmu: Document Exynos850 soc: samsung: exynos-chipid: add Exynos7885 SoC support soc: samsung: exynos-chipid: describe which SoCs go with compatibles Link: https://lore.kernel.org/r/20211220115405.30434-2-krzysztof.kozlowski@canonical.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-12-20Merge tag 'imx-drivers-5.17' of ↵Arnd Bergmann1-0/+5
git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/drivers i.MX drivers update for 5.17: - A number of patches from Adam Ford to update gpcv2 and blk-ctrl driver to keep i.MX8MM VPU-H1 and i.MX8MN GPUMIX bus clocks active, and add i.MX8MN display related domain support. - Add optional continuous burst clock support for imx-weim bus driver. - Call pm_runtime_put_sync_suspend() instead of pm_runtime_put() in gpcv2 driver to prevent a sequence issue seen with i.MX8MM GPU and MIX domain. * tag 'imx-drivers-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: soc: imx: imx8m-blk-ctrl: add i.MX8MN DISP blk-ctrl dt-bindings: power: imx8mn: add defines for DISP blk-ctrl domains soc: imx: gpcv2: Add dispmix and mipi domains to imx8mn soc: imx: gpcv2: keep i.MX8MN gpumix bus clock enabled bus: imx-weim: optionally enable continuous burst clock soc: imx: gpcv2: keep i.MX8MM VPU-H1 bus clock active soc: imx: gpcv2: Synchronously suspend MIX domains Link: https://lore.kernel.org/r/20211218071427.26745-1-shawnguo@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-12-20ASoC: tlv320adc3xxx: New codec bindingsRicard Wanderlof1-0/+28
DT bindings for Texas Instruments TLV320ADC3001 and TLV320ADC3101 audio ADCs. Signed-off-by: Ricard Wanderlof <ricardw@axis.com> Link: https://lore.kernel.org/r/alpine.DEB.2.21.2112151759170.27889@lap5cg0092dnk.se.axis.com Signed-off-by: Mark Brown <broonie@kernel.org>
2021-12-20dt-bindings: pinctrl: samsung: Add pin drive definitions for Exynos850Sam Protsenko1-1/+12
All Exynos850 GPIO blocks can use EXYNOS5420_PIN_DRV* definitions, except GPIO_HSI block. Add pin drive strength definitions for GPIO_HSI block correspondingly. Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20211217161549.24836-6-semen.protsenko@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-12-20dt-bindings: clock: Add bindings definitions for Exynos7885 CMUDavid Virag1-0/+115
Just like on Exynos850, the clock controller driver is designed to have separate instances for each particular CMU, so clock IDs start from 1 for each CMU in this bindings header too. Signed-off-by: David Virag <virag.david003@gmail.com> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20211206153124.427102-2-virag.david003@gmail.com
2021-12-20dt-bindings: clock: Add bindings for Exynos850 sysreg clocksSam Protsenko1-3/+9
System Register is used to configure system behavior, like USI protocol, etc. SYSREG clocks should be provided to corresponding syscon nodes, to make it possible to modify SYSREG registers. While at it, add also missing PMU and GPIO clocks, which looks necessary and might be needed for corresponding Exynos850 features soon. Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Chanwoo Choi <cw00.choi@samsung.com> Link: https://lore.kernel.org/r/20211217161549.24836-2-semen.protsenko@linaro.org
2021-12-17Merge tag 'renesas-arm-dt-for-v5.17-tag2' of ↵Arnd Bergmann2-0/+94
git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt Renesas ARM DT updates for v5.17 (take two) - Initial support for the R-Car S4-8 SoC on the Spider CPU and BreakOut boards, - MIPI DSI display support for the R-Car V3u SoC and the Falcon board stack, - Thermal and GPU support for the RZ/G2L SoC and the RZ/G2L SMARC EVK development board, - Miscellaneous fixes and improvements. * tag 'renesas-arm-dt-for-v5.17-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: arm64: dts: renesas: Fix pin controller node names arm64: dts: renesas: rzg2l-smarc-som: Add vdd core regulator arm64: dts: renesas: r9a07g044: Add Mali-G31 GPU node arm64: dts: renesas: r9a07g044: Create thermal zone to support IPA arm64: dts: renesas: r9a07g044: Add TSU node arm64: dts: renesas: falcon-cpu: Add DSI display output arm64: dts: renesas: r8a779a0: Add DSI encoders arm64: dts: renesas: Add Renesas Spider boards support arm64: dts: renesas: Add Renesas R8A779F0 SoC support dt-bindings: clock: Add r8a779f0 CPG Core Clock Definitions dt-bindings: power: Add r8a779f0 SYSC power domain definitions arm64: dts: renesas: Fix thermal bindings Link: https://lore.kernel.org/r/cover.1639736718.git.geert+renesas@glider.be Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-12-17dt-bindings: gpio: Add Tegra234 supportPrathamesh Shete1-0/+63
Extend the existing Tegra186 GPIO controller device tree bindings with support for the GPIO controller found on Tegra234. The number of pins is slightly different, but the programming model remains the same. Signed-off-by: Prathamesh Shete <pshete@nvidia.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> [treding@nvidia.com: update device tree bindings] Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2021-12-17dt-bindings: power: imx8mn: add defines for DISP blk-ctrl domainsAdam Ford1-0/+5
This adds the defines for the power domains provided by the DISP blk-ctrl. Signed-off-by: Adam Ford <aford173@gmail.com> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-12-16dt-bindings: clk: qcom: Document MSM8976 Global Clock ControllerMarijn Suijten1-0/+240
Document the required properties and firmware clocks for gcc-msm8976 to operate nominally, and add header definitions for referencing the clocks from firmware. Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211208091036.132334-2-marijn.suijten@somainline.org
2021-12-16Merge tag '20211207114003.100693-2-vkoul@kernel.org' into clk-for-5.17Bjorn Andersson1-0/+244
v5.16-rc1 + 20211207114003.100693-2-vkoul@kernel.org The immutable branch contains the DT binding and clock defines as need for the Qualcomm SM8450 global clock controller driver.
2021-12-16dt-bindings: pinctrl: Add StarFive pinctrl definitionsEmil Renner Berthing1-0/+275
Add definitons for pins and GPIO input, output and output enable signals on the StarFive JH7100 SoC. Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
2021-12-16dt-bindings: reset: Add StarFive JH7100 reset definitionsGeert Uytterhoeven1-0/+126
Add all resets for the StarFive JH7100 reset controller. Based on work by Ahmad Fatoum for Barebox, with "JH7100_" prefixes added to all definitions. Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
2021-12-16dt-bindings: clock: starfive: Add JH7100 clock definitionsGeert Uytterhoeven1-0/+202
Add all clock outputs for the StarFive JH7100 clock generator. Based on work by Ahmad Fatoum for Barebox, with "JH7100_" prefixes added to all definitions. Acked-by: Rob Herring <robh@kernel.org> Acked-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
2021-12-16dt-bindings: memory: tegra: Add Tegra234 supportThierry Reding2-0/+41
Document the variant of the memory controller and external memory controllers found on Tegra234 and add some memory client and SMMU stream ID definitions for use in device tree files. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16dt-bindings: Update headers for Tegra234Mikko Perttunen2-5/+24
Add a few more clocks that will be used in follow-up patches to enable more functionality on Tegra234. Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-15Merge branch 'icc-qcm2290' into icc-nextGeorgi Djakov1-0/+94
Add support for QCM2290 including a few prep changes. * icc-qcm2290 interconnect: icc-rpm: Define ICC device type interconnect: icc-rpm: Add QNOC type QoS support interconnect: icc-rpm: Support child NoC device probe dt-bindings: interconnect: Add Qualcomm QCM2290 NoC support interconnect: qcom: Add QCM2290 driver support Link: https://lore.kernel.org/r/20211215002324.1727-1-shawn.guo@linaro.org Signed-off-by: Georgi Djakov <djakov@kernel.org>
2021-12-15dt-bindings: interconnect: Add Qualcomm QCM2290 NoC supportShawn Guo1-0/+94
Add bindings for Qualcomm QCM2290 Network-On-Chip interconnect devices. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20211215002324.1727-5-shawn.guo@linaro.org Signed-off-by: Georgi Djakov <djakov@kernel.org>
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