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2020-04-09Merge tag 'riscv-for-linus-5.7' of ↵Linus Torvalds1-0/+20
git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux Pull RISC-V updates from Palmer Dabbelt: "This contains a handful of new features: - Partial support for the Kendryte K210. There are still a few outstanding issues that I have patches for, but I don't actually have a board to test them so they're not included yet. - SBI v0.2 support. - Fixes to support for building with LLVM-based toolchains. The resulting images are known not to boot yet. I don't anticipate a part two, but I'll probably have something early in the RCs to finish up the K210 support" * tag 'riscv-for-linus-5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux: (38 commits) riscv: create a loader.bin boot image for Kendryte SoC riscv: Kendryte K210 default config riscv: Add Kendryte K210 device tree riscv: Select required drivers for Kendryte SOC riscv: Add Kendryte K210 SoC support riscv: Add SOC early init support riscv: Unaligned load/store handling for M_MODE RISC-V: Support cpu hotplug RISC-V: Add supported for ordered booting method using HSM RISC-V: Add SBI HSM extension definitions RISC-V: Export SBI error to linux error mapping function RISC-V: Add cpu_ops and modify default booting method RISC-V: Move relocate and few other functions out of __init RISC-V: Implement new SBI v0.2 extensions RISC-V: Introduce a new config for SBI v0.1 RISC-V: Add SBI v0.2 extension definitions RISC-V: Add basic support for SBI v0.2 RISC-V: Mark existing SBI as 0.1 SBI. riscv: Use macro definition instead of magic number riscv: Add support to dump the kernel page tables ...
2020-04-05Merge tag 'clk-for-linus' of ↵Linus Torvalds15-10/+678
git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux Pull clk updates from Stephen Boyd: "There's not much to see in the core framework this time around. Instead the majority of the diff is the normal collection of driver additions for new SoCs and non-critical clk data fixes and updates. The framework must be middle aged. The two biggest directories in the diffstat show that the Qualcomm and Unisoc support added a handful of big drivers for new SoCs but that's not really the whole story because those new drivers tend to add large numbers of lines of clk data. There's a handful of AT91 clk drivers added this time around too and a bunch of improvements to drivers like the i.MX driver. All around lots of updates and fixes in various clk drivers which is good to see. The core framework has only one real major change which has been baking in next for the past couple months. It fixes the framework so that it stops caching a clk's phase when the phase clk_op returns an error. Before this change we would consider some negative errno as a phase and that just doesn't make sense. Core: - Don't show clk phase when it is invalid New Drivers: - Add support for Unisoc SC9863A clks - Qualcomm SM8250 RPMh and MSM8976 RPM clks - Qualcomm SM8250 Global Clock Controller (GCC) support - Qualcomm SC7180 Modem Clock Controller (MSS CC) support - EHRPWM's TimeBase clock(TBCLK) for TI AM654 SoCs - Support PMC clks on at91sam9n12, at91rm9200, sama5d3, and at91sam9g45 SoCs Updates: - GPU GX GDSC support on Qualcomm sc7180 - Fixes and improvements for the Marvell MMP2/MMP3 SoC clk drivers - A series from Anson to convert i.MX8 clock bindings to json-schema - Update i.MX pll14xx driver to include new frequency entries for pll1443x table, and return error for invalid PLL type - Add missing of_node_put() call for a number of i.MX clock drivers - Drop flag CLK_IS_CRITICAL from 'A53_CORE' mux clock, as we already have the flag on its child cpu clock - Fix a53 cpu clock for i.MX8 drivers to get it source from ARM PLL via CORE_SEL slice, and source from A53 CCM clk root when we need to change ARM PLL frequency. Thus, we can support core running above 1GHz safely - Update i.MX pfdv2 driver to check zero rate and use determine_rate for getting the best rate - Add CLKO2 for imx8mm, SNVS clock for imx8mn, and PXP clock for imx7d - Remove PMC clks from Tegra clk driver - Improved clock/reset handling for the Renesas R-Car USB2 Clock Selector - Conversion to json-schema of the Renesas CPG/MSSR DT bindings - Add Crypto clocks on Renesas R-Car M3-W/W+, M3-N, E3, and D3 - Add RPC (QSPI/HyperFLASH) clocks on Renesas R-Car H3, M3-W/W+, and M3-N - Update Amlogic audio clock gate hierarchy for meson8 and gxbb - Update Amlogic g12a spicc clock sources - Support for Ingenic X1000 TCU clks" * tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (146 commits) clk: sprd: fix to get a correct ibias of pll dt-bindings: imx8mm-clock: Fix the file path dt-bindings: imx8mq-clock: Fix the file path clk: qcom: rpmh: Drop unnecessary semicolons clk: qcom: rpmh: Simplify clk_rpmh_bcm_send_cmd() clk: tegra: Use NULL for pointer initialization clk: sprd: add clocks support for SC9863A clk: sprd: support to get regmap from parent node clk: sprd: Add macros for referencing parents without strings clk: sprd: Add dt-bindings include file for SC9863A dt-bindings: clk: sprd: add bindings for sc9863a clock controller dt-bindings: clk: sprd: rename the common file name sprd.txt to SoC specific clk: sprd: add gate for pll clocks MAINTAINERS: dt: update reference for arm-integrator.txt clk: mmp2: Fix bit masks for LCDC I/O and pixel clocks clk: mmp2: Add clock for fifth SD HCI on MMP3 dt-bindings: marvell,mmp2: Add clock id for the fifth SD HCI on MMP3 clk: mmp2: Add clocks for the thermal sensors dt-bindings: marvell,mmp2: Add clock ids for the thermal sensors clk: mmp2: add the GPU clocks ...
2020-04-04Merge tag 'arm-dt-5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/socLinus Torvalds4-1/+11
Pull ARM devicetree updates from Arnd Bergmann: "Most of the commits are for additional hardware support and minor fixes for existing machines for all the usual platforms: qcom, amlogic, at91, gemini, mediatek, ti, socfpga, i.mx, layerscape, uniphier, rockchip, exynos, ux500, mvebu, tegra, stm32, renesas, sunxi, broadcom, omap, and versatile. The conversion of binding files to machine-readable yaml format continues, along with fixes found during the validation. Andre Przywara takes over maintainership for the old Calxeda Highbank platform and provides a number of updates. The OMAP2+ platforms see a continued move from platform data into dts files, for many devices that relied on a mix of auxiliary data in addition to the DT description A moderate number of new SoCs and machines are added, here is a full list: - Two new Qualcomm SoCs with their evaluation boards: Snapdragon 865 (SM8250) is the current high-end phone chip, and IPQ6018 is a new WiFi-6 router chip. - Mediatek MT8516 application processor SoC for voice assistants, along with the "pumpkin" development board - NXP i.MX8M Plus SoC, a variant of the popular i.MX8M, along with an evaluation board. - Kontron "sl28" board family based on NXP LS1028A - Eleven variations of the new i.MX6 TechNexion Pico board, combining the "dwarf", "hobbit", "nymph" and "pi" baseboards with i.MX6/i.MX7 SoM carriers - Three additional variants of the Toradex Colibri board family, all based on versions of the NXP i.MX7. - The Pinebook Pro laptop based on Rockchip RK3399 - Samsung S7710 Galaxy Xcover 2, a 2013 vintage Android phone based on the ST-Ericsson u8500 platform - DH Electronics DHCOM SoM and PDK2 rev. 400 carrier based on STMicroelectronics stm32mp157 - Renesas M3ULCB starter kit for R-Car M3-W+ - Hoperun HiHope development board with Renesas RZ/G2M - Pine64 PineTab tablet and PinePhone phone, both based on Allwinner A64 - Linutronix Testbox v2 for the Lamobo R1 router, based on Allwinner A20 - PocketBook Touch Lux 3 ebook reader, based on Allwinner A13" * tag 'arm-dt-5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (520 commits) ARM: dts: ux500: Fix missing node renames arm64: dts: Revert "specify console via command line" MAINTAINERS: Update Calxeda Highbank maintainership arm: dts: calxeda: Group port-phys and sgpio-gpio items arm: dts: calxeda: Fix interrupt grouping arm: dts: calxeda: Provide UART clock arm: dts: calxeda: Basic DT file fixes arm64: dts: specify console via command line ARM: dts: at91: sama5d27_wlsom1_ek: add USB device node ARM: dts: gemini: Add thermal zone to DIR-685 ARM: dts: gemini: Rename IDE nodes ARM: socfpga: arria10: Add ptp_ref clock to ethernet nodes arm64: dts: ti: k3-j721e-mcu: add scm node and phy-gmii-sel nodes arm64: dts: ti: k3-am65-mcu: add phy-gmii-sel node arm64: dts: ti: k3-am65-mcu: Add DMA entries for ADC arm64: dts: ti: k3-am65-main: Add DMA entries for main_spi0 arm64: dts: ti: k3-j721e-mcu-wakeup: Add DMA entries for ADC arm64: dts: ti: k3-am65: Add clocks to dwc3 nodes arm64: dts: meson-g12b-odroid-n2: add SPIFC controller node arm64: dts: khadas-vim3: add SPIFC controller node ...
2020-04-04Merge branches 'clk-unisoc', 'clk-tegra', 'clk-qcom' and 'clk-imx' into clk-nextStephen Boyd17-13/+678
- Add support for Unisoc SC9863A clks - GPU GX GDSC support on Qualcomm sc7180 - Qualcomm SM8250 RPMh and MSM8976 RPM clks - Qualcomm SM8250 Global Clock Controller (GCC) support - Qualcomm SC7180 Modem Clock Controller (MSS CC) support * clk-unisoc: clk: sprd: fix to get a correct ibias of pll clk: sprd: add clocks support for SC9863A clk: sprd: support to get regmap from parent node clk: sprd: Add macros for referencing parents without strings clk: sprd: Add dt-bindings include file for SC9863A dt-bindings: clk: sprd: add bindings for sc9863a clock controller dt-bindings: clk: sprd: rename the common file name sprd.txt to SoC specific clk: sprd: add gate for pll clocks * clk-tegra: clk: tegra: Use NULL for pointer initialization clk: tegra: Remove audio clocks configuration from clock driver clk: tegra: Remove tegra_pmc_clk_init along with clk ids clk: tegra: Remove CLK_M_DIV fixed clocks clk: tegra: Fix Tegra PMC clock out parents clk: tegra: Add Tegra OSC to clock lookup clk: tegra: Add support for OSC_DIV fixed clocks dt-bindings: soc: tegra-pmc: Add ID for Tegra PMC 32 kHz blink clock dt-bindings: soc: tegra-pmc: Add Tegra PMC clock bindings dt-bindings: tegra: Convert Tegra PMC bindings to YAML dt-bindings: clock: tegra: Add IDs for OSC clocks * clk-qcom: (21 commits) clk: qcom: rpmh: Drop unnecessary semicolons clk: qcom: rpmh: Simplify clk_rpmh_bcm_send_cmd() clk: qcom: gcc: Add USB3 PIPE clock and GDSC for SM8150 ipq806x: gcc: Added the enable regs and mask for PRNG clk: qcom: Add modem clock controller driver for SC7180 clk: qcom: gcc: Add support for modem clocks in GCC dt-bindings: clock: Add YAML schemas for the QCOM MSS clock bindings clk: qcom: clk-rpm: add missing rpm clk for ipq806x clk: qcom: gcc: Add global clock controller driver for SM8250 dt-bindings: clock: Add SM8250 GCC clock bindings clk: qcom: clk-alpha-pll: Add support for controlling Lucid PLLs clk: qcom: clk-alpha-pll: Refactor trion PLL clk: qcom: clk-alpha-pll: Use common names for defines dt-bindings: clock: rpmcc: Document msm8976 compatible clk: qcom: smd: Add support for MSM8976 rpm clocks clk: qcom: clk-rpmh: Wait for completion when enabling clocks clk: qcom: rpmh: Add support for RPMH clocks on SM8250 dt-bindings: clock: Add RPMHCC bindings for SM8250 clk: qcom: alpha-pll: Make error prints more informative clk: qcom: gpucc: Add support for GX GDSC for SC7180 ... * clk-imx: (43 commits) dt-bindings: imx8mm-clock: Fix the file path dt-bindings: imx8mq-clock: Fix the file path clk: imx: clk-gate2: Pass the device to the register function clk: imx7d: Add PXP clock clk: imx8mq: A53 core clock no need to be critical clk: imx8mp: A53 core clock no need to be critical clk: imx8mm: A53 core clock no need to be critical clk: imx8mn: A53 core clock no need to be critical clk: imx: pllv4: use prepare/unprepare clk: imx: pfdv2: determine best parent rate clk: imx: pfdv2: switch to use determine_rate clk: imx: Fix division by zero warning on pfdv2 clk: imx: clk-sscg-pll: Drop unnecessary initialization clk: imx: pll14xx: Return error if pll type is invalid clk: imx: imx8mp: fix a53 cpu clock clk: imx: imx8mn: fix a53 cpu clock clk: imx: imx8mm: fix a53 cpu clock clk: imx: imx8mq: fix a53 cpu clock clk: imx8mp: Rename the IMX8MP_CLK_HDMI_27M clock clk: imx8mn: Remove unused includes ...
2020-04-04Merge branches 'clk-ti', 'clk-ingenic', 'clk-typo', 'clk-at91', 'clk-mmp2' ↵Stephen Boyd1-0/+13
and 'clk-arm-icst' into clk-next - EHRPWM's TimeBase clock(TBCLK) for TI AM654 SoCs - Support PMC clks on at91sam9n12, at91rm9200, sama5d3, and at91sam9g45 SoCs - Fixes and improvements for the Marvell MMP2/MMP3 SoC clk drivers * clk-ti: clk: keystone: Add new driver to handle syscon based clocks dt-bindings: clock: Add binding documentation for TI EHRPWM TBCLK * clk-ingenic: clk: ingenic/TCU: Fix round_rate returning error clk: ingenic/jz4770: Exit with error if CGU init failed clk: JZ4780: Add function for enable the second core. clk: Ingenic: Add support for TCU of X1000. * clk-typo: clk: Fix trivia typo in comment exlusive => exclusive * clk-at91: clk: at91: add at91rm9200 pmc driver clk: at91: add at91sam9n12 pmc driver clk: at91: add sama5d3 pmc driver clk: at91: add at91sam9g45 pmc driver clk: at91: usb: introduce num_parents in driver's structure clk: at91: usb: use proper usbs_mask clk: at91: sam9x60: fix usb clock parents clk: at91: usb: continue if clk_hw_round_rate() return zero clk: at91: sam9x60: Don't use audio PLL * clk-mmp2: clk: mmp2: Fix bit masks for LCDC I/O and pixel clocks clk: mmp2: Add clock for fifth SD HCI on MMP3 dt-bindings: marvell,mmp2: Add clock id for the fifth SD HCI on MMP3 clk: mmp2: Add clocks for the thermal sensors dt-bindings: marvell,mmp2: Add clock ids for the thermal sensors clk: mmp2: add the GPU clocks dt-bindings: marvell,mmp2: Add clock ids for the GPU clocks clk: mmp2: Add PLLs that are available on MMP3 dt-bindings: marvell,mmp2: Add clock ids for MMP3 PLLs clk: mmp2: Check for MMP3 dt-bindings: clock: Add MMP3 compatible string clk: mmp2: Stop pretending PLL outputs are constant clk: mmp2: Add support for PLL clock sources dt-bindings: clock: Convert marvell,mmp2-clock to json-schema clk: mmp2: Constify some strings clk: mmp2: Remove a unused prototype * clk-arm-icst: MAINTAINERS: dt: update reference for arm-integrator.txt clk: versatile: Add device tree probing for IM-PD1 clocks clk: versatile: Export icst_clk_setup() dt-bindings: clock: Create YAML schema for ICST clocks
2020-04-04Merge branches 'clk-phase-errors', 'clk-amlogic', 'clk-renesas' and ↵Stephen Boyd3-1/+4
'clk-allwinner' into clk-next - Don't show clk phase when it is invalid * clk-phase-errors: clk: rockchip: fix mmc get phase clk: Fix phase init check clk: Bail out when calculating phase fails during clk registration clk: Move rate and accuracy recalc to mostly consumer APIs clk: Use 'parent' to shorten lines in __clk_core_init() clk: Don't cache errors from clk_ops::get_phase() * clk-amlogic: clk: meson: meson8b: set audio output clock hierarchy clk: meson: g12a: add support for the SPICC SCLK Source clocks dt-bindings: clk: g12a-clkc: add SPICC SCLK Source clock IDs clk: meson: gxbb: set audio output clock hierarchy clk: meson: gxbb: add the gxl internal dac gate dt-bindings: clk: meson: add the gxl internal dac gate * clk-renesas: dt-bindings: clock: renesas: cpg-mssr: Convert to json-schema clk: renesas: rcar-usb2-clock-sel: Add reset_control clk: renesas: rcar-usb2-clock-sel: Add multiple clocks management dt-bindings: clock: renesas: rcar-usb2-clock-sel: Add power-domains and resets properties dt-bindings: clock: renesas: rcar-usb2-clock-sel: Fix clock[-name]s properties clk: renesas: Remove use of ARCH_R8A7795 clk: renesas: r8a77965: Add RPC clocks clk: renesas: r8a7796: Add RPC clocks clk: renesas: r8a7795: Add RPC clocks clk: renesas: rcar-gen3: Add CCREE clocks * clk-allwinner: clk: sunxi-ng: sun8i-de2: Sort structures clk: sunxi-ng: sun8i-de2: Add R40 specific quirks clk: sunxi-ng: sun8i-de2: Add rotation core clocks and reset for A83T clk: sunxi-ng: sun8i-de2: Don't reuse A83T resets clk: sunxi-ng: sun8i-de2: H6 doesn't have rotate core clk: sunxi-ng: sun8i-de2: Add rotation core clocks and reset for A64 clk: sunxi-ng: sun8i-de2: Split out H5 definitions clk: sunxi-ng: a64: Export MBUS clock
2020-04-04Merge tag 'arm-soc-5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/socLinus Torvalds4-4/+12
Pull ARM SoC updates from Arnd Bergmann: "The code changes are mostly for 32-bit platforms and include: - Lots of updates for the Nvidia Tegra platform, including cpuidle, pmc, and dt-binding changes - Microchip at91 power management updates for the recently added sam9x60 SoC - Treewide setup_irq deprecation by afzal mohammed - STMicroelectronics stm32 gains earlycon support - Renesas platforms with Cortex-A9 can now use the global timer - Some TI OMAP2+ platforms gain cpuidle support - Various cleanups for the i.MX6 and Orion platforms, as well as Kconfig files across all platforms" * tag 'arm-soc-5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (75 commits) ARM: qcom: Add support for IPQ40xx ARM: mmp: replace setup_irq() by request_irq() ARM: cns3xxx: replace setup_irq() by request_irq() ARM: spear: replace setup_irq() by request_irq() ARM: ep93xx: Replace setup_irq() by request_irq() ARM: iop32x: replace setup_irq() by request_irq() arm: mach-dove: Mark dove_io_desc as __maybe_unused ARM: orion: replace setup_irq() by request_irq() ARM: debug: stm32: add UART early console support for STM32MP1 ARM: debug: stm32: add UART early console support for STM32H7 ARM: debug: stm32: add UART early console configuration for STM32F7 ARM: debug: stm32: add UART early console configuration for STM32F4 cpuidle: tegra: Disable CC6 state if LP2 unavailable cpuidle: tegra: Squash Tegra114 driver into the common driver cpuidle: tegra: Squash Tegra30 driver into the common driver cpuidle: Refactor and move out NVIDIA Tegra20 driver into drivers/cpuidle ARM: tegra: cpuidle: Remove unnecessary memory barrier ARM: tegra: cpuidle: Make abort_flag atomic ARM: tegra: cpuidle: Handle case where secondary CPU hangs on entering LP2 ARM: tegra: Make outer_disable() open-coded ...
2020-04-03Merge branch 'arm/late' into arm/dtArnd Bergmann1-0/+5
Include originally "late" updates for OMAP and Qualcomm, now that it's not late any more. * arm/late: (122 commits) ARM: OMAP2+: Drop legacy platform data for ti81xx edma ARM: dts: Configure interconnect target module for ti816x edma ARM: dts: Configure interconnect target module for dm814x tptc3 ARM: dts: Configure interconnect target module for dm814x tptc2 ARM: dts: Configure interconnect target module for dm814x tptc1 ARM: dts: Configure interconnect target module for dm814x tptc0 ARM: dts: Configure interconnect target module for dm814x tpcc ARM: OMAP2+: Drop legacy platform data for dm814x cpsw ARM: dts: Configure interconnect target module for dm814x cpsw clk: ti: Fix dm814x clkctrl for ethernet arm64: dts: qcom: sdm845-mtp: Relocate remoteproc firmware arm64: dts: sdm845: add IPA information arm64: dts: qcom: db845c: add analog audio support arm64: dts: qcom: sdm845: add pinctrl nodes for quat i2s arm64: dts: qcom: c630: Enable audio support arm64: dts: qcom: sdm845: add apr nodes arm64: dts: qcom: sdm845: add slimbus nodes arm64: dts: qcom: sc7180: Update reg names for SDHC arm64: dts: qcom: qcs404: Enable CQE support for eMMC arm64: dts: msm8916: Add fastrpc node ...
2020-04-03riscv: Add Kendryte K210 device treeDamien Le Moal1-0/+20
Add a generic device tree for Kendryte K210 SoC based boards. This is for now a very simple device tree describing the core elements of the SoC. This is suitable (and tested) for the Kendryte KD233 development board, the Sipeed MAIX M1 Dan Dock board and the Sipeed MAIXDUINO board. Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com> Reviewed-by: Sean Anderson <seanga2@gmail.com> Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
2020-03-26Merge tag 'amlogic-dt64-2' of ↵Arnd Bergmann2-0/+3
git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into arm/dt arm64: dts: Amlogic updates for v5.7 (round 2) - G12[ab]: add SPI support, enable on odroid-n2 * tag 'amlogic-dt64-2' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic: arm64: dts: meson-g12b-odroid-n2: add SPIFC controller node arm64: dts: khadas-vim3: add SPIFC controller node arm64: dts: meson-g12: add the SPIFC nodes arm64: dts: meson-g12: split emmc pins to select 4 or 8 bus width arm64: dts: meson-g12-common: add spicc controller nodes dt-bindings: clk: g12a-clkc: add SPICC SCLK Source clock IDs dt-bindings: clk: meson: add the gxl internal dac gate Link: https://lore.kernel.org/r/7hftdyhfq4.fsf@baylibre.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-03-26Merge tag 'imx-dt64-5.7' of ↵Arnd Bergmann1-1/+3
git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt i.MX arm64 DTS update for 5.7: - New support for Kontron LS1028A based boards and NXP i.MX8MP EVK. - Add Ethernet PHY reset GPIO for imx8mm-evk and imx8mq-evk board. - Add gpio-fan, thermal and Ethernet support for imx8mq-phanbell board. - Add SNVS clock description to pwrkey device for i.MX8 SoCs. - A number of updates on librem5-devkit board to add audio, proximity sensor, lsm9ds1 mount matrix support, and improve WoWWAN, DVFS, SD devices as well. - A series of patches from Anson Huang to update i.MX8 EVK boards for support of I2C PCA6416, thermal, GPIO LED, OPP table etc. - Add PCIe device nodes for LX2160A and LS1028A SoC. - Add FSPI deivce support for LX2160A evaluation boards. - Add EEPROM and LTC3882 regulator support for lx2160a-cex7 board. - Other small and random updates on LS1028A and i.MX8 support. * tag 'imx-dt64-5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (63 commits) arm64: dts: ls1028a: disable the felix switch by default arm64: dts: imx8mp: Add snvs clock to powerkey arm64: dts: imx8mn: Add snvs clock to powerkey arm64: dts: ls1028a: Add PCIe controller DT nodes arm64: dts: ls1028a: sl28: add support for variant 2 arm64: dts: ls1028a: sl28: expose switch ports in KBox A-230-LS arm64: dts: ls1028a: sl28: fix on-board EEPROMS arm64: dts: freescale: sl28: add SPI flash arm64: dts: imx8m: fix aips dts node arm64: dts: imx8mn: Add CPU thermal zone support arm64: dts: imx8mm: Add thermal zone support arm64: dts: imx8mq-phanbell: Fix Ethernet PHY post-reset duration arm64: dts: enable fspi in imx8mm dts arm64: dts: imx8mn: align name for crypto child nodes arm64: dts: lx2160aqds: Add FSPI node properties arm64: dts: lx2160ardb: Update FSPI node properties arm64: dts: imx8mq-phanbell: Add gpio-fan/thermal support arm64: dts: layerscape: add iommu-map property to pci nodes arm64: dts: imx8mp-evk: Enable pca6416 on i2c3 bus arm64: dts: imx8mp-evk: Add i2c3 support ... Link: https://lore.kernel.org/r/20200318051918.32579-5-shawnguo@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-03-25clk: sprd: Add dt-bindings include file for SC9863AChunyan Zhang1-0/+334
This file defines all SC9863A clock indexes, it should be included in the device tree in which there's device using the clocks. Signed-off-by: Chunyan Zhang <chunyan.zhang@unisoc.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lkml.kernel.org/r/20200304072730.9193-5-zhang.lyra@gmail.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2020-03-21dt-bindings: marvell,mmp2: Add clock id for the fifth SD HCI on MMP3Lubomir Rintel1-0/+1
There's one extra SDHCI on MMP3, used by the internal SD card on OLPC XO-4. Add a clock for it. Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Link: https://lkml.kernel.org/r/20200309194254.29009-16-lkundrak@v3.sk Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2020-03-21dt-bindings: marvell,mmp2: Add clock ids for the thermal sensorsLubomir Rintel1-0/+4
There seems to be a single thermal sensor block on MMP2 and a couple more on MMP3. Add definitions for their respective clocks. Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Link: https://lkml.kernel.org/r/20200309194254.29009-14-lkundrak@v3.sk Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2020-03-21dt-bindings: marvell,mmp2: Add clock ids for the GPU clocksLubomir Rintel1-0/+5
MMP2 has a single GC860 core while MMP3 has a GC2000 and a GC300. On both platforms there's an AXI bus interface clock that's common for all GPUs and each GPU core has a separate clock. Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Link: https://lkml.kernel.org/r/20200309194254.29009-12-lkundrak@v3.sk Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2020-03-21dt-bindings: marvell,mmp2: Add clock ids for MMP3 PLLsLubomir Rintel1-0/+3
MMP3 variant provides some more clocks. Add respective IDs. Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Acked-by: Rob Herring <robh@kernel.org> Link: https://lkml.kernel.org/r/20200309194254.29009-9-lkundrak@v3.sk Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2020-03-21clk: qcom: gcc: Add USB3 PIPE clock and GDSC for SM8150Wesley Cheng1-0/+4
This adds the USB3 PIPE clock and GDSC structures, so that the USB driver can vote for these resources to be enabled/disabled when required. Both are needed for SS and HS USB paths to operate properly. The GDSC will allow the USB system to be brought out of reset, while the PIPE clock is needed for data transactions between the PHY and controller. Signed-off-by: Wesley Cheng <wcheng@codeaurora.org> Link: https://lkml.kernel.org/r/1584478412-7798-2-git-send-email-wcheng@codeaurora.org Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2020-03-21dt-bindings: clock: Add YAML schemas for the QCOM MSS clock bindingsTaniya Das2-1/+18
The Modem Subsystem clock provider have a bunch of generic properties that are needed in a device tree. Add a YAML schemas for those. Add clock ids for GCC MSS and MSS clocks which are required to bring the modem out of reset. Signed-off-by: Taniya Das <tdas@codeaurora.org> Link: https://lkml.kernel.org/r/1584596131-22741-2-git-send-email-tdas@codeaurora.org Reviewed-by: Rob Herring <robh@kernel.org> Tested-by: Sibi Sankar <sibis@codeaurora.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2020-03-17clk: ti: Fix dm814x clkctrl for ethernetTony Lindgren1-0/+5
We are missing alwon ethernet clock for dm814x and this prevents us from probing the CPSW with device tree only data. Looks like Ethernet currently only works if it has been enabled in the bootloader. Looks like relying on the bootloader clocks is not an issue with the mainline kernel currently, but it will be an issue when configuring CPSW Ethernet to probe with device tree data only as we will be managing the clocks. Fixes: 26ca2e973844 ("clk: ti: dm814: add clkctrl clock data") Cc: linux-clk@vger.kernel.org Cc: Graeme Smecher <gsmecher@threespeedlogic.com> Cc: Grygorii Strashko <grygorii.strashko@ti.com> Cc: Michael Turquette <mturquette@baylibre.com> Cc: Stephen Boyd <sboyd@kernel.org> Cc: Tero Kristo <t-kristo@ti.com> Acked-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-03-16clk: imx7d: Add PXP clockLaurent Pinchart1-1/+2
The PXP has a single CCGR clock gate, gating both the IPG_CLK_ROOT and the MAIN_AXI_CLK_ROOT. Add a single clock to cover both. Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-03-13clk: qcom: clk-rpm: add missing rpm clk for ipq806xAnsuel Smith1-0/+4
Add missing definition of rpm clk for ipq806x soc Signed-off-by: John Crispin <john@phrozen.org> Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com> Acked-by: John Crispin <john@phrozen.org> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lkml.kernel.org/r/20200310143756.244-1-ansuelsmth@gmail.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2020-03-10dt-bindings: clock: Add SM8250 GCC clock bindingsTaniya Das1-0/+271
Add device tree bindings for global clock controller on SM8250 SoCs. Signed-off-by: Taniya Das <tdas@codeaurora.org> Signed-off-by: Venkata Narendra Kumar Gutta <vnkgutta@codeaurora.org> Signed-off-by: Vinod Koul <vkoul@kernel.org> Link: https://lkml.kernel.org/r/20200224045003.3783838-5-vkoul@kernel.org Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Tested-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2020-02-24clk: imx: imx8mp: fix a53 cpu clockPeng Fan1-1/+2
The A53 CCM clk root only accepts input up to 1GHz, CCM A53 root signoff timing is 1Ghz, however the A53 core which sources from CCM root could run above 1GHz which voilates the CCM. There is a CORE_SEL slice before A53 core, we need configure the CORE_SEL slice source from ARM PLL, not A53 CCM clk root. The A53 CCM clk root should only be used when need to change ARM PLL frequency. Add arm_a53_core clk that could source from arm_a53_div and arm_pll_out. Configure a53 ccm root sources from 800MHz sys pll Configure a53 core sources from arm_pll_out Mark arm_a53_core as critical clk Reviewed-by: Jacky Bai <ping.bai@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-02-24clk: imx: imx8mn: fix a53 cpu clockPeng Fan1-1/+3
The A53 CCM clk root only accepts input up to 1GHz, CCM A53 root signoff timing is 1Ghz, however the A53 core which sources from CCM root could run above 1GHz which voilates the CCM. There is a CORE_SEL slice before A53 core, we need configure the CORE_SEL slice source from ARM PLL, not A53 CCM clk root. The A53 CCM clk root should only be used when need to change ARM PLL frequency. Add arm_a53_core clk that could source from arm_a53_div and arm_pll_out. Configure a53 ccm root sources from 800MHz sys pll Configure a53 core sources from arm_pll_out Mark arm_a53_core as critical clk. Fixes: 96d6392b54db ("clk: imx: Add support for i.MX8MN clock driver") Reviewed-by: Jacky Bai <ping.bai@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-02-24clk: imx: imx8mm: fix a53 cpu clockPeng Fan1-1/+3
The A53 CCM clk root only accepts input up to 1GHz, CCM A53 root signoff timing is 1Ghz, however the A53 core which sources from CCM root could run above 1GHz which voilates the CCM. There is a CORE_SEL slice before A53 core, we need configure the CORE_SEL slice source from ARM PLL, not A53 CCM clk root. The A53 CCM clk root should only be used when need to change ARM PLL frequency. Add arm_a53_core clk that could source from arm_a53_div and arm_pll_out. Configure a53 ccm root sources from 800MHz sys pll Configure a53 core sources from arm_pll_out Mark arm_a53_core as critical clock Fixes: ba5625c3e272 ("clk: imx: Add clock driver support for imx8mm") Reviewed-by: Jacky Bai <ping.bai@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-02-24clk: imx: imx8mq: fix a53 cpu clockPeng Fan1-1/+3
The A53 CCM clk root only accepts input up to 1GHz, CCM A53 root signoff timing is 1Ghz, however the A53 core which sources from CCM root could run above 1GHz which violates the CCM. There is a CORE_SEL slice before A53 core, we need to configure the CORE_SEL slice source from ARM PLL, not A53 CCM clk root. The A53 CCM clk root should only be used when need to change ARM PLL frequency. Add arm_a53_core clk that could source from arm_a53_div and arm_pll_out. Configure a53 ccm root sources from 800MHz sys pll Configure a53 core sources from arm_pll_out Mark arm_a53_core as critical clock Fixes: db27e40b27f1 ("clk: imx8mq: Add the missing ARM clock") Reviewed-by: Jacky Bai <ping.bai@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-02-24clk: imx8mp: Rename the IMX8MP_CLK_HDMI_27M clockAnson Huang1-1/+1
On i.MX8MP, internal HDMI 27M clock is actually 24MHz, so rename the IMX8MP_CLK_HDMI_27M to IMX8MP_CLK_HDMI_24M. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-02-19dt-bindings: clk: g12a-clkc: add SPICC SCLK Source clock IDsNeil Armstrong1-0/+2
Add clock ids used by the SPICC Controllers of the G12A and compatible SoCs Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
2020-02-17dt-bindings: clock: tegra: Add IDs for OSC clocksSowjanya Komatineni4-4/+12
Tegra has OSC, OSC_DIV2 and OSC_DIV4 clocks from OSC pads which are the possible parents of Tegra PMC clocks clk_out_1, clk_out_2, and clk_out_3 for Tegra30 through Tegra210. So, this patch adds ids for these clocks. Tested-by: Dmitry Osipenko <digetx@gmail.com> Reviewed-by: Dmitry Osipenko <digetx@gmail.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-02-17clk: imx8mn: Fix incorrect clock definesAnson Huang1-2/+2
IMX8MN_CLK_I2C4 and IMX8MN_CLK_UART1's index definitions are incorrect, fix them. Fixes: 1e80936a42e1 ("dt-bindings: imx: Add clock binding doc for i.MX8MN") Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-02-17clk: imx8mm: Add CLKO2 supportFabio Estevam1-1/+3
Add CLKO2 support, which is useful for debugging purposes. Signed-off-by: Fabio Estevam <festevam@gmail.com> Reviewed-by: Abel Vesa <abel.vesa@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-02-14clk: imx: imx8mn: use imx8m_clk_hw_composite_corePeng Fan1-1/+3
Use imx8m_clk_hw_composite_core to simplify code. Add new definitions, and X_SRC/CG/DIV will be alias to the new definitions for backwards compatibility Reviewed-by: Abel Vesa <abel.vesa@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Leonard Crestez <leonard.crestez@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-02-14clk: imx: imx8mm: use imx8m_clk_hw_composite_corePeng Fan1-1/+6
Use imx8m_clk_hw_composite_core to simplify code. Add new definitions, and X_SRC/CG/DIV will be alias to the new definitions for backwards compatibility Reviewed-by: Abel Vesa <abel.vesa@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Leonard Crestez <leonard.crestez@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-02-14clk: imx: imx8mq: use imx8m_clk_hw_composite_corePeng Fan1-1/+6
Use imx8m_clk_hw_composite_core to simplify code. Add new definitions, and X_SRC/CG/DIV will be alias to the new definitions for backwards compatibility Reviewed-by: Abel Vesa <abel.vesa@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Leonard Crestez <leonard.crestez@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-02-13dt-bindings: clk: meson: add the gxl internal dac gateJerome Brunet1-0/+1
Add the gxl ACODEC clock id to the gxbb clock controller bindings Acked-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
2020-02-13dt-bindings: clock: imx8mn: add SNVS clockHoria Geantă1-1/+3
Add macro for the SNVS clock of the i.MX8MN. Signed-off-by: Horia Geantă <horia.geanta@nxp.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-02-13dt-bindings: clock: Add RPMHCC bindings for SM8250Taniya Das1-1/+3
Add bindings and update documentation for clock rpmh driver on SM8250. Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Vinod Koul <vkoul@kernel.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Taniya Das <tdas@codeaurora.org> Signed-off-by: Venkata Narendra Kumar Gutta <vnkgutta@codeaurora.org> Link: https://lkml.kernel.org/r/1579905147-12142-2-git-send-email-vnkgutta@codeaurora.org Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2020-02-13dt-bindings: clk: qcom: Add support for GPU GX GDSCRTaniya Das1-1/+2
In the cases where the GPU SW requires to use the GX GDSCR add support for the same. Signed-off-by: Taniya Das <tdas@codeaurora.org> Link: https://lkml.kernel.org/r/1581307266-26989-1-git-send-email-tdas@codeaurora.org Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2020-02-11clk: sunxi-ng: a64: Export MBUS clockJernej Skrabec1-1/+1
MBUS clock will be referenced in MBUS controller node. Export it. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2020-02-09Merge tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/socLinus Torvalds2-0/+22
Pull ARM SoC late updates from Olof Johansson: "This is some material that we picked up into our tree late, or that had more complex dependencies on more than one topic branch that makes sense to keep separately. - TI support for secure accelerators and hwrng on OMAP4/5 - TI camera changes for dra7 and am437x and SGX improvement due to better reset control support on am335x, am437x and dra7 - Davinci moves to proper clocksource on DM365, and regulator/audio improvements for DM365 and DM644x eval boards" * tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (32 commits) ARM: dts: omap4-droid4: Enable hdq for droid4 ds250x 1-wire battery nvmem ARM: dts: motorola-cpcap-mapphone: Configure calibration interrupt ARM: dts: Configure interconnect target module for am437x sgx ARM: dts: Configure sgx for dra7 ARM: dts: Configure rstctrl reset for am335x SGX ARM: dts: dra7: Add ti-sysc node for VPE ARM: dts: dra7: add vpe clkctrl node ARM: dts: am43x-epos-evm: Add VPFE and OV2659 entries ARM: dts: am437x-sk-evm: Add VPFE and OV2659 entries ARM: dts: am43xx: add support for clkout1 clock arm: dts: dra76-evm: Add CAL and OV5640 nodes arm: dtsi: dra76x: Add CAL dtsi node arm: dts: dra72-evm-common: Add entries for the CSI2 cameras ARM: dts: DRA72: Add CAL dtsi node ARM: dts: dra7-l4: Add ti-sysc node for CAM ARM: OMAP: DRA7xx: Make CAM clock domain SWSUP only ARM: dts: dra7: add cam clkctrl node ARM: OMAP2+: Drop legacy platform data for omap4 des ARM: OMAP2+: Drop legacy platform data for omap4 sham ARM: OMAP2+: Drop legacy platform data for omap4 aes ...
2020-02-09Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/socLinus Torvalds1-0/+2
Pull ARM Device-tree updates from Olof Johansson: "New SoCs: - Atmel/Microchip SAM9X60 (ARM926 SoC) - OMAP 37xx gets split into AM3703/AM3715/DM3725, who are all variants of it with different GPU/media IP configurations. - ST stm32mp15 SoCs (1-2 Cortex-A7, CAN, GPU depending on SKU) - ST Ericsson ab8505 (variant of ab8500) and db8520 (variant of db8500) - Unisoc SC9863A SoC (8x Cortex-A55 mobile chipset w/ GPU, modem) - Qualcomm SC7180 (8-core 64bit SoC, unnamed CPU class) New boards: - Allwinner: + Emlid Neutis SoM (H3 variant) + Libre Computer ALL-H3-IT + PineH64 Model B - Amlogic: + Libretech Amlogic GX PC (s905d and s912-based variants) - Atmel/Microchip: + Kizboxmini, sam9x60 EK, sama5d27 Wireless SOM (wlsom1) - Marvell: + Armada 385-based SolidRun Clearfog GTR - NXP: + Gateworks GW59xx boards based on i.MX6/6Q/6QDL + Tolino Shine 3 eBook reader (i.MX6sl) + Embedded Artists COM (i.MX7ULP) + SolidRun CLearfog CX/ITX and HoneyComb (LX2160A-based systems) + Google Coral Edge TPU (i.MX8MQ) - Rockchip: + Radxa Dalang Carrier (supports rk3288 and rk3399 SOMs) + Radxa Rock Pi N10 (RK3399Pro-based) + VMARC RK3399Pro SOM - ST: + Reference boards for stm32mp15 - ST Ericsson: + Samsung Galaxy S III mini (GT-I8190) + HREF520 reference board for DB8520 - TI OMAP: + Gen1 Amazon Echo (OMAP3630-based) - Qualcomm: + Inforce 6640 Single Board Computer (msm8996-based) + SC7180 IDP (SC7180-based)" * tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (623 commits) dt-bindings: fix compilation error of the example in marvell,mmp3-hsic-phy.yaml arm64: dts: ti: k3-am654-base-board: Add CSI2 OV5640 camera arm64: dts: ti: k3-am65-main Add CAL node arm64: dts: ti: k3-j721e-main: Add McASP nodes arm64: dts: ti: k3-am654-main: Add McASP nodes arm64: dts: ti: k3-j721e: DMA support arm64: dts: ti: k3-j721e-main: Move secure proxy and smmu under main_navss arm64: dts: ti: k3-j721e-main: Correct main NAVSS representation arm64: dts: ti: k3-j721e: Correct the address for MAIN NAVSS arm64: dts: ti: k3-am65: DMA support arm64: dts: ti: k3-am65-main: Move secure proxy under cbass_main_navss arm64: dts: ti: k3-am65-main: Correct main NAVSS representation ARM: dts: aspeed: rainier: Add UCD90320 power sequencer ARM: dts: aspeed: rainier: Switch PSUs to unknown version arm64: dts: rockchip: Kill off "simple-panel" compatibles ARM: dts: rockchip: Kill off "simple-panel" compatibles arm64: dts: rockchip: rename dwmmc node names to mmc ARM: dts: rockchip: rename dwmmc node names to mmc arm64: dts: exynos: Rename Samsung and Exynos to lowercase arm64: dts: uniphier: add reset-names to NAND controller node ...
2020-02-01Merge branches 'clk-imx', 'clk-ti', 'clk-xilinx', 'clk-nvidia', 'clk-qcom', ↵Stephen Boyd12-1/+1062
'clk-freescale' and 'clk-qoriq' into clk-next - Support for Xilinx Versal platform clks - Display clk controller on qcom sc7180 - Video clk controller on qcom sc7180 - Graphics clk controller on qcom sc7180 - CPU PLLs for qcom msm8916 - Fixes for clk controllers on qcom msm8998 SoCs - Move qcom msm8974 gfx3d clk to RPM control - Display port clk support on qcom sdm845 SoCs - Global clk controller on qcom ipq6018 - Adjust composite clk to new way of describing clk parents - Add a driver for BCLK of Freescale SAI cores * clk-imx: (32 commits) clk: imx: Add support for i.MX8MP clock driver dt-bindings: imx: Add clock binding doc for i.MX8MP clk: imx: gate4: Switch imx_clk_gate4_flags() to clk_hw based API clk: imx: imx8mq: Switch to clk_hw based API clk: imx: imx8mm: Switch to clk_hw based API clk: imx: imx8mn: Switch to clk_hw based API clk: imx: Remove __init for imx_obtain_fixed_clk_hw() API clk: imx: gate3: Switch to clk_hw based API clk: imx: add hw API imx_clk_hw_mux2_flags clk: imx: add imx_unregister_hw_clocks clk: imx: clk-composite-8m: Switch to clk_hw based API clk: imx: clk-pll14xx: Switch to clk_hw based API clk: imx7up: Rename the clks to hws clk: imx: Rename the imx_clk_divider_gate to imply it's clk_hw based clk: imx: Rename the imx_clk_pfdv2 to imply it's clk_hw based clk: imx: Rename the imx_clk_pllv4 to imply it's clk_hw based clk: imx: Rename sccg and frac pll register to suggest clk_hw clk: imx: imx7ulp composite: Rename to show is clk_hw based clk: imx: pllv2: Switch to clk_hw based API clk: imx: pllv1: Switch to clk_hw based API ... * clk-ti: clk: ti: clkctrl: Fix hidden dependency to node name clk: ti: add clkctrl data dra7 sgx clk: ti: omap5: Add missing AESS clock clk: ti: dra7: fix parent for gmac_clkctrl clk: ti: dra7: add vpe clkctrl data clk: ti: dra7: add cam clkctrl data dt-bindings: clock: Move ti-dra7-atl.h to dt-bindings/clock * clk-xilinx: clk: zynqmp: Add support for clock with CLK_DIVIDER_POWER_OF_TWO flag clk: zynqmp: Fix divider calculation clk: zynqmp: Add support for get max divider clk: zynqmp: Warn user if clock user are more than allowed clk: zynqmp: Extend driver for versal dt-bindings: clock: Add bindings for versal clock driver * clk-nvidia: clk: tegra20/30: Explicitly set parent clock for Video Decoder clk: tegra20/30: Don't pre-initialize displays parent clock clk: tegra: divider: Check UART's divider enable-bit state on rate's recalculation clk: tegra: clk-dfll: Remove call to pm_runtime_irq_safe() clk: tegra: Mark fuse clock as critical * clk-qcom: (35 commits) clk: qcom: rpmh: Sort OF match table dt-bindings: fix warnings in validation of qcom,gcc.yaml dt-binding: fix compilation error of the example in qcom,gcc.yaml clk: qcom: Add ipq6018 Global Clock Controller support clk: qcom: Add DT bindings for ipq6018 gcc clock controller clk: qcom: gcc-msm8996: Fix parent for CLKREF clocks clk: qcom: rpmh: Add IPA clock for SC7180 clk: qcom: rpmh: skip undefined clocks when registering clk: qcom: Add video clock controller driver for SC7180 dt-bindings: clock: Introduce SC7180 QCOM Video clock bindings dt-bindings: clock: Add YAML schemas for the QCOM VIDEOCC clock bindings clk: qcom: Add graphics clock controller driver for SC7180 dt-bindings: clock: Introduce SC7180 QCOM Graphics clock bindings dt-bindings: clock: Add YAML schemas for the QCOM GPUCC clock bindings clk: qcom: apcs-msm8916: use clk_parent_data to specify the parent clk: qcom: Add display clock controller driver for SC7180 dt-bindings: clock: Introduce QCOM sc7180 display clock bindings dt-bindings: clock: Add YAML schemas for the QCOM DISPCC clock bindings clk: qcom: clk-alpha-pll: Add support for Fabia PLL calibration clk: qcom: alpha-pll: Remove useless read from set rate ... * clk-freescale: clk: fsl-sai: new driver dt-bindings: clock: document the fsl-sai driver clk: composite: add _register_composite_pdata() variants * clk-qoriq: clk: qoriq: add ls1088a hwaccel clocks support clk: ls1028a: Add clock driver for Display output interface dt/bindings: clk: Add YAML schemas for LS1028A Display Clock bindings
2020-02-01Merge branches 'clk-debugfs-danger', 'clk-basic-hw', 'clk-renesas', ↵Stephen Boyd5-1/+10
'clk-amlogic' and 'clk-allwinner' into clk-next - Support dangerous debugfs actions on clks with dead code - Convert gpio, fixed-factor, mux, gate, divider basic clks to hw based APIs * clk-debugfs-danger: clk: Add support for setting clk_rate via debugfs * clk-basic-hw: clk: divider: Add support for specifying parents via DT/pointers clk: gate: Add support for specifying parents via DT/pointers clk: mux: Add support for specifying parents via DT/pointers clk: asm9260: Use parent accuracy in fixed rate clk clk: fixed-rate: Document that accuracy isn't a rate clk: fixed-rate: Add clk flags for parent accuracy clk: fixed-rate: Add support for specifying parents via DT/pointers clk: fixed-rate: Document accuracy member clk: fixed-rate: Move to_clk_fixed_rate() to C file clk: fixed-rate: Remove clk_register_fixed_rate_with_accuracy() clk: fixed-rate: Convert to clk_hw based APIs clk: gpio: Use DT way of specifying parents * clk-renesas: clk: renesas: Prepare for split of R-Car H3 config symbol dt-bindings: clock: renesas: cpg-mssr: Fix r8a774b1 typo clk: renesas: r7s9210: Add SPIBSC clock clk: renesas: rcar-gen3: Allow changing the RPC[D2] clocks clk: renesas: Remove use of ARCH_R8A7796 clk: renesas: rcar-gen2: Change multipliers and dividers to u8 * clk-amlogic: clk: clarify that clk_set_rate() does updates from top to bottom clk: meson: meson8b: make the CCF use the glitch-free mali mux clk: meson: pll: Fix by 0 division in __pll_params_to_rate() clk: meson: g12a: fix missing uart2 in regmap table clk: meson: meson8b: use of_clk_hw_register to register the clocks clk: meson: meson8b: don't register the XTAL clock when provided via OF clk: meson: meson8b: change references to the XTAL clock to use [fw_]name clk: meson: meson8b: use clk_hw_set_parent in the CPU clock notifier clk: meson: add a driver for the Meson8/8b/8m2 DDR clock controller dt-bindings: clock: meson8b: add the clock inputs dt-bindings: clock: add the Amlogic Meson8 DDR clock controller binding * clk-allwinner: clk: sunxi: a23/a33: Export the MIPI PLL clk: sunxi: a31: Export the MIPI PLL clk: sunxi-ng: a64: export CLK_CPUX clock for DVFS clk: sunxi-ng: add mux and pll notifiers for A64 CPU clock clk: sunxi-ng: r40: Export MBUS clock clk: sunxi: use of_device_get_match_data
2020-01-24dt-bindings: clock: Add bindings for versal clock driverRajan Vaja1-0/+123
Add documentation to describe Xilinx Versal clock driver bindings. Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lkml.kernel.org/r/1575527759-26452-2-git-send-email-rajan.vaja@xilinx.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2020-01-23ARM: dts: Add missing omap5 secure clocksTony Lindgren1-0/+11
The secure clocks on omap5 are similar to what we already have for dra7 with dra7_l4sec_clkctrl_regs and documented in the omap5432 TRM in "Table 3-1044. CORE_CM_CORE Registers Mapping Summary". The secure clocks are part of the l4per clock manager. As the l4per clock manager has now two clock domains as children, let's also update the l4per clockdomain node name to follow the "clock" node naming with a domain specific compatible property. Compared to omap4, omap5 has more clocks working in hardare autogating mode. Cc: devicetree@vger.kernel.org Cc: Rob Herring <robh+dt@kernel.org> Acked-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-01-23ARM: dts: Add missing omap4 secure clocksTony Lindgren1-0/+11
The secure clocks on omap4 are similar to what we already have for dra7 in dra7_l4sec_clkctrl_regs and documented in the omap4460 TRM "Table 3-1346 L4PER_CM2 Registers Mapping Summary". The secure clocks are part of the l4_per clock manager. As the l4_per clock manager has now two clock domains as children, let's also update the l4_per clockdomain node name to follow the "clock" node naming with a domain specific compatible property. Cc: devicetree@vger.kernel.org Cc: Rob Herring <robh+dt@kernel.org> Acked-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-01-20clk: ti: add clkctrl data dra7 sgxTony Lindgren1-0/+3
This is similar to what we have for omap5 except the gpu_cm address is different, the mux clocks have one more source option, and there's no divider clock. Note that because of the current dts node name dependency for mapping to clock domain, we must still use "gpu-clkctrl@" naming instead of generic "clock@" naming for the node. And because of this, it's probably best to apply the dts node addition together along with the other clock changes. For accessing the GPU, we also need to configure the interconnect target module for GPU similar to what we have for omap5, I'll send that change separately. Cc: Benoit Parrot <bparrot@ti.com> Cc: "H. Nikolaus Schaller" <hns@goldelico.com> Cc: Robert Nelson <robertcnelson@gmail.com> Cc: Tomi Valkeinen <tomi.valkeinen@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com> Acked-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Tero Kristo <t-kristo@ti.com>
2020-01-20clk: ti: omap5: Add missing AESS clockTony Lindgren1-0/+1
Looks like we're missing AESS clock for omap5. This is similar to what omap4 has. Cc: H. Nikolaus Schaller <hns@goldelico.com> Cc: Matthijs van Duin <matthijsvanduin@gmail.com> Cc: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com> Reviewed-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Tero Kristo <t-kristo@ti.com>
2020-01-20clk: ti: dra7: add vpe clkctrl dataBenoit Parrot1-0/+10
Add clkctrl data for VPE. Signed-off-by: Benoit Parrot <bparrot@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Tero Kristo <t-kristo@ti.com>
2020-01-20clk: ti: dra7: add cam clkctrl dataBenoit Parrot1-0/+10
Add clkctrl data for CAM domain. Signed-off-by: Benoit Parrot <bparrot@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Tero Kristo <t-kristo@ti.com>
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