Age | Commit message (Expand) | Author | Files | Lines |
---|---|---|---|---|
2019-06-26 | clk: socfpga: stratix10: add additional clocks needed for the NAND IP | Dinh Nguyen | 1 | -1/+3 |
2018-04-06 | dt-bindings: documentation: add clock bindings information for Stratix10 | Dinh Nguyen | 1 | -0/+84 |