Age | Commit message (Expand) | Author | Files | Lines |
---|---|---|---|---|
2007-07-25 | Blackfin arch: reorganize headers slightly so we can be sure things are defin... | Mike Frysinger | 1 | -5/+2 |
2007-07-25 | Blackfin arch: use the [CS]SYNC() macros which include anomaly workarounds ra... | Mike Frysinger | 1 | -1/+1 |
2007-08-05 | Blackfin arch: fix the aliased write macros | Robin Getz | 1 | -2/+2 |
2007-07-24 | Blackfin arch: setup aliases for some core Core A MMRs | Mike Frysinger | 1 | -0/+6 |
2007-07-12 | Blackfin arch: clean up some coding style issues | Bryan Wu | 1 | -1/+0 |
2007-06-21 | Blackfin arch: add missing implementations SIC_IWR crosses several registers | Michael Hennerich | 1 | -3/+7 |
2007-05-21 | Blackfin arch: Move write to VR_CTL closer to IDLE | Michael Hennerich | 1 | -2/+4 |
2007-05-07 | blackfin architecture | Bryan Wu | 1 | -0/+1543 |