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2025-07-18interconnect: qcom: qcs615: Drop IP0 interconnectsKonrad Dybcio1-42/+0
In the same spirit as e.g. Commit b136d257ee0b ("interconnect: qcom: sc8280xp: Drop IP0 interconnects"), drop the resources that should be taken care of through the clk-rpmh driver. Fixes: 77d79677b04b ("interconnect: qcom: add QCS615 interconnect provider driver") Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250627-topic-qcs615_icc_ipa-v1-2-dc47596cde69@oss.qualcomm.com Signed-off-by: Georgi Djakov <djakov@kernel.org>
2025-07-18interconnect: qcom: sc8180x: specify num_nodesDmitry Baryshkov1-0/+6
Specify .num_nodes for several BCMs which missed this declaration. Fixes: 04548d4e2798 ("interconnect: qcom: sc8180x: Reformat node and bcm definitions") Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250704-rework-icc-v2-2-875fac996ef5@oss.qualcomm.com Signed-off-by: Georgi Djakov <djakov@kernel.org>
2025-07-18interconnect: qcom: sc8280xp: specify num_links for qnm_a1noc_cfgDmitry Baryshkov1-0/+1
The qnm_a1noc_cfg declaration didn't include .num_links definition, fix it. Fixes: f29dabda7917 ("interconnect: qcom: Add SC8280XP interconnect provider") Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250704-rework-icc-v2-1-875fac996ef5@oss.qualcomm.com Signed-off-by: Georgi Djakov <djakov@kernel.org>
2025-07-18irqchip/renesas-irqc: Convert to DEFINE_SIMPLE_DEV_PM_OPS()Geert Uytterhoeven1-3/+3
Convert the Renesas IRQC driver from SIMPLE_DEV_PM_OPS() to DEFINE_SIMPLE_DEV_PM_OPS() and pm_sleep_ptr(). This allows to drop the __maybe_unused annotations from its suspend callback, and reduces kernel size in case CONFIG_PM or CONFIG_PM_SLEEP is disabled. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Link: https://lore.kernel.org/all/5a14f9932da20ec46cde27f314414474072755ed.1752086718.git.geert+renesas@glider.be
2025-07-18irqchip/renesas-intc-irqpin: Convert to DEFINE_SIMPLE_DEV_PM_OPS()Geert Uytterhoeven1-3/+3
Convert the Renesas INTC External IRQ Pin driver from SIMPLE_DEV_PM_OPS() to DEFINE_SIMPLE_DEV_PM_OPS() and pm_sleep_ptr(). This allows to drop the __maybe_unused annotations from its suspend callbacks, and reduces kernel size in case CONFIG_PM or CONFIG_PM_SLEEP is disabled. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Link: https://lore.kernel.org/all/865e5274cc516d8c345048330a46e753e2bda677.1752086656.git.geert+renesas@glider.be
2025-07-18irqchip/riscv-imsic: Add kernel parameter to disable IPIsAnup Patel3-4/+24
When injecting IPIs to a set of harts, the IMSIC IPI support will do a separate MMIO write to the SETIPNUM_LE register of each target hart. This means on a platform where IMSIC is trap-n-emulated, there will be N MMIO traps when injecting IPI to N target harts hence IMSIC IPIs will be slow on such platforms compared to the SBI IPI extension. Unfortunately, there is no DT, ACPI, or any other way of discovering whether the underlying IMSIC is trap-n-emulated. Using MMIO write to the SETIPNUM_LE register for injecting IPI is purely a software choice in the IMSIC driver hence add a kernel parameter to allow users to disable IMSIC IPIs on platforms with trap-n-emulated IMSIC. Signed-off-by: Anup Patel <apatel@ventanamicro.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Link: https://lore.kernel.org/all/20250716123745.557585-1-apatel@ventanamicro.com
2025-07-18wifi: ath12k: Add support to parse max ext2 wmi service bitTamizh Chelvam Raja1-7/+6
Update the host logic to dynamically parse WMI extended service bits beyond the current fixed size of 4 * 32 (i.e., 384 bits) after WMI_MAX_EXT_SERVICE (256). The current implementation misses service bits advertised beyond this range, leading to not enabling some of the features supported by firmware. Implement dynamic length parsing to iterate up to the maximum service bit index advertised by the firmware. This ensures all supported features are correctly recognized and enabled. Tested-on: QCN9274 hw2.0 PCI WLAN.WBE.1.4.1-00217-QCAHKSWPL_SILICONZ-1 Tested-on: WCN7850 hw2.0 PCI WLAN.HMT.1.0.c5-00481-QCAHMTSWPL_V1.0_V2.0_SILICONZ-3 Signed-off-by: Tamizh Chelvam Raja <tamizh.raja@oss.qualcomm.com> Reviewed-by: Vasanthakumar Thiagarajan <vasanthakumar.thiagarajan@oss.qualcomm.com> Link: https://patch.msgid.link/20250717173539.2523396-3-tamizh.raja@oss.qualcomm.com Signed-off-by: Jeff Johnson <jeff.johnson@oss.qualcomm.com>
2025-07-18wifi: ath12k: fix endianness handling while accessing wmi service bitTamizh Chelvam Raja1-5/+7
Currently there is no endian conversion in ath12k_wmi_tlv_services_parser() so the service bit parsing will be incorrect on a big endian platform and to fix this by using appropriate endian conversion. Tested-on: QCN9274 hw2.0 PCI WLAN.WBE.1.4.1-00217-QCAHKSWPL_SILICONZ-1 Tested-on: WCN7850 hw2.0 PCI WLAN.HMT.1.0.c5-00481-QCAHMTSWPL_V1.0_V2.0_SILICONZ-3 Fixes: 342527f35338 ("wifi: ath12k: Add support to parse new WMI event for 6 GHz regulatory") Signed-off-by: Tamizh Chelvam Raja <tamizh.raja@oss.qualcomm.com> Reviewed-by: Vasanthakumar Thiagarajan <vasanthakumar.thiagarajan@oss.qualcomm.com> Link: https://patch.msgid.link/20250717173539.2523396-2-tamizh.raja@oss.qualcomm.com Signed-off-by: Jeff Johnson <jeff.johnson@oss.qualcomm.com>
2025-07-18Revert "leds: trigger: netdev: Configure LED blink interval for HW offload"Daniel Golle1-13/+3
This reverts commit c629c972b310af41e9e072febb6dae9a299edde6. While .led_blink_set() would previously put an LED into an unconditional permanently blinking state, the offending commit now uses same operation to (also?) set the blink timing of the netdev trigger when offloading. This breaks many if not all of the existing PHY drivers which offer offloading LED operations, as those drivers would just put the LED into blinking state after .led_blink_set() has been called. Unfortunately the change even made it into stable kernels for unknown reasons, so it should be reverted there as well. Fixes: c629c972b310a ("leds: trigger: netdev: Configure LED blink interval for HW offload") Link: https://lore.kernel.org/linux-leds/c6134e26-2e45-4121-aa15-58aaef327201@lunn.ch/T/#m9d6fe81bbcb273e59f12bbedbd633edd32118387 Suggested-by: Andrew Lunn <andrew@lunn.ch> Cc: stable@vger.kernel.org Signed-off-by: Daniel Golle <daniel@makrotopia.org> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Link: https://lore.kernel.org/r/6dcc77ee1c9676891d6250d8994850f521426a0f.1752334655.git.daniel@makrotopia.org Signed-off-by: Lee Jones <lee@kernel.org>
2025-07-18irqchip/gic-v3: Fix GICD_CTLR register namingZenghui Yu1-3/+3
It was incorrectly named as GICD_CTRL in a pr_info() and comments. Fix them. Signed-off-by: Zenghui Yu <yuzenghui@huawei.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/all/20250709130046.1354-1-yuzenghui@huawei.com
2025-07-18irqchip/ls-scfg-msi: Fix NULL dereference in error handlingDan Carpenter1-1/+0
The call to irq_domain_remove(msi_data->parent); was accidentally left behind during a code refactor. It's not necessary to free "msi_data->parent" because it is NULL and, in fact, trying to free it will lead to a NULL pointer dereference. Delete the unnecessary code. Fixes: 94b59d5f567a ("irqchip/ls-scfg-msi: Switch to use msi_create_parent_irq_domain()") Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Nam Cao <namcao@linutronix.de> Link: https://lore.kernel.org/all/15059507-6422-4333-94ca-e8e8840bd289@sabinyo.mountain
2025-07-18wifi: plfxlc: Fix error handling in usb driver probeMurad Masimov3-21/+21
If probe fails before ieee80211_register_hw() is successfully done, ieee80211_unregister_hw() will be called anyway. This may lead to various bugs as the implementation of ieee80211_unregister_hw() assumes that ieee80211_register_hw() has been called. Divide error handling section into relevant subsections, so that ieee80211_unregister_hw() is called only when it is appropriate. Correct the order of the calls: ieee80211_unregister_hw() should go before plfxlc_mac_release(). Also move ieee80211_free_hw() to plfxlc_mac_release() as it supposed to be the opposite to plfxlc_mac_alloc_hw() that calls ieee80211_alloc_hw(). Found by Linux Verification Center (linuxtesting.org) with Syzkaller. Fixes: 68d57a07bfe5 ("wireless: add plfxlc driver for pureLiFi X, XL, XC devices") Signed-off-by: Murad Masimov <m.masimov@mt-integration.ru> Link: https://patch.msgid.link/20250321185226.71-3-m.masimov@mt-integration.ru Signed-off-by: Johannes Berg <johannes.berg@intel.com>
2025-07-18wifi: brcmfmac: Add support for the SDIO 43751 deviceFabio Estevam4-1/+8
Add the SDIO ID and firmware matching for the 43751 device. Based on the previous work from Marc Gonzalez <mgonzalez@freebox.fr>. Tested on an i.MX6DL board connected to an AP6398SV chip with the brcmfmac43752-sdio.bin firmware taken from: https://source.puri.sm/Librem5/firmware-brcm43752-nonfree Signed-off-by: Fabio Estevam <festevam@gmail.com> Acked-by: Arend van Spriel <arend.vanspriel@broadcom.com>> Link: https://patch.msgid.link/20250712215307.1310802-1-festevam@gmail.com Signed-off-by: Johannes Berg <johannes.berg@intel.com>
2025-07-18wifi: wilc1000: Use min() to improve codeQianfeng Rong1-4/+1
Use min() to reduce the code and improve its readability. Reviewed-by: Alexis Lothoré <alexis.lothore@bootlin.com> Signed-off-by: Qianfeng Rong <rongqianfeng@vivo.com> Link: https://patch.msgid.link/20250715121721.266713-7-rongqianfeng@vivo.com Signed-off-by: Johannes Berg <johannes.berg@intel.com>
2025-07-18wifi: mwifiex: Use max_t() to improve codeQianfeng Rong1-4/+3
Use max_t() to reduce the code and improve its readability. Signed-off-by: Qianfeng Rong <rongqianfeng@vivo.com> Reviewed-by: Jeff Chen <jeff.chen_1@nxp.con> Link: https://patch.msgid.link/20250715121721.266713-6-rongqianfeng@vivo.com Signed-off-by: Johannes Berg <johannes.berg@intel.com>
2025-07-18wifi: brcm80211: Use min() to improve codeQianfeng Rong2-8/+3
Use min() to reduce the code and improve its readability. Signed-off-by: Qianfeng Rong <rongqianfeng@vivo.com> Acked-by: Arend van Spriel <arend.vanspriel@broadcom.com>> Link: https://patch.msgid.link/20250715121721.266713-5-rongqianfeng@vivo.com Signed-off-by: Johannes Berg <johannes.berg@intel.com>
2025-07-18wifi: brcmfmac: Fix typo "notifer"WangYuli1-1/+1
There is a spelling mistake of 'notifer' in the comment which should be 'notifier'. Signed-off-by: WangYuli <wangyuli@uniontech.com> Acked-by: Arend van Spriel <arend.vanspriel@broadcom.com>> Link: https://patch.msgid.link/F92035B0A9123150+20250715134407.540483-5-wangyuli@uniontech.com [remove prior link] Signed-off-by: Johannes Berg <johannes.berg@intel.com>
2025-07-18wifi: brcmsmac: Remove const from tbl_ptr parameter in ↵Nathan Chancellor1-1/+1
wlc_lcnphy_common_read_table() A new warning in clang [1] complains that diq_start in wlc_lcnphy_tx_iqlo_cal() is passed uninitialized as a const pointer to wlc_lcnphy_common_read_table(): drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_lcn.c:2728:13: error: variable 'diq_start' is uninitialized when passed as a const pointer argument here [-Werror,-Wuninitialized-const-pointer] 2728 | &diq_start, 1, 16, 69); | ^~~~~~~~~ The table pointer passed to wlc_lcnphy_common_read_table() should not be considered constant, as wlc_phy_read_table() is ultimately going to update it. Remove the const qualifier from the tbl_ptr to clear up the warning. Cc: stable@vger.kernel.org Closes: https://github.com/ClangBuiltLinux/linux/issues/2108 Fixes: 5b435de0d786 ("net: wireless: add brcm80211 drivers") Link: https://github.com/llvm/llvm-project/commit/00dacf8c22f065cb52efb14cd091d441f19b319e [1] Signed-off-by: Nathan Chancellor <nathan@kernel.org> Acked-by: Arend van Spriel <arend.vanspriel@broadcom.com>> Link: https://patch.msgid.link/20250715-brcmsmac-fix-uninit-const-pointer-v1-1-16e6a51a8ef4@kernel.org Signed-off-by: Johannes Berg <johannes.berg@intel.com>
2025-07-18Merge tag 'rtw-next-2025-07-18' of https://github.com/pkshih/rtwJohannes Berg65-675/+3487
Ping-Ke Shih says: ================== rtw-next patches for v6.17 Some minor fixes and refinements. Major changes are listed: rtw89: - STA+P2P concurrency feature gets implemented. - add USB architecture and support RTL8851BU and RTL8852BU. ================== Signed-off-by: Johannes Berg <johannes.berg@intel.com>
2025-07-18drm/tidss: oldi: convert to devm_drm_bridge_alloc() APIJayesh Choudhary1-4/+4
DRM bridges now use "devm_drm_bridge_alloc()" for allocation and initialization. "devm_kzalloc()" is not allowed anymore and it results in WARNING. So convert it. Fixes: 7246e0929945 ("drm/tidss: Add OLDI bridge support") Reviewed-by: Devarsh Thakkar <devarsht@ti.com> Reviewed-by: Aradhya Bhatia <aradhya.bhatia@linux.dev> Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com> Link: https://lore.kernel.org/r/20250714104554.13441-1-j-choudhary@ti.com Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com>
2025-07-18drm/tidss: encoder: convert to devm_drm_bridge_alloc()Michael Walle1-3/+7
Convert the tidss encoder to use devm_drm_bridge_alloc(). Instead of allocating the memory by drmm_simple_encoder_alloc() use devm_drm_bridge_alloc() and initialize the encoder afterwards. Fixes: a7748dd127ea ("drm/bridge: get/put the bridge reference in drm_bridge_add/remove()") Signed-off-by: Michael Walle <mwalle@kernel.org> Link: https://lore.kernel.org/r/20250716134107.4084945-1-mwalle@kernel.org Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com>
2025-07-18crypto: engine - remove request batching supportOvidiu Panait2-3/+2
Remove request batching support from crypto_engine, as there are no drivers using this feature and it doesn't really work that well. Instead of doing batching based on backlog, a more optimal approach would be for the user to handle the batching (similar to how IPsec can hook into GSO to get 64K of data each time or how block encryption can use unit sizes much greater than 4K). Suggested-by: Herbert Xu <herbert@gondor.apana.org.au> Signed-off-by: Ovidiu Panait <ovidiu.panait.oss@gmail.com> Reviewed-by: Horia Geantă <horia.geanta@nxp.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-07-18crypto: qat - flush misc workqueue during device shutdownGiovanni Cabiddu3-0/+7
Repeated loading and unloading of a device specific QAT driver, for example qat_4xxx, in a tight loop can lead to a crash due to a use-after-free scenario. This occurs when a power management (PM) interrupt triggers just before the device-specific driver (e.g., qat_4xxx.ko) is unloaded, while the core driver (intel_qat.ko) remains loaded. Since the driver uses a shared workqueue (`qat_misc_wq`) across all devices and owned by intel_qat.ko, a deferred routine from the device-specific driver may still be pending in the queue. If this routine executes after the driver is unloaded, it can dereference freed memory, resulting in a page fault and kernel crash like the following: BUG: unable to handle page fault for address: ffa000002e50a01c #PF: supervisor read access in kernel mode RIP: 0010:pm_bh_handler+0x1d2/0x250 [intel_qat] Call Trace: pm_bh_handler+0x1d2/0x250 [intel_qat] process_one_work+0x171/0x340 worker_thread+0x277/0x3a0 kthread+0xf0/0x120 ret_from_fork+0x2d/0x50 To prevent this, flush the misc workqueue during device shutdown to ensure that all pending work items are completed before the driver is unloaded. Note: This approach may slightly increase shutdown latency if the workqueue contains jobs from other devices, but it ensures correctness and stability. Fixes: e5745f34113b ("crypto: qat - enable power management for QAT GEN4") Signed-off-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com> Cc: stable@vger.kernel.org Reviewed-by: Ahsan Atta <ahsan.atta@intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-07-18crypto: qat - enable rate limiting feature for GEN6 devicesSuman Kumar Chakraborty2-0/+91
Add support for enabling rate limiting(RL) feature for QAT GEN6 by initializing the rl_data member in adf_hw_device_data structure. Implement init_num_svc_aes() for GEN6 which will populate the number of AEs associated with the RL service type. Implement adf_gen6_get_svc_slice_cnt() for GEN6 which will return the slice count that can support the RL service type. Co-developed-by: George Abraham P <george.abraham.p@intel.com> Signed-off-by: George Abraham P <george.abraham.p@intel.com> Signed-off-by: Suman Kumar Chakraborty <suman.kumar.chakraborty@intel.com> Reviewed-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-07-18crypto: qat - add compression slice count for rate limitingSuman Kumar Chakraborty2-0/+2
In QAT GEN4 devices, the compression slice count was tracked using the dcpr_cnt field. Introduce a new cpr_cnt field in the rate limiting (RL) infrastructure to track the compression (CPR) slice count independently. The cpr_cnt value is populated via the RL_INIT admin message. The existing dcpr_cnt field will now be used exclusively to cache the decompression slice count, ensuring a clear separation between compression and decompression tracking. Signed-off-by: Suman Kumar Chakraborty <suman.kumar.chakraborty@intel.com> Reviewed-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-07-18crypto: qat - add get_svc_slice_cnt() in device data structureSuman Kumar Chakraborty6-14/+26
Enhance the adf_hw_device_data structure by introducing a new callback function get_svc_slice_cnt(), which provides a mechanism to query the total number of accelerator available on the device for a specific service. Implement adf_gen4_get_svc_slice_cnt() for QAT GEN4 devices to support this new interface. This function returns the total accelerator count for a specific service. Co-developed-by: George Abraham P <george.abraham.p@intel.com> Signed-off-by: George Abraham P <george.abraham.p@intel.com> Signed-off-by: Suman Kumar Chakraborty <suman.kumar.chakraborty@intel.com> Reviewed-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-07-18crypto: qat - add adf_rl_get_num_svc_aes() in rate limitingSuman Kumar Chakraborty6-1/+40
Enhance the rate limiting (RL) infrastructure by adding adf_rl_get_num_svc_aes() which can be used to fetch the number of engines associated with the service type. Expand the structure adf_rl_hw_data with an array that contains the number of AEs per service. Implement adf_gen4_init_num_svc_aes() for QAT GEN4 devices to calculate the total number of acceleration engines dedicated to a specific service. Signed-off-by: Suman Kumar Chakraborty <suman.kumar.chakraborty@intel.com> Reviewed-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-07-18crypto: qat - relocate service related functionsSuman Kumar Chakraborty5-36/+38
Rename (1) is_service_enabled() to adf_is_service_enabled(), and (2) srv_to_cfg_svc_type() to adf_srv_to_cfg_svc_type(), and move them to adf_cfg_services.c which is the appropriate place for configuration-related service logic. This improves code organization and modularity by grouping related service configuration logic in a single location. Signed-off-by: Suman Kumar Chakraborty <suman.kumar.chakraborty@intel.com> Reviewed-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-07-18crypto: qat - consolidate service enumsSuman Kumar Chakraborty9-50/+47
The enums `adf_base_services` (used in rate limiting) and `adf_services` define the same values, resulting in code duplication. To improve consistency across the QAT driver: (1) rename `adf_services` to `adf_base_services` in adf_cfg_services.c to better reflect its role in defining core services (those with dedicated accelerators), (2) introduce a new `adf_extended_services` enum starting from `SVC_BASE_COUNT`, and move `SVC_DCC` into it, as it represents an extended service (DC with chaining), and (3) remove the redundant `adf_base_services` enum from the rate limiting implementation. This does not introduce any functional change. Signed-off-by: Suman Kumar Chakraborty <suman.kumar.chakraborty@intel.com> Reviewed-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-07-18crypto: qat - add decompression service for rate limitingSuman Kumar Chakraborty3-0/+4
Add a new base service type ADF_SVC_DECOMP to the QAT rate limiting (RL) infrastructure. This enables RL support for the decompression (DECOMP) service type, allowing service-level agreements (SLAs) to be enforced when decompression is configured. The new service is exposed in the sysfs RL service list for visibility. Note that this support is applicable only to devices that provide the decompression service, such as QAT GEN6 devices. Signed-off-by: Suman Kumar Chakraborty <suman.kumar.chakraborty@intel.com> Reviewed-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-07-18crypto: qat - validate service in rate limiting sysfs apiSuman Kumar Chakraborty3-2/+10
The sysfs interface 'qat_rl/srv' currently allows all valid services, even if a service is not configured for the device. This leads to a failure when attempting to add the SLA using 'qat_rl/sla_op'. Add a check using is_service_enabled() to ensure the requested service is enabled. If not, return -EINVAL to prevent invalid configurations. Signed-off-by: Suman Kumar Chakraborty <suman.kumar.chakraborty@intel.com> Reviewed-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-07-18crypto: hisilicon/sec2 - implement full backlog mode for secWenkai Lin2-180/+457
This patch introduces a hierarchical backlog mechanism to cache user data in high-throughput encryption/decryption scenarios, the implementation addresses packet loss issues when hardware queues overflow during peak loads. First, we use sec_alloc_req_id to obtain an exclusive resource from the pre-allocated resource pool of each queue, if no resource is allocated, perform the DMA map operation on the request memory. When the task is ready, we will attempt to send it to the hardware, if the hardware queue is already full, we cache the request into the backlog list, then return an EBUSY status to the upper layer and instruct the packet-sending thread to pause transmission. Simultaneously, when the hardware completes a task, it triggers the sec callback function, within this function, reattempt to send the requests from the backlog list and wake up the sending thread until the hardware queue becomes fully occupied again. In addition, it handles such exceptions like the hardware is reset when packets are sent, it will switch to the software computing and release occupied resources. Signed-off-by: Wenkai Lin <linwenkai6@hisilicon.com> Signed-off-by: Chenghai Huang <huangchenghai2@huawei.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-07-18crypto: qat - enable telemetry for GEN6 devicesVijay Sundar Selvamani4-0/+348
Enable telemetry for QAT GEN6 devices by defining the firmware data structures layouts, implementing the counters parsing logic and setting the required properties on the adf_tl_hw_data data structure. As for QAT GEN4, telemetry counters are exposed via debugfs using the interface described in Documentation/ABI/testing/debugfs-driver-qat_telemetry. Co-developed-by: George Abraham P <george.abraham.p@intel.com> Signed-off-by: George Abraham P <george.abraham.p@intel.com> Signed-off-by: Vijay Sundar Selvamani <vijay.sundar.selvamani@intel.com> Signed-off-by: Suman Kumar Chakraborty <suman.kumar.chakraborty@intel.com> Reviewed-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-07-18crypto: qat - add decompression service to telemetryVijay Sundar Selvamani1-0/+3
QAT GEN6 devices offer decompression as an additional service. Update the telemetry ring pair service interface to support monitoring decompression operations. Co-developed-by: George Abraham P <george.abraham.p@intel.com> Signed-off-by: George Abraham P <george.abraham.p@intel.com> Signed-off-by: Vijay Sundar Selvamani <vijay.sundar.selvamani@intel.com> Signed-off-by: Suman Kumar Chakraborty <suman.kumar.chakraborty@intel.com> Reviewed-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-07-18crypto: qat - enable power management debugfs for GEN6 devicesGeorge Abraham P4-1/+159
The QAT driver includes infrastructure to report power management (PM) information via debugfs. Extend this support to QAT GEN6 devices by exposing PM debug data through the `pm_status` file. This implementation reports the current PM state, power management hardware control and status registers (CSR), and per-domain power status specific to the QAT GEN6 architecture. The debug functionality is implemented in adf_gen6_pm_dbgfs.c and initialized as part of the enable_pm() function. Co-developed-by: Vijay Sundar Selvamani <vijay.sundar.selvamani@intel.com> Signed-off-by: Vijay Sundar Selvamani <vijay.sundar.selvamani@intel.com> Signed-off-by: George Abraham P <george.abraham.p@intel.com> Signed-off-by: Suman Kumar Chakraborty <suman.kumar.chakraborty@intel.com> Reviewed-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-07-18crypto: qat - relocate power management debugfs helper APIsGeorge Abraham P4-86/+108
Relocate the power management debugfs helper APIs in a common file adf_pm_dbgfs_utils.h and adf_pm_dbgfs_utils.c so that it can be shared between device generations. When moving logic from adf_gen4_pm_debugfs.c to adf_pm_dbgfs_utils.c, the include kernel.h has been replaced with the required include. This does not introduce any functional change. Signed-off-by: George Abraham P <george.abraham.p@intel.com> Signed-off-by: Suman Kumar Chakraborty <suman.kumar.chakraborty@intel.com> Reviewed-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-07-18crypto: qat - fix virtual channel configuration for GEN6 devicesSuman Kumar Chakraborty2-6/+6
The TCVCMAP (Traffic Class to Virtual Channel Mapping) field in the PVC0CTL and PVC1CTL register controls how traffic classes are mapped to virtual channels in QAT GEN6 hardware. The driver previously wrote a default TCVCMAP value to this register, but this configuration was incorrect. Modify the TCVCMAP configuration to explicitly enable both VC0 and VC1, and map Traffic Classes 0 to 7 → VC0 and Traffic Class 8 → VC1. Replace FIELD_PREP() with FIELD_MODIFY() to ensure that only the intended TCVCMAP field is updated, preserving other bits in the register. This prevents unintended overwrites of unrelated configuration fields when modifying TC to VC mappings. Fixes: 17fd7514ae68 ("crypto: qat - add qat_6xxx driver") Signed-off-by: Suman Kumar Chakraborty <suman.kumar.chakraborty@intel.com> Reviewed-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-07-18crypto: drivers - Remove redundant pm_runtime_mark_last_busy() callsSakari Ailus8-8/+0
pm_runtime_put_autosuspend(), pm_runtime_put_sync_autosuspend(), pm_runtime_autosuspend() and pm_request_autosuspend() now include a call to pm_runtime_mark_last_busy(). Remove the now-reduntant explicit call to pm_runtime_mark_last_busy(). Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-07-18hwrng: drivers - Remove redundant pm_runtime_mark_last_busy() callsSakari Ailus7-9/+0
pm_runtime_put_autosuspend(), pm_runtime_put_sync_autosuspend(), pm_runtime_autosuspend() and pm_request_autosuspend() now include a call to pm_runtime_mark_last_busy(). Remove the now-reduntant explicit call to pm_runtime_mark_last_busy(). Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-07-18crypto: caam - avoid option aliasing with the CONFIG_CAAM_QI build optionLukas Bulwahn5-11/+7
In the Makefile, the new build option CONFIG_CAAM_QI is defined conditioned on the existence of the CONFIG_CRYPTO_DEV_FSL_CAAM_CRYPTO_API_QI, which is properly defined in the Kconfig file. So, CONFIG_CAAM_QI is just a local alias for CONFIG_CRYPTO_DEV_FSL_CAAM_CRYPTO_API_QI. There is little benefit in the source code of having this slightly shorter alias for this configuration, but it complicates further maintenance, as searching for the impact of CONFIG_CRYPTO_DEV_FSL_CAAM_CRYPTO_API_QI requires to grep once, and then identify the option introduced and continue searching for that. Further, tools, such as cross referencers, and scripts to check Kconfig definitions and their use simply do not handle this situation. Given that this is the only incidence of such a config alias in the whole kernel tree, just prefer to avoid this pattern of aliasing here. Use CONFIG_CRYPTO_DEV_FSL_CAAM_CRYPTO_API_QI throughout the Freescale CAAM-Multicore platform driver backend source code. No functional change. Signed-off-by: Lukas Bulwahn <lukas.bulwahn@redhat.com> Reviewed-by: Horia Geantă <horia.geanta@nxp.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-07-18crypto: qat - add live migration enablers for GEN6 devicesMałgorzata Mielnik3-0/+13
The current implementation of the QAT live migration enablers is exclusive to QAT GEN4 devices and resides within QAT GEN4 specific files. However, the underlying mechanisms, such as the relevant CSRs and offsets, can be shared between QAT GEN4 and QAT GEN6 devices. Add the necessary enablers required to implement live migration for QAT GEN6 devices to the abstraction layer to allow leveraging the existing QAT GEN4 implementation. Signed-off-by: Małgorzata Mielnik <malgorzata.mielnik@intel.com> Reviewed-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-07-18crypto: qat - relocate and rename bank state structure definitionSuman Kumar Chakraborty4-45/+47
The `bank_state` structure represents the state of a bank of rings. As part of recent refactoring, the functions that interact with this structure have been moved to a new unit, adf_bank_state.c. To align with this reorganization, rename `struct bank_state` to `struct adf_bank_state` and move its definition to adf_bank_state.h. Also relocate the associated `struct ring_config` to the same header to consolidate related definitions. Update all references to use the new structure name. This does not introduce any functional change. Signed-off-by: Suman Kumar Chakraborty <suman.kumar.chakraborty@intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-07-18crypto: qat - relocate bank state helper functionsMałgorzata Mielnik6-209/+258
The existing implementation of bank state management functions, including saving and restoring state, is located within 4xxx device files. However, these functions do not contain GEN4-specific code and are applicable to other QAT generations. Relocate the bank state management functions to a new file, adf_bank_state.c, and rename them removing the `gen4` prefix. This change enables the reuse of such functions across different QAT generations. Add documentation to bank state related functions that were moved from QAT 4xxx specific files to common files. This does not introduce any functional change. Signed-off-by: Małgorzata Mielnik <malgorzata.mielnik@intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-07-18crypto: qat - replace CHECK_STAT macro with static inline functionSuman Kumar Chakraborty1-14/+19
The macro CHECK_STAT is used to check that all ring statuses match the saved state during restoring the state of bank. Replace the CHECK_STAT macro with the static inline function `check_stat()` to improve type safety, readability, and debuggability. This does not introduce any functional change. Signed-off-by: Suman Kumar Chakraborty <suman.kumar.chakraborty@intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-07-18crypto: qat - use pr_fmt() in adf_gen4_hw_data.cSuman Kumar Chakraborty1-4/+6
Add pr_fmt() to adf_gen4_hw_data.c logging and update the debug and error messages to utilize it accordingly. This does not introduce any functional changes. Signed-off-by: Suman Kumar Chakraborty <suman.kumar.chakraborty@intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-07-18crypto: qat - disable ZUC-256 capability for QAT GEN5Bairavi Alagappan1-8/+1
The ZUC-256 EEA (encryption) and EIA (integrity) algorithms are not supported on QAT GEN5 devices, as their current implementation does not align with the NIST specification. Earlier versions of the ZUC-256 specification used a different initialization scheme, which has since been revised to comply with the 5G specification. Due to this misalignment with the updated specification, remove support for ZUC-256 EEA and EIA for QAT GEN5 by masking out the ZUC-256 capability. Fixes: fcf60f4bcf549 ("crypto: qat - add support for 420xx devices") Signed-off-by: Bairavi Alagappan <bairavix.alagappan@intel.com> Signed-off-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-07-18crypto: img-hash - Fix dma_unmap_sg() nents valueThomas Fourier1-1/+1
The dma_unmap_sg() functions should be called with the same nents as the dma_map_sg(), not the value the map function returned. Fixes: d358f1abbf71 ("crypto: img-hash - Add Imagination Technologies hw hash accelerator") Signed-off-by: Thomas Fourier <fourier.thomas@gmail.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-07-18crypto: keembay - Fix dma_unmap_sg() nents valueThomas Fourier1-1/+7
The dma_unmap_sg() functions should be called with the same nents as the dma_map_sg(), not the value the map function returned. Fixes: 472b04444cd3 ("crypto: keembay - Add Keem Bay OCS HCU driver") Signed-off-by: Thomas Fourier <fourier.thomas@gmail.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-07-18hwrng: mtk - handle devm_pm_runtime_enable errorsOvidiu Panait1-1/+3
Although unlikely, devm_pm_runtime_enable() call might fail, so handle the return value. Fixes: 78cb66caa6ab ("hwrng: mtk - Use devm_pm_runtime_enable") Signed-off-by: Ovidiu Panait <ovidiu.panait.oss@gmail.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-07-18remoteproc: imx_rproc: detect and attach to pre-booted remote coresHiago De Franco1-6/+35
When the Cortex-M remote core is started and already running before Linux boots (typically by the Cortex-A bootloader using a command like bootaux), the current driver is unable to attach to it. This is because the driver only checks for remote cores running in different SCU partitions. However in this case, the M-core is in the same partition as Linux and is already powered up and running by the bootloader. This patch adds a check using dev_pm_genpd_is_on() to verify whether the M-core's power domains are already on. If all power domain devices are on, the driver assumes the M-core is running and proceed to attach to it. To accomplish this, we need to avoid passing any attach_data or flags to dev_pm_domain_attach_list(), allowing the platform device become a consumer of the power domain provider without changing its current state. During probe, also enable and sync the device runtime PM to make sure the power domains are correctly managed when the core is controlled by the kernel. Suggested-by: Ulf Hansson <ulf.hansson@linaro.org> Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Hiago De Franco <hiago.franco@toradex.com> Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org> Link: https://lore.kernel.org/r/20250716194638.113115-1-hiagofranco@gmail.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
generated by cgit v1.2.3 (git 2.39.0) at 2025-09-13 08:49:19 +0300