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2013-02-13dmaengine: ioat - fix spare sparse complainFengguang Wu1-1/+1
>> drivers/dma/ioat/dma_v3.c:371:6: sparse: symbol 'ioat3_timer_event' was not declared. Reported-by: Fengguang Wu <fengguang.wu@intel.com> Signed-off-by: Fengguang Wu <fengguang.wu@intel.com> Acked-by: Dave Jiang <dave.jiang@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-02-13dmaengine: move drivers/of/dma.c -> drivers/dma/of-dma.cVinod Koul4-1/+7
as requested by Rob Suggested-by: Rob Herring <rob.herring@calxeda.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-02-12ioatdma: fix race between updating ioat->head and IOAT_COMPLETION_PENDINGDave Jiang3-97/+128
There is a race that can hit during __cleanup() when the ioat->head pointer is incremented during descriptor submission. The __cleanup() can clear the PENDING flag when it does not see any active descriptors. This causes new submitted descriptors to be ignored because the COMPLETION_PENDING flag is cleared. This was introduced when code was adapted from ioatdma v1 to ioatdma v2. For v2 and v3, IOAT_COMPLETION_PENDING flag will be abandoned and a new flag IOAT_CHAN_ACTIVE will be utilized. This flag will also be protected under the prep_lock when being modified in order to avoid the race. Signed-off-by: Dave Jiang <dave.jiang@intel.com> Reviewed-by: Dan Williams <djbw@fb.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-02-12dw_dmac: add support for Lynxpoint DMA controllersMika Westerberg1-0/+6
Intel Lynxpoint PCH Low Power Subsystem has DMA controller to support general purpose serial buses like SPI, I2C, and HSUART. This controller is enumerated from ACPI namespace with ACPI ID INTL9C60. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-01-28dw_dmac: return proper residue valueAndy Shevchenko2-2/+46
Currently the driver returns full length of the active descriptor which is wrong. We have to go throught the active descriptor and substract the length of each sent children in the chain from the total length along with the actual data in the DMA channel registers. The cyclic case is not handled by this patch due to len field in the descriptor structure is left untouched by the original code. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-01-28dw_dmac: fill individual length of descriptorAndy Shevchenko1-0/+3
It will be useful to have the length of the transfer in the descriptor. The cyclic transfer functions remained untouched. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-01-28dw_dmac: introduce total_len field in struct dw_descAndy Shevchenko2-6/+7
By this new field we distinguish a total length of the chain and the individual length of each descriptor in the chain. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-01-28dw_dmac: remove unnecessary tx_list field in dw_dma_chanAndy Shevchenko2-6/+15
The soft LLP mode is working for active descriptor only. So, we do not need to have a copy of its pointer. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-01-28dw_dmac: print out DW_PARAMS and DWC_PARAMS when debugAndy Shevchenko1-0/+5
It's usefull to have the values of the DW_PARAMS and DWC_PARAMS printed when debug mode is enabled. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-01-28DMAEngine: sirf: lock the shared registers access in sirfsoc_dma_terminate_allBarry Song1-1/+3
Just like Russell pointed out in "DMAEngine: sirf: add DMA pause/resume support" at http://www.spinics.net/lists/arm-kernel/msg212496.html here I find sirfsoc_dma_terminate_all() has same problem, so move the locking to the front of registers access. Signed-off-by: Barry Song <Baohua.Song@csr.com> Cc: Russell King <linux@arm.linux.org.uk> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-01-28DMAEngine: sirf: add DMA pause/resume supportBarry Song1-0/+46
pause/resume are important for users like ALSA sound drivers, this patches make the sirf prima2/marco support DMA commands DMA_PAUSE and DMA_RESUME. Signed-off-by: Barry Song <Baohua.Song@csr.com> Cc: Russell King <linux@arm.linux.org.uk> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-01-21Merge tag 'ux500-dma40' of //git.linaro.org/people/fabiobaltieri/linux.gitVinod Koul3-143/+505
Pull ste_dma40 fixes from Fabio Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-01-21dw_dmac: move soft LLP code from tasklet to dwc_scan_descriptorsAndy Shevchenko1-22/+21
The proper place for the main logic of the soft LLP mode is dwc_scan_descriptors. It prevents to get the transfer unexpectedly aborted in case the user calls dwc_tx_status. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-01-21dw_dmac: don't exceed AHB master number in dwc_get_data_widthAndy Shevchenko1-13/+20
The driver assumes that hardware has two AHB masters which might not be always true. In such cases we must not exceed number of the AHB masters present in the hardware. In the proposed scheme in this patch, we would choose the master with highest possible number whenever we exceed max AHB masters. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-01-21dw_dmac: allocate dma descriptors from DMA_COHERENT memoryAndy Shevchenko2-64/+18
Currently descriptors are allocated from normal cacheable memory and that slows down filling the descriptors, as we need to call cache_coherency routines afterwards. It would be better to allocate memory for these descriptors from DMA_COHERENT memory. This would make code much cleaner too. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Tested-by: Mika Westerberg <mika.westerberg@linux.intel.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-01-20dma: sh/shdma-base.c: remove unnecessary null pointer checkCong Ding1-3/+0
the variable chan is dereferenced in line 635, so it is no reason to check null again in line 641. Signed-off-by: Cong Ding <dinggnu@gmail.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-01-20dma: remove unnecessary null pointer check in mmp_pdma.cCong Ding1-4/+2
the pointer cfg is dereferenced in line 594, so it's no reason to check null again in line 620. Signed-off-by: Cong Ding <dinggnu@gmail.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-01-20dma: edma: fix slave config dependency on directionMatt Porter1-28/+27
The edma_slave_config() implementation depends on the direction field such that it will not properly configure a slave channel when called without direction set. This fixes the implementation so that the slave config is copied as is and prep_slave_sg() handles the direction dependent handling. spi-omap2-mcspi and omap_hsmmc both expose this bug as they configure the slave channel config from a common path with an unconfigured direction field. Signed-off-by: Matt Porter <mporter@ti.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-01-14dmaengine: set_dma40: balance clock in probe fail codeFabio Baltieri1-1/+1
Clock code was changed to use clk_prepare_enable in: b707c65 dma/ste_dma40: Fixup clock usage during probe but clk_disable on probe fail path was not updated. This patch fix this by using clk_disable_unprepare in place of clk_disable. Acked-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Fabio Baltieri <fabio.baltieri@linaro.org>
2013-01-14dmaengine: set_dma40: ignore spurious interruptsFabio Baltieri1-3/+12
Some DMA channels may be used by other cores in the SoC. This patch modifies the dma interrupt handler to ignore interrupts from unknown channels. Cc: Rabin Vincent <rabin.vincent@stericsson.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Fabio Baltieri <fabio.baltieri@linaro.org>
2013-01-14dmaengine: ste_dma40: add software lli supportFabio Baltieri1-1/+19
This patch add support to manage LLI by SW for select phy channels. There is a HW issue in certain controllers due to which on certain occassions HW LLI cannot be used on some physical channels. To avoid the HW issue on a specific phy channel, the phy channel number can be added to the list of soft_lli_channels and there after all the transfers on that channel will use software LLI, for peripheral to memory transfers. SoftLLI introduces relink overhead, that could impact performace for certain use cases. This is based on a previous patch of Narayanan Gopalakrishnan. Cc: Shreshtha Kumar Sahu <shreshthakumar.sahu@stericsson.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Fabio Baltieri <fabio.baltieri@linaro.org>
2013-01-14dmaengine: ste_dma40: minor code readability fixesFabio Baltieri1-9/+8
Use internal variables to the cycles to improve code readability, no functional changes. Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Fabio Baltieri <fabio.baltieri@linaro.org>
2013-01-14dmaengine: ste_dma40: minor cosmetic fixesFabio Baltieri2-22/+13
This patch contains various non functional cosmetic fixes. Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Fabio Baltieri <fabio.baltieri@linaro.org>
2013-01-14dmaengine: ste_dma40: add a done queue for completed descriptorsFabio Baltieri1-4/+33
This is to keep the active queue for only those transfers which are actually active in the hardware. Descriptors will be moved to the done queue after they are completed in the hardware (interrupt handler) but before all the cleanup work has been completed (tasklet). Mostly based on a previous patch by Rabin Vincent. Cc: Rabin Vincent <rabin.vincent@stericsson.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Fabio Baltieri <fabio.baltieri@linaro.org>
2013-01-14dmaengine: ste_dma40: support more than 128 event linesTong Liu2-81/+355
U8540 DMA controller is different from u9540 we need define new registers and use them to support handling more than 128 event lines. Signed-off-by: Tong Liu <tong.liu@stericsson.com> Reviewed-by: Per Forlin <per.forlin@stericsson.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Fabio Baltieri <fabio.baltieri@linaro.org>
2013-01-14dmaengine: ste_dma40: physical channels number correctionGerald Baeza1-5/+10
DMAC_ICFG[0:2]=SCHNB only allows to count 'multiple of 4' physical channels so it was ok with platforms having 8 channels but cannot be used for next versions (with 10 or 14 channels). This patch allows to provide the number of physical channels for a DMA device via platform_data, or still rely on SCHNB if platform_data announces 0 channel. Signed-off-by: Gerald Baeza <gerald.baeza@stericsson.com> Reviewed-by: Per Forlin <per.forlin@stericsson.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Fabio Baltieri <fabio.baltieri@linaro.org>
2013-01-14dmaengine: ste_dma40: support fixed physical channel allocationGerald Baeza1-2/+11
This patch makes existing use_fixed_channel field (of stedma40_chan_cfg structure) applicable to physical channels. Signed-off-by: Gerald Baeza <gerald.baeza@stericsson.com> Tested-by: Yannick Fertre <yannick.fertre@stericsson.com> Reviewed-by: Per Forlin <per.forlin@stericsson.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Fabio Baltieri <fabio.baltieri@linaro.org>
2013-01-14dmaengine: ste_dma40: don't allow high priority dest event linesRabin Vincent1-1/+14
Hardware bug: when a logical channel is triggerred by a high priority destination event line, an extra packet transaction is generated in case of important data write response latency on previous logical channel A and if the source transfer of current logical channel B is already completed and if no other channel with a higher priority than B is waiting for execution. Software workaround: do not set the high priority level for the destination event lines that trigger logical channels. Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com> Reviewed-by: Shreshtha Kumar Sahu <shreshthakumar.sahu@stericsson.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Fabio Baltieri <fabio.baltieri@linaro.org>
2013-01-14dmaengine: ste_dma40: don't check for pm_runtime_suspended()Narayanan G1-2/+0
The check for runtime suspend is not needed during a regular suspend, as the framework takes care of this. This fixes the issue of DMA driver not letting the system to go to deepsleep in the first attempt. Signed-off-by: Narayanan G <narayanan.gopalakrishnan@stericsson.com> Reviewed-by: Rabin Vincent <rabin.vincent@stericsson.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Fabio Baltieri <fabio.baltieri@linaro.org>
2013-01-14dmaengine: ste_dma40: limit burst size to 16Per Forlin1-0/+8
The client is not aware of the maximum burst size in the dma driver. If the size exceeds 16 set max to 16. Signed-off-by: Per Forlin <per.forlin@stericsson.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Fabio Baltieri <fabio.baltieri@linaro.org>
2013-01-14dmaengine: ste_dma40: set dma max seg sizePer Forlin1-0/+8
Maximum DMA seg size is (0xffff x data_width). If max seg size is not set it deafults to 64k. This results in failure if transferring 64k in byte mode. Large seg sizes may be supported by splitting large transfer. Signed-off-by: Per Forlin <per.forlin@stericsson.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Fabio Baltieri <fabio.baltieri@linaro.org>
2013-01-14dmaengine: ste_dma40: use writel_relaxed for lcxaPer Forlin1-8/+8
lcpa and lcla are written often and the cache_sync() overhead in writel is costly, especially for wlan where every single network packet (in RX mode) corresponds to a separate DMA transfer. Signed-off-by: Per Forlin <per.forlin@stericsson.com> Reviewed-by: Narayanan Gopalakrishnan <narayanan.gopalakrishnan@stericsson.com> Reviewed-by: Rabin Vincent <rabin.vincent@stericsson.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Fabio Baltieri <fabio.baltieri@linaro.org>
2013-01-14dmaengine: ste_dma40: reset priority bit for logical channelsNarayanan1-5/+6
This patch sets the SSCFG/SDCFG bit[7] PRI only for physical channel requests with high priority. For logical channels, this bit will be zero. Signed-off-by: Narayanan G <narayanan.gopalakrishnan@stericsson.com> Reviewed-by: Rabin Vincent <rabin.vincent@stericsson.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Fabio Baltieri <fabio.baltieri@linaro.org>
2013-01-13pl080.h: moved from arm/include/asm/hardware to include/linux/amba/Alessandro Rubini1-1/+1
The header is used by drivers/dma/amba-pl08x.c, which can be compiled under x86, where PL080 exists under a PCI-to-AMBA bridge. This patche moves it where it can be accessed by other architectures, and fixes all users. Signed-off-by: Alessandro Rubini <rubini@gnudd.com> Acked-by: Giancarlo Asnaghi <giancarlo.asnaghi@st.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-01-12dma: dw_dmac: clear suspend bit during terminationHeikki Krogerus1-1/+1
The DMA transfer could not be established if previously it was paused and terminated. In that case the channel's suspend bit remains set that prevents to transfer anything until channel is resumed. The patch adds the dwc_chan_resume() call instead of a plain flag assignment. That clears the DWC_CFGL_CH_SUSP bit as well during termination. Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-01-12dw_dmac: backlink to dw_dma in dw_dma_chan is superfluousAndy Shevchenko2-10/+20
The same information could be extracted from the struct dma_chan. The patch introduces helper function dwc_get_data_width() as well. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-01-12dw_dmac: make usage of dw_dma_slave optionalAndy Shevchenko1-6/+7
The driver requires a custom slave configuration to be present to be able to make the slave transfers. Nevertheless, in some cases we need only the request line as an additional information to the generic slave configuration. The request line is provided by slave_id parameter of the dma_slave_config structure. That's why the custom slave configuration could be optional for such cases. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-01-12dw_dmac: store direction in the custom channel structureAndy Shevchenko2-8/+18
Currently the direction value comes from the generic slave configuration structure and explicitly as a preparation function parameter. The first one is kinda obsoleted. Thus, we have to store the value passed to the preparation function somewhere in our structures to be able to use it later. The best candidate to provide the storage is a custom channel structure. Until now we still keep and check the direction field of the slave config structure as well. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-01-12dw_dmac: call .probe after we have a device in placeAndy Shevchenko1-1/+2
If we don't yet have the platform device for the driver when it is being loaded we fail to probe the driver. So instead of calling probe() directly we call platform_driver_register(). It will call the probe() immediately if we have the device but also makes the driver to work on platforms where the platform device is created later. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-01-12dma: ste_dma40: reuse is_slave_direction helperAndy Shevchenko1-1/+1
The is_slave_direction helps to check if the transfer type is slave. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Viresh Kumar <viresh.kumar@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-01-12dma: ipu_idmac: reuse is_slave_direction helperAndy Shevchenko1-1/+1
The is_slave_direction helps to check if the transfer type is slave. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Viresh Kumar <viresh.kumar@linaro.org> Cc: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-01-12dma: ep93xx_dma: reuse is_slave_direction helperAndy Shevchenko1-2/+1
The is_slave_direction helps to check if the transfer type is slave. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Viresh Kumar <viresh.kumar@linaro.org> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-01-12dma: dw_dmac: check direction properly in dw_dma_cyclic_prepAndy Shevchenko1-2/+3
dma_transfer_direction is a normal enum. It means we can't usually use the values as bit fields. Let's adjust this check and move it above the usage of the direction parameter, due to the nature of the following usage of it. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-01-12dma: at_hdmac: check direction properly for cyclic transfersAndy Shevchenko1-5/+5
dma_transfer_direction is a normal enum. It means we can't usually use the values as bit fields. Let's adjust this check and move it above the usage of the direction parameter, due to the nature of the following usage of it. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Viresh Kumar <viresh.kumar@linaro.org> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-01-09dma: dw_dmac: add dwc_chan_pause and dwc_chan_resumeAndy Shevchenko1-9/+22
We will use at least the dwc_chan_resume() later. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-01-09dw_dmac: update tx_node_active in dwc_do_single_blockAndy Shevchenko1-8/+6
The "else" keyword in the dw_dma_tasklet is removed as well. All together simplifies the logic of the code and understanding of what is happening there. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-01-09dw_dmac: remove redundant checkAndy Shevchenko1-1/+1
There is no need to check the callback_required parameter, due to we check the callback pointer to be a non-NULL. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-01-09dw_dmac: check for mapping errorsAndy Shevchenko1-6/+14
Otherwise we get a warning in case of CONFIG_DMA_API_DEBUG=y [ 45.775943] WARNING: at lib/dma-debug.c:933 check_unmap+0x5d6/0x6ac() [ 45.782369] dw_dmac dw_dmac.0: DMA-API: device driver failed to check map error[device address=0x00000000356efcc0] [size=28 bytes] [mapped as single] Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-01-09dw_dmac: absence of pdata isn't critical when autocfg is setAndy Shevchenko1-7/+16
The patch allows to probe the device when platform data is absent and hardware auto configuration is enabled. In that case the default platform data is used where the channel allocation order is set to ascending, channel priority is set to ascending, and private property is set to true. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-01-08dma: mxs-dma: Fix build warnings with W=1Fabio Estevam1-4/+4
Fix the following warnings when building with W=1 option: drivers/dma/mxs-dma.c: In function 'mxs_dma_alloc_chan_resources': drivers/dma/mxs-dma.c:368:25: warning: comparison between signed and unsigned integer expressions [-Wsign-compare] drivers/dma/mxs-dma.c: In function 'mxs_dma_prep_slave_sg': drivers/dma/mxs-dma.c:481:17: warning: comparison between signed and unsigned integer expressions [-Wsign-compare] drivers/dma/mxs-dma.c:494:3: warning: comparison between signed and unsigned integer expressions [-Wsign-compare] drivers/dma/mxs-dma.c:515:14: warning: comparison between signed and unsigned integer expressions [-Wsign-compare] drivers/dma/mxs-dma.c: In function 'mxs_dma_prep_dma_cyclic': drivers/dma/mxs-dma.c:563:13: warning: comparison between signed and unsigned integer expressions [-Wsign-compare] Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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