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2013-06-22clk: exynos4: Fix clock aliases for cpufreq related clocksTushar Behera1-10/+11
2013-06-22clk: samsung: Add MUX_FA macro to pass flag and aliasTushar Behera1-0/+3
2013-06-21clk: add support for Rockchip gate clocksHeiko Stübner3-0/+100
2013-06-20clk: vexpress: Make the clock drivers directly available for arm64Pawel Moll1-1/+1
2013-06-20clk: vexpress: Use full node name to identify individual clocksPawel Moll1-2/+2
2013-06-18clk: tegra: T114: add DFLL DVCO reset controlPaul Walmsley2-0/+39
2013-06-18clk: tegra: T114: add DFLL source clocksPaul Walmsley1-0/+11
2013-06-18clk: tegra: T114: add FCPU clock shaper programming, needed by the DFLLPaul Walmsley2-0/+122
2013-06-16clk: gate: add CLK_GATE_HIWORD_MASKHaojian Zhuang1-6/+19
2013-06-16clk: divider: add CLK_DIVIDER_HIWORD_MASK flagHaojian Zhuang1-2/+13
2013-06-16clk: mux: add CLK_MUX_HIWORD_MASKHaojian Zhuang1-2/+15
2013-06-16clk: Always notify whole subtree when reparentingSoren Brinkmann1-2/+1
2013-06-12clk: honor CLK_GET_RATE_NOCACHE in clk_set_ratePeter De Schrijver1-1/+1
2013-06-12clk: use clk_get_rate() for debugfsPeter De Schrijver1-2/+2
2013-06-12clk: tegra: Use override bits when neededPeter De Schrijver1-33/+49
2013-06-12clk: tegra: override bits for Tegra30 PLLMPeter De Schrijver1-0/+18
2013-06-12clk: tegra: override bits for Tegra114 PLLMPeter De Schrijver1-0/+9
2013-06-12clk: tegra: Add fields for override bitsPeter De Schrijver1-0/+8
2013-06-12clk: tegra: fix sclk_parentsPeter De Schrijver1-1/+1
2013-06-12clk: tegra: fix pllre initilizationPeter De Schrijver1-2/+1
2013-06-12clk: tegra: PLL m,n,p init for Tegra114Peter De Schrijver1-0/+77
2013-06-12clk: tegra: allow PLL m,n,p init from SoC filesPeter De Schrijver2-39/+53
2013-06-12clk: tegra: pllp_out2 divider is int onlyPeter De Schrijver1-2/+2
2013-06-12clk: tegra: pllc and pllxc should use pdiv_mapPeter De Schrijver1-80/+82
2013-06-11clk: divider: do not propagate rate change request when unnecessaryShawn Guo1-0/+10
2013-06-07clk: ux500: Clocks definition for u8540Philippe Begnic1-1/+559
2013-06-07mfd: db8500: Update BML clock register for db8580Philippe Begnic2-0/+2
2013-06-07clk: ux500: Pass clock base adresses in initcall for u8540 and u9540Philippe Begnic2-4/+4
2013-06-05clk: tegra114: Fix msenc clock registerMikko Perttunen1-1/+1
2013-05-31clk: tegra: Use common of_clk_init functionPrashant Gaikwad5-33/+6
2013-05-31clk: tegra114: correctly output clk_32kAlexandre Courbot1-0/+3
2013-05-31clk: tegra: fix clk_out parents listPrashant Gaikwad2-4/+4
2013-05-31clk: Add TI-Nspire clock driversDaniel Tang2-0/+154
2013-05-31clk: use platform_{get,set}_drvdata()Jingoo Han2-3/+3
2013-05-30clk: mpc85xx: Update the compatible stringTang Yuantian1-1/+1
2013-05-30clk: sunxi: "cpu_data" is defined in header files of some architecturesGiacomo A. Catenazzi1-2/+2
2013-05-30clk: exynos5250: Add sclk_mpll to the parent list of mout_cpu clockTushar Behera1-1/+1
2013-05-30clk: exynos5250: Update cpufreq related clocks for EXYNOS5250Tushar Behera1-3/+3
2013-05-30clk: vt8500: Remove unnecessary divisor adjustment in vtwm_dclk_set_rate()Tony Prisk1-4/+0
2013-05-30clk: vt8500: Add support for clocks on the WM8850 SoCsTony Prisk1-0/+71
2013-05-29clk: Disable unused clocks after deferred probing is doneSaravana Kannan1-1/+1
2013-05-29clk: wm831x: Fix wm831x_clkout_get_parentAxel Lin1-3/+3
2013-05-29clk: wm831x: Fix update wrong register for enable/disable FLLAxel Lin1-3/+3
2013-05-29clk: si5351: Allow to build without CONFIG_OFSebastian Hesselbarth1-1/+0
2013-05-29clk: Fix race condition between clk_set_parent and clk_enable()Saravana Kannan1-45/+44
2013-05-29clk: si5351: declare all device IDs for module loadingJean-Francois Moine1-1/+4
2013-05-29clk: sun5i: Add compatibles for Allwinner A13Maxime Ripard1-8/+23
2013-05-29clk: ux500: abx500-clk: rename ux500 audio codec aliasesFabio Baltieri1-4/+4
2013-05-29clk: si5351: Allow user to define disabled state for every clock outputSebastian Hesselbarth2-3/+72
2013-05-29clk: add PowerPC corenet clock driver supportTang Yuantian3-0/+288