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2013-11-07mtd: nand: omap: clean-up ecc layout for BCH ecc schemesPekon Gupta1-99/+62
In current implementation omap3_init_bch_tail() is a common function to define ecc layout for different BCHx ecc schemes.This patch: (1) removes omap3_init_bch_tail() and defines ecc layout for individual ecc-schemes along with populating their nand_chip->ecc data in omap_nand_probe(). This improves the readability and scalability of code for add new ecc schemes in future. (2) removes 'struct nand_bbt_descr bb_descrip_flashbased' because default nand_bbt_descr in nand_bbt.c matches the same (.len=1 for x8 devices). (3) add the check to see if NAND device has enough OOB/Spare bytes to store ECC signature of whole page, as defined by ecc-scheme. Signed-off-by: Pekon Gupta <pekon@ti.com> Tested-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2013-11-07mtd: nand: omap2: clean-up BCHx_HW and BCHx_SW ECC configurations in ↵Pekon Gupta1-123/+158
device_probe current implementation in omap3_init_bch() has some redundant code like: (1) omap3_init_bch() re-probes the DT-binding to detect presence of ELM h/w engine on SoC. And based on that it selects implemetation of ecc-scheme. However, this is already done as part of GPMC DT parsing. (2) As omap3_init_bch() serves as common function for configuring all types of BCHx ecc-schemes, so there are multiple levels of redudant if..then..else checks while populating nand_chip->ecc. This patch make following changes to OMAP NAND driver: (1) removes omap3_init_bch(): each ecc-scheme is individually configured in omap_nand_probe() there by removing redundant if..then..else checks. (2) adds is_elm_present(): re-probing of ELM device via DT is not required as it's done in GPMC driver probe. Thus is_elm_present() just initializes ELM driver with NAND probe data, when ecc-scheme with h/w based error-detection is used. (3) separates out configuration of different flavours of "BCH4" and "BCH8" ecc-schemes as given in below table (4) conditionally compiles callbacks implementations of ecc.hwctl(), ecc.calculate(), ecc.correct() to avoid warning of un-used functions. +---------------------------------------+---------------+---------------+ | ECC scheme |ECC calculation|Error detection| +---------------------------------------+---------------+---------------+ |OMAP_ECC_HAM1_CODE_HW |H/W (GPMC) |S/W | +---------------------------------------+---------------+---------------+ |OMAP_ECC_BCH4_CODE_HW_DETECTION_SW |H/W (GPMC) |S/W (lib/bch.c)| | (needs CONFIG_MTD_NAND_ECC_BCH) | | | | | | | |OMAP_ECC_BCH4_CODE_HW |H/W (GPMC) |H/W (ELM) | | (needs CONFIG_MTD_NAND_OMAP_BCH && | | | | ti,elm-id) | | | +---------------------------------------+---------------+---------------+ |OMAP_ECC_BCH8_CODE_HW_DETECTION_SW |H/W (GPMC) |S/W (lib/bch.c)| | (needs CONFIG_MTD_NAND_ECC_BCH) | | | | | | | |OMAP_ECC_BCH8_CODE_HW |H/W (GPMC) |H/W (ELM) | | (needs CONFIG_MTD_NAND_OMAP_BCH && | | | | ti,elm-id) | | | +---------------------------------------+---------------+---------------+ - 'CONFIG_MTD_NAND_ECC_BCH' is generic KConfig required to build lib/bch.c which is required for ECC error detection done in software. (mainly used for legacy platforms which do not have on-chip ELM engine) - 'CONFIG_MTD_NAND_OMAP_BCH' is OMAP specific Kconfig to detemine presence on ELM h/w engine on SoC. Signed-off-by: Pekon Gupta <pekon@ti.com> Tested-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2013-11-07mtd: nand: omap: use DT specified bus-width only for scanning NAND devicePekon Gupta1-12/+9
This patch: - calls nand_scan_ident() using bus-width as passed by DT - removes double calls to nand_scan_ident(), in case first call fails then omap_nand_probe just returns error. Signed-off-by: Pekon Gupta <pekon@ti.com> Tested-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2013-11-07mtd: nand: omap: cleanup: replace local references with generic framework namesPekon Gupta1-55/+57
This patch updates following in omap_nand_probe() and omap_nand_remove() - replaces "info->nand" with "nand_chip" (struct nand_chip *nand_chip) - replaces "info->mtd" with "mtd" (struct mtd_info *mtd) - white-space and formatting cleanup Signed-off-by: Pekon Gupta <pekon@ti.com> Tested-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2013-11-07mtd: nand: omap: combine different flavours of 1-bit hamming ecc schemesPekon Gupta1-6/+3
OMAP NAND driver currently supports multiple flavours of 1-bit Hamming ecc-scheme, like: - OMAP_ECC_HAMMING_CODE_DEFAULT 1-bit hamming ecc code using software library - OMAP_ECC_HAMMING_CODE_HW 1-bit hamming ecc-code using GPMC h/w engine - OMAP_ECC_HAMMING_CODE_HW_ROMCODE 1-bit hamming ecc-code using GPMC h/w engin with ecc-layout compatible to ROM code. This patch combines above multiple ecc-schemes into single implementation: - OMAP_ECC_HAM1_CODE_HW 1-bit hamming ecc-code using GPMC h/w engine with ROM-code compatible ecc-layout. Signed-off-by: Pekon Gupta <pekon@ti.com> Reviewed-by: Felipe Balbi <balbi@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Tested-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2013-11-07mtd: m25p80: remove 'disabled' device checkBrian Norris1-6/+1
It seems like the following commit was never necessary commit 5f949137952020214cd167093dd7be448f21c079 Author: Shaohui Xie <Shaohui.Xie@freescale.com> Date: Fri Oct 14 15:49:00 2011 +0800 mtd: m25p80: don't probe device which has status of 'disabled' because it duplicates the code in of_platform_device_create_pdata() which ensures that 'disabled' nodes are never instantiated. Also, drop the __maybe_unused. Signed-off-by: Brian Norris <computersforpeace@gmail.com> Reviewed-by: Sourav Poddar <sourav.poddar@ti.com> Reviewed-by: Grant Likely <grant.likely@linaro.org> Cc: Rob Herring <rob.herring@calxeda.com> Cc: <devicetree@vger.kernel.org>
2013-11-07mtd: m25p80: remove M25PXX_USE_FAST_READ KconfigBrian Norris2-12/+6
Remove the compile-time option for FAST_READ, since we have run-time support for detecting it. This refactors the logic for enabling fast-read, such that for DT-enabled devices, we honor the "m25p,fast-read" property but for non-DT devices, we default to using FAST_READ whenever the flash device supports it. Normal READ and FAST_READ differ only in the following: * FAST_READ supports SPI higher clock frequencies [1] * number of dummy cycles; FAST_READ requires 8 dummy cycles (whereas READ requires 0) to allow the flash sufficient setup time, even when running at higher clock speeds Thus, for flash chips which support FAST_READ, there is otherwise no limiting reason why we cannot use the FAST_READ opcode instead of READ. It simply allows the SPI controller to run at higher clock rates. So theoretically, nobody should be needing the compile-time option anyway. [1] I have a Spansion S25FL128S datasheet which says: "The maximum operating clock frequency for the READ command is 50 MHz." And: "The maximum operating clock frequency for FAST READ command is 133 MHz." Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2013-11-07mtd: m25p80: re-align ID entriesBrian Norris1-16/+16
No change in the table data. Signed-off-by: Brian Norris <computersforpeace@gmail.com> Reviewed-by: Sourav Poddar <sourav.poddar@ti.com>
2013-11-07mtd: m25p80: remove obsolete FIXMEBrian Norris1-9/+0
The FIXME and NOTE have already been fixed (we have FAST_READ support). Signed-off-by: Brian Norris <computersforpeace@gmail.com> Reviewed-by: Sourav Poddar <sourav.poddar@ti.com> Acked-by: Marek Vasut <marex@denx.de>
2013-11-07mtd: m25p80: fix allocation sizeBrian Norris1-13/+7
This patch fixes two memory errors: 1. During a probe failure (in mtd_device_parse_register?) the command buffer would not be freed. 2. The command buffer's size is determined based on the 'fast_read' boolean, but the assignment of fast_read is made after this allocation. Thus, the buffer may be allocated "too small". To fix the first, just switch to the devres version of kzalloc. To fix the second, increase MAX_CMD_SIZE unconditionally. It's not worth saving a byte to fiddle around with the conditions here. This problem was reported by Yuhang Wang a while back. Signed-off-by: Brian Norris <computersforpeace@gmail.com> Reported-by: Yuhang Wang <wangyuhang2014@gmail.com> Reviewed-by: Sourav Poddar <sourav.poddar@ti.com> Cc: <stable@vger.kernel.org>
2013-11-07mtd: gpmi: imx6: fix the wrong method for checking ready/busyHuang Shijie1-0/+7
In the imx6, all the ready/busy pins are binding togeter. So we should always check the ready/busy pin of the chip 0. In the other word, when the CS1 is enabled, we should also check the ready/busy of chip 0; if we check the ready/busy of chip 1, we will get the wrong result. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2013-11-07mtd: gpmi: scan two nand chipsHuang Shijie1-1/+1
Some nand chip has two DIEs in a single chip, such as Micron MT29F32G08QAA. Each die has its own chip select pin, so this chip acts as two nand chips. If we only scan one chip, we may find that we only get 2G for this chip, but in actually, this chip's size is 4G. So scan two chips by default. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2013-11-07mtd: gpmi: use DMA channel 0 for all the nand chipsHuang Shijie1-3/+2
We only have one DMA channel : the channel 0. Use DMA channel 0 to access all the nand chips. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2013-11-07mtd: gpmi: decouple the chip select from the DMA channelHuang Shijie2-0/+9
Decouple the chip select from the DMA channel, we use the DMA channel 0 to accecc all the nand devices. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2013-11-07driver/mtd/ifc: Read Status while programming NAND flashPrabhakar Kushwaha1-10/+24
as per controller description, "While programming a NAND flash, status read should never skipped. Because it may happen that a new command is issued to the NAND Flash, even when the device has not yet finished processing the previous request. This may result in unpredictable behaviour." IFC controller never polls for R/B signal after command send. It just return control to software. This behaviour may not occur with NAND flash access. because new commands are sent after polling R/B signal. But it may happen in scenario where GPCM-ASIC and NAND flash device are working simultaneously. Update the controller driver to take care of this requirement Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2013-11-07driver/mtd/IFC: Add support of 8K page size NAND flashPrabhakar Kushwaha1-0/+77
Current IFC driver supports till 4K page size NAND flash. Add support of 8K Page size NAND flash - Add nand_ecclayout for 4 bit & 8 bit ecc - Defines constants - also fix ecc.strength for 8bit ecc of 8K page size NAND Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2013-11-07mtd: Move major number definitions to major.hEzequiel Garcia7-0/+7
This patch moves the char and block major number definitions to major.h to be with the rest of the major numbers. While doing this, include major.h in the files that need it. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2013-11-07mtd: bcm47xxpart: detect "factory" partitionRafał Miłecki1-0/+8
A new type of partition with magic FCTY was found on Huawei E970: 46 43 54 59 4b 51 37 4e 41 42 31 38 41 32 39 30 |FCTYKQ7NAB18A290| Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2013-11-07mtd: bcm47xxpart: detect block aligned Squashfs partitionRafał Miłecki1-0/+8
Most of the bcm47xx devices use TRX format for storing kernel and some partition like Squashfs or JFFS2. This is pretty flexible solution, CFE (the bootloader) just writes (and later boots) TRX at some hardcoded place and paritions can vary in the size. However some devices don't use TRX format. Very recently we have discovered ZTE H218N that has kernel and rootfs partitions at some "random" places. This patch allows Linux find a rootfs partition after installing custom image with a CFE bootloader. Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2013-11-07mtd: bcm47xxpart: handle malloc failuresHauke Mehrtens1-0/+7
Handle return NULL in malloc. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2013-11-07mtd: bcm47xxnflash: Use devm_kzallocSachin Kamat1-13/+5
devm_kzalloc is device managed and simplifies the code. Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2013-11-07mtd: bcm47xxnflash: Use module_platform_driverSachin Kamat1-19/+1
module_platform_driver simplifies the code by removing boiler plate. Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2013-11-07mtd: plat-ram: Use module_platform_driverSachin Kamat1-15/+1
module_platform_driver simplifies the code by removing boiler plate. Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2013-11-07mtd: nand: hack ONFI for non-power-of-2 dimensionsBrian Norris1-2/+13
Some bright specification writers decided to write this in the ONFI spec (from ONFI 3.0, Section 3.1): "The number of blocks and number of pages per block is not required to be a power of two. In the case where one of these values is not a power of two, the corresponding address shall be rounded to an integral number of bits such that it addresses a range up to the subsequent power of two value. The host shall not access upper addresses in a range that is shown as not supported." This breaks every assumption MTD makes about NAND block/chip-size dimensions -- they *must* be a power of two! And of course, an enterprising manufacturer has made use of this lovely freedom. Exhibit A: Micron MT29F32G08CBADAWP "- Plane size: 2 planes x 1064 blocks per plane - Device size: 32Gb: 2128 blockss [sic]" This quickly hits a BUG() in nand_base.c, since the extra dimensions overflow so we think it's a second chip (on my single-chip setup): ONFI param page 0 valid ONFI flash detected NAND device: Manufacturer ID: 0x2c, Chip ID: 0x44 (Micron MT29F32G08CBADAWP), 4256MiB, page size: 8192, OOB size: 744 ------------[ cut here ]------------ kernel BUG at drivers/mtd/nand/nand_base.c:203! Internal error: Oops - BUG: 0 [#1] SMP ARM [... trim ...] [<c02cf3e4>] (nand_select_chip+0x18/0x2c) from [<c02d25c0>] (nand_do_read_ops+0x90/0x424) [<c02d25c0>] (nand_do_read_ops+0x90/0x424) from [<c02d2dd8>] (nand_read+0x54/0x78) [<c02d2dd8>] (nand_read+0x54/0x78) from [<c02ad2c8>] (mtd_read+0x84/0xbc) [<c02ad2c8>] (mtd_read+0x84/0xbc) from [<c02d4b28>] (scan_read.clone.4+0x4c/0x64) [<c02d4b28>] (scan_read.clone.4+0x4c/0x64) from [<c02d4c88>] (search_bbt+0x148/0x290) [<c02d4c88>] (search_bbt+0x148/0x290) from [<c02d4ea4>] (nand_scan_bbt+0xd4/0x5c0) [... trim ...] ---[ end trace 0c9363860d865ff2 ]--- So to fix this, just truncate these dimensions down to the greatest power-of-2 dimension that is less than or equal to the specified dimension. Signed-off-by: Brian Norris <computersforpeace@gmail.com> Cc: <stable@vger.kernel.org>
2013-11-07mtd: nand: pxa3xx: Allocate data buffer on detected flash sizeEzequiel Garcia1-15/+30
This commit replaces the currently hardcoded buffer size, by a dynamic detection scheme. First a small 256 bytes buffer is allocated so the device can be detected (using READID and friends commands). After detection, this buffer is released and a new buffer is allocated to acommodate the page size plus out-of-band size. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: Daniel Mack <zonque@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2013-11-07mtd: nand: pxa3xx: Move DMA I/O enablingEzequiel Garcia1-1/+5
Instead of setting info->dma each time a command is prepared, we can move it after the DMA buffers are allocated. This is more clear and it's the proper place to enable this, given DMA cannot be turned on and off during runtime. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: Daniel Mack <zonque@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2013-11-07mtd: m25p80: Add support for Micron N25Q512A memoryPriyanka Jain1-0/+1
Micron N25Q512A is a spi flash memory with following features: -64MB size, 1.8V, Mulitple I/O, 4KB Sector erase memory. -Memory is organised as 1024(64KB) main sectors. -Each sector is divided into 256 pages. -Register set/Opcodes are similar to other N25Q family products. Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com> Acked-by: Marek Vasut <marex@denx.de> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2013-11-07mtg: docg3: use free_bch() instead of kfree()Wei Yongjun1-1/+1
Use free_bch() instead of kfree() to free init_bch() allocated data. Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn> Acked-by: Robert Jarzmik <robert.jarzmik@free.fr> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2013-11-07mtd: docg4: fix status polling loopMike Dunn1-9/+6
The loop that polls the status register waiting for an operation to complete foolishly bases the timeout simply on the number of loop iterations that have ocurred. When I increased the processor clock speed, timeouts started to appear for long block erasure operations. This patch measures the timeout using jiffies. Signed-off-by: Mike Dunn <mikedunn@newsguy.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2013-11-07mtd: socrates_nand: Use dev_err instead of printkSachin Kamat1-1/+1
dev_err is preferred to printk. Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2013-11-07mtd: socrates_nand: Use devm_kzallocSachin Kamat1-8/+2
devm_kzalloc is device managed and makes code simpler. Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2013-11-07mtd: socrates_nand: Remove redundant dev_set_drvdataSachin Kamat1-2/+0
Driver core will set the driver data to NULL upon detach or probe failure. Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2013-11-07mtd: fsl_ifc_nand: Use module_platform_driverSachin Kamat1-19/+1
module_platform_driver removes boiler plate code and makes it simpler. Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2013-11-07mtd: fsl_ifc_nand: Remove redundant dev_set_drvdataSachin Kamat1-1/+0
Driver core will set the driver data to NULL upon detach or probe failure. Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2013-11-07mtd: sst25l: Use devm_kzallocSachin Kamat1-9/+3
devm_kzalloc is device managed and makes code simpler. Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2013-11-07mtd: sst25l: Remove redundant spi_set_drvdataSachin Kamat1-1/+0
Driver core will set the driver data to NULL upon detach or probe failure. Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2013-11-07mtd: Use MTD_BLOCK_MAJOR instead of the magic numberEzequiel Garcia2-2/+2
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2013-11-07mtd: nand: pxa3xx_nand: Remove redundant of_match_ptrSachin Kamat1-1/+1
The data structure of_match_ptr() protects is always compiled in. Hence of_match_ptr() is not needed. Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2013-11-07mtd: nand: lpc32xx_slc: Remove redundant of_match_ptrSachin Kamat1-1/+1
The data structure of_match_ptr() protects is always compiled in. Hence of_match_ptr() is not needed. Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2013-11-07mtd: nand: lpc32xx_mlc: Remove redundant of_match_ptrSachin Kamat1-1/+1
The data structure of_match_ptr() protects is always compiled in. Hence of_match_ptr() is not needed. Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2013-11-07mtd: denali: remove unnecessary pci_set_drvdata()Jingoo Han1-1/+0
The driver core clears the driver data to NULL after device_release or on probe failure. Thus, it is not needed to manually clear the device driver data to NULL. Signed-off-by: Jingoo Han <jg1.han@samsung.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2013-11-07mtd: scb2_flash: remove unnecessary pci_set_drvdata()Jingoo Han1-1/+0
The driver core clears the driver data to NULL after device_release or on probe failure. Thus, it is not needed to manually clear the device driver data to NULL. Signed-off-by: Jingoo Han <jg1.han@samsung.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2013-11-07mtd: pci: remove unnecessary pci_set_drvdata()Jingoo Han1-1/+0
The driver core clears the driver data to NULL after device_release or on probe failure. Thus, it is not needed to manually clear the device driver data to NULL. Signed-off-by: Jingoo Han <jg1.han@samsung.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2013-11-07mtd: intel_vr_nor: remove unnecessary pci_set_drvdata()Jingoo Han1-1/+0
The driver core clears the driver data to NULL after device_release or on probe failure. Thus, it is not needed to manually clear the device driver data to NULL. Signed-off-by: Jingoo Han <jg1.han@samsung.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2013-11-07mtd: phram: Make phram 64-bit compatibleAlexander Sverdlin1-33/+33
phram was 32-bit limited by design. Machines are growing up, but phram module is still useful. Update it. The patch is bigger than minimum, because simple_strtoul() is obsolete. Tested on MIPS64 and compile-tested for PPC (32 bit). Signed-off-by: Alexander Sverdlin <alexander.sverdlin@nsn.com> Reviewed-by: Joern Engel <joern@logfs.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2013-10-28mtd: diskonchip: Fix incorrect placement of __initdataSachin Kamat1-1/+1
__initdata should be placed between the variable name and equal sign for the variable to be placed in the intended section. Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2013-10-28mtd: m25p80: Add support for ESMT F25L32PAFlavio Silveira1-0/+3
This flashchip is used in D-Link DIR-610 A1 router board and maybe several others, yet is not kernel upstream. So add support for it according to datasheet [0], making it easier to support other boards using this flashchip in the future. [0] http://www.esmt.com.tw/DB/manager/upload/F25L32PA.pdf Signed-off-by: Flavio Silveira <fggs@terra.com.br> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2013-10-28mtd: plat-ram: Remove casting the return value which is a void pointerJingoo Han1-1/+1
Casting the return value which is a void pointer is redundant. The conversion from void pointer to any other pointer type is guaranteed by the C programming language. Signed-off-by: Jingoo Han <jg1.han@samsung.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2013-10-28mtd: nand: fix the wrong mtd->type for nand chipHuang Shijie1-1/+1
Current code sets the mtd->type with MTD_NANDFLASH for both SLC and MLC. So the jffs2 may supports the MLC nand, but in actually, the jffs2 should not support the MLC. This patch uses the nand_is_slc() to check the nand cell type, and set the mtd->type with the right nand type. After this patch, the jffs2 only supports the SLC nand. The side-effect of this patch: Before this patch, the ioctl(MEMGETINFO) can only return with the MTD_NANDFLASH; but after this patch, the ioctl(MEMGETINFO) will return with the MTD_NANDFLASH for SLC, and MTD_MLCNANDFLASH for MLC. So the user applictions(such as mtd-utils) should also changes a little for this. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2013-10-28mtd: add MTD_MLCNANDFLASH case for mtd_type_show()Huang Shijie1-0/+3
The current mtd_type_show() misses the MTD_MLCNANDFLASH case. This patch adds the case for it, and also updates the ABI. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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