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2016-03-05mtd: nand: pxa3xx_nand: fix dmaengine initializationRobert Jarzmik1-1/+1
When the driver is initialized in a pure device-tree platform, the driver's probe fails allocating the dma channel : [ 525.624435] pxa3xx-nand 43100000.nand: no resource defined for data DMA [ 525.632088] pxa3xx-nand 43100000.nand: alloc nand resource failed The reason is that the DMA IO resource is not acquired through platform resources but by OF bindings. Fix this by ensuring that DMA IO resources are only queried in the non device-tree case. Fixes: 8f5ba31aa565 ("mtd: nand: pxa3xx-nand: switch to dmaengine") Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr> Acked-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2016-03-05mtd: nand: sunxi: remove direct mtd->priv accessesBoris BREZILLON1-3/+3
mtd->priv is no longer pointing to the struct nand_chip it is attached to. Replace those accesses by mtd_to_nand() calls. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Fixes: 4be4e03efc7f ("mtd: nand: sunxi: add randomizer support") Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2016-03-01mtd: brcmnand: Fix v7.1 register offsetsFlorian Fainelli1-1/+33
The BRCMNAND controller revision 7.1 is almost 100% compatible with the previous v6.0 register offset layout, except for the Correctable Error Reporting Threshold registers. Fix this by adding another table with the correct offsets for CORR_THRESHOLD and CORR_THRESHOLD_EXT. Fixes: 27c5b17cd1b1 ("mtd: nand: add NAND driver "library" for Broadcom STB NAND controller") Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2016-02-24mtd: onenand: fix deadlock in onenand_block_markbadAaro Koskinen1-1/+2
Commit 5942ddbc500d ("mtd: introduce mtd_block_markbad interface") incorrectly changed onenand_block_markbad() to call mtd_block_markbad instead of onenand_chip's block_markbad function. As a result the function will now recurse and deadlock. Fix by reverting the change. Fixes: 5942ddbc500d ("mtd: introduce mtd_block_markbad interface") Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi> Acked-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Cc: <stable@vger.kernel.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2016-02-12mtd: spi-nor: remove micron_quad_enable()Cyrille Pitchen1-45/+1
This patch remove the micron_quad_enable() function which force the Quad SPI mode. However, once this mode is enabled, the Micron memory expect ALL commands to use the SPI 4-4-4 protocol. Hence a failure does occur when calling spi_nor_wait_till_ready() right after the update of the Enhanced Volatile Configuration Register (EVCR) in the micron_quad_enable() as the SPI controller driver is not aware about the protocol change. Since there is almost no performance increase using Fast Read 4-4-4 commands instead of Fast Read 1-1-4 commands, we rather keep on using the Extended SPI mode than enabling the Quad SPI mode. Let's take the example of the pretty standard use of 8 dummy cycles during Fast Read operations on 64KB erase sectors: Fast Read 1-1-4 requires 8 cycles for the command, then 24 cycles for the 3byte address followed by 8 dummy clock cycles and finally 65536*2 cycles for the read data; so 131112 clock cycles. On the other hand the Fast Read 4-4-4 would require 2 cycles for the command, then 6 cycles for the 3byte address followed by 8 dummy clock cycles and finally 65536*2 cycles for the read data. So 131088 clock cycles. The theorical bandwidth increase is 0.0%. Now using Fast Read operations on 512byte pages: Fast Read 1-1-4 needs 8+24+8+(512*2) = 1064 clock cycles whereas Fast Read 4-4-4 would requires 2+6+8+(512*2) = 1040 clock cycles. Hence the theorical bandwidth increase is 2.3%. Consecutive reads for non sequential pages is not a relevant use case so The Quad SPI mode is not worth it. mtd_speedtest seems to confirm these figures. Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com> Fixes: 548cd3ab54da ("mtd: spi-nor: Add quad I/O support for Micron SPI NOR") Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2016-02-12mtd: spi-nor: Add support for s25fl116kSascha Hauer1-0/+1
The Spansion s25fl116k is a 16MBit NOR Flash supporting dual and quad read operations. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2016-02-12mtd: nand: pxa3xx_nand: add support for partial chunksThomas Petazzoni1-56/+101
This commit is needed to properly support the 8-bits ECC configuration with 4KB pages. When pages larger than 2 KB are used on platforms using the PXA3xx NAND controller, the reading/programming operations need to be split in chunks of 2 KBs or less because the controller FIFO is limited to about 2 KB (i.e a bit more than 2 KB to accommodate OOB data). Due to this requirement, the data layout on NAND is a bit strange, with ECC interleaved with data, at the end of each chunk. When a 4-bits ECC configuration is used with 4 KB pages, the physical data layout on the NAND looks like this: | 2048 data | 32 spare | 30 ECC | 2048 data | 32 spare | 30 ECC | So the data chunks have an equal size, 2080 bytes for each chunk, which the driver supports properly. When a 8-bits ECC configuration is used with 4KB pages, the physical data layout on the NAND looks like this: | 1024 data | 30 ECC | 1024 data | 30 ECC | 1024 data | 30 ECC | 1024 data | 30 ECC | 64 spare | 30 ECC | So, the spare area is stored in its own chunk, which has a different size than the other chunks. Since OOB is not used by UBIFS, the initial implementation of the driver has chosen to not support reading this additional "spare" chunk of data. Unfortunately, Marvell has chosen to store the BBT signature in the OOB area. Therefore, if the driver doesn't read this spare area, Linux has no way of finding the BBT. It thinks there is no BBT, and rewrites one, which U-Boot does not recognize, causing compatibility problems between the bootloader and the kernel in terms of NAND usage. To fix this, this commit implements the support for reading a partial last chunk. This support is currently only useful for the case of 8 bits ECC with 4 KB pages, but it will be useful in the future to enable other configurations such as 12 bits and 16 bits ECC with 4 KB pages, or 8 bits ECC with 8 KB pages, etc. All those configurations have a "last" chunk that doesn't have the same size as the other chunks. In order to implement reading of the last chunk, this commit: - Adds a number of new fields to the pxa3xx_nand_info to describe how many full chunks and how many chunks we have, the size of full chunks and partial chunks, both in terms of data area and spare area. - Fills in the step_chunk_size and step_spare_size variables to describe how much data and spare should be read/written for the current read/program step. - Reworks the state machine to accommodate doing the additional read or program step when a last partial chunk is used. This commit has been tested on a Marvell Armada 398 DB board, with a 4KB page NAND, tested in both 4 bits ECC and 8 bits ECC configurations. Robert Jarzmik has tested on some PXA platforms. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Tested-by: Robert Jarzmik <robert.jarzmik@free.fr> Acked-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2016-02-12mtd: bcm63xxpart: Move NOR flash layout to a separate functionSimon Arlott1-22/+32
Move the NOR flash layout to a separate function to allow the NAND flash layout to be supported. Signed-off-by: Simon Arlott <simon@fire.lp0.eu> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2016-02-12mtd: bcm63xxpart: Null terminate and validate conversion of flash stringsSimon Arlott1-4/+34
Strings read from flash could be missing null termination characters, or not contain valid integers. Null terminate the strings and check for errors when converting them to integers. Also validate that the addresses are at least BCM963XX_EXTENDED_SIZE because this will be subtracted from them. Signed-off-by: Simon Arlott <simon@fire.lp0.eu> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2016-02-12mtd: bcm63xxpart: Extract read of image tag to separate functionSimon Arlott1-22/+40
Extract image tag reading and CRC check to a separate function. Signed-off-by: Simon Arlott <simon@fire.lp0.eu> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2016-02-12mtd: bcm63xxpart: Remove dependency on mach-bcm63xxSimon Arlott2-16/+58
Read nvram directly from flash instead of using the in-memory copy that mach-bcm63xx has, to remove the dependency on mach-bcm63xx and allow the parser to work on bmips too. Rename remaining BCM63XX defines to BCM963XX as these are properties of the flash layout on the board. BCM963XX_DEFAULT_PSI_SIZE changes from SZ_64K to 64 because it will be multiplied by SZ_1K later on. Signed-off-by: Simon Arlott <simon@fire.lp0.eu> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2016-02-12mtd: atmel_nand: Support 32-bit ECC strengthRomain Izard2-2/+18
As the SAMA5D2 controller supports the 32-bit ECC strength, accept it as a valid setting when required by the device tree or the NAND parameter page. Then configure the controller to use this new setting. For the binding: Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Romain Izard <romain.izard.pro@gmail.com> Tested-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2016-02-12mtd: atmel_nand: Support PMECC on SAMA5D2Romain Izard2-3/+28
Starting with the SAMA5D2, there is a new revision of the Atmel PMECC controller that can correct 32 bits in each sector. This controller is not 100% compatible with the previous revision that corrected a maximum of 24 bits by sector, as some register addresses overlap. Using information from the device tree, we can configure the driver to work with both versions. For the binding: Acked-by: Rob Herring <robh@kernel.org> Tested-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Romain Izard <romain.izard.pro@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2016-02-12mtd: atmel_nand: Support variable RB_EDGE interruptsRomain Izard2-9/+29
The NFC controller used to accelerate the NAND transfers on SAMA5 chips can use either RB_EDGE0 or RB_EDGE3 as its ready/busy interrupt bit. Use the controller's compatible string to select the correct bit. For the binding: Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Wenyou Yang <Wenyou.yang@atmel.com> Tested-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Romain Izard <romain.izard.pro@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2016-02-01driver/memory: Removal of deprecated NO_IRQRaghav Dogra1-1/+1
Replacing the NO_IRQ macro with 0. If there is no interrupt, returned value will be 0 regardless of what NO_IRQ is defined. Signed-off-by: Raghav Dogra <raghav@freescale.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2016-02-01mtd: nand: pxa3xx_nand: add register access debugRobert Jarzmik1-5/+17
Add verbose debug for register accesses. This enables easier debugging by following where and how hardware is stimulated, and how it answers. Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr> Acked-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2016-02-01mtd: cs553x: Fix dependencies for !HAS_IOMEM archsRichard Weinberger1-0/+1
Not every arch has io memory nor can this driver ever work on UML/i386. So, unbreak the build by fixing the dependencies. Signed-off-by: Richard Weinberger <richard@nod.at> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2016-01-26mtd: Fix dependencies for !HAS_IOMEM archsRichard Weinberger2-0/+3
Not every arch has io memory. So, unbreak the build by fixing the dependencies. Signed-off-by: Richard Weinberger <richard@nod.at> Acked-by: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2016-01-26mtd: nand: vf610: remove useless mtd->ecclayout assignmentBoris BREZILLON1-2/+0
The NAND core layer is already taking care of ecclayout propagation. Remove this useless assignment. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2016-01-26mtd: nand: lpc32xx_mlc: fix ecc.sizeBoris BREZILLON1-1/+1
According to the ECC layout description the actual ecc.size is 512 bytes and not mtd->writesize. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2016-01-26staging: mt29f_spinand: kill unused ecclayout fieldBoris BREZILLON1-1/+0
The spinand_info struct embeds a pointer to an ecclayout definition, but this field is never used in the mt29f driver. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2016-01-26mtd: nand: kill unused ->ecclayout field in platform_nand_chip structBoris BREZILLON1-1/+0
This field is not set in any board file and can thus be dropped. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2016-01-26mtd: nand: jz4740: kill the ->ecc_layout fieldBoris BREZILLON1-3/+0
->ecc_layout is not used by any board file. Kill this field to avoid any confusion. New boards are encouraged to use the default ECC layout defined in NAND core. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2016-01-26mtd: nand: s3c2410: kill the ->ecc_layout fieldBoris BREZILLON1-3/+0
The s3c2410 is allowing board data to overload the default ECC layout defined inside the driver, but this feature is not used by board specific definitions. Kill this field so that we can easily move to a model where ecclayout are dynamically allocated by the NAND controller driver. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2016-01-25Merge v4.5-rc1 with MTD -next developmentBrian Norris10-80/+358
To start from a good base. Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2016-01-24Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linusLinus Torvalds4-5/+333
Pull MIPS updates from Ralf Baechle: "This is the main pull request for MIPS for 4.5 plus some 4.4 fixes. The executive summary: - ATH79 platform improvments, use DT bindings for the ATH79 USB PHY. - Avoid useless rebuilds for zboot. - jz4780: Add NEMC, BCH and NAND device tree nodes - Initial support for the MicroChip's DT platform. As all the device drivers are missing this is still of limited use. - Some Loongson3 cleanups. - The unavoidable whitespace polishing. - Reduce clock skew when synchronizing the CPU cycle counters on CPU startup. - Add MIPS R6 fixes. - Lots of cleanups across arch/mips as fallout from KVM. - Lots of minor fixes and changes for IEEE 754-2008 support to the FPU emulator / fp-assist software. - Minor Ralink, BCM47xx and bcm963xx platform support improvments. - Support SMP on BCM63168" * 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (84 commits) MIPS: zboot: Add support for serial debug using the PROM MIPS: zboot: Avoid useless rebuilds MIPS: BMIPS: Enable ARCH_WANT_OPTIONAL_GPIOLIB MIPS: bcm63xx: nvram: Remove unused bcm63xx_nvram_get_psi_size() function MIPS: bcm963xx: Update bcm_tag field image_sequence MIPS: bcm963xx: Move extended flash address to bcm_tag header file MIPS: bcm963xx: Move Broadcom BCM963xx image tag data structure MIPS: bcm63xx: nvram: Use nvram structure definition from header file MIPS: bcm963xx: Add Broadcom BCM963xx board nvram data structure MAINTAINERS: Add KVM for MIPS entry MIPS: KVM: Add missing newline to kvm_err() MIPS: Move KVM specific opcodes into asm/inst.h MIPS: KVM: Use cacheops.h definitions MIPS: Break down cacheops.h definitions MIPS: Use EXCCODE_ constants with set_except_vector() MIPS: Update trap codes MIPS: Move Cause.ExcCode trap codes to mipsregs.h MIPS: KVM: Make kvm_mips_{init,exit}() static MIPS: KVM: Refactor added offsetof()s MIPS: KVM: Convert EXPORT_SYMBOL to _GPL ...
2016-01-24Merge tag 'platform-drivers-x86-v4.5-2' of ↵Linus Torvalds2-0/+9
git://git.infradead.org/users/dvhart/linux-platform-drivers-x86 Pull x86 platform driver updates from Darren Hart: "Emergency travel prevented me from completing my final testing on this until today. Nothing here that couldn't wait until RC1 fixes, but I thought it best to get it out sooner rather than later as it does contain a build warning fix. Summary: A build warning fix, MAINTAINERS cleanup, and a new DMI quirk: ideapad-laptop: - Add Lenovo Yoga 700 to no_hw_rfkill dmi list MAINTAINERS: - Combine multiple telemetry entries intel_telemetry_debugfs: - Fix unused warnings in telemetry debugfs" * tag 'platform-drivers-x86-v4.5-2' of git://git.infradead.org/users/dvhart/linux-platform-drivers-x86: ideapad-laptop: Add Lenovo Yoga 700 to no_hw_rfkill dmi list MAINTAINERS: Combine multiple telemetry entries intel_telemetry_debugfs: Fix unused warnings in telemetry debugfs
2016-01-24Merge branch 'next' of ↵Linus Torvalds7-39/+297
git://git.kernel.org/pub/scm/linux/kernel/git/rzhang/linux Pull thermal management updates from Zhang Rui: "The top merge commit was re-generated yesterday because two topic branches were dropped from this pull request in the last minute due to some unaddressed comments. All the other material has been in linux-next for quite a while. Specifics: - Enhance thermal core to handle unexpected device cooling states after fresh boot and system resume. From Zhang Rui and Chen Yu. - Several fixes and cleanups on Rockchip and RCAR thermal drivers. From Caesar Wang and Kuninori Morimoto. - Add Broxton support for Intel processor thermal reporting device driver. From Amy Wiles" * 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/rzhang/linux: thermal: trip_point_temp_store() calls thermal_zone_device_update() thermal: rcar: rcar_thermal_get_temp() return error if strange temp thermal: rcar: check irq possibility in rcar_thermal_irq_xxx() thermal: rcar: check every rcar_thermal_update_temp() return value thermal: rcar: move rcar_thermal_dt_ids to upside thermal: rockchip: Support the RK3399 SoCs in thermal driver thermal: rockchip: Support the RK3228 SoCs in thermal driver dt-bindings: rockchip-thermal: Support the RK3228/RK3399 SoCs compatible thermal: rockchip: fix a trivial typo Thermal: Enable Broxton SoC thermal reporting device thermal: constify pch_dev_ops structure Thermal: do thermal zone update after a cooling device registered Thermal: handle thermal zone device properly during system sleep Thermal: initialize thermal zone device correctly
2016-01-24Merge branch 'for-linus' of ↵Linus Torvalds1-2/+1
git://git.kernel.org/pub/scm/linux/kernel/git/sage/ceph-client Pull Ceph updates from Sage Weil: "The two main changes are aio support in CephFS, and a series that fixes several issues in the authentication key timeout/renewal code. On top of that are a variety of cleanups and minor bug fixes" * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/sage/ceph-client: libceph: remove outdated comment libceph: kill off ceph_x_ticket_handler::validity libceph: invalidate AUTH in addition to a service ticket libceph: fix authorizer invalidation, take 2 libceph: clear messenger auth_retry flag if we fault libceph: fix ceph_msg_revoke() libceph: use list_for_each_entry_safe ceph: use i_size_{read,write} to get/set i_size ceph: re-send AIO write request when getting -EOLDSNAP error ceph: Asynchronous IO support ceph: Avoid to propagate the invalid page point ceph: fix double page_unlock() in page_mkwrite() rbd: delete an unnecessary check before rbd_dev_destroy() libceph: use list_next_entry instead of list_entry_next ceph: ceph_frag_contains_value can be boolean ceph: remove unused functions in ceph_frag.h
2016-01-24ideapad-laptop: Add Lenovo Yoga 700 to no_hw_rfkill dmi listJosh Boyer1-0/+7
Like the Yoga 900 models the Lenovo Yoga 700 does not have a hw rfkill switch, and trying to read the hw rfkill switch through the ideapad module causes it to always reported blocking breaking wifi. This commit adds the Lenovo Yoga 700 to the no_hw_rfkill dmi list, fixing the wifi breakage. BugLink: https://bugzilla.redhat.com/show_bug.cgi?id=1295272 Tested-by: <dinyar.rabady+spam@gmail.com> Cc: stable@vger.kernel.org Signed-off-by: Josh Boyer <jwboyer@fedoraproject.org> Signed-off-by: Darren Hart <dvhart@linux.intel.com>
2016-01-24intel_telemetry_debugfs: Fix unused warnings in telemetry debugfsSouvik Kumar Chakravarty1-0/+2
This patch fixes compile time warnings when CONFIG_PM_SLEEP is undefined. In this case sleep related counters are unused. Signed-off-by: Souvik Kumar Chakravarty <souvik.k.chakravarty@intel.com> Signed-off-by: Darren Hart <dvhart@linux.intel.com>
2016-01-24MIPS: bcm963xx: Move extended flash address to bcm_tag header fileSimon Arlott1-4/+2
The extended flash address needs to be subtracted from bcm_tag flash image offsets. Move this value to the bcm_tag header file. Renamed define name to consistently use bcm963xx for flash layout which should be considered a property of the board and not the SoC (i.e. bcm63xx could theoretically be used on a board without CFE or any flash). Signed-off-by: Simon Arlott <simon@fire.lp0.eu> Cc: David Woodhouse <dwmw2@infradead.org> Cc: Brian Norris <computersforpeace@gmail.com> Cc: Kevin Cernekee <cernekee@gmail.com> Cc: Florian Fainelli <f.fainelli@gmail.com> Cc: Jonas Gorski <jogo@openwrt.org> Cc: Linux Kernel Mailing List <linux-kernel@vger.kernel.org> Cc: MIPS Mailing List <linux-mips@linux-mips.org> Cc: MTD Maling List <linux-mtd@lists.infradead.org> Patchwork: https://patchwork.linux-mips.org/patch/11833/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2016-01-24MIPS: bcm963xx: Move Broadcom BCM963xx image tag data structureSimon Arlott1-1/+1
Move Broadcom BCM963xx image tag data structure to include/linux/ so that drivers outside of mach-bcm63xx can use it. Signed-off-by: Simon Arlott <simon@fire.lp0.eu> Cc: David Woodhouse <dwmw2@infradead.org> Cc: Brian Norris <computersforpeace@gmail.com> Cc: Kevin Cernekee <cernekee@gmail.com> Cc: Florian Fainelli <f.fainelli@gmail.com> Cc: Jonas Gorski <jogo@openwrt.org> Cc: Linux Kernel Mailing List <linux-kernel@vger.kernel.org> Cc: MIPS Mailing List <linux-mips@linux-mips.org> Cc: MTD Maling List <linux-mtd@lists.infradead.org> Patchwork: https://patchwork.linux-mips.org/patch/11832/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2016-01-24Merge tag 'for-linus' of ↵Linus Torvalds129-4144/+5686
git://git.kernel.org/pub/scm/linux/kernel/git/dledford/rdma Pull rdma updates from Doug Ledford: "Initial roundup of 4.5 merge window patches - Remove usage of ib_query_device and instead store attributes in ib_device struct - Move iopoll out of block and into lib, rename to irqpoll, and use in several places in the rdma stack as our new completion queue polling library mechanism. Update the other block drivers that already used iopoll to use the new mechanism too. - Replace the per-entry GID table locks with a single GID table lock - IPoIB multicast cleanup - Cleanups to the IB MR facility - Add support for 64bit extended IB counters - Fix for netlink oops while parsing RDMA nl messages - RoCEv2 support for the core IB code - mlx4 RoCEv2 support - mlx5 RoCEv2 support - Cross Channel support for mlx5 - Timestamp support for mlx5 - Atomic support for mlx5 - Raw QP support for mlx5 - MAINTAINERS update for mlx4/mlx5 - Misc ocrdma, qib, nes, usNIC, cxgb3, cxgb4, mlx4, mlx5 updates - Add support for remote invalidate to the iSER driver (pushed through the RDMA tree due to dependencies, acknowledged by nab) - Update to NFSoRDMA (pushed through the RDMA tree due to dependencies, acknowledged by Bruce)" * tag 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/dledford/rdma: (169 commits) IB/mlx5: Unify CQ create flags check IB/mlx5: Expose Raw Packet QP to user space consumers {IB, net}/mlx5: Move the modify QP operation table to mlx5_ib IB/mlx5: Support setting Ethernet priority for Raw Packet QPs IB/mlx5: Add Raw Packet QP query functionality IB/mlx5: Add create and destroy functionality for Raw Packet QP IB/mlx5: Refactor mlx5_ib_qp to accommodate other QP types IB/mlx5: Allocate a Transport Domain for each ucontext net/mlx5_core: Warn on unsupported events of QP/RQ/SQ net/mlx5_core: Add RQ and SQ event handling net/mlx5_core: Export transport objects IB/mlx5: Expose CQE version to user-space IB/mlx5: Add CQE version 1 support to user QPs and SRQs IB/mlx5: Fix data validation in mlx5_ib_alloc_ucontext IB/sa: Fix netlink local service GFP crash IB/srpt: Remove redundant wc array IB/qib: Improve ipoib UD performance IB/mlx4: Advertise RoCE v2 support IB/mlx4: Create and use another QP1 for RoCEv2 IB/mlx4: Enable send of RoCE QP1 packets with IP/UDP headers ...
2016-01-24IRQCHIP: irq-pic32-evic: Add support for PIC32 interrupt controllerCristian Birsan3-0/+330
This adds support for the interrupt controller present on PIC32 class devices. It handles all internal and external interrupts. This controller exists outside of the CPU core and is the arbitrator of all interrupts (including interrupts from the CPU itself) before they are presented to the CPU. The following features are supported: - DT properties for EVIC and for devices/peripherals that use interrupt lines - Persistent and non-persistent interrupt handling - irqdomain and generic chip support - Configuration of external interrupt edge polarity Signed-off-by: Cristian Birsan <cristian.birsan@microchip.com> Signed-off-by: Joshua Henderson <joshua.henderson@microchip.com> Acked-by: Thomas Gleixner <tglx@linutronix.de> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: linux-kernel@vger.kernel.org Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/12092/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2016-01-24Merge tag 'ntb-4.5' of git://github.com/jonmason/ntbLinus Torvalds12-12/+2177
Pull NTB updates from Jon Mason: "A new driver to support AMD NTB, a NTB performance test driver, NTB bugs fixes, and the ability to recover from running out of DMA descriptors" * tag 'ntb-4.5' of git://github.com/jonmason/ntb: NTB: Fix macro parameter conflict with field name NTB: Add support for AMD PCI-Express Non-Transparent Bridge ntb: ntb perf tool NTB: Address out of DMA descriptor issue with NTB NTB: Clear property bits in BAR value NTB: ntb_process_tx error path bug
2016-01-24mtd: atmel_nand: Use of_device_get_match_dataRomain Izard1-3/+1
Remove the need for forward declaration and the risk for a null pointer when accessing the private part of the compatible match table, by using the newly introduced of_device_get_match_data function. Signed-off-by: Romain Izard <romain.izard.pro@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2016-01-24mtd: atmel_nand: Simplify error messagesRomain Izard1-2/+2
The error messages when the ECC controller is misconfigured through the device tree are very precise. As a result they can (and will) get obsolete when new revisions of the controller appear. Simplify them before adding the support for the new revision. Signed-off-by: Romain Izard <romain.izard.pro@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2016-01-24mtd: nand: gpmi: may use minimum required ecc for 744 oobsize NANDHan Xu1-12/+14
By default NAND driver will choose the highest ecc strength that oob could contain, in this case, for some 8K+744 NAND flash, the ecc strength will be up to 52bit, which beyonds the i.MX6QDL BCH capability (40bit). This patch allows the NAND driver try to use minimum required ecc strength if it failed to use the highest ecc, even without explicitly claiming "fsl,use-minimum-ecc" in dts. Signed-off-by: Han Xu <b45815@freescale.com> Acked-by: Huang Shijie <shijie.huang@arm.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2016-01-24mtd: nand: gpmi: add gpmi dsm supend/resume supportHuang Shijie1-1/+46
i.MX6SX supports deep sleep mode(DSM) that may turn off GPMI/BCH power during suspend, add gpmi nand suspend/resume function to release DMA channel in suspend function and re-init GPMI/BCH controller during resume function. Although it is not necessary to restore GPMI/BCH registers value for i.MX6QDL, the code doesn't distinguish different platforms to keep the code simple. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Han Xu <han.xu@freescale.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2016-01-24mtd: bcm47xxpart: don't fail because of bit-flipsRafał Miłecki1-16/+22
Bit-flip errors may occur on NAND flashes and are harmless. Handle them gracefully as read content is still reliable and can be parsed. Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2016-01-24mtd: bcm47xxpart: limit scanned flash area on BCM47XX (MIPS) onlyRafał Miłecki1-2/+2
We allowed using bcm47xxpart on BCM5301X arch with commit: 9e3afa5f5c7 ("mtd: bcm47xxpart: allow enabling on ARCH_BCM_5301X") BCM5301X devices may contain some partitions in higher memory, e.g. Netgear R8000 has board_data at 0x2600000. To detect them we should use size limit on MIPS only. Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2016-01-24mtd: onenand: unexport onenand_default_bbt()Thomas Petazzoni1-2/+0
The onenand_default_bbt() function is only used by the OneNAND core and not by drivers, so there is no real need to export it. Additionally, the corresponding nand_default_bbt() for regular NANDs is not exported either, so for consistency reasons, this commit removes the EXPORT_SYMBOL on onenand_default_bbt(). Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Reviewed-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2016-01-24mtd: onenand: make onenand_scan_bbt() staticThomas Petazzoni1-2/+1
Like was done in commit 17799359e7b3fa6ef4f2bf926cd6821cf7903ecf ("mtd: nand_bbt: make nand_scan_bbt() static") for the NAND code, this commit makes the onenand_scan_bbt() function static in the OneNAND code, since it is only used in onenand_bbt.c itself. Consequently, the EXPORT_SYMBOL() and declaration in bbm.h are also removed. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Reviewed-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2016-01-24mtd: nand: remove EXPORT_SYMBOL of nand_scan_bbt()Thomas Petazzoni1-2/+0
Since commit 17799359e7b3fa6ef4f2bf926cd6821cf7903ecf ("mtd: nand_bbt: make nand_scan_bbt() static"), the nand_scan_bbt() function is marked as static but is still exported using EXPORT_SYMBOL(), which doesn't make much sense. This commit gets rid of the useless EXPORT_SYMBOL. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Reviewed-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2016-01-23mtd: nand: sunxi: use mtd_div_by_ws() helperBrian Norris1-1/+1
Suggested-by: Richard Weinberger <richard@nod.at> Signed-off-by: Brian Norris <computersforpeace@gmail.com> Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-01-23mtd: atmel_nand: Do not warn on bitflipsRomain Izard1-2/+2
When using multi-bit ECC, it is normal for the NAND Flash driver to correct bit errors during the life of the product. Those errors will only be cleared once a threshold has been reached, and corrections can occur regularly before this. Use only dev_dbg and not dev_info to report the bitflips, to keep the system log clean when everything works correctly. Signed-off-by: Romain Izard <romain.izard.pro@gmail.com> Acked-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2016-01-23Merge branch 'for-linus' of ↵Linus Torvalds23-75/+73
git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs Pull final vfs updates from Al Viro: - The ->i_mutex wrappers (with small prereq in lustre) - a fix for too early freeing of symlink bodies on shmem (they need to be RCU-delayed) (-stable fodder) - followup to dedupe stuff merged this cycle * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs: vfs: abort dedupe loop if fatal signals are pending make sure that freeing shmem fast symlinks is RCU-delayed wrappers for ->i_mutex access lustre: remove unused declaration
2016-01-23Merge branch 'akpm' (patches from Andrew)Linus Torvalds6-48/+15
Merge small final update from Andrew Morton: - DAX feature work: add fsync/msync support - kfree cleanup, MAINTAINERS update * emailed patches from Andrew Morton <akpm@linux-foundation.org>: MAINTAINERS: return arch/sh to maintained state, with new maintainers tree wide: use kvfree() than conditional kfree()/vfree() dax: never rely on bh.b_dev being set by get_block() xfs: call dax_pfn_mkwrite() for DAX fsync/msync ext4: call dax_pfn_mkwrite() for DAX fsync/msync ext2: call dax_pfn_mkwrite() for DAX fsync/msync dax: add support for fsync/sync mm: add find_get_entries_tag() dax: support dirty DAX entries in radix tree pmem: add wb_cache_pmem() to the PMEM API dax: fix conversion of holes to PMDs dax: fix NULL pointer dereference in __dax_dbg()
2016-01-23Merge branches 'thermal-intel', 'thermal-suspend-fix' and 'thermal-soc' into ↵Zhang Rui5-38/+286
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