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2018-07-16mmc: sdhci-pci-dwc-mshc: synopsys dwc mshc supportPrabu Thangamuthu4-1/+90
Synopsys has DWC MSHC controller on HPAS-DX platform connected using PCIe interface with SD card slot and eMMC device slots. This patch is to enable SD cards connected on this platform. As Clock generation logic is implemented using MMCM module of HAPS-DX platform, we have separate functions to control the MMCM to generate required clocks with respect to speed mode. Signed-off-by: Prabu Thangamuthu <prabu.t@synopsys.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-07-16mmc: sdhci-esdhc-imx: Switch to SPDX identifierFabio Estevam1-4/+1
Adopt the SPDX license identifier headers to ease license compliance management. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-07-16mmc: sdhci-of-dwcmshc: add SDHCI OF Synopsys DWC MSHC driverJisheng Zhang3-0/+128
Add a driver for SDHCI OF Synopsys DesignWare Cores Mobile Storage Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Adrian Hunter <adrian.hunter@intel.com>
2018-07-16mmc: sdhci: do not try to use 3.3V signaling if not supportedStefan Agner1-1/+8
For eMMC devices it is valid to only support 1.8V signaling. When vqmmc is set to a fixed 1.8V regulator the stack tries to set 3.3V initially and prints the following warning: mmc1: Switching to 3.3V signalling voltage failed Clear the MMC_SIGNAL_VOLTAGE_330 flag in case 3.3V is signaling is not available. This prevents the stack from even trying to use 3.3V signaling and avoids the above warning. Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-07-16mmc: sdhci-of-esdhc: set proper dma mask for ls104x chipsLaurentiu Tudor1-0/+6
SDHCI controller in ls1043a and ls1046a generate 40-bit wide addresses when doing DMA. Make sure that the corresponding dma mask is correctly configured. Context: when enabling smmu on these chips the following problem is encountered: the smmu input address size is 48 bits so the dma mappings for sdhci end up 48-bit wide. However, on these chips sdhci only use 40-bits of that address size when doing dma. So you end up with a 48-bit address translation in smmu but the device generates transactions with clipped 40-bit addresses, thus smmu context faults are triggered. Setting up the correct dma mask fixes this situation. Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-07-16mmc: sdhci-msm: Remove redundant dev_err call in sdhci_msm_probe()weiyongjun (A)1-1/+0
There is a error message within devm_ioremap_resource already, so remove the dev_err call to avoid redundant error message. Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-07-16mmc: sdhci-xenon: mark expected switch fall-throughGustavo A. R. Silva1-0/+1
In preparation to enabling -Wimplicit-fallthrough, mark switch cases where we are expecting to fall through. Warning level 2 was used: -Wimplicit-fallthrough=2 Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-07-16mmc: pxamci: provide a short-hand for &pdev->devDaniel Mack1-15/+16
Just a cosmetic cleanup with no functional impact. Signed-off-by: Daniel Mack <daniel@zonque.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-07-16mmc: pxamci: make GPIO lookups from pdata optionalDaniel Mack1-45/+47
A recent commit introduced a call to mmc_of_parse() and removed the explicit assignment of GPIOs in the pdata structure. This will leave them set to 0, which is a valid GPIO per se, so the code that looks at these members will try to allocate them and fail. To fix this properly, make the following changes: a) Refrain from allocating and assiging a pdata struct from pxamci_of_init(). It's a hack to do it this way anyway. Instead, move the only remaining member of interest in 'struct pxamci_host' and assign the value from either the passed in pdata pointer or with the value read from DT. b) Let the only user of 'detect_delay_ms' look at the member of 'struct pxamci_host', not the pdata. c) Make more code in pxamci_probe() dependent on the presence of actual pdata. This will also ease the removal of pdata one day. Signed-off-by: Daniel Mack <daniel@zonque.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-07-16mmc: pxamci: let mmc core handle regulatorsDaniel Mack1-32/+22
Strip some code by letting the mmc core handle the regulators. The old .gpio_power pdata handling is kept around for now. This also set the voltage on the regulator and handles -EPROBE_DEFER correctly. Signed-off-by: Daniel Mack <daniel@zonque.org> Acked-by: Robert Jarzmik <robert.jarzmik@free.fr> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-07-16mmc: pxamci: remove pxa-mmc, gpio-power from devicetree bindingsDaniel Mack1-3/+0
Devicetree-enabled boards should use proper regulators to control the power of cards, not GPIOs, so let's remove this property. The regulator properties are supported by the MMC core and are described in the generic MMC document: Documentation/devicetree/bindings/mmc/mmc.txt Note that devicetree support for PXA platforms hasn't fully landed yet, so this binding does not have any users at this point. Signed-off-by: Daniel Mack <daniel@zonque.org> Acked-by: Robert Jarzmik <robert.jarzmik@free.fr> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-07-16mmc: pxamci: call mmc_of_parse()Daniel Mack1-11/+13
Call into mmc_of_parse() from pxamci_of_init(). As it needs a pointer to a struct mmc_host, refactor the code a bit. This allows all generic MMC properties to be set that are described in Documentation/devicetree/bindings/mmc/mmc.txt. Reword the documentation a bit to make that clear. The "cd" and "wp" gpio lookups are removed as the lookup will now be done by mmc_of_parse(). Signed-off-by: Daniel Mack <daniel@zonque.org> Acked-by: Robert Jarzmik <robert.jarzmik@free.fr> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-07-16mmc: pxamci: fix indentingDaniel Mack1-10/+10
pxamci_of_init() had some weird indenting. Signed-off-by: Daniel Mack <daniel@zonque.org> Acked-by: Robert Jarzmik <robert.jarzmik@free.fr> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-07-16mmc: pxamci: remove dead code from pxamci_remove()Daniel Mack1-6/+1
These gpio assignments don't make sense, as they are not used anywhere. Remove the dead code. Signed-off-by: Daniel Mack <daniel@zonque.org> Acked-by: Robert Jarzmik <robert.jarzmik@free.fr> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-07-16mmc: pxamci: remove dma resources from private contextDaniel Mack1-4/+0
These members are no longer in use, so let's remove them. Signed-off-by: Daniel Mack <daniel@zonque.org> Acked-by: Robert Jarzmik <robert.jarzmik@free.fr> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-07-16mmc: pxamci: remove irq from private contextDaniel Mack1-3/+1
This seems to be a left-over from times before the IRQ was handled by devm functions. Remove it. Signed-off-by: Daniel Mack <daniel@zonque.org> Acked-by: Robert Jarzmik <robert.jarzmik@free.fr> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-07-16mmc: sdhci-esdhc-imx: get rid of support_vselStefan Agner1-6/+2
The field support_vsel is currently only used in the device tree case. Get rid of it. No change in behavior. Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-07-16mmc: sdhci-esdhc-imx: support eMMC DDR mode when running at 3.3VStefan Agner1-1/+1
The uSDHC supports DDR modes for eMMC devices running at 3.3V. This allows to run eMMC with 3.3V signaling voltage at DDR52 mode: # cat /sys/kernel/debug/mmc1/ios clock: 52000000 Hz vdd: 21 (3.3 ~ 3.4 V) bus mode: 2 (push-pull) chip select: 0 (don't care) power mode: 2 (on) bus width: 3 (8 bits) timing spec: 8 (mmc DDR52) signal voltage: 0 (3.30 V) driver type: 0 (driver type B) Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-07-16mmc: core: Drop the unused mmc_power_save|restore_host()Ulf Hansson3-49/+0
The last user of mmc_power_save|restore_host() APIs is gone, hence let's drop them. Drop also the corresponding bus_ops callback, ->power_save|restore() as those becomes redundant. Cc: Tony Lindgren <tony@atomide.com> Cc: Eyal Reizer <eyalreizer@gmail.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-07-16mmc: sdhci-of-esdhc: modify the sd clock in of_match_node wayyinbo.zhu1-28/+57
Convert to use of_match_node method to fix up eSDHC clock for ls1046a/ls1012a/p1010. Also add eSDHC clock fixup for ls1021a according to its datasheet. The maxmum speed for ls1021a eSDHC high speed mode is 46.5MHz. Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-07-16mmc: sdhci-of-arasan: Add quirk for unstable clocksHelmut Grohne1-0/+16
Some controllers immediately report SDHCI_CLOCK_INT_STABLE after enabling the clock even when the clock is not stable. When used in conjunction with older/slower cards, this can result in: mmc0: error -84 whilst initialising SD card When the stable reporting is known to be broken, we simply wait for the maximum stabilization period. Signed-off-by: Helmut Grohne <h.grohne@intenta.de> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-07-16mmc: sdhci-pci: Add support for Intel ICPAdrian Hunter2-0/+4
Add PCI Ids for Intel ICP. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-07-16mmc: host: Register changes for sdcc V5Sayali Lokhande1-126/+221
Add support to use the new compatible string "qcom,sdhci-msm-v5". Based on the msm variant, pick the relevant variant data and use it for register read/write to msm specific registers. Signed-off-by: Sayali Lokhande <sayalil@codeaurora.org> Signed-off-by: Vijay Viswanath <vviswana@codeaurora.org> Reviewed-by: Evan Green <evgreen@chromium.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-07-16mmc: sdhci-msm: Add msm version specific ops and data structuresVijay Viswanath1-0/+75
In addition to offsets of certain registers changing, the registers in core_mem have been shifted to HC mem as well. To access these registers, define msm version specific functions. These functions can be loaded into the function pointers at the time of probe based on the msm version detected. Also defind new data structure to hold version specific Ops and register addresses. Signed-off-by: Sayali Lokhande <sayalil@codeaurora.org> Signed-off-by: Vijay Viswanath <vviswana@codeaurora.org> Reviewed-by: Evan Green <evgreen@chromium.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-07-16mmc: sdhci-msm: Define new Register address mapSayali Lokhande1-0/+89
For SDCC version 5.0.0, MCI registers are removed from SDCC interface and some registers are moved to HC. Define a new data structure where we can statically define the address offsets for the registers in different SDCC versions. Signed-off-by: Sayali Lokhande <sayalil@codeaurora.org> Signed-off-by: Vijay Viswanath <vviswana@codeaurora.org> Reviewed-by: Evan Green <evgreen@chromium.org> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-07-16mmc: renesas_sdhi: add eMMC HS400 mode supportMasaharu Hayakawa3-26/+138
This patch adds processing for selecting HS400 mode. Signed-off-by: Masaharu Hayakawa <masaharu.hayakawa.ry@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-07-16mmc: tmio: add eMMC HS400 mode supportMasaharu Hayakawa2-2/+51
This patch adds processing for selecting HS400 mode. Signed-off-by: Masaharu Hayakawa <masaharu.hayakawa.ry@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-07-16mmc: core: more fine-grained hooks for HS400 tuningSimon Horman1-0/+10
This adds two new HS400 tuning operations: * hs400_downgrade * hs400_complete These supplement the existing HS400 operation: * prepare_hs400_tuning This is motivated by a requirement of Renesas SDHI for the following: 1. Disabling SCC before selecting to HS if selection of HS400 has occurred. This can be done in an implementation of prepare_hs400_tuning_downgrade 2. Updating registers after switching to HS400 This can be done in an implementation of complete_hs400_tuning If hs400_downgrade or hs400_complete are not implemented then they are not called. Thus means there should be no affect for existing drivers as none implemt these ops. Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-07-16mmc: dw_mmc-exynos: fix potential external abort in resume_noirq()Marek Szyprowski1-9/+24
dw_mci_exynos_resume_noirq() performs DWMMC register access without ensuring that respective clocks are enabled. This might cause external abort on some systems (observed on Exynos5433 based boards). Fix this by forcing a PM runtime active state before register access. Using SET_NOIRQ_SYSTEM_SLEEP_PM_OPS allows also to cleanup conditional code a bit. Suggested-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-07-16mmc: tegra: Use sdhci_pltfm_clk_get_max_clockAapo Vienamo1-13/+2
The sdhci get_max_clock callback is set to sdhci_pltfm_clk_get_max_clock and tegra_sdhci_get_max_clock is removed. It appears that the shdci-tegra specific callback was originally introduced due to the requirement that the host clock has to be twice the bus clock on DDR50 mode. As far as I can tell the only effect the removal has on DDR50 mode is in cases where the parent clock is unable to supply the requested clock rate, causing the DDR50 mode to run at a lower frequency. Currently the DDR50 mode isn't enabled on any of the SoCs and would also require configuring the SDHCI clock divider register to function properly. The problem with tegra_sdhci_get_max_clock is that it divides the clock rate by two and thus artificially limits the maximum frequency of faster signaling modes which don't have the host-bus frequency ratio requirement of DDR50 such as SDR104 and HS200. Furthermore, the call to clk_round_rate() may return an error which isn't handled by tegra_sdhci_get_max_clock. Signed-off-by: Aapo Vienamo <avienamo@nvidia.com> Acked-by: Thierry Reding <treding@nvidia.com> Tested-by: Thierry Reding <treding@nvidia.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-07-16mmc: core: Adjust and reuse the macro of R1_STATUS(x)Shawn Lin2-2/+2
R1_STATUS(x) now is only used by ioctl_rpmb_card_status_poll(), which checks all bits as possible. But according to the spec, bit 17 and bit 18 should be ignored, as well bit 14 which is reserved(must be set to 0) quoting from the spec and these rule apply to all places checking the device status. So change its checking from 0xFFFFE000 to 0xFFF9A000. As a bonus, we reuse it for mmc_do_erase() as well as mmc_switch_status_error(). (1) Currently mmc_switch_status_error() doesn't check bit 25, but it means device is locked but not unlocked by CMD42 prior to any operations which need check busy, which is also not allowed. (2) mmc_do_erase() also forgot to to check bit 15, WP_ERASE_SKIP. The spec says "Only partial address space was erased due to existing write protected blocks.", which obviously means we should fail this I/O. Otherwise, the partial erased data stored in nonvalatile flash violates the data integrity from the view of I/O owner, which probably confuse it when further used. So reusing R1_STATUS for them not only improve the readability but also slove real problems. Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-07-16Merge branch 'next_pxa_dma' into nextUlf Hansson5-71/+22
2018-07-15Merge tag 'rtc-4.18-2' of ↵Linus Torvalds2-6/+6
git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux Pull RTC fixes from Alexandre Belloni: "Two fixes for 4.18: - an important core fix for RTCs using the core offsetting only one driver is affected - a fix for the error path of mrst" * tag 'rtc-4.18-2' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux: rtc: fix alarm read and set offset rtc: mrst: fix error code in probe()
2018-07-14Merge branch 'i2c/for-current' of ↵Linus Torvalds3-11/+19
git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux Pull i2c fixes from Wolfram Sang: - I2C core bugfix regarding bus recovery - driver bugfix for the tegra driver - typo correction * 'i2c/for-current' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux: i2c: recovery: if possible send STOP with recovery pulses i2c: tegra: Fix NACK error handling i2c: stu300: use non-archaic spelling of failes
2018-07-13Merge branch 'timers-urgent-for-linus' of ↵Linus Torvalds1-1/+1
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull timer fixes from Ingo Molnar: "A clocksource driver fix and a revert" * 'timers-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: clocksource: arm_arch_timer: Set arch_mem_timer cpumask to cpu_possible_mask Revert "tick: Prefer a lower rating device only if it's CPU local device"
2018-07-13Merge tag 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/rdma/rdmaLinus Torvalds8-27/+39
Pull rdma fixes from Jason Gunthorpe: "Things have been quite slow, only 6 RC patches have been sent to the list. Regression, user visible bugs, and crashing fixes: - cxgb4 could wrongly fail MR creation due to a typo - various crashes if the wrong QP type is mixed in with APIs that expect other types - syzkaller oops - using ERR_PTR and NULL together cases HFI1 to crash in some cases - mlx5 memory leak in error unwind" * tag 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/rdma/rdma: RDMA/mlx5: Fix memory leak in mlx5_ib_create_srq() error path RDMA/uverbs: Don't fail in creation of multiple flows IB/hfi1: Fix incorrect mixing of ERR_PTR and NULL return values RDMA/uverbs: Fix slab-out-of-bounds in ib_uverbs_ex_create_flow RDMA/uverbs: Protect from attempts to create flows on unsupported QP iw_cxgb4: correctly enforce the max reg_mr depth
2018-07-13Merge tag 'libnvdimm-fixes-4.18-rc5' of ↵Linus Torvalds4-15/+47
git://git.kernel.org/pub/scm/linux/kernel/git/nvdimm/nvdimm Pull libnvdimm fixes from Dave Jiang: - ensure that a variable passed in by reference to acpi_nfit_ctl is always set to a value. An incremental patch is provided due to notice from testing in -next. The rest of the commits did not exhibit issues. - fix a return path in nsio_rw_bytes() that was not returning "bytes remain" as expected for the function. - address an issue where applications polling on scrub-completion for the NVDIMM may falsely wakeup and read the wrong state value and cause hang. - change the test unit persistent capability attribute to fix up a broken assumption in the unit test infrastructure wrt the 'write_cache' attribute - ratelimit dev_info() in the dax device check_vma() function since this is easily triggered from userspace * tag 'libnvdimm-fixes-4.18-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/nvdimm/nvdimm: nfit: fix unchecked dereference in acpi_nfit_ctl acpi, nfit: Fix scrub idle detection tools/testing/nvdimm: advertise a write cache for nfit_test acpi/nfit: fix cmd_rc for acpi_nfit_ctl to always return a value dev-dax: check_vma: ratelimit dev_info-s libnvdimm, pmem: Fix memcpy_mcsafe() return code handling in nsio_rw_bytes()
2018-07-13rtc: fix alarm read and set offsetAlexandre Belloni1-3/+5
The offset needs to be added after reading the alarm value. It also needs to be subtracted after the now < alarm test. Tested-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2018-07-13i2c: recovery: if possible send STOP with recovery pulsesWolfram Sang1-1/+10
I2C clients may misunderstand recovery pulses if they can't read SDA to bail out early. In the worst case, as a write operation. To avoid that and if we can write SDA, try to send STOP to avoid the misinterpretation. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Peter Rosin <peda@axentia.se> Signed-off-by: Wolfram Sang <wsa@the-dreams.de> Cc: stable@kernel.org
2018-07-12Merge tag 'mtd/fixes-for-4.18-rc5' of git://git.infradead.org/linux-mtdLinus Torvalds1-2/+4
Pull MTD fix from Boris Brezillon: "A SPI NOR fix to fix a timeout in the cadence QSPI controller driver" * tag 'mtd/fixes-for-4.18-rc5' of git://git.infradead.org/linux-mtd: mtd: spi-nor: cadence-quadspi: Fix direct mode write timeouts
2018-07-11RDMA/mlx5: Fix memory leak in mlx5_ib_create_srq() error pathKamal Heib1-6/+12
Fix memory leak in the error path of mlx5_ib_create_srq() by making sure to free the allocated srq. Fixes: c2b37f76485f ("IB/mlx5: Fix integer overflows in mlx5_ib_create_srq") Signed-off-by: Kamal Heib <kamalheib1@gmail.com> Acked-by: Leon Romanovsky <leonro@mellanox.com> Signed-off-by: Jason Gunthorpe <jgg@mellanox.com>
2018-07-11Merge branch 'for-4.18-fixes' of ↵Linus Torvalds9-47/+98
git://git.kernel.org/pub/scm/linux/kernel/git/tj/libata Pull libata fixes from Tejun Heo: - Jens's patches to expand the usable command depth from 31 to 32 broke sata_fsl due to a subtle command iteration bug. Fixed by introducing explicit iteration helpers and using the correct variant. - On some laptops, enabling LPM by default reportedly led to occasional hard hangs. Blacklist the affected cases. - Other misc fixes / changes. * 'for-4.18-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/tj/libata: ata: Remove depends on HAS_DMA in case of platform dependency ata: Fix ZBC_OUT all bit handling ata: Fix ZBC_OUT command block check ahci: Add Intel Ice Lake LP PCI ID ahci: Disable LPM on Lenovo 50 series laptops with a too old BIOS sata_nv: remove redundant pointers sdev0 and sdev1 sata_fsl: remove dead code in tag retrieval sata_fsl: convert to command iterator libata: convert eh to command iterators libata: add command iterator helpers ata: ahci_mvebu: ahci_mvebu_stop_engine() can be static libahci: Fix possible Spectre-v1 pmp indexing in ahci_led_store()
2018-07-11nfit: fix unchecked dereference in acpi_nfit_ctlDave Jiang1-2/+4
Incremental patch to fix the unchecked dereference in acpi_nfit_ctl. Reported by Dan Carpenter: "acpi/nfit: fix cmd_rc for acpi_nfit_ctl to always return a value" from Jun 28, 2018, leads to the following Smatch complaint: drivers/acpi/nfit/core.c:578 acpi_nfit_ctl() warn: variable dereferenced before check 'cmd_rc' (see line 411) drivers/acpi/nfit/core.c 410 411 *cmd_rc = -EINVAL; ^^^^^^^^^^^^^^^^^^ Patch adds unchecked dereference. Fixes: c1985cefd844 ("acpi/nfit: fix cmd_rc for acpi_nfit_ctl to always return a value") Signed-off-by: Dave Jiang <dave.jiang@intel.com>
2018-07-11Merge tag 'char-misc-4.18-rc5' of ↵Linus Torvalds7-65/+124
git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc Pull char/misc fixes from Greg KH: "Here are a few char/misc driver fixes for 4.18-rc5. The "largest" stuff here is fixes for the UIO changes in 4.18-rc1 that caused breakages for some people. Thanks to Xiubo Li for fixing them quickly. Other than that, minor fixes for thunderbolt, vmw_balloon, nvmem, mei, ibmasm, and mei drivers. There's also a MAINTAINERS update where Rafael is offering to help out with reviewing driver core patches. All of these have been in linux-next with no reported issues" * tag 'char-misc-4.18-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: nvmem: Don't let a NULL cell_id for nvmem_cell_get() crash us thunderbolt: Notify userspace when boot_acl is changed uio: fix crash after the device is unregistered uio: change to use the mutex lock instead of the spin lock uio: use request_threaded_irq instead fpga: altera-cvp: Fix an error handling path in 'altera_cvp_probe()' ibmasm: don't write out of bounds in read handler MAINTAINERS: Add myself as driver core changes reviewer mei: discard messages from not connected client during power down. vmw_balloon: fix inflation with batching
2018-07-11Merge tag 'staging-4.18-rc5' of ↵Linus Torvalds3-2/+3
git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging Pull staging fixes from Greg KH: "Here are two tiny staging driver fixes for reported issues for 4.18-rc5. One fixes the r8822be driver to properly work on lots of new laptops, the other is for the rtl8723bs driver to fix an underflow error. Both have been in linux-next for a while with no reported issues" * tag 'staging-4.18-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging: staging: r8822be: Fix RTL8822be can't find any wireless AP staging: rtl8723bs: Prevent an underflow in rtw_check_beacon_data().
2018-07-11Merge tag 'usb-4.18-rc5' of ↵Linus Torvalds11-27/+33
git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb Pull USB fixes from Greg KH: "Here are a number of small USB fixes for 4.18-rc5. Nothing major here, just the normal set of new device ids, xhci fixes, and some typec fixes. The typec fix required some tiny changes in an i2c driver, which that maintainer acked to come through my tree. All of these have been in linux-next for a while with no reported issues" * tag 'usb-4.18-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb: USB: yurex: fix out-of-bounds uaccess in read handler usb: quirks: add delay quirks for Corsair Strafe xhci: xhci-mem: off by one in xhci_stream_id_to_ring() usb/gadget: aspeed-vhub: add USB_LIBCOMPOSITE dependency docs: kernel-parameters.txt: document xhci-hcd.quirks parameter USB: serial: mos7840: fix status-register error handling USB: serial: keyspan_pda: fix modem-status error handling USB: serial: cp210x: add another USB ID for Qivicon ZigBee stick USB: serial: ch341: fix type promotion bug in ch341_control_in() i2c-cht-wc: Fix bq24190 supplier typec: tcpm: Correctly report power_supply current and voltage for non pd supply usb: xhci: dbc: Don't decrement runtime PM counter if DBC is not started
2018-07-11Merge tag 'mmc-v4.18-rc3' of ↵Linus Torvalds5-24/+28
git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc Pull MMC fixes from Ulf Hansson: "MMC core: - Fixup devname in /proc/interrupts for card detect GPIO MMC host: - sdhci-esdhc-imx: Allow 1.8V speed-modes without 100/200MHz pinctrls - sunxi: Disable IRQ in low power state to prevent IRQ storm - dw_mmc: Fix card threshold control configuration - renesas_sdhi_internal_dmac: Fixup DMA error paths" * tag 'mmc-v4.18-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc: mmc: sdhci-esdhc-imx: allow 1.8V modes without 100/200MHz pinctrl states mmc: sunxi: Disable irq during pm_suspend mmc: dw_mmc: fix card threshold control configuration mmc: core: cd_label must be last entry of mmc_gpio struct mmc: renesas_sdhi_internal_dmac: Cannot clear the RX_IN_USE in abort mmc: renesas_sdhi_internal_dmac: Fix missing unmap in error patch
2018-07-11Merge tag 'acpi-4.18-rc5' of ↵Linus Torvalds1-4/+11
git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm Pull ACPI fix from Rafael Wysocki: "Address a regression in ACPICA that ceased to clear the status of GPEs and fixed events before entering the ACPI S5 (off) system state during the 4.17 cycle which caused some systems to power up immediately after they had been turned off" * tag 'acpi-4.18-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm: ACPICA: Clear status of all events when entering S5
2018-07-10clocksource: arm_arch_timer: Set arch_mem_timer cpumask to cpu_possible_maskSudeep Holla1-1/+1
Currently, arch_mem_timer cpumask is set to cpu_all_mask which should be fine. However, cpu_possible_mask is more accurate and if there are other clockevent source in the system which are set to cpu_possible_mask, then having cpu_all_mask may result in issue. E.g. on a platform with arm,sp804 timer with rating 300 and cpu_possible_mask and this arch_mem_timer timer with rating 400 and cpu_all_mask, tick_check_preferred may choose both preferred as the cpumasks are not equal though they must be. This issue was root caused incorrectly initially and a fix was merged as commit 1332a9055801 ("tick: Prefer a lower rating device only if it's CPU local device"). Signed-off-by: Sudeep Holla <sudeep.holla@arm.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Tested-by: Kevin Hilman <khilman@baylibre.com> Tested-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Cc: linux-arm-kernel@lists.infradead.org Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Link: https://lkml.kernel.org/r/1531151136-18297-2-git-send-email-sudeep.holla@arm.com
2018-07-10Merge tag 'drm-fixes-2018-07-10' of git://anongit.freedesktop.org/drm/drmLinus Torvalds3-4/+47
Pull drm fixes from Dave Airlie: "This just contains some etnaviv fixes and a MAINTAINERS update for the new drm tree locations" * tag 'drm-fixes-2018-07-10' of git://anongit.freedesktop.org/drm/drm: MAINTAINERS: update drm tree drm/etnaviv: bring back progress check in job timeout handler drm/etnaviv: Fix driver unregistering drm/etnaviv: Check for platform_device_register_simple() failure