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2014-12-03drm/radeon: Move hotspot handling out of radeon_set_cursorMichel Dänzer1-19/+17
It's only needed in radeon_crtc_cursor_set2. Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-12-03drm/radeon: Re-show the cursor after a modesetMichel Dänzer4-24/+68
Setting a mode seems to clear the cursor registers, so we need to re-program them to make sure the cursor is visible. Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-12-03drm/vmwgfx: (Re)bind shaders to MOBs with the correct offsetThomas Hellstrom1-1/+1
This codepath is mostly hit when rebinding after a backup buffer swapout. It's amazing that this error hasn't been more obvious but probably the shaders are not reread from guest memory that often.. Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com> Reviewed-by: Jakob Bornecrantz <jakob@vmware.com> Reviewed-by: Sinclair Yeh <syeh@vmware.com>
2014-12-03drm/vmwgfx: Fix fence event codeThomas Hellstrom1-11/+6
The commit "vmwgfx: Rework fence event action" introduced a number of bugs that are fixed with this commit: a) A forgotten return stateemnt. b) An if statement with identical branches. Cc: <stable@vger.kernel.org> Reported-by: Rob Clark <robdclark@gmail.com> Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com> Reviewed-by: Jakob Bornecrantz <jakob@vmware.com> Reviewed-by: Sinclair Yeh <syeh@vmware.com>
2014-12-03drm/vmwgfx: Don't use memory accounting for kernel-side fence objectsThomas Hellstrom1-20/+2
Kernel side fence objects are used when unbinding resources and may thus be created as part of a memory reclaim operation. This might trigger recursive memory reclaims and result in the kernel running out of stack space. So a simple way out is to avoid accounting of these fence objects. In principle this is OK since while user-space can trigger the creation of such objects, it can't really hold on to them. However, their lifetime is quite long, so some form of accounting should perhaps be implemented in the future. Fixes kernel crashes when running, for example viewperf11 ensight-04 test 3 with low system memory settings. Cc: <stable@vger.kernel.org> Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com> Reviewed-by: Jakob Bornecrantz <jakob@vmware.com> Reviewed-by: Sinclair Yeh <syeh@vmware.com>
2014-12-03drm/vmwgfx: Fix error printout on signals pendingThomas Hellstrom1-2/+6
The function vmw_master_check() might return -ERESTARTSYS if there is a signal pending, indicating that the IOCTL should be rerun, potentially from user-space. At that point we shouldn't print out an error message since that is not an error condition. In short, avoid bloating the kernel log when a process refuses to die on SIGTERM. Cc: <stable@vger.kernel.org> Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com> Reviewed-by: Jakob Bornecrantz <jakob@vmware.com>
2014-12-03drm: rcar-du: Fix NULL encoder pointer dereferenceLaurent Pinchart1-3/+6
The DRM connector's encoder pointer is managed internally by the DRM core and set to NULL when the DRM connector is disconnected from the CRTC it was attached to. This results in a NULL pointer dereference in the HDMI connector functions when trying to call the associated slave encoder's operations. Fix this by retrieving the slave encoder pointer from the R-Car connector structure instead of the DRM connector structure. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-12-03Merge tag 'drm-intel-next-2014-11-21-fixed' of ↵Dave Airlie38-2477/+2992
git://anongit.freedesktop.org/drm-intel into drm-next drm-intel-next-2014-11-21: - infoframe tracking (for fastboot) from Jesse - start of the dri1/ums support removal - vlv forcewake timeout fixes (Imre) - bunch of patches to polish the rps code (Imre) and improve it on bdw (Tom O'Rourke) - on-demand pinning for execlist contexts - vlv/chv backlight improvements (Ville) - gen8+ render ctx w/a work from various people - skl edp programming (Satheeshakrishna et al.) - psr docbook (Rodrigo) - piles of little fixes and improvements all over, as usual * tag 'drm-intel-next-2014-11-21-fixed' of git://anongit.freedesktop.org/drm-intel: (117 commits) drm/i915: Don't pin LRC in GGTT when dumping in debugfs drm/i915: Update DRIVER_DATE to 20141121 drm/i915/g4x: fix g4x infoframe readout drm/i915: Only call mod_timer() if not already pending drm/i915: Don't rely upon encoder->type for infoframe hw state readout drm/i915: remove the IRQs enabled WARN from intel_disable_gt_powersave drm/i915: Use ggtt error obj capture helper for gen8 semaphores drm/i915: vlv: increase timeout when setting idle GPU freq drm/i915: vlv: fix cdclk setting during modeset while suspended drm/i915: Dump hdmi pipe_config state drm/i915: Gen9 shadowed registers drm/i915/skl: Gen9 multi-engine forcewake drm/i915: Read power well status before other registers for drpc info drm/i915: Pin tiled objects for L-shaped configs drm/i915: Update ring freq for full gpu freq range drm/i915: change initial rps frequency for gen8 drm/i915: Keep min freq above floor on HSW/BDW drm/i915: Use efficient frequency for HSW/BDW drm/i915: Can i915_gem_init_ioctl drm/i915: Sanitize ->lastclose ...
2014-12-02drm/i915: Don't pin LRC in GGTT when dumping in debugfsThomas Daniel1-31/+47
LRC object does not need to be mapped into the GGTT when dumping. A side-effect of this patch is that a compiler warning goes away (not checking return value of i915_gem_obj_ggtt_pin). v2: Broke out individual context dumping into a new function as the indentation was getting a bit crazy. Added notification of contexts with no gem object for debugging purposes. Removed unnecessary pin_pages and unpin_pages, replaced with explicit get_pages for the context object as there may be no backing store allocated at this time (Comment for get_pages says "Ensure that the associated pages are gathered from the backing storage and pinned into our object"). Improved error checking - get_pages and get_page are checked for failure. Signed-off-by: Thomas Daniel <thomas.daniel@intel.com> [danvet: Align paramter continuation lines properly. Also add some braces to the nested loops again for readability.] Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-12-02Merge branch 'linux-3.19' of ↵Dave Airlie126-2636/+6261
git://anongit.freedesktop.org/git/nouveau/linux-2.6 into drm-next - Tegra K1 voltage support, and coherency improvements - GM204 support (modesetting, still waiting on NVIDIA for signed fw to proceed further), and a lot of bios/i2c/devinit adjustments needed to support it - GT21x memory reclocking work - Various other bits and pieces, most of which are prep-work for a couple of bigger projects I didn't get finished in time * 'linux-3.19' of git://anongit.freedesktop.org/git/nouveau/linux-2.6: (73 commits) drm/nv50/kms: drop requirement that framebuffer bos be contig up-front drm/nv50/kms: directly use cursor image from userspace buffer drm/nouveau/kms: when pinning display-related buffers, force contig vram drm/nouveau: teach nouveau_bo_pin() how to force a contig vram allocation drm/nouveau/volt: add support for GK20A drm/nouveau/platform: add GPU speedo information to nouveau platform drm/nouveau/volt: allow non-bios voltage scaling drm/gf100-/gr: return non-fatal error code when fw not present drm/nouveau/devinit: bump priv ring timeouts before executing scripts drm/nouveau/bios: translate ramcfg strap through M0203 drm/nouveau/fb: make use of M0203 routines for ram type determination drm/nouveau/bios: add parsing of BIT M(v2) +0x03 table drm/nouveau/core: allow vbios parsing without knowing chipset type drm/nouveau/lib: add null backend drm/nouveau/device: store revision drm/nouveau/core: add some forgotten subdevs to disable mask drm/gk20a/clk: fix max VCO value drm/nouveau: we need pin_refcnt for nouveau_bo_placement_set() drm/nv50-/kms: add some evo tracing ability for debugging drm/nv50/kms: use sclass() instead of trial-and-error ...
2014-12-02drm/nv50/kms: drop requirement that framebuffer bos be contig up-frontBen Skeggs1-5/+0
We'll move them at pin() time if necessary. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-12-02drm/nv50/kms: directly use cursor image from userspace bufferBen Skeggs2-49/+32
Preparation for transition to planes, which use framebuffers for the cursor image. We've always done copies from the userspace buffer up until now for legacy reasons, there's no good reason to do so on the chipsets this code covers. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-12-02drm/nouveau/kms: when pinning display-related buffers, force contig vramBen Skeggs2-7/+7
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-12-02drm/nouveau: teach nouveau_bo_pin() how to force a contig vram allocationBen Skeggs13-27/+52
We have the ability to move buffers around in the kernel if necessary, and should probably use it rather than failing if userspace passes us a non-contig buffer for a plane. The NOUVEAU_GEM_TILE_NONCONTIG flag from userspace will become a mere initial placement hint once all the relevant paths have been updated. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-12-02drm/nouveau/volt: add support for GK20AVince Hsu6-0/+218
The voltage value are calculated by the hardware characterized result. Signed-off-by: Vince Hsu <vinceh@nvidia.com> Reviewed-by: Alexandre Courbot <acourbot@nvidia.com> Acked-by: Martin Peres <martin.peres@free.fr> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-12-02drm/nouveau/platform: add GPU speedo information to nouveau platformVince Hsu2-0/+4
For GK20A we need the GPU speedo value to calculate voltage levels. Signed-off-by: Vince Hsu <vinceh@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-12-02drm/nouveau/volt: allow non-bios voltage scalingVince Hsu1-29/+38
Move the vbios parsing out of init() and call it conditionally if the platform has a vbios. Non-vbios platforms can use the ctor() to init the data structures. Signed-off-by: Vince Hsu <vinceh@nvidia.com> Acked-by: Alexandre Courbot <acourbot@nvidia.com> Acked-by: Martin Peres <martin.peres@free.fr> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-12-02drm/gf100-/gr: return non-fatal error code when fw not presentBen Skeggs1-1/+1
This allows the module to load without acceleration. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-12-02drm/nouveau/devinit: bump priv ring timeouts before executing scriptsBen Skeggs2-1/+10
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-12-02drm/nouveau/bios: translate ramcfg strap through M0203Ben Skeggs1-1/+12
A machine has been spotted where the ramcfg strap is "8", and the ramcfg xlat table goes 0-7,0-7, resulting in us selecting config 0 for memory items. On this particular system, config "8" is available and supposed to be used. It appears that starting from GT21x (where Mv2 appears), we're supposed to use the value in this table instead. One concern here is that not all the places we currently use ramcfg xlat are supposed to be treated the same now. The strap xlat table wasn't removed from the vbios either, presumably for some kind of good reason. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-12-02drm/nouveau/fb: make use of M0203 routines for ram type determinationBen Skeggs1-22/+15
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-12-02drm/nouveau/bios: add parsing of BIT M(v2) +0x03 tableBen Skeggs3-0/+161
We only support one kind of matching here (ramcfg strap), but it appears alternate methods are possible. I wrote a tool to scan our vbios repo for other types, but did not see any used. Hopefully this means there aren't any in the wild that will now break. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-12-02drm/nouveau/core: allow vbios parsing without knowing chipset typeBen Skeggs1-0/+5
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-12-02drm/nouveau/lib: add null backendBen Skeggs2-0/+2
For the moment, just used to speed up vbios-only testing. Have some ideas for extending in the future. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-12-02drm/nouveau/device: store revisionBen Skeggs2-1/+4
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-12-02drm/nouveau/core: add some forgotten subdevs to disable maskBen Skeggs2-0/+3
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-12-02drm/gk20a/clk: fix max VCO valueAlexandre Courbot1-1/+1
For some reason max_vco was set to a lower value that it can support, which prevented some clock states to be applied. Fix this by setting it to the same value as downstream. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-12-02drm/nouveau: we need pin_refcnt for nouveau_bo_placement_set()Ben Skeggs1-5/+9
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-12-02drm/nv50-/kms: add some evo tracing ability for debuggingBen Skeggs1-0/+13
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-12-02drm/nv50/kms: use sclass() instead of trial-and-errorBen Skeggs1-6/+20
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-12-02drm/nv50/kms: remove a couple of cursor-related stub functionsBen Skeggs2-12/+2
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-12-02drm/nouveau: fix pin refcnt leak in failure pathBen Skeggs1-12/+12
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-12-02drm/nouveau: synchronize BOs when requiredAlexandre Courbot3-0/+56
On architectures for which access to GPU memory is non-coherent, caches need to be flushed and invalidated explicitly when BO control changes between CPU and GPU. This patch adds buffer synchronization functions which invokes the correct API (PCI or DMA) to ensure synchronization is effective. Based on the TTM DMA cache helper patches by Lucas Stach. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-12-02drm/nouveau: allocate GPFIFOs and fences coherentlyAlexandre Courbot2-3/+3
Specify TTM_PL_FLAG_UNCACHED when allocating GPFIFOs and fences to allow them to be safely accessed by the kernel without being synced on non-coherent architectures. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-12-02drm/nouveau: implement explicitly coherent BOsAlexandre Courbot2-8/+73
Allow nouveau_bo_new() to recognize the TTM_PL_FLAG_UNCACHED flag, which means that we want the allocated BO to be perfectly coherent between the CPU and GPU. This is useful on non-coherent architectures for which we do not want to manually sync some rarely-accessed buffers: typically, fences and pushbuffers. A TTM BO allocated with the TTM_PL_FLAG_UNCACHED on a non-coherent architecture will be populated using the DMA API, and accesses to it performed using the coherent mapping performed by dma_alloc_coherent(). Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-12-02drm/nouveau: introduce nv_device_is_cpu_coherent()Alexandre Courbot1-0/+6
Add a function allowing us to know whether a device is CPU-coherent, i.e. accesses performed by the CPU on GPU-mapped buffers will be immediately visible on the GPU side and vice-versa. For now, a device is considered to be coherent if it uses the PCI bus on a non-ARM architecture. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-12-02drm/nouveau: warn when moving a pinned objectAlexandre Courbot1-2/+9
Pinned BOs are supposed to remain in their current location until unpinned. Display a warning for the supposedly-erroneous case where we are trying to move such objects. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-12-02drm/nouveau/disp: clear notify intr status when enabling, to prevent racesBen Skeggs2-0/+4
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-12-02drm/nv50-/disp: rename class members to match nvidia channel namesBen Skeggs11-206/+206
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-12-02drm/nouveau/core: remove some dead code that got forgottenBen Skeggs3-135/+0
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-12-02drm/nouveau/pwr/fuc: Fix thinko in nouveau_memx_wait()Roy Spliet1-1/+1
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-12-02drm/nva3/clock: Allow user reclockingRoy Spliet1-1/+1
Signed-off-by: Roy Spliet <rspliet@eclipso.eu> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-12-02drm/nouveau/fb/ramnva3: Reclocking script for GDDR3Roy Spliet2-10/+92
Signed-off-by: Roy Spliet <rspliet@eclipso.eu> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-12-02drm/nouveau/fb/ramnva3: Reclocking script for DDR2Roy Spliet1-15/+42
Signed-off-by: Roy Spliet <rspliet@eclipso.eu> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-12-02drm/nouveau/fb/ramnva3: Reclocking script for DDR3Roy Spliet3-75/+219
Signed-off-by: Roy Spliet <rspliet@eclipso.eu> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-12-02drm/nouveau/fb/ramnva3: Ressurect timing calculation codeRoy Spliet3-14/+132
Signed-off-by: Roy Spliet <rspliet@eclipso.eu> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-12-02drm/nouveau/fb/ramnva3: Link training for DDR3Roy Spliet10-1415/+2259
V2: fix whitespace errors in memx.fuc Signed-off-by: Roy Spliet <rspliet@eclipso.eu> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-12-02drm/nouveau/fb/gddr3: Generate MR valuesRoy Spliet3-0/+119
Signed-off-by: Roy Spliet <rspliet@eclipso.eu> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-12-02drm/nouveau/bios/ramcfg: 10_02_40 -> DLLoffRoy Spliet4-4/+4
Signed-off-by: Roy Spliet <rspliet@eclipso.eu> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-12-02drm/nouveau: move the (far too many...) different s/r paths to the same placeBen Skeggs2-138/+144
No code changes. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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