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2016-03-15Merge branches 'pci/host-altera', 'pci/host-imx6', 'pci/host-keystone', ↵Bjorn Helgaas15-376/+2048
'pci/host-rcar', 'pci/host-tegra', 'pci/host-thunder', 'pci/host-vmd', 'pci/host-xilinx' and 'pci/host-xilinx-nwl' into next * pci/host-altera: PCI: altera: Fix altera_pcie_link_is_up() * pci/host-imx6: PCI: imx6: Add DT bindings to configure PHY Tx driver settings * pci/host-keystone: PCI: keystone: Defer probing if devm_phy_get() returns -EPROBE_DEFER * pci/host-rcar: PCI: rcar: Depend on ARCH_RENESAS, not ARCH_SHMOBILE * pci/host-tegra: PCI: tegra: Remove misleading PHYS_OFFSET PCI: tegra: Track bus -> CPU mapping PCI: tegra: Remove unused struct tegra_pcie.num_ports field PCI: tegra: Implement ->{add,remove}_bus() callbacks PCI: Add pci_ops.{add,remove}_bus() callbacks * pci/host-thunder: PCI: thunder: Add driver for ThunderX-pass{1,2} on-chip devices PCI: thunder: Add PCIe host driver for ThunderX processors PCI: generic: Expose pci_host_common_probe() for use by other drivers PCI: generic: Add pci_host_common_probe(), based on gen_pci_probe() PCI: generic: Move structure definitions to separate header file * pci/host-vmd: x86/PCI: VMD: Attach VMD resources to parent domain's resource tree x86/PCI: VMD: Set bus resource start to 0 x86/PCI: VMD: Document code for maintainability * pci/host-xilinx: microblaze/PCI: Support generic Xilinx AXI PCIe Host Bridge IP driver PCI: xilinx: Update Zynq binding with Microblaze node PCI: xilinx: Don't call pci_fixup_irqs() on Microblaze PCI: xilinx: Remove dependency on ARM-specific struct hw_pci PCI: xilinx: Use of_pci_get_host_bridge_resources() to parse DT * pci/host-xilinx-nwl: PCI: xilinx-nwl: Add support for Xilinx NWL PCIe Host Controller
2016-03-15Merge branches 'pci/aer', 'pci/enumeration', 'pci/kconfig', 'pci/misc', ↵Bjorn Helgaas19-151/+277
'pci/virtualization' and 'pci/vpd' into next * pci/aer: PCI/AER: Log aer_inject error injections PCI/AER: Log actual error causes in aer_inject PCI/AER: Use dev_warn() in aer_inject PCI/AER: Fix aer_inject error codes * pci/enumeration: PCI: Fix broken URL for Dell biosdevname * pci/kconfig: PCI: Cleanup pci/pcie/Kconfig whitespace PCI: Include pci/hotplug Kconfig directly from pci/Kconfig PCI: Include pci/pcie/Kconfig directly from pci/Kconfig * pci/misc: PCI: Add PCI_CLASS_SERIAL_USB_DEVICE definition PCI: Add QEMU top-level IDs for (sub)vendor & device unicore32: Remove unused HAVE_ARCH_PCI_SET_DMA_MASK definition PCI: Consolidate PCI DMA constants and interfaces in linux/pci-dma-compat.h PCI: Move pci_dma_* helpers to common code frv/PCI: Remove stray pci_{alloc,free}_consistent() declaration * pci/virtualization: PCI: Wait for up to 1000ms after FLR reset PCI: Support SR-IOV on any function type * pci/vpd: PCI: Prevent VPD access for buggy devices PCI: Sleep rather than busy-wait for VPD access completion PCI: Fold struct pci_vpd_pci22 into struct pci_vpd PCI: Rename VPD symbols to remove unnecessary "pci22" PCI: Remove struct pci_vpd_ops.release function pointer PCI: Move pci_vpd_release() from header file to pci/access.c PCI: Move pci_read_vpd() and pci_write_vpd() close to other VPD code PCI: Determine actual VPD size on first access PCI: Use bitfield instead of bool for struct pci_vpd_pci22.busy PCI: Allow access to VPD attributes with size 0 PCI: Update VPD definitions
2016-03-15PCI: Add PCI_CLASS_SERIAL_USB_DEVICE definitionHeikki Krogerus5-11/+11
PCI-SIG has defined Interface FEh for Base Class 0Ch, Sub-Class 03h as "USB Device (not host controller)". It is already being used in various USB device controller drivers for matching, so add PCI_CLASS_SERIAL_USB_DEVICE and use it. Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2016-03-15PCI: Cleanup pci/pcie/Kconfig whitespaceAndreas Ziegler1-3/+4
Clean up style issues in drivers/pci/pcie/Kconfig, in particular all indentation is now done using tabs, not spaces, and the definition of PCIEASPM_DEBUG is now separated from the definition of PCIEASPM with a newline. Signed-off-by: Andreas Ziegler <andreas.ziegler@fau.de> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2016-03-12PCI: thunder: Add driver for ThunderX-pass{1,2} on-chip devicesDavid Daney3-0/+411
The cavium,pci-thunder-ecam devices are exactly ECAM-based PCI root complexes. These root complexes (loosely referred to as ECAM units in the hardware manuals) are used to access the Thunder on-chip devices. They are special in that all the BARs on devices behind these root complexes are at fixed addresses. Add a driver for these devices that synthesizes Enhanced Allocation (EA) capability entries for each BAR. Since this EA synthesis is needed for exactly two chip models, we can hard- code some assumptions about the device topology and the layout of the config space of specific DEVFNs in the driver. [bhelgaas: changelog, whitespace] Signed-off-by: David Daney <david.daney@cavium.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Rob Herring <robh@kernel.org>
2016-03-12PCI: thunder: Add PCIe host driver for ThunderX processorsDavid Daney3-0/+354
The root complexes used to access off-chip PCIe devices (called PEM units in the hardware manuals) on some Cavium ThunderX processors require quirky access methods for the config space of the PCIe bridge. Add a driver to provide these config space accessor functions. Use the pci-host-common code to configure the PCI machinery. Signed-off-by: David Daney <david.daney@cavium.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Arnd Bergmann <arnd@arndb.de>
2016-03-12PCI: generic: Expose pci_host_common_probe() for use by other driversDavid Daney5-165/+202
Move pci_host_common_probe() and associated functions to pci-host-common.c, where it can be shared with other drivers. Make it public (not static) and update Kconfig and Makefile to build it. No functional change intended. [bhelgaas: split into separate patch, changelog] Signed-off-by: David Daney <david.daney@cavium.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Will Deacon <will.deacon@arm.com>
2016-03-12PCI: generic: Add pci_host_common_probe(), based on gen_pci_probe()David Daney1-8/+17
Factor gen_pci_probe(), moving most of it into pci_host_common_probe() where it can be shared with other drivers that have slightly different config accessors. No functional change intended. [bhelgaas: split into separate patch, changelog] Signed-off-by: David Daney <david.daney@cavium.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Will Deacon <will.deacon@arm.com>
2016-03-12PCI: generic: Move structure definitions to separate header fileDavid Daney2-18/+45
Move definitions for generic PCI host controller driver structures to a separate header file so we can share them with other drivers. No functional change intended. [bhelgaas: split into separate patch, changelog] Signed-off-by: David Daney <david.daney@cavium.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Will Deacon <will.deacon@arm.com>
2016-03-11PCI: xilinx-nwl: Add support for Xilinx NWL PCIe Host ControllerBharat Kumar Gogada3-0/+892
Add PCIe Root Port driver for Xilinx PCIe NWL bridge IP. [bhelgaas: wait for link like dw_pcie_wait_for_link(), simplify bitmap error path, typos, whitespace, fold in Dan Carpenter's PTR_ERR() fix] Signed-off-by: Bharat Kumar Gogada <bharatku@xilinx.com> Signed-off-by: Ravi Kiran Gummaluri <rgummal@xilinx.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Marc Zyngier <marc.zyngier@arm.com> Acked-by: Rob Herring <robh@kernel.org>
2016-03-11PCI: keystone: Defer probing if devm_phy_get() returns -EPROBE_DEFERShawn Lin1-0/+3
A SerDes PHY is optional, so if devm_phy_get() doesn't find one at all, that's fine. But if devm_phy_get() finds a PHY that doesn't have a driver yet, it returns -EPROBE_DEFER. In that case, defer probing the Keystone driver. We may be able to load it later after a PHY driver is loaded. [bhelgaas: changelog, check for -EPROBE_DEFER first] Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2016-03-11PCI: altera: Fix altera_pcie_link_is_up()Ley Foon Tan1-1/+2
Originally altera_pcie_link_is_up() decided the link was up if any of the low four bits of the LTSSM register were set. But the link is only up if the LTSSM state is L0, so check for that exact value. [bhelgaas: changelog] Signed-off-by: Ley Foon Tan <lftan@altera.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2016-03-11PCI: rcar: Depend on ARCH_RENESAS, not ARCH_SHMOBILESimon Horman1-2/+2
Make the R-Car drivers depend on ARCH_RENESAS instead of ARCH_SHMOBILE. This is part of an ongoing process to migrate from ARCH_SHMOBILE to ARCH_RENESAS. The motivation is that RENESAS seems to be a more appropriate name than SHMOBILE for the majority of Renesas ARM-based SoCs. Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
2016-03-10PCI: Wait for up to 1000ms after FLR resetAlex Williamson1-2/+25
Some devices take longer than the spec indicates to return from FLR reset, a notable case of this is Intel integrated graphics (IGD), which can often take an additional 300ms powering down an attached LCD panel as part of the FLR. Allow devices up to 1000ms, testing every 100ms whether the second dword of config space is read as -1. Signed-off-by: Alex Williamson <alex.williamson@redhat.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2016-03-10PCI: Prevent VPD access for buggy devicesBabu Moger1-0/+29
On some devices, reading or writing VPD causes a system panic. This can be easily reproduced by running "lspci -vvv" or "cat /sys/bus/devices/XX../vpd". Blacklist these devices so we don't access VPD data at all. [bhelgaas: changelog, comment, drop pci/access.c changes] Link: https://bugzilla.kernel.org/show_bug.cgi?id=110681 Tested-by: Shane Seymour <shane.seymour@hpe.com> Tested-by: Babu Moger <babu.moger@oracle.com> Signed-off-by: Babu Moger <babu.moger@oracle.com> Signed-off-by: Hannes Reinecke <hare@suse.de> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Cc: Alexander Duyck <alexander.duyck@gmail.com>
2016-03-10PCI: Sleep rather than busy-wait for VPD access completionBjorn Helgaas1-8/+10
Use usleep_range() instead of udelay() while waiting for a VPD access to complete. This is not a performance path, so no need to hog the CPU. Rationale for usleep_range() parameters: We clear PCI_VPD_ADDR_F for a read (or set it for a write), then wait for the device to change it. For a device that updates PCI_VPD_ADDR between our config write and subsequent config read, we won't sleep at all and can get the device's maximum rate. Sleeping a minimum of 10 usec per 4-byte access limits throughput to about 400Kbytes/second. VPD is small (32K bytes at most), and most devices use only a fraction of that. We back off exponentially up to 1024 usec per iteration. If we reach 1024, we've already waited up to 1008 usec (16 + 32 + ... + 512), so if we miss an update and wait an extra 1024 usec, we can still get about 1/2 of the device's maximum rate. Tested-by: Shane Seymour <shane.seymour@hpe.com> Tested-by: Babu Moger <babu.moger@oracle.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Hannes Reinecke <hare@suse.com>
2016-03-09PCI: Add QEMU top-level IDs for (sub)vendor & deviceRobin H. Johnson3-5/+6
Introduce PCI_VENDOR/PCI_SUBVENDOR/PCI_SUBDEVICE defines to replace the constants scattered in the kernel already used to detect QEMU. They are defined in the QEMU codebase per docs/specs/pci-ids.txt. Signed-off-by: Robin H. Johnson <robbat2@gentoo.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Takashi Iwai <tiwai@suse.de> Reviewed-by: Gerd Hoffmann <kraxel@redhat.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2016-03-09PCI/AER: Log aer_inject error injectionsJean Delvare1-0/+3
Log successful error injections so that injected errors can be differentiated from real errors. Suggested-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Jean Delvare <jdelvare@suse.de> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> CC: Borislav Petkov <bp@suse.de>
2016-03-09PCI/AER: Log actual error causes in aer_injectJean Delvare1-1/+7
The aer_inject driver is very quiet. In most cases, it merely returns an error code to user-space, leaving the user with little clue about the actual reason for the failure. So, log error messages for 4 of the most frequent causes of failure: * Can't find the root port of the specified device. * Device doesn't support AER. * Root port doesn't support AER. * AER device not found. This gives the user a chance to understand why aer-inject failed. Based on a preliminary patch by Thomas Renninger. Signed-off-by: Jean Delvare <jdelvare@suse.de> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> CC: Borislav Petkov <bp@suse.de> CC: Thomas Renninger <trenn@suse.de>
2016-03-09PCI/AER: Use dev_warn() in aer_injectJean Delvare1-3/+7
dev_warn() is better than printk(LOG_WARNING...) as it records which device the message relates to. Also add a prefix "aer_inject:" to help differentiate real errors from injected errors. Signed-off-by: Jean Delvare <jdelvare@suse.de> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> CC: Borislav Petkov <bp@suse.de>
2016-03-09PCI/AER: Fix aer_inject error codesJean Delvare1-4/+4
EPERM means "Operation not permitted", which doesn't reflect the lack of support for AER. EPROTONOSUPPORT (Protocol not supported) is a better choice of error code if the device or its root port lack support for AER. Likewise, EINVAL means "Invalid argument", which is not suitable for cases where the AER error device is missing or unusable. ENODEV and EPROTONOSUPPORT, respectively, fit better. Suggested-by: Borislav Petkov <bp@suse.de> Signed-off-by: Jean Delvare <jdelvare@suse.de> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> CC: Borislav Petkov <bp@suse.de> CC: Prarit Bhargava <prarit@redhat.com>
2016-03-09PCI: tegra: Remove misleading PHYS_OFFSETThierry Reding1-1/+1
BARs are disabled when the size register is 0, so it's misleading to write a base address into the start register. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2016-03-09PCI: tegra: Track bus -> CPU mappingThierry Reding1-0/+28
Track the offsets of the bus -> CPU mapping for I/O and memory. This is cosmetic for current Tegra chips because the offset is always 0. But to properly support legacy use-cases, like VGA, this would be needed so that PCI bus addresses can be relocated. While at it, also request the I/O resource both in physical memory and I/O space to make /proc/iomem consistent, as well as add the I/O region to the list of host bridge resources. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2016-03-09PCI: tegra: Remove unused struct tegra_pcie.num_ports fieldThierry Reding1-1/+0
The num_ports field of the tegra_pcie structure is never used so remove it. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2016-03-09PCI: tegra: Implement ->{add,remove}_bus() callbacksThierry Reding1-20/+34
The configuration space mapping on Tegra is somewhat special, and in order to avoid wasting virtual address space the configuration space for each bus needs to be stitched together from several blocks which form a single continuous virtual address range for accessors. Currently the configuration space is mapped upon the first access to one of its registers. However, the mapping operation may sleep under certain circumstances, so doing it from the configuration space accessors (they are protected by a spin lock) will trigger a warning. To avoid the warning, use the ->add_bus() callback to perform the mapping at enumeration time when the operation is allowed to sleep. Also add an implementation of ->remove_bus() that undoes the mapping established by the ->add_bus() callback. While it isn't currently possible to unload the module, there is work underway to remedy this, and this code will come in handy when that happens. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2016-03-09PCI: Add pci_ops.{add,remove}_bus() callbacksThierry Reding2-0/+10
Add pci_ops.{add,remove}_bus() callbacks, which will be called on every newly created bus and when a bus is being removed, respectively. This can be used by drivers to implement driver-specific initialization and teardown of the bus, in addition to the architecture-specifics implemented by the pcibios_add_bus() and the pcibios_remove_bus() functions. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2016-03-09PCI: Include pci/hotplug Kconfig directly from pci/KconfigBjorn Helgaas2-2/+1
Include pci/hotplug/Kconfig directly from pci/Kconfig, so arches don't have to source both pci/Kconfig and pci/hotplug/Kconfig. Note that this effectively adds pci/hotplug/Kconfig to the following arches, because they already sourced drivers/pci/Kconfig but they previously did not source drivers/pci/hotplug/Kconfig: alpha arm avr32 frv m68k microblaze mn10300 sparc unicore32 Inspired-by-patch-from: Bogicevic Sasa <brutallesale@gmail.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2016-03-08PCI: Include pci/pcie/Kconfig directly from pci/KconfigBogicevic Sasa1-0/+3
Include pci/pcie/Kconfig directly from pci/Kconfig, so arches don't have to source both pci/Kconfig and pci/pcie/Kconfig. Note that this effectively adds pci/pcie/Kconfig to the following arches, because they already sourced drivers/pci/Kconfig but they previously did not source drivers/pci/pcie/Kconfig: alpha avr32 blackfin frv m32r m68k microblaze mn10300 parisc sparc unicore32 xtensa [bhelgaas: changelog, source pci/pcie/Kconfig at top of pci/Kconfig, whitespace] Signed-off-by: Sasa Bogicevic <brutallesale@gmail.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2016-03-08microblaze/PCI: Support generic Xilinx AXI PCIe Host Bridge IP driverBharat Kumar Gogada1-1/+1
Modify the Microblaze PCI subsystem to work with the generic drivers/pci/host/pcie-xilinx.c driver on Microblaze and Zynq. [bhelgaas: changelog] Signed-off-by: Bharat Kumar Gogada <bharatku@xilinx.com> Signed-off-by: Ravi Kiran Gummaluri <rgummal@xilinx.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Michal Simek <michal.simek@xilinx.com>
2016-03-08PCI: xilinx: Don't call pci_fixup_irqs() on MicroblazeBharat Kumar Gogada1-0/+2
The Xilinx AXI PCIe Host Bridge Soft IP driver was previously only supported on ARM (in particular, on ARCH_ZYNC), and pci_fixup_irqs() is available there. But Microblaze will do IRQ fixup in pcibios_add_device(), so pci_fixup_irqs() is not available on Microblaze. Don't call pci_fixup_irqs() on Microblaze, so the driver can work on both Zynq and Microblaze Architectures. [bhelgaas: revise changelog to show similarity to bdb8a1844f31 ("PCI: iproc: Call pci_fixup_irqs() for ARM64 as well as ARM")] Signed-off-by: Bharat Kumar Gogada <bharatku@xilinx.com> Signed-off-by: Ravi Kiran Gummaluri <rgummal@xilinx.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Michal Simek <michal.simek@xilinx.com>
2016-03-08PCI: xilinx: Remove dependency on ARM-specific struct hw_pciBharat Kumar Gogada1-66/+16
The Xilinx PCIe host controller driver uses pci_common_init_dev(), which is ARM-specific and requires the ARM struct hw_pci. The part of pci_common_init_dev() that is needed is limited and can be done here without using hw_pci. Create and scan the root bus directly without using the ARM pci_common_init_dev() interface. [bhelgaas: revise changelog to show similarity to 79953dd22c1d ("PCI: rcar: Remove dependency on ARM-specific struct hw_pci")] Signed-off-by: Bharat Kumar Gogada <bharatku@xilinx.com> Signed-off-by: Ravi Kiran Gummaluri <rgummal@xilinx.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Michal Simek <michal.simek@xilinx.com>
2016-03-08PCI: xilinx: Use of_pci_get_host_bridge_resources() to parse DTBharat Kumar Gogada1-102/+5
Use the new of_pci_get_host_bridge_resources() API in place of the PCI OF DT parser. [bhelgaas: revise changelog to show similarity to 0021d22b73d6 ("PCI: designware: Use of_pci_get_host_bridge_resources() to parse DT")] Signed-off-by: Bharat Kumar Gogada <bharatku@xilinx.com> Signed-off-by: Ravi Kiran Gummaluri <rgummal@xilinx.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Michal Simek <michal.simek@xilinx.com>
2016-03-07PCI: Consolidate PCI DMA constants and interfaces in linux/pci-dma-compat.hBjorn Helgaas1-12/+0
Christoph added a generic include/linux/pci-dma-compat.h, so now there's one place with most of the PCI DMA interfaces. Move more PCI DMA-related things there: - The PCI_DMA_* direction constants from linux/pci.h - The pci_set_dma_max_seg_size() and pci_set_dma_seg_boundary() CONFIG_PCI implementations from drivers/pci/pci.c - The pci_set_dma_max_seg_size() and pci_set_dma_seg_boundary() !CONFIG_PCI stubs from linux/pci.h - The pci_set_dma_mask() and pci_set_consistent_dma_mask() !CONFIG_PCI stubs from linux/pci.h Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2016-03-01PCI: Fold struct pci_vpd_pci22 into struct pci_vpdBjorn Helgaas2-31/+23
We only support one flavor of VPD, so there's no need to complicate things by having a "generic" struct pci_vpd and a more specific struct pci_vpd_pci22. Fold struct pci_vpd_pci22 directly into struct pci_vpd. [bhelgaas: remove NULL check before kfree of dev->vpd (per kfreeaddr.cocci)] Tested-by: Shane Seymour <shane.seymour@hpe.com> Tested-by: Babu Moger <babu.moger@oracle.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Hannes Reinecke <hare@suse.com>
2016-03-01PCI: Rename VPD symbols to remove unnecessary "pci22"Bjorn Helgaas3-21/+21
There's only one kind of VPD, so we don't need to qualify it as "the version described by PCI spec rev 2.2." Rename the following symbols to remove unnecessary "pci22": PCI_VPD_PCI22_SIZE -> PCI_VPD_MAX_SIZE pci_vpd_pci22_size() -> pci_vpd_size() pci_vpd_pci22_wait() -> pci_vpd_wait() pci_vpd_pci22_read() -> pci_vpd_read() pci_vpd_pci22_write() -> pci_vpd_write() pci_vpd_pci22_ops -> pci_vpd_ops pci_vpd_pci22_init() -> pci_vpd_init() Tested-by: Shane Seymour <shane.seymour@hpe.com> Tested-by: Babu Moger <babu.moger@oracle.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Hannes Reinecke <hare@suse.com>
2016-03-01PCI: Remove struct pci_vpd_ops.release function pointerBjorn Helgaas2-9/+1
The struct pci_vpd_ops.release function pointer is always pci_vpd_pci22_release(), so there's no need for the flexibility of a function pointer. Inline the pci_vpd_pci22_release() body into pci_vpd_release() and remove pci_vpd_pci22_release() and the struct pci_vpd_ops.release function pointer. Tested-by: Shane Seymour <shane.seymour@hpe.com> Tested-by: Babu Moger <babu.moger@oracle.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Hannes Reinecke <hare@suse.com>
2016-03-01PCI: Move pci_vpd_release() from header file to pci/access.cBjorn Helgaas2-5/+7
Move pci_vpd_release() so it's next to the other VPD functions. This puts it next to pci_vpd_pci22_init(), which allocates the space freed by pci_vpd_release(). Tested-by: Shane Seymour <shane.seymour@hpe.com> Tested-by: Babu Moger <babu.moger@oracle.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Hannes Reinecke <hare@suse.com>
2016-03-01PCI: Move pci_read_vpd() and pci_write_vpd() close to other VPD codeBjorn Helgaas1-32/+30
pci_read_vpd() and pci_write_vpd() were stranded in the middle of config accessor functions. Move them close to the other VPD code in the file. No functional change. Tested-by: Shane Seymour <shane.seymour@hpe.com> Tested-by: Babu Moger <babu.moger@oracle.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Hannes Reinecke <hare@suse.com>
2016-03-01PCI: Determine actual VPD size on first accessHannes Reinecke2-3/+86
PCI-2.2 VPD entries have a maximum size of 32k, but might actually be smaller than that. To figure out the actual size one has to read the VPD area until the 'end marker' is reached. Per spec, reading outside of the VPD space is "not allowed." In practice, it may cause simple read errors or even crash the card. To make matters worse not every PCI card implements this properly, leaving us with no 'end' marker or even completely invalid data. Try to determine the size of the VPD data when it's first accessed. If no valid data can be read an I/O error will be returned when reading or writing the sysfs attribute. As the amount of VPD data is unknown initially the size of the sysfs attribute will always be set to '0'. [bhelgaas: changelog, use 0/1 (not false/true) for bitfield, tweak pci_vpd_pci22_read() error checking] Tested-by: Shane Seymour <shane.seymour@hpe.com> Tested-by: Babu Moger <babu.moger@oracle.com> Signed-off-by: Hannes Reinecke <hare@suse.de> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Cc: Alexander Duyck <alexander.duyck@gmail.com>
2016-03-01PCI: Use bitfield instead of bool for struct pci_vpd_pci22.busyBjorn Helgaas1-5/+5
Make struct pci_vpd_pci22.busy a 1-bit field instead of a bool. We intend to add another flag, and two bitfields are cheaper than two bools. Tested-by: Shane Seymour <shane.seymour@hpe.com> Tested-by: Babu Moger <babu.moger@oracle.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Hannes Reinecke <hare@suse.com>
2016-03-01PCI: Allow access to VPD attributes with size 0Hannes Reinecke1-8/+12
It is not always possible to determine the actual size of the VPD data, so allow access to them if the size is set to '0'. Tested-by: Shane Seymour <shane.seymour@hpe.com> Tested-by: Babu Moger <babu.moger@oracle.com> Signed-off-by: Hannes Reinecke <hare@suse.de> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Cc: Alexander Duyck <alexander.duyck@gmail.com>
2016-03-01PCI: imx6: Add DT bindings to configure PHY Tx driver settingsJustin Waters1-5/+37
The settings in GPR8 are dependent upon the particular layout of the hardware platform. As such, they should be configurable via the device tree. Look up PHY Tx driver settings from the device tree. Fall back to the original hard-coded values if they are not specified in the device tree. Signed-off-by: Justin Waters <justin.waters@timesys.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Lucas Stach <l.stach@pengutronix.de>
2016-02-29PCI: Fix broken URL for Dell biosdevnameNaga Venkata Sai Indubhaskar Jupudi1-1/+1
Dell developed a way to consistently name devices, and their last proposal was accepted under the name biosdevname. Fix a broken URL to biosdevname documentation. Signed-off-by: Naga Venkata Sai Indubhaskar Jupudi <njupudi@ucsc.edu> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2016-02-29PCI: Support SR-IOV on any function typeKelly Zytaruk1-4/+0
Previously, we only supported SR-IOV on PCI Express Endpoints and Root Complex Integrated Endpoints. This restriction has been present since d1b054da8f59 ("PCI: initialize and release SR-IOV capability") added SR-IOV support, but the spec does not require it. In fact, the SR-IOV spec r1.1, sec 3.3, says the SR-IOV extended capability may be present for any Type 0 function. Remove the function type test, so we can support SR-IOV on any function. Some AMD GPUs have display outputs, use the VGA class code, are Legacy Endpoints, and support SR-IOV. This change allows Linux to enable SR-IOV on these devices. [bhelgaas: changelog] Link: https://bugzilla.kernel.org/show_bug.cgi?id=112221 Signed-off-by: Kelly Zytaruk <kelly.zytaruk@amd.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2016-02-09Merge branches 'pci/host-designware', 'pci/host-imx6', 'pci/host-layerscape' ↵Bjorn Helgaas4-98/+69
and 'pci/host-rcar' into next * pci/host-designware: PCI: designware: Remove PCI_PROBE_ONLY handling PCI: designware: Explain why we don't program ATU for some platforms * pci/host-imx6: PCI: imx6: Move link up check into imx6_pcie_wait_for_link() PCI: imx6: Remove broken Gen2 workaround PCI: imx6: Move PHY reset into imx6_pcie_establish_link() PCI: imx6: Move imx6_pcie_reset_phy() near other PHY handling functions * pci/host-layerscape: PCI: layerscape: Add "fsl,ls2085a-pcie" compatible ID * pci/host-rcar: PCI: rcar: Remove PCI_PROBE_ONLY handling
2016-02-09Merge branches 'pci/aer', 'pci/misc' and 'pci/virtualization' into nextBjorn Helgaas25-49/+79
* pci/aer: PCI/AER: Use list_first_entry_or_null() to simplify code PCI/AER: Restore pci_ops pointer while calling original pci_ops PCI/AER: Rename pci_ops_aer to aer_inj_pci_ops * pci/misc: PCI: Remove includes of asm/pci-bridge.h PCI: Remove empty asm-generic/pci-bridge.h ARM64: PCI: Remove generated include of asm-generic/pci-bridge.h PCI: Remove includes of empty asm-generic/pci-bridge.h PCI: Move pci_set_flags() from asm-generic/pci-bridge.h to linux/pci.h PCI/PME: Restructure pcie_pme_suspend() to prevent compiler warning PCI/PME: Remove redundant port lookup PCI: Check device_attach() return value always * pci/virtualization: PCI: Add ACS quirk for all Cavium devices
2016-02-09PCI: designware: Remove PCI_PROBE_ONLY handlingLorenzo Pieralisi1-6/+4
The PCIe designware host driver is not used in system configurations requiring the PCI_PROBE_ONLY flag to be set to prevent resources assignment, therefore the driver code handling the flag can be removed from the kernel. Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Pratyush Anand <pratyush.anand@gmail.com> Acked-by: Jingoo Han Jingoo Han <jingoohan1@gmail.com> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Gabriele Paoloni <gabriele.paoloni@huawei.com> Cc: Zhou Wang <wangzhou1@hisilicon.com>
2016-02-09PCI: designware: Explain why we don't program ATU for some platformsJisheng Zhang1-0/+5
Some platforms don't support ATU, e.g., pci-keystone.c. These platforms use their own address translation component rather than ATU, and they provide the rd_other_conf and wr_other_conf methods to program the translation component and perform the access. Add a comment to explain why we don't program the ATU for these platforms. [bhelgaas: changelog] Signed-off-by: Jisheng Zhang <jszhang@marvell.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2016-02-06PCI: Remove includes of asm/pci-bridge.hBjorn Helgaas17-20/+3
Drivers should include asm/pci-bridge.h only when they need the arch- specific things provided there. Outside of the arch/ directories, the only drivers that actually need things provided by asm/pci-bridge.h are the powerpc RPA hotplug drivers in drivers/pci/hotplug/rpa*. Remove the includes of asm/pci-bridge.h from the other drivers, adding an include of linux/pci.h if necessary. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2016-02-06PCI: Remove includes of empty asm-generic/pci-bridge.hBjorn Helgaas4-4/+0
include/asm-generic/pci-bridge.h is now empty, so remove every #include of it. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Will Deacon <will.deacon@arm.com> (arm64)
generated by cgit v1.2.3 (git 2.39.0) at 2025-02-07 00:54:13 +0300