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path: root/drivers/usb/dwc3
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2014-12-01Merge 3.18-rc7 into usb-nextGreg Kroah-Hartman1-4/+4
We need the xhci fixes here and this resolves a merge issue with drivers/usb/dwc3/ep0.c Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2014-11-27Merge tag 'for-3.19' of ↵Greg Kroah-Hartman1-6/+16
git://git.kernel.org/pub/scm/linux/kernel/git/kishon/linux-phy into usb-testing Kishon writes: Improvements in phy-core specifically on PHY core finds the PHY in the case of non-dt boot. Adds three new PHY drivers using the PHY framework and some miscellaneous fixes and cleanups.
2014-11-24usb: dwc3: return error code from the most recent callJulia Lawall1-1/+1
Copy-paste error from the previous block of error handling code. A simplified version of the semantic match that finds this problem is as follows: (http://coccinelle.lip6.fr/) // <smpl> @@ expression e,e1; @@ if (IS_ERR(e)) { ... ( ret = PTR_ERR(e); | * ret = PTR_ERR(e1); ) ... return ret; } // </smpl> Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr> Signed-off-by: Felipe Balbi <balbi@ti.com>
2014-11-22usb: dwc3: host: convey the PHYs to xhciHeikki Krogerus1-6/+16
On some platforms a PHY may need to be handled also in the host controller driver. Exynos5420 SoC requires some "PHY tuning" based on the USB speed. This patch delivers dwc3's PHYs to the xhci platform device when it's created. Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com> Tested-by: Vivek Gautam <gautam.vivek@samsung.com> Acked-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2014-11-21usb: dwc3: exynos: Add provision for AXI UpScaler clock on exynos7Vivek Gautam1-0/+17
DWC3 controller on Exynos7 SoC has separate control for AXI UpScaler which connects DWC3 DRD controller to AXI bus. Get the gate clock for the same to control it across power cycles. Suggested-by: Anton Tikhomirov <av.tikhomirov@samsung.com> Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2014-11-21usb: dwc3: exynos: Add provision for suspend clockVivek Gautam1-0/+11
DWC3 controller on Exynos SoC series have separate control for suspend clock which replaces pipe3_rx_pclk as clock source to a small part of DWC3 core that operates when SS PHY is in its lowest power state (P3) in states SS.disabled and U3. Suggested-by: Anton Tikhomirov <av.tikhomirov@samsung.com> Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2014-11-21usb: dwc3: exynos: Remove local variable for clock from probeVivek Gautam1-8/+5
There's no need to keep one local variable for clock, and then assign the same to 'clk' member of dwc3_exynos. Just cleaning it up. Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2014-11-20usb: dwc3: keystone: fix error return codeJulia Lawall1-0/+1
Return a negative error code on failure. A simplified version of the semantic match that finds this problem is as follows: (http://coccinelle.lip6.fr/) // <smpl> @@ identifier ret; expression e1,e2; @@ ( if (\(ret < 0\|ret != 0\)) { ... return ret; } | ret = 0 ) ... when != ret = e1 when != &ret *if(...) { ... when != ret = e2 when forall return ret; } // </smpl> Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr> Signed-off-by: Felipe Balbi <balbi@ti.com>
2014-11-20usb: dwc3: trace: don't save pointersFelipe Balbi1-4/+8
There was another instance where we were holding pointers which could be long gone. Fix that by caching only values pointed to by such pointer. Because no crash has been observed, this patch will be sent on v3.19 merge window, instead of -rc. Signed-off-by: Felipe Balbi <balbi@ti.com>
2014-11-11usb: dwc3: gadget: use udc-core's reset notifierFelipe Balbi1-5/+12
Replace usb_gadget_driver's disconnect with udc-core's reset notifier at bus reset handler. Signed-off-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2014-11-10usb: dwc3: ep0: fix for dead codeFelipe Balbi1-4/+4
commit 6856d30 (usb: dwc3: ep0: return early on NULL requests) tried to fix a minor corner case where we could dereference a NULL pointer but it also ended up introducing some dead code. Unfortunately, that dead code, if reached, could end up starving the endpoint request list because a request would never be given back when it should. Fix this by moving the check for empty request list before its first use. Reported-by: Dave Jones <davej@redhat.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2014-11-07usb: dwc3: core: enable phy suspend quirk on non-FPGAFelipe Balbi1-2/+2
as it turns out, at least AM437x silicon (non-FPGA) needs to enable PHY suspend quirk. So let's allow for PHY suspend quirk to be used with non-FPGA builds too. Signed-off-by: Felipe Balbi <balbi@ti.com>
2014-11-05usb: dwc3: ep0: remove unnecessary break after returnJingoo Han1-2/+0
Fix the following checkpatch warning. WARNING: break is not useful after a goto or return Signed-off-by: Jingoo Han <jg1.han@samsung.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2014-11-05usb: dwc3: exynos: remove non-DT support for Exynos Specific Glue layerJingoo Han2-5/+2
DWC3 Exynos Specific Glue layer can be used only for Exynos SoCs. In addition, non-DT for EXYNOS SoCs is not supported from v3.11; thus, there is no need to support non-DT for DWC3 Exynos Specific Glue layer. The 'linux/platform_data/dwc3-exynos.h' file has been used for non-DT support. Thus, the 'dwc3-exynos.h' file is removed, because it is not used anymore. Signed-off-by: Jingoo Han <jg1.han@samsung.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2014-11-03usb: dwc3: make HIRD threshold configurableHuang Rui4-5/+27
HIRD threshold should be configurable by different platforms. From DesignWare databook: When HIRD_Threshold[4] is set to 1b1 and HIRD value is greater than or equal to the value in HIRD_Threshold[3:0], dwc3 asserts output signals utmi_l1_suspend_n to put PHY into Deep Low-Power mode in L1. When HIRD_Threshold[4] is set to 1b0 or the HIRD value is less than HIRD_Threshold[3:0], dwc3 asserts output signals utmi_sleep_n on L1. Signed-off-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2014-11-03usb: dwc3: add support for AMD Nolan platformHuang Rui1-0/+26
This patch adds support for AMD Nolan (NL) FPGA and SoC platform. Cc: Jason Chang <jason.chang@amd.com> Signed-off-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2014-11-03usb: dwc3: add disable usb2 suspend phy quirkHuang Rui3-0/+9
This patch adds disable usb2 suspend phy quirk, and some special platforms can configure that if it is needed. Signed-off-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2014-11-03usb: dwc3: add disable usb3 suspend phy quirkHuang Rui3-0/+9
This patch adds disable usb3 suspend phy quirk, and some special platforms can configure that if it is needed. Signed-off-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2014-11-03usb: dwc3: add Tx de-emphasis quirkHuang Rui3-0/+31
This patch adds Tx de-emphasis quirk, and the Tx de-emphasis value is configurable according to PIPE3 specification. Value Description 0 -6dB de-emphasis 1 -3.5dB de-emphasis 2 No de-emphasis 3 Reserved It can be configured on DT or platform data. Signed-off-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2014-11-03usb: dwc3: set SUSPHY bit for all coresHuang Rui1-0/+24
It is recommended to set USB3 and USB2 SUSPHY bits to '1' after the core initialization is completed above the dwc3 revision 1.94a. Signed-off-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2014-11-03usb: dwc3: add rx_detect to polling lfps quirkHuang Rui3-0/+10
This patch adds RX_DETECT to Polling.LFPS control quirk, and some special platforms can configure that if it is needed. [ balbi@ti.com : added DeviceTree binding documentation ] Signed-off-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2014-11-03usb: dwc3: add lfps filter quirkHuang Rui3-0/+10
This patch adds LFPS filter quirk, and some special platforms can configure that if it is needed. [ balbi@ti.com : added DeviceTree binding documentation ] Signed-off-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2014-11-03usb: dwc3: add delay phy power change quirkHuang Rui3-0/+10
This patch adds delay PHY power change from P0 to P1/P2/P3 when link state changing from U0 to U1/U2/U3 respectively, and some special platforms can configure that if it is needed. [ balbi@ti.com : added DeviceTree binding documentation ] Signed-off-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2014-11-03usb: dwc3: add delay p1p2p3 quirkHuang Rui3-0/+12
This patch adds delay P0 to P1/P2/P3 quirk for U2/U2/U3, and some special platforms can configure that if it is needed. [ balbi@ti.com : added DeviceTree binding documentation ] Signed-off-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2014-11-03usb: dwc3: add request p1p2p3 quirkHuang Rui3-0/+10
This patch adds request P1/P2/P3 quirk for U2/U2/U3, and some special platforms can configure that if it is needed. [ balbi@ti.com : added DeviceTree binding documentation ] Signed-off-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2014-11-03usb: dwc3: add P3 in U2 SS inactive quirkHuang Rui3-0/+27
This patch adds P3 in U2 SS inactive quirk, and some special platforms can configure that if it is needed. [ balbi@ti.com : added DeviceTree binding documentation ] Signed-off-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2014-11-03usb: dwc3: add u2exit lfps quirkHuang Rui3-0/+10
This patch adds u2exit lfps quirk, and some special platforms can configure that if it is needed. [ balbi@ti.com : added DeviceTree binding documentation ] Signed-off-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2014-11-03usb: dwc3: add lpm erratum supportHuang Rui4-10/+48
When parameter DWC_USB3_LPM_ERRATA_ENABLE is enabled in Andvanced Configuration of coreConsultant, it supports of xHCI BESL Errata Dated 10/19/2011 is enabled in host mode. In device mode it adds the capability to send NYET response threshold based on the BESL value received in the LPM token, and the threhold is configurable for each soc platform. This patch adds an entry that soc platform is able to define the lpm capacity with their own device tree or bus glue layer. [ balbi@ti.com : added devicetree documentation, spelled threshold completely, made sure threshold is only applied to proper core revisions. ] Signed-off-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2014-11-03usb: dwc3: add disscramble quirkHuang Rui3-1/+18
This patch adds disscramble quirk, and it only needs to be enabled at fpga board on some vendor platforms. Signed-off-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2014-11-03usb: dwc3: initialize platform data at pci glue layerHuang Rui1-0/+9
This patch initializes platform data at pci glue layer, and SoCs x86-based platform vendor is able to define their flags in platform data at bus glue layer. Then do some independent behaviors at dwc3 core level. Signed-off-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2014-11-03usb: dwc3: add a flag to check if it is fpga boardHuang Rui2-0/+11
Some chip vendor is on pre-silicon phase, which needs to use the simulation board. It should have the same product and vendor id with the true soc, but might have some minor different configurations. Below thread discussion proposes to find a method to distinguish between simulation board and soc. http://marc.info/?l=linux-usb&m=141194772206369&w=2 In Andvanced Configuration of coreConsultant, there is the parameter of DWC_USB_EN_FPGA. This bit has the function we need. And it would response as 7 bit of GHWPARAMS6 register. So it's able to check this functional bit to confirm if works on FPGA board. Reported-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2014-11-03usb: dwc3: enable hibernation if to be supportedHuang Rui1-0/+6
It enables hibernation if the function is set in coreConsultant. Suggested-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2014-11-03usb: dwc3: keystone: remove duplicate check on resourceVarka Bhadram1-5/+0
Sanity check on resource happening with devm_ioremap_resource(). Signed-off-by: Varka Bhadram <varkab@cdac.in> Signed-off-by: Felipe Balbi <balbi@ti.com>
2014-11-03usb: gadget: remove unnecessary 'driver' argumentFelipe Balbi1-2/+1
now that no UDC driver relies on the extra 'driver' argument to ->udc_stop(), we can safely remove it. This commit is based on previous work by Robert Baldyga <r.baldyga@samsung.com> which can be found at [1]; however that patch turned out to have a high probability of regressing many UDC drivers because of a blind search & replace s/driver/$udc->driver/ which caused the 'driver' argument to stop_activity() to be a valid non-NULL pointer when it should be NULL, thus causing UDCs to mistakenly call gadget driver's ->disconnect() callback. [1] http://markmail.org/message/x5zneg4xea4zntab Acked-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2014-11-03usb: dwc3: gadget: WARN() on bogus usb_ep_queue()Felipe Balbi1-2/+10
Some gadget/function drivers might want to do improper request recycling by allocating a single request from one particular endpoint and queueing it to another completely unrelated endpoint. One such case was found with f_loopback.c. To prevent such cases from happening again, let's WARN() so we get a loud enough failure and persuade users to report errors. Signed-off-by: Felipe Balbi <balbi@ti.com>
2014-11-03usb: dwc3: gadget: set state to NOT_ATTACHED on disconnect_irqFelipe Balbi1-0/+1
whenever we get a Disconnect Interrupt, we should make sure to update out udc state to NOT_ATTACHED, otherwise sysfs will show wrong values. Signed-off-by: Felipe Balbi <balbi@ti.com>
2014-11-03usb: dwc3: get rid of ->prepare()/->complete()Felipe Balbi3-73/+8
Using ->prepare()/->complete() to mask/unmask IRQs is wrong at least for dwc3. We need to make sure that by the end of ->resume(), IRQs are working and ready to fire because a child device may need working IRQs for its own ->resume() method. Signed-off-by: Felipe Balbi <balbi@ti.com>
2014-11-03usb: dwc3: dwc3-omap: get rid of ->prepare()/->complete()George Cherian1-18/+2
Enabling the core interrupts in complete is too late for XHCI, and stops it from proper operation. The root of the problem is due to a disagreement between dwc3-omap and XHCI about when IRQs should be enabled. As it turns out, ->resume's documentation states that: "... generally the driver is expected to start working again, responding to hardware events and software requests (the device itself may be left in a low-power state, waiting for a runtime resume to occur) ..." From that we infer that IRQs must be unmasked by the end of ->resume(). Due to that, we will remove ->prepare() and ->complete() and disable/enable interrupts in ->suspend()/->resume(). Acked-by: Roger Quadros <rogerq@ti.com> Signed-off-by: George Cherian <george.cherian@ti.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2014-11-03usb: dwc3: ep0: trace ep0 TRBs tooFelipe Balbi1-0/+6
Add TRB tracepoints for ep0 TRBs as that might help finding bugs with ep0 handling. Signed-off-by: Felipe Balbi <balbi@ti.com>
2014-11-03usb: dwc3: add ACPI supportHeikki Krogerus1-0/+13
Adding ACPI ID used on newer Intel SoCs. Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2014-11-03usb: dwc3: core: only setting the dma_mask when neededHeikki Krogerus1-3/+5
If the probe drivers have already set the dma_mask, not replacing the value. Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2014-11-03usb: dwc3: trace: remove unnecessary newline characterFelipe Balbi2-13/+13
tracing infrastructure already adds those for us. Signed-off-by: Felipe Balbi <balbi@ti.com>
2014-11-03usb: dwc3: core: write LINUX_VERSION_CODE to our GUID registerFelipe Balbi1-0/+7
DWC3's GUID register is supposed to be used to write any sort of version we might want. It helps when getting bug reports for platforms you don't have HW to know which kernel version of the driver was running on the platform. Because we don't really track driver version, but we _do_ track the kernel version, let's write LINUX_VERSION_CODE to that register and use it for debugging. Reviewed-by: Paul Zimmerman <paulz@synopsys.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2014-10-23usb: dwc3: gadget: Properly initialize LINK TRBJack Pham1-2/+1
On ISOC endpoints the last trb_pool entry used as a LINK TRB is not getting zeroed out correctly due to memset being called incorrectly and in the wrong place. If pool allocated from DMA was not zero-initialized to begin with this will result in the size and ctrl values being random garbage. Call memset correctly after assignment of the trb_link pointer. Fixes: f6bafc6a1c ("usb: dwc3: convert TRBs into bitshifts") Cc: <stable@vger.kernel.org> # v3.4+ Signed-off-by: Jack Pham <jackp@codeaurora.org> Signed-off-by: Felipe Balbi <balbi@ti.com>
2014-10-23Revert "usb: dwc3: dwc3-omap: Disable/Enable only wrapper interrupts in ↵Roger Quadros1-13/+2
prepare/complete" This reverts commit 02dae36aa649a66c5c6181157ddd806e7b4913fc. That commit is bogus in two ways: 1) There's no way dwc3-omap's ->suspend() can cause any effect on xhci's ->suspend(). Linux device driver model guarantees that a parent's ->suspend() will only be called after all children are suspended. dwc3-omap is the parent of the parent of xhci. 2) When implementing Deep Sleep states where context is lost, USBOTGSS_IRQ0 register, well, looses context so we _must_ rewrite it otherwise core IRQs will never be reenabled and USB will appear to be dead. Fixes: 02dae36 (usb: dwc3: dwc3-omap: Disable/Enable only wrapper interrupts in prepare/complete) Cc: <stable@vger.kernel.org> # v3.17 Cc: George Cherian <george.cherian@ti.com> Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2014-10-23usb: dwc3: ep0: fix Data Phase for transfer sizes aligned to wMaxPacketSizeFelipe Balbi1-6/+13
According to Section 8.5.3.2 of the USB 2.0 specification, a USB device must terminate a Data Phase with either a short packet or a ZLP (if the previous transfer was a multiple of wMaxPacketSize). For reference, here's what the USB 2.0 specification, section 8.5.3.2 says: " 8.5.3.2 Variable-length Data Stage A control pipe may have a variable-length data phase in which the host requests more data than is contained in the specified data structure. When all of the data structure is returned to the host, the function should indicate that the Data stage is ended by returning a packet that is shorter than the MaxPacketSize for the pipe. If the data structure is an exact multiple of wMaxPacketSize for the pipe, the function will return a zero-length packet to indicate the end of the Data stage. " Signed-off-by: Felipe Balbi <balbi@ti.com>
2014-10-21usb: dwc3: ep0: return early on NULL requestsFelipe Balbi1-3/+6
if our list of requests is empty, return early. There's really nothing to be done in case our request list is empty anyway because the only situation where we our list is empty, is when we're transferring ZLPs. Signed-off-by: Felipe Balbi <balbi@ti.com>
2014-10-21usb: dwc3: pci: Add PCI ID for Intel BraswellAlan Cox1-0/+2
The device controller is the same but it has different PCI ID. Add this new ID to the driver's list of supported IDs. Signed-off-by: Alan Cox <alan@linux.intel.com> Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2014-10-21usb: dwc3: gadget: fix set_halt() bug with pending transfersFelipe Balbi3-7/+15
According to our Gadget Framework API documentation, ->set_halt() *must* return -EAGAIN if we have pending transfers (on either direction) or FIFO isn't empty (on TX endpoints). Fix this bug so that the mass storage gadget can be used without stall=0 parameter. This patch should be backported to all kernels since v3.2. Cc: <stable@vger.kernel.org> # v3.2+ Suggested-by: Alan Stern <stern@rowland.harvard.edu> Signed-off-by: Felipe Balbi <balbi@ti.com>
2014-10-21usb: dwc3: gadget: hold the lock through set_wedge()'s lifeFelipe Balbi1-3/+6
Instead of releasing the lock and calling locked versions of our set_halt() methods, let's hold the lock all the way through and call unlocked versions of those functions. Signed-off-by: Felipe Balbi <balbi@ti.com>
generated by cgit v1.2.3 (git 2.39.0) at 2025-01-24 10:25:22 +0300