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2024-01-19Merge tag 'spi-fix-v6.8-merge-window' of ↵Linus Torvalds1-1/+0
git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi Pull spi fix from Mark Brown: "One simple fix for the device unbind path in the Coldfire driver. A conversion to use a combined get/enable helper missed removing a disable" * tag 'spi-fix-v6.8-merge-window' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi: spi: coldfire-qspi: Remove an erroneous clk_disable_unprepare() from the remove function
2024-01-10Merge tag 'spi-v6.8' of ↵Linus Torvalds42-1631/+1987
git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi Pull spi updates from Mark Brown: "A moderately busy release for SPI, the main core update was the merging of support for multiple chip selects, used in some flash configurations. There were also big overhauls for the AXI SPI Engine and PL022 drivers, plus some new device support for ST. There's a few patches for other trees, API updates to allow the multiple chip select support and one of the naming modernisations touched a controller embedded in the USB code. - Support for multiple chip selects. - A big overhaul for the AXI SPI engine driver, modernising it and adding a bunch of new features. - Modernisation of the PL022 driver, fixing some issues with submitting messages while in atomic context in the process. - Many drivers were converted to use new APIs which avoid outdated terminology for devices and controllers. - Support for ST Microelectronics STM32F7 and STM32MP25, and Renesas RZ/Five" * tag 'spi-v6.8' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi: (83 commits) spi: stm32: add st,stm32mp25-spi compatible supporting STM32MP25 soc dt-bindings: spi: stm32: add st,stm32mp25-spi compatible spi: stm32: use dma_get_slave_caps prior to configuring dma channel spi: axi-spi-engine: fix struct member doc warnings spi: pl022: update description of internal_cs_control() spi: pl022: delete description of cur_msg spi: dw: Remove Intel Thunder Bay SOC support spi: dw: Remove Intel Thunder Bay SOC support spi: sh-msiof: Enforce fixed DTDL for R-Car H3 spi: ljca: switch to use devm_spi_alloc_host() spi: cs42l43: switch to use devm_spi_alloc_host() spi: zynqmp-gqspi: switch to use modern name spi: zynq-qspi: switch to use modern name spi: xtensa-xtfpga: switch to use modern name spi: xlp: switch to use modern name spi: xilinx: switch to use modern name spi: xcomm: switch to use modern name spi: uniphier: switch to use modern name spi: topcliff-pch: switch to use modern name spi: wpcm-fiu: switch to use devm_spi_alloc_host() ...
2024-01-05spi: coldfire-qspi: Remove an erroneous clk_disable_unprepare() from the ↵Christophe JAILLET1-1/+0
remove function The commit in Fixes has changed a devm_clk_get()/clk_prepare_enable() into a devm_clk_get_enabled(). It has updated the error handling path of the probe accordingly, but the remove has been left unchanged. Remove now the redundant clk_disable_unprepare() call from the remove function. Fixes: a90a987ebe00 ("spi: use devm_clk_get_enabled() in mcfqspi_probe()") Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr> Link: https://msgid.link/r/6670aed303e1f7680e0911387606a8ae069e2cef.1704464447.git.christophe.jaillet@wanadoo.fr Signed-off-by: Mark Brown <broonie@kernel.org>
2023-12-21spi: stm32: add st,stm32mp25-spi compatible supporting STM32MP25 socValentin Caron1-12/+120
Add support for the STM32MP25: - Burst should not be enabled with the new DMA used on STM32MP25. - STM32MP25 SPI8 has a limited feature set, it can only send words of 8 or 16 bits and with a maximum words number of 1024. Signed-off-by: Valentin Caron <valentin.caron@foss.st.com> Signed-off-by: Alain Volmat <alain.volmat@foss.st.com> Link: https://msgid.link/r/20231218155721.359198-4-alain.volmat@foss.st.com Signed-off-by: Mark Brown <broonie@kernel.org>
2023-12-21spi: stm32: use dma_get_slave_caps prior to configuring dma channelAlain Volmat1-2/+11
First check the dma channel capabilities (max burst) before configuring the dma channel. Signed-off-by: Alain Volmat <alain.volmat@foss.st.com> Link: https://msgid.link/r/20231218155721.359198-2-alain.volmat@foss.st.com Signed-off-by: Mark Brown <broonie@kernel.org>
2023-12-18spi: axi-spi-engine: fix struct member doc warningsDavid Lechner1-10/+10
The build bots are complaining that the members of struct spi_engine_message_state are not described. This adds the proper @name: syntax to the comments to fix this. Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202312182101.QOWovo29-lkp@intel.com/ Signed-off-by: David Lechner <dlechner@baylibre.com> Link: https://msgid.link/r/20231218145348.339470-1-dlechner@baylibre.com Signed-off-by: Mark Brown <broonie@kernel.org>
2023-12-15spi: pl022: update description of internal_cs_control()Nam Cao1-1/+1
The arguments of internal_cs_control() was changed, but its description was not updated. Update the description to match the expected arguments. Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202312151816.munFeE4L-lkp@intel.com/ Signed-off-by: Nam Cao <namcao@linutronix.de> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Link: https://msgid.link/r/4036d8d5845c04179f330f83e825a3921aa50c5a.1702639801.git.namcao@linutronix.de Signed-off-by: Mark Brown <broonie@kernel.org>
2023-12-15spi: pl022: delete description of cur_msgNam Cao1-1/+0
The variable cur_msg was removed, but its description is left behind. Delete this description. Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202312151816.munFeE4L-lkp@intel.com/ Signed-off-by: Nam Cao <namcao@linutronix.de> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Link: https://msgid.link/r/f06a9b6eac184cc648ae7444c480add6da87a84d.1702639801.git.namcao@linutronix.de Signed-off-by: Mark Brown <broonie@kernel.org>
2023-12-14spi: atmel: Fix clock issue when using devices with different polaritiesLouis Chauvet1-1/+81
The current Atmel SPI controller driver (v2) behaves incorrectly when using two SPI devices with different clock polarities and GPIO CS. When switching from one device to another, the controller driver first enables the CS and then applies whatever configuration suits the targeted device (typically, the polarities). The side effect of such order is the apparition of a spurious clock edge after enabling the CS when the clock polarity needs to be inverted wrt. the previous configuration of the controller. This parasitic clock edge is problematic when the SPI device uses that edge for internal processing, which is perfectly legitimate given that its CS was asserted. Indeed, devices such as HVS8080 driven by driver gpio-sr in the kernel are shift registers and will process this first clock edge to perform a first register shift. In this case, the first bit gets lost and the whole data block that will later be read by the kernel is all shifted by one. Current behavior: The actual switching of the clock polarity only occurs after the CS when the controller sends the first message: CLK ------------\ /-\ /-\ | | | | | . . . \---/ \-/ \ CS -----\ | \------------------ ^ ^ ^ | | | | | Actual clock of the message sent | | | Change of clock polarity, which occurs with the first | write to the bus. This edge occurs when the CS is | already asserted, and can be interpreted as | the first clock edge by the receiver. | GPIO CS toggle This issue is specific to this controller because while the SPI core performs the operations in the right order, the controller however does not. In practice, the controller only applies the clock configuration right before the first transmission. So this is not a problem when using the controller's dedicated CS, as the controller does things correctly, but it becomes a problem when you need to change the clock polarity and use an external GPIO for the CS. One possible approach to solve this problem is to send a dummy message before actually activating the CS, so that the controller applies the clock polarity beforehand. New behavior: CLK ------\ /-\ /-\ /-\ /-\ | | | ... | | | | ... | | \------/ \- -/ \------/ \- -/ \------ CS -\/-----------------------\ || | \/ \--------------------- ^ ^ ^ ^ ^ | | | | | | | | | Expected clock cycles when | | | | sending the message | | | | | | | Actual GPIO CS activation, occurs inside | | | the driver | | | | | Dummy message, to trigger clock polarity | | reconfiguration. This message is not received and | | processed by the device because CS is low. | | | Change of clock polarity, forced by the dummy message. This | time, the edge is not detected by the receiver. | This small spike in CS activation is due to the fact that the spi-core activates the CS gpio before calling the driver's set_cs callback, which deactivates this gpio again until the clock polarity is correct. To avoid having to systematically send a dummy packet, the driver keeps track of the clock's current polarity. In this way, it only sends the dummy packet when necessary, ensuring that the clock will have the correct polarity when the CS is toggled. There could be two hardware problems with this patch: 1- Maybe the small CS activation peak can confuse SPI devices 2- If on a design, a single wire is used to select two devices depending on its state, the dummy message may disturb them. Fixes: 5ee36c989831 ("spi: atmel_spi update chipselect handling") Cc: <stable@vger.kernel.org> Signed-off-by: Louis Chauvet <louis.chauvet@bootlin.com> Link: https://msgid.link/r/20231204154903.11607-1-louis.chauvet@bootlin.com Signed-off-by: Mark Brown <broonie@kernel.org>
2023-12-13spi: dw: Remove Intel Thunder Bay SOC supportNandhini Srikandan1-1/+0
Remove Intel Thunder Bay specific code as the product got cancelled and there are no end customers or users. Signed-off-by: Nandhini Srikandan <nandhini.srikandan@intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://msgid.link/r/20231213060836.29203-2-nandhini.srikandan@intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2023-12-12spi: sh-msiof: Enforce fixed DTDL for R-Car H3Wolfram Sang1-0/+17
Documentation says only DTDL of 200 is allowed for this SoC. Fixes: 4286db8456f4 ("spi: sh-msiof: Add R-Car Gen 2 and 3 fallback bindings") Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://msgid.link/r/20231212081239.14254-1-wsa+renesas@sang-engineering.com Signed-off-by: Mark Brown <broonie@kernel.org>
2023-12-11spi: pl022: clean up some unused variablesMark Brown1-9/+0
Merge series from Nam Cao <namcao@linutronix.de>: The driver was refactored in 9b2ef250b31d ("spi: spl022: switch to use default spi_transfer_one_message()"), and some variables are now unused because of that. Clean them up.
2023-12-11spi: ljca: switch to use devm_spi_alloc_host()Yang Yingliang1-1/+1
Switch to use modern name function devm_spi_alloc_host(). No functional changed. Signed-off-by: Yang Yingliang <yangyingliang@huawei.com> Link: https://msgid.link/r/20231128093031.3707034-27-yangyingliang@huawei.com Signed-off-by: Mark Brown <broonie@kernel.org>
2023-12-11spi: cs42l43: switch to use devm_spi_alloc_host()Yang Yingliang1-1/+1
Switch to use modern name function devm_spi_alloc_host(). No functional changed. Signed-off-by: Yang Yingliang <yangyingliang@huawei.com> Link: https://msgid.link/r/20231128093031.3707034-26-yangyingliang@huawei.com Signed-off-by: Mark Brown <broonie@kernel.org>
2023-12-11spi: zynqmp-gqspi: switch to use modern nameYang Yingliang1-25/+25
Change legacy name master/slave to modern name host/target or controller. No functional changed. Signed-off-by: Yang Yingliang <yangyingliang@huawei.com> Link: https://msgid.link/r/20231128093031.3707034-25-yangyingliang@huawei.com Signed-off-by: Mark Brown <broonie@kernel.org>
2023-12-11spi: zynq-qspi: switch to use modern nameYang Yingliang1-14/+14
Change legacy name master/slave to modern name host/target or controller. No functional changed. Signed-off-by: Yang Yingliang <yangyingliang@huawei.com> Link: https://msgid.link/r/20231128093031.3707034-24-yangyingliang@huawei.com Signed-off-by: Mark Brown <broonie@kernel.org>
2023-12-11spi: xtensa-xtfpga: switch to use modern nameYang Yingliang1-15/+15
Change legacy name master to modern name host or controller. No functional changed. Signed-off-by: Yang Yingliang <yangyingliang@huawei.com> Link: https://msgid.link/r/20231128093031.3707034-23-yangyingliang@huawei.com Signed-off-by: Mark Brown <broonie@kernel.org>
2023-12-11spi: xlp: switch to use modern nameYang Yingliang1-20/+20
Change legacy name master/slave to modern name host/target or controller. No functional changed. Signed-off-by: Yang Yingliang <yangyingliang@huawei.com> Link: https://msgid.link/r/20231128093031.3707034-22-yangyingliang@huawei.com Signed-off-by: Mark Brown <broonie@kernel.org>
2023-12-11spi: xilinx: switch to use modern nameYang Yingliang1-29/+29
Change legacy name master/slave to modern name host/target or controller. No functional changed. Signed-off-by: Yang Yingliang <yangyingliang@huawei.com> Link: https://msgid.link/r/20231128093031.3707034-21-yangyingliang@huawei.com Signed-off-by: Mark Brown <broonie@kernel.org>
2023-12-11spi: xcomm: switch to use modern nameYang Yingliang1-16/+16
Change legacy name master to modern name host or controller. No functional changed. Signed-off-by: Yang Yingliang <yangyingliang@huawei.com> Link: https://msgid.link/r/20231128093031.3707034-20-yangyingliang@huawei.com Signed-off-by: Mark Brown <broonie@kernel.org>
2023-12-11spi: uniphier: switch to use modern nameYang Yingliang1-97/+97
Change legacy name master to modern name host or controller. No functional changed. Signed-off-by: Yang Yingliang <yangyingliang@huawei.com> Link: https://msgid.link/r/20231128093031.3707034-19-yangyingliang@huawei.com Signed-off-by: Mark Brown <broonie@kernel.org>
2023-12-11spi: topcliff-pch: switch to use modern nameYang Yingliang1-113/+113
Change legacy name master to modern name host or controller. No functional changed. Signed-off-by: Yang Yingliang <yangyingliang@huawei.com> Link: https://msgid.link/r/20231128093031.3707034-18-yangyingliang@huawei.com Signed-off-by: Mark Brown <broonie@kernel.org>
2023-12-11spi: wpcm-fiu: switch to use devm_spi_alloc_host()Yang Yingliang1-1/+1
Switch to use modern name function devm_spi_alloc_host(). No functional changed. Signed-off-by: Yang Yingliang <yangyingliang@huawei.com> Link: https://msgid.link/r/20231128093031.3707034-17-yangyingliang@huawei.com Signed-off-by: Mark Brown <broonie@kernel.org>
2023-12-11spi: spi-ti-qspi: switch to use modern nameYang Yingliang1-44/+44
Change legacy name master to modern name host or controller. No functional changed. Signed-off-by: Yang Yingliang <yangyingliang@huawei.com> Link: https://msgid.link/r/20231128093031.3707034-16-yangyingliang@huawei.com Signed-off-by: Mark Brown <broonie@kernel.org>
2023-12-11spi: tegra210-quad: switch to use modern nameYang Yingliang1-40/+40
Change legacy name master to modern name host or controller. No functional changed. Signed-off-by: Yang Yingliang <yangyingliang@huawei.com> Link: https://msgid.link/r/20231128093031.3707034-15-yangyingliang@huawei.com Signed-off-by: Mark Brown <broonie@kernel.org>
2023-12-11spi: tegra20-slink: switch to use modern nameYang Yingliang1-49/+49
Change legacy name master/slave to modern name host/target or controller. No functional changed. Signed-off-by: Yang Yingliang <yangyingliang@huawei.com> Link: https://msgid.link/r/20231128093031.3707034-14-yangyingliang@huawei.com Signed-off-by: Mark Brown <broonie@kernel.org>
2023-12-11spi: tegra20-sflash: switch to use modern nameYang Yingliang1-38/+38
Change legacy name master to modern name host or controller. No functional changed. Signed-off-by: Yang Yingliang <yangyingliang@huawei.com> Link: https://msgid.link/r/20231128093031.3707034-13-yangyingliang@huawei.com Signed-off-by: Mark Brown <broonie@kernel.org>
2023-12-11spi: tegra114: switch to use modern nameYang Yingliang1-59/+59
Change legacy name master/slave to modern name host/target or controller. No functional changed. Signed-off-by: Yang Yingliang <yangyingliang@huawei.com> Link: https://msgid.link/r/20231128093031.3707034-12-yangyingliang@huawei.com Signed-off-by: Mark Brown <broonie@kernel.org>
2023-12-11spi: geni-qcom: switch to use modern nameYang Yingliang1-48/+48
Change legacy name master/slave to modern name host/target or controller. No functional changed. Signed-off-by: Yang Yingliang <yangyingliang@huawei.com> Link: https://msgid.link/r/20231128093031.3707034-11-yangyingliang@huawei.com Signed-off-by: Mark Brown <broonie@kernel.org>
2023-12-11spi: synquacer: switch to use modern nameYang Yingliang1-41/+41
Change legacy name master to modern name host or controller. No functional changed. Signed-off-by: Yang Yingliang <yangyingliang@huawei.com> Link: https://msgid.link/r/20231128093031.3707034-10-yangyingliang@huawei.com Signed-off-by: Mark Brown <broonie@kernel.org>
2023-12-11spi: sunplus-sp7021: switch to use modern nameYang Yingliang1-44/+44
Change legacy name master/slave to modern name host/target or controller. No functional changed. Signed-off-by: Yang Yingliang <yangyingliang@huawei.com> Link: https://msgid.link/r/20231128093031.3707034-9-yangyingliang@huawei.com Signed-off-by: Mark Brown <broonie@kernel.org>
2023-12-11spi: sun6i: switch to use modern nameYang Yingliang1-74/+74
Change legacy name master to modern name host or controller. No functional changed. Signed-off-by: Yang Yingliang <yangyingliang@huawei.com> Link: https://msgid.link/r/20231128093031.3707034-8-yangyingliang@huawei.com Signed-off-by: Mark Brown <broonie@kernel.org>
2023-12-11spi: sun4i: switch to use modern nameYang Yingliang1-36/+36
Change legacy name master to modern name host or controller. No functional changed. Signed-off-by: Yang Yingliang <yangyingliang@huawei.com> Link: https://msgid.link/r/20231128093031.3707034-7-yangyingliang@huawei.com Signed-off-by: Mark Brown <broonie@kernel.org>
2023-12-11spi: stm32: switch to use modern nameYang Yingliang1-20/+20
Change legacy name master/slave to modern name host/target. No functional changed. Signed-off-by: Yang Yingliang <yangyingliang@huawei.com> Link: https://msgid.link/r/20231128093031.3707034-6-yangyingliang@huawei.com Signed-off-by: Mark Brown <broonie@kernel.org>
2023-12-11spi: stm32-qspi: switch to use modern nameYang Yingliang1-9/+9
Change legacy name master to modern name host or controller. No functional changed. Signed-off-by: Yang Yingliang <yangyingliang@huawei.com> Link: https://msgid.link/r/20231128093031.3707034-5-yangyingliang@huawei.com Signed-off-by: Mark Brown <broonie@kernel.org>
2023-12-11spi: st-ssc4: switch to use modern nameYang Yingliang1-35/+35
Change legacy name master/slave to modern name host/target or controller. No functional changed. Signed-off-by: Yang Yingliang <yangyingliang@huawei.com> Link: https://msgid.link/r/20231128093031.3707034-4-yangyingliang@huawei.com Signed-off-by: Mark Brown <broonie@kernel.org>
2023-12-11spi: sprd: switch to use modern nameYang Yingliang1-2/+2
Change legacy name master to modern name host or controller. No functional changed. Signed-off-by: Yang Yingliang <yangyingliang@huawei.com> Link: https://msgid.link/r/20231128093031.3707034-3-yangyingliang@huawei.com Signed-off-by: Mark Brown <broonie@kernel.org>
2023-12-11spi: sprd-adi: switch to use spi_alloc_host()Yang Yingliang1-1/+1
Switch to use modern name function spi_alloc_host(). No functional changed. Signed-off-by: Yang Yingliang <yangyingliang@huawei.com> Link: https://msgid.link/r/20231128093031.3707034-2-yangyingliang@huawei.com Signed-off-by: Mark Brown <broonie@kernel.org>
2023-12-11spi: pl022: delete unused next_msg_cs_active in struct pl022Nam Cao1-5/+0
The member next_msg_cs_active of struct pl022 is not used anywhere. Delete it. Signed-off-by: Nam Cao <namcao@linutronix.de> Link: https://msgid.link/r/424fec01a75f6a881edcce189ac68b3408b62f29.1702298527.git.namcao@linutronix.de Signed-off-by: Mark Brown <broonie@kernel.org>
2023-12-11spi: pl022: delete unused cur_gpiod in struct pl022Nam Cao1-4/+0
The member cur_gpiod of struct pl022 is not used anywhere. Delete it. Signed-off-by: Nam Cao <namcao@linutronix.de> Link: https://msgid.link/r/7618c9d714aa1c16c7cb06f9d1fb1c074d1d9c65.1702298527.git.namcao@linutronix.de Signed-off-by: Mark Brown <broonie@kernel.org>
2023-12-10spi: spi-imx: correctly configure burst length when using dmaBenjamin Bigler1-4/+11
If DMA is used, burst length should be set to the bus width of the DMA. Otherwise, the SPI hardware will transmit/receive one word per DMA request. Since this issue affects both transmission and reception, it cannot be detected with a loopback test. Replace magic numbers 512 and 0xfff with MX51_ECSPI_CTRL_MAX_BURST. Reported-by Stefan Bigler <linux@bigler.io> Signed-off-by: Benjamin Bigler <benjamin@bigler.one> Fixes: 15a6af94a277 ("spi: Increase imx51 ecspi burst length based on transfer length") Link: https://lore.kernel.org/r/8a415902c751cdbb4b20ce76569216ed@mail.infomaniak.com Link: https://lore.kernel.org/r/20231209222338.5564-1-benjamin@bigler.one Signed-off-by: Mark Brown <broonie@kernel.org>
2023-12-08spi: mpc52xx: explicitly include linux/platform_device.hRandy Dunlap1-0/+1
Since linux/of_platform.h had included linux/platform_device.h and since that inclusion was removed, this driver now needs to include the latter header file explicitly to prevent build errors: drivers/spi/spi-mpc52xx.c: In function 'mpc52xx_spi_probe': drivers/spi/spi-mpc52xx.c:396:20: error: invalid use of undefined type 'struct platform_device' and more like that. Fixes: 0d18bcdebb2f ("of: Stop circularly including of_device.h and of_platform.h") Signed-off-by: Randy Dunlap <rdunlap@infradead.org> Cc: Rob Herring <robh@kernel.org> Cc: Mark Brown <broonie@kernel.org> Cc: linux-spi@vger.kernel.org Link: https://lore.kernel.org/r/20231208185927.14124-1-rdunlap@infradead.org Signed-off-by: Mark Brown <broonie@kernel.org>
2023-12-07spi: Add support for stacked/parallel memoriesMark Brown1-42/+217
Merge series from Amit Kumar Mahapatra <amit.kumar-mahapatra@amd.com>: This patch series adds support to the SPI framework for using multiple chip selects.
2023-12-07spi: Add multi-cs memories support in SPI coreAmit Kumar Mahapatra1-42/+217
AMD-Xilinx GQSPI controller has two advanced mode that allows the controller to consider two flashes as one single device. One of these two mode is the parallel mode in which each byte of data is stored in both devices, the even bits in the lower flash & the odd bits in the upper flash. The byte split is automatically handled by the QSPI controller. The other mode is the stacked mode in which both the flashes share the same SPI bus but each of the device contain half of the data. In this mode, the controller does not follow CS requests but instead internally wires the two CS levels with the value of the most significant address bit. For supporting both these modes SPI core need to be updated for providing multiple CS for a single SPI device. For adding multi CS support the SPI device need to be aware of all the CS values. So, the "chip_select" member in the spi_device structure is now an array that holds all the CS values. spi_device structure now has a "cs_index_mask" member. This acts as an index to the chip_select array. If nth bit of spi->cs_index_mask is set then the driver would assert spi->chip_select[n]. In parallel mode all the chip selects are asserted/de-asserted simultaneously and each byte of data is stored in both devices, the even bits in one, the odd bits in the other. The split is automatically handled by the GQSPI controller. The GQSPI controller supports a maximum of two flashes connected in parallel mode. A SPI_CONTROLLER_MULTI_CS flag bit is added in the spi controller flags, through ctlr->flags the spi core will make sure that the controller is capable of handling multiple chip selects at once. For supporting multiple CS via GPIO the cs_gpiod member of the spi_device structure is now an array that holds the gpio descriptor for each chipselect. CS GPIO is not tested on our hardware, but it has been tested by @Stefan https://lore.kernel.org/all/005001da1efc$619ad5a0$24d080e0$@opensource.cirrus.com/ Signed-off-by: Amit Kumar Mahapatra <amit.kumar-mahapatra@amd.com> Tested-by: Stefan Binding <sbinding@opensource.cirrus.com> Link: https://lore.kernel.org/r/20231125092137.2948-4-amit.kumar-mahapatra@amd.com Signed-off-by: Mark Brown <broonie@kernel.org>
2023-12-06spi: axi-spi-engine: improvements round 2Mark Brown1-39/+77
Merge series from David Lechner <dlechner@baylibre.com>: We are working towards adding support for the offload feature [1] of the AXI SPI Engine IP core. Before we can do that, we want to make some general fixes and improvements to the driver. In order to avoid a giant series with 35+ patches, we are splitting this up into a few smaller series. This is a continuation of the work started in [2] which has been applied to spi/for-6.8 [3]. This series must be applied on top of that series to apply cleanly. Once this series is applied, we will follow up with the 3rd series that implements the offload support. The offload support will also involve the IIO subsystem (a new IIO driver will depend on the new SPI offload feature), so I'm mentioning this now in case we want to do anything ahead of time to prepare for that (e.g. putting all of these changes on a separate branch). [1]: https://wiki.analog.com/resources/fpga/peripherals/spi_engine/offload [2]: https://lore.kernel.org/linux-spi/20231117-axi-spi-engine-series-1-v1-0-cc59db999b87@baylibre.com/ [3]: https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git/log/?h=for-6.8
2023-12-06spi: cadence: revert "Add SPI transfer delays"Nam Cao1-1/+0
The commit 855a40cd8ccc ("spi: cadence: Add SPI transfer delays") adds a delay after each transfer into the driver's transfer_one(). However, the delay is already done in SPI core. So this commit unnecessarily doubles the delay amount. Revert this commit. Signed-off-by: Nam Cao <namcao@linutronix.de> Link: https://lore.kernel.org/r/20231206145233.74982-1-namcao@linutronix.de Signed-off-by: Mark Brown <broonie@kernel.org>
2023-12-06spi: axi-spi-engine: add watchdog timerDavid Lechner1-3/+26
If there is an issue with the AXI SPI Engine hardware a scheduled transfer might never be completed and spi_sync() will block forever. This due to the uninterruptible wait for completion waiting for the spi_finalize_current_message() that never comes. Add a watchdog timer that will abort a transfer 5 seconds after it has been started. This will potentially leave the hardware in a broken state but it allows software to recover and allow to better diagnose the underlying issue. Co-developed-by: Lars-Peter Clausen <lars@metafoo.de> Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Signed-off-by: David Lechner <dlechner@baylibre.com> Acked-by: Michael Hennerich <michael.hennerich@analog.com> Acked-by: Nuno Sa <nuno.sa@analog.com> Link: https://lore.kernel.org/r/20231204-axi-spi-engine-series-2-v1-9-063672323fce@baylibre.com Signed-off-by: Mark Brown <broonie@kernel.org>
2023-12-06spi: axi-spi-engine: remove delay from CS assertionDavid Lechner1-1/+1
Now that the AXI SPI Engine driver has support for the various CS delays requested through struct spi_message, we don't need to add a separate delay to the CS assertion instruction. Otherwise, we end up with longer than requested delays. Signed-off-by: David Lechner <dlechner@baylibre.com> Acked-by: Michael Hennerich <michael.hennerich@analog.com> Acked-by: Nuno Sa <nuno.sa@analog.com> Link: https://lore.kernel.org/r/20231204-axi-spi-engine-series-2-v1-8-063672323fce@baylibre.com Signed-off-by: Mark Brown <broonie@kernel.org>
2023-12-06spi: axi-spi-engine: restore clkdiv at end of messageDavid Lechner1-1/+9
This modifies the ADI AXI SPI Engine driver to restore the clkdiv configuration register at the end of a SPI message. Having the clkdiv in a known state is needed to be able to add a new command in the future that only performs a delay without any SPI transfers. Furthermore having that state be the smallest possible divider will allow these delays to have the highest possible precision. Changing the initial value of clk_div from -1 to 1 is now possible because we know the function will always be called with a known clkdiv config register state. Making this change will also have the effect of not emitting a clkdiv configuration register instruction in cases where the maximum sclk rate is used. Having one less instruction to process reduces delays on the bus which will be beneficial when we implement offload support to enable reading data from devices at very high rates. Signed-off-by: David Lechner <dlechner@baylibre.com> Acked-by: Michael Hennerich <michael.hennerich@analog.com> Acked-by: Nuno Sa <nuno.sa@analog.com> Link: https://lore.kernel.org/r/20231204-axi-spi-engine-series-2-v1-7-063672323fce@baylibre.com Signed-off-by: Mark Brown <broonie@kernel.org>
2023-12-06spi: axi-spi-engine: implement xfer->cs_change_delayDavid Lechner1-0/+4
This adds handling of xfer->cs_change_delay to the AXI SPI Engine driver. Signed-off-by: David Lechner <dlechner@baylibre.com> Acked-by: Michael Hennerich <michael.hennerich@analog.com> Acked-by: Nuno Sa <nuno.sa@analog.com> Link: https://lore.kernel.org/r/20231204-axi-spi-engine-series-2-v1-6-063672323fce@baylibre.com Signed-off-by: Mark Brown <broonie@kernel.org>
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