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path: root/drivers/pwm/pwm-lpc18xx-sct.c
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2022-04-20pwm: lpc18xx-sct: Initialize driver data and hardware before pwmchip_add()Uwe Kleine-König1-11/+9
[ Upstream commit 0401f24cd238ae200a23a13925f98de3d2c883b8 ] When a driver calls pwmchip_add() it has to be prepared to immediately get its callbacks called. So move allocation of driver data and hardware initialization before the call to pwmchip_add(). This fixes a potential NULL pointer exception and a race condition on register writes. Fixes: 841e6f90bb78 ("pwm: NXP LPC18xx PWM/SCT driver") Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Thierry Reding <thierry.reding@gmail.com> Signed-off-by: Sasha Levin <sashal@kernel.org>
2016-09-08pwm: lpc-18xx: use pwm_set_chip_dataoliver@schinagl.nl1-4/+8
The lpc-18xx driver currently manipulates the pwm_device struct directly rather than using the pwm_set_chip_data() function. While the current method may save a clock cycle or two, using the explicit function call makes it more obvious that data is set to the local chip data pointer. Signed-off-by: Olliver Schinagl <oliver@schinagl.nl> Reviewed-by: Ariel D'Alessandro <ariel@vanguardiasur.com.ar> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2016-05-17pwm: Use pwm_get/set_xxx() helpers where appropriateBoris Brezillon1-1/+1
Use pwm_get/set_xxx() helpers instead of directly accessing the pwm->xxx field. Doing that will ease adaptation of the PWM framework to support atomic update. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2016-03-23pwm: lpc18xx-sct: Test clock rate to avoid division by 0Wolfram Sang1-0/+5
The clk API may return 0 on clk_get_rate(), so we should check the result before using it as a divisor. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Acked-by: Joachim Eastwood <manabian@gmail.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2015-09-09pwm: NXP LPC18xx PWM/SCT driverAriel D'Alessandro1-0/+465
This commit adds support for NXP LPC18xx PWM/SCT. NXP LPC SoCs family, which includes LPC18xx/LPC43xx, provides a State Configurable Timer (SCT) which can be configured as a Pulse Width Modulator. Other SoCs in that family may share the same hardware. The PWM supports a total of 16 channels, but only 15 can be simultaneously requested. There's only one period, global to all the channels, thus PWM driver will refuse setting different values to it, unless there's only one channel requested. Signed-off-by: Ariel D'Alessandro <ariel@vanguardiasur.com.ar> [thierry.reding@gmail.com: remove excessive padding of fields] Signed-off-by: Thierry Reding <thierry.reding@gmail.com>