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path: root/drivers/pinctrl/pinctrl-sunxi.h
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2013-08-07pinctrl: sunxi: Add spinlocksMaxime Ripard1-0/+2
The current code use no locking at all, which is obviously not that great and can lead to concurrency issues, especially with the newer SMP SoCs from Allwinner. Add some locking where it's needed. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
2013-06-16pinctrl: sunxi: Add external interrupts supportMaxime Ripard1-0/+68
The port controller IP found in the Allwinner A10 and A13 can use few of the pins it manage as an interrupt source, called external interrupts in the datasheet. The number of these external interrupts are SoCs specific, but the current upper limit is 32. In order to work, the external interrupts' pins have to be muxed to a specific function to generate an interrupt. This patch adds the irqchip and the needed logic to use the PIO controller as an interrupt controller. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-02-01ARM: pinctrl: sunxi: Add the pinctrl pin set for Allwinner A10Maxime Ripard1-0/+68
Since the Allwinner SoCs variants don't have the same set of pins to handle, we need to declare the pin ranges available. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-01-30ARM: sunxi: gpio: Add Allwinner SoCs GPIO driversMaxime Ripard1-1/+24
The IP responsible for the muxing on the Allwinner SoCs are also handling the GPIOs on the system. This patch adds the needed driver that relies on the pinctrl driver for most of its operations. The number of pins available for GPIOs operations are already declared in the pinctrl driver, we only need to probe a generic driver to handle the banks available for each SoC. This driver has been tested on a A13-Olinuxino. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-01-22ARM: sunxi: Add pinctrl driver for Allwinner SoCsMaxime Ripard1-0/+387
The Allwinner SoCs have an IP module that handle both the muxing and the GPIOs. This IP has 8 banks of 32 bits, with a number of pins actually useful for each of these banks varying from one to another, and depending on the SoC used on the board. This driver only implements the pinctrl part, the gpio part will come eventually. Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>