summaryrefslogtreecommitdiff
path: root/drivers/pinctrl/pinctrl-sunxi-pins.h
AgeCommit message (Collapse)AuthorFilesLines
2014-05-04pinctrl: sunxi: Move the Allwinner pinctrl driver to its own directoryMaxime Ripard1-3937/+0
This will allow to create numerous files without crippling the main pinctrl directory. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2014-04-22pinctrl: sunxi: define A31 R_PIO pin functionsBoris BREZILLON1-0/+74
The A31 SoC provides both PL and PM pio bank through the R_PIO block. These pins all support gpio function and can bbe assigned to system peripherals (like TWI, P2WI, JTAG, ...) Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-02-25pinctrl-sunxi: Fix sun5i-a13 port F multiplexingHans de Goede1-6/+6
The correct value for selecting the mmc0 function on port F pins is 2 not 4, as per the data-sheet: http://dl.linux-sunxi.org/A13/A13%20Datasheet%20-%20v1.12%20%282012-03-29%29.pdf Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-01-08pinctrl: sunxi: Add Allwinner A20 clock output pin functionsChen-Yu Tsai1-0/+2
This patch adds the clock output pin functions on the A20. The 2 pins can output a configurable clock to be used by external modules. This is used on the CubieTruck, to supply a 32768 Hz low power clock to the onboard Wifi+BT module. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-08-23pinctrl: sunxi: Add Allwinner A20 pins setMaxime Ripard1-0/+1018
The Allwinner A20 is pin-compatible with the older A10, so the two pin set are quite similar. However, since the A20 has new features, we can't just use the A10 pin set as is, and we need to define our own for the A20. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Cc: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-08-23pinctrl: sunxi: Add Allwinner A31 pins setMaxime Ripard1-0/+820
The Allwinner A31 SoC uses the same IP than the one found in the A10/A13, with only different pins. Add the pins and the associated functions found in the A31. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Cc: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-08-23pinctrl: sunxi: Fix inconsistent indentationMaxime Ripard1-5/+5
Some pin functions in the array were not indented like the other functions in this array. Fix this. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Cc: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-17pinctrl: sunxi: Add Allwinner A10s pinsMaxime Ripard1-0/+645
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-17pinctrl: sunxi: Move the pins definitions to a separate headerMaxime Ripard1-0/+1378
It will allow us to have a cleaner separation between the data needed by the driver to work, and the core logic of the driver in itself, and will allow having too much noise in the core driver in the future. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>