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path: root/drivers/pinctrl/pinctrl-rockchip.c
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2014-05-09pinctrl: rockchip: base regmap supplied by a sysconHeiko Stübner1-19/+28
This allows the basic registers of the general register files to be supplied by a syscon instead of being mapped locally. The GRF registers contain a lot more than pinctrl functions like dma, usb-phy and general soc control and status registers, intermixed with the iomux, pull and drive-strength registers. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Tested-by: Max Schwarz <max.schwarz@online.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-05-09pinctrl: rockchip: only map bank0-pull-region when pmu regmap missingHeiko Stübner1-11/+19
When the pmu registers are supplied through a syscon regmap we do not need to map the registers ourself. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Tested-by: Max Schwarz <max.schwarz@online.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-05-09pinctrl: rockchip: let pmu registers be supplied by a sysconHeiko Stübner1-2/+15
Currently the pmu registers containing pin pull settings on the rk3188 are mapped locally when bank0 is instantiated. Add an alternative that can resolve the pmu from a syscon phandle. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Tested-by: Max Schwarz <max.schwarz@online.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-05-09pinctrl: rockchip: rockchip_pinctrl in rockchip_get_bank_dataHeiko Stübner1-8/+9
Convert rockchip_get_bank_data to use the struct rockchip_pinctrl because later on we need to check a value from it when registering the gpio banks. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Tested-by: Max Schwarz <max.schwarz@online.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-05-09pinctrl: rockchip: use regmaps instead of raw mappingsHeiko Stübner1-36/+80
This allows us to use syscons in the future. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Tested-by: Max Schwarz <max.schwarz@online.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-05-09pinctrl: rockchip: do not require 2nd register areaHeiko Stübner1-3/+12
Deprecate secondary register area for rk3188 pulls. Instead use big enough initial mapping of grf registers to catch all. The now deprecated register is still supported though. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Tested-by: Max Schwarz <max.schwarz@online.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-04-24pinctrl: rockchip: implement PIN_CONFIG_OUTPUT handlingHeiko Stübner1-0/+40
In some cases it is nice to be able to simply control a gpio output via the PIN_CONFIG_OUTPUT option without having a driver control it. Thus add support for it to the rockchip pinctrl driver. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-04-24pinctrl: rockchip: return a complete config in pinconf_getHeiko Stübner1-2/+5
Till now pinconf_get only set the argument value into the config parameter effectively removing the actual config param value. As other pinctrl drivers do, it might be nicer to keep the config param intact. Therefore construct a real pinconfig value from param and arg in pinconf_get Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-04-14pinctrl: rockchip: handle first half of rk3188-bank0 correctlyHeiko Stübner1-0/+14
The first half of pinbank 0 only has one muxing function (as gpios) and does not have a special mux-register. Therefore ensure that no other mux function can be selected and also do not write to a non-existent register. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-04-14pinctrl: rockchip: add return value to rockchip_set_muxHeiko Stübner1-7/+25
In a following change, rockchip_set_mux gets the possibility to fail. Therefore add a return value to it and honor error codes in functions using rockchip_set_mux. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-04-14pinctrl: rockchip: fix offset of mux registers for rk3188Beniamino Galvani1-1/+1
The correct value of .mux_offset for rk3188 seems to be 0x60 instead of 0x68. Heiko adds: GPIO0 only has the second two IOMUX registers: - GRF_GPIO0C_IOMUX at 0x68 - GRF_GPIO0D_IOMUX at 0x6c which I guess is where my mistake comes from. It looks like there does no iomux register exist at all for the first 16 pins. In any case, the current number is wrong, and the 0x60 offset is the correct one, but I guess we need to determine what the affected pins do - do they always have a gpio mux or such? Signed-off-by: Beniamino Galvani <b.galvani@gmail.com> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-11-25pinctrl: rockchip: missing unlock on error in rockchip_set_pull()Dan Carpenter1-0/+1
We need to unlock here before returning -EINVAL. Fixes: 6ca5274d1d12 ('pinctrl: rockchip: add rk3188 specifics') Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Acked-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-11-25pinctrl: rockchip: testing the wrong variableDan Carpenter1-2/+2
There is a copy and paste bug so we test "info->reg_base" instead of "info->reg_pull". Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Acked-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-10-16pinctrl: rockchip: emulate both edge triggered interruptsHeiko Stübner1-7/+54
The gpio interrupt controller on Rockchip socs can do edge triggers only for single edges but not both. Nevertheless a lot of gpio users rely on the availability of both-edge triggered interrupts - i.e. gpio-keys. Therefore implement a solution similar to pinctrl-coh901 re-setting the triggering edge depending on the gpio value in the interrupt demuxer. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-10-16pinctrl: rockchip: add rk3188 specificsHeiko Stübner1-7/+112
Besides the pull registers sitting in a separate place, the rk3188 also has the peculiarity that the pull registers of the first bank are split and the first half is sitting in the register space of the pmu. Therefore this adds a special bank-type for the first bank, to handle the two register sources. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-10-16pinctrl: rockchip: remove redundant checkHeiko Stübner1-6/+0
The check limiting bias options to supported ones is already done thru rockchip_pinconf_pull_valid. Therefore this check is redundant and can be removed. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-10-16pinctrl: rockchip: add support for multiple bank typesHeiko Stübner1-3/+14
There are Rockchip SoCs, namely the rk3188, that combine a set of regular banks with banks that need special handling for some settings. Therefore add the possibility for the driver to handle more than one bank type. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-10-16pinctrl: rockchip: separate different sub-types moreHeiko Stübner1-48/+57
Further investigation of the different Rockchip SoCs showed that the differences especially in the pull settings are quite deep. As further patches will show, the register layout for the pulls of the rk3188 is quite strange. Also it is to assume, that later Rockchip SoCs may introduce even more quirks in this regard, making it hard to support all of those using the current generic pull_* variables. Therefore move the driver to hold the type of controller in an enum and do the handling according to it in the necessary places. Also instead of calculating the register in the get and set pull functions move it to a type-specific callback. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-08-29pinctrl: rockchip: Implement .request() and .free() callbacksAxel Lin1-0/+12
Implement .request() and .free() callbacks on the GPIO chips to inform pinctrl when a GPIO is requested or freed. Signed-off-by: Axel Lin <axel.lin@ingics.com> Tested-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-08-28pinctrl: Pass all configs to driver on pin_config_set()Sherman Yin1-22/+35
When setting pin configuration in the pinctrl framework, pin_config_set() or pin_config_group_set() is called in a loop to set one configuration at a time for the specified pin or group. This patch 1) removes the loop and 2) changes the API to pass the whole pin config array to the driver. It is now up to the driver to loop through the configs. This allows the driver to potentially combine configs and reduce the number of writes to pin config registers. All c files changed have been build-tested to verify the change compiles and that the corresponding .o is successfully generated. Signed-off-by: Sherman Yin <syin@broadcom.com> Reviewed-by: Christian Daudt <csd@broadcom.com> Reviewed-by: Matt Porter <matt.porter@linaro.org> Tested-by: Stephen Warren <swarren@nvidia.com> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-08-28pinctrl: rockchip: Simplify pin_to_bank equationAxel Lin1-2/+1
If (b->pin_base + b->nr_pins - 1) < pin is true, pin >= b->pin_base is always true because b->nr_pins is never less than 0. Thus this patch simplify the equation. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-08-28pinctrl: rockchip: Remove of_match_ptr macro for DT only driverAxel Lin1-1/+1
This is a DT only driver and rockchip_pinctrl_dt_match is always compiled in. Thus remove of_match_ptr macro. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-08-23pinctrl: rockchip: Simplify for loop iterationAxel Lin1-15/+6
Just return once a match found makes the code simpler and shorter. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-08-08drivers/pinctrl: don't check resource with devm_ioremap_resourceWolfram Sang1-5/+0
devm_ioremap_resource does sanity checks on the given resource. No need to duplicate this in the driver. Signed-off-by: Wolfram Sang <wsa@the-dreams.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-08-08pinctrl: rockchip: include correct clk headerHeiko Stübner1-1/+1
The correct header to include for clock handling is clk.h . clk-provider.h should not be used in simple clock consumers. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-24pinctrl: rockchip: Add missing irq_gc_unlock() call before return errorAxel Lin1-0/+1
Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-17pinctrl: rockchip: correctly handle arguments of pinconf optionsHeiko Stübner1-4/+37
Change the rockchip pinctrl driver to handle the arguments to the pull pinconfig options correctly. So only accept non-0 values for the pull options as the rockchip pin-controller can only turn pulls on and off (this via BIAS_DISABLE). Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-16pinctrl: add pinctrl driver for Rockchip SoCsHeiko Stübner1-0/+1360
This driver adds support the Cortex-A9 based SoCs from Rockchip, so at least the RK2928, RK3066 (a and b) and RK3188. Earlier Rockchip SoCs seem to use similar mechanics for gpio handling so should be supportable with relative small changes. Pull handling on the rk3188 is currently a stub, due to it being a bit different to the earlier SoCs. Pinmuxing as well as gpio (and interrupt-) handling tested on a rk3066a based machine. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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