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2017-11-16Merge tag 'pinctrl-v4.15-1' of ↵Linus Torvalds1-18/+14
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl Pull pin control updates from Linus Walleij: "This is the bulk of pin control changes for the v4.15 kernel cycle: Core: - The pin control Kconfig entry PINCTRL is now turned into a menuconfig option. This obviously has the implication of making the subsystem menu visible in menuconfig. This is happening because of two things: (a) Intel have started to deploy and depend on pin controllers in a way that is affecting users directly. This happens on the highly integrated laptop chipsets named after geographical places: baytrail, broxton, cannonlake, cedarfork, cherryview, denverton, geminilake, lewisburg, merrifield, sunrisepoint... It started a while back and now it is ever more evident that this is crucial infrastructure for x86 laptops and not an embedded obscurity anymore. Users need to be aware. (b) Pin control expanders on I2C and SPI that are arch-agnostic. Currently Semtech SX150X and Microchip MCP28x08 but more are expected. Users will have to be able to configure these in directly for their set-up. - Just go and select GPIOLIB now that we made sure that GPIOLIB is a very vanilla subsystem. Do not depend on it, if we need it, select it. - Exposing the pin control subsystem in menuconfig uncovered a bunch of obscure bugs that are now hopefully fixed, all more or less pertaining to Blackfin. - Unified namespace for cross-calls between pin control and GPIO. - New support for clock skew/delay generic DT bindings and generic pin config options for this. - Minor documentation improvements. Various: - The Renesas SH-PFC pin controller has evolved a lot. It seems Renesas are churning out new SoCs by the minute. - A bunch of non-critical fixes for the Rockchip driver. - Improve the use of library functions instead of open coding. - Support the MCP28018 variant in the MCP28x08 driver. - Static constifying" * tag 'pinctrl-v4.15-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (91 commits) pinctrl: gemini: Fix missing pad descriptions pinctrl: Add some depends on HAS_IOMEM pinctrl: samsung/s3c24xx: add CONFIG_OF dependency pinctrl: gemini: Fix GMAC groups pinctrl: qcom: spmi-gpio: Add pmi8994 gpio support pinctrl: ti-iodelay: remove redundant unused variable dev pinctrl: max77620: Use common error handling code in max77620_pinconf_set() pinctrl: gemini: Implement clock skew/delay config pinctrl: gemini: Use generic DT parser pinctrl: Add skew-delay pin config and bindings pinctrl: armada-37xx: Add edge both type gpio irq support pinctrl: uniphier: remove eMMC hardware reset pin-mux pinctrl: rockchip: Add iomux-route switching support for rk3288 pinctrl: intel: Add Intel Cedar Fork PCH pin controller support pinctrl: intel: Make offset to interrupt status register configurable pinctrl: sunxi: Enforce the strict mode by default pinctrl: sunxi: Disable strict mode for old pinctrl drivers pinctrl: sunxi: Introduce the strict flag pinctrl: sh-pfc: Save/restore registers for PSCI system suspend pinctrl: sh-pfc: r8a7796: Use generic IOCTRL register description ...
2017-11-14pinctrl: Add some depends on HAS_IOMEMLinus Walleij1-0/+2
Some compilation fallout from UM Linux (which does not have IOMEM) makes it necessary to depend on HAS_IOMEM for drivers that doesn't have other factors restricting their selection. Cc: Phil Reid <preid@electromag.com.au> Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk> Reported-by: R. Daneel Olivaw <kbuild-all@01.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-11-08pinctrl: gemini: Use generic DT parserLinus Walleij1-0/+1
We can just use the generic Device Tree parser code in this driver and save some code. Acked-by: Hans Ulli Kroll <ulli.kroll@googlemail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-10-19pinctrl: adi2: Fix Kconfig build problemLinus Walleij1-1/+2
The build robot is complaining on Blackfin: drivers/pinctrl/pinctrl-adi2.c: In function 'port_setup': >> drivers/pinctrl/pinctrl-adi2.c:221:21: error: dereferencing pointer to incomplete type 'struct gpio_port_t' writew(readw(&regs->port_fer) & ~BIT(offset), ^~ drivers/pinctrl/pinctrl-adi2.c: In function 'adi_gpio_ack_irq': >> drivers/pinctrl/pinctrl-adi2.c:266:18: error: dereferencing pointer to incomplete type 'struct bfin_pint_regs' if (readl(&regs->invert_set) & pintbit) ^~ It seems the driver need to include <asm/gpio.h> and <asm/irq.h> to compile. The Blackfin architecture was re-defining the Kconfig PINCTRL symbol which is not OK, so replaced this with PINCTRL_BLACKFIN_ADI2 which selects PINCTRL and PINCTRL_ADI2 just like most arches do. Further, the old GPIO driver symbol GPIO_ADI was possible to select at the same time as selecting PINCTRL. This was not working because the arch-local <asm/gpio.h> header contains an explicit #ifndef PINCTRL clause making compilation break if you combine them. The same is true for DEBUG_MMRS. Make sure the ADI2 pinctrl driver is not selected at the same time as the old GPIO implementation. (This should be converted to use gpiolib or pincontrol and move to drivers/...) Also make sure the old GPIO_ADI driver or DEBUG_MMRS is not selected at the same time as the new PINCTRL implementation, and only make PINCTRL_ADI2 selectable for the Blackfin families that actually have it. This way it is still possible to add e.g. I2C-based pin control expanders on the Blackfin. Cc: Steven Miao <realmz6@gmail.com> Cc: Huanhuan Feng <huanhuan.feng@analog.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-10-17pinctrl: meson: separate soc driversJerome Brunet1-10/+1
When meson pinctrl is enabled, all meson platforms pinctrl drivers are built in the kernel, with a significant amount of data. This leads to situation where pinctrl drivers targeting an architecture are also compiled and shipped on another one (ex: meson8 - ARM - compiled and shipped on ARM64 builds). This is a waste of memory we can easily avoid. This change makes 4 pinctrl drivers (1 per SoC) out the original single driver, allowing to compile and ship only the ones required. Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-10-12pinctrl: Do not depend in GPIOLIB, select itLinus Walleij1-2/+4
Instead of depends on GPIOLIB and having to run around in Kconfig menus looking for why your device is not available, simply select it from the pin control drivers that need it. The Kconfig for GPIOLIB is improved, selectable and this should "just work". Cc: Phil Reid <preid@electromag.com.au> Cc: Sebastian Reichel <sebastian.reichel@collabora.co.uk> Cc: Peter Rosin <peda@axentia.se> Cc: Andrey Smirnov <andrew.smirnov@gmail.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-10-11pinctrl: change Kconfig PINCTRL variable to a menuconfigPhil Reid1-5/+4
This allows PINCTRL to be selected manually to allow enabling of the mcp23s08 i2c/spi gpio driver. Which is not platform specific. Signed-off-by: Phil Reid <preid@electromag.com.au> Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-09-27pinctrl/amd: Fix build dependency on pinmux codePetr Mladek1-0/+1
The commit 79d2c8bede2c93f943 ("pinctrl/amd: save pin registers over suspend/resume") caused the following compilation errors: drivers/pinctrl/pinctrl-amd.c: In function ‘amd_gpio_should_save’: drivers/pinctrl/pinctrl-amd.c:741:8: error: ‘const struct pin_desc’ has no member named ‘mux_owner’ if (pd->mux_owner || pd->gpio_owner || ^ drivers/pinctrl/pinctrl-amd.c:741:25: error: ‘const struct pin_desc’ has no member named ‘gpio_owner’ if (pd->mux_owner || pd->gpio_owner || We need to enable CONFIG_PINMUX for this driver as well. Cc: stable@vger.kernel.org Fixes: 79d2c8bede2c93f943 ("pinctrl/amd: save pin registers over suspend/resume") Signed-off-by: Petr Mladek <pmladek@suse.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-09-07Merge tag 'mfd-next-4.14' of ↵Linus Torvalds1-0/+9
git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd Pull MFD updates from Lee Jones: "New Drivers - RK805 Power Management IC (PMIC) - ROHM BD9571MWV-M MFD Power Management IC (PMIC) - Texas Instruments TPS68470 Power Management IC (PMIC) & LEDs New Device Support: - Add support for HiSilicon Hi6421v530 to hi6421-pmic-core - Add support for X-Powers AXP806 to axp20x - Add support for X-Powers AXP813 to axp20x - Add support for Intel Sunrise Point LPSS to intel-lpss-pci New Functionality: - Amend API to provide register layout; atmel-smc Fix-ups: - DT re-work; omap, nokia - Header file location change {I2C => MFD}; dm355evm_msp, tps65010 - Fix chip ID formatting issue(s); rk808 - Optionally register touchscreen devices; da9052-core - Documentation improvements; twl-core - Constification; rtsx_pcr, ab8500-core, da9055-i2c, da9052-spi - Drop unnecessary static declaration; max8925-i2c - Kconfig changes (missing deps and remove module support) - Slim down oversized licence statement; hi6421-pmic-core - Use managed resources (devm_*); lp87565 - Supply proper error checking/handling; t7l66xb Bug Fixes: - Fix counter duplication issue; da9052-core - Fix potential NULL deference issue; max8998 - Leave SPI-NOR write-protection bit alone; lpc_ich - Ensure device is put into reset during suspend; intel-lpss - Correct register offset variable size; omap-usb-tll" * tag 'mfd-next-4.14' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd: (61 commits) mfd: intel_soc_pmic: Differentiate between Bay and Cherry Trail CRC variants mfd: intel_soc_pmic: Export separate mfd-cell configs for BYT and CHT dt-bindings: mfd: Add bindings for ZII RAVE devices mfd: omap-usb-tll: Fix register offsets mfd: da9052: Constify spi_device_id mfd: intel-lpss: Put I2C and SPI controllers into reset state on suspend mfd: da9055: Constify i2c_device_id mfd: intel-lpss: Add missing PCI ID for Intel Sunrise Point LPSS devices mfd: t7l66xb: Handle return value of clk_prepare_enable mfd: Add ROHM BD9571MWV-M PMIC DT bindings mfd: intel_soc_pmic_chtwc: Turn Kconfig option into a bool mfd: lp87565: Convert to use devm_mfd_add_devices() mfd: Add support for TPS68470 device mfd: lpc_ich: Do not touch SPI-NOR write protection bit on Haswell/Broadwell mfd: syscon: atmel-smc: Add helper to retrieve register layout mfd: axp20x: Use correct platform device ID for many PEK dt-bindings: mfd: axp20x: Introduce bindings for AXP813 mfd: axp20x: Add support for AXP813 PMIC dt-bindings: mfd: axp20x: Add AXP806 to supported list of chips mfd: Add ROHM BD9571MWV-M MFD PMIC driver ...
2017-08-31pinctrl: sprd: Add Spreadtrum pin control driverBaolin Wang1-0/+1
This patch adds the pin control driver for Spreadtrum SC9860 platform. Signed-off-by: Baolin Wang <baolin.wang@spreadtrum.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-08-21pinctrl: Add pinctrl driver for the RK805 PMICJoseph Chen1-0/+9
RK805 is one of Rockchip PMICs family, it has 2 output only GPIOs. This driver is also designed for other Rockchip PMICs to expend. Different PMIC maybe have different pin features, for example, RK816 has one pin which can be used for TS or GPIO(input/out). The mainly difference between PMICs pins are pinmux, direction and output value, that is 'struct rk805_pin_config'. Signed-off-by: Joseph Chen <chenjh@rock-chips.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2017-08-14pinctrl: add a Gemini SoC pin controllerLinus Walleij1-0/+7
This adds a pin control (only multiplexing) driver for the Gemini SoC so we can sort out this complex platform in an orderly manner. This driver will detect the chip/package version as SL3512 or SL3516 (also known as CS3512 and CS3516 etc) and register the apropriate pin set. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-06-29Merge tag 'sh-pfc-for-v4.13-tag2' of ↵Linus Walleij1-0/+11
git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel pinctrl: sh-pfc: Updates for v4.13 (take two) - Add SCIF1 and SCIF2 pin groups for R-Car V2H, - Add EtherAVB, DU parallel RGB output, and PWM pin groups for R-Car H3 ES2.0, - Add pin and gpio controller support for RZ/A1.
2017-06-23pinctrl: Renesas RZ/A1 pin and gpio controllerJacopo Mondi1-0/+11
Add combined gpio and pin controller driver for Renesas RZ/A1 r7s72100 SoC. Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-05-31pinctrl: mcp23s08: improve I2C Kconfig dependencyArnd Bergmann1-0/+1
With "SPI_MASTER=y && I2C=m", we can build mcp23s08 as a built-in driver, which then results in a link failure: drivers/pinctrl/built-in.o: In function `mcp23s08_probe_one.isra.0': :(.text+0x7910): undefined reference to `__devm_regmap_init_i2c' drivers/pinctrl/built-in.o: In function `mcp23s08_init': :(.init.text+0x110): undefined reference to `i2c_register_driver' drivers/pinctrl/built-in.o: In function `mcp23s08_exit': :(.exit.text+0x3c): undefined reference to `i2c_del_driver' To avoid the problem, this adds another dependency on I2C that enforces mcp23s08 to be a loadable module whenever the I2C core is a module. Fixes: 64ac43e6fa28 ("gpio: mcp23s08: move to pinctrl") Signed-off-by: Arnd Bergmann <arnd@arndb.de> Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-05-29gpio/pinctrl: ingenic: depend on OFLinus Walleij1-0/+1
Fix compile errors due to missing OF. Cc: Paul Cercueil <paul@crapouillou.net> Reported-by: Randy Dunlap <rdunlap@infradead.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-05-23Merge branch 'mcp23s08' into develLinus Walleij1-0/+13
2017-05-23pinctrl: mcp23s08: drop OF_GPIO dependencySebastian Reichel1-1/+0
The driver compiles & works perfectly fine without OF_GPIO on x86, so lets drop the dependency. Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-05-23pinctrl: mcp23s08: add pinconf supportSebastian Reichel1-0/+1
mcp23xxx device have configurable 100k pullup resistors. This adds support for enabling them using pinctrl's pinconf interface. Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk> Tested-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-05-23gpio: mcp23s08: move to pinctrlSebastian Reichel1-0/+13
This moves the mcp23s08 driver from gpio to pinctrl. Actual pinctrl support for configuration of the pull-up resistors follows in its own patch. Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk> Acked-by: Sylvain Lemieux <slemieux.tyco@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-05-22Merge branch 'ingenic' into develLinus Walleij1-0/+9
2017-05-22pinctrl: add a pinctrl driver for the Ingenic jz47xx SoCsPaul Cercueil1-0/+9
This driver handles pin configuration and pin muxing for the JZ4740 and JZ4780 SoCs from Ingenic. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-05-22pinctrl: add ZTE ZX pinctrl driver supportShawn Guo1-0/+1
The pin controller on ZTE ZX platforms is kinda of hybrid. It consists of a main controller and an auxiliary one. For example, on ZX296718 SoC, the main controller is TOP_PMM and the auxiliary one is AON_IOCFG. Both controllers work together to control pin multiplexing and configuration. For most of pins, the pinmux function is controlled by main controller only, and this type of pins are meant by term 'TOP pins'. For other pins, the pinmux is controlled by both main and auxiliary controllers, as the available multiplexing functions for the pin spread in both controllers. This type of pins are called 'AON pins'. Though pinmux implementation is quite different, pinconf is same for both types of pins. Both are controlled by auxiliary controller, i.e. AON_IOCFG on ZX296718. The patch adds the ZTE ZX core pinctrl driver to support this hybrid pin controller as well as ZX296718 SoC specific pin data. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-04-07pinctrl: Add pincontrol driver for ARTPEC-6 SoCJesper Nilsson1-0/+11
Add pinctrl driver support for the Axis ARTPEC-6 SoC. There are only some pins that actually have different functions available, but all can control bias (pull-up/-down) and drive strength. Code originally written by Chris Paterson. Signed-off-by: Jesper Nilsson <jesper.nilsson@axis.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-01-09pinctrl: Introduce TI IOdelay configuration driverNishanth Menon1-0/+1
SoC family such as DRA7 family of processors have, in addition to the regular muxing of pins (as done by pinctrl-single), a separate hardware module called IODelay which is also expected to be configured. The "IODelay" module has it's own register space that is independent of the control module and the padconf register area. With recent changes to the pinctrl framework, we can now support this hardware with a reasonably minimal driver by using #pinctrl-cells, GENERIC_PINCTRL_GROUPS and GENERIC_PINMUX_FUNCTIONS. It is advocated strongly in TI's official documentation considering the existing design of the DRA7 family of processors during mux or IODelay reconfiguration, there is a potential for a significant glitch which may cause functional impairment to certain hardware. It is hence recommended to do as little of muxing as absolutely necessary without I/O isolation (which can only be done in initial stages of bootloader). NOTE: with the system wide I/O isolation scheme present in DRA7 SoC family, it is not reasonable to do stop all I/O operations for every such pad configuration scheme. So, we will let it glitch when used in this mode. Even with the above limitation, certain functionality such as MMC has mandatory need for IODelay reconfiguration requirements, depending on speed of transfer. In these cases, with careful examination of usecase involved, the expected glitch can be controlled such that it does not impact functionality. In short, IODelay module support as a padconf driver being introduced here is not expected to do SoC wide I/O Isolation and is meant for a limited subset of IODelay configuration requirements that need to be dynamic and whose glitchy behavior will not cause functionality failure for that interface. IMPORTANT NOTE: we take the approach of keeping LOCK_BITs cleared to 0x0 at all times, even when configuring Manual IO Timing Modes. This is done by eliminating the LOCK_BIT=1 setting from Step of the Manual IO timing Mode configuration procedure. This option leaves the CFG_* registers unprotected from unintended writes to the CTRL_CORE_PAD_* registers while Manual IO Timing Modes are configured. This approach is taken to allow for a generic driver to exist in kernel world that has to be used carefully in required usecases. Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> [tony@atomide.com: updated to use generic pinctrl functions, added binding documentation, updated comments] Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-01-03pinctrl: single: Use generic pinmux helpers for managing functionsTony Lindgren1-1/+1
We can now drop the driver specific code for managing functions. Signed-off-by: Tony Lindgren <tony@atomide.com> [Replaces GENERIC_PINMUX with GENERIC_PINMUX_FUNCTIONS] Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-01-03pinctrl: single: Use generic pinctrl helpers for managing groupsTony Lindgren1-1/+1
We can now drop the driver specific code for managing groups. Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-01-03pinctrl: core: Add generic pinctrl functions for managing groupsTony Lindgren1-0/+4
We can add generic helpers for function handling for cases where the pin controller driver does not need to use static arrays. Signed-off-by: Tony Lindgren <tony@atomide.com> [Renamed the Kconfig item and moved things around] Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-01-03pinctrl: stricten up generic group codeLinus Walleij1-1/+1
Rename the symbol PINCTRL_GENERIC to PINCTRL_GENERIC_GROUPS since it all pertains to groups. Replace everywhere. ifdef out the radix tree and the struct when not using the generic groups. Cc: Tony Lindgren <tony@atomide.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-01-03pinctrl: core: Add generic pinctrl functions for managing groupsTony Lindgren1-0/+3
We can add generic helpers for pin group handling for cases where the pin controller driver does not need to use static arrays. Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-12-07pinctrl: New driver for TI DA850/OMAP-L138/AM18XX pinconfDavid Lechner1-0/+9
This adds a new driver for pinconf on TI DA850/OMAP-L138/AM18XX. These SoCs have a separate controller for controlling pullup/pulldown groups. Signed-off-by: David Lechner <david@lechnology.com> Reviewed-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-11-08pinctrl-sx150x: Convert driver to use regmap APIAndrey Smirnov1-0/+1
To allow for future code simplification Tested-by: Neil Armstrong <narmstrong@baylibre.com> Acked-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-10-29pinctrl: max77620: add OF dependencyArnd Bergmann1-1/+1
Drivers using pinconf_generic_params tables cannot be built with CONFIG_OF disabled: drivers/pinctrl/pinctrl-max77620.c:53:44: error: array type has incomplete element type ‘struct pinconf_generic_params’ drivers/pinctrl/pinctrl-max77620.c:55:3: error: field name not in record or union initializer drivers/pinctrl/pinctrl-max77620.c:55:3: note: (near initialization for ‘max77620_cfg_params’) drivers/pinctrl/pinctrl-max77620.c:56:3: error: field name not in record or union initializer This adds a dependency for max77620 to disallow that configuration. Alternatively, we could rework the pinctrl infrastructure to make the configuration valid for compile-testing. Cc: Krzysztof Kozlowski <krzk@kernel.org> Cc: Lee Jones <lee.jones@linaro.org> Fixes: 453943dc8f45 ("mfd: Enable compile testing for max77620 and max77686") Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-10-24pinctrl: Add SX150X GPIO Extender Pinctrl DriverNeil Armstrong1-0/+14
Since the I2C sx150x GPIO expander driver uses platform_data to manage the pins configurations, rewrite the driver as a pinctrl driver using pinconf to get/set pin configurations from DT or debugfs. The pinctrl driver is functionnally equivalent as the gpio-only driver and can use DT for pinconf. The platform_data confirmation is dropped. This patchset removed the gpio-only driver and selects the Pinctrl driver config instead. This patchset also migrates the gpio dt-bindings to pinctrl and add the pinctrl optional properties. The driver was tested with a SX1509 device on a BeagleBone black with interrupt support and on an X86_64 machine over an I2C to USB converter. This is a fixed version that builds and runs on non-OF platforms and on arm based OF. The GPIO version is removed and the bindings are also moved to the pinctrl bindings. Changes since v2 - rebased on v4.9-rc1 - removed MODULE_DEVICE_TABLE as in upstream bb411e771b0e ("gpio: sx150x: fix implicit assumption module.h is present") Changes since v1 - Fix Kconfig descriptions on pinctrl and gpio - Fix Kconfig dependency - Remove oscio support for non-789 devices - correct typo in dt bindings - remove probe reset for non-789 devices Changes since RFC - Put #ifdef CONFIG_OF/CONFIG_OF_GPIO to remove OF code for non-of platforms - No more rely on OF_GPIO config - Moved and enhanced bindings to pinctrl bindings - Removed gpio-sx150x.c - Temporary select PINCTRL_SX150X when GPIO_SX150X - Temporary mark GPIO_SX150X as deprecated Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Tested-by: Peter Rosin <peda@axentia.se> Acked-by: Rob Herring <robh@kernel.org> ested-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-09-07pinctrl: Add core support for Aspeed SoCsAndrew Jeffery1-0/+1
The Aspeed SoCs typically provide more than 200 pins for GPIO and other functions. The signal enabled on a pin is determined on a priority basis, where a given pin can provide a number of different signal types. In addition to the priority levels, the Aspeed pin controllers describe the signal active on a pin by compound logical expressions involving multiple operators, registers and bits. Some difficulty arises as a pin's function bit masks for each priority level are frequently not the same (i.e. we cannot just flip a bit to change from a high to low priority signal), or even in the same register(s). Some configuration bits affect multiple pins, while in other cases the signals for a bus must each be enabled individually. Together, these features give rise to some complexity in the implementation. A more complete description of the complexities is provided in the associated header file. The patch doesn't implement pinctrl/pinmux/pinconf for any particular Aspeed SoC, rather it adds the framework for defining pinmux configurations. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Reviewed-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-06-22pinctrl: as3722: convert PINCTRL_AS3722 from bool to tristatePaul Gortmaker1-1/+1
The Kconfig currently controlling compilation of this code is: config PINCTRL_AS3722 bool "Pinctrl and GPIO driver for ams AS3722 PMIC" ...meaning that it currently is not being built as a module by anyone. During an audit for non-modular drivers using modular infrastructure this driver showed up. But rather than demodularize it, Laxman indicated that it would be prefereable to instead convert the driver option to tristate. This does that, and confirms that it will compile and modpost as such. However, since I do not have the hardware to confirm that no new runtime issues exist when modular, that remains untested. Cc: Laxman Dewangan <ldewangan@nvidia.com> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: linux-gpio@vger.kernel.org Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-06-22pinctrl: palmas: convert PINCTRL_PALMAS from bool to tristatePaul Gortmaker1-1/+1
The Kconfig currently controlling compilation of this code is: config PINCTRL_PALMAS bool "Pinctrl driver for the PALMAS Series MFD devices" ...meaning that it currently is not being built as a module by anyone. During an audit for non-modular drivers using modular infrastructure this driver showed up. But rather than demodularize it, Laxman indicated that it would be prefereable to instead convert the driver option to tristate. This does that, and confirms that it will compile and modpost as such. However, since I do not have the hardware to confirm that no new runtime issues exist when modular, that remains untested. Cc: Laxman Dewangan <ldewangan@nvidia.com> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: linux-gpio@vger.kernel.org Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-06-15pinctrl: max77620: select PINMUXArnd Bergmann1-0/+1
The recently added max77620 driver fails to build when CONFIG_PINMUX is not set: pinctrl/pinctrl-max77620.c:272:21: error: variable 'max77620_pinmux_ops' has initializer but incomplete type static const struct pinmux_ops max77620_pinmux_ops = { ^~~~~~~~~~ pinctrl/pinctrl-max77620.c:273:2: error: unknown field 'get_functions_count' specified in initializer This adds the Kconfig 'select' statement that was clearly meant to be there and is used in all other pinmux drivers. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-05-30pinctrl: max77620: add pincontrol driver for MAX77620/MAX20024Laxman Dewangan1-0/+10
MAXIM Semiconductor's PMIC, MAX77620/MAX20024 has 8 GPIO pins which also act as the special function in alternate mode. Also there is configuration like push-pull, open drain, FPS timing etc for these pins. Add pin control driver to configure these parameters through pin control APIs. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-05-30pinctrl: Add Oxford Semiconductor OXNAS pinctrl and gpio driverNeil Armstrong1-0/+11
Add pinctrl and gpio control support to Oxford Semiconductor OXNAS SoC Family. This version supports the ARM926EJ-S based OX810SE SoC with 34 IO pins. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-02-16pinctrl: Turn AMD support to tristateJean Delvare1-1/+1
The pinctrl-amd driver builds just fine as a module so give users this option. Signed-off-by: Jean Delvare <jdelvare@suse.de> Cc: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-02-06pinctrl: pinctrl-pic32: Add PIC32 pin control driverJoshua Henderson1-0/+17
Add a driver for the pin controller present on the Microchip PIC32 including the specific variant PIC32MZDA. This driver provides pinmux and pinconfig operations as well as GPIO and IRQ chips for the GPIO banks. Signed-off-by: Joshua Henderson <joshua.henderson@microchip.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-02-05pinctrl: tegra: move Tegra pinctrl drivers to sub-directoryMasahiro Yamada1-31/+1
Tegra has several pinctrl drivers. Now it is reasonable enough to move them into drivers/pinctrl/tegra/. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-01-27pinctrl: Add STM32 MCUs supportMaxime Coquelin1-0/+1
This patch adds pinctrl and GPIO support to STMicroelectronic's STM32 family of MCUs. While it only supports STM32F429 for now, it has been designed to enable support of other MCUs of the family (e.g. STM32F746). Acked-by: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Maxime Coquelin <mcoquelin.stm32@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-12-17Merge tag 'v4.4-rc5' into develLinus Walleij1-4/+0
Linux 4.4-rc5
2015-12-10pinctrl: activate pxa architectureRobert Jarzmik1-0/+1
As the pxa architecture, at least for pxa27x, supports pin control, activate it in the pinctrl tree. Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-12-01pinctrl: fix a typo in KconfigMasahiro Yamada1-1/+1
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-11-17pinctrl: remove redundant if conditional from KconfigMasahiro Yamada1-4/+0
The whole menu is guarded by menu "Pin controllers" depends on PINCTRL ... endmenu The if conditional outside of it is redundant. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-09-21pinctrl: introduce driver for Atmel PIO4 controllerLudovic Desroches1-0/+13
Add a pinctrl/gpio driver for Atmel PIO4 controller available on SAMA5D2 chip family. Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-07-27pinctrl: driver for Conexant Digicolor CX92755 pin mappingBaruch Siach1-0/+6
This adds pinctrl and gpio driver to the CX92755 SoC "General Purpose Pin Mapping" hardware block. The CX92755 is one SoC from the Conexant Digicolor series. Pin mapping hardware supports configuring pins as either GPIO, or up to 3 other "client select" functions. This driver adds support for pin muxing using the generic device tree binding, and a basic gpiolib driver for the GPIO functionality. This driver does not currently support GPIO interrupts, and pad configuration. v2: * Address review comments for Linus Walleij: - Add a pointer to pinctrl_desc in struct dc_pinmap - Drop the now redundant pinctrl_pin_desc field - Adapt dc_get_group_{name,pins} to these changes, and add a comment explaining the 1-to-1 pin-groups relation * Staticise dc_pmxops * Protect the GP_CLIENTSEL clct parameter with parenthesis Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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