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path: root/drivers/phy/amlogic/phy-meson-g12a-usb3-pcie.c
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2020-11-30phy: amlogic: replace devm_reset_control_array_get()Yejune Deng1-1/+1
devm_reset_control_array_get_exclusive() looks more readable Signed-off-by: Yejune Deng <yejune.deng@gmail.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de> Link: https://lore.kernel.org/r/1605666995-16462-1-git-send-email-yejune.deng@gmail.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-11-17phy: amlogic: Revert "phy: amlogic: Replace devm_reset_control_array_get()"Vinod Koul1-1/+1
This reverts commit 3cc8e86721ad ("phy: amlogic: Replace devm_reset_control_array_get()") as it caused build failure drivers/soc/amlogic/meson-ee-pwrc.c: In function 'meson_ee_pwrc_init_domain': drivers/soc/amlogic/meson-ee-pwrc.c:416:65: error: expected ';' before 'if' Reported-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-11-16phy: amlogic: Replace devm_reset_control_array_get()Yejune Deng1-1/+1
devm_reset_control_array_get_exclusive() looks more readable Signed-off-by: Yejune Deng <yejune.deng@gmail.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Link: https://lore.kernel.org/r/1604378274-6860-1-git-send-email-yejune.deng@gmail.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-11-16phy: amlogic: convert to devm_platform_ioremap_resourceChunfeng Yun1-3/+1
Use devm_platform_ioremap_resource to simplify code Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Reviewed-by: Remi Pommarel <repk@triplefau.lt> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Link: https://lore.kernel.org/r/1604642930-29019-2-git-send-email-chunfeng.yun@mediatek.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2019-10-15phy: meson-g12a-usb3-pcie: Add support for PCIe modeNeil Armstrong1-9/+61
This adds extended PCIe PHY functions for the Amlogic G12A USB3+PCIE Combo PHY to support reset, power_on and power_off for PCIe exclusively. With these callbacks, we can handle all the needed operations of the Amlogic PCIe controller driver. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Andrew Murray <andrew.murray@arm.com>
2019-06-25phy: meson-g12a-usb3-pcie: disable locking for cr_regmapNeil Armstrong1-1/+1
Locking is not needed for the phy_g12a_usb3_pcie_cr_bus_read/write() and currently it causes the following BUG because of the usage of the regmap_read_poll_timeout() running in spinlock_irq, configured by regmap fast_io. Simply disable locking in the cr_regmap config since it's only used from the PHY init callback function. BUG: sleeping function called from invalid context at drivers/phy/amlogic/phy-meson-g12a-usb3-pcie.c:85 in_atomic(): 1, irqs_disabled(): 128, pid: 60, name: kworker/3:1 [snip] Workqueue: events deferred_probe_work_func Call trace: dump_backtrace+0x0/0x190 show_stack+0x14/0x20 dump_stack+0x90/0xb4 ___might_sleep+0xec/0x110 __might_sleep+0x50/0x88 phy_g12a_usb3_pcie_cr_bus_addr.isra.0+0x80/0x1a8 phy_g12a_usb3_pcie_cr_bus_read+0x34/0x1d8 _regmap_read+0x60/0xe0 _regmap_update_bits+0xc4/0x110 regmap_update_bits_base+0x60/0x90 phy_g12a_usb3_pcie_init+0xdc/0x210 phy_init+0x74/0xd0 dwc3_meson_g12a_probe+0x2cc/0x4d0 platform_drv_probe+0x50/0xa0 really_probe+0x20c/0x3b8 driver_probe_device+0x68/0x150 __device_attach_driver+0xa8/0x170 bus_for_each_drv+0x64/0xc8 __device_attach+0xd8/0x158 device_initial_probe+0x10/0x18 bus_probe_device+0x90/0x98 deferred_probe_work_func+0x94/0xe8 process_one_work+0x1e0/0x338 worker_thread+0x230/0x458 kthread+0x134/0x138 ret_from_fork+0x10/0x1c Fixes: 36077e16c050 ("phy: amlogic: Add Amlogic G12A USB3 + PCIE Combo PHY Driver") Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Tested-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2019-04-17phy: amlogic: Add Amlogic G12A USB3 + PCIE Combo PHY DriverNeil Armstrong1-0/+413
This adds support for the shared USB3 + PCIE PHY found in the Amlogic G12A SoC Family. It supports USB3 Host mode or PCIE 2.0 mode, depending on the layout of the board. Selection is done by the #phy-cells, making the mode static and exclusive. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>