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path: root/drivers/pci
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2012-06-20PCI: cleanup assign_requested_resources_sorted() kernel-doc warningWanpeng Li1-1/+1
Warning(drivers/pci/setup-bus.c:277): No description found for parameter 'fail_head' Warning(drivers/pci/setup-bus.c:277): Excess function parameter 'failed_list' description in 'assign_requested_resources_sorted' Signed-off-by: Wanpeng Li <liwp.linux@gmail.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2012-06-18Merge branch 'topic/jan-intx-masking' into nextBjorn Helgaas2-0/+17
* topic/jan-intx-masking: PCI: add Ralink RT2800 broken INTx masking quirk PCI: add Chelsio T310 10GbE NIC broken INTx masking quirk PCI: add infrastructure for devices with broken INTx masking
2012-06-18Merge branch 'topic/sebastian-devinit-fixups' into nextBjorn Helgaas1-9/+9
* topic/sebastian-devinit-fixups: scripts/modpost: check for bad references in .pci.fixups area sh/PCI: move fixup hooks from __init to __devinit powerpc/PCI: move fixup hooks from __init to __devinit frv/PCI: move fixup hooks from __init to __devinit arm/PCI: move fixup hooks from __init to __devinit alpha/PCI: move fixup hooks from __init to __devinit PCI: move fixup hooks from __init to __devinit x86/PCI: move fixup hooks from __init to __devinit
2012-06-18Merge branch 'topic/stowe-cap-cleanup' into nextBjorn Helgaas1-48/+67
* topic/stowe-cap-cleanup: PCI: remove redundant capabilities checking in pci_{save, restore}_pcie_state PCI: add pci_pcie_cap2() check for PCIe feature capabilities >= v2 PCI: remove redundant checking in PCI Express capability routines PCI: make pci_ltr_supported() static
2012-06-18PCI: add Ralink RT2800 broken INTx masking quirkAlex Williamson1-0/+2
Passes pci_intx_mask_supported test but continues to send interrupts as discovered through VFIO-based device assignment. http://www.spinics.net/lists/kvm/msg73738.html [bhelgaas: use HEADER, not FINAL, which is currently broken for hotplug] Tested-by: Andreas Hartmann <andihartmann@01019freenet.de> Signed-off-by: Alex Williamson <alex.williamson@redhat.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2012-06-18PCI: add Chelsio T310 10GbE NIC broken INTx masking quirkJan Kiszka1-0/+2
According to http://thread.gmane.org/gmane.comp.emulators.kvm.devel/91388 the T310 does not properly support INTx masking as it fails to keep the PCI_STATUS_INTERRUPT bit updated once the interrupt is masked. Mark this adapter as broken so that pci_intx_mask_supported won't report it as compatible. [bhelgaas: use HEADER, not FINAL, which is currently broken for hotplug] Tested-by: Alexey Kardashevskiy <aik@ozlabs.ru> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2012-06-17PCI: add infrastructure for devices with broken INTx maskingBjorn Helgaas2-0/+13
pci_intx_mask_supported() assumes INTx masking is supported if the PCI_COMMAND_INTX_DISABLE bit is writable. But when that bit is set, some devices don't actually mask INTx or update PCI_STATUS_INTERRUPT as we expect. This patch adds a way for quirks to identify these broken devices. [bhelgaas: split out from Chelsio quirk addition] Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2012-06-14Merge branch 'topic/alex-vfio-prep' into nextBjorn Helgaas4-9/+157
* topic/alex-vfio-prep: PCI: misc pci_reg additions PCI: create common pcibios_err_to_errno PCI: export pci_user functions for use by other drivers PCI: add ACS validation utility PCI: add PCI DMA source ID quirk
2012-06-14Merge branch 'topic/bjorn-remove-unused' into nextBjorn Helgaas2-68/+1
* topic/bjorn-remove-unused: PCI/AER: use pci_is_pcie() instead of obsolete pci_dev.is_pcie PCI: remove pci_max_busnr() (was already commented out) PCI: remove pci_bus_find_ext_capability() (unused)
2012-06-14PCI: acpiphp: remove all functions in slot, even without ACPI _EJxAmos Kong2-10/+34
When we add a device with acpiphp, we enumerate all functions in the slot with pci_scan_slot(), regardless of whether they have associated ACPI methods such as _EJ0. When removing the device, we previously removed only the functions with those ACPI methods. This patch makes the remove symmetric with the add: we remove all functions in the slot, whether they have associated ACPI methods or not. With qemu-kvm and SeaBIOS, we can build a multi-function device where only function 0 has _EJ0 and _ADR (see bugzilla below). Removing and re-adding that slot (including all functions of the device) works correctly with Windows guests. This patch makes it also work in Linux guests. [bhelgaas: restructure loop iteration, pull out of slot->funcs loop] Reference: https://bugzilla.kernel.org/show_bug.cgi?id=43219 Signed-off-by: Amos Kong <kongjianjun@gmail.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2012-06-14PCI: acpiphp: fix function 0 leak when disabling a slotAmos Kong1-0/+1
Previously, we acquired two references to function 0, but only released one. [bhelgaas: split this out from "remove all functions" fix] Signed-off-by: Amos Kong <kongjianjun@gmail.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2012-06-14PCI: hotplug: remove pci_do_scan_bus()Yinghai Lu2-16/+0
All callers of pci_do_scan_bus() are gone, so remove it. Note that pci_do_scan_bus() was exported, so out-of-tree modules could depend on it. [bhelgaas: changelog] Signed-off-by: Yinghai Lu <yinghai@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2012-06-14PCI: sgihp: use generic pci_hp_add_bridge()Yinghai Lu1-9/+5
Use the new generic pci_hp_add_bridge() interface. [bhelgaas: changelog] Signed-off-by: Yinghai Lu <yinghai@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2012-06-14PCI: ibmhp: use generic pci_hp_add_bridge()Yinghai Lu1-6/+4
Use the new generic pci_hp_add_bridge() interface. [bhelgaas: changelog] Signed-off-by: Yinghai Lu <yinghai@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2012-06-14PCI: cpqhp: use generic pci_hp_add_bridge()Yinghai Lu1-6/+4
Use the new generic pci_hp_add_bridge() interface. [bhelgaas: changelog] Signed-off-by: Yinghai Lu <yinghai@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2012-06-14PCI: shpchp: use generic pci_hp_add_bridge()Yinghai Lu1-32/+15
Use the new generic pci_hp_add_bridge() interface. [bhelgaas: changelog] Signed-off-by: Yinghai Lu <yinghai@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2012-06-14PCI: cpci_hotplug: use generic pci_hp_add_bridge()Yinghai Lu1-31/+6
Use the new generic pci_hp_add_bridge() interface. [bhelgaas: changelog] Signed-off-by: Yinghai Lu <yinghai@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2012-06-14PCI: pciehp: use generic pci_hp_add_bridge()Yinghai Lu1-26/+2
Use the new generic pci_hp_add_bridge() interface. [bhelgaas: split "add generic pci_hp_add_bridge()" into a separate patch] Signed-off-by: Yinghai Lu <yinghai@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2012-06-14PCI: add generic pci_hp_add_bridge()Yinghai Lu2-0/+24
This creates a generic pci_hp_add_bridge() that can be used by several hotplug drivers. [bhelgaas: split out from pciehp patch] Signed-off-by: Yinghai Lu <yinghai@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2012-06-14PCI: sgihp: register busn_resYinghai Lu1-1/+3
Signed-off-by: Yinghai Lu <yinghai@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2012-06-14PCI: ibmhp: register busn_resYinghai Lu1-1/+3
Signed-off-by: Yinghai Lu <yinghai@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2012-06-14PCI: cpqhp: register busn_resYinghai Lu1-1/+3
Signed-off-by: Yinghai Lu <yinghai@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2012-06-14PCI: shpchp: register busn_resYinghai Lu1-1/+3
Signed-off-by: Yinghai Lu <yinghai@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2012-06-14PCI: cpci_hotplug: register busn_resYinghai Lu1-1/+3
Signed-off-by: Yinghai Lu <yinghai@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2012-06-14PCI: insert busn_res for child busYinghai Lu1-2/+3
Now we can insert busn_res now, after all root bus's get inserted. Signed-off-by: Yinghai Lu <yinghai@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2012-06-14PCI: register busn_res for iov busYinghai Lu1-1/+1
Insert that to tree. Signed-off-by: Yinghai Lu <yinghai@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2012-06-14PCI: add default busn_res for pci_scan_bus()Yinghai Lu1-2/+4
also do not need to shrink busn_res. Signed-off-by: Yinghai Lu <yinghai@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2012-06-14PCI: add default busn_resourceYinghai Lu1-0/+7
We need to put into the resources list for legacy system. Signed-off-by: Yinghai Lu <yinghai@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2012-06-14PCI: checking busn_res in pci_scan_root_bus()Yinghai Lu1-1/+21
Some callers do not supply the bus number aperture, usually because they do not know the end. In this case, we assume the aperture extends from the root bus number to bus 255, scan the bus, and shrink the bus number resource so it ends at the largest bus number we found. This is obviously not correct because the actual end of the aperture may well be larger than the largest bus number we found. But I guess it's all we have for now. Also print out one info about that, so we could find out which path does not have busn_res in resources list. [bhelgaas: changelog, _safe iterator unnecessary, use %pR format for bus] Signed-off-by: Yinghai Lu <yinghai@kernel.org>
2012-06-14PCI: insert busn_res in pci_create_root_bus()Yinghai Lu1-1/+4
That busn_res is from resources list. Signed-off-by: Yinghai Lu <yinghai@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2012-06-14PCI: release busn_res when removing busYinghai Lu1-0/+1
Release bus number resource when removing a bus. Signed-off-by: Yinghai Lu <yinghai@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2012-06-14PCI: add busn_res operation functionsYinghai Lu1-0/+68
Will use them insert/update busn res in pci_bus struct. [bhelgaas: print conflicting entry if insertion fails] Signed-off-by: Yinghai Lu <yinghai@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2012-06-14PCI: build a bus number resource tree for every domainYinghai Lu1-0/+30
This adds get_pci_domain_busn_res(), which returns the root of the bus number resource tree for a domain, creating it if necessary. We will later populate the tree with the bus numbers used by host bridges and P2P bridges in the domain. [bhelgaas: changelog] Signed-off-by: Yinghai Lu <yinghai@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2012-06-14PCI: replace struct pci_bus secondary/subordinate with busn_resYinghai Lu9-59/+59
Replace the struct pci_bus secondary/subordinate members with the struct resource busn_res. Later we'll build a resource tree of these bus numbers. [bhelgaas: changelog] Signed-off-by: Yinghai Lu <yinghai@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2012-06-14USB: add NO_D3_DURING_SLEEP flag and revert 151b61284776be2Alan Stern2-0/+31
This patch (as1558) fixes a problem affecting several ASUS computers: The machine crashes or corrupts memory when going into suspend if the ehci-hcd driver is bound to any controllers. Users have been forced to unbind or unload ehci-hcd before putting their systems to sleep. After extensive testing, it was determined that the machines don't like going into suspend when any EHCI controllers are in the PCI D3 power state. Presumably this is a firmware bug, but there's nothing we can do about it except to avoid putting the controllers in D3 during system sleep. The patch adds a new flag to indicate whether the problem is present, and avoids changing the controller's power state if the flag is set. Runtime suspend is unaffected; this matters only for system suspend. However as a side effect, the controller will not respond to remote wakeup requests while the system is asleep. Hence USB wakeup is not functional -- but of course, this is already true in the current state of affairs. A similar patch has already been applied as commit 151b61284776be2d6f02d48c23c3625678960b97 (USB: EHCI: fix crash during suspend on ASUS computers). The patch supersedes that one and reverts it. There are two differences: The old patch added the flag at the USB level; this patch adds it at the PCI level. The old patch applied to all chipsets with the same vendor, subsystem vendor, and product IDs; this patch makes an exception for a known-good system (based on DMI information). Signed-off-by: Alan Stern <stern@rowland.harvard.edu> Tested-by: Dâniel Fraga <fragabr@gmail.com> Tested-by: Andrey Rahmatullin <wrar@wrar.name> Tested-by: Steven Rostedt <rostedt@goodmis.org> Cc: stable <stable@vger.kernel.org> Reviewed-by: Rafael J. Wysocki <rjw@sisk.pl> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2012-06-12PCI: export pci_user functions for use by other driversAlex Williamson2-9/+4
VFIO PCI support will make use of these for user-initiated PCI config accesses. Signed-off-by: Alex Williamson <alex.williamson@redhat.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2012-06-12PCI: add ACS validation utilityAlex Williamson2-0/+102
In a PCI environment, transactions aren't always required to reach the root bus before being re-routed. Intermediate switches between an endpoint and the root bus can redirect DMA back downstream before things like IOMMUs have a chance to intervene. Legacy PCI is always susceptible to this as it operates on a shared bus. PCIe added a new capability to describe and control this behavior, Access Control Services, or ACS. The utility function pci_acs_enabled() allows us to test the ACS capabilities of an individual devices against a set of flags while pci_acs_path_enabled() tests a complete path from a given downstream device up to the specified upstream device. We also include the ability to add device specific tests as it's likely we'll see devices that do not implement ACS, but want to indicate support for various capabilities in this space. Signed-off-by: Alex Williamson <alex.williamson@redhat.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2012-06-12PCI: move fixup hooks from __init to __devinitSebastian Andrzej Siewior1-9/+9
The fixups are executed once the pci-device is found which is during boot process so __init seems fine as long as the platform does not support hotplug. However it is possible to remove the PCI bus at run time and have it rediscovered again via "echo 1 > /sys/bus/pci/rescan" and this will call the fixups again. Signed-off-by: Sebastian Andrzej Siewior <sebastian@breakpoint.cc> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2012-06-12PCI: remove redundant capabilities checking in pci_{save, restore}_pcie_stateMyron Stowe1-18/+15
Unlike PCI Express v1's Capabilities Structure, v2's requires the entire structure to be implemented. In v2 structures, register fields that are not implemented are present but hardwired to 0x0. These may include: Link Capabilities, Status, and Control; Slot Capabilities, Status, and Control; Root Capabilities, Status, and Control; and all of the '2' (Device, Link, and Slot) Capabilities, Status, and Control registers. This patch removes the redundant capability checks corresponding to the Link 2's and Slot 2's, Capabilities, Status, and Control registers as they will be present if Device Capabilities 2's registers are (which explains why the macros for each of the three are identical). Signed-off-by: Myron Stowe <myron.stowe@redhat.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2012-06-12PCI: add pci_pcie_cap2() check for PCIe feature capabilities >= v2Myron Stowe1-15/+50
This patch resolves potential issues when accessing PCI Express Capability structures. The makeup of the capability varies substantially between v1 and v2: Version 1 of the PCI Express Capability (defined by PCI Express 1.0 and 1.1 base) neither requires the endpoint to implement the entire PCIe capability structure nor specifies default values of registers that are not implemented by the device. Version 2 of the PCI Express Capability (defined by PCIe 1.1 Capability Structure Expansion ECN, PCIe 2.0, 2.1, and 3.0) added additional registers to the structure and requires all registers to be either implemented or hardwired to 0. Due to the differences in the capability structures, code dealing with capability features must be careful not to access the additional registers introduced with v2 unless the device is specifically known to be a v2 capable device. Otherwise, attempts to access non-existant registers will occur. This is a subtle issue that is hard to track down when it occurs (and it has - see commit 864d296cf94). To try and help mitigate such occurrences, this patch introduces pci_pcie_cap2() which is similar to pci_pcie_cap() but also checks that the PCIe capability version is >= 2. pci_pcie_cap2() should be used for qualifying PCIe capability features introduced after v1. Suggested by Don Dutile. Acked-by: Donald Dutile <ddutile@redhat.com> Signed-off-by: Myron Stowe <myron.stowe@redhat.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2012-06-12PCI: remove redundant checking in PCI Express capability routinesMyron Stowe1-13/+1
There are a number of redundant pci_is_pcie() checks in various PCI Express capabilities related routines like the following: if (!pci_is_pcie(dev)) return false; pos = pci_pcie_cap(dev); if (!pos) return false; The current pci_is_pcie() implementation is merely: static inline bool pci_is_pcie(struct pci_dev *dev) { return !!pci_pcie_cap(dev); } so we can just drop the pci_is_pcie() test in such cases. Acked-by: Donald Dutile <ddutile@redhat.com> Signed-off-by: Myron Stowe <myron.stowe@redhat.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2012-06-12PCI: make pci_ltr_supported() staticMyron Stowe1-2/+1
The PCI Express Latency Tolerance Reporting (LTR) feature's pci_ltr_supported() routine is currently only used within drivers/pci/pci.c so make it static. Acked-by: Donald Dutile <ddutile@redhat.com> Signed-off-by: Myron Stowe <myron.stowe@redhat.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2012-06-12PCI: add PCI DMA source ID quirkAlex Williamson1-0/+51
DMA transactions are tagged with the source ID of the device making the request. Occasionally hardware screws this up and uses the source ID of a different device (often the wrong function number of a multifunction device). A specific Ricoh multifunction device is a prime example of this problem and included in this patch. Given a pci_dev, this function returns the pci_dev to use as the source ID for DMA. When hardware works correctly, this returns the input device. For the components of the Ricoh multifunction device, it returns the pci_dev for function 0. This will be used by IOMMU drivers for determining the boundaries of IOMMU groups as multiple devices using the same source ID must be contained within the same group. This can also be used by existing streaming DMA paths for the same purpose. [bhelgaas: fold in pci_dev_get() for !CONFIG_PCI] Signed-off-by: Alex Williamson <alex.williamson@redhat.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2012-06-11PCI/AER: use pci_is_pcie() instead of obsolete pci_dev.is_pcieBjorn Helgaas1-1/+1
Use pci_is_pcie() instead of looking at obsolete is_pcie field in struct pci_dev. CC: Huang Ying <ying.huang@intel.com> CC: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2012-06-11PCI: remove pci_max_busnr() (was already commented out)Bjorn Helgaas1-24/+0
pci_max_busnr() has been commented out for years (since 54c762fe62), and this patch removes it completely. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2012-06-11PCI: remove pci_bus_find_ext_capability() (unused)Bjorn Helgaas1-43/+0
pci_bus_find_ext_capability() is unused, and this patch removes it. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2012-05-30Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linusLinus Torvalds1-1/+1
Pull MIPS updates from Ralf Baechle: "The whole series has been sitting in -next for quite a while with no complaints. The last change to the series was before the weekend the removal of an SPI patch which Grant - even though previously acked by himself - appeared to raise objections. So I removed it until the situation is clarified. Other than that all the patches have the acks from their respective maintainers, all MIPS and x86 defconfigs are building fine and I'm not aware of any problems introduced by this series. Among the key features for this patch series is a sizable patchset for Lantiq which among other things introduces support for Lantiq's flagship product, the FALCON SOC. It also means that the opensource developers behind this patchset have overtaken Lantiq's competing inhouse development team that was working behind closed doors. Less noteworthy the ath79 patchset which adds support for a few more chip variants, cleanups and fixes. Finally the usual dose of tweaking of generic code." Fix up trivial conflicts in arch/mips/lantiq/xway/gpio_{ebu,stp}.c where printk spelling fixes clashed with file move and eventual removal of the printk. * 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (81 commits) MIPS: lantiq: remove orphaned code MIPS: Remove all -Wall and almost all -Werror usage from arch/mips. MIPS: lantiq: implement support for FALCON soc MTD: MIPS: lantiq: verify that the NOR interface is available on falcon soc MTD: MIPS: lantiq: implement OF support watchdog: MIPS: lantiq: implement OF support and minor fixes SERIAL: MIPS: lantiq: implement OF support GPIO: MIPS: lantiq: convert gpio-stp-xway to OF GPIO: MIPS: lantiq: convert gpio-mm-lantiq to OF and of_mm_gpio GPIO: MIPS: lantiq: move gpio-stp and gpio-ebu to the subsystem folder MIPS: pci: convert lantiq driver to OF MIPS: lantiq: convert dma to platform driver MIPS: lantiq: implement support for clkdev api MIPS: lantiq: drop ltq_gpio_request() and gpio_to_irq() OF: MIPS: lantiq: implement irq_domain support OF: MIPS: lantiq: implement OF support MIPS: lantiq: drop mips_machine support OF: PCI: const usage needed by MIPS MIPS: Cavium: Remove smp_reserve_lock. MIPS: Move cache setup to setup_arch(). ...
2012-05-24Merge branch 'drm-core-next' of git://people.freedesktop.org/~airlied/linuxLinus Torvalds1-0/+5
Pull main drm updates from Dave Airlie: "This is the main merge window request for the drm. It's big, but jam packed will lots of features and of course 0 regressions. (okay maybe there'll be one). Highlights: - new KMS drivers for server GPU chipsets: ast, mgag200 and cirrus (qemu only). These drivers use the generic modesetting drivers. - initial prime/dma-buf support for i915, nouveau, radeon, udl and exynos - switcheroo audio support: so GPUs with HDMI can turn off the sound driver without crashing stuff. - There are some patches drifting outside drivers/gpu into x86 and EFI for better handling of multiple video adapters in Apple Macs, they've got correct acks except one trivial fixup. - Core: edid parser has better DMT and reduced blanking support, crtc properties, plane properties, - Drivers: exynos: add 2D core accel support, prime support, hdmi features intel: more Haswell support, initial Valleyview support, more hdmi infoframe fixes, update MAINTAINERS for Daniel, lots of cleanups and fixes radeon: more HDMI audio support, improved GPU lockup recovery support, remove nested mutexes, less memory copying on PCIE, fix bus master enable race (kexec), improved fence handling gma500: cleanups, 1080p support, acpi fixes nouveau: better nva3 memory reclocking, kepler accel (needs external firmware rip), async buffer moves on nv84+ hw. I've some more dma-buf patches that rely on the dma-buf merge for vmap stuff, and I've a few fixes building up, but I'd decided I'd better get rid of the main pull sooner rather than later, so the audio guys are also unblocked." Fix up trivial conflict due to some duplicated changes in drivers/gpu/drm/i915/intel_ringbuffer.c * 'drm-core-next' of git://people.freedesktop.org/~airlied/linux: (605 commits) drm/nouveau/nvd9: Fix GPIO initialisation sequence. drm/nouveau: Unregister switcheroo client on exit drm/nouveau: Check dsm on switcheroo unregister drm/nouveau: fix a minor annoyance in an output string drm/nouveau: turn a BUG into a WARN drm/nv50: decode PGRAPH DATA_ERROR = 0x24 drm/nouveau/disp: fix dithering not being enabled on some eDP macbooks drm/nvd9/copy: initialise copy engine, seems to work like nvc0 drm/nvc0/ttm: use copy engines for async buffer moves drm/nva3/ttm: use copy engine for async buffer moves drm/nv98/ttm: add in a (disabled) crypto engine buffer copy method drm/nv84/ttm: use crypto engine for async buffer copies drm/nouveau/ttm: untangle code to support accelerated buffer moves drm/nouveau/fbcon: use fence for sync, rather than notifier drm/nv98/crypt: non-stub implementation of the engine hooks drm/nouveau/fifo: turn all fifo modules into engine modules drm/nv50/graph: remove ability to do interrupt-driven context switching drm/nv50: remove manual context unload on context destruction drm/nv50: remove execution engine context saves on suspend drm/nv50/fifo: use hardware channel kickoff functionality ...
2012-05-22Merge tag 'pci-for-3.5' of ↵Linus Torvalds7-124/+224
git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci Pull PCI changes from Bjorn Helgaas: - Host bridge cleanups from Yinghai - Disable Bus Master bit on PCI device shutdown (kexec-related) - Stratus ftServer fix - pci_dev_reset() locking fix - IvyBridge graphics erratum workaround * tag 'pci-for-3.5' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: (21 commits) microblaze/PCI: fix "io_offset undeclared" error x86/PCI: only check for spinlock being held in SMP kernels resources: add resource_overlaps() PCI: fix uninitialized variable 'cap_mask' MAINTAINERS: update PCI git tree and patchwork PCI: disable Bus Master on PCI device shutdown PCI: work around IvyBridge internal graphics FLR erratum x86/PCI: fix unused variable warning in amd_bus.c PCI: move mutex locking out of pci_dev_reset function PCI: work around Stratus ftServer broken PCIe hierarchy x86/PCI: merge pcibios_scan_root() and pci_scan_bus_on_node() x86/PCI: dynamically allocate pci_root_info for native host bridge drivers x86/PCI: embed pci_sysdata into pci_root_info on ACPI path x86/PCI: embed name into pci_root_info struct x86/PCI: add host bridge resource release for _CRS path x86/PCI: refactor get_current_resources() PCI: add host bridge release support PCI: add generic device into pci_host_bridge struct PCI: rename pci_host_bridge() to find_pci_root_bridge() x86/PCI: fix memleak with get_current_resources() ...
2012-05-21OF: PCI: const usage needed by MIPSJohn Crispin1-1/+1
On MIPS we want to call of_irq_map_pci from inside arch/mips/include/asm/pci.h:extern int pcibios_map_irq( const struct pci_dev *dev, u8 slot, u8 pin); For this to work we need to change several functions to const usage. Signed-off-by: John Crispin <blogic@openwrt.org> Cc: linux-pci@vger.kernel.org Cc: devicetree-discuss@lists.ozlabs.org Cc: linux-mips@linux-mips.org Acked-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Patchwork: https://patchwork.linux-mips.org/patch/3710/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>