| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 2009-02-14 | intel-iommu: fix endless "Unknown DMAR structure type" loop | Tony Battersby | 1 | -0/+8 |
| 2009-02-09 | VT-d: handle Invalidation Queue Error to avoid system hang | Yu Zhao | 1 | -16/+45 |
| 2009-02-09 | intel-iommu: fix build error with INTR_REMAP=y and DMAR=n | Joerg Roedel | 1 | -1/+3 |
| 2009-01-03 | calculate agaw for each iommu | Weidong Han | 1 | -0/+10 |
| 2009-01-03 | VT-d: fix segment number being ignored when searching DRHD | Yu Zhao | 1 | -18/+18 |
| 2008-10-21 | Merge branch 'master' of master.kernel.org:/pub/scm/linux/kernel/git/torvalds... | David Woodhouse | 1 | -26/+31 |
| 2008-10-21 | Merge branch 'genirq-v28-for-linus' of git://git.kernel.org/pub/scm/linux/ker... | Linus Torvalds | 1 | -27/+34 |
| 2008-10-18 | dmar: fix uninitialised 'ret' variable in dmar_parse_dev() | David Woodhouse | 1 | -3/+2 |
| 2008-10-18 | intel-iommu: IA64 support | Fenghua Yu | 1 | -8/+11 |
| 2008-10-17 | dmar: remove the quirk which disables dma-remapping when intr-remapping enabled | Youquan Song | 1 | -15/+5 |
| 2008-10-17 | dmar: context cache and IOTLB invalidation using queued invalidation | Youquan Song | 1 | -0/+56 |
| 2008-10-17 | dmar: use spin_lock_irqsave() in qi_submit_sync() | Suresh Siddha | 1 | -6/+13 |
| 2008-10-16 | dmar: fix dmar_parse_dev() devices_cnt error condition check | Suresh Siddha | 1 | -1/+1 |
| 2008-10-16 | dmar: use list_for_each_entry_safe() in dmar_dev_scope_init() | Suresh Siddha | 1 | -4/+4 |
| 2008-10-16 | dmar: initialize the return value in dmar_parse_dev() | Yinghai Lu | 1 | -1/+1 |
| 2008-10-16 | dmar: fix using early fixmap mapping for DMAR table parsing | Yinghai Lu | 1 | -21/+28 |
| 2008-10-15 | VT-d: Changes to support KVM | Kay, Allen M | 1 | -2/+2 |
| 2008-07-12 | x64, x2apic/intr-remap: disable DMA-remapping if Interrupt-remapping is detec... | Suresh Siddha | 1 | -0/+25 |
| 2008-07-12 | x64, x2apic/intr-remap: Interrupt remapping infrastructure | Suresh Siddha | 1 | -0/+16 |
| 2008-07-12 | x64, x2apic/intr-remap: Queued invalidation infrastructure (part of VT-d) | Suresh Siddha | 1 | -0/+150 |
| 2008-07-12 | x64, x2apic/intr-remap: parse ioapic scope under vt-d structures | Suresh Siddha | 1 | -0/+3 |
| 2008-07-12 | x64, x2apic/intr-remap: Fix the need for RMRR in the DMA-remapping detection | Suresh Siddha | 1 | -3/+1 |
| 2008-07-12 | x64, x2apic/intr-remap: use CONFIG_DMAR for DMA-remapping specific code | Suresh Siddha | 1 | -11/+24 |
| 2008-07-12 | x64, x2apic/intr-remap: code re-structuring, to be used by both DMA and Inter... | Suresh Siddha | 1 | -16/+73 |
| 2008-07-12 | x64, x2apic/intr-remap: fix the need for sequential array allocation of iommus | Suresh Siddha | 1 | -2/+9 |
| 2008-07-12 | x64, x2apic/intr-remap: Intel vt-d, IOMMU code reorganization | Suresh Siddha | 1 | -1/+89 |
| 2008-02-24 | copyright owner and author clean up for intel iommu and related files | mark gross | 1 | -4/+5 |
| 2008-02-06 | Genericizing iova.[ch] | David Miller | 1 | -0/+1 |
| 2008-02-02 | PCI: More Sanity checks for DMAR | Fenghua Yu | 1 | -3/+17 |
| 2007-10-22 | Intel IOMMU: DMAR detection and parsing logic | Keshavamurthy, Anil S | 1 | -0/+329 |
