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path: root/drivers/pci/controller/dwc/pcie-designware.h
AgeCommit message (Expand)AuthorFilesLines
2023-05-26PCI: dwc: Wait for link up only if link is startedAjay Agarwal1-0/+1
2023-02-22PCI: dwc: Add Root Port and Endpoint controller eDMA engine supportSerge Semin1-0/+21
2022-11-23PCI: dwc: Introduce generic platform clocks and resetsSerge Semin1-0/+42
2022-11-23PCI: dwc: Introduce generic resources getterSerge Semin1-0/+3
2022-11-23PCI: dwc: Introduce generic controller capabilities interfaceSerge Semin1-1/+11
2022-11-23PCI: dwc: Introduce dma-ranges property support for RC-hostSerge Semin1-2/+4
2022-08-29PCI: dwc: Drop dependency on ZONE_DMA32Will McVicker1-1/+0
2022-08-04Merge branch 'pci/ctrl/tegra194'Bjorn Helgaas1-0/+32
2022-08-04Merge branch 'pci/ctrl/qcom'Bjorn Helgaas1-0/+7
2022-08-01PCI: dwc: Convert struct pcie_port.msi_irq to an arrayDmitry Baryshkov1-1/+1
2022-08-01PCI: dwc: Fix MSI msi_msg DMA mappingWill McVicker1-1/+1
2022-08-01PCI: dwc: Check iATU in/outbound range setup statusSerge Semin1-2/+3
2022-08-01PCI: dwc: Validate iATU outbound mappings against hardware constraintsSerge Semin1-6/+4
2022-08-01PCI: dwc: Add iATU regions size detection procedureSerge Semin1-0/+2
2022-08-01PCI: dwc: Simplify in/outbound iATU setup methodsSerge Semin1-29/+19
2022-08-01PCI: dwc: Drop enum dw_pcie_region_type in favor of PCIE_ATU_REGION_DIR_IB/OBSerge Semin1-10/+3
2022-08-01PCI: dwc: Drop enum dw_pcie_as_type in favor of PCIE_ATU_TYPE_MEM/IOSerge Semin1-8/+1
2022-08-01PCI: dwc: Add dw_pcie_ops.host_deinit() callbackSerge Semin1-0/+1
2022-08-01PCI: dwc: Add macros to compare Synopsys IP core versionsSerge Semin1-0/+15
2022-08-01PCI: dwc: Read DWC IP core version from registerSerge Semin1-0/+6
2022-08-01PCI: dwc: Use native DWC IP core version representationSerge Semin1-1/+9
2022-07-23PCI: tegra194: Find RAS DES PCIe capability offsetVidya Sagar1-0/+19
2022-07-15PCI: qcom: Add IPQ60xx supportSelvam Sathappan Periakaruppan1-0/+1
2022-07-15PCI: dwc: Move GEN3_RELATED DBI definitions to common headerBaruch Siach1-0/+6
2022-07-06PCI: dwc: Rename struct pcie_port to dw_pcie_rpSerge Semin1-15/+15
2022-07-06PCI: dwc: Move io_cfg_atu_shared to struct pcie_portSerge Semin1-1/+1
2022-07-06PCI: dwc: Add start_link/stop_link inlinesSerge Semin1-0/+14
2021-04-29PCI: dwc: Move iATU detection earlierHou Zhiqiang1-0/+1
2021-02-24PCI: dwc: Add upper limit address for outbound iATUShradha Todi1-0/+1
2021-02-24PCI: dwc: Change size to u64 for EP outbound iATUShradha Todi1-1/+1
2021-02-24PCI: dwc: Work around ECRC configuration issueVidya Sagar1-0/+1
2020-11-19PCI: dwc: Detect number of iATU windowsRob Herring1-1/+1
2020-11-19PCI: dwc: Move inbound and outbound windows to common structRob Herring1-2/+2
2020-11-19PCI: dwc: Move dw_pcie_msi_init() into coreRob Herring1-10/+0
2020-11-19PCI: dwc: Rework MSI initializationRob Herring1-0/+1
2020-11-19PCI: dwc: Drop the .set_num_vectors() host opRob Herring1-1/+0
2020-11-18PCI: dwc: Add support to program ATU for >4GB memoryVidya Sagar1-1/+2
2020-11-18PCI: dwc: Support multiple ATU memory regionsRob Herring1-4/+2
2020-10-13PCI: dwc: Fix MSI page leakage in suspend/resumeJisheng Zhang1-1/+1
2020-09-21PCI: designware-ep: Modify MSI and MSIX CAP way of findingXiaowei Bao1-2/+16
2020-09-21PCI: designware-ep: Add the doorbell mode of MSI-X in EP modeXiaowei Bao1-0/+12
2020-09-21PCI: designware-ep: Add multiple PFs support for DWCXiaowei Bao1-2/+16
2020-09-10PCI: dwc: Move N_FTS setup to common setupRob Herring1-1/+2
2020-09-10PCI: dwc: Centralize link gen settingRob Herring1-1/+1
2020-09-08PCI: dwc: Make ATU accessors privateRob Herring1-12/+0
2020-09-08PCI: dwc: Remove read_dbi2 codeRob Herring1-8/+0
2020-09-08PCI: dwc/tegra: Use common Designware port logic register definitionsRob Herring1-0/+6
2020-09-08PCI: dwc: Ensure FAST_LINK_MODE is clearedRob Herring1-0/+1
2020-09-08PCI: dwc: Add a 'num_lanes' field to struct dw_pcieRob Herring1-0/+1
2020-09-08PCI: dwc: Simplify config space handlingRob Herring1-4/+0
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