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path: root/drivers/net/wireless/realtek
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2016-03-23rtlwifi: fix gcc-6 indentation warningArnd Bergmann1-3/+3
2016-03-19Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-nextLinus Torvalds23-564/+3987
2016-03-18Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jik...Linus Torvalds1-1/+1
2016-03-10rtl8xxxu: Temporarily disable 8192eu device initJes Sorensen1-0/+4
2016-03-10rtl8xxxu: Use correct 8051 reset function for 8723b partsJes Sorensen2-2/+39
2016-03-10rtl8xxxu: Print a warning if flushing the FIFO failsJes Sorensen1-1/+4
2016-03-10rtl8xxxu: Flush FIFO before powering down devicesJes Sorensen2-0/+36
2016-03-10rtl8xxxu: Implement device specific power_off functionJes Sorensen3-2/+99
2016-03-10rtl8xxxu: Implement 8723bu specific disable_rf() functionJes Sorensen2-1/+17
2016-03-10rtl8xxxu: Use define for REG_PWR_DATA bitsJes Sorensen2-2/+2
2016-03-10rtl8xxxu: convert rtl8723bu_init_bt() into rtl8723b_enable_rf()Jes Sorensen2-11/+1
2016-03-10rtl8xxxu: Remove unncessary semicolonJes Sorensen1-1/+1
2016-03-10rtl8xxxu: Pass RX rate to rx_parse_phystats and enable phystats for rtl8723buJes Sorensen1-4/+9
2016-03-10rtl8xxxu: Process C2H RA_REPORT events for 8723buJes Sorensen2-0/+17
2016-03-10rtl8xxxu: Dump contents of unhandled C2H eventsJes Sorensen1-1/+4
2016-03-10rtl8xxxu: Report media status using the correct H2C command for 8723buJes Sorensen2-7/+47
2016-03-10rtl8xxxu: Implement basic 8723b specific update_rate_mask() functionJes Sorensen2-4/+50
2016-03-10rtl8xxxu: Define 8723b H2C ramask command structureJes Sorensen1-1/+10
2016-03-10rtl8xxxu: Do not parse RX descriptor info for C2H packetsJes Sorensen1-10/+7
2016-03-10rtl8xxxu: Improve handling of txdesc32 vs txdesc40 handlingJes Sorensen2-38/+92
2016-03-10rtl8xxxu: TX RTS rate is word 4 for 8723aJes Sorensen2-3/+4
2016-03-10rtl8723au: Update TX descriptor words 4 and 5 definitionsJes Sorensen2-15/+28
2016-03-10rtl8xxxu: Set sequence number correctly for 40 byte TX descriptorsJes Sorensen2-10/+22
2016-03-10rtl8xxxu: Set the correct TX descriptor bits for agg and break on 8723bJes Sorensen1-3/+16
2016-03-10rtl8xxxu: Add more 40 byte TX desc bit definitionsJes Sorensen2-6/+28
2016-03-10rtl8xxxu: Add additional tx descriptor bits for data word 0Jes Sorensen1-0/+4
2016-03-10rtl8xxxu: Do not unconditionally print debug info in rtl8723bu_handle_c2h()Jes Sorensen1-9/+9
2016-03-10rtl8xxxu: Handle 40 byte TX descriptors for rtl8723buJes Sorensen2-13/+25
2016-03-10rtl8xxxu: Add definition for 8723bu tx descriptorJes Sorensen1-0/+16
2016-03-10rtl8xxxu: Set the correct thermal meter register for 8723buJes Sorensen1-1/+5
2016-03-10rtl8xxxu: Set 8723bu MCS TX powerJes Sorensen1-2/+12
2016-03-10rtl8xxxu: Set 8723bu TX power for CCK and OFDM ratesJes Sorensen1-1/+22
2016-03-10rtl8xxxu: Parse efuse power indices for 8723buJes Sorensen2-15/+71
2016-03-10rtl8xxxu: Bump TX power arrays to handle larger channel groupsJes Sorensen1-9/+16
2016-03-10rtl8xxxu: Use size of source pointer when copying efuse dataJes Sorensen1-17/+17
2016-03-10rtl8xxxu: Introduce set_tx_power() fileop and a new 8723b dummy derivativeJes Sorensen2-2/+34
2016-03-10rtl8xxxu: Correct struct rtl8723bu_efuse to list power bases correctlyJes Sorensen2-15/+18
2016-03-10rtl8xxxu: Do not use hard-wired RF enable settings for 8723buJes Sorensen2-1/+10
2016-03-10rtl8xxxu: Setup coex table correctly (hopefully)Jes Sorensen1-5/+9
2016-03-10rtl8xxxu: Use REG_RFE_CTRL_ANTA_SRC rather than hard coded valueJes Sorensen1-2/+2
2016-03-10rtl8xxxu: Use name for REG_RFE_BUFFER rather than hard coded valueJes Sorensen1-4/+4
2016-03-10rtl8xxxu: 8723bu: REG_BT_COEX_TABLE4 is only 8 bitsJes Sorensen1-1/+1
2016-03-10rtl8xxxu: Set WLAN_ACT_CONTROL per vendor driver settingJes Sorensen1-1/+1
2016-03-10rtl8xxxu: RF_T_METER is different on the newer chipsJes Sorensen1-6/+7
2016-03-10rtl8xxxu: Implement init_statistics for 8723buJes Sorensen3-0/+35
2016-03-10rtl8xxxu: Add missing blank space in front of bracketJes Sorensen1-1/+1
2016-03-10rtl8xxxu: Setup RX aggregationJes Sorensen3-0/+25
2016-03-10rtl8xxxu: Group chip quirks togetherJes Sorensen1-13/+15
2016-03-10rtl8xxxu: Add REG_DWBCN1_CTRL_8723B defineJes Sorensen1-0/+2
2016-03-10rtl8xxxu: 8723bu lock phy after RF initJes Sorensen1-0/+7
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